| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP |
| 97.40 | 98.22 | 96.03 | 97.44 | 94.92 | 98.38 | 98.17 | 98.64 |
| T3801 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_aliasing.3503618494 | Aug 29 12:26:53 AM UTC 24 | Aug 29 12:26:58 AM UTC 24 | 161868801 ps | ||
| T266 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_mem_rw_with_rand_reset.2557760865 | Aug 29 12:26:52 AM UTC 24 | Aug 29 12:26:59 AM UTC 24 | 162497625 ps | ||
| T270 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_errors.4124466092 | Aug 29 12:26:55 AM UTC 24 | Aug 29 12:26:59 AM UTC 24 | 264331488 ps | ||
| T3802 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_hw_reset.1181978273 | Aug 29 12:26:57 AM UTC 24 | Aug 29 12:26:59 AM UTC 24 | 84838144 ps | ||
| T302 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_rw.3800187642 | Aug 29 12:26:57 AM UTC 24 | Aug 29 12:26:59 AM UTC 24 | 63496386 ps | ||
| T303 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_rw.2795934612 | Aug 29 12:27:08 AM UTC 24 | Aug 29 12:27:11 AM UTC 24 | 62949633 ps | ||
| T3803 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_walk.3950974934 | Aug 29 12:26:56 AM UTC 24 | Aug 29 12:27:00 AM UTC 24 | 329601179 ps | ||
| T265 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_intg_err.2301925368 | Aug 29 12:26:55 AM UTC 24 | Aug 29 12:27:00 AM UTC 24 | 652404365 ps | ||
| T304 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_partial_access.2133116510 | Aug 29 12:26:57 AM UTC 24 | Aug 29 12:27:00 AM UTC 24 | 80738500 ps | ||
| T305 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_aliasing.3511082998 | Aug 29 12:26:52 AM UTC 24 | Aug 29 12:27:00 AM UTC 24 | 342545457 ps | ||
| T280 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_mem_rw_with_rand_reset.393999470 | Aug 29 12:26:58 AM UTC 24 | Aug 29 12:27:00 AM UTC 24 | 62945834 ps | ||
| T315 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_same_csr_outstanding.1348324673 | Aug 29 12:26:59 AM UTC 24 | Aug 29 12:27:01 AM UTC 24 | 103333648 ps | ||
| T271 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_errors.389791261 | Aug 29 12:26:58 AM UTC 24 | Aug 29 12:27:01 AM UTC 24 | 180152911 ps | ||
| T3804 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_aliasing.2375939495 | Aug 29 12:26:58 AM UTC 24 | Aug 29 12:27:01 AM UTC 24 | 89274342 ps | ||
| T326 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_intr_test.2013935969 | Aug 29 12:26:58 AM UTC 24 | Aug 29 12:27:01 AM UTC 24 | 107669221 ps | ||
| T3805 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_hw_reset.2324796896 | Aug 29 12:26:58 AM UTC 24 | Aug 29 12:27:01 AM UTC 24 | 117010319 ps | ||
| T324 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_rw.731599201 | Aug 29 12:27:08 AM UTC 24 | Aug 29 12:27:11 AM UTC 24 | 71257174 ps | ||
| T306 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_rw.1741705125 | Aug 29 12:26:58 AM UTC 24 | Aug 29 12:27:01 AM UTC 24 | 53146813 ps | ||
| T3806 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_same_csr_outstanding.3535766086 | Aug 29 12:26:58 AM UTC 24 | Aug 29 12:27:01 AM UTC 24 | 407587742 ps | ||
| T275 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_mem_rw_with_rand_reset.3726934831 | Aug 29 12:26:59 AM UTC 24 | Aug 29 12:27:02 AM UTC 24 | 200629954 ps | ||
| T325 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_intr_test.1243623630 | Aug 29 12:27:00 AM UTC 24 | Aug 29 12:27:02 AM UTC 24 | 46328645 ps | ||
| T307 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_hw_reset.1225017785 | Aug 29 12:27:00 AM UTC 24 | Aug 29 12:27:02 AM UTC 24 | 85353083 ps | ||
| T308 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_partial_access.3598835381 | Aug 29 12:26:58 AM UTC 24 | Aug 29 12:27:02 AM UTC 24 | 113900897 ps | ||
| T327 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_intr_test.292549114 | Aug 29 12:27:00 AM UTC 24 | Aug 29 12:27:02 AM UTC 24 | 37020270 ps | ||
| T309 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_rw.2151117636 | Aug 29 12:27:00 AM UTC 24 | Aug 29 12:27:02 AM UTC 24 | 89834877 ps | ||
| T272 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_errors.315944776 | Aug 29 12:26:59 AM UTC 24 | Aug 29 12:27:03 AM UTC 24 | 55464390 ps | ||
| T3807 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_aliasing.3069506353 | Aug 29 12:26:59 AM UTC 24 | Aug 29 12:27:03 AM UTC 24 | 81130882 ps | ||
| T3808 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_same_csr_outstanding.309284723 | Aug 29 12:27:00 AM UTC 24 | Aug 29 12:27:03 AM UTC 24 | 128715537 ps | ||
| T310 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_partial_access.4293538752 | Aug 29 12:27:00 AM UTC 24 | Aug 29 12:27:03 AM UTC 24 | 73405098 ps | ||
| T311 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_bit_bash.3274122303 | Aug 29 12:26:53 AM UTC 24 | Aug 29 12:27:03 AM UTC 24 | 1365691288 ps | ||
| T281 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_mem_rw_with_rand_reset.228061296 | Aug 29 12:27:00 AM UTC 24 | Aug 29 12:27:03 AM UTC 24 | 192790290 ps | ||
| T3809 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_walk.3665442272 | Aug 29 12:26:58 AM UTC 24 | Aug 29 12:27:03 AM UTC 24 | 103612682 ps | ||
| T589 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_intg_err.1259864284 | Aug 29 12:26:59 AM UTC 24 | Aug 29 12:27:03 AM UTC 24 | 290279348 ps | ||
| T312 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_aliasing.4028089286 | Aug 29 12:27:00 AM UTC 24 | Aug 29 12:27:03 AM UTC 24 | 206917122 ps | ||
| T592 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_intg_err.2418494350 | Aug 29 12:26:58 AM UTC 24 | Aug 29 12:27:03 AM UTC 24 | 838292937 ps | ||
| T3810 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_walk.458842853 | Aug 29 12:27:00 AM UTC 24 | Aug 29 12:27:04 AM UTC 24 | 380680718 ps | ||
| T3811 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_bit_bash.3838216490 | Aug 29 12:26:52 AM UTC 24 | Aug 29 12:27:04 AM UTC 24 | 1547295244 ps | ||
| T3812 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_bit_bash.2294849119 | Aug 29 12:26:57 AM UTC 24 | Aug 29 12:27:05 AM UTC 24 | 1491075909 ps | ||
| T3813 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_bit_bash.1442097771 | Aug 29 12:27:00 AM UTC 24 | Aug 29 12:27:05 AM UTC 24 | 1065772989 ps | ||
| T328 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_intr_test.1240549703 | Aug 29 12:27:03 AM UTC 24 | Aug 29 12:27:06 AM UTC 24 | 40645841 ps | ||
| T3814 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_rw.3214335351 | Aug 29 12:27:03 AM UTC 24 | Aug 29 12:27:06 AM UTC 24 | 108074938 ps | ||
| T329 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_intr_test.173124067 | Aug 29 12:27:04 AM UTC 24 | Aug 29 12:27:06 AM UTC 24 | 27294030 ps | ||
| T330 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_intr_test.2903964770 | Aug 29 12:27:04 AM UTC 24 | Aug 29 12:27:06 AM UTC 24 | 45518981 ps | ||
| T3815 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_rw.769188581 | Aug 29 12:27:05 AM UTC 24 | Aug 29 12:27:06 AM UTC 24 | 47598212 ps | ||
| T3816 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_rw.4089890558 | Aug 29 12:27:04 AM UTC 24 | Aug 29 12:27:06 AM UTC 24 | 90137556 ps | ||
| T3817 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_mem_rw_with_rand_reset.1569748645 | Aug 29 12:27:04 AM UTC 24 | Aug 29 12:27:07 AM UTC 24 | 101100907 ps | ||
| T333 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_intr_test.2789078497 | Aug 29 12:27:01 AM UTC 24 | Aug 29 12:27:07 AM UTC 24 | 31964139 ps | ||
| T3818 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_rw.2852310157 | Aug 29 12:27:01 AM UTC 24 | Aug 29 12:27:07 AM UTC 24 | 76842434 ps | ||
| T3819 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_same_csr_outstanding.2773527754 | Aug 29 12:27:04 AM UTC 24 | Aug 29 12:27:07 AM UTC 24 | 136533399 ps | ||
| T273 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_errors.3034645173 | Aug 29 12:27:04 AM UTC 24 | Aug 29 12:27:07 AM UTC 24 | 59133526 ps | ||
| T3820 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_same_csr_outstanding.2429837210 | Aug 29 12:27:03 AM UTC 24 | Aug 29 12:27:07 AM UTC 24 | 234089854 ps | ||
| T3821 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_same_csr_outstanding.4233527725 | Aug 29 12:27:05 AM UTC 24 | Aug 29 12:27:07 AM UTC 24 | 110244617 ps | ||
| T3822 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_same_csr_outstanding.3023779884 | Aug 29 12:27:02 AM UTC 24 | Aug 29 12:27:07 AM UTC 24 | 177544762 ps | ||
| T277 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_mem_rw_with_rand_reset.2587041905 | Aug 29 12:27:03 AM UTC 24 | Aug 29 12:27:07 AM UTC 24 | 87284458 ps | ||
| T278 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_mem_rw_with_rand_reset.3740037049 | Aug 29 12:27:03 AM UTC 24 | Aug 29 12:27:07 AM UTC 24 | 102143970 ps | ||
| T274 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_mem_rw_with_rand_reset.635471560 | Aug 29 12:27:02 AM UTC 24 | Aug 29 12:27:08 AM UTC 24 | 224197184 ps | ||
| T267 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_errors.752255422 | Aug 29 12:27:04 AM UTC 24 | Aug 29 12:27:08 AM UTC 24 | 127588507 ps | ||
| T268 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_errors.17396368 | Aug 29 12:27:01 AM UTC 24 | Aug 29 12:27:08 AM UTC 24 | 222785298 ps | ||
| T590 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_intg_err.775155898 | Aug 29 12:27:04 AM UTC 24 | Aug 29 12:27:09 AM UTC 24 | 427244233 ps | ||
| T593 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_intg_err.3247012519 | Aug 29 12:27:04 AM UTC 24 | Aug 29 12:27:10 AM UTC 24 | 1148683531 ps | ||
| T3823 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_intg_err.1546318545 | Aug 29 12:27:01 AM UTC 24 | Aug 29 12:27:10 AM UTC 24 | 889292922 ps | ||
| T332 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_intr_test.3394543597 | Aug 29 12:27:08 AM UTC 24 | Aug 29 12:27:11 AM UTC 24 | 43024250 ps | ||
| T3824 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_bit_bash.2716495587 | Aug 29 12:26:58 AM UTC 24 | Aug 29 12:27:11 AM UTC 24 | 2871007310 ps | ||
| T331 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_intr_test.1899908653 | Aug 29 12:27:10 AM UTC 24 | Aug 29 12:27:11 AM UTC 24 | 29046779 ps | ||
| T334 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_intr_test.3757106369 | Aug 29 12:27:03 AM UTC 24 | Aug 29 12:27:12 AM UTC 24 | 38912210 ps | ||
| T3825 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_same_csr_outstanding.3485497372 | Aug 29 12:27:08 AM UTC 24 | Aug 29 12:27:12 AM UTC 24 | 92336630 ps | ||
| T3826 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_same_csr_outstanding.4100152963 | Aug 29 12:27:08 AM UTC 24 | Aug 29 12:27:12 AM UTC 24 | 212066457 ps | ||
| T3827 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_rw.2846067351 | Aug 29 12:27:07 AM UTC 24 | Aug 29 12:27:12 AM UTC 24 | 44242677 ps | ||
| T3828 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_mem_rw_with_rand_reset.2080557867 | Aug 29 12:27:08 AM UTC 24 | Aug 29 12:27:12 AM UTC 24 | 166491414 ps | ||
| T3829 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_intr_test.2772023602 | Aug 29 12:27:07 AM UTC 24 | Aug 29 12:27:12 AM UTC 24 | 78077672 ps | ||
| T3830 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_mem_rw_with_rand_reset.2388453763 | Aug 29 12:27:08 AM UTC 24 | Aug 29 12:27:12 AM UTC 24 | 189902321 ps | ||
| T269 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_errors.2045808398 | Aug 29 12:27:09 AM UTC 24 | Aug 29 12:27:12 AM UTC 24 | 62281106 ps | ||
| T3831 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_rw.1329337656 | Aug 29 12:27:03 AM UTC 24 | Aug 29 12:27:12 AM UTC 24 | 90990589 ps | ||
| T3832 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_errors.2131840314 | Aug 29 12:27:08 AM UTC 24 | Aug 29 12:27:13 AM UTC 24 | 126275544 ps | ||
| T3833 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_same_csr_outstanding.961039038 | Aug 29 12:27:07 AM UTC 24 | Aug 29 12:27:13 AM UTC 24 | 113685463 ps | ||
| T3834 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_errors.4139895330 | Aug 29 12:27:07 AM UTC 24 | Aug 29 12:27:13 AM UTC 24 | 67810303 ps | ||
| T3835 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_intg_err.854548138 | Aug 29 12:27:08 AM UTC 24 | Aug 29 12:27:13 AM UTC 24 | 478629204 ps | ||
| T3836 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_intg_err.3641085134 | Aug 29 12:27:09 AM UTC 24 | Aug 29 12:27:14 AM UTC 24 | 464028252 ps | ||
| T3837 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_errors.2401912666 | Aug 29 12:27:07 AM UTC 24 | Aug 29 12:27:14 AM UTC 24 | 213344753 ps | ||
| T591 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_intg_err.4175254736 | Aug 29 12:27:08 AM UTC 24 | Aug 29 12:27:14 AM UTC 24 | 753042888 ps | ||
| T3838 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_intg_err.2001647889 | Aug 29 12:27:03 AM UTC 24 | Aug 29 12:27:15 AM UTC 24 | 665538736 ps | ||
| T3839 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_intr_test.2359400592 | Aug 29 12:27:13 AM UTC 24 | Aug 29 12:27:16 AM UTC 24 | 45584495 ps | ||
| T3840 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_intr_test.1481557685 | Aug 29 12:27:14 AM UTC 24 | Aug 29 12:27:16 AM UTC 24 | 37194959 ps | ||
| T3841 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_rw.2493454277 | Aug 29 12:27:13 AM UTC 24 | Aug 29 12:27:16 AM UTC 24 | 121858530 ps | ||
| T3842 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_rw.3862640142 | Aug 29 12:27:14 AM UTC 24 | Aug 29 12:27:16 AM UTC 24 | 46281619 ps | ||
| T594 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_intg_err.2107509621 | Aug 29 12:27:07 AM UTC 24 | Aug 29 12:27:17 AM UTC 24 | 1327960579 ps | ||
| T3843 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_errors.571331724 | Aug 29 12:27:13 AM UTC 24 | Aug 29 12:27:17 AM UTC 24 | 94240242 ps | ||
| T3844 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_rw.1523976364 | Aug 29 12:27:12 AM UTC 24 | Aug 29 12:27:17 AM UTC 24 | 57335534 ps | ||
| T3845 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_same_csr_outstanding.1655787374 | Aug 29 12:27:13 AM UTC 24 | Aug 29 12:27:17 AM UTC 24 | 184097787 ps | ||
| T3846 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_same_csr_outstanding.1806923182 | Aug 29 12:27:12 AM UTC 24 | Aug 29 12:27:17 AM UTC 24 | 137331149 ps | ||
| T3847 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_intr_test.3210105765 | Aug 29 12:27:12 AM UTC 24 | Aug 29 12:27:17 AM UTC 24 | 83986048 ps | ||
| T3848 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_mem_rw_with_rand_reset.3710858670 | Aug 29 12:27:12 AM UTC 24 | Aug 29 12:27:17 AM UTC 24 | 89217310 ps | ||
| T3849 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_mem_rw_with_rand_reset.3781635141 | Aug 29 12:27:12 AM UTC 24 | Aug 29 12:27:17 AM UTC 24 | 76918259 ps | ||
| T3850 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_mem_rw_with_rand_reset.4112261658 | Aug 29 12:27:13 AM UTC 24 | Aug 29 12:27:17 AM UTC 24 | 172738640 ps | ||
| T3851 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_errors.1983099458 | Aug 29 12:27:13 AM UTC 24 | Aug 29 12:27:18 AM UTC 24 | 189778592 ps | ||
| T3852 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_same_csr_outstanding.2106729276 | Aug 29 12:27:13 AM UTC 24 | Aug 29 12:27:18 AM UTC 24 | 249073259 ps | ||
| T3853 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_same_csr_outstanding.3556335840 | Aug 29 12:27:16 AM UTC 24 | Aug 29 12:27:18 AM UTC 24 | 84233819 ps | ||
| T3854 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_mem_rw_with_rand_reset.3158398074 | Aug 29 12:27:13 AM UTC 24 | Aug 29 12:27:18 AM UTC 24 | 128248732 ps | ||
| T3855 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_intr_test.662634363 | Aug 29 12:27:13 AM UTC 24 | Aug 29 12:27:18 AM UTC 24 | 68209650 ps | ||
| T3856 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_same_csr_outstanding.3739931792 | Aug 29 12:27:12 AM UTC 24 | Aug 29 12:27:18 AM UTC 24 | 493969280 ps | ||
| T3857 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_intg_err.2107948121 | Aug 29 12:27:13 AM UTC 24 | Aug 29 12:27:18 AM UTC 24 | 545154486 ps | ||
| T595 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_intg_err.386113435 | Aug 29 12:27:12 AM UTC 24 | Aug 29 12:27:18 AM UTC 24 | 420041323 ps | ||
| T3858 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_mem_rw_with_rand_reset.474731331 | Aug 29 12:27:06 AM UTC 24 | Aug 29 12:27:18 AM UTC 24 | 126309685 ps | ||
| T3859 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_rw.1153313363 | Aug 29 12:27:13 AM UTC 24 | Aug 29 12:27:18 AM UTC 24 | 64423610 ps | ||
| T3860 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_errors.498466872 | Aug 29 12:27:14 AM UTC 24 | Aug 29 12:27:18 AM UTC 24 | 93939106 ps | ||
| T3861 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_errors.719147127 | Aug 29 12:27:03 AM UTC 24 | Aug 29 12:27:23 AM UTC 24 | 110823771 ps | ||
| T3862 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_errors.4203848742 | Aug 29 12:27:02 AM UTC 24 | Aug 29 12:27:19 AM UTC 24 | 254436330 ps | ||
| T3863 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_errors.3709550360 | Aug 29 12:27:12 AM UTC 24 | Aug 29 12:27:19 AM UTC 24 | 241027075 ps | ||
| T3864 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_rw.426915711 | Aug 29 12:27:17 AM UTC 24 | Aug 29 12:27:19 AM UTC 24 | 130431478 ps | ||
| T3865 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_intr_test.3341404398 | Aug 29 12:27:17 AM UTC 24 | Aug 29 12:27:19 AM UTC 24 | 49706931 ps | ||
| T598 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_intg_err.1791255454 | Aug 29 12:27:14 AM UTC 24 | Aug 29 12:27:19 AM UTC 24 | 607133956 ps | ||
| T3866 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_mem_rw_with_rand_reset.4262908518 | Aug 29 12:27:17 AM UTC 24 | Aug 29 12:27:20 AM UTC 24 | 102856821 ps | ||
| T3867 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_mem_rw_with_rand_reset.2080561397 | Aug 29 12:27:07 AM UTC 24 | Aug 29 12:27:20 AM UTC 24 | 55963280 ps | ||
| T3868 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/23.usbdev_intr_test.1839577170 | Aug 29 12:27:18 AM UTC 24 | Aug 29 12:27:21 AM UTC 24 | 61286011 ps | ||
| T3869 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/24.usbdev_intr_test.3652313023 | Aug 29 12:27:18 AM UTC 24 | Aug 29 12:27:21 AM UTC 24 | 42845626 ps | ||
| T3870 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/22.usbdev_intr_test.396366390 | Aug 29 12:27:18 AM UTC 24 | Aug 29 12:27:21 AM UTC 24 | 29555080 ps | ||
| T3871 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/25.usbdev_intr_test.2579744403 | Aug 29 12:27:18 AM UTC 24 | Aug 29 12:27:21 AM UTC 24 | 43816178 ps | ||
| T599 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_intg_err.831682248 | Aug 29 12:27:17 AM UTC 24 | Aug 29 12:27:24 AM UTC 24 | 2164153589 ps | ||
| T3872 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/21.usbdev_intr_test.2975409450 | Aug 29 12:27:18 AM UTC 24 | Aug 29 12:27:21 AM UTC 24 | 45874497 ps | ||
| T3873 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_same_csr_outstanding.4208566006 | Aug 29 12:27:18 AM UTC 24 | Aug 29 12:27:21 AM UTC 24 | 101254223 ps | ||
| T3874 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/27.usbdev_intr_test.509010521 | Aug 29 12:27:18 AM UTC 24 | Aug 29 12:27:21 AM UTC 24 | 75107472 ps | ||
| T3875 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/29.usbdev_intr_test.3544199895 | Aug 29 12:27:18 AM UTC 24 | Aug 29 12:27:21 AM UTC 24 | 63264628 ps | ||
| T3876 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/26.usbdev_intr_test.2581616167 | Aug 29 12:27:18 AM UTC 24 | Aug 29 12:27:21 AM UTC 24 | 72625656 ps | ||
| T597 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_intg_err.3165659103 | Aug 29 12:27:13 AM UTC 24 | Aug 29 12:27:21 AM UTC 24 | 2283326572 ps | ||
| T3877 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/30.usbdev_intr_test.1004208118 | Aug 29 12:27:19 AM UTC 24 | Aug 29 12:27:21 AM UTC 24 | 53324559 ps | ||
| T3878 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_errors.2209517734 | Aug 29 12:27:17 AM UTC 24 | Aug 29 12:27:21 AM UTC 24 | 328336972 ps | ||
| T3879 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/33.usbdev_intr_test.1343612595 | Aug 29 12:27:19 AM UTC 24 | Aug 29 12:27:21 AM UTC 24 | 40224343 ps | ||
| T3880 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/28.usbdev_intr_test.3665108302 | Aug 29 12:27:18 AM UTC 24 | Aug 29 12:27:21 AM UTC 24 | 80741939 ps | ||
| T3881 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/38.usbdev_intr_test.3650203250 | Aug 29 12:27:20 AM UTC 24 | Aug 29 12:27:21 AM UTC 24 | 37278367 ps | ||
| T600 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_intg_err.3908657388 | Aug 29 12:27:03 AM UTC 24 | Aug 29 12:27:24 AM UTC 24 | 558790064 ps | ||
| T3882 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/32.usbdev_intr_test.3508513961 | Aug 29 12:27:19 AM UTC 24 | Aug 29 12:27:21 AM UTC 24 | 43739642 ps | ||
| T3883 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/36.usbdev_intr_test.3702938697 | Aug 29 12:27:20 AM UTC 24 | Aug 29 12:27:21 AM UTC 24 | 35126642 ps | ||
| T3884 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/34.usbdev_intr_test.2184857888 | Aug 29 12:27:19 AM UTC 24 | Aug 29 12:27:21 AM UTC 24 | 28375917 ps | ||
| T3885 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/31.usbdev_intr_test.1011623585 | Aug 29 12:27:19 AM UTC 24 | Aug 29 12:27:21 AM UTC 24 | 42594520 ps | ||
| T3886 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/37.usbdev_intr_test.3495669260 | Aug 29 12:27:20 AM UTC 24 | Aug 29 12:27:21 AM UTC 24 | 51513911 ps | ||
| T3887 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/35.usbdev_intr_test.2052883556 | Aug 29 12:27:20 AM UTC 24 | Aug 29 12:27:22 AM UTC 24 | 73048647 ps | ||
| T3888 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/40.usbdev_intr_test.1453146473 | Aug 29 12:27:20 AM UTC 24 | Aug 29 12:27:22 AM UTC 24 | 33729272 ps | ||
| T3889 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_errors.2580845800 | Aug 29 12:27:00 AM UTC 24 | Aug 29 12:27:24 AM UTC 24 | 240448165 ps | ||
| T3890 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/41.usbdev_intr_test.787689052 | Aug 29 12:27:20 AM UTC 24 | Aug 29 12:27:22 AM UTC 24 | 59802024 ps | ||
| T3891 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/39.usbdev_intr_test.2641985695 | Aug 29 12:27:20 AM UTC 24 | Aug 29 12:27:22 AM UTC 24 | 49955486 ps | ||
| T3892 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_rw.670615624 | Aug 29 12:27:00 AM UTC 24 | Aug 29 12:27:22 AM UTC 24 | 84839526 ps | ||
| T3893 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_same_csr_outstanding.1713282378 | Aug 29 12:27:03 AM UTC 24 | Aug 29 12:27:22 AM UTC 24 | 133438560 ps | ||
| T3894 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_mem_rw_with_rand_reset.2743523845 | Aug 29 12:27:00 AM UTC 24 | Aug 29 12:27:23 AM UTC 24 | 129555518 ps | ||
| T3895 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_same_csr_outstanding.1694881002 | Aug 29 12:27:00 AM UTC 24 | Aug 29 12:27:23 AM UTC 24 | 223959902 ps | ||
| T596 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_intg_err.3542331416 | Aug 29 12:27:00 AM UTC 24 | Aug 29 12:27:24 AM UTC 24 | 470460115 ps | ||
| T3896 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/43.usbdev_intr_test.3651880227 | Aug 29 12:27:21 AM UTC 24 | Aug 29 12:27:26 AM UTC 24 | 46328437 ps | ||
| T3897 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/42.usbdev_intr_test.1071693487 | Aug 29 12:27:21 AM UTC 24 | Aug 29 12:27:26 AM UTC 24 | 54711362 ps | ||
| T3898 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/47.usbdev_intr_test.694385754 | Aug 29 12:27:22 AM UTC 24 | Aug 29 12:27:27 AM UTC 24 | 38010376 ps | ||
| T3899 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/49.usbdev_intr_test.1963228105 | Aug 29 12:27:22 AM UTC 24 | Aug 29 12:27:27 AM UTC 24 | 44584515 ps | ||
| T3900 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/20.usbdev_intr_test.602434025 | Aug 29 12:27:18 AM UTC 24 | Aug 29 12:27:27 AM UTC 24 | 44262036 ps | ||
| T3901 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/48.usbdev_intr_test.2787648953 | Aug 29 12:27:22 AM UTC 24 | Aug 29 12:27:27 AM UTC 24 | 46940742 ps | ||
| T3902 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/46.usbdev_intr_test.1061494660 | Aug 29 12:27:22 AM UTC 24 | Aug 29 12:27:27 AM UTC 24 | 31934368 ps | ||
| T3903 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/45.usbdev_intr_test.611336328 | Aug 29 12:27:22 AM UTC 24 | Aug 29 12:27:27 AM UTC 24 | 62924736 ps | ||
| T3904 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_mem_rw_with_rand_reset.588996541 | Aug 29 12:27:18 AM UTC 24 | Aug 29 12:27:30 AM UTC 24 | 99617152 ps | ||
| T3905 | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/44.usbdev_intr_test.489383371 | Aug 29 12:27:21 AM UTC 24 | Aug 29 12:27:30 AM UTC 24 | 51094523 ps |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_restore.3106566934 |
| Short name | T21 |
| Test name | |
| Test status | |
| Simulation time | 1078478620 ps |
| CPU time | 5.32 seconds |
| Started | Aug 29 03:27:26 AM UTC 24 |
| Finished | Aug 29 03:27:32 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3106566934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_data_toggle_restore.3106566934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_reset.1655286630 |
| Short name | T7 |
| Test name | |
| Test status | |
| Simulation time | 18557205320 ps |
| CPU time | 22.9 seconds |
| Started | Aug 29 03:27:19 AM UTC 24 |
| Finished | Aug 29 03:27:43 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1655286630 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_reset.1655286630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_device_address.329731943 |
| Short name | T64 |
| Test name | |
| Test status | |
| Simulation time | 34151543468 ps |
| CPU time | 86.61 seconds |
| Started | Aug 29 03:27:26 AM UTC 24 |
| Finished | Aug 29 03:28:54 AM UTC 24 |
| Peak memory | 217348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=329731943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 0.usbdev_device_address.329731943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_fifo_rst.1304939885 |
| Short name | T29 |
| Test name | |
| Test status | |
| Simulation time | 505390863 ps |
| CPU time | 5.03 seconds |
| Started | Aug 29 03:27:35 AM UTC 24 |
| Finished | Aug 29 03:27:42 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1304939885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_fifo_rst.1304939885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_intr_test.1303679156 |
| Short name | T232 |
| Test name | |
| Test status | |
| Simulation time | 37305066 ps |
| CPU time | 0.74 seconds |
| Started | Aug 29 12:26:55 AM UTC 24 |
| Finished | Aug 29 12:26:56 AM UTC 24 |
| Peak memory | 216720 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1303679156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_intr_test.1303679156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_low_speed_traffic.1552417782 |
| Short name | T178 |
| Test name | |
| Test status | |
| Simulation time | 3837834170 ps |
| CPU time | 104.59 seconds |
| Started | Aug 29 03:27:56 AM UTC 24 |
| Finished | Aug 29 03:29:42 AM UTC 24 |
| Peak memory | 229728 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1552417782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_low_speed_traffic.1552417782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_intg_err.764553065 |
| Short name | T223 |
| Test name | |
| Test status | |
| Simulation time | 952872353 ps |
| CPU time | 3.35 seconds |
| Started | Aug 29 12:26:49 AM UTC 24 |
| Finished | Aug 29 12:26:54 AM UTC 24 |
| Peak memory | 216548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=764553065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_tl_intg_err.764553065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_max_non_iso_usb_traffic.2598449207 |
| Short name | T6 |
| Test name | |
| Test status | |
| Simulation time | 2549851838 ps |
| CPU time | 24.87 seconds |
| Started | Aug 29 03:28:02 AM UTC 24 |
| Finished | Aug 29 03:28:28 AM UTC 24 |
| Peak memory | 217424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2598449207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_non_iso_usb_traffic.2598449207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_resume.3643581630 |
| Short name | T12 |
| Test name | |
| Test status | |
| Simulation time | 31133332843 ps |
| CPU time | 92.21 seconds |
| Started | Aug 29 03:28:35 AM UTC 24 |
| Finished | Aug 29 03:30:09 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3643581630 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_resume.3643581630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_disconnect.2707263722 |
| Short name | T96 |
| Test name | |
| Test status | |
| Simulation time | 4338057787 ps |
| CPU time | 16.08 seconds |
| Started | Aug 29 03:32:52 AM UTC 24 |
| Finished | Aug 29 03:33:09 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2707263722 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_disconnect.2707263722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_osc_test_mode.2653688923 |
| Short name | T201 |
| Test name | |
| Test status | |
| Simulation time | 334792132 ps |
| CPU time | 1.97 seconds |
| Started | Aug 29 03:28:20 AM UTC 24 |
| Finished | Aug 29 03:28:23 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2653688923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_tx_osc_test _mode_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_tx_osc_test_mode.2653688923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_phy_config_tx_osc_test_mode/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_sec_cm.2476977434 |
| Short name | T219 |
| Test name | |
| Test status | |
| Simulation time | 681409825 ps |
| CPU time | 2.83 seconds |
| Started | Aug 29 03:28:32 AM UTC 24 |
| Finished | Aug 29 03:28:36 AM UTC 24 |
| Peak memory | 251476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2476977434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_sec_cm.2476977434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_disconnected.3922615181 |
| Short name | T19 |
| Test name | |
| Test status | |
| Simulation time | 148123803 ps |
| CPU time | 1.39 seconds |
| Started | Aug 29 03:27:29 AM UTC 24 |
| Finished | Aug 29 03:27:32 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3922615181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_disconnected.3922615181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_phy_pins_sense.902546386 |
| Short name | T25 |
| Test name | |
| Test status | |
| Simulation time | 47948724 ps |
| CPU time | 1.15 seconds |
| Started | Aug 29 03:28:22 AM UTC 24 |
| Finished | Aug 29 03:28:24 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=902546386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 0.usbdev_phy_pins_sense.902546386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_intr_test.2903964770 |
| Short name | T330 |
| Test name | |
| Test status | |
| Simulation time | 45518981 ps |
| CPU time | 0.66 seconds |
| Started | Aug 29 12:27:04 AM UTC 24 |
| Finished | Aug 29 12:27:06 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2903964770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_intr_test.2903964770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_errors.389791261 |
| Short name | T271 |
| Test name | |
| Test status | |
| Simulation time | 180152911 ps |
| CPU time | 1.71 seconds |
| Started | Aug 29 12:26:58 AM UTC 24 |
| Finished | Aug 29 12:27:01 AM UTC 24 |
| Peak memory | 216736 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=389791261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 3.usbdev_tl_errors.389791261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_timeout_missing_host_handshake.527958098 |
| Short name | T59 |
| Test name | |
| Test status | |
| Simulation time | 1439619337 ps |
| CPU time | 29.39 seconds |
| Started | Aug 29 03:27:28 AM UTC 24 |
| Finished | Aug 29 03:27:59 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=527958098 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_timeout_missing_host_handshake.527958098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_types.3164149782 |
| Short name | T24 |
| Test name | |
| Test status | |
| Simulation time | 440767199 ps |
| CPU time | 2.64 seconds |
| Started | Aug 29 03:27:33 AM UTC 24 |
| Finished | Aug 29 03:27:37 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3164149782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_endpoint_types.3164149782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_buffer.272160079 |
| Short name | T91 |
| Test name | |
| Test status | |
| Simulation time | 18745223483 ps |
| CPU time | 54.99 seconds |
| Started | Aug 29 03:28:23 AM UTC 24 |
| Finished | Aug 29 03:29:19 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=272160079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_pkt_buffer.272160079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_tx_rx_disruption.1004010163 |
| Short name | T206 |
| Test name | |
| Test status | |
| Simulation time | 533538882 ps |
| CPU time | 2.82 seconds |
| Started | Aug 29 03:34:21 AM UTC 24 |
| Finished | Aug 29 03:34:25 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1004010163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_tx _rx_disruption.1004010163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_resume_link_active.2814024567 |
| Short name | T67 |
| Test name | |
| Test status | |
| Simulation time | 20231091291 ps |
| CPU time | 32.5 seconds |
| Started | Aug 29 03:28:25 AM UTC 24 |
| Finished | Aug 29 03:28:59 AM UTC 24 |
| Peak memory | 217148 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2814024567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 0.usbdev_resume_link_active.2814024567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_reset.116166794 |
| Short name | T10 |
| Test name | |
| Test status | |
| Simulation time | 15461362648 ps |
| CPU time | 46.34 seconds |
| Started | Aug 29 03:28:35 AM UTC 24 |
| Finished | Aug 29 03:29:22 AM UTC 24 |
| Peak memory | 227452 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=116166794 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_reset.116166794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_tx_rx_disruption.3180755862 |
| Short name | T122 |
| Test name | |
| Test status | |
| Simulation time | 653455539 ps |
| CPU time | 1.76 seconds |
| Started | Aug 29 03:44:39 AM UTC 24 |
| Finished | Aug 29 03:44:43 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3180755862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_t x_rx_disruption.3180755862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/102.usbdev_tx_rx_disruption.844066269 |
| Short name | T3338 |
| Test name | |
| Test status | |
| Simulation time | 444755485 ps |
| CPU time | 1.51 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:11 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=844066269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 102.usbdev_t x_rx_disruption.844066269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/102.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/106.usbdev_tx_rx_disruption.2026676906 |
| Short name | T253 |
| Test name | |
| Test status | |
| Simulation time | 524439428 ps |
| CPU time | 1.8 seconds |
| Started | Aug 29 04:05:09 AM UTC 24 |
| Finished | Aug 29 04:05:12 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2026676906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 106.usbdev_ tx_rx_disruption.2026676906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/106.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_stress_usb_traffic.3561073702 |
| Short name | T79 |
| Test name | |
| Test status | |
| Simulation time | 7203101675 ps |
| CPU time | 110.26 seconds |
| Started | Aug 29 03:28:32 AM UTC 24 |
| Finished | Aug 29 03:30:25 AM UTC 24 |
| Peak memory | 229592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3561073702 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stress_usb_traffic.3561073702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_device_address.3076112469 |
| Short name | T117 |
| Test name | |
| Test status | |
| Simulation time | 39553563589 ps |
| CPU time | 111.28 seconds |
| Started | Aug 29 03:29:57 AM UTC 24 |
| Finished | Aug 29 03:31:51 AM UTC 24 |
| Peak memory | 217452 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3076112469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_device_address.3076112469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_rw.417220915 |
| Short name | T300 |
| Test name | |
| Test status | |
| Simulation time | 89712828 ps |
| CPU time | 1.52 seconds |
| Started | Aug 29 12:26:52 AM UTC 24 |
| Finished | Aug 29 12:26:58 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=417220915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_rw.417220915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_rx_full.2239611508 |
| Short name | T53 |
| Test name | |
| Test status | |
| Simulation time | 264196801 ps |
| CPU time | 1.64 seconds |
| Started | Aug 29 03:30:36 AM UTC 24 |
| Finished | Aug 29 03:30:39 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2239611508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 2.usbdev_rx_full.2239611508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_intr_test.2789078497 |
| Short name | T333 |
| Test name | |
| Test status | |
| Simulation time | 31964139 ps |
| CPU time | 0.92 seconds |
| Started | Aug 29 12:27:01 AM UTC 24 |
| Finished | Aug 29 12:27:07 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2789078497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_intr_test.2789078497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_device_address.4121035485 |
| Short name | T602 |
| Test name | |
| Test status | |
| Simulation time | 27693037134 ps |
| CPU time | 59.4 seconds |
| Started | Aug 29 03:35:03 AM UTC 24 |
| Finished | Aug 29 03:36:04 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4121035485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_device_address.4121035485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/55.usbdev_endpoint_types.2101301976 |
| Short name | T456 |
| Test name | |
| Test status | |
| Simulation time | 717770188 ps |
| CPU time | 1.55 seconds |
| Started | Aug 29 04:02:42 AM UTC 24 |
| Finished | Aug 29 04:02:45 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2101301976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 55.usbdev_endpoint_types.2101301976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/55.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_rand_bus_type.3431528859 |
| Short name | T44 |
| Test name | |
| Test status | |
| Simulation time | 219590931 ps |
| CPU time | 1.72 seconds |
| Started | Aug 29 03:28:19 AM UTC 24 |
| Finished | Aug 29 03:28:22 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3431528859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 0.usbdev_phy_config_rand_bus_type.3431528859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/195.usbdev_endpoint_types.4221648709 |
| Short name | T526 |
| Test name | |
| Test status | |
| Simulation time | 807843197 ps |
| CPU time | 1.98 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:21 AM UTC 24 |
| Peak memory | 214916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4221648709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 195.usbdev_endpoint_types.4221648709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/195.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/77.usbdev_endpoint_types.1439538529 |
| Short name | T436 |
| Test name | |
| Test status | |
| Simulation time | 610275469 ps |
| CPU time | 1.43 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:56 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1439538529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 77.usbdev_endpoint_types.1439538529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/77.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_bitstuff_err.3422587203 |
| Short name | T17 |
| Test name | |
| Test status | |
| Simulation time | 155633485 ps |
| CPU time | 1.48 seconds |
| Started | Aug 29 03:27:25 AM UTC 24 |
| Finished | Aug 29 03:27:27 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3422587203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_bitstuff_err.3422587203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_endpoint_types.1446426137 |
| Short name | T444 |
| Test name | |
| Test status | |
| Simulation time | 786444981 ps |
| CPU time | 1.76 seconds |
| Started | Aug 29 03:57:39 AM UTC 24 |
| Finished | Aug 29 03:57:42 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1446426137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_endpoint_types.1446426137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_rx_crc_err.3149020043 |
| Short name | T74 |
| Test name | |
| Test status | |
| Simulation time | 138052730 ps |
| CPU time | 0.95 seconds |
| Started | Aug 29 03:28:26 AM UTC 24 |
| Finished | Aug 29 03:28:28 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3149020043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_rx_crc_err.3149020043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/158.usbdev_endpoint_types.1202444321 |
| Short name | T548 |
| Test name | |
| Test status | |
| Simulation time | 976359871 ps |
| CPU time | 2.14 seconds |
| Started | Aug 29 04:08:58 AM UTC 24 |
| Finished | Aug 29 04:09:01 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1202444321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 158.usbdev_endpoint_types.1202444321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/158.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/61.usbdev_endpoint_types.1288928925 |
| Short name | T515 |
| Test name | |
| Test status | |
| Simulation time | 487659739 ps |
| CPU time | 1.34 seconds |
| Started | Aug 29 04:02:43 AM UTC 24 |
| Finished | Aug 29 04:02:46 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1288928925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 61.usbdev_endpoint_types.1288928925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/61.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_link_resume.1102289346 |
| Short name | T66 |
| Test name | |
| Test status | |
| Simulation time | 13519585787 ps |
| CPU time | 27.93 seconds |
| Started | Aug 29 03:27:54 AM UTC 24 |
| Finished | Aug 29 03:28:23 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1102289346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_link_resume.1102289346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_link_out_err.3985214491 |
| Short name | T70 |
| Test name | |
| Test status | |
| Simulation time | 541333400 ps |
| CPU time | 2.42 seconds |
| Started | Aug 29 03:27:51 AM UTC 24 |
| Finished | Aug 29 03:27:54 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3985214491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_link_out_err.3985214491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_link_out_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_endpoint_types.66100232 |
| Short name | T517 |
| Test name | |
| Test status | |
| Simulation time | 524937760 ps |
| CPU time | 1.37 seconds |
| Started | Aug 29 03:40:41 AM UTC 24 |
| Finished | Aug 29 03:40:43 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=66100232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 21.usbdev_endpoint_types.66100232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_data_toggle_restore.641012410 |
| Short name | T1897 |
| Test name | |
| Test status | |
| Simulation time | 846217194 ps |
| CPU time | 2.24 seconds |
| Started | Aug 29 03:42:31 AM UTC 24 |
| Finished | Aug 29 03:42:35 AM UTC 24 |
| Peak memory | 216960 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=641012410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_data_toggle_restore.641012410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_endpoint_types.709154663 |
| Short name | T537 |
| Test name | |
| Test status | |
| Simulation time | 479262672 ps |
| CPU time | 1.31 seconds |
| Started | Aug 29 03:49:22 AM UTC 24 |
| Finished | Aug 29 03:49:24 AM UTC 24 |
| Peak memory | 214736 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=709154663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 35.usbdev_endpoint_types.709154663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/83.usbdev_endpoint_types.3992237339 |
| Short name | T472 |
| Test name | |
| Test status | |
| Simulation time | 523317168 ps |
| CPU time | 1.57 seconds |
| Started | Aug 29 04:03:54 AM UTC 24 |
| Finished | Aug 29 04:03:57 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3992237339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 83.usbdev_endpoint_types.3992237339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/83.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_device_address.3832964246 |
| Short name | T1859 |
| Test name | |
| Test status | |
| Simulation time | 48606681054 ps |
| CPU time | 79 seconds |
| Started | Aug 29 03:41:01 AM UTC 24 |
| Finished | Aug 29 03:42:22 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3832964246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_device_address.3832964246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_low_speed_traffic.785631760 |
| Short name | T249 |
| Test name | |
| Test status | |
| Simulation time | 5440980761 ps |
| CPU time | 53.22 seconds |
| Started | Aug 29 03:29:09 AM UTC 24 |
| Finished | Aug 29 03:30:04 AM UTC 24 |
| Peak memory | 229604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=785631760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_low_speed_traffic.785631760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_intg_err.2301925368 |
| Short name | T265 |
| Test name | |
| Test status | |
| Simulation time | 652404365 ps |
| CPU time | 3.98 seconds |
| Started | Aug 29 12:26:55 AM UTC 24 |
| Finished | Aug 29 12:27:00 AM UTC 24 |
| Peak memory | 217340 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2301925368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_tl_intg_err.2301925368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/117.usbdev_endpoint_types.408304071 |
| Short name | T459 |
| Test name | |
| Test status | |
| Simulation time | 590546765 ps |
| CPU time | 1.49 seconds |
| Started | Aug 29 04:06:24 AM UTC 24 |
| Finished | Aug 29 04:06:27 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=408304071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 117.usbdev_endpoint_types.408304071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/117.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_fifo_levels.1353933049 |
| Short name | T244 |
| Test name | |
| Test status | |
| Simulation time | 283792093 ps |
| CPU time | 1.77 seconds |
| Started | Aug 29 03:34:35 AM UTC 24 |
| Finished | Aug 29 03:34:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1353933049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_fifo_levels.1353933049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_stress_usb_traffic.2731127531 |
| Short name | T113 |
| Test name | |
| Test status | |
| Simulation time | 6395281448 ps |
| CPU time | 169.74 seconds |
| Started | Aug 29 03:32:49 AM UTC 24 |
| Finished | Aug 29 03:35:42 AM UTC 24 |
| Peak memory | 229784 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2731127531 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stress_usb_traffic.2731127531 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_intr_test.2976342737 |
| Short name | T230 |
| Test name | |
| Test status | |
| Simulation time | 43088012 ps |
| CPU time | 0.66 seconds |
| Started | Aug 29 12:27:08 AM UTC 24 |
| Finished | Aug 29 12:27:11 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2976342737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_intr_test.2976342737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority.3899546638 |
| Short name | T49 |
| Test name | |
| Test status | |
| Simulation time | 374341305 ps |
| CPU time | 2.45 seconds |
| Started | Aug 29 03:28:27 AM UTC 24 |
| Finished | Aug 29 03:28:31 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3899546638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_setup_priority.3899546638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_endpoint_types.2508739961 |
| Short name | T514 |
| Test name | |
| Test status | |
| Simulation time | 421838395 ps |
| CPU time | 1.71 seconds |
| Started | Aug 29 03:37:15 AM UTC 24 |
| Finished | Aug 29 03:37:18 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2508739961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_endpoint_types.2508739961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/159.usbdev_endpoint_types.1981152916 |
| Short name | T482 |
| Test name | |
| Test status | |
| Simulation time | 604285010 ps |
| CPU time | 1.55 seconds |
| Started | Aug 29 04:08:58 AM UTC 24 |
| Finished | Aug 29 04:09:01 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1981152916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 159.usbdev_endpoint_types.1981152916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/159.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/160.usbdev_endpoint_types.1811956990 |
| Short name | T530 |
| Test name | |
| Test status | |
| Simulation time | 470480794 ps |
| CPU time | 1.29 seconds |
| Started | Aug 29 04:08:58 AM UTC 24 |
| Finished | Aug 29 04:09:01 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1811956990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 160.usbdev_endpoint_types.1811956990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/160.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/191.usbdev_endpoint_types.59699238 |
| Short name | T559 |
| Test name | |
| Test status | |
| Simulation time | 393611381 ps |
| CPU time | 1.21 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:21 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=59699238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 191.usbdev_endpoint_types.59699238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/191.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_endpoint_types.1012409913 |
| Short name | T479 |
| Test name | |
| Test status | |
| Simulation time | 473859549 ps |
| CPU time | 1.39 seconds |
| Started | Aug 29 03:58:37 AM UTC 24 |
| Finished | Aug 29 03:58:39 AM UTC 24 |
| Peak memory | 214892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1012409913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_endpoint_types.1012409913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_nak_trans.3295230125 |
| Short name | T72 |
| Test name | |
| Test status | |
| Simulation time | 209504640 ps |
| CPU time | 1.77 seconds |
| Started | Aug 29 03:28:14 AM UTC 24 |
| Finished | Aug 29 03:28:16 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3295230125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_nak_trans.3295230125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_alert_test.1940016384 |
| Short name | T213 |
| Test name | |
| Test status | |
| Simulation time | 32967496 ps |
| CPU time | 1.01 seconds |
| Started | Aug 29 03:29:49 AM UTC 24 |
| Finished | Aug 29 03:29:52 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1940016384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 1.usbdev_alert_test.1940016384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_errors.2401912666 |
| Short name | T3837 |
| Test name | |
| Test status | |
| Simulation time | 213344753 ps |
| CPU time | 2.74 seconds |
| Started | Aug 29 12:27:07 AM UTC 24 |
| Finished | Aug 29 12:27:14 AM UTC 24 |
| Peak memory | 227660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2401912666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_tl_errors.2401912666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_device_address.4285825335 |
| Short name | T1666 |
| Test name | |
| Test status | |
| Simulation time | 20911065479 ps |
| CPU time | 35.86 seconds |
| Started | Aug 29 03:40:00 AM UTC 24 |
| Finished | Aug 29 03:40:38 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4285825335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_device_address.4285825335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_received.4134535709 |
| Short name | T429 |
| Test name | |
| Test status | |
| Simulation time | 168959251 ps |
| CPU time | 1.57 seconds |
| Started | Aug 29 03:28:23 AM UTC 24 |
| Finished | Aug 29 03:28:25 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4134535709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_pkt_received.4134535709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/111.usbdev_endpoint_types.878050004 |
| Short name | T486 |
| Test name | |
| Test status | |
| Simulation time | 779300752 ps |
| CPU time | 1.67 seconds |
| Started | Aug 29 04:06:24 AM UTC 24 |
| Finished | Aug 29 04:06:27 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=878050004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 111.usbdev_endpoint_types.878050004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/111.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/122.usbdev_endpoint_types.1429524950 |
| Short name | T570 |
| Test name | |
| Test status | |
| Simulation time | 332575804 ps |
| CPU time | 1.11 seconds |
| Started | Aug 29 04:06:25 AM UTC 24 |
| Finished | Aug 29 04:06:27 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1429524950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 122.usbdev_endpoint_types.1429524950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/122.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_max_usb_traffic.3491684734 |
| Short name | T609 |
| Test name | |
| Test status | |
| Simulation time | 2811681374 ps |
| CPU time | 39.79 seconds |
| Started | Aug 29 03:33:17 AM UTC 24 |
| Finished | Aug 29 03:33:58 AM UTC 24 |
| Peak memory | 229688 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3491684734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_usb_traffic.3491684734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_endpoint_types.498205693 |
| Short name | T463 |
| Test name | |
| Test status | |
| Simulation time | 566047405 ps |
| CPU time | 2.87 seconds |
| Started | Aug 29 03:35:06 AM UTC 24 |
| Finished | Aug 29 03:35:10 AM UTC 24 |
| Peak memory | 217036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=498205693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 8.usbdev_endpoint_types.498205693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/96.usbdev_endpoint_types.1779363052 |
| Short name | T499 |
| Test name | |
| Test status | |
| Simulation time | 369162986 ps |
| CPU time | 1.09 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:11 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1779363052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 96.usbdev_endpoint_types.1779363052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/96.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_fifo_levels.1280891447 |
| Short name | T241 |
| Test name | |
| Test status | |
| Simulation time | 147663416 ps |
| CPU time | 1.05 seconds |
| Started | Aug 29 03:37:15 AM UTC 24 |
| Finished | Aug 29 03:37:17 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1280891447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_fifo_levels.1280891447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_av_overflow.59155813 |
| Short name | T16 |
| Test name | |
| Test status | |
| Simulation time | 146385917 ps |
| CPU time | 1.31 seconds |
| Started | Aug 29 03:27:23 AM UTC 24 |
| Finished | Aug 29 03:27:26 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=59155813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_av_overflow.59155813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_device_address.3834201848 |
| Short name | T195 |
| Test name | |
| Test status | |
| Simulation time | 31125275877 ps |
| CPU time | 58 seconds |
| Started | Aug 29 03:30:54 AM UTC 24 |
| Finished | Aug 29 03:31:54 AM UTC 24 |
| Peak memory | 217280 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3834201848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_device_address.3834201848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_intg_err.2107509621 |
| Short name | T594 |
| Test name | |
| Test status | |
| Simulation time | 1327960579 ps |
| CPU time | 5.75 seconds |
| Started | Aug 29 12:27:07 AM UTC 24 |
| Finished | Aug 29 12:27:17 AM UTC 24 |
| Peak memory | 217408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2107509621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_tl_intg_err.2107509621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_intg_err.831682248 |
| Short name | T599 |
| Test name | |
| Test status | |
| Simulation time | 2164153589 ps |
| CPU time | 6.12 seconds |
| Started | Aug 29 12:27:17 AM UTC 24 |
| Finished | Aug 29 12:27:24 AM UTC 24 |
| Peak memory | 217544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=831682248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_tl_intg_err.831682248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_dpi_config_host.2039799697 |
| Short name | T161 |
| Test name | |
| Test status | |
| Simulation time | 5127704265 ps |
| CPU time | 55.7 seconds |
| Started | Aug 29 03:27:30 AM UTC 24 |
| Finished | Aug 29 03:28:27 AM UTC 24 |
| Peak memory | 227560 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2039799697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_dpi_config_host_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_dpi_config_host.2039799697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_dpi_config_host/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/121.usbdev_endpoint_types.2919670954 |
| Short name | T492 |
| Test name | |
| Test status | |
| Simulation time | 857490148 ps |
| CPU time | 1.99 seconds |
| Started | Aug 29 04:06:25 AM UTC 24 |
| Finished | Aug 29 04:06:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2919670954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 121.usbdev_endpoint_types.2919670954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/121.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/131.usbdev_endpoint_types.1242835874 |
| Short name | T484 |
| Test name | |
| Test status | |
| Simulation time | 421361756 ps |
| CPU time | 1.18 seconds |
| Started | Aug 29 04:06:25 AM UTC 24 |
| Finished | Aug 29 04:06:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1242835874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 131.usbdev_endpoint_types.1242835874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/131.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/174.usbdev_endpoint_types.4209334717 |
| Short name | T478 |
| Test name | |
| Test status | |
| Simulation time | 448110848 ps |
| CPU time | 1.55 seconds |
| Started | Aug 29 04:08:59 AM UTC 24 |
| Finished | Aug 29 04:09:02 AM UTC 24 |
| Peak memory | 214688 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4209334717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 174.usbdev_endpoint_types.4209334717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/174.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/185.usbdev_endpoint_types.3142302406 |
| Short name | T3481 |
| Test name | |
| Test status | |
| Simulation time | 437576096 ps |
| CPU time | 1.21 seconds |
| Started | Aug 29 04:10:17 AM UTC 24 |
| Finished | Aug 29 04:10:20 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3142302406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 185.usbdev_endpoint_types.3142302406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/185.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_endpoint_types.1505193645 |
| Short name | T544 |
| Test name | |
| Test status | |
| Simulation time | 363104469 ps |
| CPU time | 1.11 seconds |
| Started | Aug 29 03:41:23 AM UTC 24 |
| Finished | Aug 29 03:41:26 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1505193645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_endpoint_types.1505193645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_endpoint_types.2289228101 |
| Short name | T445 |
| Test name | |
| Test status | |
| Simulation time | 602293355 ps |
| CPU time | 2.1 seconds |
| Started | Aug 29 03:43:18 AM UTC 24 |
| Finished | Aug 29 03:43:21 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2289228101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_endpoint_types.2289228101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_stress_usb_traffic.3110170329 |
| Short name | T82 |
| Test name | |
| Test status | |
| Simulation time | 4980059608 ps |
| CPU time | 63.28 seconds |
| Started | Aug 29 03:30:44 AM UTC 24 |
| Finished | Aug 29 03:31:49 AM UTC 24 |
| Peak memory | 227548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3110170329 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stress_usb_traffic.3110170329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_rand_suspends.3610133961 |
| Short name | T209 |
| Test name | |
| Test status | |
| Simulation time | 5312143082 ps |
| CPU time | 33.63 seconds |
| Started | Aug 29 03:30:34 AM UTC 24 |
| Finished | Aug 29 03:31:09 AM UTC 24 |
| Peak memory | 234236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3610133961 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_suspends.3610133961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_resume.3097871235 |
| Short name | T14 |
| Test name | |
| Test status | |
| Simulation time | 30287527094 ps |
| CPU time | 66.57 seconds |
| Started | Aug 29 03:29:52 AM UTC 24 |
| Finished | Aug 29 03:31:00 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3097871235 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_resume.3097871235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_sync.91764166 |
| Short name | T4 |
| Test name | |
| Test status | |
| Simulation time | 2991232570 ps |
| CPU time | 35.02 seconds |
| Started | Aug 29 03:27:44 AM UTC 24 |
| Finished | Aug 29 03:28:20 AM UTC 24 |
| Peak memory | 229712 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=91764166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traf fic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 0.usbdev_invalid_sync.91764166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_phy_pins_sense.684716917 |
| Short name | T1148 |
| Test name | |
| Test status | |
| Simulation time | 69255742 ps |
| CPU time | 1.13 seconds |
| Started | Aug 29 03:36:40 AM UTC 24 |
| Finished | Aug 29 03:36:43 AM UTC 24 |
| Peak memory | 214824 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=684716917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 11.usbdev_phy_pins_sense.684716917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_intr_test.2772023602 |
| Short name | T3829 |
| Test name | |
| Test status | |
| Simulation time | 78077672 ps |
| CPU time | 1.09 seconds |
| Started | Aug 29 12:27:07 AM UTC 24 |
| Finished | Aug 29 12:27:12 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2772023602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_intr_test.2772023602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_fifo_levels.234477877 |
| Short name | T23 |
| Test name | |
| Test status | |
| Simulation time | 312053026 ps |
| CPU time | 2.08 seconds |
| Started | Aug 29 03:27:33 AM UTC 24 |
| Finished | Aug 29 03:27:37 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=234477877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_fifo_levels.234477877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_freq_phase.2507115420 |
| Short name | T641 |
| Test name | |
| Test status | |
| Simulation time | 85194936125 ps |
| CPU time | 186.59 seconds |
| Started | Aug 29 03:27:42 AM UTC 24 |
| Finished | Aug 29 03:30:52 AM UTC 24 |
| Peak memory | 217356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2507115420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_freq_phase.2507115420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_rx_full.672680622 |
| Short name | T51 |
| Test name | |
| Test status | |
| Simulation time | 329970865 ps |
| CPU time | 2.34 seconds |
| Started | Aug 29 03:28:27 AM UTC 24 |
| Finished | Aug 29 03:28:31 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=672680622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 0.usbdev_rx_full.672680622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_setup_trans_ignored.861132247 |
| Short name | T247 |
| Test name | |
| Test status | |
| Simulation time | 195056576 ps |
| CPU time | 1.46 seconds |
| Started | Aug 29 03:28:29 AM UTC 24 |
| Finished | Aug 29 03:28:31 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=861132247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 0.usbdev_setup_trans_ignored.861132247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_stall_priority_over_nak.2348658564 |
| Short name | T432 |
| Test name | |
| Test status | |
| Simulation time | 177939812 ps |
| CPU time | 1.48 seconds |
| Started | Aug 29 03:28:31 AM UTC 24 |
| Finished | Aug 29 03:28:33 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2348658564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stall_priority_over_nak.2348658564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_types.623780059 |
| Short name | T115 |
| Test name | |
| Test status | |
| Simulation time | 470165701 ps |
| CPU time | 2.51 seconds |
| Started | Aug 29 03:28:47 AM UTC 24 |
| Finished | Aug 29 03:28:50 AM UTC 24 |
| Peak memory | 217036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=623780059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 1.usbdev_endpoint_types.623780059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_fifo_levels.153779047 |
| Short name | T240 |
| Test name | |
| Test status | |
| Simulation time | 268124007 ps |
| CPU time | 1.92 seconds |
| Started | Aug 29 03:36:05 AM UTC 24 |
| Finished | Aug 29 03:36:08 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=153779047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 10.usbdev_fifo_levels.153779047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/100.usbdev_fifo_levels.548135255 |
| Short name | T414 |
| Test name | |
| Test status | |
| Simulation time | 270303463 ps |
| CPU time | 1.48 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:11 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=548135255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 100.usbdev_fifo_levels.548135255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/100.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/101.usbdev_fifo_levels.2979075062 |
| Short name | T385 |
| Test name | |
| Test status | |
| Simulation time | 279737127 ps |
| CPU time | 1.4 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:11 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2979075062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 101.usbdev_fifo_levels.2979075062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/101.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/102.usbdev_fifo_levels.1098706573 |
| Short name | T409 |
| Test name | |
| Test status | |
| Simulation time | 326835354 ps |
| CPU time | 1.48 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:11 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1098706573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 102.usbdev_fifo_levels.1098706573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/102.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/103.usbdev_fifo_levels.905471874 |
| Short name | T358 |
| Test name | |
| Test status | |
| Simulation time | 258703076 ps |
| CPU time | 1.03 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:11 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=905471874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 103.usbdev_fifo_levels.905471874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/103.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/104.usbdev_fifo_levels.2590667539 |
| Short name | T3334 |
| Test name | |
| Test status | |
| Simulation time | 312786019 ps |
| CPU time | 1.15 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:11 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2590667539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 104.usbdev_fifo_levels.2590667539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/104.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/105.usbdev_fifo_levels.3322442112 |
| Short name | T421 |
| Test name | |
| Test status | |
| Simulation time | 263456920 ps |
| CPU time | 0.98 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:11 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3322442112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 105.usbdev_fifo_levels.3322442112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/105.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/106.usbdev_fifo_levels.1553187625 |
| Short name | T411 |
| Test name | |
| Test status | |
| Simulation time | 292544525 ps |
| CPU time | 1.11 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:11 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1553187625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 106.usbdev_fifo_levels.1553187625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/106.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/108.usbdev_endpoint_types.2429975573 |
| Short name | T504 |
| Test name | |
| Test status | |
| Simulation time | 702370364 ps |
| CPU time | 1.59 seconds |
| Started | Aug 29 04:05:09 AM UTC 24 |
| Finished | Aug 29 04:05:12 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2429975573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 108.usbdev_endpoint_types.2429975573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/108.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/108.usbdev_fifo_levels.1228967499 |
| Short name | T417 |
| Test name | |
| Test status | |
| Simulation time | 156998295 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 04:05:09 AM UTC 24 |
| Finished | Aug 29 04:05:11 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1228967499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 108.usbdev_fifo_levels.1228967499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/108.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_data_toggle_restore.717819377 |
| Short name | T630 |
| Test name | |
| Test status | |
| Simulation time | 1273307911 ps |
| CPU time | 4.93 seconds |
| Started | Aug 29 03:36:26 AM UTC 24 |
| Finished | Aug 29 03:36:32 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=717819377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_data_toggle_restore.717819377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_fifo_levels.3296662878 |
| Short name | T349 |
| Test name | |
| Test status | |
| Simulation time | 239747993 ps |
| CPU time | 1.89 seconds |
| Started | Aug 29 03:36:28 AM UTC 24 |
| Finished | Aug 29 03:36:31 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3296662878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_fifo_levels.3296662878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/113.usbdev_fifo_levels.3012277390 |
| Short name | T388 |
| Test name | |
| Test status | |
| Simulation time | 324979464 ps |
| CPU time | 1.06 seconds |
| Started | Aug 29 04:06:24 AM UTC 24 |
| Finished | Aug 29 04:06:26 AM UTC 24 |
| Peak memory | 216100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3012277390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 113.usbdev_fifo_levels.3012277390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/113.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/118.usbdev_fifo_levels.2540865451 |
| Short name | T399 |
| Test name | |
| Test status | |
| Simulation time | 179490107 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 04:06:24 AM UTC 24 |
| Finished | Aug 29 04:06:27 AM UTC 24 |
| Peak memory | 216820 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2540865451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 118.usbdev_fifo_levels.2540865451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/118.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_fifo_levels.1471823338 |
| Short name | T246 |
| Test name | |
| Test status | |
| Simulation time | 157744282 ps |
| CPU time | 1.07 seconds |
| Started | Aug 29 03:36:48 AM UTC 24 |
| Finished | Aug 29 03:36:50 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1471823338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_fifo_levels.1471823338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/122.usbdev_fifo_levels.3433453661 |
| Short name | T347 |
| Test name | |
| Test status | |
| Simulation time | 269774928 ps |
| CPU time | 0.99 seconds |
| Started | Aug 29 04:06:25 AM UTC 24 |
| Finished | Aug 29 04:06:27 AM UTC 24 |
| Peak memory | 215028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3433453661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 122.usbdev_fifo_levels.3433453661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/122.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/127.usbdev_fifo_levels.3328090011 |
| Short name | T376 |
| Test name | |
| Test status | |
| Simulation time | 268424939 ps |
| CPU time | 0.98 seconds |
| Started | Aug 29 04:06:25 AM UTC 24 |
| Finished | Aug 29 04:06:27 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3328090011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 127.usbdev_fifo_levels.3328090011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/127.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/128.usbdev_fifo_levels.1601808739 |
| Short name | T3373 |
| Test name | |
| Test status | |
| Simulation time | 176282399 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 04:06:25 AM UTC 24 |
| Finished | Aug 29 04:06:27 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1601808739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 128.usbdev_fifo_levels.1601808739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/128.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/129.usbdev_fifo_levels.4141897556 |
| Short name | T374 |
| Test name | |
| Test status | |
| Simulation time | 252712335 ps |
| CPU time | 0.99 seconds |
| Started | Aug 29 04:06:25 AM UTC 24 |
| Finished | Aug 29 04:06:28 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4141897556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 129.usbdev_fifo_levels.4141897556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/129.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/134.usbdev_fifo_levels.4015078977 |
| Short name | T402 |
| Test name | |
| Test status | |
| Simulation time | 295012490 ps |
| CPU time | 1 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:41 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4015078977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 134.usbdev_fifo_levels.4015078977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/134.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/137.usbdev_fifo_levels.632874310 |
| Short name | T336 |
| Test name | |
| Test status | |
| Simulation time | 314394092 ps |
| CPU time | 1.06 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:41 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=632874310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 137.usbdev_fifo_levels.632874310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/137.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_endpoint_types.1302448712 |
| Short name | T513 |
| Test name | |
| Test status | |
| Simulation time | 332817581 ps |
| CPU time | 1.26 seconds |
| Started | Aug 29 03:37:39 AM UTC 24 |
| Finished | Aug 29 03:37:42 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1302448712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_endpoint_types.1302448712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_fifo_levels.1727137701 |
| Short name | T382 |
| Test name | |
| Test status | |
| Simulation time | 147174820 ps |
| CPU time | 0.93 seconds |
| Started | Aug 29 03:37:39 AM UTC 24 |
| Finished | Aug 29 03:37:41 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1727137701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_fifo_levels.1727137701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/141.usbdev_fifo_levels.2570317190 |
| Short name | T3408 |
| Test name | |
| Test status | |
| Simulation time | 264195633 ps |
| CPU time | 0.98 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2570317190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 141.usbdev_fifo_levels.2570317190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/141.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/142.usbdev_fifo_levels.2840461036 |
| Short name | T363 |
| Test name | |
| Test status | |
| Simulation time | 285391569 ps |
| CPU time | 1.25 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2840461036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 142.usbdev_fifo_levels.2840461036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/142.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/143.usbdev_endpoint_types.1834960935 |
| Short name | T533 |
| Test name | |
| Test status | |
| Simulation time | 664647681 ps |
| CPU time | 1.56 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1834960935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 143.usbdev_endpoint_types.1834960935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/143.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/148.usbdev_fifo_levels.2368051394 |
| Short name | T3423 |
| Test name | |
| Test status | |
| Simulation time | 300512049 ps |
| CPU time | 1.3 seconds |
| Started | Aug 29 04:07:40 AM UTC 24 |
| Finished | Aug 29 04:07:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2368051394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 148.usbdev_fifo_levels.2368051394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/148.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/149.usbdev_endpoint_types.807501544 |
| Short name | T519 |
| Test name | |
| Test status | |
| Simulation time | 365098336 ps |
| CPU time | 1.37 seconds |
| Started | Aug 29 04:07:40 AM UTC 24 |
| Finished | Aug 29 04:07:43 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=807501544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 149.usbdev_endpoint_types.807501544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/149.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/151.usbdev_fifo_levels.1954450393 |
| Short name | T345 |
| Test name | |
| Test status | |
| Simulation time | 269220720 ps |
| CPU time | 1.23 seconds |
| Started | Aug 29 04:07:40 AM UTC 24 |
| Finished | Aug 29 04:07:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1954450393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 151.usbdev_fifo_levels.1954450393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/151.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/153.usbdev_fifo_levels.3014035058 |
| Short name | T428 |
| Test name | |
| Test status | |
| Simulation time | 255447322 ps |
| CPU time | 1.11 seconds |
| Started | Aug 29 04:07:40 AM UTC 24 |
| Finished | Aug 29 04:07:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3014035058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 153.usbdev_fifo_levels.3014035058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/153.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/154.usbdev_endpoint_types.2608612002 |
| Short name | T480 |
| Test name | |
| Test status | |
| Simulation time | 572998137 ps |
| CPU time | 1.42 seconds |
| Started | Aug 29 04:08:58 AM UTC 24 |
| Finished | Aug 29 04:09:00 AM UTC 24 |
| Peak memory | 214752 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2608612002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 154.usbdev_endpoint_types.2608612002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/154.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/159.usbdev_fifo_levels.758783499 |
| Short name | T3437 |
| Test name | |
| Test status | |
| Simulation time | 284410096 ps |
| CPU time | 1.01 seconds |
| Started | Aug 29 04:08:58 AM UTC 24 |
| Finished | Aug 29 04:09:00 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=758783499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 159.usbdev_fifo_levels.758783499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/159.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/168.usbdev_endpoint_types.1433573510 |
| Short name | T485 |
| Test name | |
| Test status | |
| Simulation time | 477273677 ps |
| CPU time | 1.71 seconds |
| Started | Aug 29 04:08:59 AM UTC 24 |
| Finished | Aug 29 04:09:02 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1433573510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 168.usbdev_endpoint_types.1433573510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/168.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/175.usbdev_endpoint_types.2793919581 |
| Short name | T487 |
| Test name | |
| Test status | |
| Simulation time | 680104696 ps |
| CPU time | 1.89 seconds |
| Started | Aug 29 04:08:59 AM UTC 24 |
| Finished | Aug 29 04:09:02 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2793919581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 175.usbdev_endpoint_types.2793919581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/175.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_fifo_levels.1498933843 |
| Short name | T378 |
| Test name | |
| Test status | |
| Simulation time | 325008032 ps |
| CPU time | 1.87 seconds |
| Started | Aug 29 03:30:05 AM UTC 24 |
| Finished | Aug 29 03:30:08 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1498933843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_fifo_levels.1498933843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_fifo_levels.24830908 |
| Short name | T404 |
| Test name | |
| Test status | |
| Simulation time | 246343721 ps |
| CPU time | 1.03 seconds |
| Started | Aug 29 03:40:00 AM UTC 24 |
| Finished | Aug 29 03:40:03 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=24830908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_fifo_levels.24830908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_low_speed_traffic.1575387400 |
| Short name | T613 |
| Test name | |
| Test status | |
| Simulation time | 5042506022 ps |
| CPU time | 128.46 seconds |
| Started | Aug 29 03:41:43 AM UTC 24 |
| Finished | Aug 29 03:43:54 AM UTC 24 |
| Peak memory | 229820 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1575387400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_low_speed_traffic.1575387400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_endpoint_types.1876530668 |
| Short name | T588 |
| Test name | |
| Test status | |
| Simulation time | 222902457 ps |
| CPU time | 0.92 seconds |
| Started | Aug 29 03:42:07 AM UTC 24 |
| Finished | Aug 29 03:42:09 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1876530668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_endpoint_types.1876530668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_fifo_levels.2414642304 |
| Short name | T424 |
| Test name | |
| Test status | |
| Simulation time | 276032833 ps |
| CPU time | 1.24 seconds |
| Started | Aug 29 03:43:18 AM UTC 24 |
| Finished | Aug 29 03:43:21 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2414642304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_fifo_levels.2414642304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_link_suspend.3983002357 |
| Short name | T640 |
| Test name | |
| Test status | |
| Simulation time | 10723142648 ps |
| CPU time | 11.68 seconds |
| Started | Aug 29 03:43:46 AM UTC 24 |
| Finished | Aug 29 03:43:59 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3983002357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_link_suspend.3983002357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_fifo_levels.3566741521 |
| Short name | T422 |
| Test name | |
| Test status | |
| Simulation time | 267540883 ps |
| CPU time | 1.48 seconds |
| Started | Aug 29 03:44:13 AM UTC 24 |
| Finished | Aug 29 03:44:16 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3566741521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_fifo_levels.3566741521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_endpoint_types.2022096572 |
| Short name | T458 |
| Test name | |
| Test status | |
| Simulation time | 691110481 ps |
| CPU time | 1.7 seconds |
| Started | Aug 29 03:52:16 AM UTC 24 |
| Finished | Aug 29 03:52:19 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2022096572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_endpoint_types.2022096572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_endpoint_types.1327971396 |
| Short name | T443 |
| Test name | |
| Test status | |
| Simulation time | 320642116 ps |
| CPU time | 1.07 seconds |
| Started | Aug 29 03:53:04 AM UTC 24 |
| Finished | Aug 29 03:53:06 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1327971396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_endpoint_types.1327971396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_fifo_levels.3034453293 |
| Short name | T352 |
| Test name | |
| Test status | |
| Simulation time | 155861338 ps |
| CPU time | 1.22 seconds |
| Started | Aug 29 03:33:04 AM UTC 24 |
| Finished | Aug 29 03:33:07 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3034453293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_fifo_levels.3034453293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/50.usbdev_fifo_levels.1988647745 |
| Short name | T412 |
| Test name | |
| Test status | |
| Simulation time | 293268602 ps |
| CPU time | 1.1 seconds |
| Started | Aug 29 04:02:42 AM UTC 24 |
| Finished | Aug 29 04:02:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1988647745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 50.usbdev_fifo_levels.1988647745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/50.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/55.usbdev_fifo_levels.1387431494 |
| Short name | T400 |
| Test name | |
| Test status | |
| Simulation time | 273627160 ps |
| CPU time | 1.17 seconds |
| Started | Aug 29 04:02:42 AM UTC 24 |
| Finished | Aug 29 04:02:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1387431494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 55.usbdev_fifo_levels.1387431494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/55.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/66.usbdev_fifo_levels.3013795293 |
| Short name | T335 |
| Test name | |
| Test status | |
| Simulation time | 349809175 ps |
| CPU time | 1.32 seconds |
| Started | Aug 29 04:03:52 AM UTC 24 |
| Finished | Aug 29 04:03:55 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3013795293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 66.usbdev_fifo_levels.3013795293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/66.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/71.usbdev_fifo_levels.2562100839 |
| Short name | T360 |
| Test name | |
| Test status | |
| Simulation time | 281698460 ps |
| CPU time | 1.05 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:55 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2562100839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 71.usbdev_fifo_levels.2562100839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/71.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/82.usbdev_fifo_levels.520117593 |
| Short name | T403 |
| Test name | |
| Test status | |
| Simulation time | 263103544 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 04:03:54 AM UTC 24 |
| Finished | Aug 29 04:03:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=520117593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 82.usbdev_fifo_levels.520117593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/82.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_usb_ref_disable.2522172373 |
| Short name | T216 |
| Test name | |
| Test status | |
| Simulation time | 185662930 ps |
| CPU time | 1.44 seconds |
| Started | Aug 29 03:28:21 AM UTC 24 |
| Finished | Aug 29 03:28:24 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2522172373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_usb_ref_disable.2522172373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_av_overflow.3071139038 |
| Short name | T61 |
| Test name | |
| Test status | |
| Simulation time | 135878020 ps |
| CPU time | 1.4 seconds |
| Started | Aug 29 03:29:54 AM UTC 24 |
| Finished | Aug 29 03:29:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3071139038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_av_overflow.3071139038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_av_empty.2330638431 |
| Short name | T2 |
| Test name | |
| Test status | |
| Simulation time | 179998227 ps |
| CPU time | 1.47 seconds |
| Started | Aug 29 03:27:22 AM UTC 24 |
| Finished | Aug 29 03:27:25 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2330638431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_av_empty.2330638431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_host_lost.1996883087 |
| Short name | T43 |
| Test name | |
| Test status | |
| Simulation time | 4196850179 ps |
| CPU time | 21.62 seconds |
| Started | Aug 29 03:27:42 AM UTC 24 |
| Finished | Aug 29 03:28:05 AM UTC 24 |
| Peak memory | 217356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1996883087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_host_lost_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_host_lost.1996883087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_host_lost/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_link_reset.3735822116 |
| Short name | T42 |
| Test name | |
| Test status | |
| Simulation time | 205738764 ps |
| CPU time | 1.4 seconds |
| Started | Aug 29 03:27:53 AM UTC 24 |
| Finished | Aug 29 03:27:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3735822116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_reset_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_link_reset.3735822116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_link_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_rx_pid_err.494953499 |
| Short name | T77 |
| Test name | |
| Test status | |
| Simulation time | 183175122 ps |
| CPU time | 1.63 seconds |
| Started | Aug 29 03:28:27 AM UTC 24 |
| Finished | Aug 29 03:28:30 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=494953499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_rx_pid_err.494953499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_av_empty.1460983910 |
| Short name | T56 |
| Test name | |
| Test status | |
| Simulation time | 145077404 ps |
| CPU time | 1.42 seconds |
| Started | Aug 29 03:28:37 AM UTC 24 |
| Finished | Aug 29 03:28:39 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1460983910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_av_empty.1460983910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/322.usbdev_tx_rx_disruption.178523268 |
| Short name | T120 |
| Test name | |
| Test status | |
| Simulation time | 608342760 ps |
| CPU time | 2.09 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:07 AM UTC 24 |
| Peak memory | 217040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=178523268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 322.usbdev_t x_rx_disruption.178523268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/322.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_errors.2804776582 |
| Short name | T222 |
| Test name | |
| Test status | |
| Simulation time | 79211625 ps |
| CPU time | 1.86 seconds |
| Started | Aug 29 12:26:49 AM UTC 24 |
| Finished | Aug 29 12:26:52 AM UTC 24 |
| Peak memory | 216660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2804776582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_tl_errors.2804776582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_intg_err.4175254736 |
| Short name | T591 |
| Test name | |
| Test status | |
| Simulation time | 753042888 ps |
| CPU time | 4.32 seconds |
| Started | Aug 29 12:27:08 AM UTC 24 |
| Finished | Aug 29 12:27:14 AM UTC 24 |
| Peak memory | 217356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4175254736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_tl_intg_err.4175254736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_nak_trans.2041880981 |
| Short name | T139 |
| Test name | |
| Test status | |
| Simulation time | 236674389 ps |
| CPU time | 1.64 seconds |
| Started | Aug 29 03:29:23 AM UTC 24 |
| Finished | Aug 29 03:29:26 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2041880981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_nak_trans.2041880981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_device_address.1193999133 |
| Short name | T625 |
| Test name | |
| Test status | |
| Simulation time | 25417928279 ps |
| CPU time | 51.08 seconds |
| Started | Aug 29 03:36:02 AM UTC 24 |
| Finished | Aug 29 03:36:54 AM UTC 24 |
| Peak memory | 217376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1193999133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_device_address.1193999133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_nak_trans.215330023 |
| Short name | T151 |
| Test name | |
| Test status | |
| Simulation time | 213424913 ps |
| CPU time | 1.66 seconds |
| Started | Aug 29 03:36:13 AM UTC 24 |
| Finished | Aug 29 03:36:16 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=215330023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_nak_trans.215330023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/105.usbdev_tx_rx_disruption.120254844 |
| Short name | T173 |
| Test name | |
| Test status | |
| Simulation time | 508149186 ps |
| CPU time | 1.72 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:12 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=120254844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 105.usbdev_t x_rx_disruption.120254844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/105.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_nak_trans.3718375338 |
| Short name | T155 |
| Test name | |
| Test status | |
| Simulation time | 244570743 ps |
| CPU time | 1.66 seconds |
| Started | Aug 29 03:36:35 AM UTC 24 |
| Finished | Aug 29 03:36:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3718375338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_nak_trans.3718375338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/110.usbdev_tx_rx_disruption.2574037039 |
| Short name | T3362 |
| Test name | |
| Test status | |
| Simulation time | 484416314 ps |
| CPU time | 1.69 seconds |
| Started | Aug 29 04:06:24 AM UTC 24 |
| Finished | Aug 29 04:06:27 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2574037039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 110.usbdev_ tx_rx_disruption.2574037039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/110.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_nak_trans.2391120818 |
| Short name | T130 |
| Test name | |
| Test status | |
| Simulation time | 179691249 ps |
| CPU time | 1.62 seconds |
| Started | Aug 29 03:36:56 AM UTC 24 |
| Finished | Aug 29 03:36:58 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2391120818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_nak_trans.2391120818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_nak_trans.1456358314 |
| Short name | T148 |
| Test name | |
| Test status | |
| Simulation time | 232583899 ps |
| CPU time | 1.5 seconds |
| Started | Aug 29 03:37:40 AM UTC 24 |
| Finished | Aug 29 03:37:43 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1456358314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_nak_trans.1456358314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_nak_trans.324316593 |
| Short name | T131 |
| Test name | |
| Test status | |
| Simulation time | 220053341 ps |
| CPU time | 1.06 seconds |
| Started | Aug 29 03:38:04 AM UTC 24 |
| Finished | Aug 29 03:38:07 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=324316593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_nak_trans.324316593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_nak_trans.345334343 |
| Short name | T133 |
| Test name | |
| Test status | |
| Simulation time | 230930069 ps |
| CPU time | 1.34 seconds |
| Started | Aug 29 03:38:24 AM UTC 24 |
| Finished | Aug 29 03:38:27 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=345334343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_nak_trans.345334343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_nak_trans.387338478 |
| Short name | T146 |
| Test name | |
| Test status | |
| Simulation time | 206099903 ps |
| CPU time | 1.47 seconds |
| Started | Aug 29 03:38:51 AM UTC 24 |
| Finished | Aug 29 03:38:54 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=387338478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_nak_trans.387338478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_phy_pins_sense.2545030837 |
| Short name | T39 |
| Test name | |
| Test status | |
| Simulation time | 34219980 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 03:38:52 AM UTC 24 |
| Finished | Aug 29 03:38:54 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2545030837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_phy_pins_sense.2545030837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_nak_trans.2399705322 |
| Short name | T137 |
| Test name | |
| Test status | |
| Simulation time | 229301207 ps |
| CPU time | 1.25 seconds |
| Started | Aug 29 03:39:46 AM UTC 24 |
| Finished | Aug 29 03:39:49 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2399705322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_nak_trans.2399705322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_nak_trans.4111162274 |
| Short name | T128 |
| Test name | |
| Test status | |
| Simulation time | 191926578 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 03:40:19 AM UTC 24 |
| Finished | Aug 29 03:40:21 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4111162274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_nak_trans.4111162274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_nak_trans.135432797 |
| Short name | T143 |
| Test name | |
| Test status | |
| Simulation time | 215474193 ps |
| CPU time | 1.22 seconds |
| Started | Aug 29 03:43:46 AM UTC 24 |
| Finished | Aug 29 03:43:49 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=135432797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_nak_trans.135432797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_aliasing.3511082998 |
| Short name | T305 |
| Test name | |
| Test status | |
| Simulation time | 342545457 ps |
| CPU time | 3.72 seconds |
| Started | Aug 29 12:26:52 AM UTC 24 |
| Finished | Aug 29 12:27:00 AM UTC 24 |
| Peak memory | 217000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3511082998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_aliasing.3511082998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_bit_bash.3838216490 |
| Short name | T3811 |
| Test name | |
| Test status | |
| Simulation time | 1547295244 ps |
| CPU time | 8.08 seconds |
| Started | Aug 29 12:26:52 AM UTC 24 |
| Finished | Aug 29 12:27:04 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3838216490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_bit_bash.3838216490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_hw_reset.4053341889 |
| Short name | T3799 |
| Test name | |
| Test status | |
| Simulation time | 72719497 ps |
| CPU time | 1.22 seconds |
| Started | Aug 29 12:26:52 AM UTC 24 |
| Finished | Aug 29 12:26:57 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4053341889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_hw_reset.4053341889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_mem_rw_with_rand_reset.2557760865 |
| Short name | T266 |
| Test name | |
| Test status | |
| Simulation time | 162497625 ps |
| CPU time | 2.41 seconds |
| Started | Aug 29 12:26:52 AM UTC 24 |
| Finished | Aug 29 12:26:59 AM UTC 24 |
| Peak memory | 227876 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2557760865 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_mem_rw_with_rand_reset.2557760865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_intr_test.1800641551 |
| Short name | T233 |
| Test name | |
| Test status | |
| Simulation time | 41065847 ps |
| CPU time | 0.72 seconds |
| Started | Aug 29 12:26:49 AM UTC 24 |
| Finished | Aug 29 12:26:52 AM UTC 24 |
| Peak memory | 216636 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1800641551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_intr_test.1800641551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_partial_access.3048794735 |
| Short name | T301 |
| Test name | |
| Test status | |
| Simulation time | 191060290 ps |
| CPU time | 2.26 seconds |
| Started | Aug 29 12:26:52 AM UTC 24 |
| Finished | Aug 29 12:26:58 AM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3048794735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_mem_partial_access.3048794735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_walk.53950919 |
| Short name | T3798 |
| Test name | |
| Test status | |
| Simulation time | 168327331 ps |
| CPU time | 3.68 seconds |
| Started | Aug 29 12:26:49 AM UTC 24 |
| Finished | Aug 29 12:26:54 AM UTC 24 |
| Peak memory | 216392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=53950919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/ cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_mem_walk.53950919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_same_csr_outstanding.2724846035 |
| Short name | T313 |
| Test name | |
| Test status | |
| Simulation time | 231430035 ps |
| CPU time | 1.86 seconds |
| Started | Aug 29 12:26:52 AM UTC 24 |
| Finished | Aug 29 12:26:58 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2724846035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_same_csr_outstanding.2724846035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_aliasing.3503618494 |
| Short name | T3801 |
| Test name | |
| Test status | |
| Simulation time | 161868801 ps |
| CPU time | 2.95 seconds |
| Started | Aug 29 12:26:53 AM UTC 24 |
| Finished | Aug 29 12:26:58 AM UTC 24 |
| Peak memory | 217456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3503618494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_aliasing.3503618494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_bit_bash.3274122303 |
| Short name | T311 |
| Test name | |
| Test status | |
| Simulation time | 1365691288 ps |
| CPU time | 7.43 seconds |
| Started | Aug 29 12:26:53 AM UTC 24 |
| Finished | Aug 29 12:27:03 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3274122303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_bit_bash.3274122303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_hw_reset.3026986938 |
| Short name | T234 |
| Test name | |
| Test status | |
| Simulation time | 161743567 ps |
| CPU time | 0.92 seconds |
| Started | Aug 29 12:26:53 AM UTC 24 |
| Finished | Aug 29 12:26:56 AM UTC 24 |
| Peak memory | 216876 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3026986938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_hw_reset.3026986938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_mem_rw_with_rand_reset.3587191141 |
| Short name | T256 |
| Test name | |
| Test status | |
| Simulation time | 147325852 ps |
| CPU time | 1.93 seconds |
| Started | Aug 29 12:26:55 AM UTC 24 |
| Finished | Aug 29 12:26:58 AM UTC 24 |
| Peak memory | 226948 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3587191141 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_mem_rw_with_rand_reset.3587191141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_rw.1453259622 |
| Short name | T257 |
| Test name | |
| Test status | |
| Simulation time | 69581625 ps |
| CPU time | 0.94 seconds |
| Started | Aug 29 12:26:53 AM UTC 24 |
| Finished | Aug 29 12:26:56 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1453259622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_rw.1453259622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_intr_test.3645471799 |
| Short name | T231 |
| Test name | |
| Test status | |
| Simulation time | 48299862 ps |
| CPU time | 0.63 seconds |
| Started | Aug 29 12:26:53 AM UTC 24 |
| Finished | Aug 29 12:26:56 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3645471799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_intr_test.3645471799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_partial_access.4244553685 |
| Short name | T299 |
| Test name | |
| Test status | |
| Simulation time | 58166764 ps |
| CPU time | 1.5 seconds |
| Started | Aug 29 12:26:53 AM UTC 24 |
| Finished | Aug 29 12:26:57 AM UTC 24 |
| Peak memory | 226880 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4244553685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_mem_partial_access.4244553685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_walk.1413390729 |
| Short name | T3800 |
| Test name | |
| Test status | |
| Simulation time | 273987647 ps |
| CPU time | 2.92 seconds |
| Started | Aug 29 12:26:53 AM UTC 24 |
| Finished | Aug 29 12:26:58 AM UTC 24 |
| Peak memory | 217476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1413390729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_mem_walk.1413390729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_same_csr_outstanding.2818743614 |
| Short name | T258 |
| Test name | |
| Test status | |
| Simulation time | 178325595 ps |
| CPU time | 1.52 seconds |
| Started | Aug 29 12:26:53 AM UTC 24 |
| Finished | Aug 29 12:26:57 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2818743614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_same_csr_outstanding.2818743614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_errors.2038265202 |
| Short name | T224 |
| Test name | |
| Test status | |
| Simulation time | 72230462 ps |
| CPU time | 2.01 seconds |
| Started | Aug 29 12:26:53 AM UTC 24 |
| Finished | Aug 29 12:26:57 AM UTC 24 |
| Peak memory | 217512 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2038265202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_tl_errors.2038265202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_intg_err.2523126497 |
| Short name | T262 |
| Test name | |
| Test status | |
| Simulation time | 755527455 ps |
| CPU time | 2.93 seconds |
| Started | Aug 29 12:26:53 AM UTC 24 |
| Finished | Aug 29 12:26:58 AM UTC 24 |
| Peak memory | 217432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2523126497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_tl_intg_err.2523126497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_mem_rw_with_rand_reset.474731331 |
| Short name | T3858 |
| Test name | |
| Test status | |
| Simulation time | 126309685 ps |
| CPU time | 1.67 seconds |
| Started | Aug 29 12:27:06 AM UTC 24 |
| Finished | Aug 29 12:27:18 AM UTC 24 |
| Peak memory | 226884 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=474731331 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_csr_mem_rw_with_rand_reset.474731331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_rw.769188581 |
| Short name | T3815 |
| Test name | |
| Test status | |
| Simulation time | 47598212 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 12:27:05 AM UTC 24 |
| Finished | Aug 29 12:27:06 AM UTC 24 |
| Peak memory | 216884 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=769188581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_csr_rw.769188581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_same_csr_outstanding.4233527725 |
| Short name | T3821 |
| Test name | |
| Test status | |
| Simulation time | 110244617 ps |
| CPU time | 1.39 seconds |
| Started | Aug 29 12:27:05 AM UTC 24 |
| Finished | Aug 29 12:27:07 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4233527725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_same_csr_outstanding.4233527725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_errors.752255422 |
| Short name | T267 |
| Test name | |
| Test status | |
| Simulation time | 127588507 ps |
| CPU time | 2.54 seconds |
| Started | Aug 29 12:27:04 AM UTC 24 |
| Finished | Aug 29 12:27:08 AM UTC 24 |
| Peak memory | 234676 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=752255422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 10.usbdev_tl_errors.752255422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_intg_err.775155898 |
| Short name | T590 |
| Test name | |
| Test status | |
| Simulation time | 427244233 ps |
| CPU time | 3.03 seconds |
| Started | Aug 29 12:27:04 AM UTC 24 |
| Finished | Aug 29 12:27:09 AM UTC 24 |
| Peak memory | 217496 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=775155898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_tl_intg_err.775155898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_mem_rw_with_rand_reset.2080561397 |
| Short name | T3867 |
| Test name | |
| Test status | |
| Simulation time | 55963280 ps |
| CPU time | 1.41 seconds |
| Started | Aug 29 12:27:07 AM UTC 24 |
| Finished | Aug 29 12:27:20 AM UTC 24 |
| Peak memory | 226828 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2080561397 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_csr_mem_rw_with_rand_reset.2080561397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_rw.2846067351 |
| Short name | T3827 |
| Test name | |
| Test status | |
| Simulation time | 44242677 ps |
| CPU time | 1.06 seconds |
| Started | Aug 29 12:27:07 AM UTC 24 |
| Finished | Aug 29 12:27:12 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2846067351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_csr_rw.2846067351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_same_csr_outstanding.961039038 |
| Short name | T3833 |
| Test name | |
| Test status | |
| Simulation time | 113685463 ps |
| CPU time | 1.49 seconds |
| Started | Aug 29 12:27:07 AM UTC 24 |
| Finished | Aug 29 12:27:13 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=961039038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_same_csr_outstanding.961039038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_errors.4139895330 |
| Short name | T3834 |
| Test name | |
| Test status | |
| Simulation time | 67810303 ps |
| CPU time | 2.07 seconds |
| Started | Aug 29 12:27:07 AM UTC 24 |
| Finished | Aug 29 12:27:13 AM UTC 24 |
| Peak memory | 234736 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4139895330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_tl_errors.4139895330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_mem_rw_with_rand_reset.2080557867 |
| Short name | T3828 |
| Test name | |
| Test status | |
| Simulation time | 166491414 ps |
| CPU time | 1.86 seconds |
| Started | Aug 29 12:27:08 AM UTC 24 |
| Finished | Aug 29 12:27:12 AM UTC 24 |
| Peak memory | 226880 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2080557867 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_csr_mem_rw_with_rand_reset.2080557867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_rw.731599201 |
| Short name | T324 |
| Test name | |
| Test status | |
| Simulation time | 71257174 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 12:27:08 AM UTC 24 |
| Finished | Aug 29 12:27:11 AM UTC 24 |
| Peak memory | 216884 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=731599201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_csr_rw.731599201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_same_csr_outstanding.4100152963 |
| Short name | T3826 |
| Test name | |
| Test status | |
| Simulation time | 212066457 ps |
| CPU time | 1.76 seconds |
| Started | Aug 29 12:27:08 AM UTC 24 |
| Finished | Aug 29 12:27:12 AM UTC 24 |
| Peak memory | 216956 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4100152963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_same_csr_outstanding.4100152963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_mem_rw_with_rand_reset.2388453763 |
| Short name | T3830 |
| Test name | |
| Test status | |
| Simulation time | 189902321 ps |
| CPU time | 1.89 seconds |
| Started | Aug 29 12:27:08 AM UTC 24 |
| Finished | Aug 29 12:27:12 AM UTC 24 |
| Peak memory | 226880 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2388453763 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_csr_mem_rw_with_rand_reset.2388453763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_rw.2795934612 |
| Short name | T303 |
| Test name | |
| Test status | |
| Simulation time | 62949633 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 12:27:08 AM UTC 24 |
| Finished | Aug 29 12:27:11 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2795934612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_csr_rw.2795934612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_intr_test.3394543597 |
| Short name | T332 |
| Test name | |
| Test status | |
| Simulation time | 43024250 ps |
| CPU time | 0.71 seconds |
| Started | Aug 29 12:27:08 AM UTC 24 |
| Finished | Aug 29 12:27:11 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3394543597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_intr_test.3394543597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_same_csr_outstanding.3485497372 |
| Short name | T3825 |
| Test name | |
| Test status | |
| Simulation time | 92336630 ps |
| CPU time | 1.34 seconds |
| Started | Aug 29 12:27:08 AM UTC 24 |
| Finished | Aug 29 12:27:12 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3485497372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_same_csr_outstanding.3485497372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_errors.2131840314 |
| Short name | T3832 |
| Test name | |
| Test status | |
| Simulation time | 126275544 ps |
| CPU time | 2.3 seconds |
| Started | Aug 29 12:27:08 AM UTC 24 |
| Finished | Aug 29 12:27:13 AM UTC 24 |
| Peak memory | 217612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2131840314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_tl_errors.2131840314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_intg_err.854548138 |
| Short name | T3835 |
| Test name | |
| Test status | |
| Simulation time | 478629204 ps |
| CPU time | 2.73 seconds |
| Started | Aug 29 12:27:08 AM UTC 24 |
| Finished | Aug 29 12:27:13 AM UTC 24 |
| Peak memory | 217508 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=854548138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_tl_intg_err.854548138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_mem_rw_with_rand_reset.3710858670 |
| Short name | T3848 |
| Test name | |
| Test status | |
| Simulation time | 89217310 ps |
| CPU time | 1.37 seconds |
| Started | Aug 29 12:27:12 AM UTC 24 |
| Finished | Aug 29 12:27:17 AM UTC 24 |
| Peak memory | 226868 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3710858670 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_csr_mem_rw_with_rand_reset.3710858670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_rw.1421500116 |
| Short name | T314 |
| Test name | |
| Test status | |
| Simulation time | 54438913 ps |
| CPU time | 0.69 seconds |
| Started | Aug 29 12:27:10 AM UTC 24 |
| Finished | Aug 29 12:27:11 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1421500116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_csr_rw.1421500116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_intr_test.1899908653 |
| Short name | T331 |
| Test name | |
| Test status | |
| Simulation time | 29046779 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 12:27:10 AM UTC 24 |
| Finished | Aug 29 12:27:11 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1899908653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_intr_test.1899908653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_same_csr_outstanding.3739931792 |
| Short name | T3856 |
| Test name | |
| Test status | |
| Simulation time | 493969280 ps |
| CPU time | 2.31 seconds |
| Started | Aug 29 12:27:12 AM UTC 24 |
| Finished | Aug 29 12:27:18 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3739931792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_same_csr_outstanding.3739931792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_errors.2045808398 |
| Short name | T269 |
| Test name | |
| Test status | |
| Simulation time | 62281106 ps |
| CPU time | 1.87 seconds |
| Started | Aug 29 12:27:09 AM UTC 24 |
| Finished | Aug 29 12:27:12 AM UTC 24 |
| Peak memory | 216728 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2045808398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_tl_errors.2045808398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_intg_err.3641085134 |
| Short name | T3836 |
| Test name | |
| Test status | |
| Simulation time | 464028252 ps |
| CPU time | 3 seconds |
| Started | Aug 29 12:27:09 AM UTC 24 |
| Finished | Aug 29 12:27:14 AM UTC 24 |
| Peak memory | 217420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3641085134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_tl_intg_err.3641085134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_mem_rw_with_rand_reset.3781635141 |
| Short name | T3849 |
| Test name | |
| Test status | |
| Simulation time | 76918259 ps |
| CPU time | 1.33 seconds |
| Started | Aug 29 12:27:12 AM UTC 24 |
| Finished | Aug 29 12:27:17 AM UTC 24 |
| Peak memory | 226804 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3781635141 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_csr_mem_rw_with_rand_reset.3781635141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_rw.1523976364 |
| Short name | T3844 |
| Test name | |
| Test status | |
| Simulation time | 57335534 ps |
| CPU time | 1.07 seconds |
| Started | Aug 29 12:27:12 AM UTC 24 |
| Finished | Aug 29 12:27:17 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1523976364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_csr_rw.1523976364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_intr_test.3210105765 |
| Short name | T3847 |
| Test name | |
| Test status | |
| Simulation time | 83986048 ps |
| CPU time | 1.2 seconds |
| Started | Aug 29 12:27:12 AM UTC 24 |
| Finished | Aug 29 12:27:17 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3210105765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_intr_test.3210105765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_same_csr_outstanding.1806923182 |
| Short name | T3846 |
| Test name | |
| Test status | |
| Simulation time | 137331149 ps |
| CPU time | 1.03 seconds |
| Started | Aug 29 12:27:12 AM UTC 24 |
| Finished | Aug 29 12:27:17 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1806923182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_same_csr_outstanding.1806923182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_errors.3709550360 |
| Short name | T3863 |
| Test name | |
| Test status | |
| Simulation time | 241027075 ps |
| CPU time | 2.86 seconds |
| Started | Aug 29 12:27:12 AM UTC 24 |
| Finished | Aug 29 12:27:19 AM UTC 24 |
| Peak memory | 234564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3709550360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_tl_errors.3709550360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_intg_err.386113435 |
| Short name | T595 |
| Test name | |
| Test status | |
| Simulation time | 420041323 ps |
| CPU time | 2.38 seconds |
| Started | Aug 29 12:27:12 AM UTC 24 |
| Finished | Aug 29 12:27:18 AM UTC 24 |
| Peak memory | 217404 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=386113435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_tl_intg_err.386113435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_mem_rw_with_rand_reset.3158398074 |
| Short name | T3854 |
| Test name | |
| Test status | |
| Simulation time | 128248732 ps |
| CPU time | 2.39 seconds |
| Started | Aug 29 12:27:13 AM UTC 24 |
| Finished | Aug 29 12:27:18 AM UTC 24 |
| Peak memory | 227920 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3158398074 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_csr_mem_rw_with_rand_reset.3158398074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_rw.1153313363 |
| Short name | T3859 |
| Test name | |
| Test status | |
| Simulation time | 64423610 ps |
| CPU time | 1.21 seconds |
| Started | Aug 29 12:27:13 AM UTC 24 |
| Finished | Aug 29 12:27:18 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1153313363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_csr_rw.1153313363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_intr_test.662634363 |
| Short name | T3855 |
| Test name | |
| Test status | |
| Simulation time | 68209650 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 12:27:13 AM UTC 24 |
| Finished | Aug 29 12:27:18 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=662634363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 16.usbdev_intr_test.662634363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_same_csr_outstanding.1655787374 |
| Short name | T3845 |
| Test name | |
| Test status | |
| Simulation time | 184097787 ps |
| CPU time | 1.79 seconds |
| Started | Aug 29 12:27:13 AM UTC 24 |
| Finished | Aug 29 12:27:17 AM UTC 24 |
| Peak memory | 216956 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1655787374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_same_csr_outstanding.1655787374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_errors.1983099458 |
| Short name | T3851 |
| Test name | |
| Test status | |
| Simulation time | 189778592 ps |
| CPU time | 2.33 seconds |
| Started | Aug 29 12:27:13 AM UTC 24 |
| Finished | Aug 29 12:27:18 AM UTC 24 |
| Peak memory | 217472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1983099458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_tl_errors.1983099458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_intg_err.3165659103 |
| Short name | T597 |
| Test name | |
| Test status | |
| Simulation time | 2283326572 ps |
| CPU time | 6.12 seconds |
| Started | Aug 29 12:27:13 AM UTC 24 |
| Finished | Aug 29 12:27:21 AM UTC 24 |
| Peak memory | 217548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3165659103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_tl_intg_err.3165659103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_mem_rw_with_rand_reset.4112261658 |
| Short name | T3850 |
| Test name | |
| Test status | |
| Simulation time | 172738640 ps |
| CPU time | 2.06 seconds |
| Started | Aug 29 12:27:13 AM UTC 24 |
| Finished | Aug 29 12:27:17 AM UTC 24 |
| Peak memory | 227908 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4112261658 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_csr_mem_rw_with_rand_reset.4112261658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_rw.2493454277 |
| Short name | T3841 |
| Test name | |
| Test status | |
| Simulation time | 121858530 ps |
| CPU time | 0.82 seconds |
| Started | Aug 29 12:27:13 AM UTC 24 |
| Finished | Aug 29 12:27:16 AM UTC 24 |
| Peak memory | 216584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2493454277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_csr_rw.2493454277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_intr_test.2359400592 |
| Short name | T3839 |
| Test name | |
| Test status | |
| Simulation time | 45584495 ps |
| CPU time | 0.75 seconds |
| Started | Aug 29 12:27:13 AM UTC 24 |
| Finished | Aug 29 12:27:16 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2359400592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_intr_test.2359400592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_same_csr_outstanding.2106729276 |
| Short name | T3852 |
| Test name | |
| Test status | |
| Simulation time | 249073259 ps |
| CPU time | 2.2 seconds |
| Started | Aug 29 12:27:13 AM UTC 24 |
| Finished | Aug 29 12:27:18 AM UTC 24 |
| Peak memory | 217548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2106729276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_same_csr_outstanding.2106729276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_errors.571331724 |
| Short name | T3843 |
| Test name | |
| Test status | |
| Simulation time | 94240242 ps |
| CPU time | 1.75 seconds |
| Started | Aug 29 12:27:13 AM UTC 24 |
| Finished | Aug 29 12:27:17 AM UTC 24 |
| Peak memory | 216728 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=571331724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 17.usbdev_tl_errors.571331724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_intg_err.2107948121 |
| Short name | T3857 |
| Test name | |
| Test status | |
| Simulation time | 545154486 ps |
| CPU time | 2.96 seconds |
| Started | Aug 29 12:27:13 AM UTC 24 |
| Finished | Aug 29 12:27:18 AM UTC 24 |
| Peak memory | 217704 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2107948121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_tl_intg_err.2107948121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_mem_rw_with_rand_reset.4262908518 |
| Short name | T3866 |
| Test name | |
| Test status | |
| Simulation time | 102856821 ps |
| CPU time | 2.05 seconds |
| Started | Aug 29 12:27:17 AM UTC 24 |
| Finished | Aug 29 12:27:20 AM UTC 24 |
| Peak memory | 229792 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4262908518 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_csr_mem_rw_with_rand_reset.4262908518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_rw.3862640142 |
| Short name | T3842 |
| Test name | |
| Test status | |
| Simulation time | 46281619 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 12:27:14 AM UTC 24 |
| Finished | Aug 29 12:27:16 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3862640142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_csr_rw.3862640142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_intr_test.1481557685 |
| Short name | T3840 |
| Test name | |
| Test status | |
| Simulation time | 37194959 ps |
| CPU time | 0.68 seconds |
| Started | Aug 29 12:27:14 AM UTC 24 |
| Finished | Aug 29 12:27:16 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1481557685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_intr_test.1481557685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_same_csr_outstanding.3556335840 |
| Short name | T3853 |
| Test name | |
| Test status | |
| Simulation time | 84233819 ps |
| CPU time | 1.14 seconds |
| Started | Aug 29 12:27:16 AM UTC 24 |
| Finished | Aug 29 12:27:18 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3556335840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_same_csr_outstanding.3556335840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_errors.498466872 |
| Short name | T3860 |
| Test name | |
| Test status | |
| Simulation time | 93939106 ps |
| CPU time | 2.84 seconds |
| Started | Aug 29 12:27:14 AM UTC 24 |
| Finished | Aug 29 12:27:18 AM UTC 24 |
| Peak memory | 227676 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=498466872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 18.usbdev_tl_errors.498466872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_intg_err.1791255454 |
| Short name | T598 |
| Test name | |
| Test status | |
| Simulation time | 607133956 ps |
| CPU time | 3.91 seconds |
| Started | Aug 29 12:27:14 AM UTC 24 |
| Finished | Aug 29 12:27:19 AM UTC 24 |
| Peak memory | 217484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1791255454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_tl_intg_err.1791255454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_mem_rw_with_rand_reset.588996541 |
| Short name | T3904 |
| Test name | |
| Test status | |
| Simulation time | 99617152 ps |
| CPU time | 3.08 seconds |
| Started | Aug 29 12:27:18 AM UTC 24 |
| Finished | Aug 29 12:27:30 AM UTC 24 |
| Peak memory | 227848 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=588996541 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_csr_mem_rw_with_rand_reset.588996541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_rw.426915711 |
| Short name | T3864 |
| Test name | |
| Test status | |
| Simulation time | 130431478 ps |
| CPU time | 1.03 seconds |
| Started | Aug 29 12:27:17 AM UTC 24 |
| Finished | Aug 29 12:27:19 AM UTC 24 |
| Peak memory | 216884 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=426915711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_csr_rw.426915711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_intr_test.3341404398 |
| Short name | T3865 |
| Test name | |
| Test status | |
| Simulation time | 49706931 ps |
| CPU time | 1.14 seconds |
| Started | Aug 29 12:27:17 AM UTC 24 |
| Finished | Aug 29 12:27:19 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3341404398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_intr_test.3341404398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_same_csr_outstanding.4208566006 |
| Short name | T3873 |
| Test name | |
| Test status | |
| Simulation time | 101254223 ps |
| CPU time | 1.21 seconds |
| Started | Aug 29 12:27:18 AM UTC 24 |
| Finished | Aug 29 12:27:21 AM UTC 24 |
| Peak memory | 216956 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4208566006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_same_csr_outstanding.4208566006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_errors.2209517734 |
| Short name | T3878 |
| Test name | |
| Test status | |
| Simulation time | 328336972 ps |
| CPU time | 3.67 seconds |
| Started | Aug 29 12:27:17 AM UTC 24 |
| Finished | Aug 29 12:27:21 AM UTC 24 |
| Peak memory | 233820 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2209517734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_tl_errors.2209517734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_aliasing.2375939495 |
| Short name | T3804 |
| Test name | |
| Test status | |
| Simulation time | 89274342 ps |
| CPU time | 2 seconds |
| Started | Aug 29 12:26:58 AM UTC 24 |
| Finished | Aug 29 12:27:01 AM UTC 24 |
| Peak memory | 216812 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2375939495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_aliasing.2375939495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_bit_bash.2294849119 |
| Short name | T3812 |
| Test name | |
| Test status | |
| Simulation time | 1491075909 ps |
| CPU time | 7.6 seconds |
| Started | Aug 29 12:26:57 AM UTC 24 |
| Finished | Aug 29 12:27:05 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2294849119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_bit_bash.2294849119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_hw_reset.1181978273 |
| Short name | T3802 |
| Test name | |
| Test status | |
| Simulation time | 84838144 ps |
| CPU time | 1.13 seconds |
| Started | Aug 29 12:26:57 AM UTC 24 |
| Finished | Aug 29 12:26:59 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1181978273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_hw_reset.1181978273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_mem_rw_with_rand_reset.393999470 |
| Short name | T280 |
| Test name | |
| Test status | |
| Simulation time | 62945834 ps |
| CPU time | 1.24 seconds |
| Started | Aug 29 12:26:58 AM UTC 24 |
| Finished | Aug 29 12:27:00 AM UTC 24 |
| Peak memory | 226944 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=393999470 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_mem_rw_with_rand_reset.393999470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_rw.3800187642 |
| Short name | T302 |
| Test name | |
| Test status | |
| Simulation time | 63496386 ps |
| CPU time | 1.21 seconds |
| Started | Aug 29 12:26:57 AM UTC 24 |
| Finished | Aug 29 12:26:59 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3800187642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_rw.3800187642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_partial_access.2133116510 |
| Short name | T304 |
| Test name | |
| Test status | |
| Simulation time | 80738500 ps |
| CPU time | 2.14 seconds |
| Started | Aug 29 12:26:57 AM UTC 24 |
| Finished | Aug 29 12:27:00 AM UTC 24 |
| Peak memory | 217348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2133116510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_mem_partial_access.2133116510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_walk.3950974934 |
| Short name | T3803 |
| Test name | |
| Test status | |
| Simulation time | 329601179 ps |
| CPU time | 2.85 seconds |
| Started | Aug 29 12:26:56 AM UTC 24 |
| Finished | Aug 29 12:27:00 AM UTC 24 |
| Peak memory | 217476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3950974934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_mem_walk.3950974934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_same_csr_outstanding.3535766086 |
| Short name | T3806 |
| Test name | |
| Test status | |
| Simulation time | 407587742 ps |
| CPU time | 2.19 seconds |
| Started | Aug 29 12:26:58 AM UTC 24 |
| Finished | Aug 29 12:27:01 AM UTC 24 |
| Peak memory | 217608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3535766086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_same_csr_outstanding.3535766086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_errors.4124466092 |
| Short name | T270 |
| Test name | |
| Test status | |
| Simulation time | 264331488 ps |
| CPU time | 3.11 seconds |
| Started | Aug 29 12:26:55 AM UTC 24 |
| Finished | Aug 29 12:26:59 AM UTC 24 |
| Peak memory | 217392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4124466092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_tl_errors.4124466092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/20.usbdev_intr_test.602434025 |
| Short name | T3900 |
| Test name | |
| Test status | |
| Simulation time | 44262036 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 12:27:18 AM UTC 24 |
| Finished | Aug 29 12:27:27 AM UTC 24 |
| Peak memory | 216640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=602434025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 20.usbdev_intr_test.602434025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/21.usbdev_intr_test.2975409450 |
| Short name | T3872 |
| Test name | |
| Test status | |
| Simulation time | 45874497 ps |
| CPU time | 0.88 seconds |
| Started | Aug 29 12:27:18 AM UTC 24 |
| Finished | Aug 29 12:27:21 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2975409450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 21.usbdev_intr_test.2975409450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/22.usbdev_intr_test.396366390 |
| Short name | T3870 |
| Test name | |
| Test status | |
| Simulation time | 29555080 ps |
| CPU time | 0.74 seconds |
| Started | Aug 29 12:27:18 AM UTC 24 |
| Finished | Aug 29 12:27:21 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=396366390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 22.usbdev_intr_test.396366390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/23.usbdev_intr_test.1839577170 |
| Short name | T3868 |
| Test name | |
| Test status | |
| Simulation time | 61286011 ps |
| CPU time | 0.72 seconds |
| Started | Aug 29 12:27:18 AM UTC 24 |
| Finished | Aug 29 12:27:21 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1839577170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 23.usbdev_intr_test.1839577170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/24.usbdev_intr_test.3652313023 |
| Short name | T3869 |
| Test name | |
| Test status | |
| Simulation time | 42845626 ps |
| CPU time | 0.75 seconds |
| Started | Aug 29 12:27:18 AM UTC 24 |
| Finished | Aug 29 12:27:21 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3652313023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 24.usbdev_intr_test.3652313023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/25.usbdev_intr_test.2579744403 |
| Short name | T3871 |
| Test name | |
| Test status | |
| Simulation time | 43816178 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 12:27:18 AM UTC 24 |
| Finished | Aug 29 12:27:21 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2579744403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 25.usbdev_intr_test.2579744403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/26.usbdev_intr_test.2581616167 |
| Short name | T3876 |
| Test name | |
| Test status | |
| Simulation time | 72625656 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 12:27:18 AM UTC 24 |
| Finished | Aug 29 12:27:21 AM UTC 24 |
| Peak memory | 216692 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2581616167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 26.usbdev_intr_test.2581616167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/27.usbdev_intr_test.509010521 |
| Short name | T3874 |
| Test name | |
| Test status | |
| Simulation time | 75107472 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 12:27:18 AM UTC 24 |
| Finished | Aug 29 12:27:21 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=509010521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 27.usbdev_intr_test.509010521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/28.usbdev_intr_test.3665108302 |
| Short name | T3880 |
| Test name | |
| Test status | |
| Simulation time | 80741939 ps |
| CPU time | 0.9 seconds |
| Started | Aug 29 12:27:18 AM UTC 24 |
| Finished | Aug 29 12:27:21 AM UTC 24 |
| Peak memory | 216756 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3665108302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 28.usbdev_intr_test.3665108302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/29.usbdev_intr_test.3544199895 |
| Short name | T3875 |
| Test name | |
| Test status | |
| Simulation time | 63264628 ps |
| CPU time | 0.68 seconds |
| Started | Aug 29 12:27:18 AM UTC 24 |
| Finished | Aug 29 12:27:21 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3544199895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 29.usbdev_intr_test.3544199895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_aliasing.3069506353 |
| Short name | T3807 |
| Test name | |
| Test status | |
| Simulation time | 81130882 ps |
| CPU time | 1.99 seconds |
| Started | Aug 29 12:26:59 AM UTC 24 |
| Finished | Aug 29 12:27:03 AM UTC 24 |
| Peak memory | 216864 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3069506353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_aliasing.3069506353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_bit_bash.2716495587 |
| Short name | T3824 |
| Test name | |
| Test status | |
| Simulation time | 2871007310 ps |
| CPU time | 10.63 seconds |
| Started | Aug 29 12:26:58 AM UTC 24 |
| Finished | Aug 29 12:27:11 AM UTC 24 |
| Peak memory | 217632 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2716495587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_bit_bash.2716495587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_hw_reset.2324796896 |
| Short name | T3805 |
| Test name | |
| Test status | |
| Simulation time | 117010319 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 12:26:58 AM UTC 24 |
| Finished | Aug 29 12:27:01 AM UTC 24 |
| Peak memory | 216828 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2324796896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_hw_reset.2324796896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_mem_rw_with_rand_reset.3726934831 |
| Short name | T275 |
| Test name | |
| Test status | |
| Simulation time | 200629954 ps |
| CPU time | 1.98 seconds |
| Started | Aug 29 12:26:59 AM UTC 24 |
| Finished | Aug 29 12:27:02 AM UTC 24 |
| Peak memory | 226884 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3726934831 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_mem_rw_with_rand_reset.3726934831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_rw.1741705125 |
| Short name | T306 |
| Test name | |
| Test status | |
| Simulation time | 53146813 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 12:26:58 AM UTC 24 |
| Finished | Aug 29 12:27:01 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1741705125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_rw.1741705125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_intr_test.2013935969 |
| Short name | T326 |
| Test name | |
| Test status | |
| Simulation time | 107669221 ps |
| CPU time | 0.95 seconds |
| Started | Aug 29 12:26:58 AM UTC 24 |
| Finished | Aug 29 12:27:01 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2013935969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_intr_test.2013935969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_partial_access.3598835381 |
| Short name | T308 |
| Test name | |
| Test status | |
| Simulation time | 113900897 ps |
| CPU time | 1.45 seconds |
| Started | Aug 29 12:26:58 AM UTC 24 |
| Finished | Aug 29 12:27:02 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3598835381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_mem_partial_access.3598835381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_walk.3665442272 |
| Short name | T3809 |
| Test name | |
| Test status | |
| Simulation time | 103612682 ps |
| CPU time | 2.76 seconds |
| Started | Aug 29 12:26:58 AM UTC 24 |
| Finished | Aug 29 12:27:03 AM UTC 24 |
| Peak memory | 217396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3665442272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_mem_walk.3665442272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_same_csr_outstanding.1348324673 |
| Short name | T315 |
| Test name | |
| Test status | |
| Simulation time | 103333648 ps |
| CPU time | 1.3 seconds |
| Started | Aug 29 12:26:59 AM UTC 24 |
| Finished | Aug 29 12:27:01 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1348324673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_same_csr_outstanding.1348324673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_intg_err.2418494350 |
| Short name | T592 |
| Test name | |
| Test status | |
| Simulation time | 838292937 ps |
| CPU time | 3.17 seconds |
| Started | Aug 29 12:26:58 AM UTC 24 |
| Finished | Aug 29 12:27:03 AM UTC 24 |
| Peak memory | 217416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2418494350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_tl_intg_err.2418494350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/30.usbdev_intr_test.1004208118 |
| Short name | T3877 |
| Test name | |
| Test status | |
| Simulation time | 53324559 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 12:27:19 AM UTC 24 |
| Finished | Aug 29 12:27:21 AM UTC 24 |
| Peak memory | 216764 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1004208118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 30.usbdev_intr_test.1004208118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/31.usbdev_intr_test.1011623585 |
| Short name | T3885 |
| Test name | |
| Test status | |
| Simulation time | 42594520 ps |
| CPU time | 0.82 seconds |
| Started | Aug 29 12:27:19 AM UTC 24 |
| Finished | Aug 29 12:27:21 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1011623585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 31.usbdev_intr_test.1011623585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/32.usbdev_intr_test.3508513961 |
| Short name | T3882 |
| Test name | |
| Test status | |
| Simulation time | 43739642 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 12:27:19 AM UTC 24 |
| Finished | Aug 29 12:27:21 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3508513961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 32.usbdev_intr_test.3508513961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/33.usbdev_intr_test.1343612595 |
| Short name | T3879 |
| Test name | |
| Test status | |
| Simulation time | 40224343 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 12:27:19 AM UTC 24 |
| Finished | Aug 29 12:27:21 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1343612595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 33.usbdev_intr_test.1343612595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/34.usbdev_intr_test.2184857888 |
| Short name | T3884 |
| Test name | |
| Test status | |
| Simulation time | 28375917 ps |
| CPU time | 0.74 seconds |
| Started | Aug 29 12:27:19 AM UTC 24 |
| Finished | Aug 29 12:27:21 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2184857888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 34.usbdev_intr_test.2184857888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/35.usbdev_intr_test.2052883556 |
| Short name | T3887 |
| Test name | |
| Test status | |
| Simulation time | 73048647 ps |
| CPU time | 0.88 seconds |
| Started | Aug 29 12:27:20 AM UTC 24 |
| Finished | Aug 29 12:27:22 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2052883556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 35.usbdev_intr_test.2052883556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/36.usbdev_intr_test.3702938697 |
| Short name | T3883 |
| Test name | |
| Test status | |
| Simulation time | 35126642 ps |
| CPU time | 0.73 seconds |
| Started | Aug 29 12:27:20 AM UTC 24 |
| Finished | Aug 29 12:27:21 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3702938697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 36.usbdev_intr_test.3702938697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/37.usbdev_intr_test.3495669260 |
| Short name | T3886 |
| Test name | |
| Test status | |
| Simulation time | 51513911 ps |
| CPU time | 0.67 seconds |
| Started | Aug 29 12:27:20 AM UTC 24 |
| Finished | Aug 29 12:27:21 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3495669260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 37.usbdev_intr_test.3495669260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/38.usbdev_intr_test.3650203250 |
| Short name | T3881 |
| Test name | |
| Test status | |
| Simulation time | 37278367 ps |
| CPU time | 0.76 seconds |
| Started | Aug 29 12:27:20 AM UTC 24 |
| Finished | Aug 29 12:27:21 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3650203250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 38.usbdev_intr_test.3650203250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/39.usbdev_intr_test.2641985695 |
| Short name | T3891 |
| Test name | |
| Test status | |
| Simulation time | 49955486 ps |
| CPU time | 0.94 seconds |
| Started | Aug 29 12:27:20 AM UTC 24 |
| Finished | Aug 29 12:27:22 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2641985695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 39.usbdev_intr_test.2641985695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_aliasing.4028089286 |
| Short name | T312 |
| Test name | |
| Test status | |
| Simulation time | 206917122 ps |
| CPU time | 2.22 seconds |
| Started | Aug 29 12:27:00 AM UTC 24 |
| Finished | Aug 29 12:27:03 AM UTC 24 |
| Peak memory | 217068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4028089286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_aliasing.4028089286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_bit_bash.1442097771 |
| Short name | T3813 |
| Test name | |
| Test status | |
| Simulation time | 1065772989 ps |
| CPU time | 4.35 seconds |
| Started | Aug 29 12:27:00 AM UTC 24 |
| Finished | Aug 29 12:27:05 AM UTC 24 |
| Peak memory | 217456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1442097771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_bit_bash.1442097771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_hw_reset.1225017785 |
| Short name | T307 |
| Test name | |
| Test status | |
| Simulation time | 85353083 ps |
| CPU time | 1 seconds |
| Started | Aug 29 12:27:00 AM UTC 24 |
| Finished | Aug 29 12:27:02 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1225017785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_hw_reset.1225017785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_mem_rw_with_rand_reset.228061296 |
| Short name | T281 |
| Test name | |
| Test status | |
| Simulation time | 192790290 ps |
| CPU time | 2.01 seconds |
| Started | Aug 29 12:27:00 AM UTC 24 |
| Finished | Aug 29 12:27:03 AM UTC 24 |
| Peak memory | 226824 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=228061296 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_mem_rw_with_rand_reset.228061296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_rw.2151117636 |
| Short name | T309 |
| Test name | |
| Test status | |
| Simulation time | 89834877 ps |
| CPU time | 1.27 seconds |
| Started | Aug 29 12:27:00 AM UTC 24 |
| Finished | Aug 29 12:27:02 AM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2151117636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_rw.2151117636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_intr_test.1243623630 |
| Short name | T325 |
| Test name | |
| Test status | |
| Simulation time | 46328645 ps |
| CPU time | 0.76 seconds |
| Started | Aug 29 12:27:00 AM UTC 24 |
| Finished | Aug 29 12:27:02 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1243623630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_intr_test.1243623630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_partial_access.4293538752 |
| Short name | T310 |
| Test name | |
| Test status | |
| Simulation time | 73405098 ps |
| CPU time | 1.85 seconds |
| Started | Aug 29 12:27:00 AM UTC 24 |
| Finished | Aug 29 12:27:03 AM UTC 24 |
| Peak memory | 226880 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4293538752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_mem_partial_access.4293538752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_walk.458842853 |
| Short name | T3810 |
| Test name | |
| Test status | |
| Simulation time | 380680718 ps |
| CPU time | 2.75 seconds |
| Started | Aug 29 12:27:00 AM UTC 24 |
| Finished | Aug 29 12:27:04 AM UTC 24 |
| Peak memory | 217348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=458842853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_mem_walk.458842853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_same_csr_outstanding.309284723 |
| Short name | T3808 |
| Test name | |
| Test status | |
| Simulation time | 128715537 ps |
| CPU time | 1.61 seconds |
| Started | Aug 29 12:27:00 AM UTC 24 |
| Finished | Aug 29 12:27:03 AM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=309284723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_same_csr_outstanding.309284723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_errors.315944776 |
| Short name | T272 |
| Test name | |
| Test status | |
| Simulation time | 55464390 ps |
| CPU time | 1.71 seconds |
| Started | Aug 29 12:26:59 AM UTC 24 |
| Finished | Aug 29 12:27:03 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=315944776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 4.usbdev_tl_errors.315944776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_intg_err.1259864284 |
| Short name | T589 |
| Test name | |
| Test status | |
| Simulation time | 290279348 ps |
| CPU time | 2.44 seconds |
| Started | Aug 29 12:26:59 AM UTC 24 |
| Finished | Aug 29 12:27:03 AM UTC 24 |
| Peak memory | 217508 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1259864284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_tl_intg_err.1259864284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/40.usbdev_intr_test.1453146473 |
| Short name | T3888 |
| Test name | |
| Test status | |
| Simulation time | 33729272 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 12:27:20 AM UTC 24 |
| Finished | Aug 29 12:27:22 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1453146473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 40.usbdev_intr_test.1453146473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/41.usbdev_intr_test.787689052 |
| Short name | T3890 |
| Test name | |
| Test status | |
| Simulation time | 59802024 ps |
| CPU time | 0.75 seconds |
| Started | Aug 29 12:27:20 AM UTC 24 |
| Finished | Aug 29 12:27:22 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=787689052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 41.usbdev_intr_test.787689052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/42.usbdev_intr_test.1071693487 |
| Short name | T3897 |
| Test name | |
| Test status | |
| Simulation time | 54711362 ps |
| CPU time | 0.71 seconds |
| Started | Aug 29 12:27:21 AM UTC 24 |
| Finished | Aug 29 12:27:26 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1071693487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 42.usbdev_intr_test.1071693487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/43.usbdev_intr_test.3651880227 |
| Short name | T3896 |
| Test name | |
| Test status | |
| Simulation time | 46328437 ps |
| CPU time | 0.65 seconds |
| Started | Aug 29 12:27:21 AM UTC 24 |
| Finished | Aug 29 12:27:26 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3651880227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 43.usbdev_intr_test.3651880227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/44.usbdev_intr_test.489383371 |
| Short name | T3905 |
| Test name | |
| Test status | |
| Simulation time | 51094523 ps |
| CPU time | 1.05 seconds |
| Started | Aug 29 12:27:21 AM UTC 24 |
| Finished | Aug 29 12:27:30 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=489383371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 44.usbdev_intr_test.489383371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/45.usbdev_intr_test.611336328 |
| Short name | T3903 |
| Test name | |
| Test status | |
| Simulation time | 62924736 ps |
| CPU time | 0.95 seconds |
| Started | Aug 29 12:27:22 AM UTC 24 |
| Finished | Aug 29 12:27:27 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=611336328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 45.usbdev_intr_test.611336328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/46.usbdev_intr_test.1061494660 |
| Short name | T3902 |
| Test name | |
| Test status | |
| Simulation time | 31934368 ps |
| CPU time | 0.9 seconds |
| Started | Aug 29 12:27:22 AM UTC 24 |
| Finished | Aug 29 12:27:27 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1061494660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 46.usbdev_intr_test.1061494660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/47.usbdev_intr_test.694385754 |
| Short name | T3898 |
| Test name | |
| Test status | |
| Simulation time | 38010376 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 12:27:22 AM UTC 24 |
| Finished | Aug 29 12:27:27 AM UTC 24 |
| Peak memory | 216712 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=694385754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 47.usbdev_intr_test.694385754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/48.usbdev_intr_test.2787648953 |
| Short name | T3901 |
| Test name | |
| Test status | |
| Simulation time | 46940742 ps |
| CPU time | 0.9 seconds |
| Started | Aug 29 12:27:22 AM UTC 24 |
| Finished | Aug 29 12:27:27 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2787648953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 48.usbdev_intr_test.2787648953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/49.usbdev_intr_test.1963228105 |
| Short name | T3899 |
| Test name | |
| Test status | |
| Simulation time | 44584515 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 12:27:22 AM UTC 24 |
| Finished | Aug 29 12:27:27 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1963228105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 49.usbdev_intr_test.1963228105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_mem_rw_with_rand_reset.2743523845 |
| Short name | T3894 |
| Test name | |
| Test status | |
| Simulation time | 129555518 ps |
| CPU time | 1.26 seconds |
| Started | Aug 29 12:27:00 AM UTC 24 |
| Finished | Aug 29 12:27:23 AM UTC 24 |
| Peak memory | 226828 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2743523845 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_csr_mem_rw_with_rand_reset.2743523845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_rw.670615624 |
| Short name | T3892 |
| Test name | |
| Test status | |
| Simulation time | 84839526 ps |
| CPU time | 0.94 seconds |
| Started | Aug 29 12:27:00 AM UTC 24 |
| Finished | Aug 29 12:27:22 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=670615624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_csr_rw.670615624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_intr_test.292549114 |
| Short name | T327 |
| Test name | |
| Test status | |
| Simulation time | 37020270 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 12:27:00 AM UTC 24 |
| Finished | Aug 29 12:27:02 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=292549114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 5.usbdev_intr_test.292549114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_same_csr_outstanding.1694881002 |
| Short name | T3895 |
| Test name | |
| Test status | |
| Simulation time | 223959902 ps |
| CPU time | 1.99 seconds |
| Started | Aug 29 12:27:00 AM UTC 24 |
| Finished | Aug 29 12:27:23 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1694881002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_same_csr_outstanding.1694881002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_errors.2580845800 |
| Short name | T3889 |
| Test name | |
| Test status | |
| Simulation time | 240448165 ps |
| CPU time | 2.94 seconds |
| Started | Aug 29 12:27:00 AM UTC 24 |
| Finished | Aug 29 12:27:24 AM UTC 24 |
| Peak memory | 234220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2580845800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_tl_errors.2580845800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_intg_err.3542331416 |
| Short name | T596 |
| Test name | |
| Test status | |
| Simulation time | 470460115 ps |
| CPU time | 2.93 seconds |
| Started | Aug 29 12:27:00 AM UTC 24 |
| Finished | Aug 29 12:27:24 AM UTC 24 |
| Peak memory | 217416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3542331416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_tl_intg_err.3542331416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_mem_rw_with_rand_reset.635471560 |
| Short name | T274 |
| Test name | |
| Test status | |
| Simulation time | 224197184 ps |
| CPU time | 2.09 seconds |
| Started | Aug 29 12:27:02 AM UTC 24 |
| Finished | Aug 29 12:27:08 AM UTC 24 |
| Peak memory | 234816 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=635471560 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_csr_mem_rw_with_rand_reset.635471560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_rw.2852310157 |
| Short name | T3818 |
| Test name | |
| Test status | |
| Simulation time | 76842434 ps |
| CPU time | 1.06 seconds |
| Started | Aug 29 12:27:01 AM UTC 24 |
| Finished | Aug 29 12:27:07 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2852310157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_csr_rw.2852310157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_same_csr_outstanding.3023779884 |
| Short name | T3822 |
| Test name | |
| Test status | |
| Simulation time | 177544762 ps |
| CPU time | 1.3 seconds |
| Started | Aug 29 12:27:02 AM UTC 24 |
| Finished | Aug 29 12:27:07 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3023779884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_same_csr_outstanding.3023779884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_errors.17396368 |
| Short name | T268 |
| Test name | |
| Test status | |
| Simulation time | 222785298 ps |
| CPU time | 2.63 seconds |
| Started | Aug 29 12:27:01 AM UTC 24 |
| Finished | Aug 29 12:27:08 AM UTC 24 |
| Peak memory | 227660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=17396368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_com mon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg _top.vdb -cm_log /dev/null -cm_name 6.usbdev_tl_errors.17396368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_intg_err.1546318545 |
| Short name | T3823 |
| Test name | |
| Test status | |
| Simulation time | 889292922 ps |
| CPU time | 4.71 seconds |
| Started | Aug 29 12:27:01 AM UTC 24 |
| Finished | Aug 29 12:27:10 AM UTC 24 |
| Peak memory | 217404 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1546318545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_tl_intg_err.1546318545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_mem_rw_with_rand_reset.3740037049 |
| Short name | T278 |
| Test name | |
| Test status | |
| Simulation time | 102143970 ps |
| CPU time | 2.49 seconds |
| Started | Aug 29 12:27:03 AM UTC 24 |
| Finished | Aug 29 12:27:07 AM UTC 24 |
| Peak memory | 227676 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3740037049 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_csr_mem_rw_with_rand_reset.3740037049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_rw.1329337656 |
| Short name | T3831 |
| Test name | |
| Test status | |
| Simulation time | 90990589 ps |
| CPU time | 1.4 seconds |
| Started | Aug 29 12:27:03 AM UTC 24 |
| Finished | Aug 29 12:27:12 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1329337656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_csr_rw.1329337656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_intr_test.3757106369 |
| Short name | T334 |
| Test name | |
| Test status | |
| Simulation time | 38912210 ps |
| CPU time | 0.75 seconds |
| Started | Aug 29 12:27:03 AM UTC 24 |
| Finished | Aug 29 12:27:12 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3757106369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_intr_test.3757106369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_same_csr_outstanding.1713282378 |
| Short name | T3893 |
| Test name | |
| Test status | |
| Simulation time | 133438560 ps |
| CPU time | 1.35 seconds |
| Started | Aug 29 12:27:03 AM UTC 24 |
| Finished | Aug 29 12:27:22 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1713282378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_same_csr_outstanding.1713282378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_errors.4203848742 |
| Short name | T3862 |
| Test name | |
| Test status | |
| Simulation time | 254436330 ps |
| CPU time | 2.84 seconds |
| Started | Aug 29 12:27:02 AM UTC 24 |
| Finished | Aug 29 12:27:19 AM UTC 24 |
| Peak memory | 234576 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4203848742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_tl_errors.4203848742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_intg_err.2001647889 |
| Short name | T3838 |
| Test name | |
| Test status | |
| Simulation time | 665538736 ps |
| CPU time | 4.36 seconds |
| Started | Aug 29 12:27:03 AM UTC 24 |
| Finished | Aug 29 12:27:15 AM UTC 24 |
| Peak memory | 217608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2001647889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_tl_intg_err.2001647889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_mem_rw_with_rand_reset.2587041905 |
| Short name | T277 |
| Test name | |
| Test status | |
| Simulation time | 87284458 ps |
| CPU time | 2.13 seconds |
| Started | Aug 29 12:27:03 AM UTC 24 |
| Finished | Aug 29 12:27:07 AM UTC 24 |
| Peak memory | 227784 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2587041905 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_csr_mem_rw_with_rand_reset.2587041905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_rw.3214335351 |
| Short name | T3814 |
| Test name | |
| Test status | |
| Simulation time | 108074938 ps |
| CPU time | 0.92 seconds |
| Started | Aug 29 12:27:03 AM UTC 24 |
| Finished | Aug 29 12:27:06 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3214335351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_csr_rw.3214335351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_intr_test.1240549703 |
| Short name | T328 |
| Test name | |
| Test status | |
| Simulation time | 40645841 ps |
| CPU time | 0.82 seconds |
| Started | Aug 29 12:27:03 AM UTC 24 |
| Finished | Aug 29 12:27:06 AM UTC 24 |
| Peak memory | 216572 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1240549703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_intr_test.1240549703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_same_csr_outstanding.2429837210 |
| Short name | T3820 |
| Test name | |
| Test status | |
| Simulation time | 234089854 ps |
| CPU time | 1.81 seconds |
| Started | Aug 29 12:27:03 AM UTC 24 |
| Finished | Aug 29 12:27:07 AM UTC 24 |
| Peak memory | 216784 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2429837210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_same_csr_outstanding.2429837210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_errors.719147127 |
| Short name | T3861 |
| Test name | |
| Test status | |
| Simulation time | 110823771 ps |
| CPU time | 1.76 seconds |
| Started | Aug 29 12:27:03 AM UTC 24 |
| Finished | Aug 29 12:27:23 AM UTC 24 |
| Peak memory | 230964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=719147127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 8.usbdev_tl_errors.719147127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_intg_err.3908657388 |
| Short name | T600 |
| Test name | |
| Test status | |
| Simulation time | 558790064 ps |
| CPU time | 2.79 seconds |
| Started | Aug 29 12:27:03 AM UTC 24 |
| Finished | Aug 29 12:27:24 AM UTC 24 |
| Peak memory | 217472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3908657388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_tl_intg_err.3908657388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_mem_rw_with_rand_reset.1569748645 |
| Short name | T3817 |
| Test name | |
| Test status | |
| Simulation time | 101100907 ps |
| CPU time | 1.15 seconds |
| Started | Aug 29 12:27:04 AM UTC 24 |
| Finished | Aug 29 12:27:07 AM UTC 24 |
| Peak memory | 226836 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1569748645 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_csr_mem_rw_with_rand_reset.1569748645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_rw.4089890558 |
| Short name | T3816 |
| Test name | |
| Test status | |
| Simulation time | 90137556 ps |
| CPU time | 1.03 seconds |
| Started | Aug 29 12:27:04 AM UTC 24 |
| Finished | Aug 29 12:27:06 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4089890558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_csr_rw.4089890558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_intr_test.173124067 |
| Short name | T329 |
| Test name | |
| Test status | |
| Simulation time | 27294030 ps |
| CPU time | 0.67 seconds |
| Started | Aug 29 12:27:04 AM UTC 24 |
| Finished | Aug 29 12:27:06 AM UTC 24 |
| Peak memory | 216828 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=173124067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 9.usbdev_intr_test.173124067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_same_csr_outstanding.2773527754 |
| Short name | T3819 |
| Test name | |
| Test status | |
| Simulation time | 136533399 ps |
| CPU time | 1.32 seconds |
| Started | Aug 29 12:27:04 AM UTC 24 |
| Finished | Aug 29 12:27:07 AM UTC 24 |
| Peak memory | 216836 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2773527754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_same_csr_outstanding.2773527754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_errors.3034645173 |
| Short name | T273 |
| Test name | |
| Test status | |
| Simulation time | 59133526 ps |
| CPU time | 1.52 seconds |
| Started | Aug 29 12:27:04 AM UTC 24 |
| Finished | Aug 29 12:27:07 AM UTC 24 |
| Peak memory | 216728 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3034645173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_tl_errors.3034645173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_intg_err.3247012519 |
| Short name | T593 |
| Test name | |
| Test status | |
| Simulation time | 1148683531 ps |
| CPU time | 4.98 seconds |
| Started | Aug 29 12:27:04 AM UTC 24 |
| Finished | Aug 29 12:27:10 AM UTC 24 |
| Peak memory | 217608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3247012519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_tl_intg_err.3247012519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_alert_test.3672717088 |
| Short name | T212 |
| Test name | |
| Test status | |
| Simulation time | 39344750 ps |
| CPU time | 1.02 seconds |
| Started | Aug 29 03:28:34 AM UTC 24 |
| Finished | Aug 29 03:28:37 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3672717088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 0.usbdev_alert_test.3672717088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_disconnect.122611325 |
| Short name | T3 |
| Test name | |
| Test status | |
| Simulation time | 4005166166 ps |
| CPU time | 7.22 seconds |
| Started | Aug 29 03:27:17 AM UTC 24 |
| Finished | Aug 29 03:27:25 AM UTC 24 |
| Peak memory | 227404 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=122611325 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_disconnect.122611325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_resume.1911125567 |
| Short name | T8 |
| Test name | |
| Test status | |
| Simulation time | 24031298653 ps |
| CPU time | 73.42 seconds |
| Started | Aug 29 03:27:20 AM UTC 24 |
| Finished | Aug 29 03:28:35 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1911125567 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_resume.1911125567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_av_buffer.2974423759 |
| Short name | T1 |
| Test name | |
| Test status | |
| Simulation time | 152852892 ps |
| CPU time | 1.44 seconds |
| Started | Aug 29 03:27:21 AM UTC 24 |
| Finished | Aug 29 03:27:24 AM UTC 24 |
| Peak memory | 216440 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2974423759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_av_buffer.2974423759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_clear.3672600693 |
| Short name | T18 |
| Test name | |
| Test status | |
| Simulation time | 391837265 ps |
| CPU time | 2.74 seconds |
| Started | Aug 29 03:27:26 AM UTC 24 |
| Finished | Aug 29 03:27:29 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3672600693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 0.usbdev_data_toggle_clear.3672600693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_device_timeout.2068839264 |
| Short name | T108 |
| Test name | |
| Test status | |
| Simulation time | 3849203245 ps |
| CPU time | 32.63 seconds |
| Started | Aug 29 03:27:27 AM UTC 24 |
| Finished | Aug 29 03:28:01 AM UTC 24 |
| Peak memory | 217388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2068839264 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_device_timeout.2068839264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_disable_endpoint.4163258821 |
| Short name | T20 |
| Test name | |
| Test status | |
| Simulation time | 479376110 ps |
| CPU time | 2.58 seconds |
| Started | Aug 29 03:27:28 AM UTC 24 |
| Finished | Aug 29 03:27:32 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4163258821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_disable_endpoint.4163258821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_enable.1040322668 |
| Short name | T22 |
| Test name | |
| Test status | |
| Simulation time | 42667036 ps |
| CPU time | 1 seconds |
| Started | Aug 29 03:27:32 AM UTC 24 |
| Finished | Aug 29 03:27:34 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1040322668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 0.usbdev_enable.1040322668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_access.1682606989 |
| Short name | T28 |
| Test name | |
| Test status | |
| Simulation time | 915944900 ps |
| CPU time | 4.59 seconds |
| Started | Aug 29 03:27:32 AM UTC 24 |
| Finished | Aug 29 03:27:38 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1682606989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_endpoint_access.1682606989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_freq_hiclk.646387170 |
| Short name | T643 |
| Test name | |
| Test status | |
| Simulation time | 116244441229 ps |
| CPU time | 272.46 seconds |
| Started | Aug 29 03:27:38 AM UTC 24 |
| Finished | Aug 29 03:32:14 AM UTC 24 |
| Peak memory | 217348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=646387170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_hiclk.646387170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_freq_hiclk_max.1449123744 |
| Short name | T690 |
| Test name | |
| Test status | |
| Simulation time | 89320048054 ps |
| CPU time | 191.65 seconds |
| Started | Aug 29 03:27:38 AM UTC 24 |
| Finished | Aug 29 03:30:52 AM UTC 24 |
| Peak memory | 217480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=1449123744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 0.usbdev_freq_hiclk_max.1449123744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_freq_loclk.1285002578 |
| Short name | T642 |
| Test name | |
| Test status | |
| Simulation time | 100094945712 ps |
| CPU time | 235.79 seconds |
| Started | Aug 29 03:27:39 AM UTC 24 |
| Finished | Aug 29 03:31:38 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1285002578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_loclk.1285002578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_freq_loclk_max.272600191 |
| Short name | T743 |
| Test name | |
| Test status | |
| Simulation time | 107193031649 ps |
| CPU time | 257.63 seconds |
| Started | Aug 29 03:27:41 AM UTC 24 |
| Finished | Aug 29 03:32:02 AM UTC 24 |
| Peak memory | 217276 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=272600191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 0.usbdev_freq_loclk_max.272600191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_in_iso.3037940148 |
| Short name | T32 |
| Test name | |
| Test status | |
| Simulation time | 215343266 ps |
| CPU time | 2.07 seconds |
| Started | Aug 29 03:27:46 AM UTC 24 |
| Finished | Aug 29 03:27:50 AM UTC 24 |
| Peak memory | 227484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3037940148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_in_iso.3037940148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_in_stall.2000827213 |
| Short name | T31 |
| Test name | |
| Test status | |
| Simulation time | 146690327 ps |
| CPU time | 1.4 seconds |
| Started | Aug 29 03:27:46 AM UTC 24 |
| Finished | Aug 29 03:27:49 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2000827213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_in_stall.2000827213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_in_trans.970078975 |
| Short name | T33 |
| Test name | |
| Test status | |
| Simulation time | 237340831 ps |
| CPU time | 1.86 seconds |
| Started | Aug 29 03:27:48 AM UTC 24 |
| Finished | Aug 29 03:27:51 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=970078975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_in_trans.970078975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_data1_data0_toggle_test.1686535371 |
| Short name | T30 |
| Test name | |
| Test status | |
| Simulation time | 482348266 ps |
| CPU time | 2.88 seconds |
| Started | Aug 29 03:27:44 AM UTC 24 |
| Finished | Aug 29 03:27:48 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1686535371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_invalid_data1_data0_toggle_test.1686535371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_invalid_data1_data0_toggle_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_iso_retraction.1792219330 |
| Short name | T93 |
| Test name | |
| Test status | |
| Simulation time | 14054897406 ps |
| CPU time | 157.41 seconds |
| Started | Aug 29 03:27:48 AM UTC 24 |
| Finished | Aug 29 03:30:29 AM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1792219330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_iso_retraction.1792219330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_link_in_err.3558081232 |
| Short name | T34 |
| Test name | |
| Test status | |
| Simulation time | 239887180 ps |
| CPU time | 1.75 seconds |
| Started | Aug 29 03:27:49 AM UTC 24 |
| Finished | Aug 29 03:27:53 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3558081232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_link_in_err.3558081232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_link_suspend.924222271 |
| Short name | T58 |
| Test name | |
| Test status | |
| Simulation time | 11111682483 ps |
| CPU time | 15.98 seconds |
| Started | Aug 29 03:27:55 AM UTC 24 |
| Finished | Aug 29 03:28:12 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=924222271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_link_suspend.924222271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_max_inter_pkt_delay.720713567 |
| Short name | T5 |
| Test name | |
| Test status | |
| Simulation time | 2099304450 ps |
| CPU time | 28.37 seconds |
| Started | Aug 29 03:27:58 AM UTC 24 |
| Finished | Aug 29 03:28:28 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=720713567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_inter_pkt_delay.720713567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_max_length_in_transaction.2616839061 |
| Short name | T118 |
| Test name | |
| Test status | |
| Simulation time | 241462052 ps |
| CPU time | 1.67 seconds |
| Started | Aug 29 03:27:59 AM UTC 24 |
| Finished | Aug 29 03:28:02 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2616839061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 0.usbdev_max_length_in_transaction.2616839061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_max_length_out_transaction.1430301308 |
| Short name | T85 |
| Test name | |
| Test status | |
| Simulation time | 206763778 ps |
| CPU time | 1.57 seconds |
| Started | Aug 29 03:28:02 AM UTC 24 |
| Finished | Aug 29 03:28:05 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1430301308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 0.usbdev_max_length_out_transaction.1430301308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_max_usb_traffic.3849353784 |
| Short name | T106 |
| Test name | |
| Test status | |
| Simulation time | 2927748679 ps |
| CPU time | 85.06 seconds |
| Started | Aug 29 03:28:06 AM UTC 24 |
| Finished | Aug 29 03:29:33 AM UTC 24 |
| Peak memory | 229684 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3849353784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_usb_traffic.3849353784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_min_inter_pkt_delay.1984005188 |
| Short name | T163 |
| Test name | |
| Test status | |
| Simulation time | 2570300335 ps |
| CPU time | 71.46 seconds |
| Started | Aug 29 03:28:06 AM UTC 24 |
| Finished | Aug 29 03:29:20 AM UTC 24 |
| Peak memory | 227548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1984005188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_min_inter_pkt_delay.1984005188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_min_length_in_transaction.1526261317 |
| Short name | T160 |
| Test name | |
| Test status | |
| Simulation time | 187840229 ps |
| CPU time | 1.54 seconds |
| Started | Aug 29 03:28:12 AM UTC 24 |
| Finished | Aug 29 03:28:15 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1526261317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 0.usbdev_min_length_in_transaction.1526261317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_min_length_out_transaction.2162892162 |
| Short name | T647 |
| Test name | |
| Test status | |
| Simulation time | 185384943 ps |
| CPU time | 1.61 seconds |
| Started | Aug 29 03:28:12 AM UTC 24 |
| Finished | Aug 29 03:28:15 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2162892162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 0.usbdev_min_length_out_transaction.2162892162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.2871752682 |
| Short name | T71 |
| Test name | |
| Test status | |
| Simulation time | 499559176 ps |
| CPU time | 2.86 seconds |
| Started | Aug 29 03:28:14 AM UTC 24 |
| Finished | Aug 29 03:28:17 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2871752682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.2871752682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_out_iso.4075289048 |
| Short name | T86 |
| Test name | |
| Test status | |
| Simulation time | 158983102 ps |
| CPU time | 1.51 seconds |
| Started | Aug 29 03:28:16 AM UTC 24 |
| Finished | Aug 29 03:28:18 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4075289048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_out_iso.4075289048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_out_stall.3486362798 |
| Short name | T73 |
| Test name | |
| Test status | |
| Simulation time | 172670558 ps |
| CPU time | 1.56 seconds |
| Started | Aug 29 03:28:16 AM UTC 24 |
| Finished | Aug 29 03:28:18 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3486362798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_out_stall.3486362798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_out_trans_nak.1498412175 |
| Short name | T578 |
| Test name | |
| Test status | |
| Simulation time | 167534884 ps |
| CPU time | 1.56 seconds |
| Started | Aug 29 03:28:17 AM UTC 24 |
| Finished | Aug 29 03:28:19 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1498412175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 0.usbdev_out_trans_nak.1498412175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_pending_in_trans.821497291 |
| Short name | T88 |
| Test name | |
| Test status | |
| Simulation time | 164564820 ps |
| CPU time | 1.38 seconds |
| Started | Aug 29 03:28:17 AM UTC 24 |
| Finished | Aug 29 03:28:19 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=821497291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_pending_in_trans.821497291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_eop_single_bit_handling.2612845152 |
| Short name | T87 |
| Test name | |
| Test status | |
| Simulation time | 246854894 ps |
| CPU time | 1.71 seconds |
| Started | Aug 29 03:28:18 AM UTC 24 |
| Finished | Aug 29 03:28:21 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2612845152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_eop_single_ bit_handling_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_eop_single_bit_handling.2612845152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_phy_config_eop_single_bit_handling/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_pinflip.4097552690 |
| Short name | T45 |
| Test name | |
| Test status | |
| Simulation time | 208616977 ps |
| CPU time | 1.76 seconds |
| Started | Aug 29 03:28:19 AM UTC 24 |
| Finished | Aug 29 03:28:22 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4097552690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_pinflip.4097552690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_rx_dp_dn.2373979163 |
| Short name | T46 |
| Test name | |
| Test status | |
| Simulation time | 201695156 ps |
| CPU time | 1.66 seconds |
| Started | Aug 29 03:28:20 AM UTC 24 |
| Finished | Aug 29 03:28:23 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_diff_rcvr=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2373979163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 0.usbdev_phy_config_rx_dp_dn.2373979163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_phy_config_rx_dp_dn/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_use_d_se0.2964415294 |
| Short name | T162 |
| Test name | |
| Test status | |
| Simulation time | 219773799 ps |
| CPU time | 1.91 seconds |
| Started | Aug 29 03:28:21 AM UTC 24 |
| Finished | Aug 29 03:28:24 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +tx_use_d_se0=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2964415294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 0.usbdev_phy_config_tx_use_d_se0.2964415294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_phy_config_tx_use_d_se0/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_sent.1066911837 |
| Short name | T159 |
| Test name | |
| Test status | |
| Simulation time | 210285853 ps |
| CPU time | 1.76 seconds |
| Started | Aug 29 03:28:24 AM UTC 24 |
| Finished | Aug 29 03:28:27 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1066911837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_pkt_sent.1066911837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_rand_bus_disconnects.3875071035 |
| Short name | T65 |
| Test name | |
| Test status | |
| Simulation time | 5955565520 ps |
| CPU time | 36.76 seconds |
| Started | Aug 29 03:28:24 AM UTC 24 |
| Finished | Aug 29 03:29:02 AM UTC 24 |
| Peak memory | 229664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3875071035 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_bus_disconnects.3875071035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_rand_bus_resets.2334564157 |
| Short name | T166 |
| Test name | |
| Test status | |
| Simulation time | 2434876688 ps |
| CPU time | 58.53 seconds |
| Started | Aug 29 03:28:25 AM UTC 24 |
| Finished | Aug 29 03:29:25 AM UTC 24 |
| Peak memory | 229736 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2334564157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_bus_resets.2334564157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_rand_suspends.1695479134 |
| Short name | T171 |
| Test name | |
| Test status | |
| Simulation time | 10213554999 ps |
| CPU time | 50.12 seconds |
| Started | Aug 29 03:28:25 AM UTC 24 |
| Finished | Aug 29 03:29:17 AM UTC 24 |
| Peak memory | 229716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1695479134 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_suspends.1695479134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_random_length_in_transaction.3346140585 |
| Short name | T617 |
| Test name | |
| Test status | |
| Simulation time | 153762371 ps |
| CPU time | 1.42 seconds |
| Started | Aug 29 03:28:24 AM UTC 24 |
| Finished | Aug 29 03:28:26 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3346140585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 0.usbdev_random_length_in_transaction.3346140585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_random_length_out_transaction.1405461642 |
| Short name | T648 |
| Test name | |
| Test status | |
| Simulation time | 180838495 ps |
| CPU time | 1.53 seconds |
| Started | Aug 29 03:28:24 AM UTC 24 |
| Finished | Aug 29 03:28:26 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1405461642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 0.usbdev_random_length_out_transaction.1405461642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority_over_stall_response.174924779 |
| Short name | T107 |
| Test name | |
| Test status | |
| Simulation time | 221098131 ps |
| CPU time | 1.7 seconds |
| Started | Aug 29 03:28:27 AM UTC 24 |
| Finished | Aug 29 03:28:30 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=174924779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_sta ll_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/d efault.vdb -cm_log /dev/null -cm_name 0.usbdev_setup_priority_over_stall_response.174924779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_setup_stage.535558124 |
| Short name | T649 |
| Test name | |
| Test status | |
| Simulation time | 173895062 ps |
| CPU time | 1.49 seconds |
| Started | Aug 29 03:28:29 AM UTC 24 |
| Finished | Aug 29 03:28:31 AM UTC 24 |
| Peak memory | 214940 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=535558124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_setup_stage.535558124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_smoke.3187917837 |
| Short name | T650 |
| Test name | |
| Test status | |
| Simulation time | 218136873 ps |
| CPU time | 1.63 seconds |
| Started | Aug 29 03:28:29 AM UTC 24 |
| Finished | Aug 29 03:28:32 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3187917837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_smoke.3187917837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_spurious_pids_ignored.3510462534 |
| Short name | T169 |
| Test name | |
| Test status | |
| Simulation time | 2915686416 ps |
| CPU time | 90.18 seconds |
| Started | Aug 29 03:28:30 AM UTC 24 |
| Finished | Aug 29 03:30:02 AM UTC 24 |
| Peak memory | 234264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3510462534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_spurious_pids_ignored.3510462534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_stall_trans.3050603733 |
| Short name | T243 |
| Test name | |
| Test status | |
| Simulation time | 182299801 ps |
| CPU time | 1.15 seconds |
| Started | Aug 29 03:28:31 AM UTC 24 |
| Finished | Aug 29 03:28:33 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3050603733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_stall_trans.3050603733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_stream_len_max.3646302678 |
| Short name | T238 |
| Test name | |
| Test status | |
| Simulation time | 765246115 ps |
| CPU time | 3.95 seconds |
| Started | Aug 29 03:28:32 AM UTC 24 |
| Finished | Aug 29 03:28:37 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3646302678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stream_len_max.3646302678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_streaming_out.3135217238 |
| Short name | T187 |
| Test name | |
| Test status | |
| Simulation time | 2349399385 ps |
| CPU time | 16.33 seconds |
| Started | Aug 29 03:28:31 AM UTC 24 |
| Finished | Aug 29 03:28:49 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3135217238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_streaming_out.3135217238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/0.usbdev_tx_rx_disruption.3039911314 |
| Short name | T157 |
| Test name | |
| Test status | |
| Simulation time | 551864961 ps |
| CPU time | 2.88 seconds |
| Started | Aug 29 03:28:32 AM UTC 24 |
| Finished | Aug 29 03:28:36 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3039911314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_tx _rx_disruption.3039911314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/0.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_disconnect.156404436 |
| Short name | T9 |
| Test name | |
| Test status | |
| Simulation time | 3427481789 ps |
| CPU time | 11.06 seconds |
| Started | Aug 29 03:28:35 AM UTC 24 |
| Finished | Aug 29 03:28:47 AM UTC 24 |
| Peak memory | 227476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=156404436 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_disconnect.156404436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_av_buffer.3185426856 |
| Short name | T168 |
| Test name | |
| Test status | |
| Simulation time | 182561403 ps |
| CPU time | 1.52 seconds |
| Started | Aug 29 03:28:37 AM UTC 24 |
| Finished | Aug 29 03:28:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3185426856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_av_buffer.3185426856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_av_overflow.3409827347 |
| Short name | T60 |
| Test name | |
| Test status | |
| Simulation time | 134318265 ps |
| CPU time | 1.41 seconds |
| Started | Aug 29 03:28:37 AM UTC 24 |
| Finished | Aug 29 03:28:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3409827347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_av_overflow.3409827347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_bitstuff_err.4091945484 |
| Short name | T83 |
| Test name | |
| Test status | |
| Simulation time | 160883689 ps |
| CPU time | 1.42 seconds |
| Started | Aug 29 03:28:38 AM UTC 24 |
| Finished | Aug 29 03:28:40 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4091945484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_bitstuff_err.4091945484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_clear.1227903044 |
| Short name | T111 |
| Test name | |
| Test status | |
| Simulation time | 537665892 ps |
| CPU time | 2.95 seconds |
| Started | Aug 29 03:28:38 AM UTC 24 |
| Finished | Aug 29 03:28:42 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1227903044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 1.usbdev_data_toggle_clear.1227903044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_restore.2206243809 |
| Short name | T110 |
| Test name | |
| Test status | |
| Simulation time | 348557306 ps |
| CPU time | 2.15 seconds |
| Started | Aug 29 03:28:39 AM UTC 24 |
| Finished | Aug 29 03:28:42 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2206243809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_data_toggle_restore.2206243809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_device_address.1288960362 |
| Short name | T103 |
| Test name | |
| Test status | |
| Simulation time | 33094545674 ps |
| CPU time | 65.75 seconds |
| Started | Aug 29 03:28:40 AM UTC 24 |
| Finished | Aug 29 03:29:48 AM UTC 24 |
| Peak memory | 217432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1288960362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_device_address.1288960362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_device_timeout.3219182685 |
| Short name | T664 |
| Test name | |
| Test status | |
| Simulation time | 7761160807 ps |
| CPU time | 73.26 seconds |
| Started | Aug 29 03:28:40 AM UTC 24 |
| Finished | Aug 29 03:29:55 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3219182685 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_device_timeout.3219182685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_disable_endpoint.1840941299 |
| Short name | T264 |
| Test name | |
| Test status | |
| Simulation time | 1377406567 ps |
| CPU time | 5.46 seconds |
| Started | Aug 29 03:28:41 AM UTC 24 |
| Finished | Aug 29 03:28:48 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1840941299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 1.usbdev_disable_endpoint.1840941299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_disconnected.3432237682 |
| Short name | T62 |
| Test name | |
| Test status | |
| Simulation time | 175388038 ps |
| CPU time | 1.43 seconds |
| Started | Aug 29 03:28:43 AM UTC 24 |
| Finished | Aug 29 03:28:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3432237682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_disconnected.3432237682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_enable.895392298 |
| Short name | T276 |
| Test name | |
| Test status | |
| Simulation time | 56691916 ps |
| CPU time | 1.14 seconds |
| Started | Aug 29 03:28:44 AM UTC 24 |
| Finished | Aug 29 03:28:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=895392298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_enable.895392298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_access.486657378 |
| Short name | T158 |
| Test name | |
| Test status | |
| Simulation time | 848734694 ps |
| CPU time | 3.34 seconds |
| Started | Aug 29 03:28:46 AM UTC 24 |
| Finished | Aug 29 03:28:50 AM UTC 24 |
| Peak memory | 217188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=486657378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_endpoint_access.486657378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_fifo_levels.2668849440 |
| Short name | T165 |
| Test name | |
| Test status | |
| Simulation time | 159128828 ps |
| CPU time | 1.09 seconds |
| Started | Aug 29 03:28:48 AM UTC 24 |
| Finished | Aug 29 03:28:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2668849440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_fifo_levels.2668849440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_fifo_rst.2922972913 |
| Short name | T651 |
| Test name | |
| Test status | |
| Simulation time | 251087059 ps |
| CPU time | 3.35 seconds |
| Started | Aug 29 03:28:49 AM UTC 24 |
| Finished | Aug 29 03:28:53 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2922972913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_fifo_rst.2922972913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_freq_hiclk.108792188 |
| Short name | T847 |
| Test name | |
| Test status | |
| Simulation time | 117196268027 ps |
| CPU time | 290.53 seconds |
| Started | Aug 29 03:28:50 AM UTC 24 |
| Finished | Aug 29 03:33:45 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=108792188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_hiclk.108792188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_freq_hiclk_max.273403569 |
| Short name | T805 |
| Test name | |
| Test status | |
| Simulation time | 91287158571 ps |
| CPU time | 249.77 seconds |
| Started | Aug 29 03:28:51 AM UTC 24 |
| Finished | Aug 29 03:33:05 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=273403569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 1.usbdev_freq_hiclk_max.273403569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_freq_loclk.401909037 |
| Short name | T794 |
| Test name | |
| Test status | |
| Simulation time | 100100260782 ps |
| CPU time | 237.98 seconds |
| Started | Aug 29 03:28:51 AM UTC 24 |
| Finished | Aug 29 03:32:53 AM UTC 24 |
| Peak memory | 217432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=401909037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_loclk.401909037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_freq_loclk_max.310852691 |
| Short name | T793 |
| Test name | |
| Test status | |
| Simulation time | 100010717732 ps |
| CPU time | 237.75 seconds |
| Started | Aug 29 03:28:51 AM UTC 24 |
| Finished | Aug 29 03:32:53 AM UTC 24 |
| Peak memory | 217432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=310852691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 1.usbdev_freq_loclk_max.310852691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_freq_phase.1254431641 |
| Short name | T723 |
| Test name | |
| Test status | |
| Simulation time | 82175545278 ps |
| CPU time | 158.59 seconds |
| Started | Aug 29 03:28:54 AM UTC 24 |
| Finished | Aug 29 03:31:36 AM UTC 24 |
| Peak memory | 217484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1254431641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 1.usbdev_freq_phase.1254431641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_in_iso.726847828 |
| Short name | T105 |
| Test name | |
| Test status | |
| Simulation time | 204630256 ps |
| CPU time | 1.78 seconds |
| Started | Aug 29 03:29:00 AM UTC 24 |
| Finished | Aug 29 03:29:03 AM UTC 24 |
| Peak memory | 227416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=726847828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_in_iso.726847828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_in_stall.504659039 |
| Short name | T616 |
| Test name | |
| Test status | |
| Simulation time | 199658327 ps |
| CPU time | 1.54 seconds |
| Started | Aug 29 03:29:00 AM UTC 24 |
| Finished | Aug 29 03:29:03 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=504659039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_in_stall.504659039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_in_trans.24314657 |
| Short name | T652 |
| Test name | |
| Test status | |
| Simulation time | 187853978 ps |
| CPU time | 1.28 seconds |
| Started | Aug 29 03:29:03 AM UTC 24 |
| Finished | Aug 29 03:29:06 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=24314657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 1.usbdev_in_trans.24314657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_invalid_sync.1100295441 |
| Short name | T185 |
| Test name | |
| Test status | |
| Simulation time | 3218642364 ps |
| CPU time | 45.73 seconds |
| Started | Aug 29 03:28:56 AM UTC 24 |
| Finished | Aug 29 03:29:43 AM UTC 24 |
| Peak memory | 229676 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1100295441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 1.usbdev_invalid_sync.1100295441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_iso_retraction.1659240213 |
| Short name | T116 |
| Test name | |
| Test status | |
| Simulation time | 4972884661 ps |
| CPU time | 34.99 seconds |
| Started | Aug 29 03:29:03 AM UTC 24 |
| Finished | Aug 29 03:29:40 AM UTC 24 |
| Peak memory | 217380 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1659240213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_iso_retraction.1659240213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_link_in_err.3364273840 |
| Short name | T653 |
| Test name | |
| Test status | |
| Simulation time | 231035026 ps |
| CPU time | 1.66 seconds |
| Started | Aug 29 03:29:04 AM UTC 24 |
| Finished | Aug 29 03:29:06 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3364273840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_link_in_err.3364273840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_link_resume.1387705738 |
| Short name | T68 |
| Test name | |
| Test status | |
| Simulation time | 24797344695 ps |
| CPU time | 55.53 seconds |
| Started | Aug 29 03:29:07 AM UTC 24 |
| Finished | Aug 29 03:30:04 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1387705738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_link_resume.1387705738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_link_suspend.2168218840 |
| Short name | T316 |
| Test name | |
| Test status | |
| Simulation time | 5306157590 ps |
| CPU time | 14.59 seconds |
| Started | Aug 29 03:29:07 AM UTC 24 |
| Finished | Aug 29 03:29:22 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2168218840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_link_suspend.2168218840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_max_inter_pkt_delay.892096288 |
| Short name | T658 |
| Test name | |
| Test status | |
| Simulation time | 2754002769 ps |
| CPU time | 30.95 seconds |
| Started | Aug 29 03:29:12 AM UTC 24 |
| Finished | Aug 29 03:29:44 AM UTC 24 |
| Peak memory | 229576 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=892096288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_inter_pkt_delay.892096288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_max_length_in_transaction.2626905976 |
| Short name | T654 |
| Test name | |
| Test status | |
| Simulation time | 247715646 ps |
| CPU time | 1.63 seconds |
| Started | Aug 29 03:29:13 AM UTC 24 |
| Finished | Aug 29 03:29:16 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2626905976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_max_length_in_transaction.2626905976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_max_length_out_transaction.3820668178 |
| Short name | T601 |
| Test name | |
| Test status | |
| Simulation time | 193614584 ps |
| CPU time | 1.56 seconds |
| Started | Aug 29 03:29:16 AM UTC 24 |
| Finished | Aug 29 03:29:19 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3820668178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 1.usbdev_max_length_out_transaction.3820668178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_max_non_iso_usb_traffic.2601882040 |
| Short name | T164 |
| Test name | |
| Test status | |
| Simulation time | 2587703137 ps |
| CPU time | 28.91 seconds |
| Started | Aug 29 03:29:17 AM UTC 24 |
| Finished | Aug 29 03:29:48 AM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2601882040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_non_iso_usb_traffic.2601882040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_max_usb_traffic.1962804417 |
| Short name | T92 |
| Test name | |
| Test status | |
| Simulation time | 3759604828 ps |
| CPU time | 44.92 seconds |
| Started | Aug 29 03:29:20 AM UTC 24 |
| Finished | Aug 29 03:30:06 AM UTC 24 |
| Peak memory | 234144 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1962804417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_usb_traffic.1962804417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_min_inter_pkt_delay.3683267359 |
| Short name | T694 |
| Test name | |
| Test status | |
| Simulation time | 2841968062 ps |
| CPU time | 92.81 seconds |
| Started | Aug 29 03:29:20 AM UTC 24 |
| Finished | Aug 29 03:30:55 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3683267359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_min_inter_pkt_delay.3683267359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_min_length_in_transaction.190012470 |
| Short name | T317 |
| Test name | |
| Test status | |
| Simulation time | 147339229 ps |
| CPU time | 1.47 seconds |
| Started | Aug 29 03:29:21 AM UTC 24 |
| Finished | Aug 29 03:29:24 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=190012470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 1.usbdev_min_length_in_transaction.190012470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_min_length_out_transaction.3677368919 |
| Short name | T318 |
| Test name | |
| Test status | |
| Simulation time | 150065728 ps |
| CPU time | 1.39 seconds |
| Started | Aug 29 03:29:23 AM UTC 24 |
| Finished | Aug 29 03:29:26 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3677368919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 1.usbdev_min_length_out_transaction.3677368919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_out_iso.2375210260 |
| Short name | T239 |
| Test name | |
| Test status | |
| Simulation time | 157047993 ps |
| CPU time | 1.48 seconds |
| Started | Aug 29 03:29:24 AM UTC 24 |
| Finished | Aug 29 03:29:27 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2375210260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_out_iso.2375210260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_out_stall.772765418 |
| Short name | T319 |
| Test name | |
| Test status | |
| Simulation time | 215703215 ps |
| CPU time | 1.62 seconds |
| Started | Aug 29 03:29:26 AM UTC 24 |
| Finished | Aug 29 03:29:28 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=772765418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_out_stall.772765418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_out_trans_nak.4198584100 |
| Short name | T579 |
| Test name | |
| Test status | |
| Simulation time | 149911042 ps |
| CPU time | 1.34 seconds |
| Started | Aug 29 03:29:27 AM UTC 24 |
| Finished | Aug 29 03:29:29 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4198584100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 1.usbdev_out_trans_nak.4198584100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_pending_in_trans.2449930442 |
| Short name | T167 |
| Test name | |
| Test status | |
| Simulation time | 157708483 ps |
| CPU time | 1.47 seconds |
| Started | Aug 29 03:29:27 AM UTC 24 |
| Finished | Aug 29 03:29:30 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2449930442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 1.usbdev_pending_in_trans.2449930442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_pinflip.2307566514 |
| Short name | T202 |
| Test name | |
| Test status | |
| Simulation time | 221019690 ps |
| CPU time | 1.74 seconds |
| Started | Aug 29 03:29:28 AM UTC 24 |
| Finished | Aug 29 03:29:31 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2307566514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_config_pinflip.2307566514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_rand_bus_type.1738738514 |
| Short name | T228 |
| Test name | |
| Test status | |
| Simulation time | 202389683 ps |
| CPU time | 1.77 seconds |
| Started | Aug 29 03:29:29 AM UTC 24 |
| Finished | Aug 29 03:29:32 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1738738514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 1.usbdev_phy_config_rand_bus_type.1738738514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_usb_ref_disable.3003869171 |
| Short name | T217 |
| Test name | |
| Test status | |
| Simulation time | 154717152 ps |
| CPU time | 1.39 seconds |
| Started | Aug 29 03:29:30 AM UTC 24 |
| Finished | Aug 29 03:29:33 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3003869171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 1.usbdev_phy_config_usb_ref_disable.3003869171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_phy_pins_sense.2847209362 |
| Short name | T26 |
| Test name | |
| Test status | |
| Simulation time | 36819580 ps |
| CPU time | 1.1 seconds |
| Started | Aug 29 03:29:30 AM UTC 24 |
| Finished | Aug 29 03:29:32 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2847209362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_pins_sense.2847209362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_buffer.924604098 |
| Short name | T279 |
| Test name | |
| Test status | |
| Simulation time | 13295484696 ps |
| CPU time | 51.59 seconds |
| Started | Aug 29 03:29:31 AM UTC 24 |
| Finished | Aug 29 03:30:25 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=924604098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_pkt_buffer.924604098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_received.4288747386 |
| Short name | T430 |
| Test name | |
| Test status | |
| Simulation time | 166528930 ps |
| CPU time | 1.52 seconds |
| Started | Aug 29 03:29:33 AM UTC 24 |
| Finished | Aug 29 03:29:36 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4288747386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_pkt_received.4288747386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_sent.1962035529 |
| Short name | T655 |
| Test name | |
| Test status | |
| Simulation time | 214632390 ps |
| CPU time | 1.38 seconds |
| Started | Aug 29 03:29:33 AM UTC 24 |
| Finished | Aug 29 03:29:36 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1962035529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_pkt_sent.1962035529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_rand_bus_disconnects.2406862161 |
| Short name | T603 |
| Test name | |
| Test status | |
| Simulation time | 4259195750 ps |
| CPU time | 42.16 seconds |
| Started | Aug 29 03:29:35 AM UTC 24 |
| Finished | Aug 29 03:30:18 AM UTC 24 |
| Peak memory | 229628 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2406862161 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_bus_disconnects.2406862161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_rand_bus_resets.2957883862 |
| Short name | T607 |
| Test name | |
| Test status | |
| Simulation time | 5774650548 ps |
| CPU time | 28.38 seconds |
| Started | Aug 29 03:29:37 AM UTC 24 |
| Finished | Aug 29 03:30:06 AM UTC 24 |
| Peak memory | 229592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2957883862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_bus_resets.2957883862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_rand_suspends.536733767 |
| Short name | T689 |
| Test name | |
| Test status | |
| Simulation time | 10036388292 ps |
| CPU time | 70.88 seconds |
| Started | Aug 29 03:29:37 AM UTC 24 |
| Finished | Aug 29 03:30:49 AM UTC 24 |
| Peak memory | 229652 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=536733767 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_suspends.536733767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_random_length_in_transaction.3613324655 |
| Short name | T656 |
| Test name | |
| Test status | |
| Simulation time | 192174596 ps |
| CPU time | 1.61 seconds |
| Started | Aug 29 03:29:33 AM UTC 24 |
| Finished | Aug 29 03:29:36 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3613324655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 1.usbdev_random_length_in_transaction.3613324655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_random_length_out_transaction.2381924141 |
| Short name | T657 |
| Test name | |
| Test status | |
| Simulation time | 188445739 ps |
| CPU time | 1.58 seconds |
| Started | Aug 29 03:29:35 AM UTC 24 |
| Finished | Aug 29 03:29:37 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2381924141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 1.usbdev_random_length_out_transaction.2381924141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_resume_link_active.869710913 |
| Short name | T94 |
| Test name | |
| Test status | |
| Simulation time | 20161838376 ps |
| CPU time | 51.13 seconds |
| Started | Aug 29 03:29:37 AM UTC 24 |
| Finished | Aug 29 03:30:30 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=869710913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 1.usbdev_resume_link_active.869710913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_rx_crc_err.1221873583 |
| Short name | T75 |
| Test name | |
| Test status | |
| Simulation time | 161614720 ps |
| CPU time | 1.02 seconds |
| Started | Aug 29 03:29:38 AM UTC 24 |
| Finished | Aug 29 03:29:40 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1221873583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_rx_crc_err.1221873583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_rx_full.3432918619 |
| Short name | T52 |
| Test name | |
| Test status | |
| Simulation time | 366607294 ps |
| CPU time | 1.95 seconds |
| Started | Aug 29 03:29:38 AM UTC 24 |
| Finished | Aug 29 03:29:41 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3432918619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_rx_full.3432918619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_rx_pid_err.1324566977 |
| Short name | T78 |
| Test name | |
| Test status | |
| Simulation time | 166078985 ps |
| CPU time | 1.44 seconds |
| Started | Aug 29 03:29:40 AM UTC 24 |
| Finished | Aug 29 03:29:43 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1324566977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_rx_pid_err.1324566977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_sec_cm.512302297 |
| Short name | T221 |
| Test name | |
| Test status | |
| Simulation time | 983044775 ps |
| CPU time | 3.46 seconds |
| Started | Aug 29 03:29:49 AM UTC 24 |
| Finished | Aug 29 03:29:54 AM UTC 24 |
| Peak memory | 251544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=512302297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_sec_cm.512302297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_setup_priority.1644341032 |
| Short name | T50 |
| Test name | |
| Test status | |
| Simulation time | 355400279 ps |
| CPU time | 1.94 seconds |
| Started | Aug 29 03:29:41 AM UTC 24 |
| Finished | Aug 29 03:29:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1644341032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_setup_priority.1644341032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_setup_priority_over_stall_response.1976313255 |
| Short name | T199 |
| Test name | |
| Test status | |
| Simulation time | 207886098 ps |
| CPU time | 1.54 seconds |
| Started | Aug 29 03:29:41 AM UTC 24 |
| Finished | Aug 29 03:29:44 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1976313255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 1.usbdev_setup_priority_over_stall_response.1976313255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_setup_stage.269276352 |
| Short name | T659 |
| Test name | |
| Test status | |
| Simulation time | 157852053 ps |
| CPU time | 1.2 seconds |
| Started | Aug 29 03:29:43 AM UTC 24 |
| Finished | Aug 29 03:29:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=269276352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_setup_stage.269276352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_setup_trans_ignored.3324844240 |
| Short name | T248 |
| Test name | |
| Test status | |
| Simulation time | 157345594 ps |
| CPU time | 1.35 seconds |
| Started | Aug 29 03:29:44 AM UTC 24 |
| Finished | Aug 29 03:29:46 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3324844240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 1.usbdev_setup_trans_ignored.3324844240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_smoke.3271227851 |
| Short name | T660 |
| Test name | |
| Test status | |
| Simulation time | 276649733 ps |
| CPU time | 1.79 seconds |
| Started | Aug 29 03:29:44 AM UTC 24 |
| Finished | Aug 29 03:29:47 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3271227851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_smoke.3271227851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_spurious_pids_ignored.1527170750 |
| Short name | T668 |
| Test name | |
| Test status | |
| Simulation time | 1821243093 ps |
| CPU time | 22.35 seconds |
| Started | Aug 29 03:29:45 AM UTC 24 |
| Finished | Aug 29 03:30:09 AM UTC 24 |
| Peak memory | 227352 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1527170750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 1.usbdev_spurious_pids_ignored.1527170750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_stall_priority_over_nak.3326243401 |
| Short name | T583 |
| Test name | |
| Test status | |
| Simulation time | 254736453 ps |
| CPU time | 1.4 seconds |
| Started | Aug 29 03:29:45 AM UTC 24 |
| Finished | Aug 29 03:29:48 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3326243401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stall_priority_over_nak.3326243401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_stall_trans.3506486660 |
| Short name | T661 |
| Test name | |
| Test status | |
| Simulation time | 186018163 ps |
| CPU time | 1.48 seconds |
| Started | Aug 29 03:29:45 AM UTC 24 |
| Finished | Aug 29 03:29:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3506486660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_stall_trans.3506486660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_stream_len_max.121545669 |
| Short name | T662 |
| Test name | |
| Test status | |
| Simulation time | 1262973719 ps |
| CPU time | 5.23 seconds |
| Started | Aug 29 03:29:46 AM UTC 24 |
| Finished | Aug 29 03:29:53 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=121545669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 1.usbdev_stream_len_max.121545669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_streaming_out.1346188438 |
| Short name | T693 |
| Test name | |
| Test status | |
| Simulation time | 2395739075 ps |
| CPU time | 67.03 seconds |
| Started | Aug 29 03:29:45 AM UTC 24 |
| Finished | Aug 29 03:30:54 AM UTC 24 |
| Peak memory | 234076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1346188438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_streaming_out.1346188438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_stress_usb_traffic.2606665857 |
| Short name | T81 |
| Test name | |
| Test status | |
| Simulation time | 6340378991 ps |
| CPU time | 39.54 seconds |
| Started | Aug 29 03:29:47 AM UTC 24 |
| Finished | Aug 29 03:30:28 AM UTC 24 |
| Peak memory | 234344 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2606665857 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stress_usb_traffic.2606665857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_timeout_missing_host_handshake.2843677869 |
| Short name | T109 |
| Test name | |
| Test status | |
| Simulation time | 1715572549 ps |
| CPU time | 54.93 seconds |
| Started | Aug 29 03:28:40 AM UTC 24 |
| Finished | Aug 29 03:29:37 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2843677869 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_timeout_missing_host_handshake.2843677869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/1.usbdev_tx_rx_disruption.2719991837 |
| Short name | T220 |
| Test name | |
| Test status | |
| Simulation time | 483938653 ps |
| CPU time | 2.81 seconds |
| Started | Aug 29 03:29:49 AM UTC 24 |
| Finished | Aug 29 03:29:53 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2719991837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_tx _rx_disruption.2719991837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/1.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_alert_test.1532462434 |
| Short name | T1108 |
| Test name | |
| Test status | |
| Simulation time | 53502596 ps |
| CPU time | 1.05 seconds |
| Started | Aug 29 03:36:25 AM UTC 24 |
| Finished | Aug 29 03:36:28 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1532462434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 10.usbdev_alert_test.1532462434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_disconnect.2914309369 |
| Short name | T1094 |
| Test name | |
| Test status | |
| Simulation time | 10359587877 ps |
| CPU time | 21.21 seconds |
| Started | Aug 29 03:36:00 AM UTC 24 |
| Finished | Aug 29 03:36:22 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2914309369 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_disconnect.2914309369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_reset.1536143390 |
| Short name | T1136 |
| Test name | |
| Test status | |
| Simulation time | 19848184156 ps |
| CPU time | 34.91 seconds |
| Started | Aug 29 03:36:00 AM UTC 24 |
| Finished | Aug 29 03:36:36 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1536143390 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_reset.1536143390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_resume.458033484 |
| Short name | T1141 |
| Test name | |
| Test status | |
| Simulation time | 25802026120 ps |
| CPU time | 36.74 seconds |
| Started | Aug 29 03:36:00 AM UTC 24 |
| Finished | Aug 29 03:36:38 AM UTC 24 |
| Peak memory | 227668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=458033484 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_resume.458033484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_av_buffer.3452018672 |
| Short name | T1051 |
| Test name | |
| Test status | |
| Simulation time | 162063582 ps |
| CPU time | 1.42 seconds |
| Started | Aug 29 03:36:02 AM UTC 24 |
| Finished | Aug 29 03:36:04 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3452018672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_av_buffer.3452018672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_bitstuff_err.3940932150 |
| Short name | T1052 |
| Test name | |
| Test status | |
| Simulation time | 151725287 ps |
| CPU time | 1.37 seconds |
| Started | Aug 29 03:36:02 AM UTC 24 |
| Finished | Aug 29 03:36:04 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3940932150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_bitstuff_err.3940932150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_data_toggle_clear.2240082941 |
| Short name | T1053 |
| Test name | |
| Test status | |
| Simulation time | 481667467 ps |
| CPU time | 2.69 seconds |
| Started | Aug 29 03:36:02 AM UTC 24 |
| Finished | Aug 29 03:36:05 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2240082941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 10.usbdev_data_toggle_clear.2240082941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_data_toggle_restore.666060789 |
| Short name | T636 |
| Test name | |
| Test status | |
| Simulation time | 529428091 ps |
| CPU time | 3.06 seconds |
| Started | Aug 29 03:36:02 AM UTC 24 |
| Finished | Aug 29 03:36:06 AM UTC 24 |
| Peak memory | 217044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=666060789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_data_toggle_restore.666060789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_device_timeout.2151076398 |
| Short name | T1092 |
| Test name | |
| Test status | |
| Simulation time | 728606783 ps |
| CPU time | 15.76 seconds |
| Started | Aug 29 03:36:05 AM UTC 24 |
| Finished | Aug 29 03:36:22 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2151076398 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_device_timeout.2151076398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_disable_endpoint.1794636154 |
| Short name | T604 |
| Test name | |
| Test status | |
| Simulation time | 1219235048 ps |
| CPU time | 4.7 seconds |
| Started | Aug 29 03:36:05 AM UTC 24 |
| Finished | Aug 29 03:36:11 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1794636154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 10.usbdev_disable_endpoint.1794636154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_disconnected.902182944 |
| Short name | T1057 |
| Test name | |
| Test status | |
| Simulation time | 195051957 ps |
| CPU time | 1.55 seconds |
| Started | Aug 29 03:36:05 AM UTC 24 |
| Finished | Aug 29 03:36:08 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=902182944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_disconnected.902182944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_enable.3024410720 |
| Short name | T1055 |
| Test name | |
| Test status | |
| Simulation time | 32421052 ps |
| CPU time | 1.06 seconds |
| Started | Aug 29 03:36:05 AM UTC 24 |
| Finished | Aug 29 03:36:07 AM UTC 24 |
| Peak memory | 214988 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3024410720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 10.usbdev_enable.3024410720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_endpoint_access.1705663038 |
| Short name | T1061 |
| Test name | |
| Test status | |
| Simulation time | 899937277 ps |
| CPU time | 3.21 seconds |
| Started | Aug 29 03:36:05 AM UTC 24 |
| Finished | Aug 29 03:36:09 AM UTC 24 |
| Peak memory | 217036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1705663038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_endpoint_access.1705663038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_endpoint_types.140319008 |
| Short name | T1056 |
| Test name | |
| Test status | |
| Simulation time | 151347463 ps |
| CPU time | 1.46 seconds |
| Started | Aug 29 03:36:05 AM UTC 24 |
| Finished | Aug 29 03:36:08 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=140319008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 10.usbdev_endpoint_types.140319008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_fifo_rst.2162957635 |
| Short name | T1071 |
| Test name | |
| Test status | |
| Simulation time | 429676871 ps |
| CPU time | 4.06 seconds |
| Started | Aug 29 03:36:08 AM UTC 24 |
| Finished | Aug 29 03:36:13 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2162957635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_fifo_rst.2162957635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_in_iso.3761842021 |
| Short name | T1066 |
| Test name | |
| Test status | |
| Simulation time | 163470117 ps |
| CPU time | 1.58 seconds |
| Started | Aug 29 03:36:08 AM UTC 24 |
| Finished | Aug 29 03:36:11 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3761842021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 10.usbdev_in_iso.3761842021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_in_stall.627050000 |
| Short name | T1064 |
| Test name | |
| Test status | |
| Simulation time | 182398880 ps |
| CPU time | 1.43 seconds |
| Started | Aug 29 03:36:08 AM UTC 24 |
| Finished | Aug 29 03:36:11 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=627050000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 10.usbdev_in_stall.627050000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_in_trans.4152794419 |
| Short name | T1068 |
| Test name | |
| Test status | |
| Simulation time | 215634504 ps |
| CPU time | 1.62 seconds |
| Started | Aug 29 03:36:08 AM UTC 24 |
| Finished | Aug 29 03:36:11 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4152794419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_in_trans.4152794419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_invalid_sync.542421852 |
| Short name | T1144 |
| Test name | |
| Test status | |
| Simulation time | 4089553286 ps |
| CPU time | 29.66 seconds |
| Started | Aug 29 03:36:08 AM UTC 24 |
| Finished | Aug 29 03:36:39 AM UTC 24 |
| Peak memory | 234088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=542421852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 10.usbdev_invalid_sync.542421852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_iso_retraction.4206351841 |
| Short name | T298 |
| Test name | |
| Test status | |
| Simulation time | 8306542228 ps |
| CPU time | 90.1 seconds |
| Started | Aug 29 03:36:08 AM UTC 24 |
| Finished | Aug 29 03:37:40 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4206351841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_iso_retraction.4206351841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_link_in_err.2240520377 |
| Short name | T1067 |
| Test name | |
| Test status | |
| Simulation time | 175920870 ps |
| CPU time | 1.52 seconds |
| Started | Aug 29 03:36:08 AM UTC 24 |
| Finished | Aug 29 03:36:11 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2240520377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_link_in_err.2240520377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_link_resume.2952751977 |
| Short name | T1142 |
| Test name | |
| Test status | |
| Simulation time | 15833581637 ps |
| CPU time | 24.67 seconds |
| Started | Aug 29 03:36:12 AM UTC 24 |
| Finished | Aug 29 03:36:38 AM UTC 24 |
| Peak memory | 217192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2952751977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_link_resume.2952751977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_link_suspend.632335698 |
| Short name | T1121 |
| Test name | |
| Test status | |
| Simulation time | 11368398544 ps |
| CPU time | 17.7 seconds |
| Started | Aug 29 03:36:12 AM UTC 24 |
| Finished | Aug 29 03:36:31 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=632335698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_link_suspend.632335698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_low_speed_traffic.2328063447 |
| Short name | T1243 |
| Test name | |
| Test status | |
| Simulation time | 3358413986 ps |
| CPU time | 88.08 seconds |
| Started | Aug 29 03:36:12 AM UTC 24 |
| Finished | Aug 29 03:37:42 AM UTC 24 |
| Peak memory | 234184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2328063447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_low_speed_traffic.2328063447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_max_inter_pkt_delay.3821042168 |
| Short name | T1285 |
| Test name | |
| Test status | |
| Simulation time | 3144408571 ps |
| CPU time | 83.91 seconds |
| Started | Aug 29 03:36:12 AM UTC 24 |
| Finished | Aug 29 03:37:38 AM UTC 24 |
| Peak memory | 227524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3821042168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_inter_pkt_delay.3821042168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_max_length_in_transaction.1744375309 |
| Short name | T1074 |
| Test name | |
| Test status | |
| Simulation time | 236545388 ps |
| CPU time | 1.58 seconds |
| Started | Aug 29 03:36:12 AM UTC 24 |
| Finished | Aug 29 03:36:15 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1744375309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 10.usbdev_max_length_in_transaction.1744375309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_max_length_out_transaction.2708256325 |
| Short name | T1075 |
| Test name | |
| Test status | |
| Simulation time | 243995198 ps |
| CPU time | 1.79 seconds |
| Started | Aug 29 03:36:12 AM UTC 24 |
| Finished | Aug 29 03:36:15 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2708256325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 10.usbdev_max_length_out_transaction.2708256325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_max_non_iso_usb_traffic.1287025302 |
| Short name | T1149 |
| Test name | |
| Test status | |
| Simulation time | 2775504142 ps |
| CPU time | 28.59 seconds |
| Started | Aug 29 03:36:12 AM UTC 24 |
| Finished | Aug 29 03:36:43 AM UTC 24 |
| Peak memory | 229712 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1287025302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_non_iso_usb_traffic.1287025302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_max_usb_traffic.3325907852 |
| Short name | T1145 |
| Test name | |
| Test status | |
| Simulation time | 3221611595 ps |
| CPU time | 26.02 seconds |
| Started | Aug 29 03:36:12 AM UTC 24 |
| Finished | Aug 29 03:36:40 AM UTC 24 |
| Peak memory | 234340 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3325907852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_usb_traffic.3325907852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_min_inter_pkt_delay.868177906 |
| Short name | T1218 |
| Test name | |
| Test status | |
| Simulation time | 2155707457 ps |
| CPU time | 58.19 seconds |
| Started | Aug 29 03:36:12 AM UTC 24 |
| Finished | Aug 29 03:37:13 AM UTC 24 |
| Peak memory | 227496 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=868177906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_min_inter_pkt_delay.868177906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_min_length_in_transaction.3283394273 |
| Short name | T1076 |
| Test name | |
| Test status | |
| Simulation time | 159918478 ps |
| CPU time | 1.43 seconds |
| Started | Aug 29 03:36:12 AM UTC 24 |
| Finished | Aug 29 03:36:15 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3283394273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 10.usbdev_min_length_in_transaction.3283394273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_min_length_out_transaction.316545410 |
| Short name | T1077 |
| Test name | |
| Test status | |
| Simulation time | 166838823 ps |
| CPU time | 1.54 seconds |
| Started | Aug 29 03:36:13 AM UTC 24 |
| Finished | Aug 29 03:36:15 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=316545410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 10.usbdev_min_length_out_transaction.316545410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_out_iso.2333652008 |
| Short name | T1081 |
| Test name | |
| Test status | |
| Simulation time | 206468528 ps |
| CPU time | 1.3 seconds |
| Started | Aug 29 03:36:15 AM UTC 24 |
| Finished | Aug 29 03:36:17 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2333652008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 10.usbdev_out_iso.2333652008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_out_stall.847434265 |
| Short name | T1082 |
| Test name | |
| Test status | |
| Simulation time | 176881344 ps |
| CPU time | 1.44 seconds |
| Started | Aug 29 03:36:15 AM UTC 24 |
| Finished | Aug 29 03:36:17 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=847434265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_out_stall.847434265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_out_trans_nak.2232999262 |
| Short name | T1083 |
| Test name | |
| Test status | |
| Simulation time | 183663969 ps |
| CPU time | 1.46 seconds |
| Started | Aug 29 03:36:15 AM UTC 24 |
| Finished | Aug 29 03:36:17 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2232999262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 10.usbdev_out_trans_nak.2232999262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_pending_in_trans.1947646321 |
| Short name | T1046 |
| Test name | |
| Test status | |
| Simulation time | 169271290 ps |
| CPU time | 1.44 seconds |
| Started | Aug 29 03:36:15 AM UTC 24 |
| Finished | Aug 29 03:36:17 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1947646321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 10.usbdev_pending_in_trans.1947646321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_phy_config_pinflip.2086541324 |
| Short name | T1085 |
| Test name | |
| Test status | |
| Simulation time | 215476981 ps |
| CPU time | 1.68 seconds |
| Started | Aug 29 03:36:15 AM UTC 24 |
| Finished | Aug 29 03:36:18 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2086541324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 10.usbdev_phy_config_pinflip.2086541324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_phy_config_usb_ref_disable.3416963850 |
| Short name | T1084 |
| Test name | |
| Test status | |
| Simulation time | 141293046 ps |
| CPU time | 1.28 seconds |
| Started | Aug 29 03:36:15 AM UTC 24 |
| Finished | Aug 29 03:36:17 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3416963850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 10.usbdev_phy_config_usb_ref_disable.3416963850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_phy_pins_sense.2148488061 |
| Short name | T1080 |
| Test name | |
| Test status | |
| Simulation time | 38580377 ps |
| CPU time | 1 seconds |
| Started | Aug 29 03:36:15 AM UTC 24 |
| Finished | Aug 29 03:36:17 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2148488061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_phy_pins_sense.2148488061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_buffer.495264096 |
| Short name | T295 |
| Test name | |
| Test status | |
| Simulation time | 8034716745 ps |
| CPU time | 25.48 seconds |
| Started | Aug 29 03:36:15 AM UTC 24 |
| Finished | Aug 29 03:36:42 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=495264096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_pkt_buffer.495264096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_received.4244387616 |
| Short name | T1088 |
| Test name | |
| Test status | |
| Simulation time | 205771775 ps |
| CPU time | 1.61 seconds |
| Started | Aug 29 03:36:17 AM UTC 24 |
| Finished | Aug 29 03:36:20 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4244387616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_pkt_received.4244387616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_sent.1499526140 |
| Short name | T1089 |
| Test name | |
| Test status | |
| Simulation time | 206671464 ps |
| CPU time | 1.59 seconds |
| Started | Aug 29 03:36:17 AM UTC 24 |
| Finished | Aug 29 03:36:20 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1499526140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_pkt_sent.1499526140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_random_length_in_transaction.2057430060 |
| Short name | T1087 |
| Test name | |
| Test status | |
| Simulation time | 146661363 ps |
| CPU time | 1.46 seconds |
| Started | Aug 29 03:36:17 AM UTC 24 |
| Finished | Aug 29 03:36:20 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2057430060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 10.usbdev_random_length_in_transaction.2057430060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_random_length_out_transaction.2447338396 |
| Short name | T1086 |
| Test name | |
| Test status | |
| Simulation time | 186328186 ps |
| CPU time | 1.61 seconds |
| Started | Aug 29 03:36:17 AM UTC 24 |
| Finished | Aug 29 03:36:20 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2447338396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 10.usbdev_random_length_out_transaction.2447338396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_resume_link_active.92269353 |
| Short name | T1047 |
| Test name | |
| Test status | |
| Simulation time | 20164589217 ps |
| CPU time | 27.66 seconds |
| Started | Aug 29 03:36:17 AM UTC 24 |
| Finished | Aug 29 03:36:46 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=92269353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 10.usbdev_resume_link_active.92269353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_rx_crc_err.2869705199 |
| Short name | T1098 |
| Test name | |
| Test status | |
| Simulation time | 192547479 ps |
| CPU time | 1.58 seconds |
| Started | Aug 29 03:36:20 AM UTC 24 |
| Finished | Aug 29 03:36:23 AM UTC 24 |
| Peak memory | 214980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2869705199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 10.usbdev_rx_crc_err.2869705199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_rx_full.1598713126 |
| Short name | T1101 |
| Test name | |
| Test status | |
| Simulation time | 301432300 ps |
| CPU time | 1.91 seconds |
| Started | Aug 29 03:36:20 AM UTC 24 |
| Finished | Aug 29 03:36:23 AM UTC 24 |
| Peak memory | 214796 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1598713126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 10.usbdev_rx_full.1598713126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_setup_stage.1703921824 |
| Short name | T1097 |
| Test name | |
| Test status | |
| Simulation time | 170568791 ps |
| CPU time | 1.49 seconds |
| Started | Aug 29 03:36:20 AM UTC 24 |
| Finished | Aug 29 03:36:23 AM UTC 24 |
| Peak memory | 214872 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1703921824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_setup_stage.1703921824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_setup_trans_ignored.1907721549 |
| Short name | T1096 |
| Test name | |
| Test status | |
| Simulation time | 151663794 ps |
| CPU time | 1.39 seconds |
| Started | Aug 29 03:36:20 AM UTC 24 |
| Finished | Aug 29 03:36:23 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1907721549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 10.usbdev_setup_trans_ignored.1907721549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_smoke.3906034122 |
| Short name | T1095 |
| Test name | |
| Test status | |
| Simulation time | 213599349 ps |
| CPU time | 1.27 seconds |
| Started | Aug 29 03:36:20 AM UTC 24 |
| Finished | Aug 29 03:36:23 AM UTC 24 |
| Peak memory | 214824 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3906034122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_smoke.3906034122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_spurious_pids_ignored.668118330 |
| Short name | T1318 |
| Test name | |
| Test status | |
| Simulation time | 3177805429 ps |
| CPU time | 89.37 seconds |
| Started | Aug 29 03:36:20 AM UTC 24 |
| Finished | Aug 29 03:37:52 AM UTC 24 |
| Peak memory | 229584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=668118330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 10.usbdev_spurious_pids_ignored.668118330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_stall_priority_over_nak.2151786688 |
| Short name | T1100 |
| Test name | |
| Test status | |
| Simulation time | 239289449 ps |
| CPU time | 1.62 seconds |
| Started | Aug 29 03:36:20 AM UTC 24 |
| Finished | Aug 29 03:36:23 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2151786688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_stall_priority_over_nak.2151786688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_stall_trans.2349118331 |
| Short name | T1099 |
| Test name | |
| Test status | |
| Simulation time | 184144557 ps |
| CPU time | 1.31 seconds |
| Started | Aug 29 03:36:21 AM UTC 24 |
| Finished | Aug 29 03:36:23 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2349118331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_stall_trans.2349118331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_stream_len_max.1436730723 |
| Short name | T1114 |
| Test name | |
| Test status | |
| Simulation time | 313743770 ps |
| CPU time | 2.16 seconds |
| Started | Aug 29 03:36:25 AM UTC 24 |
| Finished | Aug 29 03:36:29 AM UTC 24 |
| Peak memory | 216448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1436730723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_stream_len_max.1436730723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_streaming_out.1622647049 |
| Short name | T1297 |
| Test name | |
| Test status | |
| Simulation time | 2841330018 ps |
| CPU time | 80.91 seconds |
| Started | Aug 29 03:36:21 AM UTC 24 |
| Finished | Aug 29 03:37:44 AM UTC 24 |
| Peak memory | 227576 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1622647049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_streaming_out.1622647049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_timeout_missing_host_handshake.3215109206 |
| Short name | T1065 |
| Test name | |
| Test status | |
| Simulation time | 284194629 ps |
| CPU time | 4.83 seconds |
| Started | Aug 29 03:36:05 AM UTC 24 |
| Finished | Aug 29 03:36:11 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3215109206 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_timeout_missing_host_handshake.3215109206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/10.usbdev_tx_rx_disruption.2648699923 |
| Short name | T254 |
| Test name | |
| Test status | |
| Simulation time | 482998953 ps |
| CPU time | 1.92 seconds |
| Started | Aug 29 03:36:25 AM UTC 24 |
| Finished | Aug 29 03:36:28 AM UTC 24 |
| Peak memory | 214596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2648699923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_t x_rx_disruption.2648699923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/10.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/100.usbdev_endpoint_types.3451581258 |
| Short name | T3323 |
| Test name | |
| Test status | |
| Simulation time | 159586000 ps |
| CPU time | 0.76 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:10 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3451581258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 100.usbdev_endpoint_types.3451581258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/100.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/100.usbdev_tx_rx_disruption.3950852441 |
| Short name | T3339 |
| Test name | |
| Test status | |
| Simulation time | 442379002 ps |
| CPU time | 1.76 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:11 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3950852441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 100.usbdev_ tx_rx_disruption.3950852441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/100.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/101.usbdev_endpoint_types.2819048095 |
| Short name | T3318 |
| Test name | |
| Test status | |
| Simulation time | 143861735 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:11 AM UTC 24 |
| Peak memory | 216944 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2819048095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 101.usbdev_endpoint_types.2819048095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/101.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/101.usbdev_tx_rx_disruption.2862218337 |
| Short name | T3344 |
| Test name | |
| Test status | |
| Simulation time | 609572880 ps |
| CPU time | 1.91 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:12 AM UTC 24 |
| Peak memory | 214728 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2862218337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 101.usbdev_ tx_rx_disruption.2862218337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/101.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/102.usbdev_endpoint_types.2129920130 |
| Short name | T474 |
| Test name | |
| Test status | |
| Simulation time | 751926332 ps |
| CPU time | 2.07 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:12 AM UTC 24 |
| Peak memory | 216944 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2129920130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 102.usbdev_endpoint_types.2129920130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/102.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/103.usbdev_endpoint_types.104688012 |
| Short name | T3325 |
| Test name | |
| Test status | |
| Simulation time | 171214186 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:11 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=104688012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 103.usbdev_endpoint_types.104688012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/103.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/103.usbdev_tx_rx_disruption.3562867437 |
| Short name | T3340 |
| Test name | |
| Test status | |
| Simulation time | 448512950 ps |
| CPU time | 1.59 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:11 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3562867437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 103.usbdev_ tx_rx_disruption.3562867437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/103.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/104.usbdev_endpoint_types.2605043558 |
| Short name | T3329 |
| Test name | |
| Test status | |
| Simulation time | 150656750 ps |
| CPU time | 1 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:11 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2605043558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 104.usbdev_endpoint_types.2605043558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/104.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/104.usbdev_tx_rx_disruption.1066344342 |
| Short name | T3335 |
| Test name | |
| Test status | |
| Simulation time | 552555109 ps |
| CPU time | 1.44 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:11 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1066344342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 104.usbdev_ tx_rx_disruption.1066344342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/104.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/105.usbdev_endpoint_types.761015317 |
| Short name | T3327 |
| Test name | |
| Test status | |
| Simulation time | 301932541 ps |
| CPU time | 0.97 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:11 AM UTC 24 |
| Peak memory | 216924 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=761015317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 105.usbdev_endpoint_types.761015317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/105.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/106.usbdev_endpoint_types.3499812823 |
| Short name | T3341 |
| Test name | |
| Test status | |
| Simulation time | 420393677 ps |
| CPU time | 1.44 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:11 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3499812823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 106.usbdev_endpoint_types.3499812823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/106.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/107.usbdev_endpoint_types.2557711023 |
| Short name | T534 |
| Test name | |
| Test status | |
| Simulation time | 379269440 ps |
| CPU time | 1.41 seconds |
| Started | Aug 29 04:05:09 AM UTC 24 |
| Finished | Aug 29 04:05:12 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2557711023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 107.usbdev_endpoint_types.2557711023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/107.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/107.usbdev_fifo_levels.3211340472 |
| Short name | T3337 |
| Test name | |
| Test status | |
| Simulation time | 274951438 ps |
| CPU time | 1.13 seconds |
| Started | Aug 29 04:05:09 AM UTC 24 |
| Finished | Aug 29 04:05:11 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3211340472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 107.usbdev_fifo_levels.3211340472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/107.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/107.usbdev_tx_rx_disruption.1546523758 |
| Short name | T3345 |
| Test name | |
| Test status | |
| Simulation time | 567741478 ps |
| CPU time | 1.71 seconds |
| Started | Aug 29 04:05:09 AM UTC 24 |
| Finished | Aug 29 04:05:12 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1546523758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 107.usbdev_ tx_rx_disruption.1546523758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/107.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/108.usbdev_tx_rx_disruption.198641170 |
| Short name | T3346 |
| Test name | |
| Test status | |
| Simulation time | 630937913 ps |
| CPU time | 1.79 seconds |
| Started | Aug 29 04:05:09 AM UTC 24 |
| Finished | Aug 29 04:05:12 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=198641170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 108.usbdev_t x_rx_disruption.198641170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/108.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/109.usbdev_endpoint_types.3472691180 |
| Short name | T3363 |
| Test name | |
| Test status | |
| Simulation time | 639060133 ps |
| CPU time | 1.7 seconds |
| Started | Aug 29 04:06:24 AM UTC 24 |
| Finished | Aug 29 04:06:27 AM UTC 24 |
| Peak memory | 215032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3472691180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 109.usbdev_endpoint_types.3472691180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/109.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/109.usbdev_fifo_levels.88979593 |
| Short name | T3347 |
| Test name | |
| Test status | |
| Simulation time | 321130271 ps |
| CPU time | 1.06 seconds |
| Started | Aug 29 04:06:24 AM UTC 24 |
| Finished | Aug 29 04:06:26 AM UTC 24 |
| Peak memory | 214832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=88979593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 109.usbdev_fifo_levels.88979593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/109.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/109.usbdev_tx_rx_disruption.3544988182 |
| Short name | T3356 |
| Test name | |
| Test status | |
| Simulation time | 471853608 ps |
| CPU time | 1.47 seconds |
| Started | Aug 29 04:06:24 AM UTC 24 |
| Finished | Aug 29 04:06:26 AM UTC 24 |
| Peak memory | 215172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3544988182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 109.usbdev_ tx_rx_disruption.3544988182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/109.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_alert_test.2158491370 |
| Short name | T1159 |
| Test name | |
| Test status | |
| Simulation time | 49912754 ps |
| CPU time | 1 seconds |
| Started | Aug 29 03:36:47 AM UTC 24 |
| Finished | Aug 29 03:36:49 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2158491370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 11.usbdev_alert_test.2158491370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_disconnect.3421402661 |
| Short name | T1135 |
| Test name | |
| Test status | |
| Simulation time | 6014279792 ps |
| CPU time | 9.24 seconds |
| Started | Aug 29 03:36:25 AM UTC 24 |
| Finished | Aug 29 03:36:36 AM UTC 24 |
| Peak memory | 227476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3421402661 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_disconnect.3421402661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_reset.3918893231 |
| Short name | T1177 |
| Test name | |
| Test status | |
| Simulation time | 20066932863 ps |
| CPU time | 29.08 seconds |
| Started | Aug 29 03:36:25 AM UTC 24 |
| Finished | Aug 29 03:36:56 AM UTC 24 |
| Peak memory | 217208 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3918893231 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_reset.3918893231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_resume.3945192056 |
| Short name | T1210 |
| Test name | |
| Test status | |
| Simulation time | 25026358657 ps |
| CPU time | 42.46 seconds |
| Started | Aug 29 03:36:26 AM UTC 24 |
| Finished | Aug 29 03:37:10 AM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3945192056 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_resume.3945192056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_av_buffer.4226326226 |
| Short name | T1110 |
| Test name | |
| Test status | |
| Simulation time | 181652122 ps |
| CPU time | 1.28 seconds |
| Started | Aug 29 03:36:26 AM UTC 24 |
| Finished | Aug 29 03:36:28 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4226326226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_av_buffer.4226326226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_bitstuff_err.1134389886 |
| Short name | T1111 |
| Test name | |
| Test status | |
| Simulation time | 165207001 ps |
| CPU time | 1.33 seconds |
| Started | Aug 29 03:36:26 AM UTC 24 |
| Finished | Aug 29 03:36:28 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1134389886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_bitstuff_err.1134389886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_data_toggle_clear.334286673 |
| Short name | T1117 |
| Test name | |
| Test status | |
| Simulation time | 593834009 ps |
| CPU time | 3.04 seconds |
| Started | Aug 29 03:36:26 AM UTC 24 |
| Finished | Aug 29 03:36:30 AM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=334286673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 11.usbdev_data_toggle_clear.334286673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_device_address.3710423478 |
| Short name | T1240 |
| Test name | |
| Test status | |
| Simulation time | 29926792447 ps |
| CPU time | 54.39 seconds |
| Started | Aug 29 03:36:26 AM UTC 24 |
| Finished | Aug 29 03:37:22 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3710423478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_device_address.3710423478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_device_timeout.1903150342 |
| Short name | T1196 |
| Test name | |
| Test status | |
| Simulation time | 4727388998 ps |
| CPU time | 37.74 seconds |
| Started | Aug 29 03:36:26 AM UTC 24 |
| Finished | Aug 29 03:37:05 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1903150342 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_device_timeout.1903150342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_disable_endpoint.1283634449 |
| Short name | T1116 |
| Test name | |
| Test status | |
| Simulation time | 483144752 ps |
| CPU time | 1.88 seconds |
| Started | Aug 29 03:36:26 AM UTC 24 |
| Finished | Aug 29 03:36:29 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1283634449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 11.usbdev_disable_endpoint.1283634449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_disconnected.2533801691 |
| Short name | T1113 |
| Test name | |
| Test status | |
| Simulation time | 138771602 ps |
| CPU time | 1.33 seconds |
| Started | Aug 29 03:36:26 AM UTC 24 |
| Finished | Aug 29 03:36:28 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2533801691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_disconnected.2533801691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_enable.3936495886 |
| Short name | T1112 |
| Test name | |
| Test status | |
| Simulation time | 59347039 ps |
| CPU time | 1.08 seconds |
| Started | Aug 29 03:36:26 AM UTC 24 |
| Finished | Aug 29 03:36:28 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3936495886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 11.usbdev_enable.3936495886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_endpoint_access.1135422118 |
| Short name | T1118 |
| Test name | |
| Test status | |
| Simulation time | 825746422 ps |
| CPU time | 2.72 seconds |
| Started | Aug 29 03:36:26 AM UTC 24 |
| Finished | Aug 29 03:36:30 AM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1135422118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_endpoint_access.1135422118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_endpoint_types.1883266693 |
| Short name | T1115 |
| Test name | |
| Test status | |
| Simulation time | 173516008 ps |
| CPU time | 1.61 seconds |
| Started | Aug 29 03:36:26 AM UTC 24 |
| Finished | Aug 29 03:36:29 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1883266693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_endpoint_types.1883266693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_fifo_rst.4205133166 |
| Short name | T1123 |
| Test name | |
| Test status | |
| Simulation time | 293124059 ps |
| CPU time | 3.76 seconds |
| Started | Aug 29 03:36:28 AM UTC 24 |
| Finished | Aug 29 03:36:33 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4205133166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_fifo_rst.4205133166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_in_iso.1061799275 |
| Short name | T1119 |
| Test name | |
| Test status | |
| Simulation time | 151124207 ps |
| CPU time | 1.32 seconds |
| Started | Aug 29 03:36:28 AM UTC 24 |
| Finished | Aug 29 03:36:30 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1061799275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 11.usbdev_in_iso.1061799275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_in_stall.2780210853 |
| Short name | T1125 |
| Test name | |
| Test status | |
| Simulation time | 139592043 ps |
| CPU time | 1.19 seconds |
| Started | Aug 29 03:36:32 AM UTC 24 |
| Finished | Aug 29 03:36:34 AM UTC 24 |
| Peak memory | 214864 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2780210853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_in_stall.2780210853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_in_trans.301452043 |
| Short name | T1126 |
| Test name | |
| Test status | |
| Simulation time | 239456773 ps |
| CPU time | 1.23 seconds |
| Started | Aug 29 03:36:32 AM UTC 24 |
| Finished | Aug 29 03:36:34 AM UTC 24 |
| Peak memory | 214880 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=301452043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 11.usbdev_in_trans.301452043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_invalid_sync.1896593140 |
| Short name | T1425 |
| Test name | |
| Test status | |
| Simulation time | 5018172072 ps |
| CPU time | 128.26 seconds |
| Started | Aug 29 03:36:28 AM UTC 24 |
| Finished | Aug 29 03:38:39 AM UTC 24 |
| Peak memory | 229276 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1896593140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 11.usbdev_invalid_sync.1896593140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_iso_retraction.901545087 |
| Short name | T1260 |
| Test name | |
| Test status | |
| Simulation time | 8779287054 ps |
| CPU time | 53.1 seconds |
| Started | Aug 29 03:36:32 AM UTC 24 |
| Finished | Aug 29 03:37:27 AM UTC 24 |
| Peak memory | 217316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=901545087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 11.usbdev_iso_retraction.901545087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_link_in_err.1572490916 |
| Short name | T1130 |
| Test name | |
| Test status | |
| Simulation time | 192617858 ps |
| CPU time | 1.54 seconds |
| Started | Aug 29 03:36:32 AM UTC 24 |
| Finished | Aug 29 03:36:35 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1572490916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_link_in_err.1572490916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_link_resume.4151156288 |
| Short name | T1188 |
| Test name | |
| Test status | |
| Simulation time | 14275862535 ps |
| CPU time | 26 seconds |
| Started | Aug 29 03:36:32 AM UTC 24 |
| Finished | Aug 29 03:36:59 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4151156288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_link_resume.4151156288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_link_suspend.4083157586 |
| Short name | T1158 |
| Test name | |
| Test status | |
| Simulation time | 10060327118 ps |
| CPU time | 14.45 seconds |
| Started | Aug 29 03:36:32 AM UTC 24 |
| Finished | Aug 29 03:36:48 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4083157586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_link_suspend.4083157586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_low_speed_traffic.3743332218 |
| Short name | T1374 |
| Test name | |
| Test status | |
| Simulation time | 3802508828 ps |
| CPU time | 102.25 seconds |
| Started | Aug 29 03:36:32 AM UTC 24 |
| Finished | Aug 29 03:38:17 AM UTC 24 |
| Peak memory | 234248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3743332218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_low_speed_traffic.3743332218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_max_inter_pkt_delay.49059568 |
| Short name | T1165 |
| Test name | |
| Test status | |
| Simulation time | 2342163846 ps |
| CPU time | 17.02 seconds |
| Started | Aug 29 03:36:32 AM UTC 24 |
| Finished | Aug 29 03:36:51 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=49059568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_inter_pkt_delay.49059568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_max_length_in_transaction.982449957 |
| Short name | T1133 |
| Test name | |
| Test status | |
| Simulation time | 248043588 ps |
| CPU time | 1.76 seconds |
| Started | Aug 29 03:36:32 AM UTC 24 |
| Finished | Aug 29 03:36:35 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=982449957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 11.usbdev_max_length_in_transaction.982449957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_max_length_out_transaction.1718388650 |
| Short name | T1134 |
| Test name | |
| Test status | |
| Simulation time | 245469905 ps |
| CPU time | 1.74 seconds |
| Started | Aug 29 03:36:32 AM UTC 24 |
| Finished | Aug 29 03:36:35 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1718388650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 11.usbdev_max_length_out_transaction.1718388650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_max_non_iso_usb_traffic.4130377785 |
| Short name | T1193 |
| Test name | |
| Test status | |
| Simulation time | 3521497475 ps |
| CPU time | 30.77 seconds |
| Started | Aug 29 03:36:32 AM UTC 24 |
| Finished | Aug 29 03:37:05 AM UTC 24 |
| Peak memory | 229664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4130377785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_non_iso_usb_traffic.4130377785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_max_usb_traffic.1240685805 |
| Short name | T1171 |
| Test name | |
| Test status | |
| Simulation time | 1979569670 ps |
| CPU time | 19.08 seconds |
| Started | Aug 29 03:36:32 AM UTC 24 |
| Finished | Aug 29 03:36:53 AM UTC 24 |
| Peak memory | 229476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1240685805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_usb_traffic.1240685805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_min_inter_pkt_delay.1677231219 |
| Short name | T1178 |
| Test name | |
| Test status | |
| Simulation time | 2587358211 ps |
| CPU time | 23.81 seconds |
| Started | Aug 29 03:36:32 AM UTC 24 |
| Finished | Aug 29 03:36:58 AM UTC 24 |
| Peak memory | 227524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1677231219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_min_inter_pkt_delay.1677231219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_min_length_in_transaction.647998245 |
| Short name | T1131 |
| Test name | |
| Test status | |
| Simulation time | 170387474 ps |
| CPU time | 1.42 seconds |
| Started | Aug 29 03:36:32 AM UTC 24 |
| Finished | Aug 29 03:36:35 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=647998245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 11.usbdev_min_length_in_transaction.647998245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_min_length_out_transaction.648025470 |
| Short name | T1132 |
| Test name | |
| Test status | |
| Simulation time | 143795504 ps |
| CPU time | 1.37 seconds |
| Started | Aug 29 03:36:32 AM UTC 24 |
| Finished | Aug 29 03:36:35 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=648025470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 11.usbdev_min_length_out_transaction.648025470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_out_iso.3035674496 |
| Short name | T1138 |
| Test name | |
| Test status | |
| Simulation time | 176027254 ps |
| CPU time | 1.52 seconds |
| Started | Aug 29 03:36:35 AM UTC 24 |
| Finished | Aug 29 03:36:38 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3035674496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 11.usbdev_out_iso.3035674496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_out_stall.3614771386 |
| Short name | T1140 |
| Test name | |
| Test status | |
| Simulation time | 186622873 ps |
| CPU time | 1.59 seconds |
| Started | Aug 29 03:36:35 AM UTC 24 |
| Finished | Aug 29 03:36:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3614771386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_out_stall.3614771386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_out_trans_nak.2878366945 |
| Short name | T1139 |
| Test name | |
| Test status | |
| Simulation time | 212181847 ps |
| CPU time | 1.15 seconds |
| Started | Aug 29 03:36:35 AM UTC 24 |
| Finished | Aug 29 03:36:38 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2878366945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 11.usbdev_out_trans_nak.2878366945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_pending_in_trans.2280957682 |
| Short name | T1137 |
| Test name | |
| Test status | |
| Simulation time | 148586800 ps |
| CPU time | 1.21 seconds |
| Started | Aug 29 03:36:35 AM UTC 24 |
| Finished | Aug 29 03:36:38 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2280957682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 11.usbdev_pending_in_trans.2280957682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_phy_config_pinflip.1639912808 |
| Short name | T1143 |
| Test name | |
| Test status | |
| Simulation time | 224753203 ps |
| CPU time | 1.56 seconds |
| Started | Aug 29 03:36:35 AM UTC 24 |
| Finished | Aug 29 03:36:38 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1639912808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 11.usbdev_phy_config_pinflip.1639912808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_phy_config_usb_ref_disable.4229841289 |
| Short name | T1150 |
| Test name | |
| Test status | |
| Simulation time | 171571306 ps |
| CPU time | 1.45 seconds |
| Started | Aug 29 03:36:40 AM UTC 24 |
| Finished | Aug 29 03:36:43 AM UTC 24 |
| Peak memory | 214944 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4229841289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 11.usbdev_phy_config_usb_ref_disable.4229841289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_buffer.1831452881 |
| Short name | T296 |
| Test name | |
| Test status | |
| Simulation time | 16562235185 ps |
| CPU time | 46.19 seconds |
| Started | Aug 29 03:36:40 AM UTC 24 |
| Finished | Aug 29 03:37:28 AM UTC 24 |
| Peak memory | 231704 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1831452881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_pkt_buffer.1831452881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_received.2277229703 |
| Short name | T1151 |
| Test name | |
| Test status | |
| Simulation time | 172772662 ps |
| CPU time | 1.37 seconds |
| Started | Aug 29 03:36:40 AM UTC 24 |
| Finished | Aug 29 03:36:43 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2277229703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_pkt_received.2277229703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_sent.1104261239 |
| Short name | T1154 |
| Test name | |
| Test status | |
| Simulation time | 252684177 ps |
| CPU time | 1.56 seconds |
| Started | Aug 29 03:36:40 AM UTC 24 |
| Finished | Aug 29 03:36:43 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1104261239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_pkt_sent.1104261239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_random_length_in_transaction.1869879497 |
| Short name | T1152 |
| Test name | |
| Test status | |
| Simulation time | 189213795 ps |
| CPU time | 1.29 seconds |
| Started | Aug 29 03:36:41 AM UTC 24 |
| Finished | Aug 29 03:36:43 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1869879497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 11.usbdev_random_length_in_transaction.1869879497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_random_length_out_transaction.2850453839 |
| Short name | T1155 |
| Test name | |
| Test status | |
| Simulation time | 184962116 ps |
| CPU time | 1.48 seconds |
| Started | Aug 29 03:36:41 AM UTC 24 |
| Finished | Aug 29 03:36:43 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2850453839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 11.usbdev_random_length_out_transaction.2850453839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_resume_link_active.4125063645 |
| Short name | T1191 |
| Test name | |
| Test status | |
| Simulation time | 20222749528 ps |
| CPU time | 33.22 seconds |
| Started | Aug 29 03:36:41 AM UTC 24 |
| Finished | Aug 29 03:37:15 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4125063645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 11.usbdev_resume_link_active.4125063645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_rx_crc_err.4173773943 |
| Short name | T1127 |
| Test name | |
| Test status | |
| Simulation time | 145815719 ps |
| CPU time | 1.42 seconds |
| Started | Aug 29 03:36:41 AM UTC 24 |
| Finished | Aug 29 03:36:43 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4173773943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_rx_crc_err.4173773943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_rx_full.3804131898 |
| Short name | T1107 |
| Test name | |
| Test status | |
| Simulation time | 279989842 ps |
| CPU time | 1.47 seconds |
| Started | Aug 29 03:36:41 AM UTC 24 |
| Finished | Aug 29 03:36:43 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3804131898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 11.usbdev_rx_full.3804131898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_setup_stage.3055332757 |
| Short name | T1128 |
| Test name | |
| Test status | |
| Simulation time | 159492420 ps |
| CPU time | 1.41 seconds |
| Started | Aug 29 03:36:41 AM UTC 24 |
| Finished | Aug 29 03:36:43 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3055332757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_setup_stage.3055332757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_setup_trans_ignored.959293903 |
| Short name | T1156 |
| Test name | |
| Test status | |
| Simulation time | 148050033 ps |
| CPU time | 1.48 seconds |
| Started | Aug 29 03:36:41 AM UTC 24 |
| Finished | Aug 29 03:36:43 AM UTC 24 |
| Peak memory | 214796 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=959293903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 11.usbdev_setup_trans_ignored.959293903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_smoke.2752475779 |
| Short name | T1124 |
| Test name | |
| Test status | |
| Simulation time | 221058270 ps |
| CPU time | 1.42 seconds |
| Started | Aug 29 03:36:41 AM UTC 24 |
| Finished | Aug 29 03:36:43 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2752475779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_smoke.2752475779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_spurious_pids_ignored.3209096280 |
| Short name | T1236 |
| Test name | |
| Test status | |
| Simulation time | 3558192849 ps |
| CPU time | 36.62 seconds |
| Started | Aug 29 03:36:41 AM UTC 24 |
| Finished | Aug 29 03:37:19 AM UTC 24 |
| Peak memory | 229660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3209096280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 11.usbdev_spurious_pids_ignored.3209096280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_stall_priority_over_nak.708233513 |
| Short name | T1153 |
| Test name | |
| Test status | |
| Simulation time | 181362494 ps |
| CPU time | 0.97 seconds |
| Started | Aug 29 03:36:41 AM UTC 24 |
| Finished | Aug 29 03:36:43 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=708233513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_stall_priority_over_nak.708233513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_stall_trans.1148777756 |
| Short name | T1105 |
| Test name | |
| Test status | |
| Simulation time | 206777932 ps |
| CPU time | 1.42 seconds |
| Started | Aug 29 03:36:41 AM UTC 24 |
| Finished | Aug 29 03:36:43 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1148777756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_stall_trans.1148777756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_stream_len_max.1265680879 |
| Short name | T1166 |
| Test name | |
| Test status | |
| Simulation time | 664549699 ps |
| CPU time | 3.26 seconds |
| Started | Aug 29 03:36:47 AM UTC 24 |
| Finished | Aug 29 03:36:51 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1265680879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_stream_len_max.1265680879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_streaming_out.1586361323 |
| Short name | T1238 |
| Test name | |
| Test status | |
| Simulation time | 4269393917 ps |
| CPU time | 31.39 seconds |
| Started | Aug 29 03:36:47 AM UTC 24 |
| Finished | Aug 29 03:37:20 AM UTC 24 |
| Peak memory | 229704 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1586361323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_streaming_out.1586361323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_timeout_missing_host_handshake.1065900258 |
| Short name | T1225 |
| Test name | |
| Test status | |
| Simulation time | 5669650933 ps |
| CPU time | 47.93 seconds |
| Started | Aug 29 03:36:26 AM UTC 24 |
| Finished | Aug 29 03:37:16 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1065900258 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_timeout_missing_host_handshake.1065900258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/11.usbdev_tx_rx_disruption.3412602722 |
| Short name | T255 |
| Test name | |
| Test status | |
| Simulation time | 572019823 ps |
| CPU time | 1.9 seconds |
| Started | Aug 29 03:36:47 AM UTC 24 |
| Finished | Aug 29 03:36:50 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3412602722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_t x_rx_disruption.3412602722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/11.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/110.usbdev_endpoint_types.474350149 |
| Short name | T3352 |
| Test name | |
| Test status | |
| Simulation time | 593408244 ps |
| CPU time | 1.44 seconds |
| Started | Aug 29 04:06:24 AM UTC 24 |
| Finished | Aug 29 04:06:26 AM UTC 24 |
| Peak memory | 214920 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=474350149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 110.usbdev_endpoint_types.474350149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/110.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/110.usbdev_fifo_levels.4157021972 |
| Short name | T386 |
| Test name | |
| Test status | |
| Simulation time | 271029936 ps |
| CPU time | 0.98 seconds |
| Started | Aug 29 04:06:24 AM UTC 24 |
| Finished | Aug 29 04:06:26 AM UTC 24 |
| Peak memory | 214828 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4157021972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 110.usbdev_fifo_levels.4157021972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/110.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/111.usbdev_fifo_levels.3935000918 |
| Short name | T3348 |
| Test name | |
| Test status | |
| Simulation time | 166022797 ps |
| CPU time | 0.82 seconds |
| Started | Aug 29 04:06:24 AM UTC 24 |
| Finished | Aug 29 04:06:26 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3935000918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 111.usbdev_fifo_levels.3935000918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/111.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/111.usbdev_tx_rx_disruption.103225746 |
| Short name | T3358 |
| Test name | |
| Test status | |
| Simulation time | 464183974 ps |
| CPU time | 1.3 seconds |
| Started | Aug 29 04:06:24 AM UTC 24 |
| Finished | Aug 29 04:06:26 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=103225746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 111.usbdev_t x_rx_disruption.103225746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/111.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/112.usbdev_endpoint_types.3106088250 |
| Short name | T3357 |
| Test name | |
| Test status | |
| Simulation time | 422990810 ps |
| CPU time | 1.23 seconds |
| Started | Aug 29 04:06:24 AM UTC 24 |
| Finished | Aug 29 04:06:26 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3106088250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 112.usbdev_endpoint_types.3106088250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/112.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/112.usbdev_fifo_levels.1166951585 |
| Short name | T415 |
| Test name | |
| Test status | |
| Simulation time | 308410776 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 04:06:24 AM UTC 24 |
| Finished | Aug 29 04:06:26 AM UTC 24 |
| Peak memory | 215652 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1166951585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 112.usbdev_fifo_levels.1166951585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/112.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/112.usbdev_tx_rx_disruption.2331015241 |
| Short name | T3365 |
| Test name | |
| Test status | |
| Simulation time | 503532136 ps |
| CPU time | 1.45 seconds |
| Started | Aug 29 04:06:24 AM UTC 24 |
| Finished | Aug 29 04:06:27 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2331015241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 112.usbdev_ tx_rx_disruption.2331015241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/112.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/113.usbdev_endpoint_types.3105019499 |
| Short name | T462 |
| Test name | |
| Test status | |
| Simulation time | 383047199 ps |
| CPU time | 1.14 seconds |
| Started | Aug 29 04:06:24 AM UTC 24 |
| Finished | Aug 29 04:06:26 AM UTC 24 |
| Peak memory | 214872 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3105019499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 113.usbdev_endpoint_types.3105019499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/113.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/113.usbdev_tx_rx_disruption.863681258 |
| Short name | T3367 |
| Test name | |
| Test status | |
| Simulation time | 489583338 ps |
| CPU time | 1.38 seconds |
| Started | Aug 29 04:06:24 AM UTC 24 |
| Finished | Aug 29 04:06:27 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=863681258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 113.usbdev_t x_rx_disruption.863681258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/113.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/114.usbdev_endpoint_types.3489418802 |
| Short name | T507 |
| Test name | |
| Test status | |
| Simulation time | 260602262 ps |
| CPU time | 0.99 seconds |
| Started | Aug 29 04:06:24 AM UTC 24 |
| Finished | Aug 29 04:06:26 AM UTC 24 |
| Peak memory | 215300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3489418802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 114.usbdev_endpoint_types.3489418802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/114.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/114.usbdev_fifo_levels.1415928461 |
| Short name | T3349 |
| Test name | |
| Test status | |
| Simulation time | 149499818 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 04:06:24 AM UTC 24 |
| Finished | Aug 29 04:06:26 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1415928461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 114.usbdev_fifo_levels.1415928461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/114.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/114.usbdev_tx_rx_disruption.230097808 |
| Short name | T3361 |
| Test name | |
| Test status | |
| Simulation time | 509530752 ps |
| CPU time | 1.36 seconds |
| Started | Aug 29 04:06:24 AM UTC 24 |
| Finished | Aug 29 04:06:27 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=230097808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 114.usbdev_t x_rx_disruption.230097808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/114.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/115.usbdev_endpoint_types.499082209 |
| Short name | T454 |
| Test name | |
| Test status | |
| Simulation time | 473211095 ps |
| CPU time | 1.46 seconds |
| Started | Aug 29 04:06:24 AM UTC 24 |
| Finished | Aug 29 04:06:27 AM UTC 24 |
| Peak memory | 215196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=499082209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 115.usbdev_endpoint_types.499082209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/115.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/115.usbdev_fifo_levels.2353777960 |
| Short name | T3350 |
| Test name | |
| Test status | |
| Simulation time | 173711471 ps |
| CPU time | 0.75 seconds |
| Started | Aug 29 04:06:24 AM UTC 24 |
| Finished | Aug 29 04:06:26 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2353777960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 115.usbdev_fifo_levels.2353777960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/115.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/115.usbdev_tx_rx_disruption.2378450523 |
| Short name | T3370 |
| Test name | |
| Test status | |
| Simulation time | 483056269 ps |
| CPU time | 1.36 seconds |
| Started | Aug 29 04:06:24 AM UTC 24 |
| Finished | Aug 29 04:06:27 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2378450523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 115.usbdev_ tx_rx_disruption.2378450523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/115.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/116.usbdev_endpoint_types.2089169644 |
| Short name | T3369 |
| Test name | |
| Test status | |
| Simulation time | 401789453 ps |
| CPU time | 1.23 seconds |
| Started | Aug 29 04:06:24 AM UTC 24 |
| Finished | Aug 29 04:06:27 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2089169644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 116.usbdev_endpoint_types.2089169644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/116.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/116.usbdev_fifo_levels.1532474566 |
| Short name | T3351 |
| Test name | |
| Test status | |
| Simulation time | 155109541 ps |
| CPU time | 0.76 seconds |
| Started | Aug 29 04:06:24 AM UTC 24 |
| Finished | Aug 29 04:06:26 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1532474566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 116.usbdev_fifo_levels.1532474566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/116.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/116.usbdev_tx_rx_disruption.3998260573 |
| Short name | T3372 |
| Test name | |
| Test status | |
| Simulation time | 548276520 ps |
| CPU time | 1.6 seconds |
| Started | Aug 29 04:06:24 AM UTC 24 |
| Finished | Aug 29 04:06:27 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3998260573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 116.usbdev_ tx_rx_disruption.3998260573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/116.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/117.usbdev_fifo_levels.2768501912 |
| Short name | T3353 |
| Test name | |
| Test status | |
| Simulation time | 192821280 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 04:06:24 AM UTC 24 |
| Finished | Aug 29 04:06:26 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2768501912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 117.usbdev_fifo_levels.2768501912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/117.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/117.usbdev_tx_rx_disruption.4277781720 |
| Short name | T3374 |
| Test name | |
| Test status | |
| Simulation time | 556828292 ps |
| CPU time | 1.56 seconds |
| Started | Aug 29 04:06:24 AM UTC 24 |
| Finished | Aug 29 04:06:27 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4277781720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 117.usbdev_ tx_rx_disruption.4277781720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/117.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/118.usbdev_endpoint_types.1298809760 |
| Short name | T3359 |
| Test name | |
| Test status | |
| Simulation time | 191800890 ps |
| CPU time | 0.82 seconds |
| Started | Aug 29 04:06:24 AM UTC 24 |
| Finished | Aug 29 04:06:26 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1298809760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 118.usbdev_endpoint_types.1298809760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/118.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/118.usbdev_tx_rx_disruption.3096287392 |
| Short name | T3371 |
| Test name | |
| Test status | |
| Simulation time | 439677667 ps |
| CPU time | 1.35 seconds |
| Started | Aug 29 04:06:24 AM UTC 24 |
| Finished | Aug 29 04:06:27 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3096287392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 118.usbdev_ tx_rx_disruption.3096287392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/118.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/119.usbdev_endpoint_types.2485000489 |
| Short name | T3378 |
| Test name | |
| Test status | |
| Simulation time | 604520063 ps |
| CPU time | 1.66 seconds |
| Started | Aug 29 04:06:24 AM UTC 24 |
| Finished | Aug 29 04:06:28 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2485000489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 119.usbdev_endpoint_types.2485000489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/119.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/119.usbdev_fifo_levels.4281291910 |
| Short name | T3366 |
| Test name | |
| Test status | |
| Simulation time | 154820600 ps |
| CPU time | 0.91 seconds |
| Started | Aug 29 04:06:24 AM UTC 24 |
| Finished | Aug 29 04:06:27 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4281291910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 119.usbdev_fifo_levels.4281291910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/119.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/119.usbdev_tx_rx_disruption.2736610865 |
| Short name | T3379 |
| Test name | |
| Test status | |
| Simulation time | 492941825 ps |
| CPU time | 1.68 seconds |
| Started | Aug 29 04:06:24 AM UTC 24 |
| Finished | Aug 29 04:06:28 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2736610865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 119.usbdev_ tx_rx_disruption.2736610865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/119.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_alert_test.2315277738 |
| Short name | T1212 |
| Test name | |
| Test status | |
| Simulation time | 68396806 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 03:37:10 AM UTC 24 |
| Finished | Aug 29 03:37:12 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2315277738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 12.usbdev_alert_test.2315277738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_disconnect.1489195063 |
| Short name | T1206 |
| Test name | |
| Test status | |
| Simulation time | 9894041163 ps |
| CPU time | 18.31 seconds |
| Started | Aug 29 03:36:47 AM UTC 24 |
| Finished | Aug 29 03:37:07 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1489195063 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_disconnect.1489195063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_reset.1632412725 |
| Short name | T1209 |
| Test name | |
| Test status | |
| Simulation time | 13771137674 ps |
| CPU time | 19.43 seconds |
| Started | Aug 29 03:36:47 AM UTC 24 |
| Finished | Aug 29 03:37:08 AM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1632412725 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_reset.1632412725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_resume.4217399369 |
| Short name | T1284 |
| Test name | |
| Test status | |
| Simulation time | 30372494012 ps |
| CPU time | 46.99 seconds |
| Started | Aug 29 03:36:47 AM UTC 24 |
| Finished | Aug 29 03:37:36 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4217399369 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_resume.4217399369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_av_buffer.3425068471 |
| Short name | T1160 |
| Test name | |
| Test status | |
| Simulation time | 158662551 ps |
| CPU time | 0.91 seconds |
| Started | Aug 29 03:36:47 AM UTC 24 |
| Finished | Aug 29 03:36:49 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3425068471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_av_buffer.3425068471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_bitstuff_err.4225578429 |
| Short name | T1161 |
| Test name | |
| Test status | |
| Simulation time | 151469125 ps |
| CPU time | 1.16 seconds |
| Started | Aug 29 03:36:47 AM UTC 24 |
| Finished | Aug 29 03:36:49 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4225578429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_bitstuff_err.4225578429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_data_toggle_clear.321023223 |
| Short name | T1164 |
| Test name | |
| Test status | |
| Simulation time | 390651877 ps |
| CPU time | 1.71 seconds |
| Started | Aug 29 03:36:47 AM UTC 24 |
| Finished | Aug 29 03:36:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=321023223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 12.usbdev_data_toggle_clear.321023223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_data_toggle_restore.3785453409 |
| Short name | T1169 |
| Test name | |
| Test status | |
| Simulation time | 1215532509 ps |
| CPU time | 4.08 seconds |
| Started | Aug 29 03:36:47 AM UTC 24 |
| Finished | Aug 29 03:36:53 AM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3785453409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_data_toggle_restore.3785453409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_device_address.2167000239 |
| Short name | T619 |
| Test name | |
| Test status | |
| Simulation time | 34422672144 ps |
| CPU time | 58.37 seconds |
| Started | Aug 29 03:36:47 AM UTC 24 |
| Finished | Aug 29 03:37:47 AM UTC 24 |
| Peak memory | 217432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2167000239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_device_address.2167000239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_device_timeout.948310891 |
| Short name | T1228 |
| Test name | |
| Test status | |
| Simulation time | 2938493179 ps |
| CPU time | 28.22 seconds |
| Started | Aug 29 03:36:47 AM UTC 24 |
| Finished | Aug 29 03:37:17 AM UTC 24 |
| Peak memory | 217376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=948310891 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_device_timeout.948310891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_disable_endpoint.280544389 |
| Short name | T1167 |
| Test name | |
| Test status | |
| Simulation time | 1052773618 ps |
| CPU time | 3.04 seconds |
| Started | Aug 29 03:36:48 AM UTC 24 |
| Finished | Aug 29 03:36:52 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=280544389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_disable_endpoint.280544389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_disconnected.2017282055 |
| Short name | T1163 |
| Test name | |
| Test status | |
| Simulation time | 171974999 ps |
| CPU time | 1.35 seconds |
| Started | Aug 29 03:36:48 AM UTC 24 |
| Finished | Aug 29 03:36:50 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2017282055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_disconnected.2017282055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_enable.796877011 |
| Short name | T1162 |
| Test name | |
| Test status | |
| Simulation time | 33818723 ps |
| CPU time | 1.09 seconds |
| Started | Aug 29 03:36:48 AM UTC 24 |
| Finished | Aug 29 03:36:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=796877011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_enable.796877011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_endpoint_access.2919443032 |
| Short name | T1170 |
| Test name | |
| Test status | |
| Simulation time | 858502139 ps |
| CPU time | 4.01 seconds |
| Started | Aug 29 03:36:48 AM UTC 24 |
| Finished | Aug 29 03:36:53 AM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2919443032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_endpoint_access.2919443032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_endpoint_types.1768665939 |
| Short name | T562 |
| Test name | |
| Test status | |
| Simulation time | 220178541 ps |
| CPU time | 1.42 seconds |
| Started | Aug 29 03:36:48 AM UTC 24 |
| Finished | Aug 29 03:36:50 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1768665939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_endpoint_types.1768665939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_fifo_rst.1274908499 |
| Short name | T1168 |
| Test name | |
| Test status | |
| Simulation time | 415065079 ps |
| CPU time | 3.42 seconds |
| Started | Aug 29 03:36:48 AM UTC 24 |
| Finished | Aug 29 03:36:52 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1274908499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_fifo_rst.1274908499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_in_iso.797411915 |
| Short name | T1175 |
| Test name | |
| Test status | |
| Simulation time | 189481296 ps |
| CPU time | 1.78 seconds |
| Started | Aug 29 03:36:51 AM UTC 24 |
| Finished | Aug 29 03:36:54 AM UTC 24 |
| Peak memory | 227416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=797411915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 12.usbdev_in_iso.797411915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_in_stall.782603048 |
| Short name | T1172 |
| Test name | |
| Test status | |
| Simulation time | 150995835 ps |
| CPU time | 1.47 seconds |
| Started | Aug 29 03:36:51 AM UTC 24 |
| Finished | Aug 29 03:36:54 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=782603048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_in_stall.782603048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_in_trans.1793384439 |
| Short name | T1174 |
| Test name | |
| Test status | |
| Simulation time | 201570377 ps |
| CPU time | 1.65 seconds |
| Started | Aug 29 03:36:51 AM UTC 24 |
| Finished | Aug 29 03:36:54 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1793384439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_in_trans.1793384439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_invalid_sync.3019439477 |
| Short name | T1273 |
| Test name | |
| Test status | |
| Simulation time | 5074389534 ps |
| CPU time | 40.63 seconds |
| Started | Aug 29 03:36:51 AM UTC 24 |
| Finished | Aug 29 03:37:33 AM UTC 24 |
| Peak memory | 229584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3019439477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 12.usbdev_invalid_sync.3019439477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_iso_retraction.489890526 |
| Short name | T1477 |
| Test name | |
| Test status | |
| Simulation time | 11803522499 ps |
| CPU time | 129.17 seconds |
| Started | Aug 29 03:36:51 AM UTC 24 |
| Finished | Aug 29 03:39:03 AM UTC 24 |
| Peak memory | 217388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=489890526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 12.usbdev_iso_retraction.489890526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_link_in_err.273325913 |
| Short name | T1173 |
| Test name | |
| Test status | |
| Simulation time | 190757825 ps |
| CPU time | 1.43 seconds |
| Started | Aug 29 03:36:51 AM UTC 24 |
| Finished | Aug 29 03:36:54 AM UTC 24 |
| Peak memory | 214988 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=273325913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 12.usbdev_link_in_err.273325913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_link_resume.747669020 |
| Short name | T99 |
| Test name | |
| Test status | |
| Simulation time | 6317737003 ps |
| CPU time | 11.56 seconds |
| Started | Aug 29 03:36:51 AM UTC 24 |
| Finished | Aug 29 03:37:04 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=747669020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 12.usbdev_link_resume.747669020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_link_suspend.974099827 |
| Short name | T1207 |
| Test name | |
| Test status | |
| Simulation time | 4971151201 ps |
| CPU time | 14.26 seconds |
| Started | Aug 29 03:36:52 AM UTC 24 |
| Finished | Aug 29 03:37:07 AM UTC 24 |
| Peak memory | 227400 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=974099827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_link_suspend.974099827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_low_speed_traffic.505310546 |
| Short name | T1281 |
| Test name | |
| Test status | |
| Simulation time | 4334420411 ps |
| CPU time | 41.14 seconds |
| Started | Aug 29 03:36:52 AM UTC 24 |
| Finished | Aug 29 03:37:34 AM UTC 24 |
| Peak memory | 229600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=505310546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_low_speed_traffic.505310546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_max_inter_pkt_delay.1184599812 |
| Short name | T1341 |
| Test name | |
| Test status | |
| Simulation time | 2968384258 ps |
| CPU time | 71.63 seconds |
| Started | Aug 29 03:36:52 AM UTC 24 |
| Finished | Aug 29 03:38:05 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1184599812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_inter_pkt_delay.1184599812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_max_length_in_transaction.245515559 |
| Short name | T1176 |
| Test name | |
| Test status | |
| Simulation time | 241641776 ps |
| CPU time | 1.61 seconds |
| Started | Aug 29 03:36:52 AM UTC 24 |
| Finished | Aug 29 03:36:54 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=245515559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 12.usbdev_max_length_in_transaction.245515559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_max_length_out_transaction.3364131468 |
| Short name | T1182 |
| Test name | |
| Test status | |
| Simulation time | 206150654 ps |
| CPU time | 1.74 seconds |
| Started | Aug 29 03:36:56 AM UTC 24 |
| Finished | Aug 29 03:36:58 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3364131468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 12.usbdev_max_length_out_transaction.3364131468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_max_non_iso_usb_traffic.256945522 |
| Short name | T1227 |
| Test name | |
| Test status | |
| Simulation time | 1954162711 ps |
| CPU time | 19.96 seconds |
| Started | Aug 29 03:36:56 AM UTC 24 |
| Finished | Aug 29 03:37:17 AM UTC 24 |
| Peak memory | 227424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=256945522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_non_iso_usb_traffic.256945522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_max_usb_traffic.3051339571 |
| Short name | T1261 |
| Test name | |
| Test status | |
| Simulation time | 3329357290 ps |
| CPU time | 33.4 seconds |
| Started | Aug 29 03:36:56 AM UTC 24 |
| Finished | Aug 29 03:37:31 AM UTC 24 |
| Peak memory | 234192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3051339571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_usb_traffic.3051339571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_min_inter_pkt_delay.760647076 |
| Short name | T1258 |
| Test name | |
| Test status | |
| Simulation time | 3222939598 ps |
| CPU time | 28.88 seconds |
| Started | Aug 29 03:36:56 AM UTC 24 |
| Finished | Aug 29 03:37:26 AM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=760647076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_min_inter_pkt_delay.760647076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_min_length_in_transaction.2336188452 |
| Short name | T1179 |
| Test name | |
| Test status | |
| Simulation time | 161132817 ps |
| CPU time | 1.47 seconds |
| Started | Aug 29 03:36:56 AM UTC 24 |
| Finished | Aug 29 03:36:58 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2336188452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 12.usbdev_min_length_in_transaction.2336188452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_min_length_out_transaction.3637716 |
| Short name | T1180 |
| Test name | |
| Test status | |
| Simulation time | 156456554 ps |
| CPU time | 1.43 seconds |
| Started | Aug 29 03:36:56 AM UTC 24 |
| Finished | Aug 29 03:36:58 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3637716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transactio n_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_min_length_out_transaction.3637716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_out_iso.3974015376 |
| Short name | T1183 |
| Test name | |
| Test status | |
| Simulation time | 167326071 ps |
| CPU time | 1.49 seconds |
| Started | Aug 29 03:36:56 AM UTC 24 |
| Finished | Aug 29 03:36:58 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3974015376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_out_iso.3974015376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_out_stall.3737111454 |
| Short name | T1185 |
| Test name | |
| Test status | |
| Simulation time | 158559676 ps |
| CPU time | 1.46 seconds |
| Started | Aug 29 03:36:56 AM UTC 24 |
| Finished | Aug 29 03:36:59 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3737111454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_out_stall.3737111454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_out_trans_nak.1487928772 |
| Short name | T1187 |
| Test name | |
| Test status | |
| Simulation time | 244152514 ps |
| CPU time | 1.74 seconds |
| Started | Aug 29 03:36:56 AM UTC 24 |
| Finished | Aug 29 03:36:59 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1487928772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 12.usbdev_out_trans_nak.1487928772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_pending_in_trans.3028341272 |
| Short name | T1184 |
| Test name | |
| Test status | |
| Simulation time | 150404958 ps |
| CPU time | 1.4 seconds |
| Started | Aug 29 03:36:56 AM UTC 24 |
| Finished | Aug 29 03:36:59 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3028341272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 12.usbdev_pending_in_trans.3028341272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_phy_config_pinflip.1214944787 |
| Short name | T1181 |
| Test name | |
| Test status | |
| Simulation time | 188427013 ps |
| CPU time | 1.17 seconds |
| Started | Aug 29 03:36:56 AM UTC 24 |
| Finished | Aug 29 03:36:58 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1214944787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 12.usbdev_phy_config_pinflip.1214944787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_phy_config_usb_ref_disable.644644057 |
| Short name | T1186 |
| Test name | |
| Test status | |
| Simulation time | 151346745 ps |
| CPU time | 1.43 seconds |
| Started | Aug 29 03:36:56 AM UTC 24 |
| Finished | Aug 29 03:36:59 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=644644057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 12.usbdev_phy_config_usb_ref_disable.644644057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_phy_pins_sense.1449869857 |
| Short name | T1192 |
| Test name | |
| Test status | |
| Simulation time | 47553165 ps |
| CPU time | 0.92 seconds |
| Started | Aug 29 03:37:02 AM UTC 24 |
| Finished | Aug 29 03:37:04 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1449869857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_phy_pins_sense.1449869857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_buffer.1202154581 |
| Short name | T297 |
| Test name | |
| Test status | |
| Simulation time | 10368230483 ps |
| CPU time | 28.09 seconds |
| Started | Aug 29 03:37:02 AM UTC 24 |
| Finished | Aug 29 03:37:32 AM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1202154581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 12.usbdev_pkt_buffer.1202154581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_received.3850331036 |
| Short name | T1194 |
| Test name | |
| Test status | |
| Simulation time | 150413748 ps |
| CPU time | 1.35 seconds |
| Started | Aug 29 03:37:03 AM UTC 24 |
| Finished | Aug 29 03:37:05 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3850331036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_pkt_received.3850331036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_sent.647791821 |
| Short name | T1200 |
| Test name | |
| Test status | |
| Simulation time | 267893443 ps |
| CPU time | 1.85 seconds |
| Started | Aug 29 03:37:03 AM UTC 24 |
| Finished | Aug 29 03:37:05 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=647791821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_pkt_sent.647791821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_random_length_in_transaction.2893441456 |
| Short name | T1199 |
| Test name | |
| Test status | |
| Simulation time | 240796855 ps |
| CPU time | 1.71 seconds |
| Started | Aug 29 03:37:03 AM UTC 24 |
| Finished | Aug 29 03:37:05 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2893441456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 12.usbdev_random_length_in_transaction.2893441456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_random_length_out_transaction.2728505201 |
| Short name | T1195 |
| Test name | |
| Test status | |
| Simulation time | 152467641 ps |
| CPU time | 1.19 seconds |
| Started | Aug 29 03:37:03 AM UTC 24 |
| Finished | Aug 29 03:37:05 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2728505201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 12.usbdev_random_length_out_transaction.2728505201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_resume_link_active.1378867975 |
| Short name | T1262 |
| Test name | |
| Test status | |
| Simulation time | 20169413990 ps |
| CPU time | 27.13 seconds |
| Started | Aug 29 03:37:03 AM UTC 24 |
| Finished | Aug 29 03:37:31 AM UTC 24 |
| Peak memory | 217348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1378867975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 12.usbdev_resume_link_active.1378867975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_rx_crc_err.3325038277 |
| Short name | T1197 |
| Test name | |
| Test status | |
| Simulation time | 169244351 ps |
| CPU time | 1.51 seconds |
| Started | Aug 29 03:37:03 AM UTC 24 |
| Finished | Aug 29 03:37:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3325038277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 12.usbdev_rx_crc_err.3325038277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_rx_full.1891109229 |
| Short name | T1201 |
| Test name | |
| Test status | |
| Simulation time | 251531885 ps |
| CPU time | 1.6 seconds |
| Started | Aug 29 03:37:03 AM UTC 24 |
| Finished | Aug 29 03:37:05 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1891109229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_rx_full.1891109229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_setup_stage.3695286680 |
| Short name | T1198 |
| Test name | |
| Test status | |
| Simulation time | 151075158 ps |
| CPU time | 1.39 seconds |
| Started | Aug 29 03:37:03 AM UTC 24 |
| Finished | Aug 29 03:37:05 AM UTC 24 |
| Peak memory | 215000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3695286680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_setup_stage.3695286680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_setup_trans_ignored.2735474314 |
| Short name | T1203 |
| Test name | |
| Test status | |
| Simulation time | 150631229 ps |
| CPU time | 1.54 seconds |
| Started | Aug 29 03:37:03 AM UTC 24 |
| Finished | Aug 29 03:37:06 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2735474314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 12.usbdev_setup_trans_ignored.2735474314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_smoke.2149051185 |
| Short name | T1205 |
| Test name | |
| Test status | |
| Simulation time | 209396664 ps |
| CPU time | 1.72 seconds |
| Started | Aug 29 03:37:03 AM UTC 24 |
| Finished | Aug 29 03:37:06 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2149051185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_smoke.2149051185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_spurious_pids_ignored.988796033 |
| Short name | T1259 |
| Test name | |
| Test status | |
| Simulation time | 3109906753 ps |
| CPU time | 22.47 seconds |
| Started | Aug 29 03:37:03 AM UTC 24 |
| Finished | Aug 29 03:37:27 AM UTC 24 |
| Peak memory | 229660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=988796033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 12.usbdev_spurious_pids_ignored.988796033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_stall_priority_over_nak.4172395480 |
| Short name | T1204 |
| Test name | |
| Test status | |
| Simulation time | 169763070 ps |
| CPU time | 1.41 seconds |
| Started | Aug 29 03:37:03 AM UTC 24 |
| Finished | Aug 29 03:37:06 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4172395480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_stall_priority_over_nak.4172395480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_stall_trans.798658763 |
| Short name | T1211 |
| Test name | |
| Test status | |
| Simulation time | 158991760 ps |
| CPU time | 0.97 seconds |
| Started | Aug 29 03:37:09 AM UTC 24 |
| Finished | Aug 29 03:37:11 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=798658763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 12.usbdev_stall_trans.798658763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_stream_len_max.4148997644 |
| Short name | T1214 |
| Test name | |
| Test status | |
| Simulation time | 256545192 ps |
| CPU time | 1.42 seconds |
| Started | Aug 29 03:37:10 AM UTC 24 |
| Finished | Aug 29 03:37:12 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4148997644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_stream_len_max.4148997644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_streaming_out.959645245 |
| Short name | T1263 |
| Test name | |
| Test status | |
| Simulation time | 2286665414 ps |
| CPU time | 21.74 seconds |
| Started | Aug 29 03:37:09 AM UTC 24 |
| Finished | Aug 29 03:37:32 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=959645245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_streaming_out.959645245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_timeout_missing_host_handshake.1844309217 |
| Short name | T1241 |
| Test name | |
| Test status | |
| Simulation time | 1693196759 ps |
| CPU time | 35.28 seconds |
| Started | Aug 29 03:36:48 AM UTC 24 |
| Finished | Aug 29 03:37:24 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1844309217 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_timeout_missing_host_handshake.1844309217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/12.usbdev_tx_rx_disruption.1746636029 |
| Short name | T1216 |
| Test name | |
| Test status | |
| Simulation time | 608368879 ps |
| CPU time | 1.92 seconds |
| Started | Aug 29 03:37:10 AM UTC 24 |
| Finished | Aug 29 03:37:12 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1746636029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_t x_rx_disruption.1746636029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/12.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/120.usbdev_endpoint_types.2072232204 |
| Short name | T488 |
| Test name | |
| Test status | |
| Simulation time | 434767503 ps |
| CPU time | 1.51 seconds |
| Started | Aug 29 04:06:24 AM UTC 24 |
| Finished | Aug 29 04:06:27 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2072232204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 120.usbdev_endpoint_types.2072232204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/120.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/120.usbdev_fifo_levels.2999737588 |
| Short name | T3368 |
| Test name | |
| Test status | |
| Simulation time | 179272486 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 04:06:25 AM UTC 24 |
| Finished | Aug 29 04:06:27 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2999737588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 120.usbdev_fifo_levels.2999737588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/120.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/120.usbdev_tx_rx_disruption.2225753623 |
| Short name | T174 |
| Test name | |
| Test status | |
| Simulation time | 613714782 ps |
| CPU time | 1.6 seconds |
| Started | Aug 29 04:06:25 AM UTC 24 |
| Finished | Aug 29 04:06:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2225753623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 120.usbdev_ tx_rx_disruption.2225753623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/120.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/121.usbdev_fifo_levels.4121705386 |
| Short name | T3364 |
| Test name | |
| Test status | |
| Simulation time | 151915963 ps |
| CPU time | 0.77 seconds |
| Started | Aug 29 04:06:25 AM UTC 24 |
| Finished | Aug 29 04:06:27 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4121705386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 121.usbdev_fifo_levels.4121705386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/121.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/121.usbdev_tx_rx_disruption.952525866 |
| Short name | T3375 |
| Test name | |
| Test status | |
| Simulation time | 501440044 ps |
| CPU time | 1.49 seconds |
| Started | Aug 29 04:06:25 AM UTC 24 |
| Finished | Aug 29 04:06:27 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=952525866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 121.usbdev_t x_rx_disruption.952525866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/121.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/122.usbdev_tx_rx_disruption.778978864 |
| Short name | T3382 |
| Test name | |
| Test status | |
| Simulation time | 498085913 ps |
| CPU time | 1.63 seconds |
| Started | Aug 29 04:06:25 AM UTC 24 |
| Finished | Aug 29 04:06:28 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=778978864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 122.usbdev_t x_rx_disruption.778978864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/122.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/123.usbdev_endpoint_types.3602968910 |
| Short name | T552 |
| Test name | |
| Test status | |
| Simulation time | 376368116 ps |
| CPU time | 1.53 seconds |
| Started | Aug 29 04:06:25 AM UTC 24 |
| Finished | Aug 29 04:06:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3602968910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 123.usbdev_endpoint_types.3602968910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/123.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/123.usbdev_fifo_levels.442211862 |
| Short name | T387 |
| Test name | |
| Test status | |
| Simulation time | 325257666 ps |
| CPU time | 1.16 seconds |
| Started | Aug 29 04:06:25 AM UTC 24 |
| Finished | Aug 29 04:06:27 AM UTC 24 |
| Peak memory | 214936 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=442211862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 123.usbdev_fifo_levels.442211862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/123.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/123.usbdev_tx_rx_disruption.23206446 |
| Short name | T3381 |
| Test name | |
| Test status | |
| Simulation time | 524729758 ps |
| CPU time | 1.52 seconds |
| Started | Aug 29 04:06:25 AM UTC 24 |
| Finished | Aug 29 04:06:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=23206446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 123.usbdev_tx _rx_disruption.23206446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/123.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/124.usbdev_endpoint_types.456292898 |
| Short name | T3391 |
| Test name | |
| Test status | |
| Simulation time | 806275016 ps |
| CPU time | 1.9 seconds |
| Started | Aug 29 04:06:25 AM UTC 24 |
| Finished | Aug 29 04:06:28 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=456292898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 124.usbdev_endpoint_types.456292898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/124.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/124.usbdev_fifo_levels.1957921137 |
| Short name | T348 |
| Test name | |
| Test status | |
| Simulation time | 289903452 ps |
| CPU time | 1.1 seconds |
| Started | Aug 29 04:06:25 AM UTC 24 |
| Finished | Aug 29 04:06:27 AM UTC 24 |
| Peak memory | 215008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1957921137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 124.usbdev_fifo_levels.1957921137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/124.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/124.usbdev_tx_rx_disruption.916272690 |
| Short name | T3388 |
| Test name | |
| Test status | |
| Simulation time | 590360410 ps |
| CPU time | 1.67 seconds |
| Started | Aug 29 04:06:25 AM UTC 24 |
| Finished | Aug 29 04:06:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=916272690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 124.usbdev_t x_rx_disruption.916272690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/124.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/125.usbdev_endpoint_types.1532290558 |
| Short name | T3354 |
| Test name | |
| Test status | |
| Simulation time | 185990944 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 04:06:25 AM UTC 24 |
| Finished | Aug 29 04:06:27 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1532290558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 125.usbdev_endpoint_types.1532290558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/125.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/125.usbdev_fifo_levels.449178949 |
| Short name | T3360 |
| Test name | |
| Test status | |
| Simulation time | 212746999 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 04:06:25 AM UTC 24 |
| Finished | Aug 29 04:06:27 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=449178949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 125.usbdev_fifo_levels.449178949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/125.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/125.usbdev_tx_rx_disruption.2804699622 |
| Short name | T3390 |
| Test name | |
| Test status | |
| Simulation time | 565144957 ps |
| CPU time | 1.73 seconds |
| Started | Aug 29 04:06:25 AM UTC 24 |
| Finished | Aug 29 04:06:28 AM UTC 24 |
| Peak memory | 214940 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2804699622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 125.usbdev_ tx_rx_disruption.2804699622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/125.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/126.usbdev_endpoint_types.3131612356 |
| Short name | T3380 |
| Test name | |
| Test status | |
| Simulation time | 282095266 ps |
| CPU time | 1.19 seconds |
| Started | Aug 29 04:06:25 AM UTC 24 |
| Finished | Aug 29 04:06:28 AM UTC 24 |
| Peak memory | 214952 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3131612356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 126.usbdev_endpoint_types.3131612356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/126.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/126.usbdev_fifo_levels.3344932638 |
| Short name | T3355 |
| Test name | |
| Test status | |
| Simulation time | 158434338 ps |
| CPU time | 0.77 seconds |
| Started | Aug 29 04:06:25 AM UTC 24 |
| Finished | Aug 29 04:06:27 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3344932638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 126.usbdev_fifo_levels.3344932638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/126.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/126.usbdev_tx_rx_disruption.760324681 |
| Short name | T3386 |
| Test name | |
| Test status | |
| Simulation time | 535043054 ps |
| CPU time | 1.57 seconds |
| Started | Aug 29 04:06:25 AM UTC 24 |
| Finished | Aug 29 04:06:28 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=760324681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 126.usbdev_t x_rx_disruption.760324681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/126.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/127.usbdev_endpoint_types.100907126 |
| Short name | T3384 |
| Test name | |
| Test status | |
| Simulation time | 403306289 ps |
| CPU time | 1.36 seconds |
| Started | Aug 29 04:06:25 AM UTC 24 |
| Finished | Aug 29 04:06:28 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=100907126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 127.usbdev_endpoint_types.100907126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/127.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/127.usbdev_tx_rx_disruption.2889848710 |
| Short name | T3385 |
| Test name | |
| Test status | |
| Simulation time | 495890216 ps |
| CPU time | 1.55 seconds |
| Started | Aug 29 04:06:25 AM UTC 24 |
| Finished | Aug 29 04:06:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2889848710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 127.usbdev_ tx_rx_disruption.2889848710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/127.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/128.usbdev_endpoint_types.1313749595 |
| Short name | T3383 |
| Test name | |
| Test status | |
| Simulation time | 263769263 ps |
| CPU time | 1.28 seconds |
| Started | Aug 29 04:06:25 AM UTC 24 |
| Finished | Aug 29 04:06:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1313749595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 128.usbdev_endpoint_types.1313749595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/128.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/128.usbdev_tx_rx_disruption.302575597 |
| Short name | T3387 |
| Test name | |
| Test status | |
| Simulation time | 508476814 ps |
| CPU time | 1.54 seconds |
| Started | Aug 29 04:06:25 AM UTC 24 |
| Finished | Aug 29 04:06:28 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=302575597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 128.usbdev_t x_rx_disruption.302575597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/128.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/129.usbdev_endpoint_types.2881908116 |
| Short name | T554 |
| Test name | |
| Test status | |
| Simulation time | 305786844 ps |
| CPU time | 1.2 seconds |
| Started | Aug 29 04:06:25 AM UTC 24 |
| Finished | Aug 29 04:06:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2881908116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 129.usbdev_endpoint_types.2881908116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/129.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/129.usbdev_tx_rx_disruption.3788591304 |
| Short name | T3392 |
| Test name | |
| Test status | |
| Simulation time | 606359951 ps |
| CPU time | 1.54 seconds |
| Started | Aug 29 04:06:25 AM UTC 24 |
| Finished | Aug 29 04:06:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3788591304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 129.usbdev_ tx_rx_disruption.3788591304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/129.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_alert_test.3517233409 |
| Short name | T1270 |
| Test name | |
| Test status | |
| Simulation time | 37621992 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 03:37:31 AM UTC 24 |
| Finished | Aug 29 03:37:33 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3517233409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 13.usbdev_alert_test.3517233409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_disconnect.3236761511 |
| Short name | T259 |
| Test name | |
| Test status | |
| Simulation time | 4334377118 ps |
| CPU time | 8.87 seconds |
| Started | Aug 29 03:37:10 AM UTC 24 |
| Finished | Aug 29 03:37:20 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3236761511 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_disconnect.3236761511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_reset.1823372347 |
| Short name | T1286 |
| Test name | |
| Test status | |
| Simulation time | 19912454986 ps |
| CPU time | 27.17 seconds |
| Started | Aug 29 03:37:10 AM UTC 24 |
| Finished | Aug 29 03:37:38 AM UTC 24 |
| Peak memory | 217436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1823372347 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_reset.1823372347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_resume.786782753 |
| Short name | T104 |
| Test name | |
| Test status | |
| Simulation time | 24055767150 ps |
| CPU time | 35.75 seconds |
| Started | Aug 29 03:37:10 AM UTC 24 |
| Finished | Aug 29 03:37:47 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=786782753 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_resume.786782753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_av_buffer.102584185 |
| Short name | T1213 |
| Test name | |
| Test status | |
| Simulation time | 180857121 ps |
| CPU time | 0.98 seconds |
| Started | Aug 29 03:37:10 AM UTC 24 |
| Finished | Aug 29 03:37:12 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=102584185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_av_buffer.102584185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_bitstuff_err.2145572481 |
| Short name | T1215 |
| Test name | |
| Test status | |
| Simulation time | 148882869 ps |
| CPU time | 1.4 seconds |
| Started | Aug 29 03:37:10 AM UTC 24 |
| Finished | Aug 29 03:37:12 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2145572481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_bitstuff_err.2145572481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_data_toggle_clear.539666298 |
| Short name | T1219 |
| Test name | |
| Test status | |
| Simulation time | 246193006 ps |
| CPU time | 1.72 seconds |
| Started | Aug 29 03:37:10 AM UTC 24 |
| Finished | Aug 29 03:37:13 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=539666298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 13.usbdev_data_toggle_clear.539666298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_data_toggle_restore.2465567162 |
| Short name | T1223 |
| Test name | |
| Test status | |
| Simulation time | 883132973 ps |
| CPU time | 3.42 seconds |
| Started | Aug 29 03:37:10 AM UTC 24 |
| Finished | Aug 29 03:37:14 AM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2465567162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_data_toggle_restore.2465567162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_device_address.245083114 |
| Short name | T611 |
| Test name | |
| Test status | |
| Simulation time | 46868226436 ps |
| CPU time | 83.18 seconds |
| Started | Aug 29 03:37:10 AM UTC 24 |
| Finished | Aug 29 03:38:35 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=245083114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_device_address.245083114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_device_timeout.3720303428 |
| Short name | T1226 |
| Test name | |
| Test status | |
| Simulation time | 778371722 ps |
| CPU time | 5.27 seconds |
| Started | Aug 29 03:37:10 AM UTC 24 |
| Finished | Aug 29 03:37:17 AM UTC 24 |
| Peak memory | 217324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3720303428 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_device_timeout.3720303428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_disable_endpoint.1172037672 |
| Short name | T1221 |
| Test name | |
| Test status | |
| Simulation time | 626441495 ps |
| CPU time | 1.66 seconds |
| Started | Aug 29 03:37:10 AM UTC 24 |
| Finished | Aug 29 03:37:13 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1172037672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 13.usbdev_disable_endpoint.1172037672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_disconnected.3801055082 |
| Short name | T1220 |
| Test name | |
| Test status | |
| Simulation time | 146823971 ps |
| CPU time | 1.37 seconds |
| Started | Aug 29 03:37:10 AM UTC 24 |
| Finished | Aug 29 03:37:13 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3801055082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_disconnected.3801055082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_enable.780784260 |
| Short name | T1217 |
| Test name | |
| Test status | |
| Simulation time | 32430479 ps |
| CPU time | 0.95 seconds |
| Started | Aug 29 03:37:10 AM UTC 24 |
| Finished | Aug 29 03:37:12 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=780784260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_enable.780784260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_endpoint_access.1676625963 |
| Short name | T1224 |
| Test name | |
| Test status | |
| Simulation time | 864077596 ps |
| CPU time | 3.22 seconds |
| Started | Aug 29 03:37:10 AM UTC 24 |
| Finished | Aug 29 03:37:15 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1676625963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_endpoint_access.1676625963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_fifo_rst.3433441083 |
| Short name | T1237 |
| Test name | |
| Test status | |
| Simulation time | 194623252 ps |
| CPU time | 3.07 seconds |
| Started | Aug 29 03:37:15 AM UTC 24 |
| Finished | Aug 29 03:37:19 AM UTC 24 |
| Peak memory | 217280 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3433441083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_fifo_rst.3433441083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_in_iso.2265576630 |
| Short name | T1231 |
| Test name | |
| Test status | |
| Simulation time | 186749410 ps |
| CPU time | 1.67 seconds |
| Started | Aug 29 03:37:15 AM UTC 24 |
| Finished | Aug 29 03:37:18 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2265576630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 13.usbdev_in_iso.2265576630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_in_stall.4197202293 |
| Short name | T1230 |
| Test name | |
| Test status | |
| Simulation time | 143216314 ps |
| CPU time | 1.29 seconds |
| Started | Aug 29 03:37:15 AM UTC 24 |
| Finished | Aug 29 03:37:18 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4197202293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_in_stall.4197202293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_in_trans.2119787930 |
| Short name | T1229 |
| Test name | |
| Test status | |
| Simulation time | 171182592 ps |
| CPU time | 1.14 seconds |
| Started | Aug 29 03:37:15 AM UTC 24 |
| Finished | Aug 29 03:37:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2119787930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_in_trans.2119787930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_invalid_sync.1981260760 |
| Short name | T1386 |
| Test name | |
| Test status | |
| Simulation time | 2585917037 ps |
| CPU time | 63.6 seconds |
| Started | Aug 29 03:37:15 AM UTC 24 |
| Finished | Aug 29 03:38:20 AM UTC 24 |
| Peak memory | 229584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1981260760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 13.usbdev_invalid_sync.1981260760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_iso_retraction.2570476249 |
| Short name | T1321 |
| Test name | |
| Test status | |
| Simulation time | 3554070639 ps |
| CPU time | 39.24 seconds |
| Started | Aug 29 03:37:15 AM UTC 24 |
| Finished | Aug 29 03:37:56 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2570476249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_iso_retraction.2570476249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_link_in_err.3150022556 |
| Short name | T1232 |
| Test name | |
| Test status | |
| Simulation time | 167221116 ps |
| CPU time | 1.52 seconds |
| Started | Aug 29 03:37:15 AM UTC 24 |
| Finished | Aug 29 03:37:18 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3150022556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_link_in_err.3150022556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_link_resume.2081436950 |
| Short name | T1339 |
| Test name | |
| Test status | |
| Simulation time | 31323400002 ps |
| CPU time | 45.85 seconds |
| Started | Aug 29 03:37:15 AM UTC 24 |
| Finished | Aug 29 03:38:03 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2081436950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_link_resume.2081436950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_link_suspend.3034340689 |
| Short name | T1266 |
| Test name | |
| Test status | |
| Simulation time | 10900845873 ps |
| CPU time | 16.18 seconds |
| Started | Aug 29 03:37:15 AM UTC 24 |
| Finished | Aug 29 03:37:33 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3034340689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_link_suspend.3034340689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_low_speed_traffic.2449882588 |
| Short name | T1450 |
| Test name | |
| Test status | |
| Simulation time | 3799893397 ps |
| CPU time | 92.57 seconds |
| Started | Aug 29 03:37:15 AM UTC 24 |
| Finished | Aug 29 03:38:50 AM UTC 24 |
| Peak memory | 229688 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2449882588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_low_speed_traffic.2449882588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_max_inter_pkt_delay.3164857018 |
| Short name | T1459 |
| Test name | |
| Test status | |
| Simulation time | 3990034258 ps |
| CPU time | 96.05 seconds |
| Started | Aug 29 03:37:16 AM UTC 24 |
| Finished | Aug 29 03:38:54 AM UTC 24 |
| Peak memory | 229572 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3164857018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_inter_pkt_delay.3164857018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_max_length_in_transaction.2837444111 |
| Short name | T1234 |
| Test name | |
| Test status | |
| Simulation time | 257499493 ps |
| CPU time | 1.5 seconds |
| Started | Aug 29 03:37:16 AM UTC 24 |
| Finished | Aug 29 03:37:18 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2837444111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 13.usbdev_max_length_in_transaction.2837444111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_max_length_out_transaction.2700147663 |
| Short name | T1233 |
| Test name | |
| Test status | |
| Simulation time | 189519758 ps |
| CPU time | 1.31 seconds |
| Started | Aug 29 03:37:16 AM UTC 24 |
| Finished | Aug 29 03:37:18 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2700147663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_max_length_out_transaction.2700147663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_max_non_iso_usb_traffic.1669202069 |
| Short name | T1287 |
| Test name | |
| Test status | |
| Simulation time | 2428890689 ps |
| CPU time | 23.5 seconds |
| Started | Aug 29 03:37:16 AM UTC 24 |
| Finished | Aug 29 03:37:40 AM UTC 24 |
| Peak memory | 227524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1669202069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_non_iso_usb_traffic.1669202069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_max_usb_traffic.3609494710 |
| Short name | T1299 |
| Test name | |
| Test status | |
| Simulation time | 2875937315 ps |
| CPU time | 27.93 seconds |
| Started | Aug 29 03:37:16 AM UTC 24 |
| Finished | Aug 29 03:37:45 AM UTC 24 |
| Peak memory | 229616 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3609494710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_usb_traffic.3609494710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_min_inter_pkt_delay.692346637 |
| Short name | T1279 |
| Test name | |
| Test status | |
| Simulation time | 2301540708 ps |
| CPU time | 16.48 seconds |
| Started | Aug 29 03:37:16 AM UTC 24 |
| Finished | Aug 29 03:37:33 AM UTC 24 |
| Peak memory | 227568 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=692346637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_min_inter_pkt_delay.692346637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_min_length_in_transaction.3572249617 |
| Short name | T1244 |
| Test name | |
| Test status | |
| Simulation time | 182147038 ps |
| CPU time | 1.35 seconds |
| Started | Aug 29 03:37:22 AM UTC 24 |
| Finished | Aug 29 03:37:24 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3572249617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 13.usbdev_min_length_in_transaction.3572249617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_min_length_out_transaction.671825554 |
| Short name | T1250 |
| Test name | |
| Test status | |
| Simulation time | 192778643 ps |
| CPU time | 1.55 seconds |
| Started | Aug 29 03:37:22 AM UTC 24 |
| Finished | Aug 29 03:37:25 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=671825554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 13.usbdev_min_length_out_transaction.671825554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_nak_trans.774108125 |
| Short name | T156 |
| Test name | |
| Test status | |
| Simulation time | 200500510 ps |
| CPU time | 1.49 seconds |
| Started | Aug 29 03:37:22 AM UTC 24 |
| Finished | Aug 29 03:37:25 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=774108125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_nak_trans.774108125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_out_iso.1482267996 |
| Short name | T1246 |
| Test name | |
| Test status | |
| Simulation time | 172423538 ps |
| CPU time | 1.39 seconds |
| Started | Aug 29 03:37:22 AM UTC 24 |
| Finished | Aug 29 03:37:25 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1482267996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 13.usbdev_out_iso.1482267996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_out_stall.528950948 |
| Short name | T1245 |
| Test name | |
| Test status | |
| Simulation time | 233715075 ps |
| CPU time | 1.27 seconds |
| Started | Aug 29 03:37:22 AM UTC 24 |
| Finished | Aug 29 03:37:24 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=528950948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_out_stall.528950948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_out_trans_nak.905816233 |
| Short name | T1247 |
| Test name | |
| Test status | |
| Simulation time | 167335307 ps |
| CPU time | 1.24 seconds |
| Started | Aug 29 03:37:22 AM UTC 24 |
| Finished | Aug 29 03:37:25 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=905816233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_out_trans_nak.905816233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_pending_in_trans.3027392815 |
| Short name | T1248 |
| Test name | |
| Test status | |
| Simulation time | 200937024 ps |
| CPU time | 1.4 seconds |
| Started | Aug 29 03:37:22 AM UTC 24 |
| Finished | Aug 29 03:37:25 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3027392815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 13.usbdev_pending_in_trans.3027392815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_phy_config_pinflip.2283771870 |
| Short name | T1254 |
| Test name | |
| Test status | |
| Simulation time | 223224177 ps |
| CPU time | 1.66 seconds |
| Started | Aug 29 03:37:22 AM UTC 24 |
| Finished | Aug 29 03:37:25 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2283771870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 13.usbdev_phy_config_pinflip.2283771870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_phy_config_usb_ref_disable.2248344414 |
| Short name | T1251 |
| Test name | |
| Test status | |
| Simulation time | 141713820 ps |
| CPU time | 1.39 seconds |
| Started | Aug 29 03:37:22 AM UTC 24 |
| Finished | Aug 29 03:37:25 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2248344414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_phy_config_usb_ref_disable.2248344414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_phy_pins_sense.614497682 |
| Short name | T1242 |
| Test name | |
| Test status | |
| Simulation time | 53359553 ps |
| CPU time | 0.93 seconds |
| Started | Aug 29 03:37:22 AM UTC 24 |
| Finished | Aug 29 03:37:24 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=614497682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_phy_pins_sense.614497682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_buffer.3938940360 |
| Short name | T1342 |
| Test name | |
| Test status | |
| Simulation time | 16272589205 ps |
| CPU time | 41.42 seconds |
| Started | Aug 29 03:37:22 AM UTC 24 |
| Finished | Aug 29 03:38:05 AM UTC 24 |
| Peak memory | 227652 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3938940360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_pkt_buffer.3938940360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_received.77350841 |
| Short name | T1249 |
| Test name | |
| Test status | |
| Simulation time | 174969041 ps |
| CPU time | 1.08 seconds |
| Started | Aug 29 03:37:23 AM UTC 24 |
| Finished | Aug 29 03:37:25 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=77350841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_pkt_received.77350841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_sent.1081134128 |
| Short name | T1253 |
| Test name | |
| Test status | |
| Simulation time | 169535646 ps |
| CPU time | 1.36 seconds |
| Started | Aug 29 03:37:23 AM UTC 24 |
| Finished | Aug 29 03:37:25 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1081134128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_pkt_sent.1081134128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_random_length_in_transaction.1784936117 |
| Short name | T1252 |
| Test name | |
| Test status | |
| Simulation time | 224508252 ps |
| CPU time | 1.18 seconds |
| Started | Aug 29 03:37:23 AM UTC 24 |
| Finished | Aug 29 03:37:25 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1784936117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_random_length_in_transaction.1784936117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_random_length_out_transaction.2885757145 |
| Short name | T1257 |
| Test name | |
| Test status | |
| Simulation time | 178463408 ps |
| CPU time | 1.53 seconds |
| Started | Aug 29 03:37:23 AM UTC 24 |
| Finished | Aug 29 03:37:25 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2885757145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 13.usbdev_random_length_out_transaction.2885757145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_resume_link_active.3431698179 |
| Short name | T1317 |
| Test name | |
| Test status | |
| Simulation time | 20210205742 ps |
| CPU time | 27.73 seconds |
| Started | Aug 29 03:37:23 AM UTC 24 |
| Finished | Aug 29 03:37:52 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3431698179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 13.usbdev_resume_link_active.3431698179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_rx_crc_err.2597257708 |
| Short name | T1256 |
| Test name | |
| Test status | |
| Simulation time | 181663859 ps |
| CPU time | 1.31 seconds |
| Started | Aug 29 03:37:23 AM UTC 24 |
| Finished | Aug 29 03:37:25 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2597257708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_rx_crc_err.2597257708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_rx_full.3152055119 |
| Short name | T1255 |
| Test name | |
| Test status | |
| Simulation time | 249289931 ps |
| CPU time | 1.22 seconds |
| Started | Aug 29 03:37:23 AM UTC 24 |
| Finished | Aug 29 03:37:25 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3152055119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 13.usbdev_rx_full.3152055119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_setup_stage.4204789572 |
| Short name | T1272 |
| Test name | |
| Test status | |
| Simulation time | 190498060 ps |
| CPU time | 1.32 seconds |
| Started | Aug 29 03:37:31 AM UTC 24 |
| Finished | Aug 29 03:37:33 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4204789572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_setup_stage.4204789572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_setup_trans_ignored.347093137 |
| Short name | T1267 |
| Test name | |
| Test status | |
| Simulation time | 143574701 ps |
| CPU time | 1.12 seconds |
| Started | Aug 29 03:37:31 AM UTC 24 |
| Finished | Aug 29 03:37:33 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=347093137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 13.usbdev_setup_trans_ignored.347093137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_smoke.871148546 |
| Short name | T1269 |
| Test name | |
| Test status | |
| Simulation time | 184840481 ps |
| CPU time | 1.16 seconds |
| Started | Aug 29 03:37:31 AM UTC 24 |
| Finished | Aug 29 03:37:33 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=871148546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_smoke.871148546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_spurious_pids_ignored.4112155347 |
| Short name | T1404 |
| Test name | |
| Test status | |
| Simulation time | 2422552140 ps |
| CPU time | 58.87 seconds |
| Started | Aug 29 03:37:31 AM UTC 24 |
| Finished | Aug 29 03:38:31 AM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4112155347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 13.usbdev_spurious_pids_ignored.4112155347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_stall_priority_over_nak.2668194775 |
| Short name | T1268 |
| Test name | |
| Test status | |
| Simulation time | 208587463 ps |
| CPU time | 1.02 seconds |
| Started | Aug 29 03:37:31 AM UTC 24 |
| Finished | Aug 29 03:37:33 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2668194775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_stall_priority_over_nak.2668194775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_stall_trans.1110934409 |
| Short name | T1271 |
| Test name | |
| Test status | |
| Simulation time | 266598101 ps |
| CPU time | 1 seconds |
| Started | Aug 29 03:37:31 AM UTC 24 |
| Finished | Aug 29 03:37:33 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1110934409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_stall_trans.1110934409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_stream_len_max.2108803445 |
| Short name | T1283 |
| Test name | |
| Test status | |
| Simulation time | 1122073164 ps |
| CPU time | 3.49 seconds |
| Started | Aug 29 03:37:31 AM UTC 24 |
| Finished | Aug 29 03:37:36 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2108803445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_stream_len_max.2108803445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_streaming_out.341158511 |
| Short name | T1366 |
| Test name | |
| Test status | |
| Simulation time | 1721766704 ps |
| CPU time | 43.25 seconds |
| Started | Aug 29 03:37:31 AM UTC 24 |
| Finished | Aug 29 03:38:16 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=341158511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_streaming_out.341158511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_timeout_missing_host_handshake.2354326547 |
| Short name | T1239 |
| Test name | |
| Test status | |
| Simulation time | 1100462682 ps |
| CPU time | 10.23 seconds |
| Started | Aug 29 03:37:10 AM UTC 24 |
| Finished | Aug 29 03:37:22 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2354326547 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_timeout_missing_host_handshake.2354326547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/13.usbdev_tx_rx_disruption.2087156151 |
| Short name | T184 |
| Test name | |
| Test status | |
| Simulation time | 469086155 ps |
| CPU time | 1.89 seconds |
| Started | Aug 29 03:37:31 AM UTC 24 |
| Finished | Aug 29 03:37:34 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2087156151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_t x_rx_disruption.2087156151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/13.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/130.usbdev_endpoint_types.2059525373 |
| Short name | T561 |
| Test name | |
| Test status | |
| Simulation time | 234087266 ps |
| CPU time | 0.95 seconds |
| Started | Aug 29 04:06:25 AM UTC 24 |
| Finished | Aug 29 04:06:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2059525373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 130.usbdev_endpoint_types.2059525373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/130.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/130.usbdev_fifo_levels.1819853453 |
| Short name | T3377 |
| Test name | |
| Test status | |
| Simulation time | 179488418 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 04:06:25 AM UTC 24 |
| Finished | Aug 29 04:06:28 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1819853453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 130.usbdev_fifo_levels.1819853453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/130.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/130.usbdev_tx_rx_disruption.1891843009 |
| Short name | T3389 |
| Test name | |
| Test status | |
| Simulation time | 514364414 ps |
| CPU time | 1.52 seconds |
| Started | Aug 29 04:06:25 AM UTC 24 |
| Finished | Aug 29 04:06:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1891843009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 130.usbdev_ tx_rx_disruption.1891843009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/130.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/131.usbdev_fifo_levels.3371744311 |
| Short name | T3376 |
| Test name | |
| Test status | |
| Simulation time | 180223753 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 04:06:25 AM UTC 24 |
| Finished | Aug 29 04:06:27 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3371744311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 131.usbdev_fifo_levels.3371744311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/131.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/131.usbdev_tx_rx_disruption.3590046151 |
| Short name | T3397 |
| Test name | |
| Test status | |
| Simulation time | 523946782 ps |
| CPU time | 1.42 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:41 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3590046151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 131.usbdev_ tx_rx_disruption.3590046151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/131.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/132.usbdev_endpoint_types.569578410 |
| Short name | T538 |
| Test name | |
| Test status | |
| Simulation time | 397406921 ps |
| CPU time | 1.26 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:41 AM UTC 24 |
| Peak memory | 214868 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=569578410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 132.usbdev_endpoint_types.569578410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/132.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/132.usbdev_fifo_levels.1491130846 |
| Short name | T3393 |
| Test name | |
| Test status | |
| Simulation time | 155644497 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:40 AM UTC 24 |
| Peak memory | 214828 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1491130846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 132.usbdev_fifo_levels.1491130846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/132.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/132.usbdev_tx_rx_disruption.665758523 |
| Short name | T3401 |
| Test name | |
| Test status | |
| Simulation time | 567370166 ps |
| CPU time | 1.57 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:41 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=665758523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 132.usbdev_t x_rx_disruption.665758523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/132.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/133.usbdev_endpoint_types.1656397693 |
| Short name | T523 |
| Test name | |
| Test status | |
| Simulation time | 651066159 ps |
| CPU time | 1.44 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:41 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1656397693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 133.usbdev_endpoint_types.1656397693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/133.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/133.usbdev_fifo_levels.1194013799 |
| Short name | T3394 |
| Test name | |
| Test status | |
| Simulation time | 290859171 ps |
| CPU time | 1.01 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:41 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1194013799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 133.usbdev_fifo_levels.1194013799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/133.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/133.usbdev_tx_rx_disruption.1181494106 |
| Short name | T3399 |
| Test name | |
| Test status | |
| Simulation time | 424142782 ps |
| CPU time | 1.29 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:41 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1181494106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 133.usbdev_ tx_rx_disruption.1181494106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/133.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/134.usbdev_endpoint_types.407896689 |
| Short name | T555 |
| Test name | |
| Test status | |
| Simulation time | 427629251 ps |
| CPU time | 1.13 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:41 AM UTC 24 |
| Peak memory | 215024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=407896689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 134.usbdev_endpoint_types.407896689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/134.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/134.usbdev_tx_rx_disruption.2502666829 |
| Short name | T3407 |
| Test name | |
| Test status | |
| Simulation time | 679103383 ps |
| CPU time | 1.69 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:42 AM UTC 24 |
| Peak memory | 214984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2502666829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 134.usbdev_ tx_rx_disruption.2502666829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/134.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/135.usbdev_endpoint_types.861693601 |
| Short name | T3398 |
| Test name | |
| Test status | |
| Simulation time | 407665695 ps |
| CPU time | 1.14 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:41 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=861693601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 135.usbdev_endpoint_types.861693601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/135.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/135.usbdev_fifo_levels.2239160377 |
| Short name | T3395 |
| Test name | |
| Test status | |
| Simulation time | 151663499 ps |
| CPU time | 0.76 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:41 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2239160377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 135.usbdev_fifo_levels.2239160377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/135.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/135.usbdev_tx_rx_disruption.2997419911 |
| Short name | T3403 |
| Test name | |
| Test status | |
| Simulation time | 538387773 ps |
| CPU time | 1.43 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:41 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2997419911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 135.usbdev_ tx_rx_disruption.2997419911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/135.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/136.usbdev_endpoint_types.2616970517 |
| Short name | T572 |
| Test name | |
| Test status | |
| Simulation time | 369378153 ps |
| CPU time | 1.11 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:41 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2616970517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 136.usbdev_endpoint_types.2616970517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/136.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/136.usbdev_fifo_levels.3384913991 |
| Short name | T3396 |
| Test name | |
| Test status | |
| Simulation time | 203340904 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:41 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3384913991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 136.usbdev_fifo_levels.3384913991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/136.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/136.usbdev_tx_rx_disruption.2848977935 |
| Short name | T3411 |
| Test name | |
| Test status | |
| Simulation time | 592474015 ps |
| CPU time | 1.61 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:42 AM UTC 24 |
| Peak memory | 215024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2848977935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 136.usbdev_ tx_rx_disruption.2848977935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/136.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/137.usbdev_endpoint_types.3171183739 |
| Short name | T573 |
| Test name | |
| Test status | |
| Simulation time | 270525175 ps |
| CPU time | 0.97 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:41 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3171183739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 137.usbdev_endpoint_types.3171183739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/137.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/137.usbdev_tx_rx_disruption.2510495557 |
| Short name | T3415 |
| Test name | |
| Test status | |
| Simulation time | 645929181 ps |
| CPU time | 1.81 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:42 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2510495557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 137.usbdev_ tx_rx_disruption.2510495557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/137.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/138.usbdev_endpoint_types.3116754959 |
| Short name | T437 |
| Test name | |
| Test status | |
| Simulation time | 642577597 ps |
| CPU time | 1.77 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3116754959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 138.usbdev_endpoint_types.3116754959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/138.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/138.usbdev_fifo_levels.2929060956 |
| Short name | T3405 |
| Test name | |
| Test status | |
| Simulation time | 272026456 ps |
| CPU time | 1.19 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:41 AM UTC 24 |
| Peak memory | 216944 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2929060956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 138.usbdev_fifo_levels.2929060956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/138.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/138.usbdev_tx_rx_disruption.1033037918 |
| Short name | T3409 |
| Test name | |
| Test status | |
| Simulation time | 444125178 ps |
| CPU time | 1.24 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:42 AM UTC 24 |
| Peak memory | 214968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1033037918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 138.usbdev_ tx_rx_disruption.1033037918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/138.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/139.usbdev_endpoint_types.4227963947 |
| Short name | T524 |
| Test name | |
| Test status | |
| Simulation time | 519662115 ps |
| CPU time | 1.22 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:42 AM UTC 24 |
| Peak memory | 214912 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4227963947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 139.usbdev_endpoint_types.4227963947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/139.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/139.usbdev_fifo_levels.3109991507 |
| Short name | T3400 |
| Test name | |
| Test status | |
| Simulation time | 149882994 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:41 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3109991507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 139.usbdev_fifo_levels.3109991507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/139.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/139.usbdev_tx_rx_disruption.3501479992 |
| Short name | T3417 |
| Test name | |
| Test status | |
| Simulation time | 535570953 ps |
| CPU time | 1.64 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3501479992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 139.usbdev_ tx_rx_disruption.3501479992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/139.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_alert_test.3948294838 |
| Short name | T1323 |
| Test name | |
| Test status | |
| Simulation time | 48326514 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 03:37:57 AM UTC 24 |
| Finished | Aug 29 03:37:59 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3948294838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 14.usbdev_alert_test.3948294838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_disconnect.3766777936 |
| Short name | T1301 |
| Test name | |
| Test status | |
| Simulation time | 10596807821 ps |
| CPU time | 15.7 seconds |
| Started | Aug 29 03:37:31 AM UTC 24 |
| Finished | Aug 29 03:37:48 AM UTC 24 |
| Peak memory | 217264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3766777936 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_disconnect.3766777936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_reset.3003520209 |
| Short name | T1322 |
| Test name | |
| Test status | |
| Simulation time | 21314882131 ps |
| CPU time | 25.04 seconds |
| Started | Aug 29 03:37:31 AM UTC 24 |
| Finished | Aug 29 03:37:57 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3003520209 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_reset.3003520209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_resume.314717713 |
| Short name | T1362 |
| Test name | |
| Test status | |
| Simulation time | 31221389779 ps |
| CPU time | 40.36 seconds |
| Started | Aug 29 03:37:31 AM UTC 24 |
| Finished | Aug 29 03:38:13 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=314717713 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_resume.314717713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_av_buffer.387274678 |
| Short name | T1275 |
| Test name | |
| Test status | |
| Simulation time | 164407701 ps |
| CPU time | 0.88 seconds |
| Started | Aug 29 03:37:31 AM UTC 24 |
| Finished | Aug 29 03:37:33 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=387274678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_av_buffer.387274678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_bitstuff_err.1224945726 |
| Short name | T1278 |
| Test name | |
| Test status | |
| Simulation time | 167695207 ps |
| CPU time | 1.18 seconds |
| Started | Aug 29 03:37:31 AM UTC 24 |
| Finished | Aug 29 03:37:33 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1224945726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_bitstuff_err.1224945726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_data_toggle_clear.2564282685 |
| Short name | T1276 |
| Test name | |
| Test status | |
| Simulation time | 143184055 ps |
| CPU time | 0.94 seconds |
| Started | Aug 29 03:37:31 AM UTC 24 |
| Finished | Aug 29 03:37:33 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2564282685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 14.usbdev_data_toggle_clear.2564282685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_data_toggle_restore.4261685646 |
| Short name | T1280 |
| Test name | |
| Test status | |
| Simulation time | 309651635 ps |
| CPU time | 1.34 seconds |
| Started | Aug 29 03:37:31 AM UTC 24 |
| Finished | Aug 29 03:37:34 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4261685646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_data_toggle_restore.4261685646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_device_address.2392775183 |
| Short name | T585 |
| Test name | |
| Test status | |
| Simulation time | 29863496587 ps |
| CPU time | 55.2 seconds |
| Started | Aug 29 03:37:31 AM UTC 24 |
| Finished | Aug 29 03:38:28 AM UTC 24 |
| Peak memory | 217504 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2392775183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_device_address.2392775183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_device_timeout.2293733404 |
| Short name | T1364 |
| Test name | |
| Test status | |
| Simulation time | 1956609291 ps |
| CPU time | 41.67 seconds |
| Started | Aug 29 03:37:31 AM UTC 24 |
| Finished | Aug 29 03:38:15 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2293733404 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_device_timeout.2293733404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_disable_endpoint.4183374106 |
| Short name | T1282 |
| Test name | |
| Test status | |
| Simulation time | 704945818 ps |
| CPU time | 1.98 seconds |
| Started | Aug 29 03:37:31 AM UTC 24 |
| Finished | Aug 29 03:37:34 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4183374106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 14.usbdev_disable_endpoint.4183374106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_disconnected.3508496176 |
| Short name | T1277 |
| Test name | |
| Test status | |
| Simulation time | 136649927 ps |
| CPU time | 0.88 seconds |
| Started | Aug 29 03:37:31 AM UTC 24 |
| Finished | Aug 29 03:37:33 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3508496176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_disconnected.3508496176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_enable.2136159414 |
| Short name | T1288 |
| Test name | |
| Test status | |
| Simulation time | 47014748 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 03:37:39 AM UTC 24 |
| Finished | Aug 29 03:37:41 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2136159414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 14.usbdev_enable.2136159414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_endpoint_access.183620324 |
| Short name | T1295 |
| Test name | |
| Test status | |
| Simulation time | 877799351 ps |
| CPU time | 2.4 seconds |
| Started | Aug 29 03:37:39 AM UTC 24 |
| Finished | Aug 29 03:37:43 AM UTC 24 |
| Peak memory | 217192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=183620324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_endpoint_access.183620324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_fifo_rst.2183929704 |
| Short name | T1298 |
| Test name | |
| Test status | |
| Simulation time | 383887684 ps |
| CPU time | 3.45 seconds |
| Started | Aug 29 03:37:39 AM UTC 24 |
| Finished | Aug 29 03:37:44 AM UTC 24 |
| Peak memory | 217144 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2183929704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_fifo_rst.2183929704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_in_iso.2914524904 |
| Short name | T1294 |
| Test name | |
| Test status | |
| Simulation time | 252673179 ps |
| CPU time | 1.99 seconds |
| Started | Aug 29 03:37:39 AM UTC 24 |
| Finished | Aug 29 03:37:43 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2914524904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 14.usbdev_in_iso.2914524904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_in_stall.373420418 |
| Short name | T1264 |
| Test name | |
| Test status | |
| Simulation time | 147592109 ps |
| CPU time | 0.97 seconds |
| Started | Aug 29 03:37:40 AM UTC 24 |
| Finished | Aug 29 03:37:41 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=373420418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 14.usbdev_in_stall.373420418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_in_trans.718217473 |
| Short name | T1289 |
| Test name | |
| Test status | |
| Simulation time | 194764000 ps |
| CPU time | 1.1 seconds |
| Started | Aug 29 03:37:40 AM UTC 24 |
| Finished | Aug 29 03:37:42 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=718217473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 14.usbdev_in_trans.718217473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_invalid_sync.1590466690 |
| Short name | T1513 |
| Test name | |
| Test status | |
| Simulation time | 4752866418 ps |
| CPU time | 122.23 seconds |
| Started | Aug 29 03:37:39 AM UTC 24 |
| Finished | Aug 29 03:39:44 AM UTC 24 |
| Peak memory | 229748 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1590466690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 14.usbdev_invalid_sync.1590466690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_iso_retraction.1426212058 |
| Short name | T1448 |
| Test name | |
| Test status | |
| Simulation time | 10062221910 ps |
| CPU time | 67.93 seconds |
| Started | Aug 29 03:37:40 AM UTC 24 |
| Finished | Aug 29 03:38:49 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1426212058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_iso_retraction.1426212058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_link_in_err.340389350 |
| Short name | T1292 |
| Test name | |
| Test status | |
| Simulation time | 227368010 ps |
| CPU time | 1.52 seconds |
| Started | Aug 29 03:37:40 AM UTC 24 |
| Finished | Aug 29 03:37:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=340389350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 14.usbdev_link_in_err.340389350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_link_resume.4288552561 |
| Short name | T1375 |
| Test name | |
| Test status | |
| Simulation time | 22361554446 ps |
| CPU time | 35.94 seconds |
| Started | Aug 29 03:37:40 AM UTC 24 |
| Finished | Aug 29 03:38:17 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4288552561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_link_resume.4288552561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_link_suspend.669033855 |
| Short name | T1300 |
| Test name | |
| Test status | |
| Simulation time | 4096934557 ps |
| CPU time | 7.09 seconds |
| Started | Aug 29 03:37:40 AM UTC 24 |
| Finished | Aug 29 03:37:48 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=669033855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_link_suspend.669033855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_low_speed_traffic.979132515 |
| Short name | T1363 |
| Test name | |
| Test status | |
| Simulation time | 4650592330 ps |
| CPU time | 32.85 seconds |
| Started | Aug 29 03:37:40 AM UTC 24 |
| Finished | Aug 29 03:38:14 AM UTC 24 |
| Peak memory | 231728 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=979132515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_low_speed_traffic.979132515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_max_inter_pkt_delay.1614303981 |
| Short name | T1334 |
| Test name | |
| Test status | |
| Simulation time | 2081086221 ps |
| CPU time | 19.27 seconds |
| Started | Aug 29 03:37:40 AM UTC 24 |
| Finished | Aug 29 03:38:00 AM UTC 24 |
| Peak memory | 227408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1614303981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_inter_pkt_delay.1614303981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_max_length_in_transaction.390502945 |
| Short name | T1293 |
| Test name | |
| Test status | |
| Simulation time | 245553260 ps |
| CPU time | 1.41 seconds |
| Started | Aug 29 03:37:40 AM UTC 24 |
| Finished | Aug 29 03:37:42 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=390502945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 14.usbdev_max_length_in_transaction.390502945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_max_length_out_transaction.1249463940 |
| Short name | T1290 |
| Test name | |
| Test status | |
| Simulation time | 185248580 ps |
| CPU time | 1.02 seconds |
| Started | Aug 29 03:37:40 AM UTC 24 |
| Finished | Aug 29 03:37:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1249463940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 14.usbdev_max_length_out_transaction.1249463940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_max_non_iso_usb_traffic.2181052908 |
| Short name | T1320 |
| Test name | |
| Test status | |
| Simulation time | 1396572583 ps |
| CPU time | 12.86 seconds |
| Started | Aug 29 03:37:40 AM UTC 24 |
| Finished | Aug 29 03:37:54 AM UTC 24 |
| Peak memory | 234160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2181052908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_non_iso_usb_traffic.2181052908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_max_usb_traffic.412697418 |
| Short name | T1361 |
| Test name | |
| Test status | |
| Simulation time | 1243788607 ps |
| CPU time | 31.52 seconds |
| Started | Aug 29 03:37:40 AM UTC 24 |
| Finished | Aug 29 03:38:13 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=412697418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_usb_traffic.412697418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_min_inter_pkt_delay.2415842815 |
| Short name | T1472 |
| Test name | |
| Test status | |
| Simulation time | 3062727946 ps |
| CPU time | 76.11 seconds |
| Started | Aug 29 03:37:40 AM UTC 24 |
| Finished | Aug 29 03:38:58 AM UTC 24 |
| Peak memory | 229684 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2415842815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_min_inter_pkt_delay.2415842815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_min_length_in_transaction.4071236134 |
| Short name | T1265 |
| Test name | |
| Test status | |
| Simulation time | 159197401 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 03:37:40 AM UTC 24 |
| Finished | Aug 29 03:37:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4071236134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 14.usbdev_min_length_in_transaction.4071236134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_min_length_out_transaction.473845876 |
| Short name | T1291 |
| Test name | |
| Test status | |
| Simulation time | 154280682 ps |
| CPU time | 1.1 seconds |
| Started | Aug 29 03:37:40 AM UTC 24 |
| Finished | Aug 29 03:37:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=473845876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 14.usbdev_min_length_out_transaction.473845876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_out_iso.885020846 |
| Short name | T1296 |
| Test name | |
| Test status | |
| Simulation time | 215371261 ps |
| CPU time | 1.49 seconds |
| Started | Aug 29 03:37:40 AM UTC 24 |
| Finished | Aug 29 03:37:43 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=885020846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 14.usbdev_out_iso.885020846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_out_stall.783772207 |
| Short name | T1274 |
| Test name | |
| Test status | |
| Simulation time | 196745337 ps |
| CPU time | 0.9 seconds |
| Started | Aug 29 03:37:40 AM UTC 24 |
| Finished | Aug 29 03:37:42 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=783772207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_out_stall.783772207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_out_trans_nak.2392480007 |
| Short name | T1303 |
| Test name | |
| Test status | |
| Simulation time | 169512625 ps |
| CPU time | 1.05 seconds |
| Started | Aug 29 03:37:48 AM UTC 24 |
| Finished | Aug 29 03:37:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2392480007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 14.usbdev_out_trans_nak.2392480007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_pending_in_trans.2462697388 |
| Short name | T1305 |
| Test name | |
| Test status | |
| Simulation time | 155897867 ps |
| CPU time | 1 seconds |
| Started | Aug 29 03:37:48 AM UTC 24 |
| Finished | Aug 29 03:37:50 AM UTC 24 |
| Peak memory | 215000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2462697388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 14.usbdev_pending_in_trans.2462697388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_phy_config_pinflip.1952846059 |
| Short name | T1308 |
| Test name | |
| Test status | |
| Simulation time | 264312646 ps |
| CPU time | 1.34 seconds |
| Started | Aug 29 03:37:48 AM UTC 24 |
| Finished | Aug 29 03:37:50 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1952846059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 14.usbdev_phy_config_pinflip.1952846059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_phy_config_usb_ref_disable.3859373422 |
| Short name | T1302 |
| Test name | |
| Test status | |
| Simulation time | 190868711 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 03:37:48 AM UTC 24 |
| Finished | Aug 29 03:37:50 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3859373422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 14.usbdev_phy_config_usb_ref_disable.3859373422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_phy_pins_sense.2560641348 |
| Short name | T1304 |
| Test name | |
| Test status | |
| Simulation time | 27606980 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 03:37:48 AM UTC 24 |
| Finished | Aug 29 03:37:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2560641348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_phy_pins_sense.2560641348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_buffer.3286198401 |
| Short name | T1441 |
| Test name | |
| Test status | |
| Simulation time | 21261230204 ps |
| CPU time | 56.44 seconds |
| Started | Aug 29 03:37:48 AM UTC 24 |
| Finished | Aug 29 03:38:46 AM UTC 24 |
| Peak memory | 227552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3286198401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 14.usbdev_pkt_buffer.3286198401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_received.2310783548 |
| Short name | T1307 |
| Test name | |
| Test status | |
| Simulation time | 156309191 ps |
| CPU time | 1.03 seconds |
| Started | Aug 29 03:37:48 AM UTC 24 |
| Finished | Aug 29 03:37:50 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2310783548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_pkt_received.2310783548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_sent.3704726336 |
| Short name | T1310 |
| Test name | |
| Test status | |
| Simulation time | 224557515 ps |
| CPU time | 1.16 seconds |
| Started | Aug 29 03:37:48 AM UTC 24 |
| Finished | Aug 29 03:37:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3704726336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_pkt_sent.3704726336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_random_length_in_transaction.2407606944 |
| Short name | T1306 |
| Test name | |
| Test status | |
| Simulation time | 175977428 ps |
| CPU time | 0.91 seconds |
| Started | Aug 29 03:37:48 AM UTC 24 |
| Finished | Aug 29 03:37:50 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2407606944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 14.usbdev_random_length_in_transaction.2407606944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_random_length_out_transaction.1018193930 |
| Short name | T1309 |
| Test name | |
| Test status | |
| Simulation time | 176605331 ps |
| CPU time | 0.99 seconds |
| Started | Aug 29 03:37:48 AM UTC 24 |
| Finished | Aug 29 03:37:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1018193930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 14.usbdev_random_length_out_transaction.1018193930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_resume_link_active.3216043905 |
| Short name | T1376 |
| Test name | |
| Test status | |
| Simulation time | 20156910322 ps |
| CPU time | 27.73 seconds |
| Started | Aug 29 03:37:48 AM UTC 24 |
| Finished | Aug 29 03:38:17 AM UTC 24 |
| Peak memory | 217148 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3216043905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 14.usbdev_resume_link_active.3216043905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_rx_crc_err.3749474777 |
| Short name | T1314 |
| Test name | |
| Test status | |
| Simulation time | 158824433 ps |
| CPU time | 1.34 seconds |
| Started | Aug 29 03:37:48 AM UTC 24 |
| Finished | Aug 29 03:37:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3749474777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 14.usbdev_rx_crc_err.3749474777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_rx_full.2785240497 |
| Short name | T405 |
| Test name | |
| Test status | |
| Simulation time | 350453070 ps |
| CPU time | 1.41 seconds |
| Started | Aug 29 03:37:48 AM UTC 24 |
| Finished | Aug 29 03:37:51 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2785240497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 14.usbdev_rx_full.2785240497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_setup_stage.3169826632 |
| Short name | T1311 |
| Test name | |
| Test status | |
| Simulation time | 194490225 ps |
| CPU time | 1.06 seconds |
| Started | Aug 29 03:37:48 AM UTC 24 |
| Finished | Aug 29 03:37:50 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3169826632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_setup_stage.3169826632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_setup_trans_ignored.264078822 |
| Short name | T1312 |
| Test name | |
| Test status | |
| Simulation time | 152140537 ps |
| CPU time | 1 seconds |
| Started | Aug 29 03:37:48 AM UTC 24 |
| Finished | Aug 29 03:37:50 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=264078822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 14.usbdev_setup_trans_ignored.264078822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_smoke.17417763 |
| Short name | T1316 |
| Test name | |
| Test status | |
| Simulation time | 217419020 ps |
| CPU time | 1.52 seconds |
| Started | Aug 29 03:37:48 AM UTC 24 |
| Finished | Aug 29 03:37:51 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=17417763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null - cm_name 14.usbdev_smoke.17417763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_spurious_pids_ignored.1435442615 |
| Short name | T1446 |
| Test name | |
| Test status | |
| Simulation time | 2303563764 ps |
| CPU time | 57.34 seconds |
| Started | Aug 29 03:37:48 AM UTC 24 |
| Finished | Aug 29 03:38:47 AM UTC 24 |
| Peak memory | 229524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1435442615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 14.usbdev_spurious_pids_ignored.1435442615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_stall_priority_over_nak.4012464000 |
| Short name | T1313 |
| Test name | |
| Test status | |
| Simulation time | 165748922 ps |
| CPU time | 0.98 seconds |
| Started | Aug 29 03:37:48 AM UTC 24 |
| Finished | Aug 29 03:37:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4012464000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_stall_priority_over_nak.4012464000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_stall_trans.4090710373 |
| Short name | T1315 |
| Test name | |
| Test status | |
| Simulation time | 158246146 ps |
| CPU time | 1.36 seconds |
| Started | Aug 29 03:37:48 AM UTC 24 |
| Finished | Aug 29 03:37:51 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4090710373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_stall_trans.4090710373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_stream_len_max.743063766 |
| Short name | T1319 |
| Test name | |
| Test status | |
| Simulation time | 1131184485 ps |
| CPU time | 2.86 seconds |
| Started | Aug 29 03:37:48 AM UTC 24 |
| Finished | Aug 29 03:37:52 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=743063766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 14.usbdev_stream_len_max.743063766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_streaming_out.2564028508 |
| Short name | T1385 |
| Test name | |
| Test status | |
| Simulation time | 3219716898 ps |
| CPU time | 29.96 seconds |
| Started | Aug 29 03:37:48 AM UTC 24 |
| Finished | Aug 29 03:38:20 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2564028508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_streaming_out.2564028508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_timeout_missing_host_handshake.542727181 |
| Short name | T1340 |
| Test name | |
| Test status | |
| Simulation time | 1397716399 ps |
| CPU time | 30.34 seconds |
| Started | Aug 29 03:37:31 AM UTC 24 |
| Finished | Aug 29 03:38:03 AM UTC 24 |
| Peak memory | 217280 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=542727181 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_timeout_missing_host_handshake.542727181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/14.usbdev_tx_rx_disruption.1573916664 |
| Short name | T226 |
| Test name | |
| Test status | |
| Simulation time | 597310897 ps |
| CPU time | 1.86 seconds |
| Started | Aug 29 03:37:48 AM UTC 24 |
| Finished | Aug 29 03:37:51 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1573916664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_t x_rx_disruption.1573916664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/14.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/140.usbdev_endpoint_types.1411149017 |
| Short name | T440 |
| Test name | |
| Test status | |
| Simulation time | 667096068 ps |
| CPU time | 1.72 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1411149017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 140.usbdev_endpoint_types.1411149017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/140.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/140.usbdev_fifo_levels.1365944252 |
| Short name | T3404 |
| Test name | |
| Test status | |
| Simulation time | 160184359 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:41 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1365944252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 140.usbdev_fifo_levels.1365944252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/140.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/140.usbdev_tx_rx_disruption.1525438994 |
| Short name | T3416 |
| Test name | |
| Test status | |
| Simulation time | 616826847 ps |
| CPU time | 1.56 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1525438994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 140.usbdev_ tx_rx_disruption.1525438994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/140.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/141.usbdev_endpoint_types.1398003094 |
| Short name | T3406 |
| Test name | |
| Test status | |
| Simulation time | 280655355 ps |
| CPU time | 1.17 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1398003094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 141.usbdev_endpoint_types.1398003094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/141.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/141.usbdev_tx_rx_disruption.1407820834 |
| Short name | T3418 |
| Test name | |
| Test status | |
| Simulation time | 555842207 ps |
| CPU time | 1.64 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1407820834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 141.usbdev_ tx_rx_disruption.1407820834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/141.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/142.usbdev_endpoint_types.3591165681 |
| Short name | T493 |
| Test name | |
| Test status | |
| Simulation time | 471062638 ps |
| CPU time | 1.46 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3591165681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 142.usbdev_endpoint_types.3591165681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/142.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/142.usbdev_tx_rx_disruption.1376054684 |
| Short name | T3402 |
| Test name | |
| Test status | |
| Simulation time | 535818481 ps |
| CPU time | 1.7 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1376054684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 142.usbdev_ tx_rx_disruption.1376054684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/142.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/143.usbdev_fifo_levels.3727263219 |
| Short name | T359 |
| Test name | |
| Test status | |
| Simulation time | 347050492 ps |
| CPU time | 1.16 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3727263219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 143.usbdev_fifo_levels.3727263219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/143.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/143.usbdev_tx_rx_disruption.3599340669 |
| Short name | T3425 |
| Test name | |
| Test status | |
| Simulation time | 624263585 ps |
| CPU time | 1.89 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:43 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3599340669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 143.usbdev_ tx_rx_disruption.3599340669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/143.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/144.usbdev_endpoint_types.3168311771 |
| Short name | T3410 |
| Test name | |
| Test status | |
| Simulation time | 149302602 ps |
| CPU time | 0.75 seconds |
| Started | Aug 29 04:07:39 AM UTC 24 |
| Finished | Aug 29 04:07:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3168311771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 144.usbdev_endpoint_types.3168311771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/144.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/144.usbdev_fifo_levels.1299988760 |
| Short name | T3414 |
| Test name | |
| Test status | |
| Simulation time | 274721392 ps |
| CPU time | 1.08 seconds |
| Started | Aug 29 04:07:40 AM UTC 24 |
| Finished | Aug 29 04:07:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1299988760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 144.usbdev_fifo_levels.1299988760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/144.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/144.usbdev_tx_rx_disruption.1272605088 |
| Short name | T3422 |
| Test name | |
| Test status | |
| Simulation time | 462677292 ps |
| CPU time | 1.56 seconds |
| Started | Aug 29 04:07:40 AM UTC 24 |
| Finished | Aug 29 04:07:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1272605088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 144.usbdev_ tx_rx_disruption.1272605088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/144.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/145.usbdev_endpoint_types.1998069163 |
| Short name | T481 |
| Test name | |
| Test status | |
| Simulation time | 535297496 ps |
| CPU time | 1.59 seconds |
| Started | Aug 29 04:07:40 AM UTC 24 |
| Finished | Aug 29 04:07:42 AM UTC 24 |
| Peak memory | 214756 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1998069163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 145.usbdev_endpoint_types.1998069163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/145.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/145.usbdev_fifo_levels.3798376750 |
| Short name | T3412 |
| Test name | |
| Test status | |
| Simulation time | 174883331 ps |
| CPU time | 0.95 seconds |
| Started | Aug 29 04:07:40 AM UTC 24 |
| Finished | Aug 29 04:07:42 AM UTC 24 |
| Peak memory | 216788 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3798376750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 145.usbdev_fifo_levels.3798376750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/145.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/145.usbdev_tx_rx_disruption.3745657547 |
| Short name | T3424 |
| Test name | |
| Test status | |
| Simulation time | 501492137 ps |
| CPU time | 1.58 seconds |
| Started | Aug 29 04:07:40 AM UTC 24 |
| Finished | Aug 29 04:07:43 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3745657547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 145.usbdev_ tx_rx_disruption.3745657547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/145.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/146.usbdev_endpoint_types.327557952 |
| Short name | T446 |
| Test name | |
| Test status | |
| Simulation time | 249821937 ps |
| CPU time | 1.08 seconds |
| Started | Aug 29 04:07:40 AM UTC 24 |
| Finished | Aug 29 04:07:42 AM UTC 24 |
| Peak memory | 214988 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=327557952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 146.usbdev_endpoint_types.327557952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/146.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/146.usbdev_fifo_levels.4232501192 |
| Short name | T3413 |
| Test name | |
| Test status | |
| Simulation time | 220774424 ps |
| CPU time | 0.95 seconds |
| Started | Aug 29 04:07:40 AM UTC 24 |
| Finished | Aug 29 04:07:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4232501192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 146.usbdev_fifo_levels.4232501192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/146.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/146.usbdev_tx_rx_disruption.2694500757 |
| Short name | T3430 |
| Test name | |
| Test status | |
| Simulation time | 554692431 ps |
| CPU time | 1.84 seconds |
| Started | Aug 29 04:07:40 AM UTC 24 |
| Finished | Aug 29 04:07:43 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2694500757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 146.usbdev_ tx_rx_disruption.2694500757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/146.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/147.usbdev_endpoint_types.3864113847 |
| Short name | T442 |
| Test name | |
| Test status | |
| Simulation time | 676505152 ps |
| CPU time | 1.46 seconds |
| Started | Aug 29 04:07:40 AM UTC 24 |
| Finished | Aug 29 04:07:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3864113847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 147.usbdev_endpoint_types.3864113847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/147.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/147.usbdev_fifo_levels.3343730020 |
| Short name | T3419 |
| Test name | |
| Test status | |
| Simulation time | 280870474 ps |
| CPU time | 1.18 seconds |
| Started | Aug 29 04:07:40 AM UTC 24 |
| Finished | Aug 29 04:07:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3343730020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 147.usbdev_fifo_levels.3343730020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/147.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/147.usbdev_tx_rx_disruption.1920851173 |
| Short name | T3420 |
| Test name | |
| Test status | |
| Simulation time | 412423548 ps |
| CPU time | 1.45 seconds |
| Started | Aug 29 04:07:40 AM UTC 24 |
| Finished | Aug 29 04:07:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1920851173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 147.usbdev_ tx_rx_disruption.1920851173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/147.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/148.usbdev_endpoint_types.3631001540 |
| Short name | T553 |
| Test name | |
| Test status | |
| Simulation time | 369379232 ps |
| CPU time | 1.4 seconds |
| Started | Aug 29 04:07:40 AM UTC 24 |
| Finished | Aug 29 04:07:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3631001540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 148.usbdev_endpoint_types.3631001540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/148.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/148.usbdev_tx_rx_disruption.3757403018 |
| Short name | T3431 |
| Test name | |
| Test status | |
| Simulation time | 676615117 ps |
| CPU time | 1.95 seconds |
| Started | Aug 29 04:07:40 AM UTC 24 |
| Finished | Aug 29 04:07:43 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3757403018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 148.usbdev_ tx_rx_disruption.3757403018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/148.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/149.usbdev_fifo_levels.3701261457 |
| Short name | T377 |
| Test name | |
| Test status | |
| Simulation time | 293149278 ps |
| CPU time | 1.12 seconds |
| Started | Aug 29 04:07:40 AM UTC 24 |
| Finished | Aug 29 04:07:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3701261457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 149.usbdev_fifo_levels.3701261457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/149.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/149.usbdev_tx_rx_disruption.3695423182 |
| Short name | T3429 |
| Test name | |
| Test status | |
| Simulation time | 544841405 ps |
| CPU time | 1.64 seconds |
| Started | Aug 29 04:07:40 AM UTC 24 |
| Finished | Aug 29 04:07:43 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3695423182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 149.usbdev_ tx_rx_disruption.3695423182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/149.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_alert_test.2378312457 |
| Short name | T1372 |
| Test name | |
| Test status | |
| Simulation time | 46331871 ps |
| CPU time | 0.91 seconds |
| Started | Aug 29 03:38:15 AM UTC 24 |
| Finished | Aug 29 03:38:17 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2378312457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 15.usbdev_alert_test.2378312457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_disconnect.1259760286 |
| Short name | T1356 |
| Test name | |
| Test status | |
| Simulation time | 6688151224 ps |
| CPU time | 9.47 seconds |
| Started | Aug 29 03:37:57 AM UTC 24 |
| Finished | Aug 29 03:38:07 AM UTC 24 |
| Peak memory | 227112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1259760286 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_disconnect.1259760286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_reset.2243187321 |
| Short name | T1387 |
| Test name | |
| Test status | |
| Simulation time | 21023787427 ps |
| CPU time | 25.96 seconds |
| Started | Aug 29 03:37:57 AM UTC 24 |
| Finished | Aug 29 03:38:24 AM UTC 24 |
| Peak memory | 217080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2243187321 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_reset.2243187321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_resume.4275923871 |
| Short name | T1409 |
| Test name | |
| Test status | |
| Simulation time | 25574761783 ps |
| CPU time | 38.4 seconds |
| Started | Aug 29 03:37:57 AM UTC 24 |
| Finished | Aug 29 03:38:37 AM UTC 24 |
| Peak memory | 227244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4275923871 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_resume.4275923871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_av_buffer.3198556424 |
| Short name | T1324 |
| Test name | |
| Test status | |
| Simulation time | 154169602 ps |
| CPU time | 0.97 seconds |
| Started | Aug 29 03:37:57 AM UTC 24 |
| Finished | Aug 29 03:37:59 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3198556424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_av_buffer.3198556424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_bitstuff_err.3890866448 |
| Short name | T1325 |
| Test name | |
| Test status | |
| Simulation time | 222263934 ps |
| CPU time | 1.18 seconds |
| Started | Aug 29 03:37:57 AM UTC 24 |
| Finished | Aug 29 03:37:59 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3890866448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_bitstuff_err.3890866448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_data_toggle_clear.1620005153 |
| Short name | T1330 |
| Test name | |
| Test status | |
| Simulation time | 431329682 ps |
| CPU time | 1.57 seconds |
| Started | Aug 29 03:37:57 AM UTC 24 |
| Finished | Aug 29 03:38:00 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1620005153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 15.usbdev_data_toggle_clear.1620005153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_data_toggle_restore.2808777625 |
| Short name | T631 |
| Test name | |
| Test status | |
| Simulation time | 766674368 ps |
| CPU time | 2.45 seconds |
| Started | Aug 29 03:37:57 AM UTC 24 |
| Finished | Aug 29 03:38:01 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2808777625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_data_toggle_restore.2808777625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_device_address.948764218 |
| Short name | T1538 |
| Test name | |
| Test status | |
| Simulation time | 46823173342 ps |
| CPU time | 84.08 seconds |
| Started | Aug 29 03:37:57 AM UTC 24 |
| Finished | Aug 29 03:39:23 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=948764218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 15.usbdev_device_address.948764218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_device_timeout.1803672373 |
| Short name | T1365 |
| Test name | |
| Test status | |
| Simulation time | 2089105118 ps |
| CPU time | 16.82 seconds |
| Started | Aug 29 03:37:57 AM UTC 24 |
| Finished | Aug 29 03:38:15 AM UTC 24 |
| Peak memory | 217188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1803672373 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_device_timeout.1803672373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_disable_endpoint.3714686225 |
| Short name | T1337 |
| Test name | |
| Test status | |
| Simulation time | 670061523 ps |
| CPU time | 2.98 seconds |
| Started | Aug 29 03:37:57 AM UTC 24 |
| Finished | Aug 29 03:38:01 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3714686225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 15.usbdev_disable_endpoint.3714686225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_disconnected.1993470451 |
| Short name | T1327 |
| Test name | |
| Test status | |
| Simulation time | 165570696 ps |
| CPU time | 1.02 seconds |
| Started | Aug 29 03:37:57 AM UTC 24 |
| Finished | Aug 29 03:37:59 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1993470451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_disconnected.1993470451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_enable.2292187716 |
| Short name | T1326 |
| Test name | |
| Test status | |
| Simulation time | 60312668 ps |
| CPU time | 0.95 seconds |
| Started | Aug 29 03:37:57 AM UTC 24 |
| Finished | Aug 29 03:37:59 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2292187716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 15.usbdev_enable.2292187716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_endpoint_access.2552568844 |
| Short name | T1338 |
| Test name | |
| Test status | |
| Simulation time | 890385044 ps |
| CPU time | 3.15 seconds |
| Started | Aug 29 03:37:57 AM UTC 24 |
| Finished | Aug 29 03:38:01 AM UTC 24 |
| Peak memory | 217268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2552568844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_endpoint_access.2552568844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_endpoint_types.2031883673 |
| Short name | T1331 |
| Test name | |
| Test status | |
| Simulation time | 225674725 ps |
| CPU time | 1.28 seconds |
| Started | Aug 29 03:37:57 AM UTC 24 |
| Finished | Aug 29 03:38:00 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2031883673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_endpoint_types.2031883673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_fifo_levels.1065041802 |
| Short name | T393 |
| Test name | |
| Test status | |
| Simulation time | 287499568 ps |
| CPU time | 1.86 seconds |
| Started | Aug 29 03:37:57 AM UTC 24 |
| Finished | Aug 29 03:38:00 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1065041802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_fifo_levels.1065041802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_fifo_rst.4082272512 |
| Short name | T1336 |
| Test name | |
| Test status | |
| Simulation time | 190864677 ps |
| CPU time | 2.45 seconds |
| Started | Aug 29 03:37:57 AM UTC 24 |
| Finished | Aug 29 03:38:01 AM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4082272512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_fifo_rst.4082272512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_in_iso.859343305 |
| Short name | T1333 |
| Test name | |
| Test status | |
| Simulation time | 189712717 ps |
| CPU time | 1.62 seconds |
| Started | Aug 29 03:37:57 AM UTC 24 |
| Finished | Aug 29 03:38:00 AM UTC 24 |
| Peak memory | 227416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=859343305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 15.usbdev_in_iso.859343305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_in_stall.3510619169 |
| Short name | T1329 |
| Test name | |
| Test status | |
| Simulation time | 176285907 ps |
| CPU time | 0.99 seconds |
| Started | Aug 29 03:37:57 AM UTC 24 |
| Finished | Aug 29 03:38:00 AM UTC 24 |
| Peak memory | 215032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3510619169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_in_stall.3510619169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_in_trans.677167165 |
| Short name | T1335 |
| Test name | |
| Test status | |
| Simulation time | 298263933 ps |
| CPU time | 1.77 seconds |
| Started | Aug 29 03:37:57 AM UTC 24 |
| Finished | Aug 29 03:38:00 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=677167165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_in_trans.677167165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_invalid_sync.80942610 |
| Short name | T1594 |
| Test name | |
| Test status | |
| Simulation time | 4325787269 ps |
| CPU time | 109.87 seconds |
| Started | Aug 29 03:37:57 AM UTC 24 |
| Finished | Aug 29 03:39:50 AM UTC 24 |
| Peak memory | 234100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=80942610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traf fic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 15.usbdev_invalid_sync.80942610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_iso_retraction.927621076 |
| Short name | T1532 |
| Test name | |
| Test status | |
| Simulation time | 7635021332 ps |
| CPU time | 81.01 seconds |
| Started | Aug 29 03:37:58 AM UTC 24 |
| Finished | Aug 29 03:39:21 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=927621076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 15.usbdev_iso_retraction.927621076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_link_in_err.1425052366 |
| Short name | T1332 |
| Test name | |
| Test status | |
| Simulation time | 232100905 ps |
| CPU time | 1.39 seconds |
| Started | Aug 29 03:37:58 AM UTC 24 |
| Finished | Aug 29 03:38:00 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1425052366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_link_in_err.1425052366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_link_resume.839554722 |
| Short name | T1360 |
| Test name | |
| Test status | |
| Simulation time | 6148477644 ps |
| CPU time | 9.66 seconds |
| Started | Aug 29 03:37:58 AM UTC 24 |
| Finished | Aug 29 03:38:09 AM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=839554722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_link_resume.839554722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_link_suspend.3004250886 |
| Short name | T1347 |
| Test name | |
| Test status | |
| Simulation time | 5544725753 ps |
| CPU time | 8.08 seconds |
| Started | Aug 29 03:37:58 AM UTC 24 |
| Finished | Aug 29 03:38:07 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3004250886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_link_suspend.3004250886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_low_speed_traffic.136597051 |
| Short name | T1426 |
| Test name | |
| Test status | |
| Simulation time | 3984477510 ps |
| CPU time | 40.98 seconds |
| Started | Aug 29 03:37:58 AM UTC 24 |
| Finished | Aug 29 03:38:40 AM UTC 24 |
| Peak memory | 234032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=136597051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_low_speed_traffic.136597051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_max_inter_pkt_delay.3259029086 |
| Short name | T1602 |
| Test name | |
| Test status | |
| Simulation time | 4162669955 ps |
| CPU time | 105.95 seconds |
| Started | Aug 29 03:38:04 AM UTC 24 |
| Finished | Aug 29 03:39:52 AM UTC 24 |
| Peak memory | 227756 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3259029086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_inter_pkt_delay.3259029086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_max_length_in_transaction.2142017385 |
| Short name | T1343 |
| Test name | |
| Test status | |
| Simulation time | 248792694 ps |
| CPU time | 1.06 seconds |
| Started | Aug 29 03:38:04 AM UTC 24 |
| Finished | Aug 29 03:38:06 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2142017385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 15.usbdev_max_length_in_transaction.2142017385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_max_length_out_transaction.1675112 |
| Short name | T1345 |
| Test name | |
| Test status | |
| Simulation time | 194809349 ps |
| CPU time | 1.54 seconds |
| Started | Aug 29 03:38:04 AM UTC 24 |
| Finished | Aug 29 03:38:07 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1675112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transactio n_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_length_out_transaction.1675112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_max_non_iso_usb_traffic.643140124 |
| Short name | T1424 |
| Test name | |
| Test status | |
| Simulation time | 3472361656 ps |
| CPU time | 31.81 seconds |
| Started | Aug 29 03:38:04 AM UTC 24 |
| Finished | Aug 29 03:38:37 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=643140124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_non_iso_usb_traffic.643140124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_min_inter_pkt_delay.50349844 |
| Short name | T1500 |
| Test name | |
| Test status | |
| Simulation time | 2542422630 ps |
| CPU time | 62.47 seconds |
| Started | Aug 29 03:38:04 AM UTC 24 |
| Finished | Aug 29 03:39:09 AM UTC 24 |
| Peak memory | 227624 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=50349844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TE ST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_min_inter_pkt_delay.50349844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_min_length_in_transaction.2489552821 |
| Short name | T1344 |
| Test name | |
| Test status | |
| Simulation time | 196008865 ps |
| CPU time | 1.18 seconds |
| Started | Aug 29 03:38:04 AM UTC 24 |
| Finished | Aug 29 03:38:07 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2489552821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 15.usbdev_min_length_in_transaction.2489552821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_min_length_out_transaction.2717557757 |
| Short name | T1348 |
| Test name | |
| Test status | |
| Simulation time | 191989421 ps |
| CPU time | 1.35 seconds |
| Started | Aug 29 03:38:04 AM UTC 24 |
| Finished | Aug 29 03:38:07 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2717557757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 15.usbdev_min_length_out_transaction.2717557757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_out_iso.3359981473 |
| Short name | T1346 |
| Test name | |
| Test status | |
| Simulation time | 180100073 ps |
| CPU time | 1.05 seconds |
| Started | Aug 29 03:38:04 AM UTC 24 |
| Finished | Aug 29 03:38:07 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3359981473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_out_iso.3359981473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_out_stall.1198862849 |
| Short name | T1355 |
| Test name | |
| Test status | |
| Simulation time | 188240121 ps |
| CPU time | 1.48 seconds |
| Started | Aug 29 03:38:04 AM UTC 24 |
| Finished | Aug 29 03:38:07 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1198862849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_out_stall.1198862849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_out_trans_nak.3287499089 |
| Short name | T1349 |
| Test name | |
| Test status | |
| Simulation time | 171046175 ps |
| CPU time | 1.33 seconds |
| Started | Aug 29 03:38:04 AM UTC 24 |
| Finished | Aug 29 03:38:07 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3287499089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 15.usbdev_out_trans_nak.3287499089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_pending_in_trans.1213715017 |
| Short name | T1353 |
| Test name | |
| Test status | |
| Simulation time | 165636980 ps |
| CPU time | 1.41 seconds |
| Started | Aug 29 03:38:05 AM UTC 24 |
| Finished | Aug 29 03:38:07 AM UTC 24 |
| Peak memory | 214984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1213715017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 15.usbdev_pending_in_trans.1213715017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_phy_config_pinflip.2398286231 |
| Short name | T1354 |
| Test name | |
| Test status | |
| Simulation time | 205959164 ps |
| CPU time | 1.46 seconds |
| Started | Aug 29 03:38:05 AM UTC 24 |
| Finished | Aug 29 03:38:07 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2398286231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 15.usbdev_phy_config_pinflip.2398286231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_phy_config_usb_ref_disable.88500880 |
| Short name | T1351 |
| Test name | |
| Test status | |
| Simulation time | 177966678 ps |
| CPU time | 1.26 seconds |
| Started | Aug 29 03:38:05 AM UTC 24 |
| Finished | Aug 29 03:38:07 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=88500880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disab le_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 15.usbdev_phy_config_usb_ref_disable.88500880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_phy_pins_sense.633164819 |
| Short name | T1350 |
| Test name | |
| Test status | |
| Simulation time | 113662774 ps |
| CPU time | 1.2 seconds |
| Started | Aug 29 03:38:05 AM UTC 24 |
| Finished | Aug 29 03:38:07 AM UTC 24 |
| Peak memory | 215032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=633164819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 15.usbdev_phy_pins_sense.633164819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_buffer.1159706029 |
| Short name | T1447 |
| Test name | |
| Test status | |
| Simulation time | 16730729842 ps |
| CPU time | 42.53 seconds |
| Started | Aug 29 03:38:05 AM UTC 24 |
| Finished | Aug 29 03:38:49 AM UTC 24 |
| Peak memory | 227672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1159706029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_pkt_buffer.1159706029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_received.58563202 |
| Short name | T1358 |
| Test name | |
| Test status | |
| Simulation time | 195927553 ps |
| CPU time | 1.33 seconds |
| Started | Aug 29 03:38:05 AM UTC 24 |
| Finished | Aug 29 03:38:08 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=58563202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_pkt_received.58563202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_sent.624914023 |
| Short name | T1357 |
| Test name | |
| Test status | |
| Simulation time | 251031134 ps |
| CPU time | 1.52 seconds |
| Started | Aug 29 03:38:05 AM UTC 24 |
| Finished | Aug 29 03:38:08 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=624914023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_pkt_sent.624914023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_random_length_in_transaction.104620802 |
| Short name | T1359 |
| Test name | |
| Test status | |
| Simulation time | 174707201 ps |
| CPU time | 1.36 seconds |
| Started | Aug 29 03:38:05 AM UTC 24 |
| Finished | Aug 29 03:38:08 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=104620802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_random_length_in_transaction.104620802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_random_length_out_transaction.930297911 |
| Short name | T1352 |
| Test name | |
| Test status | |
| Simulation time | 162682969 ps |
| CPU time | 0.88 seconds |
| Started | Aug 29 03:38:05 AM UTC 24 |
| Finished | Aug 29 03:38:07 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=930297911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 15.usbdev_random_length_out_transaction.930297911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_resume_link_active.1564395272 |
| Short name | T1428 |
| Test name | |
| Test status | |
| Simulation time | 20200553227 ps |
| CPU time | 25.72 seconds |
| Started | Aug 29 03:38:14 AM UTC 24 |
| Finished | Aug 29 03:38:41 AM UTC 24 |
| Peak memory | 216504 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1564395272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 15.usbdev_resume_link_active.1564395272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_rx_crc_err.1448294423 |
| Short name | T1368 |
| Test name | |
| Test status | |
| Simulation time | 218095560 ps |
| CPU time | 1.04 seconds |
| Started | Aug 29 03:38:14 AM UTC 24 |
| Finished | Aug 29 03:38:16 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1448294423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_rx_crc_err.1448294423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_rx_full.2461791443 |
| Short name | T1373 |
| Test name | |
| Test status | |
| Simulation time | 388658688 ps |
| CPU time | 1.44 seconds |
| Started | Aug 29 03:38:14 AM UTC 24 |
| Finished | Aug 29 03:38:17 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2461791443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_rx_full.2461791443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_setup_stage.4038178326 |
| Short name | T1367 |
| Test name | |
| Test status | |
| Simulation time | 152038372 ps |
| CPU time | 0.93 seconds |
| Started | Aug 29 03:38:14 AM UTC 24 |
| Finished | Aug 29 03:38:16 AM UTC 24 |
| Peak memory | 214372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4038178326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_setup_stage.4038178326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_setup_trans_ignored.251998885 |
| Short name | T1371 |
| Test name | |
| Test status | |
| Simulation time | 167006635 ps |
| CPU time | 1.28 seconds |
| Started | Aug 29 03:38:14 AM UTC 24 |
| Finished | Aug 29 03:38:17 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=251998885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 15.usbdev_setup_trans_ignored.251998885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_smoke.533490926 |
| Short name | T1369 |
| Test name | |
| Test status | |
| Simulation time | 197973385 ps |
| CPU time | 1.04 seconds |
| Started | Aug 29 03:38:14 AM UTC 24 |
| Finished | Aug 29 03:38:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=533490926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_smoke.533490926 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_spurious_pids_ignored.1492829934 |
| Short name | T1547 |
| Test name | |
| Test status | |
| Simulation time | 3430578443 ps |
| CPU time | 85.62 seconds |
| Started | Aug 29 03:38:14 AM UTC 24 |
| Finished | Aug 29 03:39:42 AM UTC 24 |
| Peak memory | 234372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1492829934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 15.usbdev_spurious_pids_ignored.1492829934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_stall_priority_over_nak.966512634 |
| Short name | T1370 |
| Test name | |
| Test status | |
| Simulation time | 177617153 ps |
| CPU time | 1.03 seconds |
| Started | Aug 29 03:38:14 AM UTC 24 |
| Finished | Aug 29 03:38:17 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=966512634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_stall_priority_over_nak.966512634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_stall_trans.2498899905 |
| Short name | T1377 |
| Test name | |
| Test status | |
| Simulation time | 155864013 ps |
| CPU time | 1.44 seconds |
| Started | Aug 29 03:38:15 AM UTC 24 |
| Finished | Aug 29 03:38:17 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2498899905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_stall_trans.2498899905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_stream_len_max.3252597216 |
| Short name | T1382 |
| Test name | |
| Test status | |
| Simulation time | 781423291 ps |
| CPU time | 2.46 seconds |
| Started | Aug 29 03:38:15 AM UTC 24 |
| Finished | Aug 29 03:38:18 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3252597216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_stream_len_max.3252597216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_streaming_out.1517447595 |
| Short name | T1506 |
| Test name | |
| Test status | |
| Simulation time | 2385306732 ps |
| CPU time | 58.67 seconds |
| Started | Aug 29 03:38:15 AM UTC 24 |
| Finished | Aug 29 03:39:15 AM UTC 24 |
| Peak memory | 229640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1517447595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_streaming_out.1517447595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_timeout_missing_host_handshake.1066380886 |
| Short name | T1406 |
| Test name | |
| Test status | |
| Simulation time | 1550141249 ps |
| CPU time | 34.09 seconds |
| Started | Aug 29 03:37:57 AM UTC 24 |
| Finished | Aug 29 03:38:33 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1066380886 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_timeout_missing_host_handshake.1066380886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/15.usbdev_tx_rx_disruption.3257286449 |
| Short name | T1383 |
| Test name | |
| Test status | |
| Simulation time | 541388068 ps |
| CPU time | 2.51 seconds |
| Started | Aug 29 03:38:15 AM UTC 24 |
| Finished | Aug 29 03:38:18 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3257286449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_t x_rx_disruption.3257286449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/15.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/150.usbdev_endpoint_types.1489990157 |
| Short name | T3426 |
| Test name | |
| Test status | |
| Simulation time | 450086100 ps |
| CPU time | 1.35 seconds |
| Started | Aug 29 04:07:40 AM UTC 24 |
| Finished | Aug 29 04:07:43 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1489990157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 150.usbdev_endpoint_types.1489990157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/150.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/150.usbdev_fifo_levels.3219024768 |
| Short name | T389 |
| Test name | |
| Test status | |
| Simulation time | 272821747 ps |
| CPU time | 1.16 seconds |
| Started | Aug 29 04:07:40 AM UTC 24 |
| Finished | Aug 29 04:07:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3219024768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 150.usbdev_fifo_levels.3219024768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/150.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/150.usbdev_tx_rx_disruption.1307662918 |
| Short name | T3427 |
| Test name | |
| Test status | |
| Simulation time | 511840362 ps |
| CPU time | 1.34 seconds |
| Started | Aug 29 04:07:40 AM UTC 24 |
| Finished | Aug 29 04:07:43 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1307662918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 150.usbdev_ tx_rx_disruption.1307662918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/150.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/151.usbdev_endpoint_types.2953785506 |
| Short name | T520 |
| Test name | |
| Test status | |
| Simulation time | 519631478 ps |
| CPU time | 1.44 seconds |
| Started | Aug 29 04:07:40 AM UTC 24 |
| Finished | Aug 29 04:07:43 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2953785506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 151.usbdev_endpoint_types.2953785506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/151.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/151.usbdev_tx_rx_disruption.989368648 |
| Short name | T3432 |
| Test name | |
| Test status | |
| Simulation time | 510908845 ps |
| CPU time | 1.84 seconds |
| Started | Aug 29 04:07:40 AM UTC 24 |
| Finished | Aug 29 04:07:43 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=989368648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 151.usbdev_t x_rx_disruption.989368648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/151.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/152.usbdev_endpoint_types.2868178107 |
| Short name | T567 |
| Test name | |
| Test status | |
| Simulation time | 426273235 ps |
| CPU time | 1.19 seconds |
| Started | Aug 29 04:07:40 AM UTC 24 |
| Finished | Aug 29 04:07:43 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2868178107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 152.usbdev_endpoint_types.2868178107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/152.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/152.usbdev_fifo_levels.4232390670 |
| Short name | T3421 |
| Test name | |
| Test status | |
| Simulation time | 274826162 ps |
| CPU time | 1.06 seconds |
| Started | Aug 29 04:07:40 AM UTC 24 |
| Finished | Aug 29 04:07:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4232390670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 152.usbdev_fifo_levels.4232390670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/152.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/152.usbdev_tx_rx_disruption.3729793425 |
| Short name | T3428 |
| Test name | |
| Test status | |
| Simulation time | 521610078 ps |
| CPU time | 1.4 seconds |
| Started | Aug 29 04:07:40 AM UTC 24 |
| Finished | Aug 29 04:07:43 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3729793425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 152.usbdev_ tx_rx_disruption.3729793425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/152.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/153.usbdev_endpoint_types.1507449615 |
| Short name | T470 |
| Test name | |
| Test status | |
| Simulation time | 586538148 ps |
| CPU time | 1.71 seconds |
| Started | Aug 29 04:07:40 AM UTC 24 |
| Finished | Aug 29 04:07:43 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1507449615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 153.usbdev_endpoint_types.1507449615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/153.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/153.usbdev_tx_rx_disruption.125473972 |
| Short name | T3433 |
| Test name | |
| Test status | |
| Simulation time | 527426311 ps |
| CPU time | 1.66 seconds |
| Started | Aug 29 04:07:40 AM UTC 24 |
| Finished | Aug 29 04:07:43 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=125473972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 153.usbdev_t x_rx_disruption.125473972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/153.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/154.usbdev_fifo_levels.1813988826 |
| Short name | T3435 |
| Test name | |
| Test status | |
| Simulation time | 326252716 ps |
| CPU time | 1.04 seconds |
| Started | Aug 29 04:08:58 AM UTC 24 |
| Finished | Aug 29 04:09:00 AM UTC 24 |
| Peak memory | 214696 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1813988826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 154.usbdev_fifo_levels.1813988826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/154.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/154.usbdev_tx_rx_disruption.3064507458 |
| Short name | T3439 |
| Test name | |
| Test status | |
| Simulation time | 469965078 ps |
| CPU time | 1.53 seconds |
| Started | Aug 29 04:08:58 AM UTC 24 |
| Finished | Aug 29 04:09:00 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3064507458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 154.usbdev_ tx_rx_disruption.3064507458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/154.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/155.usbdev_endpoint_types.3316832150 |
| Short name | T540 |
| Test name | |
| Test status | |
| Simulation time | 393237821 ps |
| CPU time | 1.21 seconds |
| Started | Aug 29 04:08:58 AM UTC 24 |
| Finished | Aug 29 04:09:00 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3316832150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 155.usbdev_endpoint_types.3316832150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/155.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/155.usbdev_fifo_levels.1545221828 |
| Short name | T3434 |
| Test name | |
| Test status | |
| Simulation time | 202684463 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 04:08:58 AM UTC 24 |
| Finished | Aug 29 04:09:00 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1545221828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 155.usbdev_fifo_levels.1545221828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/155.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/155.usbdev_tx_rx_disruption.230036797 |
| Short name | T3441 |
| Test name | |
| Test status | |
| Simulation time | 487897664 ps |
| CPU time | 1.56 seconds |
| Started | Aug 29 04:08:58 AM UTC 24 |
| Finished | Aug 29 04:09:01 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=230036797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 155.usbdev_t x_rx_disruption.230036797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/155.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/156.usbdev_endpoint_types.1586310974 |
| Short name | T547 |
| Test name | |
| Test status | |
| Simulation time | 271359513 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 04:08:58 AM UTC 24 |
| Finished | Aug 29 04:09:00 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1586310974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 156.usbdev_endpoint_types.1586310974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/156.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/156.usbdev_fifo_levels.2825182059 |
| Short name | T3436 |
| Test name | |
| Test status | |
| Simulation time | 286827898 ps |
| CPU time | 1.1 seconds |
| Started | Aug 29 04:08:58 AM UTC 24 |
| Finished | Aug 29 04:09:00 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2825182059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 156.usbdev_fifo_levels.2825182059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/156.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/156.usbdev_tx_rx_disruption.3968677228 |
| Short name | T3440 |
| Test name | |
| Test status | |
| Simulation time | 434842239 ps |
| CPU time | 1.37 seconds |
| Started | Aug 29 04:08:58 AM UTC 24 |
| Finished | Aug 29 04:09:00 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3968677228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 156.usbdev_ tx_rx_disruption.3968677228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/156.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/157.usbdev_endpoint_types.1696280550 |
| Short name | T516 |
| Test name | |
| Test status | |
| Simulation time | 441006650 ps |
| CPU time | 1.25 seconds |
| Started | Aug 29 04:08:58 AM UTC 24 |
| Finished | Aug 29 04:09:00 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1696280550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 157.usbdev_endpoint_types.1696280550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/157.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/157.usbdev_fifo_levels.4163376242 |
| Short name | T3438 |
| Test name | |
| Test status | |
| Simulation time | 302006485 ps |
| CPU time | 1.2 seconds |
| Started | Aug 29 04:08:58 AM UTC 24 |
| Finished | Aug 29 04:09:00 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4163376242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 157.usbdev_fifo_levels.4163376242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/157.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/157.usbdev_tx_rx_disruption.3613551843 |
| Short name | T3447 |
| Test name | |
| Test status | |
| Simulation time | 476115147 ps |
| CPU time | 1.76 seconds |
| Started | Aug 29 04:08:58 AM UTC 24 |
| Finished | Aug 29 04:09:01 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3613551843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 157.usbdev_ tx_rx_disruption.3613551843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/157.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/158.usbdev_fifo_levels.3993997884 |
| Short name | T418 |
| Test name | |
| Test status | |
| Simulation time | 177421906 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 04:08:58 AM UTC 24 |
| Finished | Aug 29 04:09:00 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3993997884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 158.usbdev_fifo_levels.3993997884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/158.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/158.usbdev_tx_rx_disruption.3650433245 |
| Short name | T3445 |
| Test name | |
| Test status | |
| Simulation time | 546832071 ps |
| CPU time | 1.68 seconds |
| Started | Aug 29 04:08:58 AM UTC 24 |
| Finished | Aug 29 04:09:01 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3650433245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 158.usbdev_ tx_rx_disruption.3650433245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/158.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/159.usbdev_tx_rx_disruption.1147247152 |
| Short name | T3443 |
| Test name | |
| Test status | |
| Simulation time | 599942929 ps |
| CPU time | 1.52 seconds |
| Started | Aug 29 04:08:58 AM UTC 24 |
| Finished | Aug 29 04:09:01 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1147247152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 159.usbdev_ tx_rx_disruption.1147247152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/159.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_alert_test.2427292954 |
| Short name | T1430 |
| Test name | |
| Test status | |
| Simulation time | 58445909 ps |
| CPU time | 0.97 seconds |
| Started | Aug 29 03:38:41 AM UTC 24 |
| Finished | Aug 29 03:38:43 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2427292954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 16.usbdev_alert_test.2427292954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_disconnect.1971504393 |
| Short name | T1403 |
| Test name | |
| Test status | |
| Simulation time | 9568836979 ps |
| CPU time | 13.81 seconds |
| Started | Aug 29 03:38:15 AM UTC 24 |
| Finished | Aug 29 03:38:30 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1971504393 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_disconnect.1971504393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_reset.2591708525 |
| Short name | T1444 |
| Test name | |
| Test status | |
| Simulation time | 20946041619 ps |
| CPU time | 30.71 seconds |
| Started | Aug 29 03:38:15 AM UTC 24 |
| Finished | Aug 29 03:38:47 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2591708525 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_reset.2591708525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_resume.1553805138 |
| Short name | T1470 |
| Test name | |
| Test status | |
| Simulation time | 25455723072 ps |
| CPU time | 38.73 seconds |
| Started | Aug 29 03:38:15 AM UTC 24 |
| Finished | Aug 29 03:38:55 AM UTC 24 |
| Peak memory | 226992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1553805138 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_resume.1553805138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_av_buffer.2151746947 |
| Short name | T1380 |
| Test name | |
| Test status | |
| Simulation time | 163630271 ps |
| CPU time | 1.24 seconds |
| Started | Aug 29 03:38:15 AM UTC 24 |
| Finished | Aug 29 03:38:17 AM UTC 24 |
| Peak memory | 214612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2151746947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_av_buffer.2151746947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_bitstuff_err.2838408108 |
| Short name | T1378 |
| Test name | |
| Test status | |
| Simulation time | 150105690 ps |
| CPU time | 0.95 seconds |
| Started | Aug 29 03:38:15 AM UTC 24 |
| Finished | Aug 29 03:38:17 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2838408108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_bitstuff_err.2838408108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_data_toggle_clear.2720422550 |
| Short name | T1381 |
| Test name | |
| Test status | |
| Simulation time | 271274869 ps |
| CPU time | 1.37 seconds |
| Started | Aug 29 03:38:15 AM UTC 24 |
| Finished | Aug 29 03:38:17 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2720422550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 16.usbdev_data_toggle_clear.2720422550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_data_toggle_restore.3147246477 |
| Short name | T634 |
| Test name | |
| Test status | |
| Simulation time | 703738728 ps |
| CPU time | 2.12 seconds |
| Started | Aug 29 03:38:15 AM UTC 24 |
| Finished | Aug 29 03:38:18 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3147246477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_data_toggle_restore.3147246477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_device_address.3409121685 |
| Short name | T1601 |
| Test name | |
| Test status | |
| Simulation time | 49815016612 ps |
| CPU time | 94.42 seconds |
| Started | Aug 29 03:38:15 AM UTC 24 |
| Finished | Aug 29 03:39:52 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3409121685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_device_address.3409121685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_device_timeout.382228303 |
| Short name | T1405 |
| Test name | |
| Test status | |
| Simulation time | 839629835 ps |
| CPU time | 16.2 seconds |
| Started | Aug 29 03:38:15 AM UTC 24 |
| Finished | Aug 29 03:38:33 AM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=382228303 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_device_timeout.382228303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_disable_endpoint.1399201633 |
| Short name | T1384 |
| Test name | |
| Test status | |
| Simulation time | 1013307665 ps |
| CPU time | 2.35 seconds |
| Started | Aug 29 03:38:15 AM UTC 24 |
| Finished | Aug 29 03:38:19 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1399201633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 16.usbdev_disable_endpoint.1399201633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_disconnected.1137467283 |
| Short name | T1379 |
| Test name | |
| Test status | |
| Simulation time | 144187109 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:38:15 AM UTC 24 |
| Finished | Aug 29 03:38:17 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1137467283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_disconnected.1137467283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_enable.3922605305 |
| Short name | T1389 |
| Test name | |
| Test status | |
| Simulation time | 46507701 ps |
| CPU time | 0.76 seconds |
| Started | Aug 29 03:38:23 AM UTC 24 |
| Finished | Aug 29 03:38:25 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3922605305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 16.usbdev_enable.3922605305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_endpoint_access.2454236054 |
| Short name | T1400 |
| Test name | |
| Test status | |
| Simulation time | 845320794 ps |
| CPU time | 2.51 seconds |
| Started | Aug 29 03:38:24 AM UTC 24 |
| Finished | Aug 29 03:38:27 AM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2454236054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_endpoint_access.2454236054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_endpoint_types.3194789595 |
| Short name | T522 |
| Test name | |
| Test status | |
| Simulation time | 368402027 ps |
| CPU time | 1.18 seconds |
| Started | Aug 29 03:38:24 AM UTC 24 |
| Finished | Aug 29 03:38:26 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3194789595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_endpoint_types.3194789595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_fifo_levels.146652469 |
| Short name | T407 |
| Test name | |
| Test status | |
| Simulation time | 288090266 ps |
| CPU time | 1.63 seconds |
| Started | Aug 29 03:38:24 AM UTC 24 |
| Finished | Aug 29 03:38:26 AM UTC 24 |
| Peak memory | 214980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=146652469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_fifo_levels.146652469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_fifo_rst.2596207979 |
| Short name | T1401 |
| Test name | |
| Test status | |
| Simulation time | 401864871 ps |
| CPU time | 3.05 seconds |
| Started | Aug 29 03:38:24 AM UTC 24 |
| Finished | Aug 29 03:38:28 AM UTC 24 |
| Peak memory | 217152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2596207979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_fifo_rst.2596207979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_in_iso.2901249049 |
| Short name | T1391 |
| Test name | |
| Test status | |
| Simulation time | 210889934 ps |
| CPU time | 1.21 seconds |
| Started | Aug 29 03:38:24 AM UTC 24 |
| Finished | Aug 29 03:38:26 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2901249049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 16.usbdev_in_iso.2901249049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_in_stall.2621514158 |
| Short name | T1393 |
| Test name | |
| Test status | |
| Simulation time | 152647788 ps |
| CPU time | 1.38 seconds |
| Started | Aug 29 03:38:24 AM UTC 24 |
| Finished | Aug 29 03:38:26 AM UTC 24 |
| Peak memory | 215028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2621514158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_in_stall.2621514158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_in_trans.1055471161 |
| Short name | T1390 |
| Test name | |
| Test status | |
| Simulation time | 226815504 ps |
| CPU time | 1.05 seconds |
| Started | Aug 29 03:38:24 AM UTC 24 |
| Finished | Aug 29 03:38:26 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1055471161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_in_trans.1055471161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_invalid_sync.3394918260 |
| Short name | T1479 |
| Test name | |
| Test status | |
| Simulation time | 4682634502 ps |
| CPU time | 39.05 seconds |
| Started | Aug 29 03:38:24 AM UTC 24 |
| Finished | Aug 29 03:39:04 AM UTC 24 |
| Peak memory | 227480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3394918260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 16.usbdev_invalid_sync.3394918260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_iso_retraction.3770787866 |
| Short name | T1519 |
| Test name | |
| Test status | |
| Simulation time | 7037582256 ps |
| CPU time | 79.29 seconds |
| Started | Aug 29 03:38:24 AM UTC 24 |
| Finished | Aug 29 03:39:45 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3770787866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_iso_retraction.3770787866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_link_in_err.1464326791 |
| Short name | T1392 |
| Test name | |
| Test status | |
| Simulation time | 158372916 ps |
| CPU time | 1.21 seconds |
| Started | Aug 29 03:38:24 AM UTC 24 |
| Finished | Aug 29 03:38:26 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1464326791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_link_in_err.1464326791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_link_resume.908336123 |
| Short name | T1478 |
| Test name | |
| Test status | |
| Simulation time | 26068431100 ps |
| CPU time | 38.33 seconds |
| Started | Aug 29 03:38:24 AM UTC 24 |
| Finished | Aug 29 03:39:04 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=908336123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_link_resume.908336123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_link_suspend.1951992544 |
| Short name | T1427 |
| Test name | |
| Test status | |
| Simulation time | 11198323899 ps |
| CPU time | 15.49 seconds |
| Started | Aug 29 03:38:24 AM UTC 24 |
| Finished | Aug 29 03:38:41 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1951992544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_link_suspend.1951992544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_low_speed_traffic.4247913155 |
| Short name | T1471 |
| Test name | |
| Test status | |
| Simulation time | 4068195044 ps |
| CPU time | 30.26 seconds |
| Started | Aug 29 03:38:24 AM UTC 24 |
| Finished | Aug 29 03:38:56 AM UTC 24 |
| Peak memory | 229592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4247913155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_low_speed_traffic.4247913155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_max_inter_pkt_delay.3302551873 |
| Short name | T1453 |
| Test name | |
| Test status | |
| Simulation time | 3885600079 ps |
| CPU time | 27.07 seconds |
| Started | Aug 29 03:38:24 AM UTC 24 |
| Finished | Aug 29 03:38:52 AM UTC 24 |
| Peak memory | 227448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3302551873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_inter_pkt_delay.3302551873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_max_length_in_transaction.2176052095 |
| Short name | T1399 |
| Test name | |
| Test status | |
| Simulation time | 243094778 ps |
| CPU time | 1.58 seconds |
| Started | Aug 29 03:38:24 AM UTC 24 |
| Finished | Aug 29 03:38:27 AM UTC 24 |
| Peak memory | 217128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2176052095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 16.usbdev_max_length_in_transaction.2176052095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_max_length_out_transaction.2556444606 |
| Short name | T1394 |
| Test name | |
| Test status | |
| Simulation time | 195091613 ps |
| CPU time | 1.09 seconds |
| Started | Aug 29 03:38:24 AM UTC 24 |
| Finished | Aug 29 03:38:26 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2556444606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 16.usbdev_max_length_out_transaction.2556444606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_max_non_iso_usb_traffic.2251367329 |
| Short name | T1449 |
| Test name | |
| Test status | |
| Simulation time | 3315592478 ps |
| CPU time | 24.1 seconds |
| Started | Aug 29 03:38:24 AM UTC 24 |
| Finished | Aug 29 03:38:50 AM UTC 24 |
| Peak memory | 227616 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2251367329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_non_iso_usb_traffic.2251367329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_min_inter_pkt_delay.141125210 |
| Short name | T1445 |
| Test name | |
| Test status | |
| Simulation time | 2333885306 ps |
| CPU time | 21.38 seconds |
| Started | Aug 29 03:38:24 AM UTC 24 |
| Finished | Aug 29 03:38:47 AM UTC 24 |
| Peak memory | 227612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=141125210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_min_inter_pkt_delay.141125210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_min_length_in_transaction.574131976 |
| Short name | T1395 |
| Test name | |
| Test status | |
| Simulation time | 150216144 ps |
| CPU time | 0.99 seconds |
| Started | Aug 29 03:38:24 AM UTC 24 |
| Finished | Aug 29 03:38:26 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=574131976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 16.usbdev_min_length_in_transaction.574131976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_min_length_out_transaction.338360114 |
| Short name | T1396 |
| Test name | |
| Test status | |
| Simulation time | 188981209 ps |
| CPU time | 1.12 seconds |
| Started | Aug 29 03:38:24 AM UTC 24 |
| Finished | Aug 29 03:38:26 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=338360114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 16.usbdev_min_length_out_transaction.338360114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_out_iso.3877391356 |
| Short name | T1397 |
| Test name | |
| Test status | |
| Simulation time | 187344065 ps |
| CPU time | 1.04 seconds |
| Started | Aug 29 03:38:24 AM UTC 24 |
| Finished | Aug 29 03:38:27 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3877391356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 16.usbdev_out_iso.3877391356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_out_stall.3562577182 |
| Short name | T1398 |
| Test name | |
| Test status | |
| Simulation time | 154429188 ps |
| CPU time | 1.3 seconds |
| Started | Aug 29 03:38:24 AM UTC 24 |
| Finished | Aug 29 03:38:27 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3562577182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_out_stall.3562577182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_out_trans_nak.1754326994 |
| Short name | T623 |
| Test name | |
| Test status | |
| Simulation time | 214120599 ps |
| CPU time | 1.37 seconds |
| Started | Aug 29 03:38:24 AM UTC 24 |
| Finished | Aug 29 03:38:27 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1754326994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 16.usbdev_out_trans_nak.1754326994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_pending_in_trans.2269817508 |
| Short name | T1407 |
| Test name | |
| Test status | |
| Simulation time | 161580459 ps |
| CPU time | 0.92 seconds |
| Started | Aug 29 03:38:32 AM UTC 24 |
| Finished | Aug 29 03:38:34 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2269817508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 16.usbdev_pending_in_trans.2269817508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_phy_config_pinflip.476529029 |
| Short name | T1413 |
| Test name | |
| Test status | |
| Simulation time | 227397591 ps |
| CPU time | 1.56 seconds |
| Started | Aug 29 03:38:32 AM UTC 24 |
| Finished | Aug 29 03:38:35 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=476529029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 16.usbdev_phy_config_pinflip.476529029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_phy_config_usb_ref_disable.2660579163 |
| Short name | T1410 |
| Test name | |
| Test status | |
| Simulation time | 144420554 ps |
| CPU time | 1.24 seconds |
| Started | Aug 29 03:38:32 AM UTC 24 |
| Finished | Aug 29 03:38:34 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2660579163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 16.usbdev_phy_config_usb_ref_disable.2660579163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_phy_pins_sense.1039417 |
| Short name | T1408 |
| Test name | |
| Test status | |
| Simulation time | 84656040 ps |
| CPU time | 0.88 seconds |
| Started | Aug 29 03:38:32 AM UTC 24 |
| Finished | Aug 29 03:38:34 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1039417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_phy_pins_sense.1039417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_buffer.1715135010 |
| Short name | T1458 |
| Test name | |
| Test status | |
| Simulation time | 8293598512 ps |
| CPU time | 20.22 seconds |
| Started | Aug 29 03:38:32 AM UTC 24 |
| Finished | Aug 29 03:38:53 AM UTC 24 |
| Peak memory | 227692 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1715135010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_pkt_buffer.1715135010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_received.805095301 |
| Short name | T1411 |
| Test name | |
| Test status | |
| Simulation time | 151372449 ps |
| CPU time | 1.33 seconds |
| Started | Aug 29 03:38:32 AM UTC 24 |
| Finished | Aug 29 03:38:35 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=805095301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_pkt_received.805095301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_sent.851059142 |
| Short name | T1421 |
| Test name | |
| Test status | |
| Simulation time | 213381566 ps |
| CPU time | 1.75 seconds |
| Started | Aug 29 03:38:32 AM UTC 24 |
| Finished | Aug 29 03:38:35 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=851059142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 16.usbdev_pkt_sent.851059142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_random_length_in_transaction.655810562 |
| Short name | T1412 |
| Test name | |
| Test status | |
| Simulation time | 220563543 ps |
| CPU time | 1.21 seconds |
| Started | Aug 29 03:38:32 AM UTC 24 |
| Finished | Aug 29 03:38:35 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=655810562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_random_length_in_transaction.655810562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_random_length_out_transaction.1060302434 |
| Short name | T1414 |
| Test name | |
| Test status | |
| Simulation time | 156037348 ps |
| CPU time | 1.33 seconds |
| Started | Aug 29 03:38:32 AM UTC 24 |
| Finished | Aug 29 03:38:35 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1060302434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 16.usbdev_random_length_out_transaction.1060302434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_resume_link_active.3856149746 |
| Short name | T1473 |
| Test name | |
| Test status | |
| Simulation time | 20152849763 ps |
| CPU time | 25.65 seconds |
| Started | Aug 29 03:38:32 AM UTC 24 |
| Finished | Aug 29 03:38:59 AM UTC 24 |
| Peak memory | 217348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3856149746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 16.usbdev_resume_link_active.3856149746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_rx_crc_err.218901813 |
| Short name | T1416 |
| Test name | |
| Test status | |
| Simulation time | 145786085 ps |
| CPU time | 1.37 seconds |
| Started | Aug 29 03:38:32 AM UTC 24 |
| Finished | Aug 29 03:38:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=218901813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_rx_crc_err.218901813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_rx_full.1493461178 |
| Short name | T1423 |
| Test name | |
| Test status | |
| Simulation time | 403435550 ps |
| CPU time | 2.07 seconds |
| Started | Aug 29 03:38:32 AM UTC 24 |
| Finished | Aug 29 03:38:36 AM UTC 24 |
| Peak memory | 217016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1493461178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 16.usbdev_rx_full.1493461178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_setup_stage.662611692 |
| Short name | T1418 |
| Test name | |
| Test status | |
| Simulation time | 153321837 ps |
| CPU time | 1.36 seconds |
| Started | Aug 29 03:38:32 AM UTC 24 |
| Finished | Aug 29 03:38:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=662611692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_setup_stage.662611692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_setup_trans_ignored.4037070865 |
| Short name | T1420 |
| Test name | |
| Test status | |
| Simulation time | 163615783 ps |
| CPU time | 1.38 seconds |
| Started | Aug 29 03:38:33 AM UTC 24 |
| Finished | Aug 29 03:38:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4037070865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 16.usbdev_setup_trans_ignored.4037070865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_smoke.4224713830 |
| Short name | T1419 |
| Test name | |
| Test status | |
| Simulation time | 283518741 ps |
| CPU time | 1.37 seconds |
| Started | Aug 29 03:38:33 AM UTC 24 |
| Finished | Aug 29 03:38:35 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4224713830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_smoke.4224713830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_spurious_pids_ignored.2647364414 |
| Short name | T1480 |
| Test name | |
| Test status | |
| Simulation time | 3324178601 ps |
| CPU time | 30.79 seconds |
| Started | Aug 29 03:38:33 AM UTC 24 |
| Finished | Aug 29 03:39:05 AM UTC 24 |
| Peak memory | 234248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2647364414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 16.usbdev_spurious_pids_ignored.2647364414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_stall_priority_over_nak.644987081 |
| Short name | T1417 |
| Test name | |
| Test status | |
| Simulation time | 143321140 ps |
| CPU time | 1.24 seconds |
| Started | Aug 29 03:38:33 AM UTC 24 |
| Finished | Aug 29 03:38:35 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=644987081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_stall_priority_over_nak.644987081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_stall_trans.1048629889 |
| Short name | T1422 |
| Test name | |
| Test status | |
| Simulation time | 155695891 ps |
| CPU time | 1.46 seconds |
| Started | Aug 29 03:38:33 AM UTC 24 |
| Finished | Aug 29 03:38:35 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1048629889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_stall_trans.1048629889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_stream_len_max.4282944676 |
| Short name | T1415 |
| Test name | |
| Test status | |
| Simulation time | 206542965 ps |
| CPU time | 0.94 seconds |
| Started | Aug 29 03:38:33 AM UTC 24 |
| Finished | Aug 29 03:38:35 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4282944676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_stream_len_max.4282944676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_streaming_out.2044259345 |
| Short name | T1451 |
| Test name | |
| Test status | |
| Simulation time | 2001492066 ps |
| CPU time | 16.71 seconds |
| Started | Aug 29 03:38:33 AM UTC 24 |
| Finished | Aug 29 03:38:51 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2044259345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_streaming_out.2044259345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_timeout_missing_host_handshake.24841015 |
| Short name | T1402 |
| Test name | |
| Test status | |
| Simulation time | 1598595647 ps |
| CPU time | 12.01 seconds |
| Started | Aug 29 03:38:15 AM UTC 24 |
| Finished | Aug 29 03:38:28 AM UTC 24 |
| Peak memory | 217260 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=24841015 -assert nopostproc +UVM_TESTNAME=usbdev_ba se_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_timeout_missing_host_handshake.24841015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/16.usbdev_tx_rx_disruption.3947381911 |
| Short name | T227 |
| Test name | |
| Test status | |
| Simulation time | 548969435 ps |
| CPU time | 2.21 seconds |
| Started | Aug 29 03:38:33 AM UTC 24 |
| Finished | Aug 29 03:38:36 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3947381911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_t x_rx_disruption.3947381911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/16.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/160.usbdev_tx_rx_disruption.110626185 |
| Short name | T3444 |
| Test name | |
| Test status | |
| Simulation time | 474041908 ps |
| CPU time | 1.45 seconds |
| Started | Aug 29 04:08:58 AM UTC 24 |
| Finished | Aug 29 04:09:01 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=110626185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 160.usbdev_t x_rx_disruption.110626185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/160.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/161.usbdev_endpoint_types.2941123445 |
| Short name | T3446 |
| Test name | |
| Test status | |
| Simulation time | 530758917 ps |
| CPU time | 1.47 seconds |
| Started | Aug 29 04:08:58 AM UTC 24 |
| Finished | Aug 29 04:09:01 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2941123445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 161.usbdev_endpoint_types.2941123445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/161.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/161.usbdev_tx_rx_disruption.672735845 |
| Short name | T3449 |
| Test name | |
| Test status | |
| Simulation time | 544642601 ps |
| CPU time | 1.47 seconds |
| Started | Aug 29 04:08:58 AM UTC 24 |
| Finished | Aug 29 04:09:01 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=672735845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 161.usbdev_t x_rx_disruption.672735845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/161.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/162.usbdev_endpoint_types.1237278945 |
| Short name | T501 |
| Test name | |
| Test status | |
| Simulation time | 519236498 ps |
| CPU time | 1.34 seconds |
| Started | Aug 29 04:08:58 AM UTC 24 |
| Finished | Aug 29 04:09:01 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1237278945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 162.usbdev_endpoint_types.1237278945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/162.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/162.usbdev_tx_rx_disruption.1713709771 |
| Short name | T3452 |
| Test name | |
| Test status | |
| Simulation time | 549480629 ps |
| CPU time | 1.68 seconds |
| Started | Aug 29 04:08:58 AM UTC 24 |
| Finished | Aug 29 04:09:01 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1713709771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 162.usbdev_ tx_rx_disruption.1713709771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/162.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/163.usbdev_endpoint_types.144810604 |
| Short name | T494 |
| Test name | |
| Test status | |
| Simulation time | 559252205 ps |
| CPU time | 1.72 seconds |
| Started | Aug 29 04:08:58 AM UTC 24 |
| Finished | Aug 29 04:09:01 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=144810604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 163.usbdev_endpoint_types.144810604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/163.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/163.usbdev_tx_rx_disruption.284573786 |
| Short name | T3456 |
| Test name | |
| Test status | |
| Simulation time | 519755777 ps |
| CPU time | 1.77 seconds |
| Started | Aug 29 04:08:58 AM UTC 24 |
| Finished | Aug 29 04:09:01 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=284573786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 163.usbdev_t x_rx_disruption.284573786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/163.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/164.usbdev_endpoint_types.165350825 |
| Short name | T452 |
| Test name | |
| Test status | |
| Simulation time | 432449334 ps |
| CPU time | 1.27 seconds |
| Started | Aug 29 04:08:58 AM UTC 24 |
| Finished | Aug 29 04:09:01 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=165350825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 164.usbdev_endpoint_types.165350825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/164.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/164.usbdev_tx_rx_disruption.4270210554 |
| Short name | T3451 |
| Test name | |
| Test status | |
| Simulation time | 497160336 ps |
| CPU time | 1.41 seconds |
| Started | Aug 29 04:08:58 AM UTC 24 |
| Finished | Aug 29 04:09:01 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4270210554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 164.usbdev_ tx_rx_disruption.4270210554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/164.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/165.usbdev_endpoint_types.565319949 |
| Short name | T3448 |
| Test name | |
| Test status | |
| Simulation time | 299092761 ps |
| CPU time | 1.36 seconds |
| Started | Aug 29 04:08:58 AM UTC 24 |
| Finished | Aug 29 04:09:01 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=565319949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 165.usbdev_endpoint_types.565319949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/165.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/165.usbdev_tx_rx_disruption.2347959947 |
| Short name | T3459 |
| Test name | |
| Test status | |
| Simulation time | 486819503 ps |
| CPU time | 1.64 seconds |
| Started | Aug 29 04:08:59 AM UTC 24 |
| Finished | Aug 29 04:09:01 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2347959947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 165.usbdev_ tx_rx_disruption.2347959947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/165.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/166.usbdev_endpoint_types.1901785094 |
| Short name | T489 |
| Test name | |
| Test status | |
| Simulation time | 305356682 ps |
| CPU time | 0.95 seconds |
| Started | Aug 29 04:08:59 AM UTC 24 |
| Finished | Aug 29 04:09:01 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1901785094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 166.usbdev_endpoint_types.1901785094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/166.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/166.usbdev_tx_rx_disruption.1091441417 |
| Short name | T3450 |
| Test name | |
| Test status | |
| Simulation time | 478120223 ps |
| CPU time | 1.31 seconds |
| Started | Aug 29 04:08:59 AM UTC 24 |
| Finished | Aug 29 04:09:01 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1091441417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 166.usbdev_ tx_rx_disruption.1091441417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/166.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/167.usbdev_endpoint_types.2117147928 |
| Short name | T525 |
| Test name | |
| Test status | |
| Simulation time | 471930809 ps |
| CPU time | 1.34 seconds |
| Started | Aug 29 04:08:59 AM UTC 24 |
| Finished | Aug 29 04:09:01 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2117147928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 167.usbdev_endpoint_types.2117147928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/167.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/167.usbdev_tx_rx_disruption.2636916051 |
| Short name | T3461 |
| Test name | |
| Test status | |
| Simulation time | 524067567 ps |
| CPU time | 1.82 seconds |
| Started | Aug 29 04:08:59 AM UTC 24 |
| Finished | Aug 29 04:09:02 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2636916051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 167.usbdev_ tx_rx_disruption.2636916051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/167.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/168.usbdev_tx_rx_disruption.3159862649 |
| Short name | T3462 |
| Test name | |
| Test status | |
| Simulation time | 484326623 ps |
| CPU time | 1.68 seconds |
| Started | Aug 29 04:08:59 AM UTC 24 |
| Finished | Aug 29 04:09:02 AM UTC 24 |
| Peak memory | 214588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3159862649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 168.usbdev_ tx_rx_disruption.3159862649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/168.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/169.usbdev_endpoint_types.3487252119 |
| Short name | T521 |
| Test name | |
| Test status | |
| Simulation time | 331538975 ps |
| CPU time | 1.02 seconds |
| Started | Aug 29 04:08:59 AM UTC 24 |
| Finished | Aug 29 04:09:01 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3487252119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 169.usbdev_endpoint_types.3487252119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/169.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/169.usbdev_tx_rx_disruption.605053054 |
| Short name | T3453 |
| Test name | |
| Test status | |
| Simulation time | 556451503 ps |
| CPU time | 1.83 seconds |
| Started | Aug 29 04:08:59 AM UTC 24 |
| Finished | Aug 29 04:09:02 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=605053054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 169.usbdev_t x_rx_disruption.605053054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/169.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_alert_test.711072087 |
| Short name | T1484 |
| Test name | |
| Test status | |
| Simulation time | 38402857 ps |
| CPU time | 0.65 seconds |
| Started | Aug 29 03:39:04 AM UTC 24 |
| Finished | Aug 29 03:39:05 AM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=711072087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 17.usbdev_alert_test.711072087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_disconnect.154643020 |
| Short name | T1452 |
| Test name | |
| Test status | |
| Simulation time | 6513165356 ps |
| CPU time | 8.67 seconds |
| Started | Aug 29 03:38:41 AM UTC 24 |
| Finished | Aug 29 03:38:51 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=154643020 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_disconnect.154643020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_reset.116474732 |
| Short name | T1476 |
| Test name | |
| Test status | |
| Simulation time | 14463739775 ps |
| CPU time | 17.41 seconds |
| Started | Aug 29 03:38:41 AM UTC 24 |
| Finished | Aug 29 03:39:00 AM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=116474732 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_reset.116474732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_resume.1147236140 |
| Short name | T260 |
| Test name | |
| Test status | |
| Simulation time | 23370138084 ps |
| CPU time | 28.82 seconds |
| Started | Aug 29 03:38:41 AM UTC 24 |
| Finished | Aug 29 03:39:12 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1147236140 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_resume.1147236140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_av_buffer.1772909524 |
| Short name | T1429 |
| Test name | |
| Test status | |
| Simulation time | 153760117 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 03:38:41 AM UTC 24 |
| Finished | Aug 29 03:38:43 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1772909524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_av_buffer.1772909524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_bitstuff_err.790616385 |
| Short name | T1431 |
| Test name | |
| Test status | |
| Simulation time | 166946187 ps |
| CPU time | 0.99 seconds |
| Started | Aug 29 03:38:42 AM UTC 24 |
| Finished | Aug 29 03:38:44 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=790616385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_bitstuff_err.790616385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_data_toggle_clear.2855299129 |
| Short name | T1434 |
| Test name | |
| Test status | |
| Simulation time | 211091615 ps |
| CPU time | 1.43 seconds |
| Started | Aug 29 03:38:42 AM UTC 24 |
| Finished | Aug 29 03:38:44 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2855299129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 17.usbdev_data_toggle_clear.2855299129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_data_toggle_restore.16319786 |
| Short name | T1439 |
| Test name | |
| Test status | |
| Simulation time | 845938504 ps |
| CPU time | 2.42 seconds |
| Started | Aug 29 03:38:42 AM UTC 24 |
| Finished | Aug 29 03:38:45 AM UTC 24 |
| Peak memory | 217256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=16319786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_data_toggle_restore.16319786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_device_address.1433013084 |
| Short name | T1545 |
| Test name | |
| Test status | |
| Simulation time | 42339807235 ps |
| CPU time | 62.85 seconds |
| Started | Aug 29 03:38:42 AM UTC 24 |
| Finished | Aug 29 03:39:46 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1433013084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_device_address.1433013084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_device_timeout.478921720 |
| Short name | T1501 |
| Test name | |
| Test status | |
| Simulation time | 3377855250 ps |
| CPU time | 26.11 seconds |
| Started | Aug 29 03:38:42 AM UTC 24 |
| Finished | Aug 29 03:39:09 AM UTC 24 |
| Peak memory | 217444 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=478921720 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_device_timeout.478921720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_disable_endpoint.2850746918 |
| Short name | T1440 |
| Test name | |
| Test status | |
| Simulation time | 1133924913 ps |
| CPU time | 2.6 seconds |
| Started | Aug 29 03:38:42 AM UTC 24 |
| Finished | Aug 29 03:38:45 AM UTC 24 |
| Peak memory | 217136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2850746918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 17.usbdev_disable_endpoint.2850746918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_disconnected.1134878683 |
| Short name | T1433 |
| Test name | |
| Test status | |
| Simulation time | 146806747 ps |
| CPU time | 1.15 seconds |
| Started | Aug 29 03:38:42 AM UTC 24 |
| Finished | Aug 29 03:38:44 AM UTC 24 |
| Peak memory | 214668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1134878683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_disconnected.1134878683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_enable.1957897937 |
| Short name | T1432 |
| Test name | |
| Test status | |
| Simulation time | 73686019 ps |
| CPU time | 0.97 seconds |
| Started | Aug 29 03:38:42 AM UTC 24 |
| Finished | Aug 29 03:38:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1957897937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 17.usbdev_enable.1957897937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_endpoint_access.2427850050 |
| Short name | T1442 |
| Test name | |
| Test status | |
| Simulation time | 858137591 ps |
| CPU time | 2.9 seconds |
| Started | Aug 29 03:38:42 AM UTC 24 |
| Finished | Aug 29 03:38:46 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2427850050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_endpoint_access.2427850050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_endpoint_types.3165289975 |
| Short name | T466 |
| Test name | |
| Test status | |
| Simulation time | 414576287 ps |
| CPU time | 1.97 seconds |
| Started | Aug 29 03:38:42 AM UTC 24 |
| Finished | Aug 29 03:38:45 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3165289975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_endpoint_types.3165289975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_fifo_levels.1372671298 |
| Short name | T242 |
| Test name | |
| Test status | |
| Simulation time | 148502518 ps |
| CPU time | 1.51 seconds |
| Started | Aug 29 03:38:42 AM UTC 24 |
| Finished | Aug 29 03:38:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1372671298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_fifo_levels.1372671298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_fifo_rst.2143057315 |
| Short name | T1443 |
| Test name | |
| Test status | |
| Simulation time | 455551610 ps |
| CPU time | 3.03 seconds |
| Started | Aug 29 03:38:42 AM UTC 24 |
| Finished | Aug 29 03:38:46 AM UTC 24 |
| Peak memory | 217148 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2143057315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_fifo_rst.2143057315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_in_iso.2972158637 |
| Short name | T1437 |
| Test name | |
| Test status | |
| Simulation time | 235343832 ps |
| CPU time | 1.2 seconds |
| Started | Aug 29 03:38:42 AM UTC 24 |
| Finished | Aug 29 03:38:44 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2972158637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 17.usbdev_in_iso.2972158637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_in_stall.3146080121 |
| Short name | T1435 |
| Test name | |
| Test status | |
| Simulation time | 141789117 ps |
| CPU time | 1 seconds |
| Started | Aug 29 03:38:42 AM UTC 24 |
| Finished | Aug 29 03:38:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3146080121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_in_stall.3146080121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_in_trans.153410864 |
| Short name | T1438 |
| Test name | |
| Test status | |
| Simulation time | 214928508 ps |
| CPU time | 1.42 seconds |
| Started | Aug 29 03:38:42 AM UTC 24 |
| Finished | Aug 29 03:38:45 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=153410864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 17.usbdev_in_trans.153410864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_invalid_sync.3326258709 |
| Short name | T1632 |
| Test name | |
| Test status | |
| Simulation time | 3637072575 ps |
| CPU time | 87.29 seconds |
| Started | Aug 29 03:38:42 AM UTC 24 |
| Finished | Aug 29 03:40:11 AM UTC 24 |
| Peak memory | 227688 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3326258709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 17.usbdev_invalid_sync.3326258709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_iso_retraction.3541032954 |
| Short name | T1600 |
| Test name | |
| Test status | |
| Simulation time | 6937130034 ps |
| CPU time | 67.4 seconds |
| Started | Aug 29 03:38:42 AM UTC 24 |
| Finished | Aug 29 03:39:51 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3541032954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_iso_retraction.3541032954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_link_in_err.3559655291 |
| Short name | T1436 |
| Test name | |
| Test status | |
| Simulation time | 264215273 ps |
| CPU time | 1.01 seconds |
| Started | Aug 29 03:38:42 AM UTC 24 |
| Finished | Aug 29 03:38:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3559655291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_link_in_err.3559655291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_link_resume.108080319 |
| Short name | T1475 |
| Test name | |
| Test status | |
| Simulation time | 12486393124 ps |
| CPU time | 15.83 seconds |
| Started | Aug 29 03:38:42 AM UTC 24 |
| Finished | Aug 29 03:38:59 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=108080319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_link_resume.108080319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_link_suspend.4109870225 |
| Short name | T1474 |
| Test name | |
| Test status | |
| Simulation time | 4493403047 ps |
| CPU time | 7.15 seconds |
| Started | Aug 29 03:38:51 AM UTC 24 |
| Finished | Aug 29 03:38:59 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4109870225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_link_suspend.4109870225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_low_speed_traffic.317507611 |
| Short name | T1633 |
| Test name | |
| Test status | |
| Simulation time | 3167568219 ps |
| CPU time | 79.54 seconds |
| Started | Aug 29 03:38:51 AM UTC 24 |
| Finished | Aug 29 03:40:12 AM UTC 24 |
| Peak memory | 229656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=317507611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_low_speed_traffic.317507611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_max_inter_pkt_delay.1313807130 |
| Short name | T1504 |
| Test name | |
| Test status | |
| Simulation time | 2227875915 ps |
| CPU time | 19.42 seconds |
| Started | Aug 29 03:38:51 AM UTC 24 |
| Finished | Aug 29 03:39:12 AM UTC 24 |
| Peak memory | 227556 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1313807130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_inter_pkt_delay.1313807130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_max_length_in_transaction.147487852 |
| Short name | T1457 |
| Test name | |
| Test status | |
| Simulation time | 241317170 ps |
| CPU time | 1.17 seconds |
| Started | Aug 29 03:38:51 AM UTC 24 |
| Finished | Aug 29 03:38:53 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=147487852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 17.usbdev_max_length_in_transaction.147487852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_max_length_out_transaction.1966157612 |
| Short name | T1455 |
| Test name | |
| Test status | |
| Simulation time | 185952549 ps |
| CPU time | 1 seconds |
| Started | Aug 29 03:38:51 AM UTC 24 |
| Finished | Aug 29 03:38:53 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1966157612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 17.usbdev_max_length_out_transaction.1966157612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_max_non_iso_usb_traffic.750750962 |
| Short name | T1505 |
| Test name | |
| Test status | |
| Simulation time | 2351401558 ps |
| CPU time | 21.35 seconds |
| Started | Aug 29 03:38:51 AM UTC 24 |
| Finished | Aug 29 03:39:14 AM UTC 24 |
| Peak memory | 234256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=750750962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_non_iso_usb_traffic.750750962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_min_inter_pkt_delay.892420084 |
| Short name | T1508 |
| Test name | |
| Test status | |
| Simulation time | 3648603788 ps |
| CPU time | 25.03 seconds |
| Started | Aug 29 03:38:51 AM UTC 24 |
| Finished | Aug 29 03:39:18 AM UTC 24 |
| Peak memory | 227560 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=892420084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_min_inter_pkt_delay.892420084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_min_length_in_transaction.729830998 |
| Short name | T1454 |
| Test name | |
| Test status | |
| Simulation time | 191383926 ps |
| CPU time | 0.9 seconds |
| Started | Aug 29 03:38:51 AM UTC 24 |
| Finished | Aug 29 03:38:53 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=729830998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 17.usbdev_min_length_in_transaction.729830998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_min_length_out_transaction.1712078736 |
| Short name | T1462 |
| Test name | |
| Test status | |
| Simulation time | 144412139 ps |
| CPU time | 1.28 seconds |
| Started | Aug 29 03:38:51 AM UTC 24 |
| Finished | Aug 29 03:38:54 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1712078736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 17.usbdev_min_length_out_transaction.1712078736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_out_iso.351103152 |
| Short name | T1461 |
| Test name | |
| Test status | |
| Simulation time | 167989066 ps |
| CPU time | 1.15 seconds |
| Started | Aug 29 03:38:51 AM UTC 24 |
| Finished | Aug 29 03:38:54 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=351103152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 17.usbdev_out_iso.351103152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_out_stall.2192034293 |
| Short name | T1456 |
| Test name | |
| Test status | |
| Simulation time | 190003995 ps |
| CPU time | 0.9 seconds |
| Started | Aug 29 03:38:51 AM UTC 24 |
| Finished | Aug 29 03:38:53 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2192034293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_out_stall.2192034293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_out_trans_nak.4186749329 |
| Short name | T1460 |
| Test name | |
| Test status | |
| Simulation time | 168227811 ps |
| CPU time | 1.02 seconds |
| Started | Aug 29 03:38:51 AM UTC 24 |
| Finished | Aug 29 03:38:54 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4186749329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 17.usbdev_out_trans_nak.4186749329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_pending_in_trans.3980505466 |
| Short name | T1464 |
| Test name | |
| Test status | |
| Simulation time | 199940478 ps |
| CPU time | 1.14 seconds |
| Started | Aug 29 03:38:52 AM UTC 24 |
| Finished | Aug 29 03:38:54 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3980505466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 17.usbdev_pending_in_trans.3980505466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_phy_config_pinflip.2001059339 |
| Short name | T1466 |
| Test name | |
| Test status | |
| Simulation time | 237152295 ps |
| CPU time | 1.14 seconds |
| Started | Aug 29 03:38:52 AM UTC 24 |
| Finished | Aug 29 03:38:54 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2001059339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 17.usbdev_phy_config_pinflip.2001059339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_phy_config_usb_ref_disable.1810268190 |
| Short name | T1463 |
| Test name | |
| Test status | |
| Simulation time | 143835838 ps |
| CPU time | 0.99 seconds |
| Started | Aug 29 03:38:52 AM UTC 24 |
| Finished | Aug 29 03:38:54 AM UTC 24 |
| Peak memory | 214836 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1810268190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 17.usbdev_phy_config_usb_ref_disable.1810268190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_buffer.3618450449 |
| Short name | T1540 |
| Test name | |
| Test status | |
| Simulation time | 14563295464 ps |
| CPU time | 34.26 seconds |
| Started | Aug 29 03:38:52 AM UTC 24 |
| Finished | Aug 29 03:39:27 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3618450449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_pkt_buffer.3618450449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_received.1472771373 |
| Short name | T1465 |
| Test name | |
| Test status | |
| Simulation time | 218219159 ps |
| CPU time | 0.98 seconds |
| Started | Aug 29 03:38:52 AM UTC 24 |
| Finished | Aug 29 03:38:54 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1472771373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_pkt_received.1472771373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_sent.1883810000 |
| Short name | T1467 |
| Test name | |
| Test status | |
| Simulation time | 244136417 ps |
| CPU time | 1.15 seconds |
| Started | Aug 29 03:38:52 AM UTC 24 |
| Finished | Aug 29 03:38:54 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1883810000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_pkt_sent.1883810000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_random_length_in_transaction.259905786 |
| Short name | T1468 |
| Test name | |
| Test status | |
| Simulation time | 209986617 ps |
| CPU time | 1.14 seconds |
| Started | Aug 29 03:38:52 AM UTC 24 |
| Finished | Aug 29 03:38:54 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=259905786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_random_length_in_transaction.259905786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_random_length_out_transaction.2422204837 |
| Short name | T1469 |
| Test name | |
| Test status | |
| Simulation time | 182732567 ps |
| CPU time | 1.26 seconds |
| Started | Aug 29 03:38:52 AM UTC 24 |
| Finished | Aug 29 03:38:54 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2422204837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 17.usbdev_random_length_out_transaction.2422204837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_resume_link_active.3533384000 |
| Short name | T1507 |
| Test name | |
| Test status | |
| Simulation time | 20178008532 ps |
| CPU time | 21.87 seconds |
| Started | Aug 29 03:38:52 AM UTC 24 |
| Finished | Aug 29 03:39:15 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3533384000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 17.usbdev_resume_link_active.3533384000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_rx_crc_err.3620906500 |
| Short name | T1481 |
| Test name | |
| Test status | |
| Simulation time | 200785172 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 03:39:03 AM UTC 24 |
| Finished | Aug 29 03:39:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3620906500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_rx_crc_err.3620906500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_rx_full.4196130571 |
| Short name | T1486 |
| Test name | |
| Test status | |
| Simulation time | 313046234 ps |
| CPU time | 1.2 seconds |
| Started | Aug 29 03:39:03 AM UTC 24 |
| Finished | Aug 29 03:39:05 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4196130571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 17.usbdev_rx_full.4196130571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_setup_stage.3131476286 |
| Short name | T1485 |
| Test name | |
| Test status | |
| Simulation time | 143524806 ps |
| CPU time | 1.06 seconds |
| Started | Aug 29 03:39:03 AM UTC 24 |
| Finished | Aug 29 03:39:05 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3131476286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_setup_stage.3131476286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_setup_trans_ignored.2418641719 |
| Short name | T1482 |
| Test name | |
| Test status | |
| Simulation time | 146651119 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 03:39:03 AM UTC 24 |
| Finished | Aug 29 03:39:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2418641719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 17.usbdev_setup_trans_ignored.2418641719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_smoke.1983875847 |
| Short name | T1489 |
| Test name | |
| Test status | |
| Simulation time | 226528444 ps |
| CPU time | 1.35 seconds |
| Started | Aug 29 03:39:03 AM UTC 24 |
| Finished | Aug 29 03:39:06 AM UTC 24 |
| Peak memory | 215016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1983875847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_smoke.1983875847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_spurious_pids_ignored.290161299 |
| Short name | T1535 |
| Test name | |
| Test status | |
| Simulation time | 2495181009 ps |
| CPU time | 16.51 seconds |
| Started | Aug 29 03:39:03 AM UTC 24 |
| Finished | Aug 29 03:39:21 AM UTC 24 |
| Peak memory | 234268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=290161299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 17.usbdev_spurious_pids_ignored.290161299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_stall_priority_over_nak.1927015318 |
| Short name | T1487 |
| Test name | |
| Test status | |
| Simulation time | 241124682 ps |
| CPU time | 1 seconds |
| Started | Aug 29 03:39:03 AM UTC 24 |
| Finished | Aug 29 03:39:05 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1927015318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_stall_priority_over_nak.1927015318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_stall_trans.1752081316 |
| Short name | T1488 |
| Test name | |
| Test status | |
| Simulation time | 190998767 ps |
| CPU time | 1.07 seconds |
| Started | Aug 29 03:39:03 AM UTC 24 |
| Finished | Aug 29 03:39:05 AM UTC 24 |
| Peak memory | 215020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1752081316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_stall_trans.1752081316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_stream_len_max.489112172 |
| Short name | T1499 |
| Test name | |
| Test status | |
| Simulation time | 1262653618 ps |
| CPU time | 3.38 seconds |
| Started | Aug 29 03:39:03 AM UTC 24 |
| Finished | Aug 29 03:39:08 AM UTC 24 |
| Peak memory | 217264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=489112172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 17.usbdev_stream_len_max.489112172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_streaming_out.3118885043 |
| Short name | T1629 |
| Test name | |
| Test status | |
| Simulation time | 2602631808 ps |
| CPU time | 63.6 seconds |
| Started | Aug 29 03:39:03 AM UTC 24 |
| Finished | Aug 29 03:40:09 AM UTC 24 |
| Peak memory | 227576 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3118885043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_streaming_out.3118885043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_timeout_missing_host_handshake.3453683298 |
| Short name | T1502 |
| Test name | |
| Test status | |
| Simulation time | 1491871480 ps |
| CPU time | 27.84 seconds |
| Started | Aug 29 03:38:42 AM UTC 24 |
| Finished | Aug 29 03:39:11 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3453683298 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_timeout_missing_host_handshake.3453683298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/17.usbdev_tx_rx_disruption.1944430827 |
| Short name | T1496 |
| Test name | |
| Test status | |
| Simulation time | 668370435 ps |
| CPU time | 1.96 seconds |
| Started | Aug 29 03:39:03 AM UTC 24 |
| Finished | Aug 29 03:39:07 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1944430827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_t x_rx_disruption.1944430827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/17.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/170.usbdev_endpoint_types.67166013 |
| Short name | T568 |
| Test name | |
| Test status | |
| Simulation time | 356950750 ps |
| CPU time | 1.14 seconds |
| Started | Aug 29 04:08:59 AM UTC 24 |
| Finished | Aug 29 04:09:01 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=67166013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 170.usbdev_endpoint_types.67166013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/170.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/170.usbdev_tx_rx_disruption.4162425925 |
| Short name | T3470 |
| Test name | |
| Test status | |
| Simulation time | 594689020 ps |
| CPU time | 1.81 seconds |
| Started | Aug 29 04:08:59 AM UTC 24 |
| Finished | Aug 29 04:09:02 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4162425925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 170.usbdev_ tx_rx_disruption.4162425925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/170.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/171.usbdev_endpoint_types.3595655016 |
| Short name | T3454 |
| Test name | |
| Test status | |
| Simulation time | 318263663 ps |
| CPU time | 1.17 seconds |
| Started | Aug 29 04:08:59 AM UTC 24 |
| Finished | Aug 29 04:09:01 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3595655016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 171.usbdev_endpoint_types.3595655016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/171.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/171.usbdev_tx_rx_disruption.717200085 |
| Short name | T3463 |
| Test name | |
| Test status | |
| Simulation time | 511226588 ps |
| CPU time | 1.39 seconds |
| Started | Aug 29 04:08:59 AM UTC 24 |
| Finished | Aug 29 04:09:02 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=717200085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 171.usbdev_t x_rx_disruption.717200085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/171.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/172.usbdev_endpoint_types.3627102084 |
| Short name | T3455 |
| Test name | |
| Test status | |
| Simulation time | 236845596 ps |
| CPU time | 1.22 seconds |
| Started | Aug 29 04:08:59 AM UTC 24 |
| Finished | Aug 29 04:09:01 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3627102084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 172.usbdev_endpoint_types.3627102084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/172.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/172.usbdev_tx_rx_disruption.3767605993 |
| Short name | T3467 |
| Test name | |
| Test status | |
| Simulation time | 500738453 ps |
| CPU time | 1.58 seconds |
| Started | Aug 29 04:08:59 AM UTC 24 |
| Finished | Aug 29 04:09:02 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3767605993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 172.usbdev_ tx_rx_disruption.3767605993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/172.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/173.usbdev_endpoint_types.2476598533 |
| Short name | T518 |
| Test name | |
| Test status | |
| Simulation time | 481384319 ps |
| CPU time | 1.37 seconds |
| Started | Aug 29 04:08:59 AM UTC 24 |
| Finished | Aug 29 04:09:01 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2476598533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 173.usbdev_endpoint_types.2476598533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/173.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/173.usbdev_tx_rx_disruption.4181808612 |
| Short name | T3471 |
| Test name | |
| Test status | |
| Simulation time | 581487423 ps |
| CPU time | 1.75 seconds |
| Started | Aug 29 04:08:59 AM UTC 24 |
| Finished | Aug 29 04:09:02 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4181808612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 173.usbdev_ tx_rx_disruption.4181808612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/173.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/174.usbdev_tx_rx_disruption.21647038 |
| Short name | T3468 |
| Test name | |
| Test status | |
| Simulation time | 476813528 ps |
| CPU time | 1.47 seconds |
| Started | Aug 29 04:08:59 AM UTC 24 |
| Finished | Aug 29 04:09:02 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=21647038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 174.usbdev_tx _rx_disruption.21647038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/174.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/175.usbdev_tx_rx_disruption.3416717727 |
| Short name | T3464 |
| Test name | |
| Test status | |
| Simulation time | 517300151 ps |
| CPU time | 1.38 seconds |
| Started | Aug 29 04:08:59 AM UTC 24 |
| Finished | Aug 29 04:09:02 AM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3416717727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 175.usbdev_ tx_rx_disruption.3416717727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/175.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/176.usbdev_endpoint_types.4162910843 |
| Short name | T3457 |
| Test name | |
| Test status | |
| Simulation time | 322772143 ps |
| CPU time | 1.06 seconds |
| Started | Aug 29 04:08:59 AM UTC 24 |
| Finished | Aug 29 04:09:01 AM UTC 24 |
| Peak memory | 214948 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4162910843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 176.usbdev_endpoint_types.4162910843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/176.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/176.usbdev_tx_rx_disruption.4234302906 |
| Short name | T3465 |
| Test name | |
| Test status | |
| Simulation time | 502656034 ps |
| CPU time | 1.38 seconds |
| Started | Aug 29 04:08:59 AM UTC 24 |
| Finished | Aug 29 04:09:02 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4234302906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 176.usbdev_ tx_rx_disruption.4234302906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/176.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/177.usbdev_endpoint_types.331661632 |
| Short name | T3458 |
| Test name | |
| Test status | |
| Simulation time | 256371355 ps |
| CPU time | 0.94 seconds |
| Started | Aug 29 04:08:59 AM UTC 24 |
| Finished | Aug 29 04:09:01 AM UTC 24 |
| Peak memory | 214916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=331661632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 177.usbdev_endpoint_types.331661632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/177.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/177.usbdev_tx_rx_disruption.1339436885 |
| Short name | T3476 |
| Test name | |
| Test status | |
| Simulation time | 476936790 ps |
| CPU time | 1.71 seconds |
| Started | Aug 29 04:08:59 AM UTC 24 |
| Finished | Aug 29 04:09:02 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1339436885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 177.usbdev_ tx_rx_disruption.1339436885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/177.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/178.usbdev_endpoint_types.1437574369 |
| Short name | T527 |
| Test name | |
| Test status | |
| Simulation time | 637337967 ps |
| CPU time | 1.41 seconds |
| Started | Aug 29 04:08:59 AM UTC 24 |
| Finished | Aug 29 04:09:02 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1437574369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 178.usbdev_endpoint_types.1437574369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/178.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/178.usbdev_tx_rx_disruption.2877829542 |
| Short name | T3474 |
| Test name | |
| Test status | |
| Simulation time | 578269229 ps |
| CPU time | 1.69 seconds |
| Started | Aug 29 04:08:59 AM UTC 24 |
| Finished | Aug 29 04:09:02 AM UTC 24 |
| Peak memory | 214976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2877829542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 178.usbdev_ tx_rx_disruption.2877829542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/178.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/179.usbdev_endpoint_types.254642103 |
| Short name | T3442 |
| Test name | |
| Test status | |
| Simulation time | 414450954 ps |
| CPU time | 1.44 seconds |
| Started | Aug 29 04:08:59 AM UTC 24 |
| Finished | Aug 29 04:09:02 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=254642103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 179.usbdev_endpoint_types.254642103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/179.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/179.usbdev_tx_rx_disruption.1102927111 |
| Short name | T3475 |
| Test name | |
| Test status | |
| Simulation time | 530945681 ps |
| CPU time | 1.55 seconds |
| Started | Aug 29 04:08:59 AM UTC 24 |
| Finished | Aug 29 04:09:02 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1102927111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 179.usbdev_ tx_rx_disruption.1102927111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/179.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_alert_test.4145063952 |
| Short name | T1551 |
| Test name | |
| Test status | |
| Simulation time | 68558032 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 03:39:32 AM UTC 24 |
| Finished | Aug 29 03:39:34 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4145063952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 18.usbdev_alert_test.4145063952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_disconnect.2588675702 |
| Short name | T1503 |
| Test name | |
| Test status | |
| Simulation time | 5165459108 ps |
| CPU time | 6.87 seconds |
| Started | Aug 29 03:39:04 AM UTC 24 |
| Finished | Aug 29 03:39:12 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2588675702 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_disconnect.2588675702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_reset.1076662224 |
| Short name | T1537 |
| Test name | |
| Test status | |
| Simulation time | 13751518296 ps |
| CPU time | 17.29 seconds |
| Started | Aug 29 03:39:04 AM UTC 24 |
| Finished | Aug 29 03:39:22 AM UTC 24 |
| Peak memory | 227476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1076662224 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_reset.1076662224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_resume.487426413 |
| Short name | T1543 |
| Test name | |
| Test status | |
| Simulation time | 23487869663 ps |
| CPU time | 26.66 seconds |
| Started | Aug 29 03:39:04 AM UTC 24 |
| Finished | Aug 29 03:39:32 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=487426413 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_resume.487426413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_av_buffer.2556163334 |
| Short name | T1490 |
| Test name | |
| Test status | |
| Simulation time | 144303639 ps |
| CPU time | 0.98 seconds |
| Started | Aug 29 03:39:04 AM UTC 24 |
| Finished | Aug 29 03:39:06 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2556163334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_av_buffer.2556163334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_bitstuff_err.1887451514 |
| Short name | T1491 |
| Test name | |
| Test status | |
| Simulation time | 142456448 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 03:39:04 AM UTC 24 |
| Finished | Aug 29 03:39:06 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1887451514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_bitstuff_err.1887451514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_data_toggle_clear.2256756376 |
| Short name | T1493 |
| Test name | |
| Test status | |
| Simulation time | 165668073 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 03:39:04 AM UTC 24 |
| Finished | Aug 29 03:39:06 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2256756376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 18.usbdev_data_toggle_clear.2256756376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_data_toggle_restore.240141342 |
| Short name | T632 |
| Test name | |
| Test status | |
| Simulation time | 944666890 ps |
| CPU time | 2.54 seconds |
| Started | Aug 29 03:39:04 AM UTC 24 |
| Finished | Aug 29 03:39:07 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=240141342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_data_toggle_restore.240141342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_device_address.1347341236 |
| Short name | T1595 |
| Test name | |
| Test status | |
| Simulation time | 26569252884 ps |
| CPU time | 44.91 seconds |
| Started | Aug 29 03:39:04 AM UTC 24 |
| Finished | Aug 29 03:39:50 AM UTC 24 |
| Peak memory | 217496 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1347341236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_device_address.1347341236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_device_timeout.2572603554 |
| Short name | T1536 |
| Test name | |
| Test status | |
| Simulation time | 992791116 ps |
| CPU time | 16.09 seconds |
| Started | Aug 29 03:39:04 AM UTC 24 |
| Finished | Aug 29 03:39:21 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2572603554 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_device_timeout.2572603554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_disable_endpoint.1324462142 |
| Short name | T1497 |
| Test name | |
| Test status | |
| Simulation time | 661567170 ps |
| CPU time | 1.82 seconds |
| Started | Aug 29 03:39:04 AM UTC 24 |
| Finished | Aug 29 03:39:07 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1324462142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 18.usbdev_disable_endpoint.1324462142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_disconnected.2552788816 |
| Short name | T1494 |
| Test name | |
| Test status | |
| Simulation time | 136016635 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 03:39:04 AM UTC 24 |
| Finished | Aug 29 03:39:06 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2552788816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_disconnected.2552788816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_enable.3865899519 |
| Short name | T1495 |
| Test name | |
| Test status | |
| Simulation time | 38067734 ps |
| CPU time | 0.9 seconds |
| Started | Aug 29 03:39:04 AM UTC 24 |
| Finished | Aug 29 03:39:06 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3865899519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 18.usbdev_enable.3865899519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_endpoint_access.3116210165 |
| Short name | T1498 |
| Test name | |
| Test status | |
| Simulation time | 929666188 ps |
| CPU time | 2.4 seconds |
| Started | Aug 29 03:39:04 AM UTC 24 |
| Finished | Aug 29 03:39:08 AM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3116210165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_endpoint_access.3116210165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_endpoint_types.1792098371 |
| Short name | T475 |
| Test name | |
| Test status | |
| Simulation time | 408640158 ps |
| CPU time | 1.29 seconds |
| Started | Aug 29 03:39:04 AM UTC 24 |
| Finished | Aug 29 03:39:07 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1792098371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_endpoint_types.1792098371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_fifo_levels.4231989821 |
| Short name | T354 |
| Test name | |
| Test status | |
| Simulation time | 148857953 ps |
| CPU time | 1.01 seconds |
| Started | Aug 29 03:39:04 AM UTC 24 |
| Finished | Aug 29 03:39:06 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4231989821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_fifo_levels.4231989821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_fifo_rst.378129179 |
| Short name | T1534 |
| Test name | |
| Test status | |
| Simulation time | 342670136 ps |
| CPU time | 2.61 seconds |
| Started | Aug 29 03:39:17 AM UTC 24 |
| Finished | Aug 29 03:39:21 AM UTC 24 |
| Peak memory | 217088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=378129179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 18.usbdev_fifo_rst.378129179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_in_iso.3413091988 |
| Short name | T1522 |
| Test name | |
| Test status | |
| Simulation time | 240939639 ps |
| CPU time | 1.75 seconds |
| Started | Aug 29 03:39:17 AM UTC 24 |
| Finished | Aug 29 03:39:20 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3413091988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 18.usbdev_in_iso.3413091988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_in_stall.3299453590 |
| Short name | T1509 |
| Test name | |
| Test status | |
| Simulation time | 146481600 ps |
| CPU time | 1.06 seconds |
| Started | Aug 29 03:39:17 AM UTC 24 |
| Finished | Aug 29 03:39:19 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3299453590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_in_stall.3299453590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_in_trans.374859217 |
| Short name | T1510 |
| Test name | |
| Test status | |
| Simulation time | 226569482 ps |
| CPU time | 1.06 seconds |
| Started | Aug 29 03:39:17 AM UTC 24 |
| Finished | Aug 29 03:39:19 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=374859217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 18.usbdev_in_trans.374859217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_invalid_sync.998580059 |
| Short name | T1710 |
| Test name | |
| Test status | |
| Simulation time | 3945552123 ps |
| CPU time | 96.84 seconds |
| Started | Aug 29 03:39:17 AM UTC 24 |
| Finished | Aug 29 03:40:56 AM UTC 24 |
| Peak memory | 234324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=998580059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 18.usbdev_invalid_sync.998580059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_iso_retraction.2464298738 |
| Short name | T1704 |
| Test name | |
| Test status | |
| Simulation time | 14270425911 ps |
| CPU time | 86.24 seconds |
| Started | Aug 29 03:39:17 AM UTC 24 |
| Finished | Aug 29 03:40:45 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2464298738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_iso_retraction.2464298738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_link_in_err.228218214 |
| Short name | T1511 |
| Test name | |
| Test status | |
| Simulation time | 229371545 ps |
| CPU time | 1.09 seconds |
| Started | Aug 29 03:39:17 AM UTC 24 |
| Finished | Aug 29 03:39:19 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=228218214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_link_in_err.228218214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_link_resume.2614928322 |
| Short name | T1541 |
| Test name | |
| Test status | |
| Simulation time | 8521398169 ps |
| CPU time | 12.31 seconds |
| Started | Aug 29 03:39:17 AM UTC 24 |
| Finished | Aug 29 03:39:31 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2614928322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_link_resume.2614928322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_link_suspend.3971760382 |
| Short name | T1539 |
| Test name | |
| Test status | |
| Simulation time | 5236117622 ps |
| CPU time | 7.23 seconds |
| Started | Aug 29 03:39:17 AM UTC 24 |
| Finished | Aug 29 03:39:26 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3971760382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_link_suspend.3971760382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_low_speed_traffic.2504797299 |
| Short name | T1784 |
| Test name | |
| Test status | |
| Simulation time | 5383309479 ps |
| CPU time | 127.39 seconds |
| Started | Aug 29 03:39:17 AM UTC 24 |
| Finished | Aug 29 03:41:27 AM UTC 24 |
| Peak memory | 234336 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2504797299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_low_speed_traffic.2504797299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_max_inter_pkt_delay.3295177350 |
| Short name | T1603 |
| Test name | |
| Test status | |
| Simulation time | 4321095847 ps |
| CPU time | 37.49 seconds |
| Started | Aug 29 03:39:17 AM UTC 24 |
| Finished | Aug 29 03:39:56 AM UTC 24 |
| Peak memory | 227564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3295177350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_inter_pkt_delay.3295177350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_max_length_in_transaction.2485033848 |
| Short name | T1514 |
| Test name | |
| Test status | |
| Simulation time | 269505039 ps |
| CPU time | 0.97 seconds |
| Started | Aug 29 03:39:17 AM UTC 24 |
| Finished | Aug 29 03:39:19 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2485033848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 18.usbdev_max_length_in_transaction.2485033848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_max_length_out_transaction.1838124139 |
| Short name | T1525 |
| Test name | |
| Test status | |
| Simulation time | 213994571 ps |
| CPU time | 1.4 seconds |
| Started | Aug 29 03:39:17 AM UTC 24 |
| Finished | Aug 29 03:39:20 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1838124139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 18.usbdev_max_length_out_transaction.1838124139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_max_non_iso_usb_traffic.2751166420 |
| Short name | T1571 |
| Test name | |
| Test status | |
| Simulation time | 3532007850 ps |
| CPU time | 23.91 seconds |
| Started | Aug 29 03:39:17 AM UTC 24 |
| Finished | Aug 29 03:39:43 AM UTC 24 |
| Peak memory | 227516 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2751166420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_non_iso_usb_traffic.2751166420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_min_inter_pkt_delay.2760443594 |
| Short name | T1711 |
| Test name | |
| Test status | |
| Simulation time | 3901629651 ps |
| CPU time | 96.86 seconds |
| Started | Aug 29 03:39:17 AM UTC 24 |
| Finished | Aug 29 03:40:56 AM UTC 24 |
| Peak memory | 227728 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2760443594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_min_inter_pkt_delay.2760443594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_min_length_in_transaction.2222886390 |
| Short name | T1512 |
| Test name | |
| Test status | |
| Simulation time | 149678578 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:39:18 AM UTC 24 |
| Finished | Aug 29 03:39:19 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2222886390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 18.usbdev_min_length_in_transaction.2222886390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_min_length_out_transaction.1882118796 |
| Short name | T1518 |
| Test name | |
| Test status | |
| Simulation time | 161231408 ps |
| CPU time | 1.19 seconds |
| Started | Aug 29 03:39:18 AM UTC 24 |
| Finished | Aug 29 03:39:20 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1882118796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 18.usbdev_min_length_out_transaction.1882118796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_nak_trans.222903693 |
| Short name | T1521 |
| Test name | |
| Test status | |
| Simulation time | 258313748 ps |
| CPU time | 1.09 seconds |
| Started | Aug 29 03:39:18 AM UTC 24 |
| Finished | Aug 29 03:39:20 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=222903693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_nak_trans.222903693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_out_iso.238157743 |
| Short name | T1516 |
| Test name | |
| Test status | |
| Simulation time | 150416515 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:39:18 AM UTC 24 |
| Finished | Aug 29 03:39:20 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=238157743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 18.usbdev_out_iso.238157743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_out_stall.1703155232 |
| Short name | T1526 |
| Test name | |
| Test status | |
| Simulation time | 186282281 ps |
| CPU time | 1.32 seconds |
| Started | Aug 29 03:39:18 AM UTC 24 |
| Finished | Aug 29 03:39:20 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1703155232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_out_stall.1703155232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_out_trans_nak.2114239387 |
| Short name | T1515 |
| Test name | |
| Test status | |
| Simulation time | 163383848 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 03:39:18 AM UTC 24 |
| Finished | Aug 29 03:39:20 AM UTC 24 |
| Peak memory | 214576 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2114239387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 18.usbdev_out_trans_nak.2114239387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_pending_in_trans.2922676952 |
| Short name | T1517 |
| Test name | |
| Test status | |
| Simulation time | 151470068 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 03:39:18 AM UTC 24 |
| Finished | Aug 29 03:39:20 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2922676952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 18.usbdev_pending_in_trans.2922676952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_phy_config_pinflip.816281740 |
| Short name | T1524 |
| Test name | |
| Test status | |
| Simulation time | 214520079 ps |
| CPU time | 1.04 seconds |
| Started | Aug 29 03:39:18 AM UTC 24 |
| Finished | Aug 29 03:39:20 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=816281740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 18.usbdev_phy_config_pinflip.816281740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_phy_config_usb_ref_disable.696309488 |
| Short name | T1520 |
| Test name | |
| Test status | |
| Simulation time | 141959658 ps |
| CPU time | 0.94 seconds |
| Started | Aug 29 03:39:18 AM UTC 24 |
| Finished | Aug 29 03:39:20 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=696309488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 18.usbdev_phy_config_usb_ref_disable.696309488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_phy_pins_sense.513178899 |
| Short name | T1523 |
| Test name | |
| Test status | |
| Simulation time | 78150930 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 03:39:18 AM UTC 24 |
| Finished | Aug 29 03:39:20 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=513178899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 18.usbdev_phy_pins_sense.513178899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_buffer.3886642977 |
| Short name | T1558 |
| Test name | |
| Test status | |
| Simulation time | 6012486501 ps |
| CPU time | 15.9 seconds |
| Started | Aug 29 03:39:18 AM UTC 24 |
| Finished | Aug 29 03:39:35 AM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3886642977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_pkt_buffer.3886642977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_received.2670140714 |
| Short name | T1530 |
| Test name | |
| Test status | |
| Simulation time | 201480147 ps |
| CPU time | 1.19 seconds |
| Started | Aug 29 03:39:18 AM UTC 24 |
| Finished | Aug 29 03:39:20 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2670140714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_pkt_received.2670140714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_sent.1588603616 |
| Short name | T1528 |
| Test name | |
| Test status | |
| Simulation time | 203906787 ps |
| CPU time | 1.18 seconds |
| Started | Aug 29 03:39:18 AM UTC 24 |
| Finished | Aug 29 03:39:20 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1588603616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_pkt_sent.1588603616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_random_length_in_transaction.627523267 |
| Short name | T1527 |
| Test name | |
| Test status | |
| Simulation time | 195388134 ps |
| CPU time | 0.88 seconds |
| Started | Aug 29 03:39:18 AM UTC 24 |
| Finished | Aug 29 03:39:20 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=627523267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_random_length_in_transaction.627523267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_random_length_out_transaction.2143721915 |
| Short name | T1529 |
| Test name | |
| Test status | |
| Simulation time | 196526982 ps |
| CPU time | 1.01 seconds |
| Started | Aug 29 03:39:18 AM UTC 24 |
| Finished | Aug 29 03:39:20 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2143721915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 18.usbdev_random_length_out_transaction.2143721915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_resume_link_active.4234316032 |
| Short name | T1570 |
| Test name | |
| Test status | |
| Simulation time | 20177818326 ps |
| CPU time | 22.65 seconds |
| Started | Aug 29 03:39:18 AM UTC 24 |
| Finished | Aug 29 03:39:42 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4234316032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 18.usbdev_resume_link_active.4234316032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_rx_crc_err.358785934 |
| Short name | T1531 |
| Test name | |
| Test status | |
| Simulation time | 153989490 ps |
| CPU time | 1.11 seconds |
| Started | Aug 29 03:39:18 AM UTC 24 |
| Finished | Aug 29 03:39:20 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=358785934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_rx_crc_err.358785934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_rx_full.2538808324 |
| Short name | T1533 |
| Test name | |
| Test status | |
| Simulation time | 412276345 ps |
| CPU time | 1.49 seconds |
| Started | Aug 29 03:39:18 AM UTC 24 |
| Finished | Aug 29 03:39:21 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2538808324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 18.usbdev_rx_full.2538808324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_setup_stage.674169544 |
| Short name | T1546 |
| Test name | |
| Test status | |
| Simulation time | 203142174 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:39:32 AM UTC 24 |
| Finished | Aug 29 03:39:34 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=674169544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_setup_stage.674169544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_setup_trans_ignored.130124694 |
| Short name | T1544 |
| Test name | |
| Test status | |
| Simulation time | 162041930 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:39:32 AM UTC 24 |
| Finished | Aug 29 03:39:34 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=130124694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 18.usbdev_setup_trans_ignored.130124694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_smoke.3333459729 |
| Short name | T1550 |
| Test name | |
| Test status | |
| Simulation time | 249718828 ps |
| CPU time | 1.06 seconds |
| Started | Aug 29 03:39:32 AM UTC 24 |
| Finished | Aug 29 03:39:34 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3333459729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_smoke.3333459729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_spurious_pids_ignored.1367488570 |
| Short name | T1604 |
| Test name | |
| Test status | |
| Simulation time | 2961758606 ps |
| CPU time | 24.4 seconds |
| Started | Aug 29 03:39:32 AM UTC 24 |
| Finished | Aug 29 03:39:58 AM UTC 24 |
| Peak memory | 234140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1367488570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 18.usbdev_spurious_pids_ignored.1367488570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_stall_priority_over_nak.2721248667 |
| Short name | T1549 |
| Test name | |
| Test status | |
| Simulation time | 207734924 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:39:32 AM UTC 24 |
| Finished | Aug 29 03:39:34 AM UTC 24 |
| Peak memory | 216424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2721248667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_stall_priority_over_nak.2721248667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_stall_trans.2645102664 |
| Short name | T1552 |
| Test name | |
| Test status | |
| Simulation time | 194981823 ps |
| CPU time | 1.08 seconds |
| Started | Aug 29 03:39:32 AM UTC 24 |
| Finished | Aug 29 03:39:34 AM UTC 24 |
| Peak memory | 216416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2645102664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_stall_trans.2645102664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_stream_len_max.1968089962 |
| Short name | T1567 |
| Test name | |
| Test status | |
| Simulation time | 1071044112 ps |
| CPU time | 3.09 seconds |
| Started | Aug 29 03:39:32 AM UTC 24 |
| Finished | Aug 29 03:39:36 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1968089962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_stream_len_max.1968089962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_streaming_out.2500113453 |
| Short name | T1598 |
| Test name | |
| Test status | |
| Simulation time | 2731179733 ps |
| CPU time | 18.06 seconds |
| Started | Aug 29 03:39:32 AM UTC 24 |
| Finished | Aug 29 03:39:51 AM UTC 24 |
| Peak memory | 217356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2500113453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_streaming_out.2500113453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_timeout_missing_host_handshake.134693712 |
| Short name | T1542 |
| Test name | |
| Test status | |
| Simulation time | 1276877642 ps |
| CPU time | 25.57 seconds |
| Started | Aug 29 03:39:04 AM UTC 24 |
| Finished | Aug 29 03:39:31 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=134693712 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_timeout_missing_host_handshake.134693712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/18.usbdev_tx_rx_disruption.1855072053 |
| Short name | T1561 |
| Test name | |
| Test status | |
| Simulation time | 589139995 ps |
| CPU time | 2.04 seconds |
| Started | Aug 29 03:39:32 AM UTC 24 |
| Finished | Aug 29 03:39:35 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1855072053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_t x_rx_disruption.1855072053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/18.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/180.usbdev_endpoint_types.1317977601 |
| Short name | T460 |
| Test name | |
| Test status | |
| Simulation time | 514282739 ps |
| CPU time | 1.41 seconds |
| Started | Aug 29 04:08:59 AM UTC 24 |
| Finished | Aug 29 04:09:02 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1317977601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 180.usbdev_endpoint_types.1317977601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/180.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/180.usbdev_tx_rx_disruption.1932055828 |
| Short name | T3469 |
| Test name | |
| Test status | |
| Simulation time | 487150975 ps |
| CPU time | 1.3 seconds |
| Started | Aug 29 04:08:59 AM UTC 24 |
| Finished | Aug 29 04:09:02 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1932055828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 180.usbdev_ tx_rx_disruption.1932055828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/180.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/181.usbdev_endpoint_types.1288308224 |
| Short name | T3473 |
| Test name | |
| Test status | |
| Simulation time | 471266490 ps |
| CPU time | 1.43 seconds |
| Started | Aug 29 04:08:59 AM UTC 24 |
| Finished | Aug 29 04:09:02 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1288308224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 181.usbdev_endpoint_types.1288308224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/181.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/181.usbdev_tx_rx_disruption.3918306696 |
| Short name | T3472 |
| Test name | |
| Test status | |
| Simulation time | 452265126 ps |
| CPU time | 1.41 seconds |
| Started | Aug 29 04:08:59 AM UTC 24 |
| Finished | Aug 29 04:09:02 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3918306696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 181.usbdev_ tx_rx_disruption.3918306696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/181.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/182.usbdev_endpoint_types.3687419022 |
| Short name | T3460 |
| Test name | |
| Test status | |
| Simulation time | 184037640 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 04:08:59 AM UTC 24 |
| Finished | Aug 29 04:09:02 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3687419022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 182.usbdev_endpoint_types.3687419022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/182.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/182.usbdev_tx_rx_disruption.712320095 |
| Short name | T3477 |
| Test name | |
| Test status | |
| Simulation time | 588102390 ps |
| CPU time | 1.73 seconds |
| Started | Aug 29 04:08:59 AM UTC 24 |
| Finished | Aug 29 04:09:02 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=712320095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 182.usbdev_t x_rx_disruption.712320095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/182.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/183.usbdev_endpoint_types.1101291832 |
| Short name | T3478 |
| Test name | |
| Test status | |
| Simulation time | 696376244 ps |
| CPU time | 1.62 seconds |
| Started | Aug 29 04:09:00 AM UTC 24 |
| Finished | Aug 29 04:09:02 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1101291832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 183.usbdev_endpoint_types.1101291832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/183.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/183.usbdev_tx_rx_disruption.4036112938 |
| Short name | T3480 |
| Test name | |
| Test status | |
| Simulation time | 508653553 ps |
| CPU time | 1.73 seconds |
| Started | Aug 29 04:09:00 AM UTC 24 |
| Finished | Aug 29 04:09:02 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4036112938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 183.usbdev_ tx_rx_disruption.4036112938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/183.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/184.usbdev_endpoint_types.2866059464 |
| Short name | T3466 |
| Test name | |
| Test status | |
| Simulation time | 280329809 ps |
| CPU time | 0.97 seconds |
| Started | Aug 29 04:09:00 AM UTC 24 |
| Finished | Aug 29 04:09:02 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2866059464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 184.usbdev_endpoint_types.2866059464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/184.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/184.usbdev_tx_rx_disruption.3977220891 |
| Short name | T3479 |
| Test name | |
| Test status | |
| Simulation time | 572529637 ps |
| CPU time | 1.59 seconds |
| Started | Aug 29 04:09:00 AM UTC 24 |
| Finished | Aug 29 04:09:02 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3977220891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 184.usbdev_ tx_rx_disruption.3977220891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/184.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/185.usbdev_tx_rx_disruption.2505496724 |
| Short name | T3488 |
| Test name | |
| Test status | |
| Simulation time | 546628148 ps |
| CPU time | 1.54 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2505496724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 185.usbdev_ tx_rx_disruption.2505496724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/185.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/186.usbdev_endpoint_types.3754873408 |
| Short name | T447 |
| Test name | |
| Test status | |
| Simulation time | 407818788 ps |
| CPU time | 1.23 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:20 AM UTC 24 |
| Peak memory | 215812 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3754873408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 186.usbdev_endpoint_types.3754873408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/186.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/186.usbdev_tx_rx_disruption.2163172320 |
| Short name | T3485 |
| Test name | |
| Test status | |
| Simulation time | 641212372 ps |
| CPU time | 1.55 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:20 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2163172320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 186.usbdev_ tx_rx_disruption.2163172320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/186.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/187.usbdev_endpoint_types.1652012065 |
| Short name | T509 |
| Test name | |
| Test status | |
| Simulation time | 503163026 ps |
| CPU time | 1.28 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:20 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1652012065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 187.usbdev_endpoint_types.1652012065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/187.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/187.usbdev_tx_rx_disruption.195669815 |
| Short name | T3487 |
| Test name | |
| Test status | |
| Simulation time | 601639240 ps |
| CPU time | 1.54 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:20 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=195669815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 187.usbdev_t x_rx_disruption.195669815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/187.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/188.usbdev_endpoint_types.3556213988 |
| Short name | T571 |
| Test name | |
| Test status | |
| Simulation time | 756297307 ps |
| CPU time | 1.57 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:20 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3556213988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 188.usbdev_endpoint_types.3556213988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/188.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/188.usbdev_tx_rx_disruption.4012610941 |
| Short name | T3490 |
| Test name | |
| Test status | |
| Simulation time | 625259921 ps |
| CPU time | 1.71 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4012610941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 188.usbdev_ tx_rx_disruption.4012610941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/188.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/189.usbdev_endpoint_types.1767134836 |
| Short name | T577 |
| Test name | |
| Test status | |
| Simulation time | 438266412 ps |
| CPU time | 1.14 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:20 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1767134836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 189.usbdev_endpoint_types.1767134836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/189.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/189.usbdev_tx_rx_disruption.2045077864 |
| Short name | T3489 |
| Test name | |
| Test status | |
| Simulation time | 530068811 ps |
| CPU time | 1.45 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2045077864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 189.usbdev_ tx_rx_disruption.2045077864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/189.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_alert_test.2037134874 |
| Short name | T1611 |
| Test name | |
| Test status | |
| Simulation time | 61735869 ps |
| CPU time | 0.69 seconds |
| Started | Aug 29 03:40:00 AM UTC 24 |
| Finished | Aug 29 03:40:02 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2037134874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 19.usbdev_alert_test.2037134874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_disconnect.953364999 |
| Short name | T1596 |
| Test name | |
| Test status | |
| Simulation time | 11654438356 ps |
| CPU time | 17.04 seconds |
| Started | Aug 29 03:39:32 AM UTC 24 |
| Finished | Aug 29 03:39:51 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=953364999 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_disconnect.953364999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_reset.3041154706 |
| Short name | T1599 |
| Test name | |
| Test status | |
| Simulation time | 13735214643 ps |
| CPU time | 17.88 seconds |
| Started | Aug 29 03:39:32 AM UTC 24 |
| Finished | Aug 29 03:39:51 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3041154706 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_reset.3041154706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_resume.676904272 |
| Short name | T1626 |
| Test name | |
| Test status | |
| Simulation time | 23644061330 ps |
| CPU time | 31.33 seconds |
| Started | Aug 29 03:39:32 AM UTC 24 |
| Finished | Aug 29 03:40:05 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=676904272 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_resume.676904272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_av_buffer.2671248811 |
| Short name | T1556 |
| Test name | |
| Test status | |
| Simulation time | 210141880 ps |
| CPU time | 1.07 seconds |
| Started | Aug 29 03:39:32 AM UTC 24 |
| Finished | Aug 29 03:39:34 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2671248811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_av_buffer.2671248811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_bitstuff_err.2431258773 |
| Short name | T1554 |
| Test name | |
| Test status | |
| Simulation time | 163712653 ps |
| CPU time | 0.92 seconds |
| Started | Aug 29 03:39:32 AM UTC 24 |
| Finished | Aug 29 03:39:34 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2431258773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_bitstuff_err.2431258773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_data_toggle_clear.2326426073 |
| Short name | T1564 |
| Test name | |
| Test status | |
| Simulation time | 423898824 ps |
| CPU time | 2.04 seconds |
| Started | Aug 29 03:39:32 AM UTC 24 |
| Finished | Aug 29 03:39:36 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2326426073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 19.usbdev_data_toggle_clear.2326426073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_data_toggle_restore.2594330230 |
| Short name | T1569 |
| Test name | |
| Test status | |
| Simulation time | 882124459 ps |
| CPU time | 3.12 seconds |
| Started | Aug 29 03:39:32 AM UTC 24 |
| Finished | Aug 29 03:39:37 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2594330230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_data_toggle_restore.2594330230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_device_address.4130388069 |
| Short name | T586 |
| Test name | |
| Test status | |
| Simulation time | 20521908311 ps |
| CPU time | 37.73 seconds |
| Started | Aug 29 03:39:32 AM UTC 24 |
| Finished | Aug 29 03:40:11 AM UTC 24 |
| Peak memory | 217064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4130388069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_device_address.4130388069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_device_timeout.610142352 |
| Short name | T1597 |
| Test name | |
| Test status | |
| Simulation time | 2898612961 ps |
| CPU time | 17.54 seconds |
| Started | Aug 29 03:39:32 AM UTC 24 |
| Finished | Aug 29 03:39:51 AM UTC 24 |
| Peak memory | 217324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=610142352 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_device_timeout.610142352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_disable_endpoint.1455694382 |
| Short name | T1565 |
| Test name | |
| Test status | |
| Simulation time | 844895520 ps |
| CPU time | 1.93 seconds |
| Started | Aug 29 03:39:32 AM UTC 24 |
| Finished | Aug 29 03:39:36 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1455694382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 19.usbdev_disable_endpoint.1455694382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_disconnected.3844659228 |
| Short name | T1557 |
| Test name | |
| Test status | |
| Simulation time | 201829970 ps |
| CPU time | 1.39 seconds |
| Started | Aug 29 03:39:32 AM UTC 24 |
| Finished | Aug 29 03:39:35 AM UTC 24 |
| Peak memory | 214644 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3844659228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_disconnected.3844659228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_enable.3301088140 |
| Short name | T1553 |
| Test name | |
| Test status | |
| Simulation time | 100572341 ps |
| CPU time | 0.71 seconds |
| Started | Aug 29 03:39:32 AM UTC 24 |
| Finished | Aug 29 03:39:34 AM UTC 24 |
| Peak memory | 213480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3301088140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 19.usbdev_enable.3301088140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_endpoint_access.3682560362 |
| Short name | T1568 |
| Test name | |
| Test status | |
| Simulation time | 897422034 ps |
| CPU time | 2.74 seconds |
| Started | Aug 29 03:39:32 AM UTC 24 |
| Finished | Aug 29 03:39:36 AM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3682560362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_endpoint_access.3682560362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_endpoint_types.497506228 |
| Short name | T510 |
| Test name | |
| Test status | |
| Simulation time | 394604526 ps |
| CPU time | 1.21 seconds |
| Started | Aug 29 03:39:32 AM UTC 24 |
| Finished | Aug 29 03:39:35 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=497506228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 19.usbdev_endpoint_types.497506228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_fifo_levels.1873982713 |
| Short name | T370 |
| Test name | |
| Test status | |
| Simulation time | 288166056 ps |
| CPU time | 1.21 seconds |
| Started | Aug 29 03:39:32 AM UTC 24 |
| Finished | Aug 29 03:39:35 AM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1873982713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_fifo_levels.1873982713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_fifo_rst.423935334 |
| Short name | T1566 |
| Test name | |
| Test status | |
| Simulation time | 178917018 ps |
| CPU time | 2.39 seconds |
| Started | Aug 29 03:39:32 AM UTC 24 |
| Finished | Aug 29 03:39:36 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=423935334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 19.usbdev_fifo_rst.423935334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_in_iso.2378530091 |
| Short name | T1559 |
| Test name | |
| Test status | |
| Simulation time | 246313952 ps |
| CPU time | 1.12 seconds |
| Started | Aug 29 03:39:33 AM UTC 24 |
| Finished | Aug 29 03:39:35 AM UTC 24 |
| Peak memory | 227076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2378530091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 19.usbdev_in_iso.2378530091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_in_stall.1508063920 |
| Short name | T1560 |
| Test name | |
| Test status | |
| Simulation time | 156800942 ps |
| CPU time | 1.24 seconds |
| Started | Aug 29 03:39:33 AM UTC 24 |
| Finished | Aug 29 03:39:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1508063920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_in_stall.1508063920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_in_trans.1768037063 |
| Short name | T1563 |
| Test name | |
| Test status | |
| Simulation time | 226075888 ps |
| CPU time | 1.34 seconds |
| Started | Aug 29 03:39:33 AM UTC 24 |
| Finished | Aug 29 03:39:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1768037063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_in_trans.1768037063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_invalid_sync.34874468 |
| Short name | T1605 |
| Test name | |
| Test status | |
| Simulation time | 2707020222 ps |
| CPU time | 23.56 seconds |
| Started | Aug 29 03:39:33 AM UTC 24 |
| Finished | Aug 29 03:39:58 AM UTC 24 |
| Peak memory | 234028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=34874468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traf fic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 19.usbdev_invalid_sync.34874468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_iso_retraction.1416023939 |
| Short name | T1653 |
| Test name | |
| Test status | |
| Simulation time | 4396993073 ps |
| CPU time | 47.65 seconds |
| Started | Aug 29 03:39:33 AM UTC 24 |
| Finished | Aug 29 03:40:22 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1416023939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_iso_retraction.1416023939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_link_in_err.880783107 |
| Short name | T1562 |
| Test name | |
| Test status | |
| Simulation time | 251347195 ps |
| CPU time | 1.34 seconds |
| Started | Aug 29 03:39:33 AM UTC 24 |
| Finished | Aug 29 03:39:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=880783107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_link_in_err.880783107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_link_resume.1148992242 |
| Short name | T1658 |
| Test name | |
| Test status | |
| Simulation time | 31683951100 ps |
| CPU time | 48.3 seconds |
| Started | Aug 29 03:39:33 AM UTC 24 |
| Finished | Aug 29 03:40:23 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1148992242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_link_resume.1148992242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_link_suspend.3449208732 |
| Short name | T1607 |
| Test name | |
| Test status | |
| Simulation time | 10449174279 ps |
| CPU time | 12.73 seconds |
| Started | Aug 29 03:39:46 AM UTC 24 |
| Finished | Aug 29 03:40:00 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3449208732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_link_suspend.3449208732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_low_speed_traffic.3567248175 |
| Short name | T1706 |
| Test name | |
| Test status | |
| Simulation time | 2740981547 ps |
| CPU time | 64.64 seconds |
| Started | Aug 29 03:39:46 AM UTC 24 |
| Finished | Aug 29 03:40:52 AM UTC 24 |
| Peak memory | 229592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3567248175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_low_speed_traffic.3567248175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_max_inter_pkt_delay.347048612 |
| Short name | T1636 |
| Test name | |
| Test status | |
| Simulation time | 3415970321 ps |
| CPU time | 28.57 seconds |
| Started | Aug 29 03:39:46 AM UTC 24 |
| Finished | Aug 29 03:40:16 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=347048612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_inter_pkt_delay.347048612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_max_length_in_transaction.189354720 |
| Short name | T1574 |
| Test name | |
| Test status | |
| Simulation time | 284169291 ps |
| CPU time | 1.12 seconds |
| Started | Aug 29 03:39:46 AM UTC 24 |
| Finished | Aug 29 03:39:48 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=189354720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 19.usbdev_max_length_in_transaction.189354720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_max_length_out_transaction.2068965260 |
| Short name | T1572 |
| Test name | |
| Test status | |
| Simulation time | 203602523 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 03:39:46 AM UTC 24 |
| Finished | Aug 29 03:39:48 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2068965260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 19.usbdev_max_length_out_transaction.2068965260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_max_non_iso_usb_traffic.326589793 |
| Short name | T1606 |
| Test name | |
| Test status | |
| Simulation time | 1742302380 ps |
| CPU time | 11.94 seconds |
| Started | Aug 29 03:39:46 AM UTC 24 |
| Finished | Aug 29 03:39:59 AM UTC 24 |
| Peak memory | 227560 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=326589793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_non_iso_usb_traffic.326589793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_min_inter_pkt_delay.4044773610 |
| Short name | T1627 |
| Test name | |
| Test status | |
| Simulation time | 2744292420 ps |
| CPU time | 19.04 seconds |
| Started | Aug 29 03:39:46 AM UTC 24 |
| Finished | Aug 29 03:40:07 AM UTC 24 |
| Peak memory | 229600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4044773610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_min_inter_pkt_delay.4044773610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_min_length_in_transaction.2755659040 |
| Short name | T1575 |
| Test name | |
| Test status | |
| Simulation time | 199432934 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 03:39:46 AM UTC 24 |
| Finished | Aug 29 03:39:48 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2755659040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 19.usbdev_min_length_in_transaction.2755659040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_min_length_out_transaction.2940448593 |
| Short name | T1578 |
| Test name | |
| Test status | |
| Simulation time | 224832350 ps |
| CPU time | 1.24 seconds |
| Started | Aug 29 03:39:46 AM UTC 24 |
| Finished | Aug 29 03:39:49 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2940448593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 19.usbdev_min_length_out_transaction.2940448593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_out_iso.2644638166 |
| Short name | T1576 |
| Test name | |
| Test status | |
| Simulation time | 178677333 ps |
| CPU time | 0.92 seconds |
| Started | Aug 29 03:39:46 AM UTC 24 |
| Finished | Aug 29 03:39:48 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2644638166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 19.usbdev_out_iso.2644638166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_out_stall.2520498122 |
| Short name | T1579 |
| Test name | |
| Test status | |
| Simulation time | 147849912 ps |
| CPU time | 1.2 seconds |
| Started | Aug 29 03:39:46 AM UTC 24 |
| Finished | Aug 29 03:39:49 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2520498122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_out_stall.2520498122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_out_trans_nak.1307972435 |
| Short name | T1577 |
| Test name | |
| Test status | |
| Simulation time | 189824933 ps |
| CPU time | 0.92 seconds |
| Started | Aug 29 03:39:46 AM UTC 24 |
| Finished | Aug 29 03:39:48 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1307972435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 19.usbdev_out_trans_nak.1307972435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_pending_in_trans.4113715212 |
| Short name | T1581 |
| Test name | |
| Test status | |
| Simulation time | 187713102 ps |
| CPU time | 1.22 seconds |
| Started | Aug 29 03:39:46 AM UTC 24 |
| Finished | Aug 29 03:39:49 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4113715212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 19.usbdev_pending_in_trans.4113715212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_phy_config_pinflip.3215402821 |
| Short name | T1583 |
| Test name | |
| Test status | |
| Simulation time | 274185077 ps |
| CPU time | 1.22 seconds |
| Started | Aug 29 03:39:46 AM UTC 24 |
| Finished | Aug 29 03:39:49 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3215402821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 19.usbdev_phy_config_pinflip.3215402821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_phy_config_usb_ref_disable.3824877977 |
| Short name | T1580 |
| Test name | |
| Test status | |
| Simulation time | 147967176 ps |
| CPU time | 0.95 seconds |
| Started | Aug 29 03:39:46 AM UTC 24 |
| Finished | Aug 29 03:39:49 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3824877977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 19.usbdev_phy_config_usb_ref_disable.3824877977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_phy_pins_sense.2332333813 |
| Short name | T40 |
| Test name | |
| Test status | |
| Simulation time | 88932045 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 03:39:46 AM UTC 24 |
| Finished | Aug 29 03:39:48 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2332333813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_phy_pins_sense.2332333813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_buffer.1872252578 |
| Short name | T1670 |
| Test name | |
| Test status | |
| Simulation time | 21557347375 ps |
| CPU time | 53.28 seconds |
| Started | Aug 29 03:39:46 AM UTC 24 |
| Finished | Aug 29 03:40:41 AM UTC 24 |
| Peak memory | 227668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1872252578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_pkt_buffer.1872252578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_received.1571343340 |
| Short name | T1585 |
| Test name | |
| Test status | |
| Simulation time | 209884323 ps |
| CPU time | 1.42 seconds |
| Started | Aug 29 03:39:46 AM UTC 24 |
| Finished | Aug 29 03:39:49 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1571343340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_pkt_received.1571343340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_sent.3799745309 |
| Short name | T1582 |
| Test name | |
| Test status | |
| Simulation time | 233400050 ps |
| CPU time | 1.1 seconds |
| Started | Aug 29 03:39:46 AM UTC 24 |
| Finished | Aug 29 03:39:49 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3799745309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_pkt_sent.3799745309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_random_length_in_transaction.3665253626 |
| Short name | T1591 |
| Test name | |
| Test status | |
| Simulation time | 241665753 ps |
| CPU time | 1.75 seconds |
| Started | Aug 29 03:39:46 AM UTC 24 |
| Finished | Aug 29 03:39:49 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3665253626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 19.usbdev_random_length_in_transaction.3665253626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_random_length_out_transaction.3647960821 |
| Short name | T1588 |
| Test name | |
| Test status | |
| Simulation time | 166494821 ps |
| CPU time | 1.41 seconds |
| Started | Aug 29 03:39:46 AM UTC 24 |
| Finished | Aug 29 03:39:49 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3647960821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 19.usbdev_random_length_out_transaction.3647960821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_resume_link_active.309368501 |
| Short name | T1637 |
| Test name | |
| Test status | |
| Simulation time | 20155990286 ps |
| CPU time | 29.03 seconds |
| Started | Aug 29 03:39:46 AM UTC 24 |
| Finished | Aug 29 03:40:17 AM UTC 24 |
| Peak memory | 217348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=309368501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 19.usbdev_resume_link_active.309368501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_rx_crc_err.2874780458 |
| Short name | T1589 |
| Test name | |
| Test status | |
| Simulation time | 199241698 ps |
| CPU time | 1.37 seconds |
| Started | Aug 29 03:39:46 AM UTC 24 |
| Finished | Aug 29 03:39:49 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2874780458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_rx_crc_err.2874780458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_rx_full.1944337255 |
| Short name | T1590 |
| Test name | |
| Test status | |
| Simulation time | 407755133 ps |
| CPU time | 1.52 seconds |
| Started | Aug 29 03:39:46 AM UTC 24 |
| Finished | Aug 29 03:39:49 AM UTC 24 |
| Peak memory | 217040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1944337255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 19.usbdev_rx_full.1944337255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_setup_stage.1293967099 |
| Short name | T1584 |
| Test name | |
| Test status | |
| Simulation time | 155528991 ps |
| CPU time | 1.12 seconds |
| Started | Aug 29 03:39:47 AM UTC 24 |
| Finished | Aug 29 03:39:49 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1293967099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_setup_stage.1293967099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_setup_trans_ignored.2475312225 |
| Short name | T1587 |
| Test name | |
| Test status | |
| Simulation time | 229469771 ps |
| CPU time | 1.27 seconds |
| Started | Aug 29 03:39:47 AM UTC 24 |
| Finished | Aug 29 03:39:49 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2475312225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 19.usbdev_setup_trans_ignored.2475312225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_smoke.4285957267 |
| Short name | T1593 |
| Test name | |
| Test status | |
| Simulation time | 284127020 ps |
| CPU time | 1.59 seconds |
| Started | Aug 29 03:39:47 AM UTC 24 |
| Finished | Aug 29 03:39:49 AM UTC 24 |
| Peak memory | 214708 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4285957267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_smoke.4285957267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_spurious_pids_ignored.4274533139 |
| Short name | T1628 |
| Test name | |
| Test status | |
| Simulation time | 3017310871 ps |
| CPU time | 20.17 seconds |
| Started | Aug 29 03:39:47 AM UTC 24 |
| Finished | Aug 29 03:40:08 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4274533139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 19.usbdev_spurious_pids_ignored.4274533139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_stall_priority_over_nak.1667828445 |
| Short name | T1586 |
| Test name | |
| Test status | |
| Simulation time | 178139446 ps |
| CPU time | 1.08 seconds |
| Started | Aug 29 03:39:47 AM UTC 24 |
| Finished | Aug 29 03:39:49 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1667828445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_stall_priority_over_nak.1667828445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_stall_trans.3622936071 |
| Short name | T1592 |
| Test name | |
| Test status | |
| Simulation time | 206171666 ps |
| CPU time | 1.34 seconds |
| Started | Aug 29 03:39:47 AM UTC 24 |
| Finished | Aug 29 03:39:49 AM UTC 24 |
| Peak memory | 215032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3622936071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_stall_trans.3622936071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_stream_len_max.1312099023 |
| Short name | T1622 |
| Test name | |
| Test status | |
| Simulation time | 916449497 ps |
| CPU time | 2.53 seconds |
| Started | Aug 29 03:40:00 AM UTC 24 |
| Finished | Aug 29 03:40:04 AM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1312099023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_stream_len_max.1312099023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_streaming_out.432131733 |
| Short name | T1630 |
| Test name | |
| Test status | |
| Simulation time | 2380083084 ps |
| CPU time | 20.71 seconds |
| Started | Aug 29 03:39:47 AM UTC 24 |
| Finished | Aug 29 03:40:09 AM UTC 24 |
| Peak memory | 234076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=432131733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_streaming_out.432131733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_timeout_missing_host_handshake.1787106147 |
| Short name | T1608 |
| Test name | |
| Test status | |
| Simulation time | 3402316499 ps |
| CPU time | 26.36 seconds |
| Started | Aug 29 03:39:32 AM UTC 24 |
| Finished | Aug 29 03:40:00 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1787106147 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_timeout_missing_host_handshake.1787106147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/19.usbdev_tx_rx_disruption.1997410496 |
| Short name | T1618 |
| Test name | |
| Test status | |
| Simulation time | 446070443 ps |
| CPU time | 1.66 seconds |
| Started | Aug 29 03:40:00 AM UTC 24 |
| Finished | Aug 29 03:40:03 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1997410496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_t x_rx_disruption.1997410496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/19.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/190.usbdev_endpoint_types.4086048478 |
| Short name | T3482 |
| Test name | |
| Test status | |
| Simulation time | 280885180 ps |
| CPU time | 0.97 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:20 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4086048478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 190.usbdev_endpoint_types.4086048478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/190.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/190.usbdev_tx_rx_disruption.1504124840 |
| Short name | T3497 |
| Test name | |
| Test status | |
| Simulation time | 546795670 ps |
| CPU time | 1.56 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:21 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1504124840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 190.usbdev_ tx_rx_disruption.1504124840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/190.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/191.usbdev_tx_rx_disruption.1553389204 |
| Short name | T3494 |
| Test name | |
| Test status | |
| Simulation time | 477663630 ps |
| CPU time | 1.36 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1553389204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 191.usbdev_ tx_rx_disruption.1553389204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/191.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/192.usbdev_endpoint_types.2579375014 |
| Short name | T3483 |
| Test name | |
| Test status | |
| Simulation time | 184199237 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:20 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2579375014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 192.usbdev_endpoint_types.2579375014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/192.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/192.usbdev_tx_rx_disruption.3714599447 |
| Short name | T3498 |
| Test name | |
| Test status | |
| Simulation time | 651134742 ps |
| CPU time | 1.58 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:21 AM UTC 24 |
| Peak memory | 216500 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3714599447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 192.usbdev_ tx_rx_disruption.3714599447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/192.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/193.usbdev_endpoint_types.3338734944 |
| Short name | T3492 |
| Test name | |
| Test status | |
| Simulation time | 420499031 ps |
| CPU time | 1.27 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3338734944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 193.usbdev_endpoint_types.3338734944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/193.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/193.usbdev_tx_rx_disruption.2532500067 |
| Short name | T3493 |
| Test name | |
| Test status | |
| Simulation time | 495958811 ps |
| CPU time | 1.31 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:21 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2532500067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 193.usbdev_ tx_rx_disruption.2532500067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/193.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/194.usbdev_endpoint_types.2281603560 |
| Short name | T3484 |
| Test name | |
| Test status | |
| Simulation time | 290168365 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:20 AM UTC 24 |
| Peak memory | 216680 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2281603560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 194.usbdev_endpoint_types.2281603560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/194.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/194.usbdev_tx_rx_disruption.1744325087 |
| Short name | T3491 |
| Test name | |
| Test status | |
| Simulation time | 468629506 ps |
| CPU time | 1.43 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1744325087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 194.usbdev_ tx_rx_disruption.1744325087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/194.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/195.usbdev_tx_rx_disruption.187150727 |
| Short name | T3503 |
| Test name | |
| Test status | |
| Simulation time | 637536178 ps |
| CPU time | 1.69 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:21 AM UTC 24 |
| Peak memory | 214952 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=187150727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 195.usbdev_t x_rx_disruption.187150727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/195.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/196.usbdev_endpoint_types.3816414027 |
| Short name | T3486 |
| Test name | |
| Test status | |
| Simulation time | 210460446 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:20 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3816414027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 196.usbdev_endpoint_types.3816414027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/196.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/196.usbdev_tx_rx_disruption.3250631148 |
| Short name | T123 |
| Test name | |
| Test status | |
| Simulation time | 557241796 ps |
| CPU time | 1.48 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3250631148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 196.usbdev_ tx_rx_disruption.3250631148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/196.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/197.usbdev_endpoint_types.3782747982 |
| Short name | T3495 |
| Test name | |
| Test status | |
| Simulation time | 407243916 ps |
| CPU time | 1.21 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3782747982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 197.usbdev_endpoint_types.3782747982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/197.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/197.usbdev_tx_rx_disruption.3841699631 |
| Short name | T3500 |
| Test name | |
| Test status | |
| Simulation time | 510053062 ps |
| CPU time | 1.48 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3841699631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 197.usbdev_ tx_rx_disruption.3841699631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/197.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/198.usbdev_endpoint_types.479674549 |
| Short name | T3496 |
| Test name | |
| Test status | |
| Simulation time | 491719798 ps |
| CPU time | 1.21 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=479674549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 198.usbdev_endpoint_types.479674549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/198.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/198.usbdev_tx_rx_disruption.3615174657 |
| Short name | T3501 |
| Test name | |
| Test status | |
| Simulation time | 599428141 ps |
| CPU time | 1.53 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3615174657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 198.usbdev_ tx_rx_disruption.3615174657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/198.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/199.usbdev_endpoint_types.1553578052 |
| Short name | T575 |
| Test name | |
| Test status | |
| Simulation time | 316301695 ps |
| CPU time | 1.01 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1553578052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 199.usbdev_endpoint_types.1553578052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/199.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/199.usbdev_tx_rx_disruption.4288528668 |
| Short name | T3509 |
| Test name | |
| Test status | |
| Simulation time | 621084958 ps |
| CPU time | 1.59 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:21 AM UTC 24 |
| Peak memory | 215020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4288528668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 199.usbdev_ tx_rx_disruption.4288528668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/199.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_alert_test.1486083303 |
| Short name | T214 |
| Test name | |
| Test status | |
| Simulation time | 60744722 ps |
| CPU time | 1.09 seconds |
| Started | Aug 29 03:30:47 AM UTC 24 |
| Finished | Aug 29 03:30:49 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1486083303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 2.usbdev_alert_test.1486083303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_disconnect.954954184 |
| Short name | T11 |
| Test name | |
| Test status | |
| Simulation time | 9654529955 ps |
| CPU time | 15.95 seconds |
| Started | Aug 29 03:29:50 AM UTC 24 |
| Finished | Aug 29 03:30:08 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=954954184 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_disconnect.954954184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_reset.898634936 |
| Short name | T13 |
| Test name | |
| Test status | |
| Simulation time | 20830634380 ps |
| CPU time | 41.36 seconds |
| Started | Aug 29 03:29:50 AM UTC 24 |
| Finished | Aug 29 03:30:34 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=898634936 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_reset.898634936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_av_buffer.582848062 |
| Short name | T663 |
| Test name | |
| Test status | |
| Simulation time | 156392441 ps |
| CPU time | 1.48 seconds |
| Started | Aug 29 03:29:53 AM UTC 24 |
| Finished | Aug 29 03:29:55 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=582848062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_av_buffer.582848062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_av_empty.3249224751 |
| Short name | T47 |
| Test name | |
| Test status | |
| Simulation time | 160863721 ps |
| CPU time | 1.54 seconds |
| Started | Aug 29 03:29:54 AM UTC 24 |
| Finished | Aug 29 03:29:56 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3249224751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_av_empty.3249224751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_bitstuff_err.1294395556 |
| Short name | T84 |
| Test name | |
| Test status | |
| Simulation time | 152051602 ps |
| CPU time | 1.29 seconds |
| Started | Aug 29 03:29:55 AM UTC 24 |
| Finished | Aug 29 03:29:57 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1294395556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_bitstuff_err.1294395556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_data_toggle_clear.4276887478 |
| Short name | T665 |
| Test name | |
| Test status | |
| Simulation time | 305463905 ps |
| CPU time | 2.09 seconds |
| Started | Aug 29 03:29:56 AM UTC 24 |
| Finished | Aug 29 03:29:59 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4276887478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 2.usbdev_data_toggle_clear.4276887478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_data_toggle_restore.2501005293 |
| Short name | T114 |
| Test name | |
| Test status | |
| Simulation time | 1140425695 ps |
| CPU time | 5.57 seconds |
| Started | Aug 29 03:29:56 AM UTC 24 |
| Finished | Aug 29 03:30:03 AM UTC 24 |
| Peak memory | 217116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2501005293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_data_toggle_restore.2501005293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_device_timeout.2821795080 |
| Short name | T666 |
| Test name | |
| Test status | |
| Simulation time | 347736804 ps |
| CPU time | 6.18 seconds |
| Started | Aug 29 03:29:57 AM UTC 24 |
| Finished | Aug 29 03:30:04 AM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2821795080 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_device_timeout.2821795080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_disable_endpoint.3383229621 |
| Short name | T448 |
| Test name | |
| Test status | |
| Simulation time | 871142576 ps |
| CPU time | 3.73 seconds |
| Started | Aug 29 03:30:00 AM UTC 24 |
| Finished | Aug 29 03:30:05 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3383229621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 2.usbdev_disable_endpoint.3383229621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_disconnected.611385829 |
| Short name | T63 |
| Test name | |
| Test status | |
| Simulation time | 178468496 ps |
| CPU time | 1.16 seconds |
| Started | Aug 29 03:30:03 AM UTC 24 |
| Finished | Aug 29 03:30:05 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=611385829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_disconnected.611385829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_enable.838167966 |
| Short name | T667 |
| Test name | |
| Test status | |
| Simulation time | 44149479 ps |
| CPU time | 0.9 seconds |
| Started | Aug 29 03:30:04 AM UTC 24 |
| Finished | Aug 29 03:30:06 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=838167966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_enable.838167966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_endpoint_access.197635970 |
| Short name | T618 |
| Test name | |
| Test status | |
| Simulation time | 859168049 ps |
| CPU time | 2.57 seconds |
| Started | Aug 29 03:30:05 AM UTC 24 |
| Finished | Aug 29 03:30:08 AM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=197635970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_endpoint_access.197635970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_endpoint_types.2854358294 |
| Short name | T566 |
| Test name | |
| Test status | |
| Simulation time | 218424056 ps |
| CPU time | 1.69 seconds |
| Started | Aug 29 03:30:05 AM UTC 24 |
| Finished | Aug 29 03:30:08 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2854358294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_endpoint_types.2854358294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_fifo_rst.720513535 |
| Short name | T671 |
| Test name | |
| Test status | |
| Simulation time | 293259925 ps |
| CPU time | 4.19 seconds |
| Started | Aug 29 03:30:06 AM UTC 24 |
| Finished | Aug 29 03:30:12 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=720513535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 2.usbdev_fifo_rst.720513535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_freq_hiclk.3470776414 |
| Short name | T868 |
| Test name | |
| Test status | |
| Simulation time | 105178547574 ps |
| CPU time | 233.06 seconds |
| Started | Aug 29 03:30:06 AM UTC 24 |
| Finished | Aug 29 03:34:03 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3470776414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_hiclk.3470776414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_freq_hiclk_max.3156716620 |
| Short name | T829 |
| Test name | |
| Test status | |
| Simulation time | 82337106622 ps |
| CPU time | 198.06 seconds |
| Started | Aug 29 03:30:06 AM UTC 24 |
| Finished | Aug 29 03:33:28 AM UTC 24 |
| Peak memory | 217456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=3156716620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 2.usbdev_freq_hiclk_max.3156716620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_freq_loclk.1315481275 |
| Short name | T645 |
| Test name | |
| Test status | |
| Simulation time | 107137022092 ps |
| CPU time | 244.92 seconds |
| Started | Aug 29 03:30:08 AM UTC 24 |
| Finished | Aug 29 03:34:16 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1315481275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_loclk.1315481275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_freq_loclk_max.3331745603 |
| Short name | T884 |
| Test name | |
| Test status | |
| Simulation time | 93916097206 ps |
| CPU time | 243.2 seconds |
| Started | Aug 29 03:30:08 AM UTC 24 |
| Finished | Aug 29 03:34:15 AM UTC 24 |
| Peak memory | 217416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=3331745603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 2.usbdev_freq_loclk_max.3331745603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_freq_phase.2701784210 |
| Short name | T879 |
| Test name | |
| Test status | |
| Simulation time | 111140647581 ps |
| CPU time | 240.42 seconds |
| Started | Aug 29 03:30:09 AM UTC 24 |
| Finished | Aug 29 03:34:13 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2701784210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 2.usbdev_freq_phase.2701784210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_in_iso.318107186 |
| Short name | T670 |
| Test name | |
| Test status | |
| Simulation time | 164317140 ps |
| CPU time | 1.45 seconds |
| Started | Aug 29 03:30:09 AM UTC 24 |
| Finished | Aug 29 03:30:11 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=318107186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_in_iso.318107186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_in_stall.1553886919 |
| Short name | T669 |
| Test name | |
| Test status | |
| Simulation time | 137017992 ps |
| CPU time | 1.21 seconds |
| Started | Aug 29 03:30:09 AM UTC 24 |
| Finished | Aug 29 03:30:11 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1553886919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_in_stall.1553886919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_in_trans.3256007386 |
| Short name | T672 |
| Test name | |
| Test status | |
| Simulation time | 222981291 ps |
| CPU time | 1.37 seconds |
| Started | Aug 29 03:30:10 AM UTC 24 |
| Finished | Aug 29 03:30:13 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3256007386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_in_trans.3256007386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_invalid_sync.560835559 |
| Short name | T737 |
| Test name | |
| Test status | |
| Simulation time | 3263703138 ps |
| CPU time | 101.52 seconds |
| Started | Aug 29 03:30:09 AM UTC 24 |
| Finished | Aug 29 03:31:52 AM UTC 24 |
| Peak memory | 229584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=560835559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 2.usbdev_invalid_sync.560835559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_iso_retraction.3752938030 |
| Short name | T761 |
| Test name | |
| Test status | |
| Simulation time | 7878168123 ps |
| CPU time | 124.55 seconds |
| Started | Aug 29 03:30:10 AM UTC 24 |
| Finished | Aug 29 03:32:17 AM UTC 24 |
| Peak memory | 217380 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3752938030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_iso_retraction.3752938030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_link_in_err.2415206866 |
| Short name | T673 |
| Test name | |
| Test status | |
| Simulation time | 228966298 ps |
| CPU time | 1.76 seconds |
| Started | Aug 29 03:30:12 AM UTC 24 |
| Finished | Aug 29 03:30:15 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2415206866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_link_in_err.2415206866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_link_resume.1463581771 |
| Short name | T69 |
| Test name | |
| Test status | |
| Simulation time | 7736080426 ps |
| CPU time | 25.85 seconds |
| Started | Aug 29 03:30:12 AM UTC 24 |
| Finished | Aug 29 03:30:40 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1463581771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_link_resume.1463581771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_link_suspend.2186715133 |
| Short name | T680 |
| Test name | |
| Test status | |
| Simulation time | 4756764834 ps |
| CPU time | 16.73 seconds |
| Started | Aug 29 03:30:13 AM UTC 24 |
| Finished | Aug 29 03:30:30 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2186715133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_link_suspend.2186715133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_low_speed_traffic.3192272587 |
| Short name | T250 |
| Test name | |
| Test status | |
| Simulation time | 3431290929 ps |
| CPU time | 33.1 seconds |
| Started | Aug 29 03:30:13 AM UTC 24 |
| Finished | Aug 29 03:30:47 AM UTC 24 |
| Peak memory | 229640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3192272587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_low_speed_traffic.3192272587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_max_inter_pkt_delay.3814347921 |
| Short name | T170 |
| Test name | |
| Test status | |
| Simulation time | 2722298289 ps |
| CPU time | 26.62 seconds |
| Started | Aug 29 03:30:14 AM UTC 24 |
| Finished | Aug 29 03:30:42 AM UTC 24 |
| Peak memory | 229576 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3814347921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_inter_pkt_delay.3814347921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_max_length_in_transaction.1940866329 |
| Short name | T674 |
| Test name | |
| Test status | |
| Simulation time | 261551072 ps |
| CPU time | 1.43 seconds |
| Started | Aug 29 03:30:14 AM UTC 24 |
| Finished | Aug 29 03:30:16 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1940866329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_max_length_in_transaction.1940866329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_max_length_out_transaction.3025537258 |
| Short name | T675 |
| Test name | |
| Test status | |
| Simulation time | 203492790 ps |
| CPU time | 1.62 seconds |
| Started | Aug 29 03:30:16 AM UTC 24 |
| Finished | Aug 29 03:30:18 AM UTC 24 |
| Peak memory | 214856 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3025537258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 2.usbdev_max_length_out_transaction.3025537258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_max_non_iso_usb_traffic.2522764505 |
| Short name | T742 |
| Test name | |
| Test status | |
| Simulation time | 2800587542 ps |
| CPU time | 102.63 seconds |
| Started | Aug 29 03:30:16 AM UTC 24 |
| Finished | Aug 29 03:32:01 AM UTC 24 |
| Peak memory | 229564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2522764505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_non_iso_usb_traffic.2522764505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_max_usb_traffic.1073502738 |
| Short name | T251 |
| Test name | |
| Test status | |
| Simulation time | 2487233409 ps |
| CPU time | 33.2 seconds |
| Started | Aug 29 03:30:17 AM UTC 24 |
| Finished | Aug 29 03:30:52 AM UTC 24 |
| Peak memory | 229664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1073502738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_usb_traffic.1073502738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_min_inter_pkt_delay.3973406911 |
| Short name | T747 |
| Test name | |
| Test status | |
| Simulation time | 3218995446 ps |
| CPU time | 103.26 seconds |
| Started | Aug 29 03:30:19 AM UTC 24 |
| Finished | Aug 29 03:32:05 AM UTC 24 |
| Peak memory | 229596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3973406911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_min_inter_pkt_delay.3973406911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_min_length_in_transaction.19521979 |
| Short name | T676 |
| Test name | |
| Test status | |
| Simulation time | 222627978 ps |
| CPU time | 1.67 seconds |
| Started | Aug 29 03:30:19 AM UTC 24 |
| Finished | Aug 29 03:30:22 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=19521979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_ trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 2.usbdev_min_length_in_transaction.19521979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_min_length_out_transaction.566702606 |
| Short name | T677 |
| Test name | |
| Test status | |
| Simulation time | 167055829 ps |
| CPU time | 1.45 seconds |
| Started | Aug 29 03:30:22 AM UTC 24 |
| Finished | Aug 29 03:30:25 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=566702606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 2.usbdev_min_length_out_transaction.566702606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_nak_trans.2864418909 |
| Short name | T145 |
| Test name | |
| Test status | |
| Simulation time | 197827066 ps |
| CPU time | 1.51 seconds |
| Started | Aug 29 03:30:26 AM UTC 24 |
| Finished | Aug 29 03:30:28 AM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2864418909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_nak_trans.2864418909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_out_iso.566208190 |
| Short name | T678 |
| Test name | |
| Test status | |
| Simulation time | 206835548 ps |
| CPU time | 1.12 seconds |
| Started | Aug 29 03:30:26 AM UTC 24 |
| Finished | Aug 29 03:30:28 AM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=566208190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 2.usbdev_out_iso.566208190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_out_stall.3942759116 |
| Short name | T679 |
| Test name | |
| Test status | |
| Simulation time | 158641098 ps |
| CPU time | 1.47 seconds |
| Started | Aug 29 03:30:26 AM UTC 24 |
| Finished | Aug 29 03:30:28 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3942759116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_out_stall.3942759116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_out_trans_nak.48355425 |
| Short name | T580 |
| Test name | |
| Test status | |
| Simulation time | 179719518 ps |
| CPU time | 1.14 seconds |
| Started | Aug 29 03:30:29 AM UTC 24 |
| Finished | Aug 29 03:30:32 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=48355425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_out_trans_nak.48355425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_pending_in_trans.1290854796 |
| Short name | T175 |
| Test name | |
| Test status | |
| Simulation time | 185612298 ps |
| CPU time | 1.44 seconds |
| Started | Aug 29 03:30:29 AM UTC 24 |
| Finished | Aug 29 03:30:32 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1290854796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 2.usbdev_pending_in_trans.1290854796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_pinflip.2019939219 |
| Short name | T263 |
| Test name | |
| Test status | |
| Simulation time | 249939302 ps |
| CPU time | 1.79 seconds |
| Started | Aug 29 03:30:29 AM UTC 24 |
| Finished | Aug 29 03:30:32 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2019939219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_pinflip.2019939219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_rand_bus_type.3461819352 |
| Short name | T229 |
| Test name | |
| Test status | |
| Simulation time | 236788694 ps |
| CPU time | 1.8 seconds |
| Started | Aug 29 03:30:30 AM UTC 24 |
| Finished | Aug 29 03:30:33 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3461819352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 2.usbdev_phy_config_rand_bus_type.3461819352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_usb_ref_disable.1696507981 |
| Short name | T218 |
| Test name | |
| Test status | |
| Simulation time | 146304405 ps |
| CPU time | 1.32 seconds |
| Started | Aug 29 03:30:30 AM UTC 24 |
| Finished | Aug 29 03:30:32 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1696507981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_usb_ref_disable.1696507981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_phy_pins_sense.2889909698 |
| Short name | T27 |
| Test name | |
| Test status | |
| Simulation time | 93202212 ps |
| CPU time | 1.2 seconds |
| Started | Aug 29 03:30:31 AM UTC 24 |
| Finished | Aug 29 03:30:33 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2889909698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_pins_sense.2889909698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_buffer.4190738556 |
| Short name | T320 |
| Test name | |
| Test status | |
| Simulation time | 16110906405 ps |
| CPU time | 47.95 seconds |
| Started | Aug 29 03:30:32 AM UTC 24 |
| Finished | Aug 29 03:31:21 AM UTC 24 |
| Peak memory | 231636 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4190738556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_pkt_buffer.4190738556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_received.299724446 |
| Short name | T431 |
| Test name | |
| Test status | |
| Simulation time | 175210846 ps |
| CPU time | 1.38 seconds |
| Started | Aug 29 03:30:33 AM UTC 24 |
| Finished | Aug 29 03:30:35 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=299724446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_pkt_received.299724446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_sent.595407514 |
| Short name | T681 |
| Test name | |
| Test status | |
| Simulation time | 253748620 ps |
| CPU time | 1.2 seconds |
| Started | Aug 29 03:30:33 AM UTC 24 |
| Finished | Aug 29 03:30:35 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=595407514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 2.usbdev_pkt_sent.595407514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_rand_bus_disconnects.1164307876 |
| Short name | T826 |
| Test name | |
| Test status | |
| Simulation time | 6890647673 ps |
| CPU time | 170.49 seconds |
| Started | Aug 29 03:30:33 AM UTC 24 |
| Finished | Aug 29 03:33:27 AM UTC 24 |
| Peak memory | 234180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1164307876 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_bus_disconnects.1164307876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_rand_bus_resets.88954161 |
| Short name | T708 |
| Test name | |
| Test status | |
| Simulation time | 7028627344 ps |
| CPU time | 41.11 seconds |
| Started | Aug 29 03:30:34 AM UTC 24 |
| Finished | Aug 29 03:31:17 AM UTC 24 |
| Peak memory | 229596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=88954161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bu s_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_bus_resets.88954161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_random_length_in_transaction.2980669479 |
| Short name | T682 |
| Test name | |
| Test status | |
| Simulation time | 207386332 ps |
| CPU time | 1.5 seconds |
| Started | Aug 29 03:30:33 AM UTC 24 |
| Finished | Aug 29 03:30:36 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2980669479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 2.usbdev_random_length_in_transaction.2980669479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_random_length_out_transaction.3450799891 |
| Short name | T683 |
| Test name | |
| Test status | |
| Simulation time | 176331266 ps |
| CPU time | 1.48 seconds |
| Started | Aug 29 03:30:33 AM UTC 24 |
| Finished | Aug 29 03:30:36 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3450799891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 2.usbdev_random_length_out_transaction.3450799891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_resume_link_active.882920566 |
| Short name | T95 |
| Test name | |
| Test status | |
| Simulation time | 20162584041 ps |
| CPU time | 35.58 seconds |
| Started | Aug 29 03:30:34 AM UTC 24 |
| Finished | Aug 29 03:31:11 AM UTC 24 |
| Peak memory | 217152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=882920566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 2.usbdev_resume_link_active.882920566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_rx_crc_err.981688210 |
| Short name | T76 |
| Test name | |
| Test status | |
| Simulation time | 173803811 ps |
| CPU time | 1.52 seconds |
| Started | Aug 29 03:30:36 AM UTC 24 |
| Finished | Aug 29 03:30:39 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=981688210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_rx_crc_err.981688210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_rx_pid_err.2133434739 |
| Short name | T80 |
| Test name | |
| Test status | |
| Simulation time | 179759971 ps |
| CPU time | 1.52 seconds |
| Started | Aug 29 03:30:37 AM UTC 24 |
| Finished | Aug 29 03:30:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2133434739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_rx_pid_err.2133434739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_sec_cm.3871445403 |
| Short name | T235 |
| Test name | |
| Test status | |
| Simulation time | 435354045 ps |
| CPU time | 2.38 seconds |
| Started | Aug 29 03:30:46 AM UTC 24 |
| Finished | Aug 29 03:30:49 AM UTC 24 |
| Peak memory | 251476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3871445403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_sec_cm.3871445403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_setup_priority.4131775711 |
| Short name | T381 |
| Test name | |
| Test status | |
| Simulation time | 364951261 ps |
| CPU time | 2.33 seconds |
| Started | Aug 29 03:30:37 AM UTC 24 |
| Finished | Aug 29 03:30:40 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4131775711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_priority.4131775711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_setup_priority_over_stall_response.68104899 |
| Short name | T190 |
| Test name | |
| Test status | |
| Simulation time | 202372143 ps |
| CPU time | 1.52 seconds |
| Started | Aug 29 03:30:38 AM UTC 24 |
| Finished | Aug 29 03:30:40 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=68104899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_stal l_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_priority_over_stall_response.68104899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_setup_stage.2766687542 |
| Short name | T685 |
| Test name | |
| Test status | |
| Simulation time | 200121514 ps |
| CPU time | 1.47 seconds |
| Started | Aug 29 03:30:40 AM UTC 24 |
| Finished | Aug 29 03:30:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2766687542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_setup_stage.2766687542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_setup_trans_ignored.3575746706 |
| Short name | T549 |
| Test name | |
| Test status | |
| Simulation time | 163886456 ps |
| CPU time | 1.45 seconds |
| Started | Aug 29 03:30:40 AM UTC 24 |
| Finished | Aug 29 03:30:42 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3575746706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 2.usbdev_setup_trans_ignored.3575746706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_smoke.686167917 |
| Short name | T686 |
| Test name | |
| Test status | |
| Simulation time | 238926942 ps |
| CPU time | 1.6 seconds |
| Started | Aug 29 03:30:40 AM UTC 24 |
| Finished | Aug 29 03:30:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=686167917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_smoke.686167917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_spurious_pids_ignored.2363291281 |
| Short name | T704 |
| Test name | |
| Test status | |
| Simulation time | 2679041837 ps |
| CPU time | 26.62 seconds |
| Started | Aug 29 03:30:41 AM UTC 24 |
| Finished | Aug 29 03:31:09 AM UTC 24 |
| Peak memory | 229584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2363291281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_spurious_pids_ignored.2363291281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_stall_priority_over_nak.3242789322 |
| Short name | T584 |
| Test name | |
| Test status | |
| Simulation time | 168146451 ps |
| CPU time | 1.53 seconds |
| Started | Aug 29 03:30:41 AM UTC 24 |
| Finished | Aug 29 03:30:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3242789322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stall_priority_over_nak.3242789322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_stall_trans.1332615818 |
| Short name | T687 |
| Test name | |
| Test status | |
| Simulation time | 178039189 ps |
| CPU time | 1.45 seconds |
| Started | Aug 29 03:30:41 AM UTC 24 |
| Finished | Aug 29 03:30:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1332615818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_stall_trans.1332615818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_stream_len_max.3182959429 |
| Short name | T688 |
| Test name | |
| Test status | |
| Simulation time | 982099636 ps |
| CPU time | 4.83 seconds |
| Started | Aug 29 03:30:44 AM UTC 24 |
| Finished | Aug 29 03:30:49 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3182959429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stream_len_max.3182959429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_streaming_out.3707813542 |
| Short name | T758 |
| Test name | |
| Test status | |
| Simulation time | 3047380524 ps |
| CPU time | 89.7 seconds |
| Started | Aug 29 03:30:42 AM UTC 24 |
| Finished | Aug 29 03:32:14 AM UTC 24 |
| Peak memory | 227684 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3707813542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_streaming_out.3707813542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_timeout_missing_host_handshake.969984341 |
| Short name | T684 |
| Test name | |
| Test status | |
| Simulation time | 5662130441 ps |
| CPU time | 37.04 seconds |
| Started | Aug 29 03:29:58 AM UTC 24 |
| Finished | Aug 29 03:30:37 AM UTC 24 |
| Peak memory | 217424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=969984341 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_timeout_missing_host_handshake.969984341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/2.usbdev_tx_rx_disruption.1921230174 |
| Short name | T203 |
| Test name | |
| Test status | |
| Simulation time | 479741488 ps |
| CPU time | 2.78 seconds |
| Started | Aug 29 03:30:45 AM UTC 24 |
| Finished | Aug 29 03:30:48 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1921230174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_tx _rx_disruption.1921230174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/2.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_alert_test.3530577314 |
| Short name | T1649 |
| Test name | |
| Test status | |
| Simulation time | 47928319 ps |
| CPU time | 0.76 seconds |
| Started | Aug 29 03:40:20 AM UTC 24 |
| Finished | Aug 29 03:40:22 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3530577314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 20.usbdev_alert_test.3530577314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_disconnect.3624879500 |
| Short name | T1635 |
| Test name | |
| Test status | |
| Simulation time | 9301312026 ps |
| CPU time | 12.3 seconds |
| Started | Aug 29 03:40:00 AM UTC 24 |
| Finished | Aug 29 03:40:13 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3624879500 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_disconnect.3624879500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_reset.2590705090 |
| Short name | T1639 |
| Test name | |
| Test status | |
| Simulation time | 14031127876 ps |
| CPU time | 16.42 seconds |
| Started | Aug 29 03:40:00 AM UTC 24 |
| Finished | Aug 29 03:40:18 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2590705090 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_reset.2590705090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_resume.4250018199 |
| Short name | T1668 |
| Test name | |
| Test status | |
| Simulation time | 25008402291 ps |
| CPU time | 37.94 seconds |
| Started | Aug 29 03:40:00 AM UTC 24 |
| Finished | Aug 29 03:40:39 AM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4250018199 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_resume.4250018199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_av_buffer.225460085 |
| Short name | T1615 |
| Test name | |
| Test status | |
| Simulation time | 198277850 ps |
| CPU time | 1.18 seconds |
| Started | Aug 29 03:40:00 AM UTC 24 |
| Finished | Aug 29 03:40:02 AM UTC 24 |
| Peak memory | 214824 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=225460085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_av_buffer.225460085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_bitstuff_err.596333815 |
| Short name | T1612 |
| Test name | |
| Test status | |
| Simulation time | 146583197 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 03:40:00 AM UTC 24 |
| Finished | Aug 29 03:40:02 AM UTC 24 |
| Peak memory | 214732 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=596333815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_bitstuff_err.596333815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_data_toggle_clear.1611174363 |
| Short name | T1613 |
| Test name | |
| Test status | |
| Simulation time | 204790016 ps |
| CPU time | 0.95 seconds |
| Started | Aug 29 03:40:00 AM UTC 24 |
| Finished | Aug 29 03:40:02 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1611174363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 20.usbdev_data_toggle_clear.1611174363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_data_toggle_restore.1521271168 |
| Short name | T638 |
| Test name | |
| Test status | |
| Simulation time | 1220825518 ps |
| CPU time | 3.27 seconds |
| Started | Aug 29 03:40:00 AM UTC 24 |
| Finished | Aug 29 03:40:05 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1521271168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_data_toggle_restore.1521271168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_device_timeout.878056446 |
| Short name | T1631 |
| Test name | |
| Test status | |
| Simulation time | 1317903044 ps |
| CPU time | 8.17 seconds |
| Started | Aug 29 03:40:00 AM UTC 24 |
| Finished | Aug 29 03:40:10 AM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=878056446 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_device_timeout.878056446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_disable_endpoint.746401562 |
| Short name | T1623 |
| Test name | |
| Test status | |
| Simulation time | 1067123825 ps |
| CPU time | 2.93 seconds |
| Started | Aug 29 03:40:00 AM UTC 24 |
| Finished | Aug 29 03:40:04 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=746401562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_disable_endpoint.746401562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_disconnected.3851164608 |
| Short name | T1617 |
| Test name | |
| Test status | |
| Simulation time | 142113179 ps |
| CPU time | 1.24 seconds |
| Started | Aug 29 03:40:00 AM UTC 24 |
| Finished | Aug 29 03:40:03 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3851164608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_disconnected.3851164608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_enable.2277096636 |
| Short name | T1614 |
| Test name | |
| Test status | |
| Simulation time | 101986524 ps |
| CPU time | 0.73 seconds |
| Started | Aug 29 03:40:00 AM UTC 24 |
| Finished | Aug 29 03:40:02 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2277096636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 20.usbdev_enable.2277096636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_endpoint_access.1144064703 |
| Short name | T1625 |
| Test name | |
| Test status | |
| Simulation time | 905340390 ps |
| CPU time | 3.33 seconds |
| Started | Aug 29 03:40:00 AM UTC 24 |
| Finished | Aug 29 03:40:05 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1144064703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_endpoint_access.1144064703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_endpoint_types.4196020393 |
| Short name | T543 |
| Test name | |
| Test status | |
| Simulation time | 439485025 ps |
| CPU time | 1.46 seconds |
| Started | Aug 29 03:40:00 AM UTC 24 |
| Finished | Aug 29 03:40:03 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4196020393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_endpoint_types.4196020393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_fifo_rst.4155736019 |
| Short name | T1624 |
| Test name | |
| Test status | |
| Simulation time | 460031616 ps |
| CPU time | 2.92 seconds |
| Started | Aug 29 03:40:01 AM UTC 24 |
| Finished | Aug 29 03:40:05 AM UTC 24 |
| Peak memory | 217152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4155736019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_fifo_rst.4155736019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_in_iso.3889297213 |
| Short name | T1621 |
| Test name | |
| Test status | |
| Simulation time | 229287208 ps |
| CPU time | 1.56 seconds |
| Started | Aug 29 03:40:01 AM UTC 24 |
| Finished | Aug 29 03:40:03 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3889297213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 20.usbdev_in_iso.3889297213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_in_stall.1496981687 |
| Short name | T1616 |
| Test name | |
| Test status | |
| Simulation time | 150660660 ps |
| CPU time | 0.92 seconds |
| Started | Aug 29 03:40:01 AM UTC 24 |
| Finished | Aug 29 03:40:03 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1496981687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_in_stall.1496981687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_in_trans.761262002 |
| Short name | T1620 |
| Test name | |
| Test status | |
| Simulation time | 206204174 ps |
| CPU time | 1.19 seconds |
| Started | Aug 29 03:40:01 AM UTC 24 |
| Finished | Aug 29 03:40:03 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=761262002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 20.usbdev_in_trans.761262002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_invalid_sync.2893749552 |
| Short name | T1663 |
| Test name | |
| Test status | |
| Simulation time | 4106332739 ps |
| CPU time | 26.68 seconds |
| Started | Aug 29 03:40:01 AM UTC 24 |
| Finished | Aug 29 03:40:29 AM UTC 24 |
| Peak memory | 234188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2893749552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 20.usbdev_invalid_sync.2893749552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_iso_retraction.425892341 |
| Short name | T1707 |
| Test name | |
| Test status | |
| Simulation time | 8106444578 ps |
| CPU time | 51.15 seconds |
| Started | Aug 29 03:40:01 AM UTC 24 |
| Finished | Aug 29 03:40:53 AM UTC 24 |
| Peak memory | 217380 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=425892341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 20.usbdev_iso_retraction.425892341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_link_in_err.1551089659 |
| Short name | T1619 |
| Test name | |
| Test status | |
| Simulation time | 187405502 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:40:01 AM UTC 24 |
| Finished | Aug 29 03:40:03 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1551089659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_link_in_err.1551089659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_link_resume.2104423467 |
| Short name | T1669 |
| Test name | |
| Test status | |
| Simulation time | 28008973594 ps |
| CPU time | 37.35 seconds |
| Started | Aug 29 03:40:01 AM UTC 24 |
| Finished | Aug 29 03:40:40 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2104423467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_link_resume.2104423467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_link_suspend.2762667940 |
| Short name | T1638 |
| Test name | |
| Test status | |
| Simulation time | 10069568136 ps |
| CPU time | 15.08 seconds |
| Started | Aug 29 03:40:01 AM UTC 24 |
| Finished | Aug 29 03:40:17 AM UTC 24 |
| Peak memory | 217428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2762667940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_link_suspend.2762667940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_low_speed_traffic.975162262 |
| Short name | T1713 |
| Test name | |
| Test status | |
| Simulation time | 2418445619 ps |
| CPU time | 57.5 seconds |
| Started | Aug 29 03:40:01 AM UTC 24 |
| Finished | Aug 29 03:41:00 AM UTC 24 |
| Peak memory | 227632 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=975162262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_low_speed_traffic.975162262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_max_inter_pkt_delay.3406739244 |
| Short name | T1709 |
| Test name | |
| Test status | |
| Simulation time | 1470230195 ps |
| CPU time | 35.11 seconds |
| Started | Aug 29 03:40:19 AM UTC 24 |
| Finished | Aug 29 03:40:56 AM UTC 24 |
| Peak memory | 227332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3406739244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_inter_pkt_delay.3406739244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_max_length_in_transaction.1275653832 |
| Short name | T1641 |
| Test name | |
| Test status | |
| Simulation time | 245537117 ps |
| CPU time | 1.11 seconds |
| Started | Aug 29 03:40:19 AM UTC 24 |
| Finished | Aug 29 03:40:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1275653832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 20.usbdev_max_length_in_transaction.1275653832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_max_length_out_transaction.4258340870 |
| Short name | T1640 |
| Test name | |
| Test status | |
| Simulation time | 187952128 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 03:40:19 AM UTC 24 |
| Finished | Aug 29 03:40:21 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4258340870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 20.usbdev_max_length_out_transaction.4258340870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_max_non_iso_usb_traffic.3702740264 |
| Short name | T1687 |
| Test name | |
| Test status | |
| Simulation time | 2606650808 ps |
| CPU time | 22.89 seconds |
| Started | Aug 29 03:40:19 AM UTC 24 |
| Finished | Aug 29 03:40:43 AM UTC 24 |
| Peak memory | 227592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3702740264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_non_iso_usb_traffic.3702740264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_min_inter_pkt_delay.768443479 |
| Short name | T1664 |
| Test name | |
| Test status | |
| Simulation time | 1454197489 ps |
| CPU time | 9.76 seconds |
| Started | Aug 29 03:40:19 AM UTC 24 |
| Finished | Aug 29 03:40:30 AM UTC 24 |
| Peak memory | 227408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=768443479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_min_inter_pkt_delay.768443479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_min_length_in_transaction.2231232980 |
| Short name | T1573 |
| Test name | |
| Test status | |
| Simulation time | 151959333 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 03:40:19 AM UTC 24 |
| Finished | Aug 29 03:40:21 AM UTC 24 |
| Peak memory | 214820 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2231232980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 20.usbdev_min_length_in_transaction.2231232980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_min_length_out_transaction.1776072106 |
| Short name | T1609 |
| Test name | |
| Test status | |
| Simulation time | 154979616 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 03:40:19 AM UTC 24 |
| Finished | Aug 29 03:40:21 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1776072106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 20.usbdev_min_length_out_transaction.1776072106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_out_iso.2725959169 |
| Short name | T1610 |
| Test name | |
| Test status | |
| Simulation time | 159111166 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 03:40:19 AM UTC 24 |
| Finished | Aug 29 03:40:22 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2725959169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 20.usbdev_out_iso.2725959169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_out_stall.204497107 |
| Short name | T1548 |
| Test name | |
| Test status | |
| Simulation time | 157077587 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 03:40:19 AM UTC 24 |
| Finished | Aug 29 03:40:21 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=204497107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_out_stall.204497107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_out_trans_nak.4140338458 |
| Short name | T1483 |
| Test name | |
| Test status | |
| Simulation time | 155038719 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 03:40:19 AM UTC 24 |
| Finished | Aug 29 03:40:21 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4140338458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 20.usbdev_out_trans_nak.4140338458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_pending_in_trans.73955254 |
| Short name | T1492 |
| Test name | |
| Test status | |
| Simulation time | 155669105 ps |
| CPU time | 0.93 seconds |
| Started | Aug 29 03:40:20 AM UTC 24 |
| Finished | Aug 29 03:40:22 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=73955254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_pending_in_trans.73955254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_phy_config_pinflip.3088717348 |
| Short name | T1642 |
| Test name | |
| Test status | |
| Simulation time | 211004846 ps |
| CPU time | 0.99 seconds |
| Started | Aug 29 03:40:20 AM UTC 24 |
| Finished | Aug 29 03:40:22 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3088717348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 20.usbdev_phy_config_pinflip.3088717348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_phy_config_usb_ref_disable.2298945217 |
| Short name | T1643 |
| Test name | |
| Test status | |
| Simulation time | 145631901 ps |
| CPU time | 0.98 seconds |
| Started | Aug 29 03:40:20 AM UTC 24 |
| Finished | Aug 29 03:40:22 AM UTC 24 |
| Peak memory | 214980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2298945217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 20.usbdev_phy_config_usb_ref_disable.2298945217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_phy_pins_sense.1046228419 |
| Short name | T1555 |
| Test name | |
| Test status | |
| Simulation time | 42703973 ps |
| CPU time | 0.7 seconds |
| Started | Aug 29 03:40:20 AM UTC 24 |
| Finished | Aug 29 03:40:21 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1046228419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_phy_pins_sense.1046228419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_buffer.1202590659 |
| Short name | T1742 |
| Test name | |
| Test status | |
| Simulation time | 18661121392 ps |
| CPU time | 44.82 seconds |
| Started | Aug 29 03:40:20 AM UTC 24 |
| Finished | Aug 29 03:41:06 AM UTC 24 |
| Peak memory | 227452 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1202590659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 20.usbdev_pkt_buffer.1202590659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_received.499848248 |
| Short name | T1388 |
| Test name | |
| Test status | |
| Simulation time | 144790841 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 03:40:20 AM UTC 24 |
| Finished | Aug 29 03:40:22 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=499848248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_pkt_received.499848248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_sent.707192733 |
| Short name | T1646 |
| Test name | |
| Test status | |
| Simulation time | 224851897 ps |
| CPU time | 1 seconds |
| Started | Aug 29 03:40:20 AM UTC 24 |
| Finished | Aug 29 03:40:22 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=707192733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 20.usbdev_pkt_sent.707192733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_random_length_in_transaction.580410534 |
| Short name | T1651 |
| Test name | |
| Test status | |
| Simulation time | 225647321 ps |
| CPU time | 1.15 seconds |
| Started | Aug 29 03:40:20 AM UTC 24 |
| Finished | Aug 29 03:40:22 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=580410534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_random_length_in_transaction.580410534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_random_length_out_transaction.895045627 |
| Short name | T1645 |
| Test name | |
| Test status | |
| Simulation time | 163310445 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 03:40:20 AM UTC 24 |
| Finished | Aug 29 03:40:22 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=895045627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 20.usbdev_random_length_out_transaction.895045627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_rx_crc_err.564999614 |
| Short name | T1644 |
| Test name | |
| Test status | |
| Simulation time | 147942472 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 03:40:20 AM UTC 24 |
| Finished | Aug 29 03:40:22 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=564999614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_rx_crc_err.564999614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_rx_full.4189004019 |
| Short name | T1657 |
| Test name | |
| Test status | |
| Simulation time | 421848158 ps |
| CPU time | 1.71 seconds |
| Started | Aug 29 03:40:20 AM UTC 24 |
| Finished | Aug 29 03:40:23 AM UTC 24 |
| Peak memory | 214888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4189004019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 20.usbdev_rx_full.4189004019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_setup_stage.2469368034 |
| Short name | T1648 |
| Test name | |
| Test status | |
| Simulation time | 144820607 ps |
| CPU time | 1.04 seconds |
| Started | Aug 29 03:40:20 AM UTC 24 |
| Finished | Aug 29 03:40:22 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2469368034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_setup_stage.2469368034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_setup_trans_ignored.1224953591 |
| Short name | T1647 |
| Test name | |
| Test status | |
| Simulation time | 186917548 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 03:40:20 AM UTC 24 |
| Finished | Aug 29 03:40:22 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1224953591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 20.usbdev_setup_trans_ignored.1224953591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_smoke.930599556 |
| Short name | T1652 |
| Test name | |
| Test status | |
| Simulation time | 225145726 ps |
| CPU time | 1.07 seconds |
| Started | Aug 29 03:40:20 AM UTC 24 |
| Finished | Aug 29 03:40:22 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=930599556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_smoke.930599556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_spurious_pids_ignored.3169500498 |
| Short name | T1745 |
| Test name | |
| Test status | |
| Simulation time | 1918646725 ps |
| CPU time | 47.18 seconds |
| Started | Aug 29 03:40:20 AM UTC 24 |
| Finished | Aug 29 03:41:09 AM UTC 24 |
| Peak memory | 227548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3169500498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 20.usbdev_spurious_pids_ignored.3169500498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_stall_priority_over_nak.3540929133 |
| Short name | T1654 |
| Test name | |
| Test status | |
| Simulation time | 183712688 ps |
| CPU time | 1.05 seconds |
| Started | Aug 29 03:40:20 AM UTC 24 |
| Finished | Aug 29 03:40:22 AM UTC 24 |
| Peak memory | 214872 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3540929133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_stall_priority_over_nak.3540929133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_stall_trans.822350422 |
| Short name | T1650 |
| Test name | |
| Test status | |
| Simulation time | 195479529 ps |
| CPU time | 0.94 seconds |
| Started | Aug 29 03:40:20 AM UTC 24 |
| Finished | Aug 29 03:40:22 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=822350422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 20.usbdev_stall_trans.822350422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_stream_len_max.3206047860 |
| Short name | T1662 |
| Test name | |
| Test status | |
| Simulation time | 1322411703 ps |
| CPU time | 3.29 seconds |
| Started | Aug 29 03:40:20 AM UTC 24 |
| Finished | Aug 29 03:40:25 AM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3206047860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_stream_len_max.3206047860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_streaming_out.171475285 |
| Short name | T1667 |
| Test name | |
| Test status | |
| Simulation time | 2754803861 ps |
| CPU time | 17.65 seconds |
| Started | Aug 29 03:40:20 AM UTC 24 |
| Finished | Aug 29 03:40:39 AM UTC 24 |
| Peak memory | 227612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=171475285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_streaming_out.171475285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_timeout_missing_host_handshake.2844006538 |
| Short name | T1634 |
| Test name | |
| Test status | |
| Simulation time | 1979263229 ps |
| CPU time | 11.57 seconds |
| Started | Aug 29 03:40:00 AM UTC 24 |
| Finished | Aug 29 03:40:13 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2844006538 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_timeout_missing_host_handshake.2844006538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/20.usbdev_tx_rx_disruption.3420161178 |
| Short name | T1659 |
| Test name | |
| Test status | |
| Simulation time | 606207263 ps |
| CPU time | 1.71 seconds |
| Started | Aug 29 03:40:20 AM UTC 24 |
| Finished | Aug 29 03:40:23 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3420161178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_t x_rx_disruption.3420161178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/20.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/200.usbdev_tx_rx_disruption.1473481660 |
| Short name | T3510 |
| Test name | |
| Test status | |
| Simulation time | 539396394 ps |
| CPU time | 1.58 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1473481660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 200.usbdev_ tx_rx_disruption.1473481660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/200.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/201.usbdev_tx_rx_disruption.1153109960 |
| Short name | T3499 |
| Test name | |
| Test status | |
| Simulation time | 476769629 ps |
| CPU time | 1.4 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1153109960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 201.usbdev_ tx_rx_disruption.1153109960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/201.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/202.usbdev_tx_rx_disruption.42923190 |
| Short name | T3504 |
| Test name | |
| Test status | |
| Simulation time | 503628660 ps |
| CPU time | 1.42 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:21 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=42923190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 202.usbdev_tx _rx_disruption.42923190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/202.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/203.usbdev_tx_rx_disruption.4081258969 |
| Short name | T3505 |
| Test name | |
| Test status | |
| Simulation time | 491723532 ps |
| CPU time | 1.44 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4081258969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 203.usbdev_ tx_rx_disruption.4081258969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/203.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/204.usbdev_tx_rx_disruption.2645717107 |
| Short name | T3507 |
| Test name | |
| Test status | |
| Simulation time | 502654501 ps |
| CPU time | 1.52 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2645717107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 204.usbdev_ tx_rx_disruption.2645717107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/204.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/205.usbdev_tx_rx_disruption.3758803769 |
| Short name | T3513 |
| Test name | |
| Test status | |
| Simulation time | 525341860 ps |
| CPU time | 1.49 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:21 AM UTC 24 |
| Peak memory | 214896 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3758803769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 205.usbdev_ tx_rx_disruption.3758803769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/205.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/206.usbdev_tx_rx_disruption.2313006555 |
| Short name | T3517 |
| Test name | |
| Test status | |
| Simulation time | 636457385 ps |
| CPU time | 1.72 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:22 AM UTC 24 |
| Peak memory | 214920 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2313006555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 206.usbdev_ tx_rx_disruption.2313006555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/206.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/207.usbdev_tx_rx_disruption.1066542952 |
| Short name | T3514 |
| Test name | |
| Test status | |
| Simulation time | 583878433 ps |
| CPU time | 1.6 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:22 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1066542952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 207.usbdev_ tx_rx_disruption.1066542952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/207.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/208.usbdev_tx_rx_disruption.1729443259 |
| Short name | T3508 |
| Test name | |
| Test status | |
| Simulation time | 542338533 ps |
| CPU time | 1.4 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1729443259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 208.usbdev_ tx_rx_disruption.1729443259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/208.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/209.usbdev_tx_rx_disruption.13528359 |
| Short name | T3523 |
| Test name | |
| Test status | |
| Simulation time | 515852483 ps |
| CPU time | 1.45 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:22 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=13528359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 209.usbdev_tx _rx_disruption.13528359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/209.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_alert_test.3398596372 |
| Short name | T1718 |
| Test name | |
| Test status | |
| Simulation time | 40609056 ps |
| CPU time | 0.64 seconds |
| Started | Aug 29 03:41:01 AM UTC 24 |
| Finished | Aug 29 03:41:02 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3398596372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 21.usbdev_alert_test.3398596372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_disconnect.3206158053 |
| Short name | T1665 |
| Test name | |
| Test status | |
| Simulation time | 9048411659 ps |
| CPU time | 11.05 seconds |
| Started | Aug 29 03:40:20 AM UTC 24 |
| Finished | Aug 29 03:40:33 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3206158053 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_disconnect.3206158053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_reset.4209127394 |
| Short name | T1703 |
| Test name | |
| Test status | |
| Simulation time | 21441572504 ps |
| CPU time | 23.29 seconds |
| Started | Aug 29 03:40:20 AM UTC 24 |
| Finished | Aug 29 03:40:45 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4209127394 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_reset.4209127394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_resume.1403097594 |
| Short name | T1705 |
| Test name | |
| Test status | |
| Simulation time | 26146168335 ps |
| CPU time | 30.34 seconds |
| Started | Aug 29 03:40:20 AM UTC 24 |
| Finished | Aug 29 03:40:52 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1403097594 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_resume.1403097594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_av_buffer.1463053294 |
| Short name | T1656 |
| Test name | |
| Test status | |
| Simulation time | 196124139 ps |
| CPU time | 0.94 seconds |
| Started | Aug 29 03:40:20 AM UTC 24 |
| Finished | Aug 29 03:40:22 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1463053294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_av_buffer.1463053294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_bitstuff_err.3241386675 |
| Short name | T1655 |
| Test name | |
| Test status | |
| Simulation time | 210133835 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 03:40:20 AM UTC 24 |
| Finished | Aug 29 03:40:22 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3241386675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_bitstuff_err.3241386675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_data_toggle_clear.2274421053 |
| Short name | T1660 |
| Test name | |
| Test status | |
| Simulation time | 446146477 ps |
| CPU time | 1.47 seconds |
| Started | Aug 29 03:40:20 AM UTC 24 |
| Finished | Aug 29 03:40:23 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2274421053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 21.usbdev_data_toggle_clear.2274421053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_data_toggle_restore.1459424092 |
| Short name | T1661 |
| Test name | |
| Test status | |
| Simulation time | 395638782 ps |
| CPU time | 1.54 seconds |
| Started | Aug 29 03:40:20 AM UTC 24 |
| Finished | Aug 29 03:40:23 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1459424092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_data_toggle_restore.1459424092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_device_address.810752499 |
| Short name | T1824 |
| Test name | |
| Test status | |
| Simulation time | 48804189713 ps |
| CPU time | 73.74 seconds |
| Started | Aug 29 03:40:40 AM UTC 24 |
| Finished | Aug 29 03:41:56 AM UTC 24 |
| Peak memory | 217376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=810752499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 21.usbdev_device_address.810752499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_device_timeout.3535566888 |
| Short name | T1671 |
| Test name | |
| Test status | |
| Simulation time | 188273558 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 03:40:40 AM UTC 24 |
| Finished | Aug 29 03:40:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3535566888 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_device_timeout.3535566888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_disable_endpoint.4096694378 |
| Short name | T1685 |
| Test name | |
| Test status | |
| Simulation time | 845442759 ps |
| CPU time | 1.95 seconds |
| Started | Aug 29 03:40:40 AM UTC 24 |
| Finished | Aug 29 03:40:43 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4096694378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 21.usbdev_disable_endpoint.4096694378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_disconnected.974613120 |
| Short name | T1673 |
| Test name | |
| Test status | |
| Simulation time | 205098507 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 03:40:40 AM UTC 24 |
| Finished | Aug 29 03:40:42 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=974613120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_disconnected.974613120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_enable.1389789953 |
| Short name | T1672 |
| Test name | |
| Test status | |
| Simulation time | 54227211 ps |
| CPU time | 0.68 seconds |
| Started | Aug 29 03:40:40 AM UTC 24 |
| Finished | Aug 29 03:40:42 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1389789953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 21.usbdev_enable.1389789953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_endpoint_access.1856055508 |
| Short name | T1700 |
| Test name | |
| Test status | |
| Simulation time | 871378020 ps |
| CPU time | 2.47 seconds |
| Started | Aug 29 03:40:41 AM UTC 24 |
| Finished | Aug 29 03:40:44 AM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1856055508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_endpoint_access.1856055508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_fifo_levels.2248576417 |
| Short name | T1674 |
| Test name | |
| Test status | |
| Simulation time | 189009037 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 03:40:41 AM UTC 24 |
| Finished | Aug 29 03:40:43 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2248576417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_fifo_levels.2248576417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_fifo_rst.304550831 |
| Short name | T1702 |
| Test name | |
| Test status | |
| Simulation time | 593770362 ps |
| CPU time | 3.21 seconds |
| Started | Aug 29 03:40:41 AM UTC 24 |
| Finished | Aug 29 03:40:45 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=304550831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_fifo_rst.304550831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_in_iso.4161617365 |
| Short name | T1678 |
| Test name | |
| Test status | |
| Simulation time | 199547674 ps |
| CPU time | 0.91 seconds |
| Started | Aug 29 03:40:41 AM UTC 24 |
| Finished | Aug 29 03:40:43 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4161617365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 21.usbdev_in_iso.4161617365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_in_stall.3799080091 |
| Short name | T1679 |
| Test name | |
| Test status | |
| Simulation time | 187428030 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:40:41 AM UTC 24 |
| Finished | Aug 29 03:40:43 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3799080091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_in_stall.3799080091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_in_trans.1358992743 |
| Short name | T1675 |
| Test name | |
| Test status | |
| Simulation time | 180889482 ps |
| CPU time | 0.98 seconds |
| Started | Aug 29 03:40:41 AM UTC 24 |
| Finished | Aug 29 03:40:43 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1358992743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_in_trans.1358992743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_invalid_sync.273829625 |
| Short name | T1747 |
| Test name | |
| Test status | |
| Simulation time | 3568409653 ps |
| CPU time | 30.84 seconds |
| Started | Aug 29 03:40:41 AM UTC 24 |
| Finished | Aug 29 03:41:13 AM UTC 24 |
| Peak memory | 229640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=273829625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 21.usbdev_invalid_sync.273829625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_iso_retraction.2399688305 |
| Short name | T1901 |
| Test name | |
| Test status | |
| Simulation time | 11123971402 ps |
| CPU time | 113.97 seconds |
| Started | Aug 29 03:40:41 AM UTC 24 |
| Finished | Aug 29 03:42:37 AM UTC 24 |
| Peak memory | 218940 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2399688305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_iso_retraction.2399688305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_link_in_err.686728312 |
| Short name | T1680 |
| Test name | |
| Test status | |
| Simulation time | 179586360 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 03:40:41 AM UTC 24 |
| Finished | Aug 29 03:40:43 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=686728312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_link_in_err.686728312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_link_resume.359420307 |
| Short name | T1714 |
| Test name | |
| Test status | |
| Simulation time | 12476525990 ps |
| CPU time | 17.85 seconds |
| Started | Aug 29 03:40:41 AM UTC 24 |
| Finished | Aug 29 03:41:00 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=359420307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_link_resume.359420307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_link_suspend.2871108239 |
| Short name | T1708 |
| Test name | |
| Test status | |
| Simulation time | 9322006662 ps |
| CPU time | 11.98 seconds |
| Started | Aug 29 03:40:41 AM UTC 24 |
| Finished | Aug 29 03:40:54 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2871108239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_link_suspend.2871108239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_low_speed_traffic.3302695999 |
| Short name | T1712 |
| Test name | |
| Test status | |
| Simulation time | 2173965712 ps |
| CPU time | 14.38 seconds |
| Started | Aug 29 03:40:41 AM UTC 24 |
| Finished | Aug 29 03:40:57 AM UTC 24 |
| Peak memory | 234120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3302695999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_low_speed_traffic.3302695999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_max_inter_pkt_delay.1015233297 |
| Short name | T1676 |
| Test name | |
| Test status | |
| Simulation time | 2671198868 ps |
| CPU time | 18.37 seconds |
| Started | Aug 29 03:40:41 AM UTC 24 |
| Finished | Aug 29 03:41:01 AM UTC 24 |
| Peak memory | 227432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1015233297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_inter_pkt_delay.1015233297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_max_length_in_transaction.3173690601 |
| Short name | T1681 |
| Test name | |
| Test status | |
| Simulation time | 256360284 ps |
| CPU time | 1.1 seconds |
| Started | Aug 29 03:40:41 AM UTC 24 |
| Finished | Aug 29 03:40:43 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3173690601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 21.usbdev_max_length_in_transaction.3173690601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_max_length_out_transaction.1520471532 |
| Short name | T1689 |
| Test name | |
| Test status | |
| Simulation time | 197446765 ps |
| CPU time | 1.28 seconds |
| Started | Aug 29 03:40:41 AM UTC 24 |
| Finished | Aug 29 03:40:43 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1520471532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 21.usbdev_max_length_out_transaction.1520471532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_max_non_iso_usb_traffic.232762782 |
| Short name | T1740 |
| Test name | |
| Test status | |
| Simulation time | 2483180561 ps |
| CPU time | 22.11 seconds |
| Started | Aug 29 03:40:41 AM UTC 24 |
| Finished | Aug 29 03:41:05 AM UTC 24 |
| Peak memory | 229648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=232762782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_non_iso_usb_traffic.232762782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_min_inter_pkt_delay.2714746161 |
| Short name | T1829 |
| Test name | |
| Test status | |
| Simulation time | 3290858965 ps |
| CPU time | 78.99 seconds |
| Started | Aug 29 03:40:41 AM UTC 24 |
| Finished | Aug 29 03:42:02 AM UTC 24 |
| Peak memory | 227516 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2714746161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_min_inter_pkt_delay.2714746161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_min_length_in_transaction.232021797 |
| Short name | T1690 |
| Test name | |
| Test status | |
| Simulation time | 242612523 ps |
| CPU time | 1.17 seconds |
| Started | Aug 29 03:40:41 AM UTC 24 |
| Finished | Aug 29 03:40:43 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=232021797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 21.usbdev_min_length_in_transaction.232021797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_min_length_out_transaction.2397091891 |
| Short name | T1693 |
| Test name | |
| Test status | |
| Simulation time | 183120418 ps |
| CPU time | 1.29 seconds |
| Started | Aug 29 03:40:41 AM UTC 24 |
| Finished | Aug 29 03:40:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2397091891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 21.usbdev_min_length_out_transaction.2397091891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_nak_trans.805544627 |
| Short name | T134 |
| Test name | |
| Test status | |
| Simulation time | 198489089 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 03:40:41 AM UTC 24 |
| Finished | Aug 29 03:40:43 AM UTC 24 |
| Peak memory | 215020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=805544627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_nak_trans.805544627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_out_iso.2273194402 |
| Short name | T1686 |
| Test name | |
| Test status | |
| Simulation time | 202773318 ps |
| CPU time | 0.98 seconds |
| Started | Aug 29 03:40:41 AM UTC 24 |
| Finished | Aug 29 03:40:43 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2273194402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_out_iso.2273194402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_out_stall.4005011066 |
| Short name | T1683 |
| Test name | |
| Test status | |
| Simulation time | 164914309 ps |
| CPU time | 0.99 seconds |
| Started | Aug 29 03:40:41 AM UTC 24 |
| Finished | Aug 29 03:40:43 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4005011066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_out_stall.4005011066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_out_trans_nak.1309868991 |
| Short name | T1695 |
| Test name | |
| Test status | |
| Simulation time | 185029771 ps |
| CPU time | 1.17 seconds |
| Started | Aug 29 03:40:41 AM UTC 24 |
| Finished | Aug 29 03:40:44 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1309868991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 21.usbdev_out_trans_nak.1309868991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_pending_in_trans.2007321675 |
| Short name | T1682 |
| Test name | |
| Test status | |
| Simulation time | 145612862 ps |
| CPU time | 0.77 seconds |
| Started | Aug 29 03:40:41 AM UTC 24 |
| Finished | Aug 29 03:40:43 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2007321675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 21.usbdev_pending_in_trans.2007321675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_phy_config_pinflip.3210814222 |
| Short name | T1698 |
| Test name | |
| Test status | |
| Simulation time | 194596442 ps |
| CPU time | 1.35 seconds |
| Started | Aug 29 03:40:41 AM UTC 24 |
| Finished | Aug 29 03:40:44 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3210814222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 21.usbdev_phy_config_pinflip.3210814222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_phy_config_usb_ref_disable.1518447282 |
| Short name | T1692 |
| Test name | |
| Test status | |
| Simulation time | 177369405 ps |
| CPU time | 1 seconds |
| Started | Aug 29 03:40:41 AM UTC 24 |
| Finished | Aug 29 03:40:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1518447282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 21.usbdev_phy_config_usb_ref_disable.1518447282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_phy_pins_sense.2018791175 |
| Short name | T1684 |
| Test name | |
| Test status | |
| Simulation time | 35005365 ps |
| CPU time | 0.72 seconds |
| Started | Aug 29 03:40:41 AM UTC 24 |
| Finished | Aug 29 03:40:43 AM UTC 24 |
| Peak memory | 216568 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2018791175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_phy_pins_sense.2018791175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_buffer.2742011321 |
| Short name | T1749 |
| Test name | |
| Test status | |
| Simulation time | 14231552459 ps |
| CPU time | 34.48 seconds |
| Started | Aug 29 03:40:41 AM UTC 24 |
| Finished | Aug 29 03:41:17 AM UTC 24 |
| Peak memory | 227660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2742011321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_pkt_buffer.2742011321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_received.3510826180 |
| Short name | T1688 |
| Test name | |
| Test status | |
| Simulation time | 194877119 ps |
| CPU time | 0.9 seconds |
| Started | Aug 29 03:40:41 AM UTC 24 |
| Finished | Aug 29 03:40:43 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3510826180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_pkt_received.3510826180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_sent.635162315 |
| Short name | T1699 |
| Test name | |
| Test status | |
| Simulation time | 231874062 ps |
| CPU time | 1.23 seconds |
| Started | Aug 29 03:40:41 AM UTC 24 |
| Finished | Aug 29 03:40:44 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=635162315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_pkt_sent.635162315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_random_length_in_transaction.3664832503 |
| Short name | T1697 |
| Test name | |
| Test status | |
| Simulation time | 248278710 ps |
| CPU time | 1.01 seconds |
| Started | Aug 29 03:40:41 AM UTC 24 |
| Finished | Aug 29 03:40:44 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3664832503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 21.usbdev_random_length_in_transaction.3664832503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_random_length_out_transaction.1939049319 |
| Short name | T1691 |
| Test name | |
| Test status | |
| Simulation time | 160807592 ps |
| CPU time | 0.97 seconds |
| Started | Aug 29 03:40:42 AM UTC 24 |
| Finished | Aug 29 03:40:44 AM UTC 24 |
| Peak memory | 216728 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1939049319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 21.usbdev_random_length_out_transaction.1939049319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_rx_crc_err.3805604614 |
| Short name | T1696 |
| Test name | |
| Test status | |
| Simulation time | 149164965 ps |
| CPU time | 1 seconds |
| Started | Aug 29 03:40:42 AM UTC 24 |
| Finished | Aug 29 03:40:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3805604614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_rx_crc_err.3805604614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_rx_full.140621979 |
| Short name | T1701 |
| Test name | |
| Test status | |
| Simulation time | 323545793 ps |
| CPU time | 1.34 seconds |
| Started | Aug 29 03:40:42 AM UTC 24 |
| Finished | Aug 29 03:40:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=140621979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 21.usbdev_rx_full.140621979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_setup_stage.61363413 |
| Short name | T1694 |
| Test name | |
| Test status | |
| Simulation time | 167725415 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 03:40:42 AM UTC 24 |
| Finished | Aug 29 03:40:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=61363413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_setup_stage.61363413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_setup_trans_ignored.2862581097 |
| Short name | T1717 |
| Test name | |
| Test status | |
| Simulation time | 181429105 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 03:41:00 AM UTC 24 |
| Finished | Aug 29 03:41:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2862581097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 21.usbdev_setup_trans_ignored.2862581097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_smoke.1362016073 |
| Short name | T1723 |
| Test name | |
| Test status | |
| Simulation time | 302265780 ps |
| CPU time | 1.24 seconds |
| Started | Aug 29 03:41:00 AM UTC 24 |
| Finished | Aug 29 03:41:03 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1362016073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_smoke.1362016073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_spurious_pids_ignored.3323980749 |
| Short name | T1751 |
| Test name | |
| Test status | |
| Simulation time | 3234270176 ps |
| CPU time | 28.88 seconds |
| Started | Aug 29 03:41:01 AM UTC 24 |
| Finished | Aug 29 03:41:31 AM UTC 24 |
| Peak memory | 229524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3323980749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 21.usbdev_spurious_pids_ignored.3323980749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_stall_priority_over_nak.2352897779 |
| Short name | T1716 |
| Test name | |
| Test status | |
| Simulation time | 180081016 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 03:41:01 AM UTC 24 |
| Finished | Aug 29 03:41:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2352897779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_stall_priority_over_nak.2352897779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_stall_trans.2486174952 |
| Short name | T1721 |
| Test name | |
| Test status | |
| Simulation time | 193792023 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 03:41:01 AM UTC 24 |
| Finished | Aug 29 03:41:02 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2486174952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_stall_trans.2486174952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_stream_len_max.1331956453 |
| Short name | T1738 |
| Test name | |
| Test status | |
| Simulation time | 948379120 ps |
| CPU time | 2.75 seconds |
| Started | Aug 29 03:41:01 AM UTC 24 |
| Finished | Aug 29 03:41:04 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1331956453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_stream_len_max.1331956453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_streaming_out.1643526126 |
| Short name | T1750 |
| Test name | |
| Test status | |
| Simulation time | 2629141465 ps |
| CPU time | 17.4 seconds |
| Started | Aug 29 03:41:01 AM UTC 24 |
| Finished | Aug 29 03:41:19 AM UTC 24 |
| Peak memory | 229580 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1643526126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_streaming_out.1643526126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_timeout_missing_host_handshake.1479679203 |
| Short name | T1715 |
| Test name | |
| Test status | |
| Simulation time | 981937875 ps |
| CPU time | 19.29 seconds |
| Started | Aug 29 03:40:40 AM UTC 24 |
| Finished | Aug 29 03:41:01 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1479679203 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_timeout_missing_host_handshake.1479679203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/21.usbdev_tx_rx_disruption.406602393 |
| Short name | T198 |
| Test name | |
| Test status | |
| Simulation time | 554250731 ps |
| CPU time | 1.65 seconds |
| Started | Aug 29 03:41:01 AM UTC 24 |
| Finished | Aug 29 03:41:03 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=406602393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_tx _rx_disruption.406602393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/21.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/210.usbdev_tx_rx_disruption.807264310 |
| Short name | T3520 |
| Test name | |
| Test status | |
| Simulation time | 452568817 ps |
| CPU time | 1.38 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:22 AM UTC 24 |
| Peak memory | 217088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=807264310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 210.usbdev_t x_rx_disruption.807264310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/210.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/211.usbdev_tx_rx_disruption.902880586 |
| Short name | T3518 |
| Test name | |
| Test status | |
| Simulation time | 457231496 ps |
| CPU time | 1.3 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:22 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=902880586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 211.usbdev_t x_rx_disruption.902880586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/211.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/212.usbdev_tx_rx_disruption.1828833209 |
| Short name | T3522 |
| Test name | |
| Test status | |
| Simulation time | 440250560 ps |
| CPU time | 1.36 seconds |
| Started | Aug 29 04:10:18 AM UTC 24 |
| Finished | Aug 29 04:10:22 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1828833209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 212.usbdev_ tx_rx_disruption.1828833209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/212.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/213.usbdev_tx_rx_disruption.3018381503 |
| Short name | T3524 |
| Test name | |
| Test status | |
| Simulation time | 573515258 ps |
| CPU time | 1.43 seconds |
| Started | Aug 29 04:10:19 AM UTC 24 |
| Finished | Aug 29 04:10:22 AM UTC 24 |
| Peak memory | 217080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3018381503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 213.usbdev_ tx_rx_disruption.3018381503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/213.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/214.usbdev_tx_rx_disruption.129692384 |
| Short name | T3519 |
| Test name | |
| Test status | |
| Simulation time | 491513214 ps |
| CPU time | 1.37 seconds |
| Started | Aug 29 04:10:19 AM UTC 24 |
| Finished | Aug 29 04:10:22 AM UTC 24 |
| Peak memory | 215024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=129692384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 214.usbdev_t x_rx_disruption.129692384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/214.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/215.usbdev_tx_rx_disruption.15841098 |
| Short name | T3521 |
| Test name | |
| Test status | |
| Simulation time | 450156619 ps |
| CPU time | 1.4 seconds |
| Started | Aug 29 04:10:19 AM UTC 24 |
| Finished | Aug 29 04:10:22 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=15841098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 215.usbdev_tx _rx_disruption.15841098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/215.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/216.usbdev_tx_rx_disruption.2774016115 |
| Short name | T3527 |
| Test name | |
| Test status | |
| Simulation time | 579323779 ps |
| CPU time | 1.49 seconds |
| Started | Aug 29 04:10:19 AM UTC 24 |
| Finished | Aug 29 04:10:22 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2774016115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 216.usbdev_ tx_rx_disruption.2774016115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/216.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/217.usbdev_tx_rx_disruption.626900856 |
| Short name | T3535 |
| Test name | |
| Test status | |
| Simulation time | 623508328 ps |
| CPU time | 1.85 seconds |
| Started | Aug 29 04:10:19 AM UTC 24 |
| Finished | Aug 29 04:10:23 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=626900856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 217.usbdev_t x_rx_disruption.626900856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/217.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/218.usbdev_tx_rx_disruption.3779409137 |
| Short name | T3530 |
| Test name | |
| Test status | |
| Simulation time | 464835151 ps |
| CPU time | 1.49 seconds |
| Started | Aug 29 04:10:19 AM UTC 24 |
| Finished | Aug 29 04:10:22 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3779409137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 218.usbdev_ tx_rx_disruption.3779409137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/218.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/219.usbdev_tx_rx_disruption.3825330550 |
| Short name | T3515 |
| Test name | |
| Test status | |
| Simulation time | 636093615 ps |
| CPU time | 1.65 seconds |
| Started | Aug 29 04:10:19 AM UTC 24 |
| Finished | Aug 29 04:10:22 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3825330550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 219.usbdev_ tx_rx_disruption.3825330550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/219.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_alert_test.4190619650 |
| Short name | T1770 |
| Test name | |
| Test status | |
| Simulation time | 40938565 ps |
| CPU time | 0.72 seconds |
| Started | Aug 29 03:41:23 AM UTC 24 |
| Finished | Aug 29 03:41:25 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4190619650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 22.usbdev_alert_test.4190619650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_disconnect.1577556788 |
| Short name | T1744 |
| Test name | |
| Test status | |
| Simulation time | 4244921262 ps |
| CPU time | 6.43 seconds |
| Started | Aug 29 03:41:01 AM UTC 24 |
| Finished | Aug 29 03:41:08 AM UTC 24 |
| Peak memory | 227476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1577556788 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_disconnect.1577556788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_reset.1638507546 |
| Short name | T1719 |
| Test name | |
| Test status | |
| Simulation time | 20071854162 ps |
| CPU time | 25.39 seconds |
| Started | Aug 29 03:41:01 AM UTC 24 |
| Finished | Aug 29 03:41:28 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1638507546 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_reset.1638507546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_resume.469735146 |
| Short name | T1786 |
| Test name | |
| Test status | |
| Simulation time | 26145433687 ps |
| CPU time | 29.35 seconds |
| Started | Aug 29 03:41:01 AM UTC 24 |
| Finished | Aug 29 03:41:32 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=469735146 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_resume.469735146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_av_buffer.1485411745 |
| Short name | T1729 |
| Test name | |
| Test status | |
| Simulation time | 173389648 ps |
| CPU time | 0.99 seconds |
| Started | Aug 29 03:41:01 AM UTC 24 |
| Finished | Aug 29 03:41:03 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1485411745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_av_buffer.1485411745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_bitstuff_err.3478869064 |
| Short name | T1727 |
| Test name | |
| Test status | |
| Simulation time | 150869053 ps |
| CPU time | 0.9 seconds |
| Started | Aug 29 03:41:01 AM UTC 24 |
| Finished | Aug 29 03:41:03 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3478869064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_bitstuff_err.3478869064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_data_toggle_clear.3322860410 |
| Short name | T1726 |
| Test name | |
| Test status | |
| Simulation time | 198128052 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 03:41:01 AM UTC 24 |
| Finished | Aug 29 03:41:03 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3322860410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 22.usbdev_data_toggle_clear.3322860410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_data_toggle_restore.2403955612 |
| Short name | T635 |
| Test name | |
| Test status | |
| Simulation time | 723134387 ps |
| CPU time | 1.89 seconds |
| Started | Aug 29 03:41:01 AM UTC 24 |
| Finished | Aug 29 03:41:04 AM UTC 24 |
| Peak memory | 214624 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2403955612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_data_toggle_restore.2403955612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_device_timeout.798676460 |
| Short name | T1743 |
| Test name | |
| Test status | |
| Simulation time | 307027320 ps |
| CPU time | 4.24 seconds |
| Started | Aug 29 03:41:01 AM UTC 24 |
| Finished | Aug 29 03:41:06 AM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=798676460 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_device_timeout.798676460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_disable_endpoint.1116861665 |
| Short name | T1735 |
| Test name | |
| Test status | |
| Simulation time | 700719587 ps |
| CPU time | 1.74 seconds |
| Started | Aug 29 03:41:01 AM UTC 24 |
| Finished | Aug 29 03:41:04 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1116861665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 22.usbdev_disable_endpoint.1116861665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_disconnected.2007060729 |
| Short name | T1728 |
| Test name | |
| Test status | |
| Simulation time | 142218916 ps |
| CPU time | 0.77 seconds |
| Started | Aug 29 03:41:01 AM UTC 24 |
| Finished | Aug 29 03:41:03 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2007060729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_disconnected.2007060729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_enable.3398532810 |
| Short name | T1725 |
| Test name | |
| Test status | |
| Simulation time | 31641079 ps |
| CPU time | 0.68 seconds |
| Started | Aug 29 03:41:01 AM UTC 24 |
| Finished | Aug 29 03:41:03 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3398532810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 22.usbdev_enable.3398532810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_endpoint_access.3267622932 |
| Short name | T1739 |
| Test name | |
| Test status | |
| Simulation time | 831375229 ps |
| CPU time | 2.15 seconds |
| Started | Aug 29 03:41:01 AM UTC 24 |
| Finished | Aug 29 03:41:04 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3267622932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_endpoint_access.3267622932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_endpoint_types.192209053 |
| Short name | T1730 |
| Test name | |
| Test status | |
| Simulation time | 172422714 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 03:41:01 AM UTC 24 |
| Finished | Aug 29 03:41:03 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=192209053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 22.usbdev_endpoint_types.192209053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_fifo_levels.4049015746 |
| Short name | T416 |
| Test name | |
| Test status | |
| Simulation time | 183222641 ps |
| CPU time | 0.77 seconds |
| Started | Aug 29 03:41:01 AM UTC 24 |
| Finished | Aug 29 03:41:03 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4049015746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_fifo_levels.4049015746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_fifo_rst.2664835145 |
| Short name | T1741 |
| Test name | |
| Test status | |
| Simulation time | 404268632 ps |
| CPU time | 2.54 seconds |
| Started | Aug 29 03:41:01 AM UTC 24 |
| Finished | Aug 29 03:41:05 AM UTC 24 |
| Peak memory | 217144 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2664835145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_fifo_rst.2664835145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_in_iso.1744093086 |
| Short name | T1733 |
| Test name | |
| Test status | |
| Simulation time | 187651896 ps |
| CPU time | 1.18 seconds |
| Started | Aug 29 03:41:01 AM UTC 24 |
| Finished | Aug 29 03:41:04 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1744093086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 22.usbdev_in_iso.1744093086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_in_stall.1208820107 |
| Short name | T1731 |
| Test name | |
| Test status | |
| Simulation time | 146124111 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 03:41:01 AM UTC 24 |
| Finished | Aug 29 03:41:03 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1208820107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_in_stall.1208820107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_in_trans.2069902322 |
| Short name | T1734 |
| Test name | |
| Test status | |
| Simulation time | 197865771 ps |
| CPU time | 1.39 seconds |
| Started | Aug 29 03:41:01 AM UTC 24 |
| Finished | Aug 29 03:41:04 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2069902322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_in_trans.2069902322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_invalid_sync.3968832135 |
| Short name | T1907 |
| Test name | |
| Test status | |
| Simulation time | 4203598289 ps |
| CPU time | 102.57 seconds |
| Started | Aug 29 03:41:01 AM UTC 24 |
| Finished | Aug 29 03:42:46 AM UTC 24 |
| Peak memory | 229760 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3968832135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 22.usbdev_invalid_sync.3968832135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_iso_retraction.1164025898 |
| Short name | T1861 |
| Test name | |
| Test status | |
| Simulation time | 8103973585 ps |
| CPU time | 86.77 seconds |
| Started | Aug 29 03:41:01 AM UTC 24 |
| Finished | Aug 29 03:42:30 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1164025898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_iso_retraction.1164025898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_link_in_err.3249771301 |
| Short name | T1732 |
| Test name | |
| Test status | |
| Simulation time | 198965549 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 03:41:01 AM UTC 24 |
| Finished | Aug 29 03:41:03 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3249771301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_link_in_err.3249771301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_link_resume.3122547610 |
| Short name | T1748 |
| Test name | |
| Test status | |
| Simulation time | 8709263256 ps |
| CPU time | 12.97 seconds |
| Started | Aug 29 03:41:01 AM UTC 24 |
| Finished | Aug 29 03:41:16 AM UTC 24 |
| Peak memory | 227556 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3122547610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_link_resume.3122547610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_link_suspend.2829742853 |
| Short name | T1746 |
| Test name | |
| Test status | |
| Simulation time | 4270030642 ps |
| CPU time | 6.54 seconds |
| Started | Aug 29 03:41:01 AM UTC 24 |
| Finished | Aug 29 03:41:09 AM UTC 24 |
| Peak memory | 227404 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2829742853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_link_suspend.2829742853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_low_speed_traffic.294235599 |
| Short name | T1787 |
| Test name | |
| Test status | |
| Simulation time | 3432417393 ps |
| CPU time | 29.89 seconds |
| Started | Aug 29 03:41:01 AM UTC 24 |
| Finished | Aug 29 03:41:33 AM UTC 24 |
| Peak memory | 229588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=294235599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_low_speed_traffic.294235599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_max_inter_pkt_delay.3350829090 |
| Short name | T1793 |
| Test name | |
| Test status | |
| Simulation time | 1724501455 ps |
| CPU time | 41.9 seconds |
| Started | Aug 29 03:41:02 AM UTC 24 |
| Finished | Aug 29 03:41:45 AM UTC 24 |
| Peak memory | 229468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3350829090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_inter_pkt_delay.3350829090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_max_length_in_transaction.3424045635 |
| Short name | T1737 |
| Test name | |
| Test status | |
| Simulation time | 316174271 ps |
| CPU time | 1.44 seconds |
| Started | Aug 29 03:41:02 AM UTC 24 |
| Finished | Aug 29 03:41:04 AM UTC 24 |
| Peak memory | 214876 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3424045635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 22.usbdev_max_length_in_transaction.3424045635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_max_length_out_transaction.314884785 |
| Short name | T1736 |
| Test name | |
| Test status | |
| Simulation time | 207885030 ps |
| CPU time | 1.2 seconds |
| Started | Aug 29 03:41:02 AM UTC 24 |
| Finished | Aug 29 03:41:04 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=314884785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 22.usbdev_max_length_out_transaction.314884785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_max_non_iso_usb_traffic.1081390102 |
| Short name | T1788 |
| Test name | |
| Test status | |
| Simulation time | 3410516537 ps |
| CPU time | 30.04 seconds |
| Started | Aug 29 03:41:02 AM UTC 24 |
| Finished | Aug 29 03:41:33 AM UTC 24 |
| Peak memory | 229708 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1081390102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_non_iso_usb_traffic.1081390102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_min_inter_pkt_delay.335318931 |
| Short name | T1677 |
| Test name | |
| Test status | |
| Simulation time | 3178942703 ps |
| CPU time | 28.6 seconds |
| Started | Aug 29 03:41:02 AM UTC 24 |
| Finished | Aug 29 03:41:32 AM UTC 24 |
| Peak memory | 229656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=335318931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_min_inter_pkt_delay.335318931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_min_length_in_transaction.1991853742 |
| Short name | T1755 |
| Test name | |
| Test status | |
| Simulation time | 182830217 ps |
| CPU time | 0.98 seconds |
| Started | Aug 29 03:41:22 AM UTC 24 |
| Finished | Aug 29 03:41:24 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1991853742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 22.usbdev_min_length_in_transaction.1991853742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_min_length_out_transaction.1663287909 |
| Short name | T1753 |
| Test name | |
| Test status | |
| Simulation time | 148470738 ps |
| CPU time | 0.76 seconds |
| Started | Aug 29 03:41:22 AM UTC 24 |
| Finished | Aug 29 03:41:24 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1663287909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 22.usbdev_min_length_out_transaction.1663287909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_nak_trans.2736576691 |
| Short name | T129 |
| Test name | |
| Test status | |
| Simulation time | 186687055 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:41:22 AM UTC 24 |
| Finished | Aug 29 03:41:24 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2736576691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_nak_trans.2736576691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_out_iso.1427354907 |
| Short name | T1752 |
| Test name | |
| Test status | |
| Simulation time | 143730850 ps |
| CPU time | 0.75 seconds |
| Started | Aug 29 03:41:22 AM UTC 24 |
| Finished | Aug 29 03:41:24 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1427354907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 22.usbdev_out_iso.1427354907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_out_stall.1910839079 |
| Short name | T1754 |
| Test name | |
| Test status | |
| Simulation time | 172584363 ps |
| CPU time | 0.88 seconds |
| Started | Aug 29 03:41:22 AM UTC 24 |
| Finished | Aug 29 03:41:24 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1910839079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_out_stall.1910839079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_out_trans_nak.3131400215 |
| Short name | T1759 |
| Test name | |
| Test status | |
| Simulation time | 169932976 ps |
| CPU time | 1.03 seconds |
| Started | Aug 29 03:41:22 AM UTC 24 |
| Finished | Aug 29 03:41:24 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3131400215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 22.usbdev_out_trans_nak.3131400215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_pending_in_trans.4162951681 |
| Short name | T1756 |
| Test name | |
| Test status | |
| Simulation time | 156593761 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 03:41:22 AM UTC 24 |
| Finished | Aug 29 03:41:24 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4162951681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 22.usbdev_pending_in_trans.4162951681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_phy_config_pinflip.3579173407 |
| Short name | T1757 |
| Test name | |
| Test status | |
| Simulation time | 231664610 ps |
| CPU time | 1.01 seconds |
| Started | Aug 29 03:41:22 AM UTC 24 |
| Finished | Aug 29 03:41:24 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3579173407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 22.usbdev_phy_config_pinflip.3579173407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_phy_config_usb_ref_disable.4281231719 |
| Short name | T1764 |
| Test name | |
| Test status | |
| Simulation time | 186901757 ps |
| CPU time | 1.04 seconds |
| Started | Aug 29 03:41:22 AM UTC 24 |
| Finished | Aug 29 03:41:24 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4281231719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 22.usbdev_phy_config_usb_ref_disable.4281231719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_phy_pins_sense.1767607822 |
| Short name | T1758 |
| Test name | |
| Test status | |
| Simulation time | 52909743 ps |
| CPU time | 0.73 seconds |
| Started | Aug 29 03:41:22 AM UTC 24 |
| Finished | Aug 29 03:41:24 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1767607822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_phy_pins_sense.1767607822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_buffer.3040752518 |
| Short name | T1817 |
| Test name | |
| Test status | |
| Simulation time | 10139672840 ps |
| CPU time | 22.58 seconds |
| Started | Aug 29 03:41:22 AM UTC 24 |
| Finished | Aug 29 03:41:46 AM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3040752518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 22.usbdev_pkt_buffer.3040752518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_received.379495301 |
| Short name | T1761 |
| Test name | |
| Test status | |
| Simulation time | 179481460 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 03:41:22 AM UTC 24 |
| Finished | Aug 29 03:41:24 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=379495301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_pkt_received.379495301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_sent.2355619038 |
| Short name | T1766 |
| Test name | |
| Test status | |
| Simulation time | 191145763 ps |
| CPU time | 1.01 seconds |
| Started | Aug 29 03:41:22 AM UTC 24 |
| Finished | Aug 29 03:41:24 AM UTC 24 |
| Peak memory | 214920 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2355619038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_pkt_sent.2355619038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_random_length_in_transaction.1201223748 |
| Short name | T1760 |
| Test name | |
| Test status | |
| Simulation time | 173330133 ps |
| CPU time | 0.82 seconds |
| Started | Aug 29 03:41:22 AM UTC 24 |
| Finished | Aug 29 03:41:24 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1201223748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 22.usbdev_random_length_in_transaction.1201223748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_random_length_out_transaction.4175818587 |
| Short name | T1765 |
| Test name | |
| Test status | |
| Simulation time | 189649509 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 03:41:22 AM UTC 24 |
| Finished | Aug 29 03:41:24 AM UTC 24 |
| Peak memory | 214968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4175818587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 22.usbdev_random_length_out_transaction.4175818587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_rx_crc_err.3969271835 |
| Short name | T1763 |
| Test name | |
| Test status | |
| Simulation time | 144648508 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 03:41:22 AM UTC 24 |
| Finished | Aug 29 03:41:24 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3969271835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 22.usbdev_rx_crc_err.3969271835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_rx_full.759565009 |
| Short name | T1769 |
| Test name | |
| Test status | |
| Simulation time | 314639612 ps |
| CPU time | 1.06 seconds |
| Started | Aug 29 03:41:22 AM UTC 24 |
| Finished | Aug 29 03:41:25 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=759565009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 22.usbdev_rx_full.759565009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_setup_stage.1405321381 |
| Short name | T1762 |
| Test name | |
| Test status | |
| Simulation time | 202363904 ps |
| CPU time | 0.82 seconds |
| Started | Aug 29 03:41:22 AM UTC 24 |
| Finished | Aug 29 03:41:24 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1405321381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_setup_stage.1405321381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_setup_trans_ignored.3082248227 |
| Short name | T1767 |
| Test name | |
| Test status | |
| Simulation time | 169742802 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 03:41:22 AM UTC 24 |
| Finished | Aug 29 03:41:24 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3082248227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 22.usbdev_setup_trans_ignored.3082248227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_smoke.1611264096 |
| Short name | T1771 |
| Test name | |
| Test status | |
| Simulation time | 227825586 ps |
| CPU time | 1.07 seconds |
| Started | Aug 29 03:41:22 AM UTC 24 |
| Finished | Aug 29 03:41:25 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1611264096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_smoke.1611264096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_spurious_pids_ignored.3691348685 |
| Short name | T1823 |
| Test name | |
| Test status | |
| Simulation time | 3011405493 ps |
| CPU time | 26.21 seconds |
| Started | Aug 29 03:41:22 AM UTC 24 |
| Finished | Aug 29 03:41:50 AM UTC 24 |
| Peak memory | 227460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3691348685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 22.usbdev_spurious_pids_ignored.3691348685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_stall_priority_over_nak.2609290585 |
| Short name | T1768 |
| Test name | |
| Test status | |
| Simulation time | 190332451 ps |
| CPU time | 0.9 seconds |
| Started | Aug 29 03:41:23 AM UTC 24 |
| Finished | Aug 29 03:41:25 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2609290585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_stall_priority_over_nak.2609290585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_stall_trans.1682474401 |
| Short name | T1772 |
| Test name | |
| Test status | |
| Simulation time | 179852611 ps |
| CPU time | 1.03 seconds |
| Started | Aug 29 03:41:23 AM UTC 24 |
| Finished | Aug 29 03:41:25 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1682474401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_stall_trans.1682474401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_stream_len_max.1363028567 |
| Short name | T1779 |
| Test name | |
| Test status | |
| Simulation time | 485217244 ps |
| CPU time | 1.6 seconds |
| Started | Aug 29 03:41:23 AM UTC 24 |
| Finished | Aug 29 03:41:25 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1363028567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_stream_len_max.1363028567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_streaming_out.3264843752 |
| Short name | T1789 |
| Test name | |
| Test status | |
| Simulation time | 2113991327 ps |
| CPU time | 14.32 seconds |
| Started | Aug 29 03:41:23 AM UTC 24 |
| Finished | Aug 29 03:41:38 AM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3264843752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_streaming_out.3264843752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_timeout_missing_host_handshake.4226574280 |
| Short name | T1781 |
| Test name | |
| Test status | |
| Simulation time | 4241673539 ps |
| CPU time | 23.45 seconds |
| Started | Aug 29 03:41:01 AM UTC 24 |
| Finished | Aug 29 03:41:26 AM UTC 24 |
| Peak memory | 217212 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4226574280 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_timeout_missing_host_handshake.4226574280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/22.usbdev_tx_rx_disruption.3412672159 |
| Short name | T1780 |
| Test name | |
| Test status | |
| Simulation time | 659931025 ps |
| CPU time | 1.77 seconds |
| Started | Aug 29 03:41:23 AM UTC 24 |
| Finished | Aug 29 03:41:26 AM UTC 24 |
| Peak memory | 214960 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3412672159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_t x_rx_disruption.3412672159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/22.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/220.usbdev_tx_rx_disruption.2667958455 |
| Short name | T3506 |
| Test name | |
| Test status | |
| Simulation time | 599668852 ps |
| CPU time | 1.56 seconds |
| Started | Aug 29 04:10:19 AM UTC 24 |
| Finished | Aug 29 04:10:23 AM UTC 24 |
| Peak memory | 214860 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2667958455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 220.usbdev_ tx_rx_disruption.2667958455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/220.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/221.usbdev_tx_rx_disruption.2551144100 |
| Short name | T3528 |
| Test name | |
| Test status | |
| Simulation time | 459902322 ps |
| CPU time | 1.37 seconds |
| Started | Aug 29 04:10:19 AM UTC 24 |
| Finished | Aug 29 04:10:22 AM UTC 24 |
| Peak memory | 214832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2551144100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 221.usbdev_ tx_rx_disruption.2551144100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/221.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/222.usbdev_tx_rx_disruption.1202522077 |
| Short name | T3526 |
| Test name | |
| Test status | |
| Simulation time | 431231094 ps |
| CPU time | 1.35 seconds |
| Started | Aug 29 04:10:19 AM UTC 24 |
| Finished | Aug 29 04:10:22 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1202522077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 222.usbdev_ tx_rx_disruption.1202522077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/222.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/223.usbdev_tx_rx_disruption.1386587019 |
| Short name | T3511 |
| Test name | |
| Test status | |
| Simulation time | 612765268 ps |
| CPU time | 1.35 seconds |
| Started | Aug 29 04:10:19 AM UTC 24 |
| Finished | Aug 29 04:10:22 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1386587019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 223.usbdev_ tx_rx_disruption.1386587019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/223.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/224.usbdev_tx_rx_disruption.3262691039 |
| Short name | T3529 |
| Test name | |
| Test status | |
| Simulation time | 464394963 ps |
| CPU time | 1.33 seconds |
| Started | Aug 29 04:10:19 AM UTC 24 |
| Finished | Aug 29 04:10:22 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3262691039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 224.usbdev_ tx_rx_disruption.3262691039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/224.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/225.usbdev_tx_rx_disruption.2404025310 |
| Short name | T3512 |
| Test name | |
| Test status | |
| Simulation time | 600453117 ps |
| CPU time | 1.55 seconds |
| Started | Aug 29 04:10:19 AM UTC 24 |
| Finished | Aug 29 04:10:23 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2404025310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 225.usbdev_ tx_rx_disruption.2404025310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/225.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/226.usbdev_tx_rx_disruption.290871441 |
| Short name | T3525 |
| Test name | |
| Test status | |
| Simulation time | 397027163 ps |
| CPU time | 1.2 seconds |
| Started | Aug 29 04:10:19 AM UTC 24 |
| Finished | Aug 29 04:10:22 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=290871441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 226.usbdev_t x_rx_disruption.290871441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/226.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/227.usbdev_tx_rx_disruption.3675719195 |
| Short name | T3502 |
| Test name | |
| Test status | |
| Simulation time | 534019637 ps |
| CPU time | 1.45 seconds |
| Started | Aug 29 04:10:19 AM UTC 24 |
| Finished | Aug 29 04:10:23 AM UTC 24 |
| Peak memory | 214756 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3675719195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 227.usbdev_ tx_rx_disruption.3675719195 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/227.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/228.usbdev_tx_rx_disruption.715524228 |
| Short name | T3516 |
| Test name | |
| Test status | |
| Simulation time | 502739557 ps |
| CPU time | 1.51 seconds |
| Started | Aug 29 04:10:19 AM UTC 24 |
| Finished | Aug 29 04:10:23 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=715524228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 228.usbdev_t x_rx_disruption.715524228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/228.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/229.usbdev_tx_rx_disruption.2375300958 |
| Short name | T3531 |
| Test name | |
| Test status | |
| Simulation time | 528662416 ps |
| CPU time | 1.33 seconds |
| Started | Aug 29 04:10:19 AM UTC 24 |
| Finished | Aug 29 04:10:22 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2375300958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 229.usbdev_ tx_rx_disruption.2375300958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/229.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_alert_test.30399524 |
| Short name | T1834 |
| Test name | |
| Test status | |
| Simulation time | 37546210 ps |
| CPU time | 0.59 seconds |
| Started | Aug 29 03:42:07 AM UTC 24 |
| Finished | Aug 29 03:42:08 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=30399524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 23.usbdev_alert_test.30399524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_disconnect.3503700211 |
| Short name | T1720 |
| Test name | |
| Test status | |
| Simulation time | 4478743726 ps |
| CPU time | 6.24 seconds |
| Started | Aug 29 03:41:23 AM UTC 24 |
| Finished | Aug 29 03:41:30 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3503700211 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_disconnect.3503700211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_reset.1801634754 |
| Short name | T1822 |
| Test name | |
| Test status | |
| Simulation time | 19100808563 ps |
| CPU time | 23.81 seconds |
| Started | Aug 29 03:41:23 AM UTC 24 |
| Finished | Aug 29 03:41:48 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1801634754 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_reset.1801634754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_resume.410265011 |
| Short name | T1827 |
| Test name | |
| Test status | |
| Simulation time | 28555352075 ps |
| CPU time | 35.82 seconds |
| Started | Aug 29 03:41:23 AM UTC 24 |
| Finished | Aug 29 03:42:00 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=410265011 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_resume.410265011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_av_buffer.249551551 |
| Short name | T1773 |
| Test name | |
| Test status | |
| Simulation time | 158340290 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 03:41:23 AM UTC 24 |
| Finished | Aug 29 03:41:25 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=249551551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_av_buffer.249551551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_bitstuff_err.3786350055 |
| Short name | T1775 |
| Test name | |
| Test status | |
| Simulation time | 156950807 ps |
| CPU time | 0.97 seconds |
| Started | Aug 29 03:41:23 AM UTC 24 |
| Finished | Aug 29 03:41:25 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3786350055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_bitstuff_err.3786350055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_data_toggle_clear.2676579764 |
| Short name | T1776 |
| Test name | |
| Test status | |
| Simulation time | 265276346 ps |
| CPU time | 1.07 seconds |
| Started | Aug 29 03:41:23 AM UTC 24 |
| Finished | Aug 29 03:41:25 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2676579764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 23.usbdev_data_toggle_clear.2676579764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_data_toggle_restore.192178578 |
| Short name | T1778 |
| Test name | |
| Test status | |
| Simulation time | 323764391 ps |
| CPU time | 1.03 seconds |
| Started | Aug 29 03:41:23 AM UTC 24 |
| Finished | Aug 29 03:41:25 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=192178578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_data_toggle_restore.192178578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_device_address.2534490933 |
| Short name | T1833 |
| Test name | |
| Test status | |
| Simulation time | 24479925289 ps |
| CPU time | 40.62 seconds |
| Started | Aug 29 03:41:23 AM UTC 24 |
| Finished | Aug 29 03:42:05 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2534490933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_device_address.2534490933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_device_timeout.3051451751 |
| Short name | T1785 |
| Test name | |
| Test status | |
| Simulation time | 839631591 ps |
| CPU time | 4.8 seconds |
| Started | Aug 29 03:41:23 AM UTC 24 |
| Finished | Aug 29 03:41:29 AM UTC 24 |
| Peak memory | 217388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3051451751 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_device_timeout.3051451751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_disable_endpoint.3940971140 |
| Short name | T1782 |
| Test name | |
| Test status | |
| Simulation time | 739351956 ps |
| CPU time | 1.7 seconds |
| Started | Aug 29 03:41:23 AM UTC 24 |
| Finished | Aug 29 03:41:26 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3940971140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 23.usbdev_disable_endpoint.3940971140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_disconnected.105460092 |
| Short name | T1777 |
| Test name | |
| Test status | |
| Simulation time | 173843883 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 03:41:23 AM UTC 24 |
| Finished | Aug 29 03:41:25 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=105460092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_disconnected.105460092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_enable.3726332300 |
| Short name | T1774 |
| Test name | |
| Test status | |
| Simulation time | 50259826 ps |
| CPU time | 0.65 seconds |
| Started | Aug 29 03:41:23 AM UTC 24 |
| Finished | Aug 29 03:41:25 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3726332300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 23.usbdev_enable.3726332300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_endpoint_access.2250599080 |
| Short name | T1783 |
| Test name | |
| Test status | |
| Simulation time | 742723721 ps |
| CPU time | 2.17 seconds |
| Started | Aug 29 03:41:23 AM UTC 24 |
| Finished | Aug 29 03:41:27 AM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2250599080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_endpoint_access.2250599080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_fifo_levels.809115914 |
| Short name | T1791 |
| Test name | |
| Test status | |
| Simulation time | 241650794 ps |
| CPU time | 0.98 seconds |
| Started | Aug 29 03:41:43 AM UTC 24 |
| Finished | Aug 29 03:41:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=809115914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 23.usbdev_fifo_levels.809115914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_fifo_rst.2525525894 |
| Short name | T1806 |
| Test name | |
| Test status | |
| Simulation time | 334555161 ps |
| CPU time | 1.79 seconds |
| Started | Aug 29 03:41:43 AM UTC 24 |
| Finished | Aug 29 03:41:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2525525894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_fifo_rst.2525525894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_in_iso.2048874131 |
| Short name | T1796 |
| Test name | |
| Test status | |
| Simulation time | 210635247 ps |
| CPU time | 1 seconds |
| Started | Aug 29 03:41:43 AM UTC 24 |
| Finished | Aug 29 03:41:45 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2048874131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 23.usbdev_in_iso.2048874131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_in_stall.3843220808 |
| Short name | T1790 |
| Test name | |
| Test status | |
| Simulation time | 145166144 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 03:41:43 AM UTC 24 |
| Finished | Aug 29 03:41:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3843220808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_in_stall.3843220808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_in_trans.326734325 |
| Short name | T1795 |
| Test name | |
| Test status | |
| Simulation time | 182320082 ps |
| CPU time | 0.92 seconds |
| Started | Aug 29 03:41:43 AM UTC 24 |
| Finished | Aug 29 03:41:45 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=326734325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 23.usbdev_in_trans.326734325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_invalid_sync.2037432523 |
| Short name | T1912 |
| Test name | |
| Test status | |
| Simulation time | 2838907472 ps |
| CPU time | 67.17 seconds |
| Started | Aug 29 03:41:43 AM UTC 24 |
| Finished | Aug 29 03:42:52 AM UTC 24 |
| Peak memory | 227760 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2037432523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 23.usbdev_invalid_sync.2037432523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_iso_retraction.3797411758 |
| Short name | T1934 |
| Test name | |
| Test status | |
| Simulation time | 7950461878 ps |
| CPU time | 79.64 seconds |
| Started | Aug 29 03:41:43 AM UTC 24 |
| Finished | Aug 29 03:43:05 AM UTC 24 |
| Peak memory | 217392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3797411758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_iso_retraction.3797411758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_link_in_err.3376384263 |
| Short name | T1794 |
| Test name | |
| Test status | |
| Simulation time | 187381535 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:41:43 AM UTC 24 |
| Finished | Aug 29 03:41:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3376384263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_link_in_err.3376384263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_link_resume.2976664831 |
| Short name | T1828 |
| Test name | |
| Test status | |
| Simulation time | 12337511851 ps |
| CPU time | 17.36 seconds |
| Started | Aug 29 03:41:43 AM UTC 24 |
| Finished | Aug 29 03:42:02 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2976664831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_link_resume.2976664831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_link_suspend.1919537095 |
| Short name | T1825 |
| Test name | |
| Test status | |
| Simulation time | 10066918471 ps |
| CPU time | 13.09 seconds |
| Started | Aug 29 03:41:43 AM UTC 24 |
| Finished | Aug 29 03:41:57 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1919537095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_link_suspend.1919537095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_max_inter_pkt_delay.980558670 |
| Short name | T1826 |
| Test name | |
| Test status | |
| Simulation time | 1744634250 ps |
| CPU time | 14.34 seconds |
| Started | Aug 29 03:41:43 AM UTC 24 |
| Finished | Aug 29 03:41:59 AM UTC 24 |
| Peak memory | 229468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=980558670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_inter_pkt_delay.980558670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_max_length_in_transaction.1152074832 |
| Short name | T1797 |
| Test name | |
| Test status | |
| Simulation time | 242462585 ps |
| CPU time | 0.94 seconds |
| Started | Aug 29 03:41:43 AM UTC 24 |
| Finished | Aug 29 03:41:45 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1152074832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 23.usbdev_max_length_in_transaction.1152074832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_max_length_out_transaction.3978711674 |
| Short name | T1798 |
| Test name | |
| Test status | |
| Simulation time | 192369357 ps |
| CPU time | 0.9 seconds |
| Started | Aug 29 03:41:43 AM UTC 24 |
| Finished | Aug 29 03:41:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3978711674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 23.usbdev_max_length_out_transaction.3978711674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_max_non_iso_usb_traffic.2839273386 |
| Short name | T1905 |
| Test name | |
| Test status | |
| Simulation time | 2433021327 ps |
| CPU time | 58.25 seconds |
| Started | Aug 29 03:41:43 AM UTC 24 |
| Finished | Aug 29 03:42:43 AM UTC 24 |
| Peak memory | 229648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2839273386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_non_iso_usb_traffic.2839273386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_min_inter_pkt_delay.206887684 |
| Short name | T1910 |
| Test name | |
| Test status | |
| Simulation time | 2854347397 ps |
| CPU time | 65.43 seconds |
| Started | Aug 29 03:41:43 AM UTC 24 |
| Finished | Aug 29 03:42:51 AM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=206887684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_min_inter_pkt_delay.206887684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_min_length_in_transaction.1450897350 |
| Short name | T1799 |
| Test name | |
| Test status | |
| Simulation time | 206588956 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 03:41:43 AM UTC 24 |
| Finished | Aug 29 03:41:45 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1450897350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_min_length_in_transaction.1450897350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_min_length_out_transaction.4287726567 |
| Short name | T1800 |
| Test name | |
| Test status | |
| Simulation time | 143763264 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 03:41:43 AM UTC 24 |
| Finished | Aug 29 03:41:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4287726567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 23.usbdev_min_length_out_transaction.4287726567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_nak_trans.3400330772 |
| Short name | T149 |
| Test name | |
| Test status | |
| Simulation time | 244914450 ps |
| CPU time | 1.03 seconds |
| Started | Aug 29 03:41:43 AM UTC 24 |
| Finished | Aug 29 03:41:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3400330772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_nak_trans.3400330772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_out_iso.3415275928 |
| Short name | T1807 |
| Test name | |
| Test status | |
| Simulation time | 197692819 ps |
| CPU time | 1.08 seconds |
| Started | Aug 29 03:41:43 AM UTC 24 |
| Finished | Aug 29 03:41:46 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3415275928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 23.usbdev_out_iso.3415275928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_out_stall.1934137835 |
| Short name | T1803 |
| Test name | |
| Test status | |
| Simulation time | 237679613 ps |
| CPU time | 0.9 seconds |
| Started | Aug 29 03:41:43 AM UTC 24 |
| Finished | Aug 29 03:41:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1934137835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_out_stall.1934137835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_out_trans_nak.3447164578 |
| Short name | T1805 |
| Test name | |
| Test status | |
| Simulation time | 164670630 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 03:41:44 AM UTC 24 |
| Finished | Aug 29 03:41:46 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3447164578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 23.usbdev_out_trans_nak.3447164578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_pending_in_trans.2569459760 |
| Short name | T1801 |
| Test name | |
| Test status | |
| Simulation time | 192117208 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 03:41:44 AM UTC 24 |
| Finished | Aug 29 03:41:46 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2569459760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 23.usbdev_pending_in_trans.2569459760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_phy_config_pinflip.2490952316 |
| Short name | T1814 |
| Test name | |
| Test status | |
| Simulation time | 237044675 ps |
| CPU time | 1.23 seconds |
| Started | Aug 29 03:41:44 AM UTC 24 |
| Finished | Aug 29 03:41:46 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2490952316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 23.usbdev_phy_config_pinflip.2490952316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_phy_config_usb_ref_disable.3254493749 |
| Short name | T1811 |
| Test name | |
| Test status | |
| Simulation time | 139839496 ps |
| CPU time | 1.13 seconds |
| Started | Aug 29 03:41:44 AM UTC 24 |
| Finished | Aug 29 03:41:46 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3254493749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 23.usbdev_phy_config_usb_ref_disable.3254493749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_phy_pins_sense.723632957 |
| Short name | T41 |
| Test name | |
| Test status | |
| Simulation time | 41113596 ps |
| CPU time | 0.92 seconds |
| Started | Aug 29 03:41:44 AM UTC 24 |
| Finished | Aug 29 03:41:46 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=723632957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 23.usbdev_phy_pins_sense.723632957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_buffer.1358137210 |
| Short name | T1830 |
| Test name | |
| Test status | |
| Simulation time | 6799043543 ps |
| CPU time | 17.48 seconds |
| Started | Aug 29 03:41:44 AM UTC 24 |
| Finished | Aug 29 03:42:02 AM UTC 24 |
| Peak memory | 231640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1358137210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 23.usbdev_pkt_buffer.1358137210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_received.1797241853 |
| Short name | T1802 |
| Test name | |
| Test status | |
| Simulation time | 176630482 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 03:41:44 AM UTC 24 |
| Finished | Aug 29 03:41:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1797241853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_pkt_received.1797241853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_sent.3921580405 |
| Short name | T1809 |
| Test name | |
| Test status | |
| Simulation time | 247685844 ps |
| CPU time | 1 seconds |
| Started | Aug 29 03:41:44 AM UTC 24 |
| Finished | Aug 29 03:41:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3921580405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_pkt_sent.3921580405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_random_length_in_transaction.2522966296 |
| Short name | T1819 |
| Test name | |
| Test status | |
| Simulation time | 237472400 ps |
| CPU time | 1.26 seconds |
| Started | Aug 29 03:41:44 AM UTC 24 |
| Finished | Aug 29 03:41:46 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2522966296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 23.usbdev_random_length_in_transaction.2522966296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_random_length_out_transaction.1427887984 |
| Short name | T1808 |
| Test name | |
| Test status | |
| Simulation time | 171846216 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 03:41:44 AM UTC 24 |
| Finished | Aug 29 03:41:46 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1427887984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_random_length_out_transaction.1427887984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_rx_crc_err.1896687194 |
| Short name | T1813 |
| Test name | |
| Test status | |
| Simulation time | 175212363 ps |
| CPU time | 0.98 seconds |
| Started | Aug 29 03:41:44 AM UTC 24 |
| Finished | Aug 29 03:41:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1896687194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 23.usbdev_rx_crc_err.1896687194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_rx_full.3112844376 |
| Short name | T365 |
| Test name | |
| Test status | |
| Simulation time | 250962688 ps |
| CPU time | 1.04 seconds |
| Started | Aug 29 03:41:44 AM UTC 24 |
| Finished | Aug 29 03:41:46 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3112844376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 23.usbdev_rx_full.3112844376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_setup_stage.3811584714 |
| Short name | T1812 |
| Test name | |
| Test status | |
| Simulation time | 157968041 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 03:41:44 AM UTC 24 |
| Finished | Aug 29 03:41:46 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3811584714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_setup_stage.3811584714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_setup_trans_ignored.3818801956 |
| Short name | T1810 |
| Test name | |
| Test status | |
| Simulation time | 154222380 ps |
| CPU time | 0.77 seconds |
| Started | Aug 29 03:41:44 AM UTC 24 |
| Finished | Aug 29 03:41:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3818801956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 23.usbdev_setup_trans_ignored.3818801956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_smoke.2125785921 |
| Short name | T1820 |
| Test name | |
| Test status | |
| Simulation time | 225223223 ps |
| CPU time | 1.23 seconds |
| Started | Aug 29 03:41:44 AM UTC 24 |
| Finished | Aug 29 03:41:46 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2125785921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_smoke.2125785921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_spurious_pids_ignored.2981717454 |
| Short name | T1832 |
| Test name | |
| Test status | |
| Simulation time | 2813411039 ps |
| CPU time | 18.51 seconds |
| Started | Aug 29 03:41:44 AM UTC 24 |
| Finished | Aug 29 03:42:04 AM UTC 24 |
| Peak memory | 234244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2981717454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 23.usbdev_spurious_pids_ignored.2981717454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_stall_priority_over_nak.3029286850 |
| Short name | T1815 |
| Test name | |
| Test status | |
| Simulation time | 190724980 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 03:41:44 AM UTC 24 |
| Finished | Aug 29 03:41:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3029286850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_stall_priority_over_nak.3029286850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_stall_trans.15719872 |
| Short name | T1818 |
| Test name | |
| Test status | |
| Simulation time | 189506144 ps |
| CPU time | 1.07 seconds |
| Started | Aug 29 03:41:44 AM UTC 24 |
| Finished | Aug 29 03:41:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=15719872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_stall_trans.15719872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_stream_len_max.3907913553 |
| Short name | T1816 |
| Test name | |
| Test status | |
| Simulation time | 198451339 ps |
| CPU time | 0.94 seconds |
| Started | Aug 29 03:41:44 AM UTC 24 |
| Finished | Aug 29 03:41:46 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3907913553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_stream_len_max.3907913553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_streaming_out.3617722929 |
| Short name | T1722 |
| Test name | |
| Test status | |
| Simulation time | 3178823403 ps |
| CPU time | 25.95 seconds |
| Started | Aug 29 03:41:44 AM UTC 24 |
| Finished | Aug 29 03:42:11 AM UTC 24 |
| Peak memory | 229572 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3617722929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_streaming_out.3617722929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_timeout_missing_host_handshake.3492305561 |
| Short name | T1831 |
| Test name | |
| Test status | |
| Simulation time | 4802235886 ps |
| CPU time | 38.15 seconds |
| Started | Aug 29 03:41:23 AM UTC 24 |
| Finished | Aug 29 03:42:03 AM UTC 24 |
| Peak memory | 217052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3492305561 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_timeout_missing_host_handshake.3492305561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/23.usbdev_tx_rx_disruption.3347907956 |
| Short name | T1821 |
| Test name | |
| Test status | |
| Simulation time | 579752721 ps |
| CPU time | 1.41 seconds |
| Started | Aug 29 03:41:44 AM UTC 24 |
| Finished | Aug 29 03:41:47 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3347907956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_t x_rx_disruption.3347907956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/23.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/230.usbdev_tx_rx_disruption.102294963 |
| Short name | T3534 |
| Test name | |
| Test status | |
| Simulation time | 616251502 ps |
| CPU time | 1.57 seconds |
| Started | Aug 29 04:10:19 AM UTC 24 |
| Finished | Aug 29 04:10:23 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=102294963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 230.usbdev_t x_rx_disruption.102294963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/230.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/231.usbdev_tx_rx_disruption.2714002107 |
| Short name | T3537 |
| Test name | |
| Test status | |
| Simulation time | 670791972 ps |
| CPU time | 1.71 seconds |
| Started | Aug 29 04:10:19 AM UTC 24 |
| Finished | Aug 29 04:10:23 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2714002107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 231.usbdev_ tx_rx_disruption.2714002107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/231.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/232.usbdev_tx_rx_disruption.1242636833 |
| Short name | T3532 |
| Test name | |
| Test status | |
| Simulation time | 590929342 ps |
| CPU time | 1.43 seconds |
| Started | Aug 29 04:10:19 AM UTC 24 |
| Finished | Aug 29 04:10:23 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1242636833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 232.usbdev_ tx_rx_disruption.1242636833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/232.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/233.usbdev_tx_rx_disruption.1191889983 |
| Short name | T3538 |
| Test name | |
| Test status | |
| Simulation time | 676013939 ps |
| CPU time | 1.58 seconds |
| Started | Aug 29 04:10:19 AM UTC 24 |
| Finished | Aug 29 04:10:23 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1191889983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 233.usbdev_ tx_rx_disruption.1191889983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/233.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/234.usbdev_tx_rx_disruption.3448725093 |
| Short name | T3539 |
| Test name | |
| Test status | |
| Simulation time | 613393475 ps |
| CPU time | 1.6 seconds |
| Started | Aug 29 04:10:19 AM UTC 24 |
| Finished | Aug 29 04:10:23 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3448725093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 234.usbdev_ tx_rx_disruption.3448725093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/234.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/235.usbdev_tx_rx_disruption.3164818898 |
| Short name | T3536 |
| Test name | |
| Test status | |
| Simulation time | 597430168 ps |
| CPU time | 1.6 seconds |
| Started | Aug 29 04:10:19 AM UTC 24 |
| Finished | Aug 29 04:10:23 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3164818898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 235.usbdev_ tx_rx_disruption.3164818898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/235.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/236.usbdev_tx_rx_disruption.3340328827 |
| Short name | T3540 |
| Test name | |
| Test status | |
| Simulation time | 558434978 ps |
| CPU time | 1.8 seconds |
| Started | Aug 29 04:10:19 AM UTC 24 |
| Finished | Aug 29 04:10:23 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3340328827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 236.usbdev_ tx_rx_disruption.3340328827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/236.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/237.usbdev_tx_rx_disruption.2887352449 |
| Short name | T3533 |
| Test name | |
| Test status | |
| Simulation time | 540295158 ps |
| CPU time | 1.42 seconds |
| Started | Aug 29 04:10:19 AM UTC 24 |
| Finished | Aug 29 04:10:23 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2887352449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 237.usbdev_ tx_rx_disruption.2887352449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/237.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/238.usbdev_tx_rx_disruption.1865755931 |
| Short name | T3543 |
| Test name | |
| Test status | |
| Simulation time | 526590432 ps |
| CPU time | 1.58 seconds |
| Started | Aug 29 04:11:38 AM UTC 24 |
| Finished | Aug 29 04:11:41 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1865755931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 238.usbdev_ tx_rx_disruption.1865755931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/238.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/239.usbdev_tx_rx_disruption.4164263406 |
| Short name | T3553 |
| Test name | |
| Test status | |
| Simulation time | 531737118 ps |
| CPU time | 1.8 seconds |
| Started | Aug 29 04:11:38 AM UTC 24 |
| Finished | Aug 29 04:11:41 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4164263406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 239.usbdev_ tx_rx_disruption.4164263406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/239.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_alert_test.4212001539 |
| Short name | T1873 |
| Test name | |
| Test status | |
| Simulation time | 39193430 ps |
| CPU time | 0.6 seconds |
| Started | Aug 29 03:42:31 AM UTC 24 |
| Finished | Aug 29 03:42:33 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4212001539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 24.usbdev_alert_test.4212001539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_disconnect.218837791 |
| Short name | T1858 |
| Test name | |
| Test status | |
| Simulation time | 5872669349 ps |
| CPU time | 9.28 seconds |
| Started | Aug 29 03:42:07 AM UTC 24 |
| Finished | Aug 29 03:42:17 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=218837791 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_disconnect.218837791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_reset.3258679465 |
| Short name | T1899 |
| Test name | |
| Test status | |
| Simulation time | 19277600489 ps |
| CPU time | 27.03 seconds |
| Started | Aug 29 03:42:07 AM UTC 24 |
| Finished | Aug 29 03:42:35 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3258679465 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_reset.3258679465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_resume.2996468271 |
| Short name | T1908 |
| Test name | |
| Test status | |
| Simulation time | 30557241295 ps |
| CPU time | 40.11 seconds |
| Started | Aug 29 03:42:07 AM UTC 24 |
| Finished | Aug 29 03:42:48 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2996468271 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_resume.2996468271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_av_buffer.4139728061 |
| Short name | T1835 |
| Test name | |
| Test status | |
| Simulation time | 202554253 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 03:42:07 AM UTC 24 |
| Finished | Aug 29 03:42:08 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4139728061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_av_buffer.4139728061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_bitstuff_err.1200934819 |
| Short name | T1836 |
| Test name | |
| Test status | |
| Simulation time | 144969327 ps |
| CPU time | 0.77 seconds |
| Started | Aug 29 03:42:07 AM UTC 24 |
| Finished | Aug 29 03:42:09 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1200934819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_bitstuff_err.1200934819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_data_toggle_clear.3512931822 |
| Short name | T1847 |
| Test name | |
| Test status | |
| Simulation time | 438329565 ps |
| CPU time | 1.75 seconds |
| Started | Aug 29 03:42:07 AM UTC 24 |
| Finished | Aug 29 03:42:10 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3512931822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 24.usbdev_data_toggle_clear.3512931822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_data_toggle_restore.1915835704 |
| Short name | T1838 |
| Test name | |
| Test status | |
| Simulation time | 301263059 ps |
| CPU time | 1.03 seconds |
| Started | Aug 29 03:42:07 AM UTC 24 |
| Finished | Aug 29 03:42:09 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1915835704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_data_toggle_restore.1915835704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_device_address.2757662408 |
| Short name | T608 |
| Test name | |
| Test status | |
| Simulation time | 36558825723 ps |
| CPU time | 52.78 seconds |
| Started | Aug 29 03:42:07 AM UTC 24 |
| Finished | Aug 29 03:43:01 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2757662408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_device_address.2757662408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_device_timeout.2961651337 |
| Short name | T1860 |
| Test name | |
| Test status | |
| Simulation time | 2975430019 ps |
| CPU time | 20.93 seconds |
| Started | Aug 29 03:42:07 AM UTC 24 |
| Finished | Aug 29 03:42:29 AM UTC 24 |
| Peak memory | 217316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2961651337 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_device_timeout.2961651337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_disable_endpoint.4238908466 |
| Short name | T1804 |
| Test name | |
| Test status | |
| Simulation time | 857335591 ps |
| CPU time | 2.23 seconds |
| Started | Aug 29 03:42:07 AM UTC 24 |
| Finished | Aug 29 03:42:10 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4238908466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 24.usbdev_disable_endpoint.4238908466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_disconnected.2083612348 |
| Short name | T1841 |
| Test name | |
| Test status | |
| Simulation time | 141172883 ps |
| CPU time | 0.88 seconds |
| Started | Aug 29 03:42:07 AM UTC 24 |
| Finished | Aug 29 03:42:09 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2083612348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_disconnected.2083612348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_enable.4212834274 |
| Short name | T1837 |
| Test name | |
| Test status | |
| Simulation time | 34440039 ps |
| CPU time | 0.61 seconds |
| Started | Aug 29 03:42:07 AM UTC 24 |
| Finished | Aug 29 03:42:09 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4212834274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 24.usbdev_enable.4212834274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_endpoint_access.470515234 |
| Short name | T1792 |
| Test name | |
| Test status | |
| Simulation time | 821232448 ps |
| CPU time | 2.08 seconds |
| Started | Aug 29 03:42:07 AM UTC 24 |
| Finished | Aug 29 03:42:10 AM UTC 24 |
| Peak memory | 217328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=470515234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_endpoint_access.470515234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_fifo_levels.364384766 |
| Short name | T1842 |
| Test name | |
| Test status | |
| Simulation time | 181536751 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 03:42:07 AM UTC 24 |
| Finished | Aug 29 03:42:09 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=364384766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_fifo_levels.364384766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_fifo_rst.2094332813 |
| Short name | T1840 |
| Test name | |
| Test status | |
| Simulation time | 296611275 ps |
| CPU time | 2.59 seconds |
| Started | Aug 29 03:42:07 AM UTC 24 |
| Finished | Aug 29 03:42:11 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2094332813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_fifo_rst.2094332813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_in_iso.915072651 |
| Short name | T1846 |
| Test name | |
| Test status | |
| Simulation time | 269762767 ps |
| CPU time | 1.24 seconds |
| Started | Aug 29 03:42:07 AM UTC 24 |
| Finished | Aug 29 03:42:10 AM UTC 24 |
| Peak memory | 227416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=915072651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 24.usbdev_in_iso.915072651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_in_stall.341302424 |
| Short name | T1843 |
| Test name | |
| Test status | |
| Simulation time | 151293010 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 03:42:07 AM UTC 24 |
| Finished | Aug 29 03:42:09 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=341302424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 24.usbdev_in_stall.341302424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_in_trans.4042505864 |
| Short name | T1844 |
| Test name | |
| Test status | |
| Simulation time | 242213213 ps |
| CPU time | 1 seconds |
| Started | Aug 29 03:42:07 AM UTC 24 |
| Finished | Aug 29 03:42:09 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4042505864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_in_trans.4042505864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_invalid_sync.2244955481 |
| Short name | T1933 |
| Test name | |
| Test status | |
| Simulation time | 5740743150 ps |
| CPU time | 49.18 seconds |
| Started | Aug 29 03:42:07 AM UTC 24 |
| Finished | Aug 29 03:42:58 AM UTC 24 |
| Peak memory | 234240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2244955481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 24.usbdev_invalid_sync.2244955481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_iso_retraction.644747688 |
| Short name | T2057 |
| Test name | |
| Test status | |
| Simulation time | 12047593713 ps |
| CPU time | 137.02 seconds |
| Started | Aug 29 03:42:07 AM UTC 24 |
| Finished | Aug 29 03:44:27 AM UTC 24 |
| Peak memory | 218988 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=644747688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 24.usbdev_iso_retraction.644747688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_link_in_err.688092419 |
| Short name | T1855 |
| Test name | |
| Test status | |
| Simulation time | 213891048 ps |
| CPU time | 1.33 seconds |
| Started | Aug 29 03:42:07 AM UTC 24 |
| Finished | Aug 29 03:42:10 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=688092419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_link_in_err.688092419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_link_resume.4287438108 |
| Short name | T1902 |
| Test name | |
| Test status | |
| Simulation time | 22857843516 ps |
| CPU time | 29.15 seconds |
| Started | Aug 29 03:42:07 AM UTC 24 |
| Finished | Aug 29 03:42:38 AM UTC 24 |
| Peak memory | 217208 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4287438108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_link_resume.4287438108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_link_suspend.1099185201 |
| Short name | T1724 |
| Test name | |
| Test status | |
| Simulation time | 3698595928 ps |
| CPU time | 6.11 seconds |
| Started | Aug 29 03:42:07 AM UTC 24 |
| Finished | Aug 29 03:42:15 AM UTC 24 |
| Peak memory | 227416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1099185201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_link_suspend.1099185201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_low_speed_traffic.364317081 |
| Short name | T1863 |
| Test name | |
| Test status | |
| Simulation time | 3190189052 ps |
| CPU time | 21.83 seconds |
| Started | Aug 29 03:42:07 AM UTC 24 |
| Finished | Aug 29 03:42:31 AM UTC 24 |
| Peak memory | 234212 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=364317081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_low_speed_traffic.364317081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_max_inter_pkt_delay.1820582243 |
| Short name | T1864 |
| Test name | |
| Test status | |
| Simulation time | 3447425243 ps |
| CPU time | 23.01 seconds |
| Started | Aug 29 03:42:07 AM UTC 24 |
| Finished | Aug 29 03:42:32 AM UTC 24 |
| Peak memory | 227660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1820582243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_inter_pkt_delay.1820582243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_max_length_in_transaction.2695268794 |
| Short name | T1845 |
| Test name | |
| Test status | |
| Simulation time | 268978928 ps |
| CPU time | 0.94 seconds |
| Started | Aug 29 03:42:07 AM UTC 24 |
| Finished | Aug 29 03:42:10 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2695268794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 24.usbdev_max_length_in_transaction.2695268794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_max_length_out_transaction.3933798141 |
| Short name | T1850 |
| Test name | |
| Test status | |
| Simulation time | 193093238 ps |
| CPU time | 0.99 seconds |
| Started | Aug 29 03:42:07 AM UTC 24 |
| Finished | Aug 29 03:42:10 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3933798141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_max_length_out_transaction.3933798141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_max_non_iso_usb_traffic.1144752775 |
| Short name | T1979 |
| Test name | |
| Test status | |
| Simulation time | 3308823439 ps |
| CPU time | 80.65 seconds |
| Started | Aug 29 03:42:07 AM UTC 24 |
| Finished | Aug 29 03:43:30 AM UTC 24 |
| Peak memory | 227616 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1144752775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_non_iso_usb_traffic.1144752775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_min_inter_pkt_delay.2212953338 |
| Short name | T1862 |
| Test name | |
| Test status | |
| Simulation time | 3329989010 ps |
| CPU time | 21.23 seconds |
| Started | Aug 29 03:42:07 AM UTC 24 |
| Finished | Aug 29 03:42:30 AM UTC 24 |
| Peak memory | 217384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2212953338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_min_inter_pkt_delay.2212953338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_min_length_in_transaction.1443638532 |
| Short name | T1854 |
| Test name | |
| Test status | |
| Simulation time | 167205765 ps |
| CPU time | 1.17 seconds |
| Started | Aug 29 03:42:08 AM UTC 24 |
| Finished | Aug 29 03:42:10 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1443638532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 24.usbdev_min_length_in_transaction.1443638532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_min_length_out_transaction.2430347759 |
| Short name | T1839 |
| Test name | |
| Test status | |
| Simulation time | 143840611 ps |
| CPU time | 1.13 seconds |
| Started | Aug 29 03:42:08 AM UTC 24 |
| Finished | Aug 29 03:42:10 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2430347759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_min_length_out_transaction.2430347759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_nak_trans.2397827459 |
| Short name | T147 |
| Test name | |
| Test status | |
| Simulation time | 218836256 ps |
| CPU time | 0.92 seconds |
| Started | Aug 29 03:42:08 AM UTC 24 |
| Finished | Aug 29 03:42:10 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2397827459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_nak_trans.2397827459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_out_iso.3529055865 |
| Short name | T1848 |
| Test name | |
| Test status | |
| Simulation time | 189868891 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:42:08 AM UTC 24 |
| Finished | Aug 29 03:42:10 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3529055865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 24.usbdev_out_iso.3529055865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_out_stall.3534902765 |
| Short name | T1852 |
| Test name | |
| Test status | |
| Simulation time | 156300359 ps |
| CPU time | 0.9 seconds |
| Started | Aug 29 03:42:08 AM UTC 24 |
| Finished | Aug 29 03:42:10 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3534902765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_out_stall.3534902765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_out_trans_nak.1414682793 |
| Short name | T1853 |
| Test name | |
| Test status | |
| Simulation time | 230391781 ps |
| CPU time | 0.99 seconds |
| Started | Aug 29 03:42:08 AM UTC 24 |
| Finished | Aug 29 03:42:10 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1414682793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 24.usbdev_out_trans_nak.1414682793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_pending_in_trans.1215779170 |
| Short name | T1849 |
| Test name | |
| Test status | |
| Simulation time | 160123803 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 03:42:08 AM UTC 24 |
| Finished | Aug 29 03:42:10 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1215779170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 24.usbdev_pending_in_trans.1215779170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_phy_config_pinflip.1760865649 |
| Short name | T1857 |
| Test name | |
| Test status | |
| Simulation time | 214504469 ps |
| CPU time | 1.16 seconds |
| Started | Aug 29 03:42:08 AM UTC 24 |
| Finished | Aug 29 03:42:10 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1760865649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 24.usbdev_phy_config_pinflip.1760865649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_phy_config_usb_ref_disable.3093790722 |
| Short name | T1856 |
| Test name | |
| Test status | |
| Simulation time | 164771899 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 03:42:08 AM UTC 24 |
| Finished | Aug 29 03:42:10 AM UTC 24 |
| Peak memory | 215004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3093790722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_phy_config_usb_ref_disable.3093790722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_phy_pins_sense.2323416249 |
| Short name | T1851 |
| Test name | |
| Test status | |
| Simulation time | 63136593 ps |
| CPU time | 0.7 seconds |
| Started | Aug 29 03:42:08 AM UTC 24 |
| Finished | Aug 29 03:42:10 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2323416249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_phy_pins_sense.2323416249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_buffer.2440151350 |
| Short name | T1938 |
| Test name | |
| Test status | |
| Simulation time | 15238000352 ps |
| CPU time | 38.36 seconds |
| Started | Aug 29 03:42:30 AM UTC 24 |
| Finished | Aug 29 03:43:10 AM UTC 24 |
| Peak memory | 227612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2440151350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_pkt_buffer.2440151350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_received.2055046332 |
| Short name | T1865 |
| Test name | |
| Test status | |
| Simulation time | 165322064 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 03:42:30 AM UTC 24 |
| Finished | Aug 29 03:42:32 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2055046332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_pkt_received.2055046332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_sent.598694882 |
| Short name | T1870 |
| Test name | |
| Test status | |
| Simulation time | 229694580 ps |
| CPU time | 0.95 seconds |
| Started | Aug 29 03:42:30 AM UTC 24 |
| Finished | Aug 29 03:42:33 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=598694882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 24.usbdev_pkt_sent.598694882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_random_length_in_transaction.2088731841 |
| Short name | T1867 |
| Test name | |
| Test status | |
| Simulation time | 193735360 ps |
| CPU time | 0.91 seconds |
| Started | Aug 29 03:42:30 AM UTC 24 |
| Finished | Aug 29 03:42:32 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2088731841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 24.usbdev_random_length_in_transaction.2088731841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_random_length_out_transaction.2609480773 |
| Short name | T1868 |
| Test name | |
| Test status | |
| Simulation time | 192874344 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 03:42:30 AM UTC 24 |
| Finished | Aug 29 03:42:33 AM UTC 24 |
| Peak memory | 215008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2609480773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 24.usbdev_random_length_out_transaction.2609480773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_rx_crc_err.4166306777 |
| Short name | T1866 |
| Test name | |
| Test status | |
| Simulation time | 138255145 ps |
| CPU time | 0.74 seconds |
| Started | Aug 29 03:42:30 AM UTC 24 |
| Finished | Aug 29 03:42:32 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4166306777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_rx_crc_err.4166306777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_rx_full.1285686744 |
| Short name | T1874 |
| Test name | |
| Test status | |
| Simulation time | 288527287 ps |
| CPU time | 1.12 seconds |
| Started | Aug 29 03:42:30 AM UTC 24 |
| Finished | Aug 29 03:42:33 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1285686744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 24.usbdev_rx_full.1285686744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_setup_stage.154913805 |
| Short name | T1869 |
| Test name | |
| Test status | |
| Simulation time | 171824512 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 03:42:31 AM UTC 24 |
| Finished | Aug 29 03:42:33 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=154913805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_setup_stage.154913805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_setup_trans_ignored.322747502 |
| Short name | T1871 |
| Test name | |
| Test status | |
| Simulation time | 159647493 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 03:42:31 AM UTC 24 |
| Finished | Aug 29 03:42:33 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=322747502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 24.usbdev_setup_trans_ignored.322747502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_smoke.2926229103 |
| Short name | T1881 |
| Test name | |
| Test status | |
| Simulation time | 251330669 ps |
| CPU time | 1.01 seconds |
| Started | Aug 29 03:42:31 AM UTC 24 |
| Finished | Aug 29 03:42:33 AM UTC 24 |
| Peak memory | 216776 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2926229103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_smoke.2926229103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_spurious_pids_ignored.884999066 |
| Short name | T1911 |
| Test name | |
| Test status | |
| Simulation time | 2841982569 ps |
| CPU time | 19.32 seconds |
| Started | Aug 29 03:42:31 AM UTC 24 |
| Finished | Aug 29 03:42:51 AM UTC 24 |
| Peak memory | 234100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=884999066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 24.usbdev_spurious_pids_ignored.884999066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_stall_priority_over_nak.1568512082 |
| Short name | T1880 |
| Test name | |
| Test status | |
| Simulation time | 230362478 ps |
| CPU time | 0.98 seconds |
| Started | Aug 29 03:42:31 AM UTC 24 |
| Finished | Aug 29 03:42:33 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1568512082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_stall_priority_over_nak.1568512082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_stall_trans.3316458784 |
| Short name | T1879 |
| Test name | |
| Test status | |
| Simulation time | 216078249 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 03:42:31 AM UTC 24 |
| Finished | Aug 29 03:42:33 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3316458784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_stall_trans.3316458784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_stream_len_max.3797300872 |
| Short name | T1895 |
| Test name | |
| Test status | |
| Simulation time | 859141259 ps |
| CPU time | 2.29 seconds |
| Started | Aug 29 03:42:31 AM UTC 24 |
| Finished | Aug 29 03:42:34 AM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3797300872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_stream_len_max.3797300872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_streaming_out.316221410 |
| Short name | T1909 |
| Test name | |
| Test status | |
| Simulation time | 1916026799 ps |
| CPU time | 16.37 seconds |
| Started | Aug 29 03:42:31 AM UTC 24 |
| Finished | Aug 29 03:42:48 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=316221410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_streaming_out.316221410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_timeout_missing_host_handshake.4167913495 |
| Short name | T1903 |
| Test name | |
| Test status | |
| Simulation time | 5589725524 ps |
| CPU time | 32 seconds |
| Started | Aug 29 03:42:07 AM UTC 24 |
| Finished | Aug 29 03:42:40 AM UTC 24 |
| Peak memory | 217448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4167913495 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_timeout_missing_host_handshake.4167913495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/24.usbdev_tx_rx_disruption.1772957432 |
| Short name | T1889 |
| Test name | |
| Test status | |
| Simulation time | 510619621 ps |
| CPU time | 1.6 seconds |
| Started | Aug 29 03:42:31 AM UTC 24 |
| Finished | Aug 29 03:42:34 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1772957432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_t x_rx_disruption.1772957432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/24.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/240.usbdev_tx_rx_disruption.1910549961 |
| Short name | T3545 |
| Test name | |
| Test status | |
| Simulation time | 595383663 ps |
| CPU time | 1.52 seconds |
| Started | Aug 29 04:11:38 AM UTC 24 |
| Finished | Aug 29 04:11:41 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1910549961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 240.usbdev_ tx_rx_disruption.1910549961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/240.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/241.usbdev_tx_rx_disruption.767427302 |
| Short name | T3558 |
| Test name | |
| Test status | |
| Simulation time | 687741222 ps |
| CPU time | 2.02 seconds |
| Started | Aug 29 04:11:38 AM UTC 24 |
| Finished | Aug 29 04:11:42 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=767427302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 241.usbdev_t x_rx_disruption.767427302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/241.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/242.usbdev_tx_rx_disruption.3925803648 |
| Short name | T3552 |
| Test name | |
| Test status | |
| Simulation time | 539522998 ps |
| CPU time | 1.87 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:41 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3925803648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 242.usbdev_ tx_rx_disruption.3925803648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/242.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/243.usbdev_tx_rx_disruption.3804165928 |
| Short name | T3541 |
| Test name | |
| Test status | |
| Simulation time | 481911134 ps |
| CPU time | 1.42 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:41 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3804165928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 243.usbdev_ tx_rx_disruption.3804165928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/243.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/244.usbdev_tx_rx_disruption.3487759940 |
| Short name | T3542 |
| Test name | |
| Test status | |
| Simulation time | 482167833 ps |
| CPU time | 1.39 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:41 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3487759940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 244.usbdev_ tx_rx_disruption.3487759940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/244.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/245.usbdev_tx_rx_disruption.409220363 |
| Short name | T3546 |
| Test name | |
| Test status | |
| Simulation time | 641337138 ps |
| CPU time | 1.51 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:41 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=409220363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 245.usbdev_t x_rx_disruption.409220363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/245.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/246.usbdev_tx_rx_disruption.3378537397 |
| Short name | T3549 |
| Test name | |
| Test status | |
| Simulation time | 422229141 ps |
| CPU time | 1.68 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:41 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3378537397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 246.usbdev_ tx_rx_disruption.3378537397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/246.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/247.usbdev_tx_rx_disruption.415910297 |
| Short name | T3551 |
| Test name | |
| Test status | |
| Simulation time | 524068251 ps |
| CPU time | 1.63 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:41 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=415910297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 247.usbdev_t x_rx_disruption.415910297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/247.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/248.usbdev_tx_rx_disruption.1192257201 |
| Short name | T3547 |
| Test name | |
| Test status | |
| Simulation time | 542963574 ps |
| CPU time | 1.44 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:41 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1192257201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 248.usbdev_ tx_rx_disruption.1192257201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/248.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/249.usbdev_tx_rx_disruption.2285258324 |
| Short name | T3562 |
| Test name | |
| Test status | |
| Simulation time | 551734160 ps |
| CPU time | 1.81 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2285258324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 249.usbdev_ tx_rx_disruption.2285258324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/249.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_alert_test.2432647935 |
| Short name | T1877 |
| Test name | |
| Test status | |
| Simulation time | 97836384 ps |
| CPU time | 0.67 seconds |
| Started | Aug 29 03:42:53 AM UTC 24 |
| Finished | Aug 29 03:42:55 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2432647935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 25.usbdev_alert_test.2432647935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_disconnect.1819812216 |
| Short name | T1906 |
| Test name | |
| Test status | |
| Simulation time | 9451915417 ps |
| CPU time | 12.34 seconds |
| Started | Aug 29 03:42:31 AM UTC 24 |
| Finished | Aug 29 03:42:44 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1819812216 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_disconnect.1819812216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_reset.1546875429 |
| Short name | T261 |
| Test name | |
| Test status | |
| Simulation time | 13735198775 ps |
| CPU time | 17.62 seconds |
| Started | Aug 29 03:42:31 AM UTC 24 |
| Finished | Aug 29 03:42:50 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1546875429 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_reset.1546875429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_resume.1800710466 |
| Short name | T1935 |
| Test name | |
| Test status | |
| Simulation time | 25814373406 ps |
| CPU time | 33.27 seconds |
| Started | Aug 29 03:42:31 AM UTC 24 |
| Finished | Aug 29 03:43:06 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1800710466 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_resume.1800710466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_av_buffer.398384205 |
| Short name | T1882 |
| Test name | |
| Test status | |
| Simulation time | 151923409 ps |
| CPU time | 0.9 seconds |
| Started | Aug 29 03:42:31 AM UTC 24 |
| Finished | Aug 29 03:42:33 AM UTC 24 |
| Peak memory | 214876 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=398384205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_av_buffer.398384205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_bitstuff_err.4101302451 |
| Short name | T1884 |
| Test name | |
| Test status | |
| Simulation time | 150444861 ps |
| CPU time | 0.95 seconds |
| Started | Aug 29 03:42:31 AM UTC 24 |
| Finished | Aug 29 03:42:33 AM UTC 24 |
| Peak memory | 214920 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4101302451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_bitstuff_err.4101302451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_data_toggle_clear.563881841 |
| Short name | T1886 |
| Test name | |
| Test status | |
| Simulation time | 256876990 ps |
| CPU time | 1.03 seconds |
| Started | Aug 29 03:42:31 AM UTC 24 |
| Finished | Aug 29 03:42:33 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=563881841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 25.usbdev_data_toggle_clear.563881841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_device_address.3792201119 |
| Short name | T1984 |
| Test name | |
| Test status | |
| Simulation time | 44314964622 ps |
| CPU time | 71.42 seconds |
| Started | Aug 29 03:42:31 AM UTC 24 |
| Finished | Aug 29 03:43:45 AM UTC 24 |
| Peak memory | 217040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3792201119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_device_address.3792201119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_device_timeout.1132380010 |
| Short name | T1931 |
| Test name | |
| Test status | |
| Simulation time | 2943821223 ps |
| CPU time | 22.56 seconds |
| Started | Aug 29 03:42:31 AM UTC 24 |
| Finished | Aug 29 03:42:55 AM UTC 24 |
| Peak memory | 217316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1132380010 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_device_timeout.1132380010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_disable_endpoint.2025227335 |
| Short name | T1896 |
| Test name | |
| Test status | |
| Simulation time | 603299425 ps |
| CPU time | 1.68 seconds |
| Started | Aug 29 03:42:31 AM UTC 24 |
| Finished | Aug 29 03:42:34 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2025227335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 25.usbdev_disable_endpoint.2025227335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_disconnected.468876786 |
| Short name | T1887 |
| Test name | |
| Test status | |
| Simulation time | 149339932 ps |
| CPU time | 0.9 seconds |
| Started | Aug 29 03:42:31 AM UTC 24 |
| Finished | Aug 29 03:42:33 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=468876786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_disconnected.468876786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_enable.157986794 |
| Short name | T1890 |
| Test name | |
| Test status | |
| Simulation time | 53112249 ps |
| CPU time | 0.88 seconds |
| Started | Aug 29 03:42:31 AM UTC 24 |
| Finished | Aug 29 03:42:34 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=157986794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_enable.157986794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_endpoint_access.1711594102 |
| Short name | T1898 |
| Test name | |
| Test status | |
| Simulation time | 944619466 ps |
| CPU time | 2.32 seconds |
| Started | Aug 29 03:42:31 AM UTC 24 |
| Finished | Aug 29 03:42:35 AM UTC 24 |
| Peak memory | 217196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1711594102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_endpoint_access.1711594102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_endpoint_types.3000640829 |
| Short name | T581 |
| Test name | |
| Test status | |
| Simulation time | 296834739 ps |
| CPU time | 1.18 seconds |
| Started | Aug 29 03:42:31 AM UTC 24 |
| Finished | Aug 29 03:42:34 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3000640829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_endpoint_types.3000640829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_fifo_levels.2467292594 |
| Short name | T1891 |
| Test name | |
| Test status | |
| Simulation time | 200625161 ps |
| CPU time | 0.97 seconds |
| Started | Aug 29 03:42:31 AM UTC 24 |
| Finished | Aug 29 03:42:34 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2467292594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_fifo_levels.2467292594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_fifo_rst.1330744584 |
| Short name | T1900 |
| Test name | |
| Test status | |
| Simulation time | 290036808 ps |
| CPU time | 2.34 seconds |
| Started | Aug 29 03:42:31 AM UTC 24 |
| Finished | Aug 29 03:42:35 AM UTC 24 |
| Peak memory | 217344 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1330744584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_fifo_rst.1330744584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_in_iso.1611767319 |
| Short name | T1892 |
| Test name | |
| Test status | |
| Simulation time | 220909396 ps |
| CPU time | 1.09 seconds |
| Started | Aug 29 03:42:31 AM UTC 24 |
| Finished | Aug 29 03:42:34 AM UTC 24 |
| Peak memory | 227368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1611767319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 25.usbdev_in_iso.1611767319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_in_stall.4275210223 |
| Short name | T1888 |
| Test name | |
| Test status | |
| Simulation time | 146541004 ps |
| CPU time | 0.76 seconds |
| Started | Aug 29 03:42:31 AM UTC 24 |
| Finished | Aug 29 03:42:34 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4275210223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_in_stall.4275210223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_in_trans.3106337289 |
| Short name | T1893 |
| Test name | |
| Test status | |
| Simulation time | 204322126 ps |
| CPU time | 0.98 seconds |
| Started | Aug 29 03:42:31 AM UTC 24 |
| Finished | Aug 29 03:42:34 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3106337289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_in_trans.3106337289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_invalid_sync.1891482619 |
| Short name | T2052 |
| Test name | |
| Test status | |
| Simulation time | 4350493009 ps |
| CPU time | 104.14 seconds |
| Started | Aug 29 03:42:31 AM UTC 24 |
| Finished | Aug 29 03:44:18 AM UTC 24 |
| Peak memory | 234376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1891482619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 25.usbdev_invalid_sync.1891482619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_iso_retraction.3774401793 |
| Short name | T1992 |
| Test name | |
| Test status | |
| Simulation time | 11208985723 ps |
| CPU time | 74.02 seconds |
| Started | Aug 29 03:42:31 AM UTC 24 |
| Finished | Aug 29 03:43:47 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3774401793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_iso_retraction.3774401793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_link_in_err.527908719 |
| Short name | T1894 |
| Test name | |
| Test status | |
| Simulation time | 188765191 ps |
| CPU time | 1.11 seconds |
| Started | Aug 29 03:42:31 AM UTC 24 |
| Finished | Aug 29 03:42:34 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=527908719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 25.usbdev_link_in_err.527908719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_link_resume.1824936175 |
| Short name | T1946 |
| Test name | |
| Test status | |
| Simulation time | 28521372022 ps |
| CPU time | 47 seconds |
| Started | Aug 29 03:42:31 AM UTC 24 |
| Finished | Aug 29 03:43:20 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1824936175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_link_resume.1824936175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_link_suspend.670302283 |
| Short name | T1936 |
| Test name | |
| Test status | |
| Simulation time | 10139613778 ps |
| CPU time | 14.39 seconds |
| Started | Aug 29 03:42:52 AM UTC 24 |
| Finished | Aug 29 03:43:08 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=670302283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_link_suspend.670302283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_low_speed_traffic.456026737 |
| Short name | T1976 |
| Test name | |
| Test status | |
| Simulation time | 4280603460 ps |
| CPU time | 32.11 seconds |
| Started | Aug 29 03:42:52 AM UTC 24 |
| Finished | Aug 29 03:43:26 AM UTC 24 |
| Peak memory | 227612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=456026737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_low_speed_traffic.456026737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_max_inter_pkt_delay.1727531571 |
| Short name | T1939 |
| Test name | |
| Test status | |
| Simulation time | 2799188263 ps |
| CPU time | 18.66 seconds |
| Started | Aug 29 03:42:52 AM UTC 24 |
| Finished | Aug 29 03:43:12 AM UTC 24 |
| Peak memory | 229584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1727531571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_max_inter_pkt_delay.1727531571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_max_length_in_transaction.1963187607 |
| Short name | T1913 |
| Test name | |
| Test status | |
| Simulation time | 275198814 ps |
| CPU time | 1.05 seconds |
| Started | Aug 29 03:42:52 AM UTC 24 |
| Finished | Aug 29 03:42:54 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1963187607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 25.usbdev_max_length_in_transaction.1963187607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_max_length_out_transaction.3709990653 |
| Short name | T1917 |
| Test name | |
| Test status | |
| Simulation time | 203235321 ps |
| CPU time | 0.98 seconds |
| Started | Aug 29 03:42:52 AM UTC 24 |
| Finished | Aug 29 03:42:55 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3709990653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 25.usbdev_max_length_out_transaction.3709990653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_min_inter_pkt_delay.3684740896 |
| Short name | T1940 |
| Test name | |
| Test status | |
| Simulation time | 2762315939 ps |
| CPU time | 23.27 seconds |
| Started | Aug 29 03:42:52 AM UTC 24 |
| Finished | Aug 29 03:43:17 AM UTC 24 |
| Peak memory | 227624 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3684740896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_min_inter_pkt_delay.3684740896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_min_length_in_transaction.4260138291 |
| Short name | T1916 |
| Test name | |
| Test status | |
| Simulation time | 153587215 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:42:52 AM UTC 24 |
| Finished | Aug 29 03:42:55 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4260138291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 25.usbdev_min_length_in_transaction.4260138291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_min_length_out_transaction.910820309 |
| Short name | T1915 |
| Test name | |
| Test status | |
| Simulation time | 148097639 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 03:42:52 AM UTC 24 |
| Finished | Aug 29 03:42:54 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=910820309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 25.usbdev_min_length_out_transaction.910820309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_nak_trans.2104180928 |
| Short name | T150 |
| Test name | |
| Test status | |
| Simulation time | 200702621 ps |
| CPU time | 0.92 seconds |
| Started | Aug 29 03:42:52 AM UTC 24 |
| Finished | Aug 29 03:42:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2104180928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_nak_trans.2104180928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_out_iso.3750781582 |
| Short name | T1914 |
| Test name | |
| Test status | |
| Simulation time | 145012185 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 03:42:52 AM UTC 24 |
| Finished | Aug 29 03:42:54 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3750781582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 25.usbdev_out_iso.3750781582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_out_stall.4061492129 |
| Short name | T1920 |
| Test name | |
| Test status | |
| Simulation time | 169871564 ps |
| CPU time | 0.91 seconds |
| Started | Aug 29 03:42:52 AM UTC 24 |
| Finished | Aug 29 03:42:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4061492129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_out_stall.4061492129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_out_trans_nak.3165137352 |
| Short name | T1924 |
| Test name | |
| Test status | |
| Simulation time | 182447956 ps |
| CPU time | 1.04 seconds |
| Started | Aug 29 03:42:52 AM UTC 24 |
| Finished | Aug 29 03:42:55 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3165137352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 25.usbdev_out_trans_nak.3165137352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_pending_in_trans.1096616310 |
| Short name | T1919 |
| Test name | |
| Test status | |
| Simulation time | 173851409 ps |
| CPU time | 0.88 seconds |
| Started | Aug 29 03:42:52 AM UTC 24 |
| Finished | Aug 29 03:42:55 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1096616310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 25.usbdev_pending_in_trans.1096616310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_phy_config_pinflip.1508633166 |
| Short name | T1923 |
| Test name | |
| Test status | |
| Simulation time | 220080069 ps |
| CPU time | 0.9 seconds |
| Started | Aug 29 03:42:52 AM UTC 24 |
| Finished | Aug 29 03:42:55 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1508633166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 25.usbdev_phy_config_pinflip.1508633166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_phy_config_usb_ref_disable.598198517 |
| Short name | T1927 |
| Test name | |
| Test status | |
| Simulation time | 141662774 ps |
| CPU time | 0.99 seconds |
| Started | Aug 29 03:42:52 AM UTC 24 |
| Finished | Aug 29 03:42:55 AM UTC 24 |
| Peak memory | 215012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=598198517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 25.usbdev_phy_config_usb_ref_disable.598198517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_phy_pins_sense.2095610488 |
| Short name | T1922 |
| Test name | |
| Test status | |
| Simulation time | 115861818 ps |
| CPU time | 0.76 seconds |
| Started | Aug 29 03:42:52 AM UTC 24 |
| Finished | Aug 29 03:42:55 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2095610488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_phy_pins_sense.2095610488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_buffer.2455322188 |
| Short name | T1966 |
| Test name | |
| Test status | |
| Simulation time | 9962746955 ps |
| CPU time | 27.05 seconds |
| Started | Aug 29 03:42:52 AM UTC 24 |
| Finished | Aug 29 03:43:21 AM UTC 24 |
| Peak memory | 227668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2455322188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 25.usbdev_pkt_buffer.2455322188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_received.1952123706 |
| Short name | T1878 |
| Test name | |
| Test status | |
| Simulation time | 264722935 ps |
| CPU time | 1.19 seconds |
| Started | Aug 29 03:42:52 AM UTC 24 |
| Finished | Aug 29 03:42:55 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1952123706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_pkt_received.1952123706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_sent.2279062535 |
| Short name | T1872 |
| Test name | |
| Test status | |
| Simulation time | 207090125 ps |
| CPU time | 1.28 seconds |
| Started | Aug 29 03:42:52 AM UTC 24 |
| Finished | Aug 29 03:42:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2279062535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_pkt_sent.2279062535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_random_length_in_transaction.2348168164 |
| Short name | T1925 |
| Test name | |
| Test status | |
| Simulation time | 227031723 ps |
| CPU time | 0.88 seconds |
| Started | Aug 29 03:42:53 AM UTC 24 |
| Finished | Aug 29 03:42:55 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2348168164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 25.usbdev_random_length_in_transaction.2348168164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_random_length_out_transaction.2774547910 |
| Short name | T1928 |
| Test name | |
| Test status | |
| Simulation time | 195135326 ps |
| CPU time | 0.93 seconds |
| Started | Aug 29 03:42:53 AM UTC 24 |
| Finished | Aug 29 03:42:55 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2774547910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 25.usbdev_random_length_out_transaction.2774547910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_rx_crc_err.2330181057 |
| Short name | T1929 |
| Test name | |
| Test status | |
| Simulation time | 183647230 ps |
| CPU time | 0.92 seconds |
| Started | Aug 29 03:42:53 AM UTC 24 |
| Finished | Aug 29 03:42:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2330181057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 25.usbdev_rx_crc_err.2330181057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_rx_full.1527924184 |
| Short name | T1883 |
| Test name | |
| Test status | |
| Simulation time | 397720206 ps |
| CPU time | 1.36 seconds |
| Started | Aug 29 03:42:53 AM UTC 24 |
| Finished | Aug 29 03:42:55 AM UTC 24 |
| Peak memory | 215032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1527924184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 25.usbdev_rx_full.1527924184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_setup_stage.2903120304 |
| Short name | T1930 |
| Test name | |
| Test status | |
| Simulation time | 235020369 ps |
| CPU time | 0.99 seconds |
| Started | Aug 29 03:42:53 AM UTC 24 |
| Finished | Aug 29 03:42:55 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2903120304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_setup_stage.2903120304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_setup_trans_ignored.111484049 |
| Short name | T1926 |
| Test name | |
| Test status | |
| Simulation time | 155769574 ps |
| CPU time | 0.91 seconds |
| Started | Aug 29 03:42:53 AM UTC 24 |
| Finished | Aug 29 03:42:55 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=111484049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 25.usbdev_setup_trans_ignored.111484049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_smoke.63714508 |
| Short name | T1876 |
| Test name | |
| Test status | |
| Simulation time | 263215062 ps |
| CPU time | 1.02 seconds |
| Started | Aug 29 03:42:53 AM UTC 24 |
| Finished | Aug 29 03:42:55 AM UTC 24 |
| Peak memory | 215016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=63714508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null - cm_name 25.usbdev_smoke.63714508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_spurious_pids_ignored.2501855812 |
| Short name | T2024 |
| Test name | |
| Test status | |
| Simulation time | 3253639248 ps |
| CPU time | 79.07 seconds |
| Started | Aug 29 03:42:53 AM UTC 24 |
| Finished | Aug 29 03:44:14 AM UTC 24 |
| Peak memory | 229644 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2501855812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 25.usbdev_spurious_pids_ignored.2501855812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_stall_priority_over_nak.3460522889 |
| Short name | T1875 |
| Test name | |
| Test status | |
| Simulation time | 195975270 ps |
| CPU time | 1.03 seconds |
| Started | Aug 29 03:42:53 AM UTC 24 |
| Finished | Aug 29 03:42:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3460522889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_stall_priority_over_nak.3460522889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_stall_trans.3163534112 |
| Short name | T1885 |
| Test name | |
| Test status | |
| Simulation time | 204126393 ps |
| CPU time | 0.92 seconds |
| Started | Aug 29 03:42:53 AM UTC 24 |
| Finished | Aug 29 03:42:56 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3163534112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_stall_trans.3163534112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_stream_len_max.1102509980 |
| Short name | T1921 |
| Test name | |
| Test status | |
| Simulation time | 413346190 ps |
| CPU time | 1.28 seconds |
| Started | Aug 29 03:42:53 AM UTC 24 |
| Finished | Aug 29 03:42:56 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1102509980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_stream_len_max.1102509980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_streaming_out.1588567507 |
| Short name | T1981 |
| Test name | |
| Test status | |
| Simulation time | 1616611095 ps |
| CPU time | 38.07 seconds |
| Started | Aug 29 03:42:53 AM UTC 24 |
| Finished | Aug 29 03:43:33 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1588567507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_streaming_out.1588567507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_timeout_missing_host_handshake.3015538596 |
| Short name | T1904 |
| Test name | |
| Test status | |
| Simulation time | 1358167065 ps |
| CPU time | 8.27 seconds |
| Started | Aug 29 03:42:31 AM UTC 24 |
| Finished | Aug 29 03:42:41 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3015538596 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_timeout_missing_host_handshake.3015538596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/25.usbdev_tx_rx_disruption.2626022030 |
| Short name | T1932 |
| Test name | |
| Test status | |
| Simulation time | 448018431 ps |
| CPU time | 1.43 seconds |
| Started | Aug 29 03:42:53 AM UTC 24 |
| Finished | Aug 29 03:42:56 AM UTC 24 |
| Peak memory | 215008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2626022030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_t x_rx_disruption.2626022030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/25.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/250.usbdev_tx_rx_disruption.3916012325 |
| Short name | T3563 |
| Test name | |
| Test status | |
| Simulation time | 655845786 ps |
| CPU time | 1.92 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:42 AM UTC 24 |
| Peak memory | 214764 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3916012325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 250.usbdev_ tx_rx_disruption.3916012325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/250.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/251.usbdev_tx_rx_disruption.3153837712 |
| Short name | T3554 |
| Test name | |
| Test status | |
| Simulation time | 458027382 ps |
| CPU time | 1.61 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:41 AM UTC 24 |
| Peak memory | 214720 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3153837712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 251.usbdev_ tx_rx_disruption.3153837712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/251.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/252.usbdev_tx_rx_disruption.581909768 |
| Short name | T3560 |
| Test name | |
| Test status | |
| Simulation time | 514212765 ps |
| CPU time | 1.75 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:42 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=581909768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 252.usbdev_t x_rx_disruption.581909768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/252.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/253.usbdev_tx_rx_disruption.365518389 |
| Short name | T3556 |
| Test name | |
| Test status | |
| Simulation time | 606532222 ps |
| CPU time | 1.55 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:41 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=365518389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 253.usbdev_t x_rx_disruption.365518389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/253.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/254.usbdev_tx_rx_disruption.1432317617 |
| Short name | T3550 |
| Test name | |
| Test status | |
| Simulation time | 505901683 ps |
| CPU time | 1.39 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:41 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1432317617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 254.usbdev_ tx_rx_disruption.1432317617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/254.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/255.usbdev_tx_rx_disruption.105493624 |
| Short name | T3557 |
| Test name | |
| Test status | |
| Simulation time | 586782082 ps |
| CPU time | 1.4 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:41 AM UTC 24 |
| Peak memory | 214876 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=105493624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 255.usbdev_t x_rx_disruption.105493624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/255.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/256.usbdev_tx_rx_disruption.790300352 |
| Short name | T3548 |
| Test name | |
| Test status | |
| Simulation time | 452909013 ps |
| CPU time | 1.31 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:41 AM UTC 24 |
| Peak memory | 214972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=790300352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 256.usbdev_t x_rx_disruption.790300352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/256.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/257.usbdev_tx_rx_disruption.1288772104 |
| Short name | T3568 |
| Test name | |
| Test status | |
| Simulation time | 575849875 ps |
| CPU time | 1.75 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:42 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1288772104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 257.usbdev_ tx_rx_disruption.1288772104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/257.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/258.usbdev_tx_rx_disruption.101328660 |
| Short name | T3586 |
| Test name | |
| Test status | |
| Simulation time | 611169771 ps |
| CPU time | 2.28 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:42 AM UTC 24 |
| Peak memory | 217040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=101328660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 258.usbdev_t x_rx_disruption.101328660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/258.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/259.usbdev_tx_rx_disruption.247398270 |
| Short name | T3561 |
| Test name | |
| Test status | |
| Simulation time | 530053010 ps |
| CPU time | 1.5 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:42 AM UTC 24 |
| Peak memory | 214944 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=247398270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 259.usbdev_t x_rx_disruption.247398270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/259.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_alert_test.871593636 |
| Short name | T1989 |
| Test name | |
| Test status | |
| Simulation time | 46493526 ps |
| CPU time | 0.62 seconds |
| Started | Aug 29 03:43:45 AM UTC 24 |
| Finished | Aug 29 03:43:47 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=871593636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 26.usbdev_alert_test.871593636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_disconnect.2559154205 |
| Short name | T1937 |
| Test name | |
| Test status | |
| Simulation time | 10491522324 ps |
| CPU time | 13.97 seconds |
| Started | Aug 29 03:42:53 AM UTC 24 |
| Finished | Aug 29 03:43:09 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2559154205 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_disconnect.2559154205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_reset.2739982261 |
| Short name | T1941 |
| Test name | |
| Test status | |
| Simulation time | 20981717145 ps |
| CPU time | 24.37 seconds |
| Started | Aug 29 03:42:53 AM UTC 24 |
| Finished | Aug 29 03:43:19 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2739982261 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_reset.2739982261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_resume.21435880 |
| Short name | T1977 |
| Test name | |
| Test status | |
| Simulation time | 25778643274 ps |
| CPU time | 31.48 seconds |
| Started | Aug 29 03:42:53 AM UTC 24 |
| Finished | Aug 29 03:43:26 AM UTC 24 |
| Peak memory | 227612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=21435880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_resume.21435880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_av_buffer.2021797041 |
| Short name | T1918 |
| Test name | |
| Test status | |
| Simulation time | 154055799 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 03:42:53 AM UTC 24 |
| Finished | Aug 29 03:42:56 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2021797041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_av_buffer.2021797041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_bitstuff_err.3064451042 |
| Short name | T1944 |
| Test name | |
| Test status | |
| Simulation time | 201107599 ps |
| CPU time | 0.94 seconds |
| Started | Aug 29 03:43:18 AM UTC 24 |
| Finished | Aug 29 03:43:20 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3064451042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_bitstuff_err.3064451042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_data_toggle_clear.2757630822 |
| Short name | T1942 |
| Test name | |
| Test status | |
| Simulation time | 171445944 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 03:43:18 AM UTC 24 |
| Finished | Aug 29 03:43:20 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2757630822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 26.usbdev_data_toggle_clear.2757630822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_data_toggle_restore.4277939656 |
| Short name | T1975 |
| Test name | |
| Test status | |
| Simulation time | 1211804794 ps |
| CPU time | 3.22 seconds |
| Started | Aug 29 03:43:18 AM UTC 24 |
| Finished | Aug 29 03:43:22 AM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4277939656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_data_toggle_restore.4277939656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_device_address.3683571357 |
| Short name | T2054 |
| Test name | |
| Test status | |
| Simulation time | 36021812964 ps |
| CPU time | 59.15 seconds |
| Started | Aug 29 03:43:18 AM UTC 24 |
| Finished | Aug 29 03:44:19 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3683571357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_device_address.3683571357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_device_timeout.1075034489 |
| Short name | T2013 |
| Test name | |
| Test status | |
| Simulation time | 1651694726 ps |
| CPU time | 33.46 seconds |
| Started | Aug 29 03:43:18 AM UTC 24 |
| Finished | Aug 29 03:43:53 AM UTC 24 |
| Peak memory | 217388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1075034489 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_device_timeout.1075034489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_disable_endpoint.324080872 |
| Short name | T1971 |
| Test name | |
| Test status | |
| Simulation time | 854111642 ps |
| CPU time | 2.32 seconds |
| Started | Aug 29 03:43:18 AM UTC 24 |
| Finished | Aug 29 03:43:21 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=324080872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_disable_endpoint.324080872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_disconnected.664545285 |
| Short name | T1945 |
| Test name | |
| Test status | |
| Simulation time | 139727842 ps |
| CPU time | 0.75 seconds |
| Started | Aug 29 03:43:18 AM UTC 24 |
| Finished | Aug 29 03:43:20 AM UTC 24 |
| Peak memory | 214816 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=664545285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_disconnected.664545285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_enable.1917543818 |
| Short name | T1943 |
| Test name | |
| Test status | |
| Simulation time | 54978843 ps |
| CPU time | 0.66 seconds |
| Started | Aug 29 03:43:18 AM UTC 24 |
| Finished | Aug 29 03:43:20 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1917543818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 26.usbdev_enable.1917543818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_endpoint_access.3767793203 |
| Short name | T1974 |
| Test name | |
| Test status | |
| Simulation time | 956375519 ps |
| CPU time | 2.41 seconds |
| Started | Aug 29 03:43:18 AM UTC 24 |
| Finished | Aug 29 03:43:22 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3767793203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_endpoint_access.3767793203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_fifo_rst.2643946809 |
| Short name | T1963 |
| Test name | |
| Test status | |
| Simulation time | 305993776 ps |
| CPU time | 1.78 seconds |
| Started | Aug 29 03:43:18 AM UTC 24 |
| Finished | Aug 29 03:43:21 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2643946809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_fifo_rst.2643946809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_in_iso.3100790250 |
| Short name | T1949 |
| Test name | |
| Test status | |
| Simulation time | 188304830 ps |
| CPU time | 1.2 seconds |
| Started | Aug 29 03:43:18 AM UTC 24 |
| Finished | Aug 29 03:43:21 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3100790250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 26.usbdev_in_iso.3100790250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_in_stall.3654126368 |
| Short name | T1948 |
| Test name | |
| Test status | |
| Simulation time | 140316548 ps |
| CPU time | 1.02 seconds |
| Started | Aug 29 03:43:18 AM UTC 24 |
| Finished | Aug 29 03:43:20 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3654126368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_in_stall.3654126368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_in_trans.1391896136 |
| Short name | T1947 |
| Test name | |
| Test status | |
| Simulation time | 201480161 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 03:43:18 AM UTC 24 |
| Finished | Aug 29 03:43:20 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1391896136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_in_trans.1391896136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_invalid_sync.3163247290 |
| Short name | T612 |
| Test name | |
| Test status | |
| Simulation time | 3921348747 ps |
| CPU time | 25.91 seconds |
| Started | Aug 29 03:43:18 AM UTC 24 |
| Finished | Aug 29 03:43:46 AM UTC 24 |
| Peak memory | 234208 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3163247290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 26.usbdev_invalid_sync.3163247290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_iso_retraction.1157985475 |
| Short name | T1983 |
| Test name | |
| Test status | |
| Simulation time | 3940611727 ps |
| CPU time | 24.15 seconds |
| Started | Aug 29 03:43:18 AM UTC 24 |
| Finished | Aug 29 03:43:44 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1157985475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_iso_retraction.1157985475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_link_in_err.1575664055 |
| Short name | T1952 |
| Test name | |
| Test status | |
| Simulation time | 245062413 ps |
| CPU time | 0.99 seconds |
| Started | Aug 29 03:43:18 AM UTC 24 |
| Finished | Aug 29 03:43:21 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1575664055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_link_in_err.1575664055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_link_resume.4076454887 |
| Short name | T1980 |
| Test name | |
| Test status | |
| Simulation time | 8627218537 ps |
| CPU time | 12.2 seconds |
| Started | Aug 29 03:43:18 AM UTC 24 |
| Finished | Aug 29 03:43:32 AM UTC 24 |
| Peak memory | 217276 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4076454887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_link_resume.4076454887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_link_suspend.3550363600 |
| Short name | T1978 |
| Test name | |
| Test status | |
| Simulation time | 6264409558 ps |
| CPU time | 8.88 seconds |
| Started | Aug 29 03:43:18 AM UTC 24 |
| Finished | Aug 29 03:43:29 AM UTC 24 |
| Peak memory | 227460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3550363600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_link_suspend.3550363600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_low_speed_traffic.3737556316 |
| Short name | T2134 |
| Test name | |
| Test status | |
| Simulation time | 4582347691 ps |
| CPU time | 113.8 seconds |
| Started | Aug 29 03:43:19 AM UTC 24 |
| Finished | Aug 29 03:45:15 AM UTC 24 |
| Peak memory | 227764 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3737556316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_low_speed_traffic.3737556316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_max_inter_pkt_delay.3776041628 |
| Short name | T2092 |
| Test name | |
| Test status | |
| Simulation time | 3817840444 ps |
| CPU time | 91.99 seconds |
| Started | Aug 29 03:43:19 AM UTC 24 |
| Finished | Aug 29 03:44:53 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3776041628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_max_inter_pkt_delay.3776041628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_max_length_in_transaction.3707406351 |
| Short name | T1953 |
| Test name | |
| Test status | |
| Simulation time | 241478683 ps |
| CPU time | 1.04 seconds |
| Started | Aug 29 03:43:19 AM UTC 24 |
| Finished | Aug 29 03:43:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3707406351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 26.usbdev_max_length_in_transaction.3707406351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_max_length_out_transaction.4015248003 |
| Short name | T1962 |
| Test name | |
| Test status | |
| Simulation time | 224486005 ps |
| CPU time | 1.26 seconds |
| Started | Aug 29 03:43:19 AM UTC 24 |
| Finished | Aug 29 03:43:21 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4015248003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 26.usbdev_max_length_out_transaction.4015248003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_min_inter_pkt_delay.3843161956 |
| Short name | T1985 |
| Test name | |
| Test status | |
| Simulation time | 3775832660 ps |
| CPU time | 25.25 seconds |
| Started | Aug 29 03:43:19 AM UTC 24 |
| Finished | Aug 29 03:43:45 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3843161956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_min_inter_pkt_delay.3843161956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_min_length_in_transaction.3075749247 |
| Short name | T1959 |
| Test name | |
| Test status | |
| Simulation time | 176656634 ps |
| CPU time | 1.09 seconds |
| Started | Aug 29 03:43:19 AM UTC 24 |
| Finished | Aug 29 03:43:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3075749247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 26.usbdev_min_length_in_transaction.3075749247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_min_length_out_transaction.2795231799 |
| Short name | T1955 |
| Test name | |
| Test status | |
| Simulation time | 157380333 ps |
| CPU time | 1.03 seconds |
| Started | Aug 29 03:43:19 AM UTC 24 |
| Finished | Aug 29 03:43:21 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2795231799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 26.usbdev_min_length_out_transaction.2795231799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_nak_trans.2242316376 |
| Short name | T152 |
| Test name | |
| Test status | |
| Simulation time | 201940932 ps |
| CPU time | 1.21 seconds |
| Started | Aug 29 03:43:19 AM UTC 24 |
| Finished | Aug 29 03:43:21 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2242316376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_nak_trans.2242316376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_out_iso.1401708775 |
| Short name | T1957 |
| Test name | |
| Test status | |
| Simulation time | 207236356 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 03:43:19 AM UTC 24 |
| Finished | Aug 29 03:43:21 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1401708775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 26.usbdev_out_iso.1401708775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_out_stall.3331218742 |
| Short name | T1960 |
| Test name | |
| Test status | |
| Simulation time | 154772370 ps |
| CPU time | 0.95 seconds |
| Started | Aug 29 03:43:19 AM UTC 24 |
| Finished | Aug 29 03:43:21 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3331218742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_out_stall.3331218742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_out_trans_nak.3806185715 |
| Short name | T1954 |
| Test name | |
| Test status | |
| Simulation time | 173552446 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:43:19 AM UTC 24 |
| Finished | Aug 29 03:43:21 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3806185715 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 26.usbdev_out_trans_nak.3806185715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_pending_in_trans.1226852992 |
| Short name | T1956 |
| Test name | |
| Test status | |
| Simulation time | 150637349 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 03:43:19 AM UTC 24 |
| Finished | Aug 29 03:43:21 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1226852992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 26.usbdev_pending_in_trans.1226852992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_phy_config_pinflip.639114623 |
| Short name | T1972 |
| Test name | |
| Test status | |
| Simulation time | 309836692 ps |
| CPU time | 1.36 seconds |
| Started | Aug 29 03:43:19 AM UTC 24 |
| Finished | Aug 29 03:43:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=639114623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 26.usbdev_phy_config_pinflip.639114623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_phy_config_usb_ref_disable.2238286256 |
| Short name | T1970 |
| Test name | |
| Test status | |
| Simulation time | 204947930 ps |
| CPU time | 1.21 seconds |
| Started | Aug 29 03:43:19 AM UTC 24 |
| Finished | Aug 29 03:43:21 AM UTC 24 |
| Peak memory | 215000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2238286256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 26.usbdev_phy_config_usb_ref_disable.2238286256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_phy_pins_sense.288973942 |
| Short name | T1961 |
| Test name | |
| Test status | |
| Simulation time | 79149601 ps |
| CPU time | 0.95 seconds |
| Started | Aug 29 03:43:19 AM UTC 24 |
| Finished | Aug 29 03:43:21 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=288973942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 26.usbdev_phy_pins_sense.288973942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_buffer.1342449438 |
| Short name | T2015 |
| Test name | |
| Test status | |
| Simulation time | 14746443392 ps |
| CPU time | 37.28 seconds |
| Started | Aug 29 03:43:19 AM UTC 24 |
| Finished | Aug 29 03:43:58 AM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1342449438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_pkt_buffer.1342449438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_received.1405080314 |
| Short name | T1967 |
| Test name | |
| Test status | |
| Simulation time | 159860506 ps |
| CPU time | 1.14 seconds |
| Started | Aug 29 03:43:19 AM UTC 24 |
| Finished | Aug 29 03:43:21 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1405080314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_pkt_received.1405080314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_sent.4065965417 |
| Short name | T1968 |
| Test name | |
| Test status | |
| Simulation time | 234789163 ps |
| CPU time | 1.04 seconds |
| Started | Aug 29 03:43:19 AM UTC 24 |
| Finished | Aug 29 03:43:21 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4065965417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_pkt_sent.4065965417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_random_length_in_transaction.4045694966 |
| Short name | T1958 |
| Test name | |
| Test status | |
| Simulation time | 186488376 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 03:43:19 AM UTC 24 |
| Finished | Aug 29 03:43:21 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4045694966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 26.usbdev_random_length_in_transaction.4045694966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_random_length_out_transaction.326055568 |
| Short name | T1969 |
| Test name | |
| Test status | |
| Simulation time | 165126327 ps |
| CPU time | 1.04 seconds |
| Started | Aug 29 03:43:19 AM UTC 24 |
| Finished | Aug 29 03:43:21 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=326055568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 26.usbdev_random_length_out_transaction.326055568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_rx_crc_err.2335783437 |
| Short name | T1964 |
| Test name | |
| Test status | |
| Simulation time | 163325787 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 03:43:19 AM UTC 24 |
| Finished | Aug 29 03:43:21 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2335783437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_rx_crc_err.2335783437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_rx_full.2541461226 |
| Short name | T1973 |
| Test name | |
| Test status | |
| Simulation time | 251767153 ps |
| CPU time | 1.12 seconds |
| Started | Aug 29 03:43:19 AM UTC 24 |
| Finished | Aug 29 03:43:21 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2541461226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 26.usbdev_rx_full.2541461226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_setup_stage.3255038406 |
| Short name | T1965 |
| Test name | |
| Test status | |
| Simulation time | 175090521 ps |
| CPU time | 0.82 seconds |
| Started | Aug 29 03:43:19 AM UTC 24 |
| Finished | Aug 29 03:43:21 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3255038406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_setup_stage.3255038406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_setup_trans_ignored.4110375273 |
| Short name | T1987 |
| Test name | |
| Test status | |
| Simulation time | 190381529 ps |
| CPU time | 0.82 seconds |
| Started | Aug 29 03:43:45 AM UTC 24 |
| Finished | Aug 29 03:43:47 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4110375273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 26.usbdev_setup_trans_ignored.4110375273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_smoke.4246589418 |
| Short name | T1991 |
| Test name | |
| Test status | |
| Simulation time | 239431707 ps |
| CPU time | 0.98 seconds |
| Started | Aug 29 03:43:45 AM UTC 24 |
| Finished | Aug 29 03:43:47 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4246589418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_smoke.4246589418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_spurious_pids_ignored.1000781729 |
| Short name | T2058 |
| Test name | |
| Test status | |
| Simulation time | 1816025975 ps |
| CPU time | 44.67 seconds |
| Started | Aug 29 03:43:45 AM UTC 24 |
| Finished | Aug 29 03:44:31 AM UTC 24 |
| Peak memory | 229468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1000781729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 26.usbdev_spurious_pids_ignored.1000781729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_stall_priority_over_nak.4168420222 |
| Short name | T1993 |
| Test name | |
| Test status | |
| Simulation time | 184951456 ps |
| CPU time | 0.91 seconds |
| Started | Aug 29 03:43:45 AM UTC 24 |
| Finished | Aug 29 03:43:47 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4168420222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_stall_priority_over_nak.4168420222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_stall_trans.1986708233 |
| Short name | T1990 |
| Test name | |
| Test status | |
| Simulation time | 144629648 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 03:43:45 AM UTC 24 |
| Finished | Aug 29 03:43:47 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1986708233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_stall_trans.1986708233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_stream_len_max.4172631064 |
| Short name | T2010 |
| Test name | |
| Test status | |
| Simulation time | 1030765133 ps |
| CPU time | 2.75 seconds |
| Started | Aug 29 03:43:45 AM UTC 24 |
| Finished | Aug 29 03:43:49 AM UTC 24 |
| Peak memory | 217260 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4172631064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_stream_len_max.4172631064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_streaming_out.2989141474 |
| Short name | T2017 |
| Test name | |
| Test status | |
| Simulation time | 3255580792 ps |
| CPU time | 22.03 seconds |
| Started | Aug 29 03:43:45 AM UTC 24 |
| Finished | Aug 29 03:44:09 AM UTC 24 |
| Peak memory | 229576 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2989141474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_streaming_out.2989141474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_timeout_missing_host_handshake.1640965485 |
| Short name | T1982 |
| Test name | |
| Test status | |
| Simulation time | 4323002437 ps |
| CPU time | 23.67 seconds |
| Started | Aug 29 03:43:18 AM UTC 24 |
| Finished | Aug 29 03:43:43 AM UTC 24 |
| Peak memory | 217424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1640965485 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_timeout_missing_host_handshake.1640965485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/26.usbdev_tx_rx_disruption.1651314621 |
| Short name | T2000 |
| Test name | |
| Test status | |
| Simulation time | 569888199 ps |
| CPU time | 1.6 seconds |
| Started | Aug 29 03:43:45 AM UTC 24 |
| Finished | Aug 29 03:43:48 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1651314621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_t x_rx_disruption.1651314621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/26.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/260.usbdev_tx_rx_disruption.3185518126 |
| Short name | T3559 |
| Test name | |
| Test status | |
| Simulation time | 469271243 ps |
| CPU time | 1.44 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3185518126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 260.usbdev_ tx_rx_disruption.3185518126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/260.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/261.usbdev_tx_rx_disruption.2967668113 |
| Short name | T3564 |
| Test name | |
| Test status | |
| Simulation time | 451790862 ps |
| CPU time | 1.67 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2967668113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 261.usbdev_ tx_rx_disruption.2967668113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/261.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/262.usbdev_tx_rx_disruption.1500732306 |
| Short name | T3570 |
| Test name | |
| Test status | |
| Simulation time | 573827444 ps |
| CPU time | 1.7 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1500732306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 262.usbdev_ tx_rx_disruption.1500732306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/262.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/263.usbdev_tx_rx_disruption.1850153257 |
| Short name | T3576 |
| Test name | |
| Test status | |
| Simulation time | 491910387 ps |
| CPU time | 2 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:42 AM UTC 24 |
| Peak memory | 216996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1850153257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 263.usbdev_ tx_rx_disruption.1850153257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/263.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/264.usbdev_tx_rx_disruption.1143688443 |
| Short name | T3571 |
| Test name | |
| Test status | |
| Simulation time | 522287157 ps |
| CPU time | 1.79 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:42 AM UTC 24 |
| Peak memory | 216468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1143688443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 264.usbdev_ tx_rx_disruption.1143688443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/264.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/265.usbdev_tx_rx_disruption.3750189692 |
| Short name | T3578 |
| Test name | |
| Test status | |
| Simulation time | 475127269 ps |
| CPU time | 1.99 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3750189692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 265.usbdev_ tx_rx_disruption.3750189692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/265.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/266.usbdev_tx_rx_disruption.1340207795 |
| Short name | T3581 |
| Test name | |
| Test status | |
| Simulation time | 590605366 ps |
| CPU time | 2 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1340207795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 266.usbdev_ tx_rx_disruption.1340207795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/266.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/267.usbdev_tx_rx_disruption.3727701626 |
| Short name | T3572 |
| Test name | |
| Test status | |
| Simulation time | 545859538 ps |
| CPU time | 1.71 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3727701626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 267.usbdev_ tx_rx_disruption.3727701626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/267.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/268.usbdev_tx_rx_disruption.1913180730 |
| Short name | T3579 |
| Test name | |
| Test status | |
| Simulation time | 529715826 ps |
| CPU time | 1.86 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1913180730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 268.usbdev_ tx_rx_disruption.1913180730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/268.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/269.usbdev_tx_rx_disruption.1552685236 |
| Short name | T3593 |
| Test name | |
| Test status | |
| Simulation time | 488224859 ps |
| CPU time | 2.07 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:43 AM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1552685236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 269.usbdev_ tx_rx_disruption.1552685236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/269.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_alert_test.135959643 |
| Short name | T2038 |
| Test name | |
| Test status | |
| Simulation time | 76186879 ps |
| CPU time | 0.69 seconds |
| Started | Aug 29 03:44:13 AM UTC 24 |
| Finished | Aug 29 03:44:15 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=135959643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 27.usbdev_alert_test.135959643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_disconnect.3815449086 |
| Short name | T2014 |
| Test name | |
| Test status | |
| Simulation time | 6945299924 ps |
| CPU time | 9.49 seconds |
| Started | Aug 29 03:43:46 AM UTC 24 |
| Finished | Aug 29 03:43:56 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3815449086 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_disconnect.3815449086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_reset.1758662199 |
| Short name | T211 |
| Test name | |
| Test status | |
| Simulation time | 13960202128 ps |
| CPU time | 16.67 seconds |
| Started | Aug 29 03:43:46 AM UTC 24 |
| Finished | Aug 29 03:44:03 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1758662199 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_reset.1758662199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_resume.398740115 |
| Short name | T2055 |
| Test name | |
| Test status | |
| Simulation time | 26297878184 ps |
| CPU time | 32.27 seconds |
| Started | Aug 29 03:43:46 AM UTC 24 |
| Finished | Aug 29 03:44:19 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=398740115 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_resume.398740115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_av_buffer.2661109334 |
| Short name | T1997 |
| Test name | |
| Test status | |
| Simulation time | 150932717 ps |
| CPU time | 0.82 seconds |
| Started | Aug 29 03:43:46 AM UTC 24 |
| Finished | Aug 29 03:43:48 AM UTC 24 |
| Peak memory | 216736 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2661109334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_av_buffer.2661109334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_bitstuff_err.4194199417 |
| Short name | T1994 |
| Test name | |
| Test status | |
| Simulation time | 157259428 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 03:43:46 AM UTC 24 |
| Finished | Aug 29 03:43:48 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4194199417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_bitstuff_err.4194199417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_data_toggle_clear.1589581673 |
| Short name | T1995 |
| Test name | |
| Test status | |
| Simulation time | 156528087 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 03:43:46 AM UTC 24 |
| Finished | Aug 29 03:43:48 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1589581673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 27.usbdev_data_toggle_clear.1589581673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_data_toggle_restore.3736355584 |
| Short name | T2012 |
| Test name | |
| Test status | |
| Simulation time | 1123430300 ps |
| CPU time | 2.76 seconds |
| Started | Aug 29 03:43:46 AM UTC 24 |
| Finished | Aug 29 03:43:50 AM UTC 24 |
| Peak memory | 217124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3736355584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_data_toggle_restore.3736355584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_device_address.349202537 |
| Short name | T2089 |
| Test name | |
| Test status | |
| Simulation time | 40326705420 ps |
| CPU time | 60.24 seconds |
| Started | Aug 29 03:43:46 AM UTC 24 |
| Finished | Aug 29 03:44:48 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=349202537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 27.usbdev_device_address.349202537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_device_timeout.3219153616 |
| Short name | T1998 |
| Test name | |
| Test status | |
| Simulation time | 180164646 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 03:43:46 AM UTC 24 |
| Finished | Aug 29 03:43:48 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3219153616 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_device_timeout.3219153616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_disable_endpoint.1943957209 |
| Short name | T2005 |
| Test name | |
| Test status | |
| Simulation time | 633003312 ps |
| CPU time | 1.61 seconds |
| Started | Aug 29 03:43:46 AM UTC 24 |
| Finished | Aug 29 03:43:49 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1943957209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 27.usbdev_disable_endpoint.1943957209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_disconnected.2566429663 |
| Short name | T1950 |
| Test name | |
| Test status | |
| Simulation time | 154006160 ps |
| CPU time | 1.17 seconds |
| Started | Aug 29 03:43:46 AM UTC 24 |
| Finished | Aug 29 03:43:48 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2566429663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_disconnected.2566429663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_enable.327642110 |
| Short name | T1996 |
| Test name | |
| Test status | |
| Simulation time | 39133242 ps |
| CPU time | 0.69 seconds |
| Started | Aug 29 03:43:46 AM UTC 24 |
| Finished | Aug 29 03:43:48 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=327642110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_enable.327642110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_endpoint_access.4061282006 |
| Short name | T2009 |
| Test name | |
| Test status | |
| Simulation time | 781672403 ps |
| CPU time | 1.98 seconds |
| Started | Aug 29 03:43:46 AM UTC 24 |
| Finished | Aug 29 03:43:49 AM UTC 24 |
| Peak memory | 214908 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4061282006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_endpoint_access.4061282006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_endpoint_types.368702389 |
| Short name | T435 |
| Test name | |
| Test status | |
| Simulation time | 516284415 ps |
| CPU time | 1.51 seconds |
| Started | Aug 29 03:43:46 AM UTC 24 |
| Finished | Aug 29 03:43:49 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=368702389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 27.usbdev_endpoint_types.368702389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_fifo_levels.18156383 |
| Short name | T383 |
| Test name | |
| Test status | |
| Simulation time | 174380598 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 03:43:46 AM UTC 24 |
| Finished | Aug 29 03:43:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=18156383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_fifo_levels.18156383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_fifo_rst.853191356 |
| Short name | T2011 |
| Test name | |
| Test status | |
| Simulation time | 278026198 ps |
| CPU time | 2.21 seconds |
| Started | Aug 29 03:43:46 AM UTC 24 |
| Finished | Aug 29 03:43:49 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=853191356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_fifo_rst.853191356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_in_iso.994907983 |
| Short name | T1986 |
| Test name | |
| Test status | |
| Simulation time | 221149751 ps |
| CPU time | 1.13 seconds |
| Started | Aug 29 03:43:46 AM UTC 24 |
| Finished | Aug 29 03:43:48 AM UTC 24 |
| Peak memory | 227416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=994907983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 27.usbdev_in_iso.994907983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_in_stall.4242676302 |
| Short name | T1999 |
| Test name | |
| Test status | |
| Simulation time | 158161474 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 03:43:46 AM UTC 24 |
| Finished | Aug 29 03:43:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4242676302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_in_stall.4242676302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_in_trans.986656793 |
| Short name | T2001 |
| Test name | |
| Test status | |
| Simulation time | 229335749 ps |
| CPU time | 0.93 seconds |
| Started | Aug 29 03:43:46 AM UTC 24 |
| Finished | Aug 29 03:43:48 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=986656793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_in_trans.986656793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_invalid_sync.3470564456 |
| Short name | T2179 |
| Test name | |
| Test status | |
| Simulation time | 5003228661 ps |
| CPU time | 123.86 seconds |
| Started | Aug 29 03:43:46 AM UTC 24 |
| Finished | Aug 29 03:45:52 AM UTC 24 |
| Peak memory | 227720 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3470564456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 27.usbdev_invalid_sync.3470564456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_iso_retraction.1850283832 |
| Short name | T2062 |
| Test name | |
| Test status | |
| Simulation time | 7889679503 ps |
| CPU time | 50.42 seconds |
| Started | Aug 29 03:43:46 AM UTC 24 |
| Finished | Aug 29 03:44:38 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1850283832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_iso_retraction.1850283832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_link_in_err.2947534752 |
| Short name | T1951 |
| Test name | |
| Test status | |
| Simulation time | 220155323 ps |
| CPU time | 1.04 seconds |
| Started | Aug 29 03:43:46 AM UTC 24 |
| Finished | Aug 29 03:43:48 AM UTC 24 |
| Peak memory | 214980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2947534752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_link_in_err.2947534752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_link_resume.688264300 |
| Short name | T2059 |
| Test name | |
| Test status | |
| Simulation time | 29079077453 ps |
| CPU time | 47.46 seconds |
| Started | Aug 29 03:43:46 AM UTC 24 |
| Finished | Aug 29 03:44:35 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=688264300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_link_resume.688264300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_low_speed_traffic.3693200970 |
| Short name | T2094 |
| Test name | |
| Test status | |
| Simulation time | 2919052686 ps |
| CPU time | 69.73 seconds |
| Started | Aug 29 03:43:46 AM UTC 24 |
| Finished | Aug 29 03:44:58 AM UTC 24 |
| Peak memory | 227616 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3693200970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_low_speed_traffic.3693200970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_max_inter_pkt_delay.2914205853 |
| Short name | T2084 |
| Test name | |
| Test status | |
| Simulation time | 2266197967 ps |
| CPU time | 53.81 seconds |
| Started | Aug 29 03:43:46 AM UTC 24 |
| Finished | Aug 29 03:44:42 AM UTC 24 |
| Peak memory | 229644 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2914205853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_max_inter_pkt_delay.2914205853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_max_length_in_transaction.3423157615 |
| Short name | T2008 |
| Test name | |
| Test status | |
| Simulation time | 247584406 ps |
| CPU time | 1.2 seconds |
| Started | Aug 29 03:43:46 AM UTC 24 |
| Finished | Aug 29 03:43:49 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3423157615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 27.usbdev_max_length_in_transaction.3423157615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_max_length_out_transaction.1040817614 |
| Short name | T2006 |
| Test name | |
| Test status | |
| Simulation time | 245056384 ps |
| CPU time | 1.08 seconds |
| Started | Aug 29 03:43:46 AM UTC 24 |
| Finished | Aug 29 03:43:49 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1040817614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 27.usbdev_max_length_out_transaction.1040817614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_min_inter_pkt_delay.504859247 |
| Short name | T2016 |
| Test name | |
| Test status | |
| Simulation time | 3216669840 ps |
| CPU time | 20.49 seconds |
| Started | Aug 29 03:43:46 AM UTC 24 |
| Finished | Aug 29 03:44:08 AM UTC 24 |
| Peak memory | 227548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=504859247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_min_inter_pkt_delay.504859247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_min_length_in_transaction.91442037 |
| Short name | T2003 |
| Test name | |
| Test status | |
| Simulation time | 177760181 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:43:46 AM UTC 24 |
| Finished | Aug 29 03:43:48 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=91442037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_ trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 27.usbdev_min_length_in_transaction.91442037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_min_length_out_transaction.4001555542 |
| Short name | T2002 |
| Test name | |
| Test status | |
| Simulation time | 150604885 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 03:43:46 AM UTC 24 |
| Finished | Aug 29 03:43:48 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4001555542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 27.usbdev_min_length_out_transaction.4001555542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_out_iso.1086959296 |
| Short name | T2007 |
| Test name | |
| Test status | |
| Simulation time | 233150449 ps |
| CPU time | 1.02 seconds |
| Started | Aug 29 03:43:47 AM UTC 24 |
| Finished | Aug 29 03:43:49 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1086959296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_out_iso.1086959296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_out_stall.940197803 |
| Short name | T2004 |
| Test name | |
| Test status | |
| Simulation time | 169423640 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 03:43:47 AM UTC 24 |
| Finished | Aug 29 03:43:48 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=940197803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_out_stall.940197803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_out_trans_nak.1324947088 |
| Short name | T2021 |
| Test name | |
| Test status | |
| Simulation time | 170736951 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 03:44:12 AM UTC 24 |
| Finished | Aug 29 03:44:14 AM UTC 24 |
| Peak memory | 214724 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1324947088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 27.usbdev_out_trans_nak.1324947088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_pending_in_trans.1455470242 |
| Short name | T2020 |
| Test name | |
| Test status | |
| Simulation time | 159912407 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 03:44:12 AM UTC 24 |
| Finished | Aug 29 03:44:14 AM UTC 24 |
| Peak memory | 214668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1455470242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 27.usbdev_pending_in_trans.1455470242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_phy_config_pinflip.759034093 |
| Short name | T2025 |
| Test name | |
| Test status | |
| Simulation time | 211151386 ps |
| CPU time | 0.88 seconds |
| Started | Aug 29 03:44:12 AM UTC 24 |
| Finished | Aug 29 03:44:14 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=759034093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 27.usbdev_phy_config_pinflip.759034093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_phy_config_usb_ref_disable.3520808272 |
| Short name | T2022 |
| Test name | |
| Test status | |
| Simulation time | 153484946 ps |
| CPU time | 0.76 seconds |
| Started | Aug 29 03:44:12 AM UTC 24 |
| Finished | Aug 29 03:44:14 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3520808272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 27.usbdev_phy_config_usb_ref_disable.3520808272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_phy_pins_sense.1515813564 |
| Short name | T2019 |
| Test name | |
| Test status | |
| Simulation time | 38172354 ps |
| CPU time | 0.68 seconds |
| Started | Aug 29 03:44:12 AM UTC 24 |
| Finished | Aug 29 03:44:14 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1515813564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_phy_pins_sense.1515813564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_buffer.834213898 |
| Short name | T2091 |
| Test name | |
| Test status | |
| Simulation time | 15614362693 ps |
| CPU time | 36.52 seconds |
| Started | Aug 29 03:44:12 AM UTC 24 |
| Finished | Aug 29 03:44:50 AM UTC 24 |
| Peak memory | 227476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=834213898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_pkt_buffer.834213898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_received.4052529820 |
| Short name | T2026 |
| Test name | |
| Test status | |
| Simulation time | 197114013 ps |
| CPU time | 0.91 seconds |
| Started | Aug 29 03:44:12 AM UTC 24 |
| Finished | Aug 29 03:44:14 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4052529820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_pkt_received.4052529820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_sent.1484029941 |
| Short name | T2028 |
| Test name | |
| Test status | |
| Simulation time | 270306502 ps |
| CPU time | 1 seconds |
| Started | Aug 29 03:44:12 AM UTC 24 |
| Finished | Aug 29 03:44:14 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1484029941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_pkt_sent.1484029941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_random_length_in_transaction.1847500015 |
| Short name | T2029 |
| Test name | |
| Test status | |
| Simulation time | 219287459 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 03:44:12 AM UTC 24 |
| Finished | Aug 29 03:44:14 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1847500015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 27.usbdev_random_length_in_transaction.1847500015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_random_length_out_transaction.753607993 |
| Short name | T2030 |
| Test name | |
| Test status | |
| Simulation time | 155752388 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:44:12 AM UTC 24 |
| Finished | Aug 29 03:44:14 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=753607993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 27.usbdev_random_length_out_transaction.753607993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_rx_crc_err.2357934093 |
| Short name | T2027 |
| Test name | |
| Test status | |
| Simulation time | 181423358 ps |
| CPU time | 0.82 seconds |
| Started | Aug 29 03:44:12 AM UTC 24 |
| Finished | Aug 29 03:44:14 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2357934093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_rx_crc_err.2357934093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_rx_full.3487365889 |
| Short name | T368 |
| Test name | |
| Test status | |
| Simulation time | 253831083 ps |
| CPU time | 1.06 seconds |
| Started | Aug 29 03:44:12 AM UTC 24 |
| Finished | Aug 29 03:44:15 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3487365889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_rx_full.3487365889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_setup_stage.2855438063 |
| Short name | T2032 |
| Test name | |
| Test status | |
| Simulation time | 166310734 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 03:44:12 AM UTC 24 |
| Finished | Aug 29 03:44:14 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2855438063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_setup_stage.2855438063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_setup_trans_ignored.3085286667 |
| Short name | T2034 |
| Test name | |
| Test status | |
| Simulation time | 164206757 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 03:44:12 AM UTC 24 |
| Finished | Aug 29 03:44:14 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3085286667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 27.usbdev_setup_trans_ignored.3085286667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_smoke.1353485749 |
| Short name | T2033 |
| Test name | |
| Test status | |
| Simulation time | 192652422 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 03:44:12 AM UTC 24 |
| Finished | Aug 29 03:44:14 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1353485749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_smoke.1353485749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_spurious_pids_ignored.4258750428 |
| Short name | T2061 |
| Test name | |
| Test status | |
| Simulation time | 2508354100 ps |
| CPU time | 22.7 seconds |
| Started | Aug 29 03:44:12 AM UTC 24 |
| Finished | Aug 29 03:44:36 AM UTC 24 |
| Peak memory | 229520 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4258750428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 27.usbdev_spurious_pids_ignored.4258750428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_stall_priority_over_nak.1633412176 |
| Short name | T2035 |
| Test name | |
| Test status | |
| Simulation time | 138847971 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 03:44:13 AM UTC 24 |
| Finished | Aug 29 03:44:14 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1633412176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_stall_priority_over_nak.1633412176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_stall_trans.2669988172 |
| Short name | T2037 |
| Test name | |
| Test status | |
| Simulation time | 241132190 ps |
| CPU time | 0.93 seconds |
| Started | Aug 29 03:44:13 AM UTC 24 |
| Finished | Aug 29 03:44:15 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2669988172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_stall_trans.2669988172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_stream_len_max.3782557052 |
| Short name | T2046 |
| Test name | |
| Test status | |
| Simulation time | 555380537 ps |
| CPU time | 1.67 seconds |
| Started | Aug 29 03:44:13 AM UTC 24 |
| Finished | Aug 29 03:44:15 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3782557052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_stream_len_max.3782557052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_streaming_out.2430639407 |
| Short name | T2096 |
| Test name | |
| Test status | |
| Simulation time | 1949298585 ps |
| CPU time | 46.43 seconds |
| Started | Aug 29 03:44:13 AM UTC 24 |
| Finished | Aug 29 03:45:01 AM UTC 24 |
| Peak memory | 227432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2430639407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_streaming_out.2430639407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_timeout_missing_host_handshake.2334525358 |
| Short name | T2018 |
| Test name | |
| Test status | |
| Simulation time | 4339073019 ps |
| CPU time | 24.4 seconds |
| Started | Aug 29 03:43:46 AM UTC 24 |
| Finished | Aug 29 03:44:11 AM UTC 24 |
| Peak memory | 217252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2334525358 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_timeout_missing_host_handshake.2334525358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/27.usbdev_tx_rx_disruption.820367678 |
| Short name | T2042 |
| Test name | |
| Test status | |
| Simulation time | 474904760 ps |
| CPU time | 1.49 seconds |
| Started | Aug 29 03:44:13 AM UTC 24 |
| Finished | Aug 29 03:44:15 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=820367678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_tx _rx_disruption.820367678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/27.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/270.usbdev_tx_rx_disruption.3978416657 |
| Short name | T3580 |
| Test name | |
| Test status | |
| Simulation time | 523467947 ps |
| CPU time | 1.81 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:42 AM UTC 24 |
| Peak memory | 215004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3978416657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 270.usbdev_ tx_rx_disruption.3978416657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/270.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/271.usbdev_tx_rx_disruption.3548283792 |
| Short name | T3569 |
| Test name | |
| Test status | |
| Simulation time | 540116058 ps |
| CPU time | 1.43 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3548283792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 271.usbdev_ tx_rx_disruption.3548283792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/271.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/272.usbdev_tx_rx_disruption.205647886 |
| Short name | T3574 |
| Test name | |
| Test status | |
| Simulation time | 487803048 ps |
| CPU time | 1.73 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:42 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=205647886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 272.usbdev_t x_rx_disruption.205647886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/272.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/273.usbdev_tx_rx_disruption.1445419238 |
| Short name | T3575 |
| Test name | |
| Test status | |
| Simulation time | 565069193 ps |
| CPU time | 1.56 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1445419238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 273.usbdev_ tx_rx_disruption.1445419238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/273.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/274.usbdev_tx_rx_disruption.4185178211 |
| Short name | T3588 |
| Test name | |
| Test status | |
| Simulation time | 563927595 ps |
| CPU time | 1.86 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4185178211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 274.usbdev_ tx_rx_disruption.4185178211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/274.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/275.usbdev_tx_rx_disruption.2737918609 |
| Short name | T3585 |
| Test name | |
| Test status | |
| Simulation time | 577083144 ps |
| CPU time | 1.76 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2737918609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 275.usbdev_ tx_rx_disruption.2737918609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/275.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/276.usbdev_tx_rx_disruption.1731166801 |
| Short name | T3590 |
| Test name | |
| Test status | |
| Simulation time | 495811445 ps |
| CPU time | 1.96 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1731166801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 276.usbdev_ tx_rx_disruption.1731166801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/276.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/277.usbdev_tx_rx_disruption.3421017254 |
| Short name | T3596 |
| Test name | |
| Test status | |
| Simulation time | 464226021 ps |
| CPU time | 2.02 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:43 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3421017254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 277.usbdev_ tx_rx_disruption.3421017254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/277.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/278.usbdev_tx_rx_disruption.34773540 |
| Short name | T3577 |
| Test name | |
| Test status | |
| Simulation time | 622382691 ps |
| CPU time | 1.61 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=34773540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 278.usbdev_tx _rx_disruption.34773540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/278.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/279.usbdev_tx_rx_disruption.2220762698 |
| Short name | T3597 |
| Test name | |
| Test status | |
| Simulation time | 556287572 ps |
| CPU time | 1.92 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:43 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2220762698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 279.usbdev_ tx_rx_disruption.2220762698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/279.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_alert_test.1611867196 |
| Short name | T2081 |
| Test name | |
| Test status | |
| Simulation time | 44898598 ps |
| CPU time | 0.73 seconds |
| Started | Aug 29 03:44:39 AM UTC 24 |
| Finished | Aug 29 03:44:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1611867196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 28.usbdev_alert_test.1611867196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_disconnect.987480408 |
| Short name | T2056 |
| Test name | |
| Test status | |
| Simulation time | 6592578653 ps |
| CPU time | 10.18 seconds |
| Started | Aug 29 03:44:13 AM UTC 24 |
| Finished | Aug 29 03:44:24 AM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=987480408 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_disconnect.987480408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_reset.1323332309 |
| Short name | T2064 |
| Test name | |
| Test status | |
| Simulation time | 19839607157 ps |
| CPU time | 25.98 seconds |
| Started | Aug 29 03:44:13 AM UTC 24 |
| Finished | Aug 29 03:44:40 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1323332309 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_reset.1323332309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_resume.3445475533 |
| Short name | T2090 |
| Test name | |
| Test status | |
| Simulation time | 26061199542 ps |
| CPU time | 34.16 seconds |
| Started | Aug 29 03:44:13 AM UTC 24 |
| Finished | Aug 29 03:44:48 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3445475533 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_resume.3445475533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_av_buffer.354682323 |
| Short name | T2039 |
| Test name | |
| Test status | |
| Simulation time | 163948527 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 03:44:13 AM UTC 24 |
| Finished | Aug 29 03:44:15 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=354682323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_av_buffer.354682323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_bitstuff_err.2394121620 |
| Short name | T2040 |
| Test name | |
| Test status | |
| Simulation time | 188480976 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 03:44:13 AM UTC 24 |
| Finished | Aug 29 03:44:15 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2394121620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_bitstuff_err.2394121620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_data_toggle_clear.3571973306 |
| Short name | T2048 |
| Test name | |
| Test status | |
| Simulation time | 518820522 ps |
| CPU time | 2.14 seconds |
| Started | Aug 29 03:44:13 AM UTC 24 |
| Finished | Aug 29 03:44:16 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3571973306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 28.usbdev_data_toggle_clear.3571973306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_data_toggle_restore.3395718609 |
| Short name | T2053 |
| Test name | |
| Test status | |
| Simulation time | 1379098448 ps |
| CPU time | 3.8 seconds |
| Started | Aug 29 03:44:13 AM UTC 24 |
| Finished | Aug 29 03:44:18 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3395718609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_data_toggle_restore.3395718609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_device_address.1526019140 |
| Short name | T2139 |
| Test name | |
| Test status | |
| Simulation time | 45748003911 ps |
| CPU time | 70.04 seconds |
| Started | Aug 29 03:44:13 AM UTC 24 |
| Finished | Aug 29 03:45:25 AM UTC 24 |
| Peak memory | 217432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1526019140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_device_address.1526019140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_device_timeout.2741875964 |
| Short name | T2060 |
| Test name | |
| Test status | |
| Simulation time | 1221659749 ps |
| CPU time | 21.79 seconds |
| Started | Aug 29 03:44:13 AM UTC 24 |
| Finished | Aug 29 03:44:36 AM UTC 24 |
| Peak memory | 217252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2741875964 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_device_timeout.2741875964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_disable_endpoint.3305692970 |
| Short name | T2049 |
| Test name | |
| Test status | |
| Simulation time | 875713831 ps |
| CPU time | 2.06 seconds |
| Started | Aug 29 03:44:13 AM UTC 24 |
| Finished | Aug 29 03:44:16 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3305692970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 28.usbdev_disable_endpoint.3305692970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_disconnected.1864918663 |
| Short name | T2044 |
| Test name | |
| Test status | |
| Simulation time | 154051619 ps |
| CPU time | 1.1 seconds |
| Started | Aug 29 03:44:13 AM UTC 24 |
| Finished | Aug 29 03:44:15 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1864918663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_disconnected.1864918663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_enable.2154029338 |
| Short name | T2041 |
| Test name | |
| Test status | |
| Simulation time | 52445368 ps |
| CPU time | 0.93 seconds |
| Started | Aug 29 03:44:13 AM UTC 24 |
| Finished | Aug 29 03:44:15 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2154029338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 28.usbdev_enable.2154029338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_endpoint_access.2095361037 |
| Short name | T2051 |
| Test name | |
| Test status | |
| Simulation time | 897950655 ps |
| CPU time | 2.61 seconds |
| Started | Aug 29 03:44:13 AM UTC 24 |
| Finished | Aug 29 03:44:17 AM UTC 24 |
| Peak memory | 217116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2095361037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_endpoint_access.2095361037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_endpoint_types.3959483998 |
| Short name | T569 |
| Test name | |
| Test status | |
| Simulation time | 464627292 ps |
| CPU time | 1.32 seconds |
| Started | Aug 29 03:44:13 AM UTC 24 |
| Finished | Aug 29 03:44:16 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3959483998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_endpoint_types.3959483998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_fifo_rst.2962924633 |
| Short name | T2050 |
| Test name | |
| Test status | |
| Simulation time | 345349058 ps |
| CPU time | 2.33 seconds |
| Started | Aug 29 03:44:13 AM UTC 24 |
| Finished | Aug 29 03:44:17 AM UTC 24 |
| Peak memory | 216780 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2962924633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_fifo_rst.2962924633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_in_iso.1179466896 |
| Short name | T2047 |
| Test name | |
| Test status | |
| Simulation time | 197544326 ps |
| CPU time | 1.19 seconds |
| Started | Aug 29 03:44:13 AM UTC 24 |
| Finished | Aug 29 03:44:16 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1179466896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 28.usbdev_in_iso.1179466896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_in_stall.655995401 |
| Short name | T2043 |
| Test name | |
| Test status | |
| Simulation time | 157918634 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:44:13 AM UTC 24 |
| Finished | Aug 29 03:44:15 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=655995401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 28.usbdev_in_stall.655995401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_in_trans.1478654441 |
| Short name | T2045 |
| Test name | |
| Test status | |
| Simulation time | 187684365 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 03:44:13 AM UTC 24 |
| Finished | Aug 29 03:44:15 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1478654441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_in_trans.1478654441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_invalid_sync.1724283460 |
| Short name | T2177 |
| Test name | |
| Test status | |
| Simulation time | 3923260838 ps |
| CPU time | 93.43 seconds |
| Started | Aug 29 03:44:13 AM UTC 24 |
| Finished | Aug 29 03:45:49 AM UTC 24 |
| Peak memory | 227168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1724283460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 28.usbdev_invalid_sync.1724283460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_iso_retraction.2085328724 |
| Short name | T2131 |
| Test name | |
| Test status | |
| Simulation time | 5893631971 ps |
| CPU time | 32.67 seconds |
| Started | Aug 29 03:44:38 AM UTC 24 |
| Finished | Aug 29 03:45:12 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2085328724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_iso_retraction.2085328724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_link_in_err.1197421311 |
| Short name | T2065 |
| Test name | |
| Test status | |
| Simulation time | 271087251 ps |
| CPU time | 0.98 seconds |
| Started | Aug 29 03:44:38 AM UTC 24 |
| Finished | Aug 29 03:44:40 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1197421311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_link_in_err.1197421311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_link_resume.2188618627 |
| Short name | T2133 |
| Test name | |
| Test status | |
| Simulation time | 26448120568 ps |
| CPU time | 33.84 seconds |
| Started | Aug 29 03:44:38 AM UTC 24 |
| Finished | Aug 29 03:45:13 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2188618627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_link_resume.2188618627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_link_suspend.1781278913 |
| Short name | T2088 |
| Test name | |
| Test status | |
| Simulation time | 5363043782 ps |
| CPU time | 7.58 seconds |
| Started | Aug 29 03:44:38 AM UTC 24 |
| Finished | Aug 29 03:44:47 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1781278913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_link_suspend.1781278913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_low_speed_traffic.2598057505 |
| Short name | T2099 |
| Test name | |
| Test status | |
| Simulation time | 2810586649 ps |
| CPU time | 26.62 seconds |
| Started | Aug 29 03:44:38 AM UTC 24 |
| Finished | Aug 29 03:45:06 AM UTC 24 |
| Peak memory | 229728 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2598057505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_low_speed_traffic.2598057505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_max_inter_pkt_delay.3574536259 |
| Short name | T2220 |
| Test name | |
| Test status | |
| Simulation time | 3944360928 ps |
| CPU time | 101.17 seconds |
| Started | Aug 29 03:44:38 AM UTC 24 |
| Finished | Aug 29 03:46:22 AM UTC 24 |
| Peak memory | 229756 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3574536259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_max_inter_pkt_delay.3574536259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_max_length_in_transaction.3576595653 |
| Short name | T2066 |
| Test name | |
| Test status | |
| Simulation time | 268037994 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 03:44:38 AM UTC 24 |
| Finished | Aug 29 03:44:40 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3576595653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 28.usbdev_max_length_in_transaction.3576595653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_max_length_out_transaction.500224026 |
| Short name | T2067 |
| Test name | |
| Test status | |
| Simulation time | 203602764 ps |
| CPU time | 0.9 seconds |
| Started | Aug 29 03:44:38 AM UTC 24 |
| Finished | Aug 29 03:44:40 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=500224026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 28.usbdev_max_length_out_transaction.500224026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_min_inter_pkt_delay.576181809 |
| Short name | T2097 |
| Test name | |
| Test status | |
| Simulation time | 2614111453 ps |
| CPU time | 22.69 seconds |
| Started | Aug 29 03:44:38 AM UTC 24 |
| Finished | Aug 29 03:45:02 AM UTC 24 |
| Peak memory | 229596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=576181809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_min_inter_pkt_delay.576181809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_min_length_in_transaction.4248995692 |
| Short name | T2031 |
| Test name | |
| Test status | |
| Simulation time | 192832238 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 03:44:38 AM UTC 24 |
| Finished | Aug 29 03:44:40 AM UTC 24 |
| Peak memory | 214868 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4248995692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 28.usbdev_min_length_in_transaction.4248995692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_min_length_out_transaction.2971509636 |
| Short name | T2068 |
| Test name | |
| Test status | |
| Simulation time | 148817715 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 03:44:38 AM UTC 24 |
| Finished | Aug 29 03:44:40 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2971509636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 28.usbdev_min_length_out_transaction.2971509636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_nak_trans.779374746 |
| Short name | T140 |
| Test name | |
| Test status | |
| Simulation time | 189858196 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 03:44:39 AM UTC 24 |
| Finished | Aug 29 03:44:41 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=779374746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_nak_trans.779374746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_out_iso.4226310156 |
| Short name | T2023 |
| Test name | |
| Test status | |
| Simulation time | 183216512 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 03:44:39 AM UTC 24 |
| Finished | Aug 29 03:44:41 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4226310156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 28.usbdev_out_iso.4226310156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_out_stall.68696897 |
| Short name | T2036 |
| Test name | |
| Test status | |
| Simulation time | 175907676 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 03:44:39 AM UTC 24 |
| Finished | Aug 29 03:44:40 AM UTC 24 |
| Peak memory | 214876 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=68696897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 28.usbdev_out_stall.68696897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_out_trans_nak.1864256638 |
| Short name | T2069 |
| Test name | |
| Test status | |
| Simulation time | 178580301 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 03:44:39 AM UTC 24 |
| Finished | Aug 29 03:44:41 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1864256638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 28.usbdev_out_trans_nak.1864256638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_pending_in_trans.3380007403 |
| Short name | T1988 |
| Test name | |
| Test status | |
| Simulation time | 148579346 ps |
| CPU time | 0.77 seconds |
| Started | Aug 29 03:44:39 AM UTC 24 |
| Finished | Aug 29 03:44:41 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3380007403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 28.usbdev_pending_in_trans.3380007403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_phy_config_pinflip.1189563105 |
| Short name | T2072 |
| Test name | |
| Test status | |
| Simulation time | 192255945 ps |
| CPU time | 0.98 seconds |
| Started | Aug 29 03:44:39 AM UTC 24 |
| Finished | Aug 29 03:44:41 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1189563105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 28.usbdev_phy_config_pinflip.1189563105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_phy_config_usb_ref_disable.2147780271 |
| Short name | T2070 |
| Test name | |
| Test status | |
| Simulation time | 222943394 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 03:44:39 AM UTC 24 |
| Finished | Aug 29 03:44:41 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2147780271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 28.usbdev_phy_config_usb_ref_disable.2147780271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_phy_pins_sense.1233735042 |
| Short name | T2073 |
| Test name | |
| Test status | |
| Simulation time | 50429295 ps |
| CPU time | 0.69 seconds |
| Started | Aug 29 03:44:39 AM UTC 24 |
| Finished | Aug 29 03:44:41 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1233735042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_phy_pins_sense.1233735042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_buffer.2798514283 |
| Short name | T2135 |
| Test name | |
| Test status | |
| Simulation time | 14517480333 ps |
| CPU time | 35.29 seconds |
| Started | Aug 29 03:44:39 AM UTC 24 |
| Finished | Aug 29 03:45:16 AM UTC 24 |
| Peak memory | 227668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2798514283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 28.usbdev_pkt_buffer.2798514283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_received.343584325 |
| Short name | T2071 |
| Test name | |
| Test status | |
| Simulation time | 189608956 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 03:44:39 AM UTC 24 |
| Finished | Aug 29 03:44:41 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=343584325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_pkt_received.343584325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_sent.2857685295 |
| Short name | T2078 |
| Test name | |
| Test status | |
| Simulation time | 211680903 ps |
| CPU time | 1 seconds |
| Started | Aug 29 03:44:39 AM UTC 24 |
| Finished | Aug 29 03:44:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2857685295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_pkt_sent.2857685295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_random_length_in_transaction.4234605090 |
| Short name | T2076 |
| Test name | |
| Test status | |
| Simulation time | 205492398 ps |
| CPU time | 0.9 seconds |
| Started | Aug 29 03:44:39 AM UTC 24 |
| Finished | Aug 29 03:44:41 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4234605090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 28.usbdev_random_length_in_transaction.4234605090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_random_length_out_transaction.188251370 |
| Short name | T2075 |
| Test name | |
| Test status | |
| Simulation time | 252343391 ps |
| CPU time | 0.9 seconds |
| Started | Aug 29 03:44:39 AM UTC 24 |
| Finished | Aug 29 03:44:41 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=188251370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 28.usbdev_random_length_out_transaction.188251370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_rx_crc_err.970017496 |
| Short name | T2074 |
| Test name | |
| Test status | |
| Simulation time | 144724889 ps |
| CPU time | 0.73 seconds |
| Started | Aug 29 03:44:39 AM UTC 24 |
| Finished | Aug 29 03:44:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=970017496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_rx_crc_err.970017496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_rx_full.727229917 |
| Short name | T369 |
| Test name | |
| Test status | |
| Simulation time | 247874049 ps |
| CPU time | 1 seconds |
| Started | Aug 29 03:44:39 AM UTC 24 |
| Finished | Aug 29 03:44:42 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=727229917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 28.usbdev_rx_full.727229917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_setup_stage.514489120 |
| Short name | T2079 |
| Test name | |
| Test status | |
| Simulation time | 158951210 ps |
| CPU time | 0.9 seconds |
| Started | Aug 29 03:44:39 AM UTC 24 |
| Finished | Aug 29 03:44:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=514489120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 28.usbdev_setup_stage.514489120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_setup_trans_ignored.1364408379 |
| Short name | T2077 |
| Test name | |
| Test status | |
| Simulation time | 147106249 ps |
| CPU time | 0.82 seconds |
| Started | Aug 29 03:44:39 AM UTC 24 |
| Finished | Aug 29 03:44:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1364408379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 28.usbdev_setup_trans_ignored.1364408379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_smoke.2300726287 |
| Short name | T2085 |
| Test name | |
| Test status | |
| Simulation time | 261243738 ps |
| CPU time | 1.21 seconds |
| Started | Aug 29 03:44:39 AM UTC 24 |
| Finished | Aug 29 03:44:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2300726287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_smoke.2300726287 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_spurious_pids_ignored.3893059482 |
| Short name | T2141 |
| Test name | |
| Test status | |
| Simulation time | 2166931756 ps |
| CPU time | 50.75 seconds |
| Started | Aug 29 03:44:39 AM UTC 24 |
| Finished | Aug 29 03:45:32 AM UTC 24 |
| Peak memory | 227696 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3893059482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 28.usbdev_spurious_pids_ignored.3893059482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_stall_priority_over_nak.1952474114 |
| Short name | T2080 |
| Test name | |
| Test status | |
| Simulation time | 163169296 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 03:44:39 AM UTC 24 |
| Finished | Aug 29 03:44:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1952474114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_stall_priority_over_nak.1952474114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_stall_trans.3747688474 |
| Short name | T2082 |
| Test name | |
| Test status | |
| Simulation time | 160034562 ps |
| CPU time | 1.02 seconds |
| Started | Aug 29 03:44:39 AM UTC 24 |
| Finished | Aug 29 03:44:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3747688474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_stall_trans.3747688474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_stream_len_max.649096591 |
| Short name | T2087 |
| Test name | |
| Test status | |
| Simulation time | 1190311391 ps |
| CPU time | 2.81 seconds |
| Started | Aug 29 03:44:39 AM UTC 24 |
| Finished | Aug 29 03:44:44 AM UTC 24 |
| Peak memory | 217264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=649096591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 28.usbdev_stream_len_max.649096591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_streaming_out.1095309360 |
| Short name | T2098 |
| Test name | |
| Test status | |
| Simulation time | 3483591098 ps |
| CPU time | 24.2 seconds |
| Started | Aug 29 03:44:39 AM UTC 24 |
| Finished | Aug 29 03:45:05 AM UTC 24 |
| Peak memory | 229648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1095309360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_streaming_out.1095309360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/28.usbdev_timeout_missing_host_handshake.1312747147 |
| Short name | T2063 |
| Test name | |
| Test status | |
| Simulation time | 1220857554 ps |
| CPU time | 24.09 seconds |
| Started | Aug 29 03:44:13 AM UTC 24 |
| Finished | Aug 29 03:44:38 AM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1312747147 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_timeout_missing_host_handshake.1312747147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/28.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/280.usbdev_tx_rx_disruption.2838003569 |
| Short name | T3573 |
| Test name | |
| Test status | |
| Simulation time | 525895188 ps |
| CPU time | 1.44 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2838003569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 280.usbdev_ tx_rx_disruption.2838003569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/280.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/281.usbdev_tx_rx_disruption.2546391043 |
| Short name | T3601 |
| Test name | |
| Test status | |
| Simulation time | 644300621 ps |
| CPU time | 1.93 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:43 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2546391043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 281.usbdev_ tx_rx_disruption.2546391043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/281.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/282.usbdev_tx_rx_disruption.1150476253 |
| Short name | T3602 |
| Test name | |
| Test status | |
| Simulation time | 682610437 ps |
| CPU time | 2.16 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:43 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1150476253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 282.usbdev_ tx_rx_disruption.1150476253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/282.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/283.usbdev_tx_rx_disruption.1555516388 |
| Short name | T3591 |
| Test name | |
| Test status | |
| Simulation time | 619650125 ps |
| CPU time | 1.77 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:43 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1555516388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 283.usbdev_ tx_rx_disruption.1555516388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/283.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/284.usbdev_tx_rx_disruption.1749516740 |
| Short name | T3583 |
| Test name | |
| Test status | |
| Simulation time | 538506283 ps |
| CPU time | 1.56 seconds |
| Started | Aug 29 04:11:39 AM UTC 24 |
| Finished | Aug 29 04:11:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1749516740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 284.usbdev_ tx_rx_disruption.1749516740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/284.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/285.usbdev_tx_rx_disruption.1951704291 |
| Short name | T3605 |
| Test name | |
| Test status | |
| Simulation time | 650490154 ps |
| CPU time | 2.3 seconds |
| Started | Aug 29 04:11:40 AM UTC 24 |
| Finished | Aug 29 04:11:43 AM UTC 24 |
| Peak memory | 217036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1951704291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 285.usbdev_ tx_rx_disruption.1951704291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/285.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/286.usbdev_tx_rx_disruption.459752900 |
| Short name | T3594 |
| Test name | |
| Test status | |
| Simulation time | 555923537 ps |
| CPU time | 1.61 seconds |
| Started | Aug 29 04:11:40 AM UTC 24 |
| Finished | Aug 29 04:11:43 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=459752900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 286.usbdev_t x_rx_disruption.459752900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/286.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/287.usbdev_tx_rx_disruption.1914753544 |
| Short name | T3587 |
| Test name | |
| Test status | |
| Simulation time | 491882825 ps |
| CPU time | 1.45 seconds |
| Started | Aug 29 04:11:40 AM UTC 24 |
| Finished | Aug 29 04:11:42 AM UTC 24 |
| Peak memory | 214992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1914753544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 287.usbdev_ tx_rx_disruption.1914753544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/287.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/288.usbdev_tx_rx_disruption.2100496961 |
| Short name | T3599 |
| Test name | |
| Test status | |
| Simulation time | 561915996 ps |
| CPU time | 1.7 seconds |
| Started | Aug 29 04:11:40 AM UTC 24 |
| Finished | Aug 29 04:11:43 AM UTC 24 |
| Peak memory | 214996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2100496961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 288.usbdev_ tx_rx_disruption.2100496961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/288.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/289.usbdev_tx_rx_disruption.2938536043 |
| Short name | T3600 |
| Test name | |
| Test status | |
| Simulation time | 595495880 ps |
| CPU time | 1.71 seconds |
| Started | Aug 29 04:11:40 AM UTC 24 |
| Finished | Aug 29 04:11:43 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2938536043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 289.usbdev_ tx_rx_disruption.2938536043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/289.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_alert_test.4208348329 |
| Short name | T2149 |
| Test name | |
| Test status | |
| Simulation time | 125361723 ps |
| CPU time | 0.66 seconds |
| Started | Aug 29 03:45:41 AM UTC 24 |
| Finished | Aug 29 03:45:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4208348329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 29.usbdev_alert_test.4208348329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_disconnect.613208398 |
| Short name | T2093 |
| Test name | |
| Test status | |
| Simulation time | 9703962425 ps |
| CPU time | 11.58 seconds |
| Started | Aug 29 03:44:39 AM UTC 24 |
| Finished | Aug 29 03:44:53 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=613208398 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_disconnect.613208398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_reset.685395193 |
| Short name | T2095 |
| Test name | |
| Test status | |
| Simulation time | 15588702934 ps |
| CPU time | 17.44 seconds |
| Started | Aug 29 03:44:39 AM UTC 24 |
| Finished | Aug 29 03:44:59 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=685395193 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_reset.685395193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_resume.4000659638 |
| Short name | T2136 |
| Test name | |
| Test status | |
| Simulation time | 31144218117 ps |
| CPU time | 39.13 seconds |
| Started | Aug 29 03:44:39 AM UTC 24 |
| Finished | Aug 29 03:45:20 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4000659638 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_resume.4000659638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_av_buffer.1190296888 |
| Short name | T2086 |
| Test name | |
| Test status | |
| Simulation time | 194322407 ps |
| CPU time | 1.04 seconds |
| Started | Aug 29 03:44:39 AM UTC 24 |
| Finished | Aug 29 03:44:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1190296888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_av_buffer.1190296888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_bitstuff_err.2522760947 |
| Short name | T2083 |
| Test name | |
| Test status | |
| Simulation time | 148479754 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 03:44:39 AM UTC 24 |
| Finished | Aug 29 03:44:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2522760947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_bitstuff_err.2522760947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_data_toggle_clear.2914137907 |
| Short name | T2103 |
| Test name | |
| Test status | |
| Simulation time | 298427031 ps |
| CPU time | 1.17 seconds |
| Started | Aug 29 03:45:08 AM UTC 24 |
| Finished | Aug 29 03:45:10 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2914137907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 29.usbdev_data_toggle_clear.2914137907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_data_toggle_restore.2054996803 |
| Short name | T2129 |
| Test name | |
| Test status | |
| Simulation time | 1002778958 ps |
| CPU time | 2.81 seconds |
| Started | Aug 29 03:45:08 AM UTC 24 |
| Finished | Aug 29 03:45:12 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2054996803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_data_toggle_restore.2054996803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_device_address.2416342056 |
| Short name | T2143 |
| Test name | |
| Test status | |
| Simulation time | 14546904254 ps |
| CPU time | 27.63 seconds |
| Started | Aug 29 03:45:08 AM UTC 24 |
| Finished | Aug 29 03:45:37 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2416342056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_device_address.2416342056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_device_timeout.315272669 |
| Short name | T2138 |
| Test name | |
| Test status | |
| Simulation time | 747776503 ps |
| CPU time | 12.96 seconds |
| Started | Aug 29 03:45:08 AM UTC 24 |
| Finished | Aug 29 03:45:22 AM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=315272669 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_device_timeout.315272669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_disable_endpoint.1671826785 |
| Short name | T2109 |
| Test name | |
| Test status | |
| Simulation time | 647985940 ps |
| CPU time | 1.67 seconds |
| Started | Aug 29 03:45:08 AM UTC 24 |
| Finished | Aug 29 03:45:11 AM UTC 24 |
| Peak memory | 216620 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1671826785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 29.usbdev_disable_endpoint.1671826785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_disconnected.1367773548 |
| Short name | T2101 |
| Test name | |
| Test status | |
| Simulation time | 164609181 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 03:45:08 AM UTC 24 |
| Finished | Aug 29 03:45:10 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1367773548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_disconnected.1367773548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_enable.669970808 |
| Short name | T2100 |
| Test name | |
| Test status | |
| Simulation time | 44056590 ps |
| CPU time | 0.61 seconds |
| Started | Aug 29 03:45:08 AM UTC 24 |
| Finished | Aug 29 03:45:10 AM UTC 24 |
| Peak memory | 216612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=669970808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_enable.669970808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_endpoint_access.274332794 |
| Short name | T2132 |
| Test name | |
| Test status | |
| Simulation time | 1107365113 ps |
| CPU time | 3.41 seconds |
| Started | Aug 29 03:45:08 AM UTC 24 |
| Finished | Aug 29 03:45:13 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=274332794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_endpoint_access.274332794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_endpoint_types.4125532728 |
| Short name | T550 |
| Test name | |
| Test status | |
| Simulation time | 147282142 ps |
| CPU time | 0.77 seconds |
| Started | Aug 29 03:45:08 AM UTC 24 |
| Finished | Aug 29 03:45:10 AM UTC 24 |
| Peak memory | 214988 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4125532728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_endpoint_types.4125532728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_fifo_levels.3711207135 |
| Short name | T361 |
| Test name | |
| Test status | |
| Simulation time | 272047969 ps |
| CPU time | 1.06 seconds |
| Started | Aug 29 03:45:08 AM UTC 24 |
| Finished | Aug 29 03:45:10 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3711207135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_fifo_levels.3711207135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_fifo_rst.3377966555 |
| Short name | T2130 |
| Test name | |
| Test status | |
| Simulation time | 450324799 ps |
| CPU time | 2.71 seconds |
| Started | Aug 29 03:45:08 AM UTC 24 |
| Finished | Aug 29 03:45:12 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3377966555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_fifo_rst.3377966555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_in_iso.4262559911 |
| Short name | T2106 |
| Test name | |
| Test status | |
| Simulation time | 267907447 ps |
| CPU time | 1.14 seconds |
| Started | Aug 29 03:45:08 AM UTC 24 |
| Finished | Aug 29 03:45:11 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4262559911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 29.usbdev_in_iso.4262559911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_in_stall.2960176897 |
| Short name | T2104 |
| Test name | |
| Test status | |
| Simulation time | 151922402 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 03:45:08 AM UTC 24 |
| Finished | Aug 29 03:45:10 AM UTC 24 |
| Peak memory | 214904 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2960176897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_in_stall.2960176897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_in_trans.500258668 |
| Short name | T2108 |
| Test name | |
| Test status | |
| Simulation time | 231506801 ps |
| CPU time | 1.2 seconds |
| Started | Aug 29 03:45:08 AM UTC 24 |
| Finished | Aug 29 03:45:11 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=500258668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 29.usbdev_in_trans.500258668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_invalid_sync.3183133731 |
| Short name | T2142 |
| Test name | |
| Test status | |
| Simulation time | 2778531638 ps |
| CPU time | 23.64 seconds |
| Started | Aug 29 03:45:08 AM UTC 24 |
| Finished | Aug 29 03:45:33 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3183133731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 29.usbdev_invalid_sync.3183133731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_iso_retraction.3814811621 |
| Short name | T2186 |
| Test name | |
| Test status | |
| Simulation time | 9288386968 ps |
| CPU time | 53.01 seconds |
| Started | Aug 29 03:45:08 AM UTC 24 |
| Finished | Aug 29 03:46:03 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3814811621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_iso_retraction.3814811621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_link_in_err.1379279852 |
| Short name | T2105 |
| Test name | |
| Test status | |
| Simulation time | 200344943 ps |
| CPU time | 0.97 seconds |
| Started | Aug 29 03:45:08 AM UTC 24 |
| Finished | Aug 29 03:45:11 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1379279852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_link_in_err.1379279852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_link_resume.2424827729 |
| Short name | T2180 |
| Test name | |
| Test status | |
| Simulation time | 29814108634 ps |
| CPU time | 43.65 seconds |
| Started | Aug 29 03:45:08 AM UTC 24 |
| Finished | Aug 29 03:45:54 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2424827729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_link_resume.2424827729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_link_suspend.1955566656 |
| Short name | T2137 |
| Test name | |
| Test status | |
| Simulation time | 9160531584 ps |
| CPU time | 11.8 seconds |
| Started | Aug 29 03:45:08 AM UTC 24 |
| Finished | Aug 29 03:45:21 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1955566656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_link_suspend.1955566656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_low_speed_traffic.1888475099 |
| Short name | T614 |
| Test name | |
| Test status | |
| Simulation time | 5755065047 ps |
| CPU time | 39.82 seconds |
| Started | Aug 29 03:45:08 AM UTC 24 |
| Finished | Aug 29 03:45:50 AM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1888475099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_low_speed_traffic.1888475099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_max_inter_pkt_delay.1762901108 |
| Short name | T2144 |
| Test name | |
| Test status | |
| Simulation time | 3346993435 ps |
| CPU time | 28.76 seconds |
| Started | Aug 29 03:45:08 AM UTC 24 |
| Finished | Aug 29 03:45:39 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1762901108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_max_inter_pkt_delay.1762901108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_max_length_in_transaction.1249970999 |
| Short name | T2117 |
| Test name | |
| Test status | |
| Simulation time | 286378713 ps |
| CPU time | 1.27 seconds |
| Started | Aug 29 03:45:09 AM UTC 24 |
| Finished | Aug 29 03:45:11 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1249970999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 29.usbdev_max_length_in_transaction.1249970999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_max_length_out_transaction.3948145168 |
| Short name | T2111 |
| Test name | |
| Test status | |
| Simulation time | 191517595 ps |
| CPU time | 1.02 seconds |
| Started | Aug 29 03:45:09 AM UTC 24 |
| Finished | Aug 29 03:45:11 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3948145168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 29.usbdev_max_length_out_transaction.3948145168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_min_inter_pkt_delay.3759403408 |
| Short name | T2140 |
| Test name | |
| Test status | |
| Simulation time | 2201082249 ps |
| CPU time | 14.84 seconds |
| Started | Aug 29 03:45:09 AM UTC 24 |
| Finished | Aug 29 03:45:25 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3759403408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_min_inter_pkt_delay.3759403408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_min_length_in_transaction.2322693392 |
| Short name | T2107 |
| Test name | |
| Test status | |
| Simulation time | 148711673 ps |
| CPU time | 0.82 seconds |
| Started | Aug 29 03:45:09 AM UTC 24 |
| Finished | Aug 29 03:45:11 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2322693392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 29.usbdev_min_length_in_transaction.2322693392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_min_length_out_transaction.2338575879 |
| Short name | T2116 |
| Test name | |
| Test status | |
| Simulation time | 164999927 ps |
| CPU time | 1.22 seconds |
| Started | Aug 29 03:45:09 AM UTC 24 |
| Finished | Aug 29 03:45:11 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2338575879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 29.usbdev_min_length_out_transaction.2338575879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_nak_trans.3151409075 |
| Short name | T141 |
| Test name | |
| Test status | |
| Simulation time | 210491179 ps |
| CPU time | 1.09 seconds |
| Started | Aug 29 03:45:09 AM UTC 24 |
| Finished | Aug 29 03:45:11 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3151409075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_nak_trans.3151409075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_out_iso.1371539637 |
| Short name | T2119 |
| Test name | |
| Test status | |
| Simulation time | 159774021 ps |
| CPU time | 1.21 seconds |
| Started | Aug 29 03:45:09 AM UTC 24 |
| Finished | Aug 29 03:45:11 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1371539637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 29.usbdev_out_iso.1371539637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_out_stall.451158370 |
| Short name | T2122 |
| Test name | |
| Test status | |
| Simulation time | 167898194 ps |
| CPU time | 1.25 seconds |
| Started | Aug 29 03:45:09 AM UTC 24 |
| Finished | Aug 29 03:45:11 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=451158370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_out_stall.451158370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_out_trans_nak.3777535837 |
| Short name | T2110 |
| Test name | |
| Test status | |
| Simulation time | 148207138 ps |
| CPU time | 0.75 seconds |
| Started | Aug 29 03:45:09 AM UTC 24 |
| Finished | Aug 29 03:45:11 AM UTC 24 |
| Peak memory | 215024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3777535837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 29.usbdev_out_trans_nak.3777535837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_pending_in_trans.2453431079 |
| Short name | T2112 |
| Test name | |
| Test status | |
| Simulation time | 194919834 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 03:45:09 AM UTC 24 |
| Finished | Aug 29 03:45:11 AM UTC 24 |
| Peak memory | 215024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2453431079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 29.usbdev_pending_in_trans.2453431079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_phy_config_pinflip.2129171729 |
| Short name | T2114 |
| Test name | |
| Test status | |
| Simulation time | 175909403 ps |
| CPU time | 0.97 seconds |
| Started | Aug 29 03:45:09 AM UTC 24 |
| Finished | Aug 29 03:45:11 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2129171729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 29.usbdev_phy_config_pinflip.2129171729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_phy_config_usb_ref_disable.2526095733 |
| Short name | T2115 |
| Test name | |
| Test status | |
| Simulation time | 149732371 ps |
| CPU time | 0.99 seconds |
| Started | Aug 29 03:45:09 AM UTC 24 |
| Finished | Aug 29 03:45:11 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2526095733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 29.usbdev_phy_config_usb_ref_disable.2526095733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_phy_pins_sense.3587717092 |
| Short name | T2113 |
| Test name | |
| Test status | |
| Simulation time | 40119157 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 03:45:09 AM UTC 24 |
| Finished | Aug 29 03:45:11 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3587717092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_phy_pins_sense.3587717092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_buffer.3460777571 |
| Short name | T2145 |
| Test name | |
| Test status | |
| Simulation time | 13551999486 ps |
| CPU time | 30.34 seconds |
| Started | Aug 29 03:45:09 AM UTC 24 |
| Finished | Aug 29 03:45:41 AM UTC 24 |
| Peak memory | 231700 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3460777571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_pkt_buffer.3460777571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_received.4046986252 |
| Short name | T2121 |
| Test name | |
| Test status | |
| Simulation time | 202704289 ps |
| CPU time | 0.94 seconds |
| Started | Aug 29 03:45:09 AM UTC 24 |
| Finished | Aug 29 03:45:11 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4046986252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_pkt_received.4046986252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_sent.3279877404 |
| Short name | T2118 |
| Test name | |
| Test status | |
| Simulation time | 235154590 ps |
| CPU time | 0.93 seconds |
| Started | Aug 29 03:45:09 AM UTC 24 |
| Finished | Aug 29 03:45:11 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3279877404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_pkt_sent.3279877404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_random_length_in_transaction.3403752734 |
| Short name | T2124 |
| Test name | |
| Test status | |
| Simulation time | 207514207 ps |
| CPU time | 1.03 seconds |
| Started | Aug 29 03:45:09 AM UTC 24 |
| Finished | Aug 29 03:45:11 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3403752734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 29.usbdev_random_length_in_transaction.3403752734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_random_length_out_transaction.103980410 |
| Short name | T2123 |
| Test name | |
| Test status | |
| Simulation time | 200809502 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 03:45:09 AM UTC 24 |
| Finished | Aug 29 03:45:11 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=103980410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 29.usbdev_random_length_out_transaction.103980410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_rx_crc_err.345330939 |
| Short name | T2120 |
| Test name | |
| Test status | |
| Simulation time | 155855474 ps |
| CPU time | 0.91 seconds |
| Started | Aug 29 03:45:09 AM UTC 24 |
| Finished | Aug 29 03:45:11 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=345330939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_rx_crc_err.345330939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_rx_full.1953821440 |
| Short name | T2128 |
| Test name | |
| Test status | |
| Simulation time | 359821573 ps |
| CPU time | 1.19 seconds |
| Started | Aug 29 03:45:09 AM UTC 24 |
| Finished | Aug 29 03:45:12 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1953821440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 29.usbdev_rx_full.1953821440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_setup_stage.2039433708 |
| Short name | T2126 |
| Test name | |
| Test status | |
| Simulation time | 164193849 ps |
| CPU time | 0.99 seconds |
| Started | Aug 29 03:45:09 AM UTC 24 |
| Finished | Aug 29 03:45:11 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2039433708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_setup_stage.2039433708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_setup_trans_ignored.1489277920 |
| Short name | T2125 |
| Test name | |
| Test status | |
| Simulation time | 149741218 ps |
| CPU time | 0.92 seconds |
| Started | Aug 29 03:45:09 AM UTC 24 |
| Finished | Aug 29 03:45:11 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1489277920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 29.usbdev_setup_trans_ignored.1489277920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_smoke.2641513584 |
| Short name | T2127 |
| Test name | |
| Test status | |
| Simulation time | 244487086 ps |
| CPU time | 0.94 seconds |
| Started | Aug 29 03:45:09 AM UTC 24 |
| Finished | Aug 29 03:45:11 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2641513584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_smoke.2641513584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_spurious_pids_ignored.3588139217 |
| Short name | T2187 |
| Test name | |
| Test status | |
| Simulation time | 2575107124 ps |
| CPU time | 22.34 seconds |
| Started | Aug 29 03:45:40 AM UTC 24 |
| Finished | Aug 29 03:46:04 AM UTC 24 |
| Peak memory | 229656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3588139217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 29.usbdev_spurious_pids_ignored.3588139217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_stall_priority_over_nak.349318002 |
| Short name | T2147 |
| Test name | |
| Test status | |
| Simulation time | 168481147 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 03:45:40 AM UTC 24 |
| Finished | Aug 29 03:45:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=349318002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_stall_priority_over_nak.349318002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_stall_trans.201542133 |
| Short name | T2148 |
| Test name | |
| Test status | |
| Simulation time | 172536023 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 03:45:40 AM UTC 24 |
| Finished | Aug 29 03:45:42 AM UTC 24 |
| Peak memory | 214724 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=201542133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_stall_trans.201542133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_stream_len_max.2593811754 |
| Short name | T2150 |
| Test name | |
| Test status | |
| Simulation time | 199974250 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 03:45:40 AM UTC 24 |
| Finished | Aug 29 03:45:42 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2593811754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_stream_len_max.2593811754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_streaming_out.2998156454 |
| Short name | T2284 |
| Test name | |
| Test status | |
| Simulation time | 3556966952 ps |
| CPU time | 82.23 seconds |
| Started | Aug 29 03:45:40 AM UTC 24 |
| Finished | Aug 29 03:47:05 AM UTC 24 |
| Peak memory | 227320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2998156454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_streaming_out.2998156454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_timeout_missing_host_handshake.82286078 |
| Short name | T2102 |
| Test name | |
| Test status | |
| Simulation time | 161884945 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:45:08 AM UTC 24 |
| Finished | Aug 29 03:45:10 AM UTC 24 |
| Peak memory | 215016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=82286078 -assert nopostproc +UVM_TESTNAME=usbdev_ba se_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_timeout_missing_host_handshake.82286078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/29.usbdev_tx_rx_disruption.3293754178 |
| Short name | T193 |
| Test name | |
| Test status | |
| Simulation time | 606565901 ps |
| CPU time | 1.41 seconds |
| Started | Aug 29 03:45:41 AM UTC 24 |
| Finished | Aug 29 03:45:43 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3293754178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_t x_rx_disruption.3293754178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/29.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/290.usbdev_tx_rx_disruption.3042784000 |
| Short name | T3595 |
| Test name | |
| Test status | |
| Simulation time | 582024418 ps |
| CPU time | 1.77 seconds |
| Started | Aug 29 04:11:40 AM UTC 24 |
| Finished | Aug 29 04:11:43 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3042784000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 290.usbdev_ tx_rx_disruption.3042784000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/290.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/291.usbdev_tx_rx_disruption.2593728084 |
| Short name | T3589 |
| Test name | |
| Test status | |
| Simulation time | 578769734 ps |
| CPU time | 1.53 seconds |
| Started | Aug 29 04:11:40 AM UTC 24 |
| Finished | Aug 29 04:11:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2593728084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 291.usbdev_ tx_rx_disruption.2593728084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/291.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/292.usbdev_tx_rx_disruption.2226393610 |
| Short name | T3566 |
| Test name | |
| Test status | |
| Simulation time | 607987473 ps |
| CPU time | 1.74 seconds |
| Started | Aug 29 04:11:40 AM UTC 24 |
| Finished | Aug 29 04:11:43 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2226393610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 292.usbdev_ tx_rx_disruption.2226393610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/292.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/293.usbdev_tx_rx_disruption.1661769161 |
| Short name | T3582 |
| Test name | |
| Test status | |
| Simulation time | 517246184 ps |
| CPU time | 1.51 seconds |
| Started | Aug 29 04:11:40 AM UTC 24 |
| Finished | Aug 29 04:11:42 AM UTC 24 |
| Peak memory | 214300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1661769161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 293.usbdev_ tx_rx_disruption.1661769161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/293.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/294.usbdev_tx_rx_disruption.3728143962 |
| Short name | T3598 |
| Test name | |
| Test status | |
| Simulation time | 620569995 ps |
| CPU time | 1.58 seconds |
| Started | Aug 29 04:11:40 AM UTC 24 |
| Finished | Aug 29 04:11:43 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3728143962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 294.usbdev_ tx_rx_disruption.3728143962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/294.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/295.usbdev_tx_rx_disruption.3620225701 |
| Short name | T3555 |
| Test name | |
| Test status | |
| Simulation time | 544297210 ps |
| CPU time | 1.69 seconds |
| Started | Aug 29 04:11:40 AM UTC 24 |
| Finished | Aug 29 04:11:43 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3620225701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 295.usbdev_ tx_rx_disruption.3620225701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/295.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/296.usbdev_tx_rx_disruption.3289997402 |
| Short name | T3544 |
| Test name | |
| Test status | |
| Simulation time | 453712951 ps |
| CPU time | 1.46 seconds |
| Started | Aug 29 04:11:40 AM UTC 24 |
| Finished | Aug 29 04:11:43 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3289997402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 296.usbdev_ tx_rx_disruption.3289997402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/296.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/297.usbdev_tx_rx_disruption.2904046713 |
| Short name | T3584 |
| Test name | |
| Test status | |
| Simulation time | 466839776 ps |
| CPU time | 1.3 seconds |
| Started | Aug 29 04:11:40 AM UTC 24 |
| Finished | Aug 29 04:11:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2904046713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 297.usbdev_ tx_rx_disruption.2904046713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/297.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/298.usbdev_tx_rx_disruption.3580830952 |
| Short name | T3606 |
| Test name | |
| Test status | |
| Simulation time | 563884232 ps |
| CPU time | 1.81 seconds |
| Started | Aug 29 04:11:40 AM UTC 24 |
| Finished | Aug 29 04:11:43 AM UTC 24 |
| Peak memory | 214780 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3580830952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 298.usbdev_ tx_rx_disruption.3580830952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/298.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/299.usbdev_tx_rx_disruption.875991370 |
| Short name | T3604 |
| Test name | |
| Test status | |
| Simulation time | 462036908 ps |
| CPU time | 1.7 seconds |
| Started | Aug 29 04:11:40 AM UTC 24 |
| Finished | Aug 29 04:11:43 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=875991370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 299.usbdev_t x_rx_disruption.875991370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/299.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_alert_test.1141780551 |
| Short name | T215 |
| Test name | |
| Test status | |
| Simulation time | 40239727 ps |
| CPU time | 1.03 seconds |
| Started | Aug 29 03:31:49 AM UTC 24 |
| Finished | Aug 29 03:31:51 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1141780551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 3.usbdev_alert_test.1141780551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_disconnect.1760049634 |
| Short name | T15 |
| Test name | |
| Test status | |
| Simulation time | 5386481295 ps |
| CPU time | 17.6 seconds |
| Started | Aug 29 03:30:48 AM UTC 24 |
| Finished | Aug 29 03:31:07 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1760049634 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_disconnect.1760049634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_reset.3212942428 |
| Short name | T102 |
| Test name | |
| Test status | |
| Simulation time | 19399534658 ps |
| CPU time | 32.87 seconds |
| Started | Aug 29 03:30:48 AM UTC 24 |
| Finished | Aug 29 03:31:22 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3212942428 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_reset.3212942428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_resume.332469108 |
| Short name | T731 |
| Test name | |
| Test status | |
| Simulation time | 30301227714 ps |
| CPU time | 51.55 seconds |
| Started | Aug 29 03:30:49 AM UTC 24 |
| Finished | Aug 29 03:31:42 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=332469108 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_resume.332469108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_av_buffer.854807702 |
| Short name | T691 |
| Test name | |
| Test status | |
| Simulation time | 151790291 ps |
| CPU time | 1.49 seconds |
| Started | Aug 29 03:30:50 AM UTC 24 |
| Finished | Aug 29 03:30:53 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=854807702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_av_buffer.854807702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_av_empty.2588424985 |
| Short name | T48 |
| Test name | |
| Test status | |
| Simulation time | 177122590 ps |
| CPU time | 1.49 seconds |
| Started | Aug 29 03:30:51 AM UTC 24 |
| Finished | Aug 29 03:30:53 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2588424985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_av_empty.2588424985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_av_overflow.1690512745 |
| Short name | T89 |
| Test name | |
| Test status | |
| Simulation time | 140311102 ps |
| CPU time | 1.3 seconds |
| Started | Aug 29 03:30:51 AM UTC 24 |
| Finished | Aug 29 03:30:53 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1690512745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_av_overflow.1690512745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_bitstuff_err.3086921038 |
| Short name | T692 |
| Test name | |
| Test status | |
| Simulation time | 146520829 ps |
| CPU time | 1.45 seconds |
| Started | Aug 29 03:30:51 AM UTC 24 |
| Finished | Aug 29 03:30:53 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3086921038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_bitstuff_err.3086921038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_data_toggle_clear.2495478291 |
| Short name | T696 |
| Test name | |
| Test status | |
| Simulation time | 291697582 ps |
| CPU time | 1.98 seconds |
| Started | Aug 29 03:30:54 AM UTC 24 |
| Finished | Aug 29 03:30:57 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2495478291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 3.usbdev_data_toggle_clear.2495478291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_data_toggle_restore.317248468 |
| Short name | T633 |
| Test name | |
| Test status | |
| Simulation time | 796394210 ps |
| CPU time | 4.36 seconds |
| Started | Aug 29 03:30:54 AM UTC 24 |
| Finished | Aug 29 03:30:59 AM UTC 24 |
| Peak memory | 217252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=317248468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_data_toggle_restore.317248468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_device_timeout.3284424671 |
| Short name | T702 |
| Test name | |
| Test status | |
| Simulation time | 422509375 ps |
| CPU time | 11.16 seconds |
| Started | Aug 29 03:30:54 AM UTC 24 |
| Finished | Aug 29 03:31:06 AM UTC 24 |
| Peak memory | 217072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3284424671 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_device_timeout.3284424671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_disable_endpoint.3897657289 |
| Short name | T698 |
| Test name | |
| Test status | |
| Simulation time | 730316528 ps |
| CPU time | 3.17 seconds |
| Started | Aug 29 03:30:54 AM UTC 24 |
| Finished | Aug 29 03:30:58 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3897657289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 3.usbdev_disable_endpoint.3897657289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_disconnected.1418661581 |
| Short name | T695 |
| Test name | |
| Test status | |
| Simulation time | 152602688 ps |
| CPU time | 1.35 seconds |
| Started | Aug 29 03:30:54 AM UTC 24 |
| Finished | Aug 29 03:30:56 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1418661581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_disconnected.1418661581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_enable.3579098093 |
| Short name | T697 |
| Test name | |
| Test status | |
| Simulation time | 64561644 ps |
| CPU time | 1.14 seconds |
| Started | Aug 29 03:30:55 AM UTC 24 |
| Finished | Aug 29 03:30:58 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3579098093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 3.usbdev_enable.3579098093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_endpoint_access.4137124881 |
| Short name | T699 |
| Test name | |
| Test status | |
| Simulation time | 958523811 ps |
| CPU time | 4.9 seconds |
| Started | Aug 29 03:30:55 AM UTC 24 |
| Finished | Aug 29 03:31:01 AM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4137124881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_endpoint_access.4137124881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_endpoint_types.1428261644 |
| Short name | T536 |
| Test name | |
| Test status | |
| Simulation time | 382150944 ps |
| CPU time | 2.42 seconds |
| Started | Aug 29 03:30:57 AM UTC 24 |
| Finished | Aug 29 03:31:00 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1428261644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_endpoint_types.1428261644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_fifo_levels.332755562 |
| Short name | T627 |
| Test name | |
| Test status | |
| Simulation time | 281269994 ps |
| CPU time | 1.74 seconds |
| Started | Aug 29 03:30:58 AM UTC 24 |
| Finished | Aug 29 03:31:00 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=332755562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_fifo_levels.332755562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_fifo_rst.2361769058 |
| Short name | T396 |
| Test name | |
| Test status | |
| Simulation time | 490083107 ps |
| CPU time | 4.56 seconds |
| Started | Aug 29 03:30:58 AM UTC 24 |
| Finished | Aug 29 03:31:03 AM UTC 24 |
| Peak memory | 217256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2361769058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_fifo_rst.2361769058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_freq_hiclk.1972857198 |
| Short name | T887 |
| Test name | |
| Test status | |
| Simulation time | 93180892497 ps |
| CPU time | 195.25 seconds |
| Started | Aug 29 03:30:59 AM UTC 24 |
| Finished | Aug 29 03:34:17 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1972857198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_hiclk.1972857198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_freq_hiclk_max.1661482890 |
| Short name | T919 |
| Test name | |
| Test status | |
| Simulation time | 116317997031 ps |
| CPU time | 223.64 seconds |
| Started | Aug 29 03:30:59 AM UTC 24 |
| Finished | Aug 29 03:34:46 AM UTC 24 |
| Peak memory | 217416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=1661482890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 3.usbdev_freq_hiclk_max.1661482890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_freq_loclk.2059917302 |
| Short name | T646 |
| Test name | |
| Test status | |
| Simulation time | 107102756594 ps |
| CPU time | 217.78 seconds |
| Started | Aug 29 03:31:00 AM UTC 24 |
| Finished | Aug 29 03:34:41 AM UTC 24 |
| Peak memory | 217348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2059917302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_loclk.2059917302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_freq_loclk_max.2841819654 |
| Short name | T897 |
| Test name | |
| Test status | |
| Simulation time | 117063794397 ps |
| CPU time | 203.67 seconds |
| Started | Aug 29 03:31:01 AM UTC 24 |
| Finished | Aug 29 03:34:28 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=2841819654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 3.usbdev_freq_loclk_max.2841819654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_freq_phase.1556810719 |
| Short name | T901 |
| Test name | |
| Test status | |
| Simulation time | 82169553825 ps |
| CPU time | 208.69 seconds |
| Started | Aug 29 03:31:01 AM UTC 24 |
| Finished | Aug 29 03:34:33 AM UTC 24 |
| Peak memory | 217340 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1556810719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 3.usbdev_freq_phase.1556810719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_in_iso.3045239232 |
| Short name | T701 |
| Test name | |
| Test status | |
| Simulation time | 232848077 ps |
| CPU time | 2.09 seconds |
| Started | Aug 29 03:31:03 AM UTC 24 |
| Finished | Aug 29 03:31:06 AM UTC 24 |
| Peak memory | 227548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3045239232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_in_iso.3045239232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_in_stall.2752844636 |
| Short name | T700 |
| Test name | |
| Test status | |
| Simulation time | 146770240 ps |
| CPU time | 1.26 seconds |
| Started | Aug 29 03:31:03 AM UTC 24 |
| Finished | Aug 29 03:31:05 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2752844636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_in_stall.2752844636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_in_trans.354234603 |
| Short name | T703 |
| Test name | |
| Test status | |
| Simulation time | 218009860 ps |
| CPU time | 1.69 seconds |
| Started | Aug 29 03:31:04 AM UTC 24 |
| Finished | Aug 29 03:31:06 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=354234603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_in_trans.354234603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_invalid_sync.56377418 |
| Short name | T808 |
| Test name | |
| Test status | |
| Simulation time | 4053591580 ps |
| CPU time | 125.79 seconds |
| Started | Aug 29 03:31:01 AM UTC 24 |
| Finished | Aug 29 03:33:09 AM UTC 24 |
| Peak memory | 234116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=56377418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traf fic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 3.usbdev_invalid_sync.56377418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_iso_retraction.2795151024 |
| Short name | T765 |
| Test name | |
| Test status | |
| Simulation time | 9119124825 ps |
| CPU time | 75.27 seconds |
| Started | Aug 29 03:31:06 AM UTC 24 |
| Finished | Aug 29 03:32:23 AM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2795151024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_iso_retraction.2795151024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_link_in_err.2226781502 |
| Short name | T705 |
| Test name | |
| Test status | |
| Simulation time | 254182552 ps |
| CPU time | 1.75 seconds |
| Started | Aug 29 03:31:07 AM UTC 24 |
| Finished | Aug 29 03:31:10 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2226781502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_link_in_err.2226781502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_link_resume.4103785526 |
| Short name | T717 |
| Test name | |
| Test status | |
| Simulation time | 13430708769 ps |
| CPU time | 22.52 seconds |
| Started | Aug 29 03:31:07 AM UTC 24 |
| Finished | Aug 29 03:31:31 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4103785526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_link_resume.4103785526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_link_suspend.495143418 |
| Short name | T709 |
| Test name | |
| Test status | |
| Simulation time | 4135707539 ps |
| CPU time | 10.25 seconds |
| Started | Aug 29 03:31:07 AM UTC 24 |
| Finished | Aug 29 03:31:19 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=495143418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_link_suspend.495143418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_low_speed_traffic.1011760755 |
| Short name | T434 |
| Test name | |
| Test status | |
| Simulation time | 2359681959 ps |
| CPU time | 25.5 seconds |
| Started | Aug 29 03:31:08 AM UTC 24 |
| Finished | Aug 29 03:31:35 AM UTC 24 |
| Peak memory | 234172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1011760755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_low_speed_traffic.1011760755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_max_inter_pkt_delay.4254832369 |
| Short name | T722 |
| Test name | |
| Test status | |
| Simulation time | 2482842117 ps |
| CPU time | 24.42 seconds |
| Started | Aug 29 03:31:09 AM UTC 24 |
| Finished | Aug 29 03:31:36 AM UTC 24 |
| Peak memory | 229588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4254832369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_inter_pkt_delay.4254832369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_max_length_in_transaction.2895875525 |
| Short name | T706 |
| Test name | |
| Test status | |
| Simulation time | 262204232 ps |
| CPU time | 1.29 seconds |
| Started | Aug 29 03:31:11 AM UTC 24 |
| Finished | Aug 29 03:31:13 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2895875525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_max_length_in_transaction.2895875525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_max_length_out_transaction.4166134985 |
| Short name | T707 |
| Test name | |
| Test status | |
| Simulation time | 191906901 ps |
| CPU time | 1.6 seconds |
| Started | Aug 29 03:31:11 AM UTC 24 |
| Finished | Aug 29 03:31:13 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4166134985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 3.usbdev_max_length_out_transaction.4166134985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_max_non_iso_usb_traffic.1126357518 |
| Short name | T749 |
| Test name | |
| Test status | |
| Simulation time | 1652670721 ps |
| CPU time | 53.26 seconds |
| Started | Aug 29 03:31:12 AM UTC 24 |
| Finished | Aug 29 03:32:07 AM UTC 24 |
| Peak memory | 227400 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1126357518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_non_iso_usb_traffic.1126357518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_max_usb_traffic.2291327274 |
| Short name | T741 |
| Test name | |
| Test status | |
| Simulation time | 3443409520 ps |
| CPU time | 44.79 seconds |
| Started | Aug 29 03:31:14 AM UTC 24 |
| Finished | Aug 29 03:32:00 AM UTC 24 |
| Peak memory | 234336 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2291327274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_usb_traffic.2291327274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_min_inter_pkt_delay.4229004965 |
| Short name | T724 |
| Test name | |
| Test status | |
| Simulation time | 2810594118 ps |
| CPU time | 22.31 seconds |
| Started | Aug 29 03:31:14 AM UTC 24 |
| Finished | Aug 29 03:31:38 AM UTC 24 |
| Peak memory | 229608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4229004965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_min_inter_pkt_delay.4229004965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_min_length_in_transaction.379780145 |
| Short name | T710 |
| Test name | |
| Test status | |
| Simulation time | 154652131 ps |
| CPU time | 1.51 seconds |
| Started | Aug 29 03:31:18 AM UTC 24 |
| Finished | Aug 29 03:31:21 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=379780145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 3.usbdev_min_length_in_transaction.379780145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_min_length_out_transaction.2532747435 |
| Short name | T711 |
| Test name | |
| Test status | |
| Simulation time | 144712963 ps |
| CPU time | 1.36 seconds |
| Started | Aug 29 03:31:19 AM UTC 24 |
| Finished | Aug 29 03:31:22 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2532747435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 3.usbdev_min_length_out_transaction.2532747435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_nak_trans.2620072468 |
| Short name | T154 |
| Test name | |
| Test status | |
| Simulation time | 211059060 ps |
| CPU time | 1.64 seconds |
| Started | Aug 29 03:31:21 AM UTC 24 |
| Finished | Aug 29 03:31:24 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2620072468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_nak_trans.2620072468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_out_iso.1227240412 |
| Short name | T713 |
| Test name | |
| Test status | |
| Simulation time | 177348453 ps |
| CPU time | 1.49 seconds |
| Started | Aug 29 03:31:23 AM UTC 24 |
| Finished | Aug 29 03:31:25 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1227240412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_out_iso.1227240412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_out_stall.715904190 |
| Short name | T712 |
| Test name | |
| Test status | |
| Simulation time | 189846329 ps |
| CPU time | 1.48 seconds |
| Started | Aug 29 03:31:23 AM UTC 24 |
| Finished | Aug 29 03:31:25 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=715904190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_out_stall.715904190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_out_trans_nak.3383668016 |
| Short name | T620 |
| Test name | |
| Test status | |
| Simulation time | 186076867 ps |
| CPU time | 1.5 seconds |
| Started | Aug 29 03:31:23 AM UTC 24 |
| Finished | Aug 29 03:31:26 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3383668016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 3.usbdev_out_trans_nak.3383668016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_pending_in_trans.1153224392 |
| Short name | T191 |
| Test name | |
| Test status | |
| Simulation time | 214545634 ps |
| CPU time | 1.55 seconds |
| Started | Aug 29 03:31:25 AM UTC 24 |
| Finished | Aug 29 03:31:28 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1153224392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 3.usbdev_pending_in_trans.1153224392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_pinflip.1647931085 |
| Short name | T715 |
| Test name | |
| Test status | |
| Simulation time | 210431414 ps |
| CPU time | 1.69 seconds |
| Started | Aug 29 03:31:26 AM UTC 24 |
| Finished | Aug 29 03:31:29 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1647931085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_config_pinflip.1647931085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_rand_bus_type.2751817328 |
| Short name | T716 |
| Test name | |
| Test status | |
| Simulation time | 241372936 ps |
| CPU time | 1.8 seconds |
| Started | Aug 29 03:31:26 AM UTC 24 |
| Finished | Aug 29 03:31:29 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2751817328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 3.usbdev_phy_config_rand_bus_type.2751817328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_usb_ref_disable.2369833124 |
| Short name | T714 |
| Test name | |
| Test status | |
| Simulation time | 156135827 ps |
| CPU time | 1.43 seconds |
| Started | Aug 29 03:31:26 AM UTC 24 |
| Finished | Aug 29 03:31:29 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2369833124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 3.usbdev_phy_config_usb_ref_disable.2369833124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_phy_pins_sense.2095329719 |
| Short name | T37 |
| Test name | |
| Test status | |
| Simulation time | 48050031 ps |
| CPU time | 1.1 seconds |
| Started | Aug 29 03:31:29 AM UTC 24 |
| Finished | Aug 29 03:31:32 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2095329719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_pins_sense.2095329719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_buffer.3142830765 |
| Short name | T321 |
| Test name | |
| Test status | |
| Simulation time | 14388776130 ps |
| CPU time | 54.7 seconds |
| Started | Aug 29 03:31:29 AM UTC 24 |
| Finished | Aug 29 03:32:26 AM UTC 24 |
| Peak memory | 227692 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3142830765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_pkt_buffer.3142830765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_received.3120146631 |
| Short name | T719 |
| Test name | |
| Test status | |
| Simulation time | 190423490 ps |
| CPU time | 1.58 seconds |
| Started | Aug 29 03:31:29 AM UTC 24 |
| Finished | Aug 29 03:31:32 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3120146631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_pkt_received.3120146631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_sent.477693002 |
| Short name | T718 |
| Test name | |
| Test status | |
| Simulation time | 265821273 ps |
| CPU time | 1.25 seconds |
| Started | Aug 29 03:31:29 AM UTC 24 |
| Finished | Aug 29 03:31:32 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=477693002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_pkt_sent.477693002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_rand_bus_disconnects.2360222592 |
| Short name | T746 |
| Test name | |
| Test status | |
| Simulation time | 3846438730 ps |
| CPU time | 30.53 seconds |
| Started | Aug 29 03:31:33 AM UTC 24 |
| Finished | Aug 29 03:32:05 AM UTC 24 |
| Peak memory | 234240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2360222592 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_bus_disconnects.2360222592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_rand_bus_resets.1520703808 |
| Short name | T752 |
| Test name | |
| Test status | |
| Simulation time | 4014996376 ps |
| CPU time | 33.49 seconds |
| Started | Aug 29 03:31:34 AM UTC 24 |
| Finished | Aug 29 03:32:09 AM UTC 24 |
| Peak memory | 229572 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1520703808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_bus_resets.1520703808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_rand_suspends.1529090440 |
| Short name | T759 |
| Test name | |
| Test status | |
| Simulation time | 5467297381 ps |
| CPU time | 37.19 seconds |
| Started | Aug 29 03:31:36 AM UTC 24 |
| Finished | Aug 29 03:32:15 AM UTC 24 |
| Peak memory | 234240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1529090440 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_suspends.1529090440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_random_length_in_transaction.2691549029 |
| Short name | T720 |
| Test name | |
| Test status | |
| Simulation time | 248618449 ps |
| CPU time | 1.82 seconds |
| Started | Aug 29 03:31:31 AM UTC 24 |
| Finished | Aug 29 03:31:35 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2691549029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 3.usbdev_random_length_in_transaction.2691549029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_random_length_out_transaction.375526654 |
| Short name | T721 |
| Test name | |
| Test status | |
| Simulation time | 190771165 ps |
| CPU time | 1.5 seconds |
| Started | Aug 29 03:31:33 AM UTC 24 |
| Finished | Aug 29 03:31:35 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=375526654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 3.usbdev_random_length_out_transaction.375526654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_resume_link_active.2901567059 |
| Short name | T753 |
| Test name | |
| Test status | |
| Simulation time | 20181733791 ps |
| CPU time | 32.56 seconds |
| Started | Aug 29 03:31:36 AM UTC 24 |
| Finished | Aug 29 03:32:10 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2901567059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 3.usbdev_resume_link_active.2901567059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_rx_crc_err.4120952251 |
| Short name | T726 |
| Test name | |
| Test status | |
| Simulation time | 209096759 ps |
| CPU time | 1.69 seconds |
| Started | Aug 29 03:31:36 AM UTC 24 |
| Finished | Aug 29 03:31:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4120952251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_rx_crc_err.4120952251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_rx_full.4227479422 |
| Short name | T727 |
| Test name | |
| Test status | |
| Simulation time | 377811166 ps |
| CPU time | 2.63 seconds |
| Started | Aug 29 03:31:36 AM UTC 24 |
| Finished | Aug 29 03:31:40 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4227479422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_rx_full.4227479422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_rx_pid_err.594093619 |
| Short name | T728 |
| Test name | |
| Test status | |
| Simulation time | 168772158 ps |
| CPU time | 1.37 seconds |
| Started | Aug 29 03:31:38 AM UTC 24 |
| Finished | Aug 29 03:31:40 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=594093619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_rx_pid_err.594093619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_sec_cm.2951435558 |
| Short name | T236 |
| Test name | |
| Test status | |
| Simulation time | 276798499 ps |
| CPU time | 1.86 seconds |
| Started | Aug 29 03:31:48 AM UTC 24 |
| Finished | Aug 29 03:31:50 AM UTC 24 |
| Peak memory | 249172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2951435558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_sec_cm.2951435558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_setup_priority.3978153676 |
| Short name | T732 |
| Test name | |
| Test status | |
| Simulation time | 437163588 ps |
| CPU time | 2.47 seconds |
| Started | Aug 29 03:31:39 AM UTC 24 |
| Finished | Aug 29 03:31:43 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3978153676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_priority.3978153676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_setup_priority_over_stall_response.51210934 |
| Short name | T197 |
| Test name | |
| Test status | |
| Simulation time | 214168433 ps |
| CPU time | 1.59 seconds |
| Started | Aug 29 03:31:40 AM UTC 24 |
| Finished | Aug 29 03:31:42 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=51210934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_stal l_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_priority_over_stall_response.51210934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_setup_stage.760648448 |
| Short name | T729 |
| Test name | |
| Test status | |
| Simulation time | 154656266 ps |
| CPU time | 1.28 seconds |
| Started | Aug 29 03:31:40 AM UTC 24 |
| Finished | Aug 29 03:31:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=760648448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_setup_stage.760648448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_setup_trans_ignored.4200654582 |
| Short name | T730 |
| Test name | |
| Test status | |
| Simulation time | 168049068 ps |
| CPU time | 1.54 seconds |
| Started | Aug 29 03:31:40 AM UTC 24 |
| Finished | Aug 29 03:31:42 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4200654582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 3.usbdev_setup_trans_ignored.4200654582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_smoke.2226875592 |
| Short name | T733 |
| Test name | |
| Test status | |
| Simulation time | 228080126 ps |
| CPU time | 1.8 seconds |
| Started | Aug 29 03:31:41 AM UTC 24 |
| Finished | Aug 29 03:31:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2226875592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_smoke.2226875592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_spurious_pids_ignored.914096269 |
| Short name | T819 |
| Test name | |
| Test status | |
| Simulation time | 3528495259 ps |
| CPU time | 98.8 seconds |
| Started | Aug 29 03:31:41 AM UTC 24 |
| Finished | Aug 29 03:33:22 AM UTC 24 |
| Peak memory | 227612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=914096269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_spurious_pids_ignored.914096269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_stall_priority_over_nak.1193851720 |
| Short name | T734 |
| Test name | |
| Test status | |
| Simulation time | 196991071 ps |
| CPU time | 1.14 seconds |
| Started | Aug 29 03:31:43 AM UTC 24 |
| Finished | Aug 29 03:31:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1193851720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stall_priority_over_nak.1193851720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_stall_trans.2390261692 |
| Short name | T735 |
| Test name | |
| Test status | |
| Simulation time | 156576231 ps |
| CPU time | 1.39 seconds |
| Started | Aug 29 03:31:43 AM UTC 24 |
| Finished | Aug 29 03:31:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2390261692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_stall_trans.2390261692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_stream_len_max.2385601235 |
| Short name | T736 |
| Test name | |
| Test status | |
| Simulation time | 730460988 ps |
| CPU time | 3.61 seconds |
| Started | Aug 29 03:31:43 AM UTC 24 |
| Finished | Aug 29 03:31:48 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2385601235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stream_len_max.2385601235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_streaming_out.220212966 |
| Short name | T795 |
| Test name | |
| Test status | |
| Simulation time | 2349032144 ps |
| CPU time | 68.17 seconds |
| Started | Aug 29 03:31:43 AM UTC 24 |
| Finished | Aug 29 03:32:53 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=220212966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_streaming_out.220212966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_stress_usb_traffic.3731619533 |
| Short name | T180 |
| Test name | |
| Test status | |
| Simulation time | 12208950131 ps |
| CPU time | 286.46 seconds |
| Started | Aug 29 03:31:44 AM UTC 24 |
| Finished | Aug 29 03:36:35 AM UTC 24 |
| Peak memory | 229588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3731619533 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stress_usb_traffic.3731619533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_timeout_missing_host_handshake.3500036734 |
| Short name | T725 |
| Test name | |
| Test status | |
| Simulation time | 3359351215 ps |
| CPU time | 42.82 seconds |
| Started | Aug 29 03:30:54 AM UTC 24 |
| Finished | Aug 29 03:31:38 AM UTC 24 |
| Peak memory | 217212 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3500036734 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_timeout_missing_host_handshake.3500036734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/3.usbdev_tx_rx_disruption.3554105485 |
| Short name | T186 |
| Test name | |
| Test status | |
| Simulation time | 424120791 ps |
| CPU time | 2.47 seconds |
| Started | Aug 29 03:31:46 AM UTC 24 |
| Finished | Aug 29 03:31:50 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3554105485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_tx _rx_disruption.3554105485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/3.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_alert_test.2062664563 |
| Short name | T2193 |
| Test name | |
| Test status | |
| Simulation time | 34065524 ps |
| CPU time | 0.63 seconds |
| Started | Aug 29 03:46:11 AM UTC 24 |
| Finished | Aug 29 03:46:13 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2062664563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 30.usbdev_alert_test.2062664563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_disconnect.3762824332 |
| Short name | T2181 |
| Test name | |
| Test status | |
| Simulation time | 11334220823 ps |
| CPU time | 13.12 seconds |
| Started | Aug 29 03:45:41 AM UTC 24 |
| Finished | Aug 29 03:45:55 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3762824332 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_disconnect.3762824332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_reset.3346041049 |
| Short name | T2182 |
| Test name | |
| Test status | |
| Simulation time | 15116393278 ps |
| CPU time | 17.96 seconds |
| Started | Aug 29 03:45:41 AM UTC 24 |
| Finished | Aug 29 03:46:00 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3346041049 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_reset.3346041049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_resume.3916321296 |
| Short name | T2218 |
| Test name | |
| Test status | |
| Simulation time | 25525800721 ps |
| CPU time | 34.12 seconds |
| Started | Aug 29 03:45:41 AM UTC 24 |
| Finished | Aug 29 03:46:16 AM UTC 24 |
| Peak memory | 227476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3916321296 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_resume.3916321296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_av_buffer.734440374 |
| Short name | T2151 |
| Test name | |
| Test status | |
| Simulation time | 204661476 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 03:45:41 AM UTC 24 |
| Finished | Aug 29 03:45:43 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=734440374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_av_buffer.734440374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_bitstuff_err.1507247358 |
| Short name | T2152 |
| Test name | |
| Test status | |
| Simulation time | 173136476 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 03:45:41 AM UTC 24 |
| Finished | Aug 29 03:45:43 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1507247358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_bitstuff_err.1507247358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_data_toggle_clear.3443940845 |
| Short name | T2168 |
| Test name | |
| Test status | |
| Simulation time | 680576051 ps |
| CPU time | 1.97 seconds |
| Started | Aug 29 03:45:41 AM UTC 24 |
| Finished | Aug 29 03:45:44 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3443940845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 30.usbdev_data_toggle_clear.3443940845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_data_toggle_restore.2554170931 |
| Short name | T2173 |
| Test name | |
| Test status | |
| Simulation time | 734588938 ps |
| CPU time | 2.24 seconds |
| Started | Aug 29 03:45:41 AM UTC 24 |
| Finished | Aug 29 03:45:44 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2554170931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_data_toggle_restore.2554170931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_device_address.669369640 |
| Short name | T2219 |
| Test name | |
| Test status | |
| Simulation time | 21062791179 ps |
| CPU time | 37.23 seconds |
| Started | Aug 29 03:45:41 AM UTC 24 |
| Finished | Aug 29 03:46:20 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=669369640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 30.usbdev_device_address.669369640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_device_timeout.188612874 |
| Short name | T2176 |
| Test name | |
| Test status | |
| Simulation time | 764639855 ps |
| CPU time | 4.69 seconds |
| Started | Aug 29 03:45:41 AM UTC 24 |
| Finished | Aug 29 03:45:47 AM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=188612874 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_device_timeout.188612874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_disable_endpoint.2264969347 |
| Short name | T2166 |
| Test name | |
| Test status | |
| Simulation time | 800520890 ps |
| CPU time | 1.74 seconds |
| Started | Aug 29 03:45:41 AM UTC 24 |
| Finished | Aug 29 03:45:44 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2264969347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 30.usbdev_disable_endpoint.2264969347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_disconnected.1392179509 |
| Short name | T2153 |
| Test name | |
| Test status | |
| Simulation time | 140699661 ps |
| CPU time | 0.75 seconds |
| Started | Aug 29 03:45:41 AM UTC 24 |
| Finished | Aug 29 03:45:43 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1392179509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_disconnected.1392179509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_enable.2730029438 |
| Short name | T2154 |
| Test name | |
| Test status | |
| Simulation time | 35863513 ps |
| CPU time | 0.71 seconds |
| Started | Aug 29 03:45:41 AM UTC 24 |
| Finished | Aug 29 03:45:43 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2730029438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 30.usbdev_enable.2730029438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_endpoint_access.822179384 |
| Short name | T2174 |
| Test name | |
| Test status | |
| Simulation time | 772762140 ps |
| CPU time | 2.13 seconds |
| Started | Aug 29 03:45:41 AM UTC 24 |
| Finished | Aug 29 03:45:44 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=822179384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_endpoint_access.822179384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_endpoint_types.1194120619 |
| Short name | T464 |
| Test name | |
| Test status | |
| Simulation time | 518899563 ps |
| CPU time | 1.65 seconds |
| Started | Aug 29 03:45:41 AM UTC 24 |
| Finished | Aug 29 03:45:44 AM UTC 24 |
| Peak memory | 214844 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1194120619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_endpoint_types.1194120619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_fifo_levels.2018811444 |
| Short name | T340 |
| Test name | |
| Test status | |
| Simulation time | 256686056 ps |
| CPU time | 1.07 seconds |
| Started | Aug 29 03:45:41 AM UTC 24 |
| Finished | Aug 29 03:45:43 AM UTC 24 |
| Peak memory | 214956 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2018811444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_fifo_levels.2018811444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_fifo_rst.3493937989 |
| Short name | T2175 |
| Test name | |
| Test status | |
| Simulation time | 315729728 ps |
| CPU time | 2.92 seconds |
| Started | Aug 29 03:45:41 AM UTC 24 |
| Finished | Aug 29 03:45:45 AM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3493937989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_fifo_rst.3493937989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_in_iso.3715009304 |
| Short name | T2156 |
| Test name | |
| Test status | |
| Simulation time | 180699560 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 03:45:41 AM UTC 24 |
| Finished | Aug 29 03:45:43 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3715009304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 30.usbdev_in_iso.3715009304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_in_stall.2876816401 |
| Short name | T2160 |
| Test name | |
| Test status | |
| Simulation time | 174314557 ps |
| CPU time | 1.15 seconds |
| Started | Aug 29 03:45:41 AM UTC 24 |
| Finished | Aug 29 03:45:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2876816401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_in_stall.2876816401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_in_trans.3533819881 |
| Short name | T2157 |
| Test name | |
| Test status | |
| Simulation time | 236249729 ps |
| CPU time | 0.99 seconds |
| Started | Aug 29 03:45:41 AM UTC 24 |
| Finished | Aug 29 03:45:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3533819881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_in_trans.3533819881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_invalid_sync.1380043008 |
| Short name | T2184 |
| Test name | |
| Test status | |
| Simulation time | 2847903313 ps |
| CPU time | 18.11 seconds |
| Started | Aug 29 03:45:41 AM UTC 24 |
| Finished | Aug 29 03:46:01 AM UTC 24 |
| Peak memory | 233836 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1380043008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 30.usbdev_invalid_sync.1380043008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_iso_retraction.4233432606 |
| Short name | T2234 |
| Test name | |
| Test status | |
| Simulation time | 10412686375 ps |
| CPU time | 58.75 seconds |
| Started | Aug 29 03:45:41 AM UTC 24 |
| Finished | Aug 29 03:46:42 AM UTC 24 |
| Peak memory | 217272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4233432606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_iso_retraction.4233432606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_link_in_err.2654608718 |
| Short name | T2164 |
| Test name | |
| Test status | |
| Simulation time | 258521117 ps |
| CPU time | 1.27 seconds |
| Started | Aug 29 03:45:41 AM UTC 24 |
| Finished | Aug 29 03:45:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2654608718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_link_in_err.2654608718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_link_resume.2192049252 |
| Short name | T2222 |
| Test name | |
| Test status | |
| Simulation time | 29862326621 ps |
| CPU time | 39.97 seconds |
| Started | Aug 29 03:45:41 AM UTC 24 |
| Finished | Aug 29 03:46:23 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2192049252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_link_resume.2192049252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_link_suspend.3733580270 |
| Short name | T2178 |
| Test name | |
| Test status | |
| Simulation time | 5527745974 ps |
| CPU time | 8.05 seconds |
| Started | Aug 29 03:45:41 AM UTC 24 |
| Finished | Aug 29 03:45:51 AM UTC 24 |
| Peak memory | 227460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3733580270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_link_suspend.3733580270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_low_speed_traffic.4231225082 |
| Short name | T2223 |
| Test name | |
| Test status | |
| Simulation time | 5114050478 ps |
| CPU time | 44.11 seconds |
| Started | Aug 29 03:45:41 AM UTC 24 |
| Finished | Aug 29 03:46:27 AM UTC 24 |
| Peak memory | 227548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4231225082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_low_speed_traffic.4231225082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_max_inter_pkt_delay.4210853679 |
| Short name | T2185 |
| Test name | |
| Test status | |
| Simulation time | 2242161167 ps |
| CPU time | 18.51 seconds |
| Started | Aug 29 03:45:41 AM UTC 24 |
| Finished | Aug 29 03:46:01 AM UTC 24 |
| Peak memory | 229644 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4210853679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_max_inter_pkt_delay.4210853679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_max_length_in_transaction.1455460243 |
| Short name | T2161 |
| Test name | |
| Test status | |
| Simulation time | 241487333 ps |
| CPU time | 1.03 seconds |
| Started | Aug 29 03:45:41 AM UTC 24 |
| Finished | Aug 29 03:45:44 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1455460243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 30.usbdev_max_length_in_transaction.1455460243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_max_length_out_transaction.565138454 |
| Short name | T2172 |
| Test name | |
| Test status | |
| Simulation time | 192438832 ps |
| CPU time | 1.28 seconds |
| Started | Aug 29 03:45:41 AM UTC 24 |
| Finished | Aug 29 03:45:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=565138454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 30.usbdev_max_length_out_transaction.565138454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_min_inter_pkt_delay.2863913675 |
| Short name | T2225 |
| Test name | |
| Test status | |
| Simulation time | 1913483973 ps |
| CPU time | 45.65 seconds |
| Started | Aug 29 03:45:41 AM UTC 24 |
| Finished | Aug 29 03:46:29 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2863913675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_min_inter_pkt_delay.2863913675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_min_length_in_transaction.2628598042 |
| Short name | T2169 |
| Test name | |
| Test status | |
| Simulation time | 162394967 ps |
| CPU time | 1.21 seconds |
| Started | Aug 29 03:45:41 AM UTC 24 |
| Finished | Aug 29 03:45:44 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2628598042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 30.usbdev_min_length_in_transaction.2628598042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_min_length_out_transaction.1105000469 |
| Short name | T2167 |
| Test name | |
| Test status | |
| Simulation time | 170230036 ps |
| CPU time | 1.03 seconds |
| Started | Aug 29 03:45:42 AM UTC 24 |
| Finished | Aug 29 03:45:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1105000469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 30.usbdev_min_length_out_transaction.1105000469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_nak_trans.3893818485 |
| Short name | T132 |
| Test name | |
| Test status | |
| Simulation time | 208458529 ps |
| CPU time | 0.82 seconds |
| Started | Aug 29 03:45:42 AM UTC 24 |
| Finished | Aug 29 03:45:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3893818485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_nak_trans.3893818485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_out_iso.4004043062 |
| Short name | T2159 |
| Test name | |
| Test status | |
| Simulation time | 142474665 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 03:45:42 AM UTC 24 |
| Finished | Aug 29 03:45:44 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4004043062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_out_iso.4004043062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_out_stall.4034352140 |
| Short name | T2163 |
| Test name | |
| Test status | |
| Simulation time | 152770459 ps |
| CPU time | 1 seconds |
| Started | Aug 29 03:45:42 AM UTC 24 |
| Finished | Aug 29 03:45:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4034352140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_out_stall.4034352140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_out_trans_nak.548072829 |
| Short name | T2165 |
| Test name | |
| Test status | |
| Simulation time | 197893686 ps |
| CPU time | 1 seconds |
| Started | Aug 29 03:45:42 AM UTC 24 |
| Finished | Aug 29 03:45:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=548072829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_out_trans_nak.548072829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_pending_in_trans.1286810397 |
| Short name | T2162 |
| Test name | |
| Test status | |
| Simulation time | 159840993 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 03:45:42 AM UTC 24 |
| Finished | Aug 29 03:45:44 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1286810397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 30.usbdev_pending_in_trans.1286810397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_phy_config_pinflip.774915425 |
| Short name | T2171 |
| Test name | |
| Test status | |
| Simulation time | 213395900 ps |
| CPU time | 1.06 seconds |
| Started | Aug 29 03:45:42 AM UTC 24 |
| Finished | Aug 29 03:45:44 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=774915425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 30.usbdev_phy_config_pinflip.774915425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_phy_config_usb_ref_disable.1868233297 |
| Short name | T2170 |
| Test name | |
| Test status | |
| Simulation time | 151098707 ps |
| CPU time | 0.98 seconds |
| Started | Aug 29 03:45:42 AM UTC 24 |
| Finished | Aug 29 03:45:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1868233297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 30.usbdev_phy_config_usb_ref_disable.1868233297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_phy_pins_sense.1688676969 |
| Short name | T2158 |
| Test name | |
| Test status | |
| Simulation time | 52175847 ps |
| CPU time | 0.61 seconds |
| Started | Aug 29 03:45:42 AM UTC 24 |
| Finished | Aug 29 03:45:44 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1688676969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_phy_pins_sense.1688676969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_buffer.3523804476 |
| Short name | T2217 |
| Test name | |
| Test status | |
| Simulation time | 13735453816 ps |
| CPU time | 32.93 seconds |
| Started | Aug 29 03:45:42 AM UTC 24 |
| Finished | Aug 29 03:46:16 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3523804476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 30.usbdev_pkt_buffer.3523804476 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_received.2464448558 |
| Short name | T2188 |
| Test name | |
| Test status | |
| Simulation time | 162760257 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 03:46:11 AM UTC 24 |
| Finished | Aug 29 03:46:13 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2464448558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_pkt_received.2464448558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_sent.3089506650 |
| Short name | T2189 |
| Test name | |
| Test status | |
| Simulation time | 244886588 ps |
| CPU time | 0.9 seconds |
| Started | Aug 29 03:46:11 AM UTC 24 |
| Finished | Aug 29 03:46:13 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3089506650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_pkt_sent.3089506650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_random_length_in_transaction.3800681280 |
| Short name | T2190 |
| Test name | |
| Test status | |
| Simulation time | 160863467 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 03:46:11 AM UTC 24 |
| Finished | Aug 29 03:46:13 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3800681280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 30.usbdev_random_length_in_transaction.3800681280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_random_length_out_transaction.591946343 |
| Short name | T2194 |
| Test name | |
| Test status | |
| Simulation time | 189493670 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:46:11 AM UTC 24 |
| Finished | Aug 29 03:46:13 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=591946343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 30.usbdev_random_length_out_transaction.591946343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_rx_crc_err.3283517465 |
| Short name | T2191 |
| Test name | |
| Test status | |
| Simulation time | 143240122 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 03:46:11 AM UTC 24 |
| Finished | Aug 29 03:46:13 AM UTC 24 |
| Peak memory | 214640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3283517465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 30.usbdev_rx_crc_err.3283517465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_rx_full.3575470058 |
| Short name | T2204 |
| Test name | |
| Test status | |
| Simulation time | 445658250 ps |
| CPU time | 1.32 seconds |
| Started | Aug 29 03:46:11 AM UTC 24 |
| Finished | Aug 29 03:46:14 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3575470058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_rx_full.3575470058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_setup_stage.3177578531 |
| Short name | T2195 |
| Test name | |
| Test status | |
| Simulation time | 154158960 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 03:46:11 AM UTC 24 |
| Finished | Aug 29 03:46:13 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3177578531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_setup_stage.3177578531 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_setup_trans_ignored.4060819451 |
| Short name | T2197 |
| Test name | |
| Test status | |
| Simulation time | 167479169 ps |
| CPU time | 0.77 seconds |
| Started | Aug 29 03:46:11 AM UTC 24 |
| Finished | Aug 29 03:46:13 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4060819451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 30.usbdev_setup_trans_ignored.4060819451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_smoke.3655392966 |
| Short name | T2199 |
| Test name | |
| Test status | |
| Simulation time | 213621614 ps |
| CPU time | 0.99 seconds |
| Started | Aug 29 03:46:11 AM UTC 24 |
| Finished | Aug 29 03:46:14 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3655392966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_smoke.3655392966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_spurious_pids_ignored.607514061 |
| Short name | T2230 |
| Test name | |
| Test status | |
| Simulation time | 2626274194 ps |
| CPU time | 21.81 seconds |
| Started | Aug 29 03:46:11 AM UTC 24 |
| Finished | Aug 29 03:46:35 AM UTC 24 |
| Peak memory | 227556 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=607514061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 30.usbdev_spurious_pids_ignored.607514061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_stall_priority_over_nak.1606462125 |
| Short name | T2198 |
| Test name | |
| Test status | |
| Simulation time | 192912435 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:46:11 AM UTC 24 |
| Finished | Aug 29 03:46:13 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1606462125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_stall_priority_over_nak.1606462125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_stall_trans.1323977913 |
| Short name | T2196 |
| Test name | |
| Test status | |
| Simulation time | 175159606 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 03:46:11 AM UTC 24 |
| Finished | Aug 29 03:46:13 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1323977913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_stall_trans.1323977913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_stream_len_max.588752149 |
| Short name | T2214 |
| Test name | |
| Test status | |
| Simulation time | 1280584187 ps |
| CPU time | 2.79 seconds |
| Started | Aug 29 03:46:11 AM UTC 24 |
| Finished | Aug 29 03:46:15 AM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=588752149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 30.usbdev_stream_len_max.588752149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_streaming_out.1580700419 |
| Short name | T2229 |
| Test name | |
| Test status | |
| Simulation time | 3118625604 ps |
| CPU time | 21.38 seconds |
| Started | Aug 29 03:46:11 AM UTC 24 |
| Finished | Aug 29 03:46:34 AM UTC 24 |
| Peak memory | 227656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1580700419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_streaming_out.1580700419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_timeout_missing_host_handshake.3439483960 |
| Short name | T2183 |
| Test name | |
| Test status | |
| Simulation time | 2446961746 ps |
| CPU time | 18.5 seconds |
| Started | Aug 29 03:45:41 AM UTC 24 |
| Finished | Aug 29 03:46:01 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3439483960 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_timeout_missing_host_handshake.3439483960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/30.usbdev_tx_rx_disruption.975933822 |
| Short name | T2203 |
| Test name | |
| Test status | |
| Simulation time | 579772714 ps |
| CPU time | 1.55 seconds |
| Started | Aug 29 03:46:11 AM UTC 24 |
| Finished | Aug 29 03:46:14 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=975933822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_tx _rx_disruption.975933822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/30.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/300.usbdev_tx_rx_disruption.11988601 |
| Short name | T3592 |
| Test name | |
| Test status | |
| Simulation time | 576542595 ps |
| CPU time | 1.4 seconds |
| Started | Aug 29 04:11:40 AM UTC 24 |
| Finished | Aug 29 04:11:43 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=11988601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 300.usbdev_tx _rx_disruption.11988601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/300.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/301.usbdev_tx_rx_disruption.2278153306 |
| Short name | T3565 |
| Test name | |
| Test status | |
| Simulation time | 471974200 ps |
| CPU time | 1.54 seconds |
| Started | Aug 29 04:11:40 AM UTC 24 |
| Finished | Aug 29 04:11:43 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2278153306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 301.usbdev_ tx_rx_disruption.2278153306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/301.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/302.usbdev_tx_rx_disruption.435506284 |
| Short name | T3608 |
| Test name | |
| Test status | |
| Simulation time | 631192593 ps |
| CPU time | 1.97 seconds |
| Started | Aug 29 04:11:40 AM UTC 24 |
| Finished | Aug 29 04:11:43 AM UTC 24 |
| Peak memory | 214932 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=435506284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 302.usbdev_t x_rx_disruption.435506284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/302.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/303.usbdev_tx_rx_disruption.3492249327 |
| Short name | T3607 |
| Test name | |
| Test status | |
| Simulation time | 598814128 ps |
| CPU time | 1.77 seconds |
| Started | Aug 29 04:11:40 AM UTC 24 |
| Finished | Aug 29 04:11:43 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3492249327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 303.usbdev_ tx_rx_disruption.3492249327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/303.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/304.usbdev_tx_rx_disruption.897475166 |
| Short name | T3603 |
| Test name | |
| Test status | |
| Simulation time | 526600954 ps |
| CPU time | 1.67 seconds |
| Started | Aug 29 04:11:40 AM UTC 24 |
| Finished | Aug 29 04:11:43 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=897475166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 304.usbdev_t x_rx_disruption.897475166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/304.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/305.usbdev_tx_rx_disruption.2453461870 |
| Short name | T3567 |
| Test name | |
| Test status | |
| Simulation time | 470611611 ps |
| CPU time | 1.65 seconds |
| Started | Aug 29 04:11:40 AM UTC 24 |
| Finished | Aug 29 04:11:43 AM UTC 24 |
| Peak memory | 214944 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2453461870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 305.usbdev_ tx_rx_disruption.2453461870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/305.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/306.usbdev_tx_rx_disruption.1992133743 |
| Short name | T3611 |
| Test name | |
| Test status | |
| Simulation time | 552839815 ps |
| CPU time | 1.46 seconds |
| Started | Aug 29 04:13:03 AM UTC 24 |
| Finished | Aug 29 04:13:06 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1992133743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 306.usbdev_ tx_rx_disruption.1992133743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/306.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/307.usbdev_tx_rx_disruption.422492265 |
| Short name | T3610 |
| Test name | |
| Test status | |
| Simulation time | 441440800 ps |
| CPU time | 1.38 seconds |
| Started | Aug 29 04:13:03 AM UTC 24 |
| Finished | Aug 29 04:13:06 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=422492265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 307.usbdev_t x_rx_disruption.422492265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/307.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/308.usbdev_tx_rx_disruption.3436260342 |
| Short name | T3612 |
| Test name | |
| Test status | |
| Simulation time | 641089678 ps |
| CPU time | 1.51 seconds |
| Started | Aug 29 04:13:03 AM UTC 24 |
| Finished | Aug 29 04:13:06 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3436260342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 308.usbdev_ tx_rx_disruption.3436260342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/308.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/309.usbdev_tx_rx_disruption.487368394 |
| Short name | T3614 |
| Test name | |
| Test status | |
| Simulation time | 601199098 ps |
| CPU time | 1.55 seconds |
| Started | Aug 29 04:13:03 AM UTC 24 |
| Finished | Aug 29 04:13:06 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=487368394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 309.usbdev_t x_rx_disruption.487368394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/309.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_alert_test.3839231208 |
| Short name | T2258 |
| Test name | |
| Test status | |
| Simulation time | 37590558 ps |
| CPU time | 0.61 seconds |
| Started | Aug 29 03:46:46 AM UTC 24 |
| Finished | Aug 29 03:46:48 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3839231208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 31.usbdev_alert_test.3839231208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_disconnect.3350698507 |
| Short name | T2224 |
| Test name | |
| Test status | |
| Simulation time | 11469427439 ps |
| CPU time | 14.59 seconds |
| Started | Aug 29 03:46:12 AM UTC 24 |
| Finished | Aug 29 03:46:27 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3350698507 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_disconnect.3350698507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_reset.1329530971 |
| Short name | T2227 |
| Test name | |
| Test status | |
| Simulation time | 13733502440 ps |
| CPU time | 16.48 seconds |
| Started | Aug 29 03:46:12 AM UTC 24 |
| Finished | Aug 29 03:46:29 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1329530971 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_reset.1329530971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_resume.1292515871 |
| Short name | T2232 |
| Test name | |
| Test status | |
| Simulation time | 25741810258 ps |
| CPU time | 27.47 seconds |
| Started | Aug 29 03:46:12 AM UTC 24 |
| Finished | Aug 29 03:46:41 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1292515871 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_resume.1292515871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_av_buffer.2655492761 |
| Short name | T2201 |
| Test name | |
| Test status | |
| Simulation time | 189266393 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 03:46:12 AM UTC 24 |
| Finished | Aug 29 03:46:14 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2655492761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_av_buffer.2655492761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_bitstuff_err.1922246121 |
| Short name | T2200 |
| Test name | |
| Test status | |
| Simulation time | 144635523 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 03:46:12 AM UTC 24 |
| Finished | Aug 29 03:46:14 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1922246121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_bitstuff_err.1922246121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_data_toggle_clear.4157539350 |
| Short name | T2206 |
| Test name | |
| Test status | |
| Simulation time | 350867344 ps |
| CPU time | 1.22 seconds |
| Started | Aug 29 03:46:12 AM UTC 24 |
| Finished | Aug 29 03:46:14 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4157539350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 31.usbdev_data_toggle_clear.4157539350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_data_toggle_restore.2332419778 |
| Short name | T2216 |
| Test name | |
| Test status | |
| Simulation time | 1108897672 ps |
| CPU time | 2.88 seconds |
| Started | Aug 29 03:46:12 AM UTC 24 |
| Finished | Aug 29 03:46:16 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2332419778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_data_toggle_restore.2332419778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_device_address.1976229067 |
| Short name | T2280 |
| Test name | |
| Test status | |
| Simulation time | 33876924075 ps |
| CPU time | 49.09 seconds |
| Started | Aug 29 03:46:12 AM UTC 24 |
| Finished | Aug 29 03:47:02 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1976229067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_device_address.1976229067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_device_timeout.2224164349 |
| Short name | T2226 |
| Test name | |
| Test status | |
| Simulation time | 874962821 ps |
| CPU time | 16.18 seconds |
| Started | Aug 29 03:46:12 AM UTC 24 |
| Finished | Aug 29 03:46:29 AM UTC 24 |
| Peak memory | 217388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2224164349 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_device_timeout.2224164349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_disable_endpoint.1836874153 |
| Short name | T2213 |
| Test name | |
| Test status | |
| Simulation time | 730762967 ps |
| CPU time | 1.88 seconds |
| Started | Aug 29 03:46:12 AM UTC 24 |
| Finished | Aug 29 03:46:15 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1836874153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 31.usbdev_disable_endpoint.1836874153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_disconnected.1470957092 |
| Short name | T2205 |
| Test name | |
| Test status | |
| Simulation time | 158527343 ps |
| CPU time | 0.88 seconds |
| Started | Aug 29 03:46:12 AM UTC 24 |
| Finished | Aug 29 03:46:14 AM UTC 24 |
| Peak memory | 214960 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1470957092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_disconnected.1470957092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_enable.356678946 |
| Short name | T2202 |
| Test name | |
| Test status | |
| Simulation time | 28280272 ps |
| CPU time | 0.74 seconds |
| Started | Aug 29 03:46:12 AM UTC 24 |
| Finished | Aug 29 03:46:14 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=356678946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_enable.356678946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_endpoint_access.1750005733 |
| Short name | T2215 |
| Test name | |
| Test status | |
| Simulation time | 843604506 ps |
| CPU time | 2.28 seconds |
| Started | Aug 29 03:46:12 AM UTC 24 |
| Finished | Aug 29 03:46:15 AM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1750005733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_endpoint_access.1750005733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_endpoint_types.2071009644 |
| Short name | T551 |
| Test name | |
| Test status | |
| Simulation time | 339680531 ps |
| CPU time | 1.31 seconds |
| Started | Aug 29 03:46:12 AM UTC 24 |
| Finished | Aug 29 03:46:14 AM UTC 24 |
| Peak memory | 214956 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2071009644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_endpoint_types.2071009644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_fifo_levels.1676862075 |
| Short name | T425 |
| Test name | |
| Test status | |
| Simulation time | 317817799 ps |
| CPU time | 1.06 seconds |
| Started | Aug 29 03:46:12 AM UTC 24 |
| Finished | Aug 29 03:46:14 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1676862075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_fifo_levels.1676862075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_fifo_rst.2841166219 |
| Short name | T2212 |
| Test name | |
| Test status | |
| Simulation time | 266300367 ps |
| CPU time | 1.59 seconds |
| Started | Aug 29 03:46:12 AM UTC 24 |
| Finished | Aug 29 03:46:15 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2841166219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_fifo_rst.2841166219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_in_iso.2206555054 |
| Short name | T2211 |
| Test name | |
| Test status | |
| Simulation time | 187446781 ps |
| CPU time | 1.23 seconds |
| Started | Aug 29 03:46:12 AM UTC 24 |
| Finished | Aug 29 03:46:15 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2206555054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 31.usbdev_in_iso.2206555054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_in_stall.1858569239 |
| Short name | T2207 |
| Test name | |
| Test status | |
| Simulation time | 138934822 ps |
| CPU time | 0.72 seconds |
| Started | Aug 29 03:46:12 AM UTC 24 |
| Finished | Aug 29 03:46:14 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1858569239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_in_stall.1858569239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_in_trans.460690742 |
| Short name | T2209 |
| Test name | |
| Test status | |
| Simulation time | 219799071 ps |
| CPU time | 1.03 seconds |
| Started | Aug 29 03:46:12 AM UTC 24 |
| Finished | Aug 29 03:46:14 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=460690742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 31.usbdev_in_trans.460690742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_invalid_sync.653470109 |
| Short name | T2228 |
| Test name | |
| Test status | |
| Simulation time | 2167936204 ps |
| CPU time | 17.67 seconds |
| Started | Aug 29 03:46:12 AM UTC 24 |
| Finished | Aug 29 03:46:31 AM UTC 24 |
| Peak memory | 229656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=653470109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_invalid_sync.653470109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_iso_retraction.3095309900 |
| Short name | T2233 |
| Test name | |
| Test status | |
| Simulation time | 4427166694 ps |
| CPU time | 26.98 seconds |
| Started | Aug 29 03:46:12 AM UTC 24 |
| Finished | Aug 29 03:46:41 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3095309900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_iso_retraction.3095309900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_link_in_err.1608111579 |
| Short name | T2208 |
| Test name | |
| Test status | |
| Simulation time | 166896247 ps |
| CPU time | 0.82 seconds |
| Started | Aug 29 03:46:12 AM UTC 24 |
| Finished | Aug 29 03:46:14 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1608111579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_link_in_err.1608111579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_link_resume.1473609997 |
| Short name | T2279 |
| Test name | |
| Test status | |
| Simulation time | 29257239066 ps |
| CPU time | 47.86 seconds |
| Started | Aug 29 03:46:12 AM UTC 24 |
| Finished | Aug 29 03:47:02 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1473609997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_link_resume.1473609997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_link_suspend.2284931165 |
| Short name | T2221 |
| Test name | |
| Test status | |
| Simulation time | 6126488827 ps |
| CPU time | 8.14 seconds |
| Started | Aug 29 03:46:12 AM UTC 24 |
| Finished | Aug 29 03:46:22 AM UTC 24 |
| Peak memory | 227548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2284931165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_link_suspend.2284931165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_low_speed_traffic.2480749834 |
| Short name | T2336 |
| Test name | |
| Test status | |
| Simulation time | 4591295220 ps |
| CPU time | 108.9 seconds |
| Started | Aug 29 03:46:12 AM UTC 24 |
| Finished | Aug 29 03:48:03 AM UTC 24 |
| Peak memory | 230416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2480749834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_low_speed_traffic.2480749834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_max_inter_pkt_delay.2791770005 |
| Short name | T2231 |
| Test name | |
| Test status | |
| Simulation time | 2806644067 ps |
| CPU time | 24.36 seconds |
| Started | Aug 29 03:46:12 AM UTC 24 |
| Finished | Aug 29 03:46:38 AM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2791770005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_max_inter_pkt_delay.2791770005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_max_length_in_transaction.3579161631 |
| Short name | T2210 |
| Test name | |
| Test status | |
| Simulation time | 258971698 ps |
| CPU time | 0.9 seconds |
| Started | Aug 29 03:46:12 AM UTC 24 |
| Finished | Aug 29 03:46:14 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3579161631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 31.usbdev_max_length_in_transaction.3579161631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_max_length_out_transaction.3523345607 |
| Short name | T2236 |
| Test name | |
| Test status | |
| Simulation time | 208866712 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 03:46:45 AM UTC 24 |
| Finished | Aug 29 03:46:47 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3523345607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_max_length_out_transaction.3523345607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_min_inter_pkt_delay.1314353545 |
| Short name | T2278 |
| Test name | |
| Test status | |
| Simulation time | 2192282844 ps |
| CPU time | 14.22 seconds |
| Started | Aug 29 03:46:45 AM UTC 24 |
| Finished | Aug 29 03:47:01 AM UTC 24 |
| Peak memory | 227460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1314353545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_min_inter_pkt_delay.1314353545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_min_length_in_transaction.2416744104 |
| Short name | T2240 |
| Test name | |
| Test status | |
| Simulation time | 187594759 ps |
| CPU time | 0.95 seconds |
| Started | Aug 29 03:46:45 AM UTC 24 |
| Finished | Aug 29 03:46:47 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2416744104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 31.usbdev_min_length_in_transaction.2416744104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_min_length_out_transaction.1435880230 |
| Short name | T2237 |
| Test name | |
| Test status | |
| Simulation time | 153842021 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 03:46:45 AM UTC 24 |
| Finished | Aug 29 03:46:47 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1435880230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_min_length_out_transaction.1435880230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_nak_trans.4046896892 |
| Short name | T2246 |
| Test name | |
| Test status | |
| Simulation time | 238820839 ps |
| CPU time | 0.97 seconds |
| Started | Aug 29 03:46:45 AM UTC 24 |
| Finished | Aug 29 03:46:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4046896892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_nak_trans.4046896892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_out_iso.1316687674 |
| Short name | T2243 |
| Test name | |
| Test status | |
| Simulation time | 161803107 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 03:46:46 AM UTC 24 |
| Finished | Aug 29 03:46:47 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1316687674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 31.usbdev_out_iso.1316687674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_out_stall.2492039042 |
| Short name | T2247 |
| Test name | |
| Test status | |
| Simulation time | 192519078 ps |
| CPU time | 0.91 seconds |
| Started | Aug 29 03:46:46 AM UTC 24 |
| Finished | Aug 29 03:46:48 AM UTC 24 |
| Peak memory | 216236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2492039042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_out_stall.2492039042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_out_trans_nak.179359891 |
| Short name | T2244 |
| Test name | |
| Test status | |
| Simulation time | 183594024 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 03:46:46 AM UTC 24 |
| Finished | Aug 29 03:46:47 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=179359891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_out_trans_nak.179359891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_pending_in_trans.1976287498 |
| Short name | T2242 |
| Test name | |
| Test status | |
| Simulation time | 218962922 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 03:46:46 AM UTC 24 |
| Finished | Aug 29 03:46:47 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1976287498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 31.usbdev_pending_in_trans.1976287498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_phy_config_pinflip.1068615702 |
| Short name | T2245 |
| Test name | |
| Test status | |
| Simulation time | 272598205 ps |
| CPU time | 0.99 seconds |
| Started | Aug 29 03:46:46 AM UTC 24 |
| Finished | Aug 29 03:46:48 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1068615702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 31.usbdev_phy_config_pinflip.1068615702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_phy_config_usb_ref_disable.1101969674 |
| Short name | T2241 |
| Test name | |
| Test status | |
| Simulation time | 152439268 ps |
| CPU time | 0.75 seconds |
| Started | Aug 29 03:46:46 AM UTC 24 |
| Finished | Aug 29 03:46:47 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1101969674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_phy_config_usb_ref_disable.1101969674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_phy_pins_sense.2735290488 |
| Short name | T2238 |
| Test name | |
| Test status | |
| Simulation time | 38920472 ps |
| CPU time | 0.6 seconds |
| Started | Aug 29 03:46:46 AM UTC 24 |
| Finished | Aug 29 03:46:47 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2735290488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_phy_pins_sense.2735290488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_buffer.1281995683 |
| Short name | T2252 |
| Test name | |
| Test status | |
| Simulation time | 11653474694 ps |
| CPU time | 29.05 seconds |
| Started | Aug 29 03:46:46 AM UTC 24 |
| Finished | Aug 29 03:47:16 AM UTC 24 |
| Peak memory | 226612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1281995683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_pkt_buffer.1281995683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_received.3998855361 |
| Short name | T2248 |
| Test name | |
| Test status | |
| Simulation time | 191914694 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 03:46:46 AM UTC 24 |
| Finished | Aug 29 03:46:48 AM UTC 24 |
| Peak memory | 216572 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3998855361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_pkt_received.3998855361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_sent.3342538579 |
| Short name | T2255 |
| Test name | |
| Test status | |
| Simulation time | 256627867 ps |
| CPU time | 1.1 seconds |
| Started | Aug 29 03:46:46 AM UTC 24 |
| Finished | Aug 29 03:46:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3342538579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_pkt_sent.3342538579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_random_length_in_transaction.249859069 |
| Short name | T2257 |
| Test name | |
| Test status | |
| Simulation time | 242829258 ps |
| CPU time | 1.13 seconds |
| Started | Aug 29 03:46:46 AM UTC 24 |
| Finished | Aug 29 03:46:48 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=249859069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_random_length_in_transaction.249859069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_random_length_out_transaction.457138374 |
| Short name | T2250 |
| Test name | |
| Test status | |
| Simulation time | 222703597 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 03:46:46 AM UTC 24 |
| Finished | Aug 29 03:46:48 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=457138374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 31.usbdev_random_length_out_transaction.457138374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_rx_crc_err.3182639510 |
| Short name | T2249 |
| Test name | |
| Test status | |
| Simulation time | 181665794 ps |
| CPU time | 0.82 seconds |
| Started | Aug 29 03:46:46 AM UTC 24 |
| Finished | Aug 29 03:46:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3182639510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_rx_crc_err.3182639510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_rx_full.2429180294 |
| Short name | T2264 |
| Test name | |
| Test status | |
| Simulation time | 298603727 ps |
| CPU time | 1.25 seconds |
| Started | Aug 29 03:46:46 AM UTC 24 |
| Finished | Aug 29 03:46:48 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2429180294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 31.usbdev_rx_full.2429180294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_setup_stage.3685941639 |
| Short name | T2251 |
| Test name | |
| Test status | |
| Simulation time | 190102740 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 03:46:46 AM UTC 24 |
| Finished | Aug 29 03:46:48 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3685941639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_setup_stage.3685941639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_setup_trans_ignored.4139883669 |
| Short name | T2260 |
| Test name | |
| Test status | |
| Simulation time | 154658094 ps |
| CPU time | 0.88 seconds |
| Started | Aug 29 03:46:46 AM UTC 24 |
| Finished | Aug 29 03:46:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4139883669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 31.usbdev_setup_trans_ignored.4139883669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_smoke.1629288098 |
| Short name | T2261 |
| Test name | |
| Test status | |
| Simulation time | 186651808 ps |
| CPU time | 0.91 seconds |
| Started | Aug 29 03:46:46 AM UTC 24 |
| Finished | Aug 29 03:46:48 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1629288098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_smoke.1629288098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_spurious_pids_ignored.901054053 |
| Short name | T2282 |
| Test name | |
| Test status | |
| Simulation time | 2619473252 ps |
| CPU time | 16.34 seconds |
| Started | Aug 29 03:46:46 AM UTC 24 |
| Finished | Aug 29 03:47:04 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=901054053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 31.usbdev_spurious_pids_ignored.901054053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_stall_priority_over_nak.2939198517 |
| Short name | T2259 |
| Test name | |
| Test status | |
| Simulation time | 207095689 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:46:46 AM UTC 24 |
| Finished | Aug 29 03:46:48 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2939198517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_stall_priority_over_nak.2939198517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_stall_trans.1739015188 |
| Short name | T2254 |
| Test name | |
| Test status | |
| Simulation time | 165220277 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 03:46:46 AM UTC 24 |
| Finished | Aug 29 03:46:48 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1739015188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_stall_trans.1739015188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_stream_len_max.1337735642 |
| Short name | T2273 |
| Test name | |
| Test status | |
| Simulation time | 707784173 ps |
| CPU time | 1.9 seconds |
| Started | Aug 29 03:46:46 AM UTC 24 |
| Finished | Aug 29 03:46:49 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1337735642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_stream_len_max.1337735642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_streaming_out.2639098830 |
| Short name | T2283 |
| Test name | |
| Test status | |
| Simulation time | 2038941997 ps |
| CPU time | 16.88 seconds |
| Started | Aug 29 03:46:46 AM UTC 24 |
| Finished | Aug 29 03:47:04 AM UTC 24 |
| Peak memory | 226568 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2639098830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_streaming_out.2639098830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_timeout_missing_host_handshake.2351732608 |
| Short name | T2235 |
| Test name | |
| Test status | |
| Simulation time | 4292119177 ps |
| CPU time | 32.55 seconds |
| Started | Aug 29 03:46:12 AM UTC 24 |
| Finished | Aug 29 03:46:46 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2351732608 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_timeout_missing_host_handshake.2351732608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/31.usbdev_tx_rx_disruption.2136091620 |
| Short name | T2272 |
| Test name | |
| Test status | |
| Simulation time | 651279378 ps |
| CPU time | 1.96 seconds |
| Started | Aug 29 03:46:46 AM UTC 24 |
| Finished | Aug 29 03:46:49 AM UTC 24 |
| Peak memory | 216228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2136091620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_t x_rx_disruption.2136091620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/31.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/310.usbdev_tx_rx_disruption.206493686 |
| Short name | T3609 |
| Test name | |
| Test status | |
| Simulation time | 477452203 ps |
| CPU time | 1.39 seconds |
| Started | Aug 29 04:13:03 AM UTC 24 |
| Finished | Aug 29 04:13:06 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=206493686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 310.usbdev_t x_rx_disruption.206493686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/310.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/311.usbdev_tx_rx_disruption.1636530813 |
| Short name | T3632 |
| Test name | |
| Test status | |
| Simulation time | 567016552 ps |
| CPU time | 2.06 seconds |
| Started | Aug 29 04:13:03 AM UTC 24 |
| Finished | Aug 29 04:13:07 AM UTC 24 |
| Peak memory | 217036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1636530813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 311.usbdev_ tx_rx_disruption.1636530813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/311.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/312.usbdev_tx_rx_disruption.2863908421 |
| Short name | T124 |
| Test name | |
| Test status | |
| Simulation time | 666754232 ps |
| CPU time | 1.48 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:06 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2863908421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 312.usbdev_ tx_rx_disruption.2863908421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/312.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/313.usbdev_tx_rx_disruption.483450844 |
| Short name | T3617 |
| Test name | |
| Test status | |
| Simulation time | 485125292 ps |
| CPU time | 1.59 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:06 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=483450844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 313.usbdev_t x_rx_disruption.483450844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/313.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/314.usbdev_tx_rx_disruption.350842439 |
| Short name | T3618 |
| Test name | |
| Test status | |
| Simulation time | 604298043 ps |
| CPU time | 1.62 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:06 AM UTC 24 |
| Peak memory | 214720 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=350842439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 314.usbdev_t x_rx_disruption.350842439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/314.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/315.usbdev_tx_rx_disruption.653388973 |
| Short name | T3623 |
| Test name | |
| Test status | |
| Simulation time | 573599187 ps |
| CPU time | 1.75 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:06 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=653388973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 315.usbdev_t x_rx_disruption.653388973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/315.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/316.usbdev_tx_rx_disruption.2936159629 |
| Short name | T3619 |
| Test name | |
| Test status | |
| Simulation time | 576363757 ps |
| CPU time | 1.55 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:06 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2936159629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 316.usbdev_ tx_rx_disruption.2936159629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/316.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/317.usbdev_tx_rx_disruption.715893746 |
| Short name | T3616 |
| Test name | |
| Test status | |
| Simulation time | 448792605 ps |
| CPU time | 1.31 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:06 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=715893746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 317.usbdev_t x_rx_disruption.715893746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/317.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/318.usbdev_tx_rx_disruption.513934968 |
| Short name | T3633 |
| Test name | |
| Test status | |
| Simulation time | 628799200 ps |
| CPU time | 1.7 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:07 AM UTC 24 |
| Peak memory | 214796 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=513934968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 318.usbdev_t x_rx_disruption.513934968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/318.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/319.usbdev_tx_rx_disruption.3357760487 |
| Short name | T3629 |
| Test name | |
| Test status | |
| Simulation time | 527466149 ps |
| CPU time | 1.61 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:07 AM UTC 24 |
| Peak memory | 215020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3357760487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 319.usbdev_ tx_rx_disruption.3357760487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/319.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_alert_test.833286549 |
| Short name | T2307 |
| Test name | |
| Test status | |
| Simulation time | 72237296 ps |
| CPU time | 0.66 seconds |
| Started | Aug 29 03:47:25 AM UTC 24 |
| Finished | Aug 29 03:47:27 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=833286549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 32.usbdev_alert_test.833286549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_disconnect.3440538130 |
| Short name | T2277 |
| Test name | |
| Test status | |
| Simulation time | 3491039620 ps |
| CPU time | 5.24 seconds |
| Started | Aug 29 03:46:46 AM UTC 24 |
| Finished | Aug 29 03:46:53 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3440538130 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_disconnect.3440538130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_reset.4215298350 |
| Short name | T2239 |
| Test name | |
| Test status | |
| Simulation time | 15234285258 ps |
| CPU time | 18.58 seconds |
| Started | Aug 29 03:46:46 AM UTC 24 |
| Finished | Aug 29 03:47:06 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4215298350 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_reset.4215298350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_resume.3952319012 |
| Short name | T2253 |
| Test name | |
| Test status | |
| Simulation time | 30097196291 ps |
| CPU time | 38.48 seconds |
| Started | Aug 29 03:46:46 AM UTC 24 |
| Finished | Aug 29 03:47:26 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3952319012 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_resume.3952319012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_av_buffer.2177483392 |
| Short name | T2263 |
| Test name | |
| Test status | |
| Simulation time | 183955795 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 03:46:46 AM UTC 24 |
| Finished | Aug 29 03:46:48 AM UTC 24 |
| Peak memory | 215016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2177483392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_av_buffer.2177483392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_bitstuff_err.39732277 |
| Short name | T2262 |
| Test name | |
| Test status | |
| Simulation time | 162659537 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 03:46:46 AM UTC 24 |
| Finished | Aug 29 03:46:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=39732277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 32.usbdev_bitstuff_err.39732277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_data_toggle_clear.1271048490 |
| Short name | T2265 |
| Test name | |
| Test status | |
| Simulation time | 168978456 ps |
| CPU time | 0.82 seconds |
| Started | Aug 29 03:46:46 AM UTC 24 |
| Finished | Aug 29 03:46:48 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1271048490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 32.usbdev_data_toggle_clear.1271048490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_data_toggle_restore.3468161727 |
| Short name | T2271 |
| Test name | |
| Test status | |
| Simulation time | 463736358 ps |
| CPU time | 1.31 seconds |
| Started | Aug 29 03:46:46 AM UTC 24 |
| Finished | Aug 29 03:46:49 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3468161727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_data_toggle_restore.3468161727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_device_address.3176909003 |
| Short name | T2333 |
| Test name | |
| Test status | |
| Simulation time | 36247223868 ps |
| CPU time | 66.56 seconds |
| Started | Aug 29 03:46:46 AM UTC 24 |
| Finished | Aug 29 03:47:55 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3176909003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_device_address.3176909003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_device_timeout.2934755269 |
| Short name | T2285 |
| Test name | |
| Test status | |
| Simulation time | 3627270986 ps |
| CPU time | 20.5 seconds |
| Started | Aug 29 03:46:46 AM UTC 24 |
| Finished | Aug 29 03:47:08 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2934755269 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_device_timeout.2934755269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_disable_endpoint.2192314470 |
| Short name | T2274 |
| Test name | |
| Test status | |
| Simulation time | 782017224 ps |
| CPU time | 1.71 seconds |
| Started | Aug 29 03:46:46 AM UTC 24 |
| Finished | Aug 29 03:46:49 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2192314470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 32.usbdev_disable_endpoint.2192314470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_disconnected.2480913175 |
| Short name | T2267 |
| Test name | |
| Test status | |
| Simulation time | 132552712 ps |
| CPU time | 0.75 seconds |
| Started | Aug 29 03:46:46 AM UTC 24 |
| Finished | Aug 29 03:46:48 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2480913175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_disconnected.2480913175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_enable.1336044276 |
| Short name | T2266 |
| Test name | |
| Test status | |
| Simulation time | 39255860 ps |
| CPU time | 0.68 seconds |
| Started | Aug 29 03:46:46 AM UTC 24 |
| Finished | Aug 29 03:46:48 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1336044276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 32.usbdev_enable.1336044276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_endpoint_access.2121498400 |
| Short name | T2276 |
| Test name | |
| Test status | |
| Simulation time | 997573172 ps |
| CPU time | 2.49 seconds |
| Started | Aug 29 03:46:47 AM UTC 24 |
| Finished | Aug 29 03:46:50 AM UTC 24 |
| Peak memory | 217196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2121498400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_endpoint_access.2121498400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_endpoint_types.1443240110 |
| Short name | T535 |
| Test name | |
| Test status | |
| Simulation time | 300695340 ps |
| CPU time | 1.05 seconds |
| Started | Aug 29 03:46:47 AM UTC 24 |
| Finished | Aug 29 03:46:49 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1443240110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_endpoint_types.1443240110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_fifo_levels.2183975829 |
| Short name | T2269 |
| Test name | |
| Test status | |
| Simulation time | 172966930 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 03:46:47 AM UTC 24 |
| Finished | Aug 29 03:46:49 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2183975829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_fifo_levels.2183975829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_fifo_rst.529763558 |
| Short name | T2275 |
| Test name | |
| Test status | |
| Simulation time | 333793037 ps |
| CPU time | 1.65 seconds |
| Started | Aug 29 03:46:47 AM UTC 24 |
| Finished | Aug 29 03:46:49 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=529763558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 32.usbdev_fifo_rst.529763558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_in_iso.1624184769 |
| Short name | T2268 |
| Test name | |
| Test status | |
| Simulation time | 205468585 ps |
| CPU time | 0.97 seconds |
| Started | Aug 29 03:46:47 AM UTC 24 |
| Finished | Aug 29 03:46:49 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1624184769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 32.usbdev_in_iso.1624184769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_in_stall.3186898299 |
| Short name | T2270 |
| Test name | |
| Test status | |
| Simulation time | 157069421 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 03:46:47 AM UTC 24 |
| Finished | Aug 29 03:46:49 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3186898299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_in_stall.3186898299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_in_trans.216869330 |
| Short name | T2256 |
| Test name | |
| Test status | |
| Simulation time | 182443400 ps |
| CPU time | 0.82 seconds |
| Started | Aug 29 03:47:24 AM UTC 24 |
| Finished | Aug 29 03:47:26 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=216869330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 32.usbdev_in_trans.216869330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_invalid_sync.4189285098 |
| Short name | T2332 |
| Test name | |
| Test status | |
| Simulation time | 2701845459 ps |
| CPU time | 63.39 seconds |
| Started | Aug 29 03:46:47 AM UTC 24 |
| Finished | Aug 29 03:47:52 AM UTC 24 |
| Peak memory | 229724 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4189285098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 32.usbdev_invalid_sync.4189285098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_iso_retraction.3349893102 |
| Short name | T2434 |
| Test name | |
| Test status | |
| Simulation time | 10480885140 ps |
| CPU time | 102.75 seconds |
| Started | Aug 29 03:47:24 AM UTC 24 |
| Finished | Aug 29 03:49:09 AM UTC 24 |
| Peak memory | 219964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3349893102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_iso_retraction.3349893102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_link_in_err.1783441530 |
| Short name | T2146 |
| Test name | |
| Test status | |
| Simulation time | 222987607 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 03:47:24 AM UTC 24 |
| Finished | Aug 29 03:47:26 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1783441530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_link_in_err.1783441530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_link_resume.1563365085 |
| Short name | T2328 |
| Test name | |
| Test status | |
| Simulation time | 10897525736 ps |
| CPU time | 14.44 seconds |
| Started | Aug 29 03:47:24 AM UTC 24 |
| Finished | Aug 29 03:47:40 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1563365085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_link_resume.1563365085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_link_suspend.3369222880 |
| Short name | T2324 |
| Test name | |
| Test status | |
| Simulation time | 5051016132 ps |
| CPU time | 6.66 seconds |
| Started | Aug 29 03:47:24 AM UTC 24 |
| Finished | Aug 29 03:47:32 AM UTC 24 |
| Peak memory | 217152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3369222880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_link_suspend.3369222880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_low_speed_traffic.1468089823 |
| Short name | T2335 |
| Test name | |
| Test status | |
| Simulation time | 3746600341 ps |
| CPU time | 33.37 seconds |
| Started | Aug 29 03:47:24 AM UTC 24 |
| Finished | Aug 29 03:47:59 AM UTC 24 |
| Peak memory | 234276 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1468089823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_low_speed_traffic.1468089823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_max_inter_pkt_delay.2709634722 |
| Short name | T2327 |
| Test name | |
| Test status | |
| Simulation time | 1984616085 ps |
| CPU time | 13.3 seconds |
| Started | Aug 29 03:47:24 AM UTC 24 |
| Finished | Aug 29 03:47:39 AM UTC 24 |
| Peak memory | 234028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2709634722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_max_inter_pkt_delay.2709634722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_max_length_in_transaction.2931931675 |
| Short name | T2291 |
| Test name | |
| Test status | |
| Simulation time | 234732659 ps |
| CPU time | 1.03 seconds |
| Started | Aug 29 03:47:24 AM UTC 24 |
| Finished | Aug 29 03:47:27 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2931931675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 32.usbdev_max_length_in_transaction.2931931675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_max_length_out_transaction.1489757950 |
| Short name | T2192 |
| Test name | |
| Test status | |
| Simulation time | 190483465 ps |
| CPU time | 0.82 seconds |
| Started | Aug 29 03:47:24 AM UTC 24 |
| Finished | Aug 29 03:47:26 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1489757950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_max_length_out_transaction.1489757950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_min_inter_pkt_delay.644700542 |
| Short name | T2326 |
| Test name | |
| Test status | |
| Simulation time | 1677834074 ps |
| CPU time | 11.2 seconds |
| Started | Aug 29 03:47:25 AM UTC 24 |
| Finished | Aug 29 03:47:37 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=644700542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_min_inter_pkt_delay.644700542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_min_length_in_transaction.3357856049 |
| Short name | T2286 |
| Test name | |
| Test status | |
| Simulation time | 173140239 ps |
| CPU time | 0.77 seconds |
| Started | Aug 29 03:47:25 AM UTC 24 |
| Finished | Aug 29 03:47:27 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3357856049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 32.usbdev_min_length_in_transaction.3357856049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_min_length_out_transaction.3401314117 |
| Short name | T2288 |
| Test name | |
| Test status | |
| Simulation time | 151408946 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 03:47:25 AM UTC 24 |
| Finished | Aug 29 03:47:27 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3401314117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_min_length_out_transaction.3401314117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_nak_trans.1030595358 |
| Short name | T153 |
| Test name | |
| Test status | |
| Simulation time | 271213260 ps |
| CPU time | 1.09 seconds |
| Started | Aug 29 03:47:25 AM UTC 24 |
| Finished | Aug 29 03:47:27 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1030595358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_nak_trans.1030595358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_out_iso.802377763 |
| Short name | T2289 |
| Test name | |
| Test status | |
| Simulation time | 193996031 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 03:47:25 AM UTC 24 |
| Finished | Aug 29 03:47:27 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=802377763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 32.usbdev_out_iso.802377763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_out_stall.489182711 |
| Short name | T2292 |
| Test name | |
| Test status | |
| Simulation time | 173933713 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 03:47:25 AM UTC 24 |
| Finished | Aug 29 03:47:27 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=489182711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_out_stall.489182711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_out_trans_nak.3956332936 |
| Short name | T2295 |
| Test name | |
| Test status | |
| Simulation time | 169948242 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 03:47:25 AM UTC 24 |
| Finished | Aug 29 03:47:27 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3956332936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 32.usbdev_out_trans_nak.3956332936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_pending_in_trans.3506219714 |
| Short name | T2294 |
| Test name | |
| Test status | |
| Simulation time | 150142182 ps |
| CPU time | 0.9 seconds |
| Started | Aug 29 03:47:25 AM UTC 24 |
| Finished | Aug 29 03:47:27 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3506219714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 32.usbdev_pending_in_trans.3506219714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_phy_config_pinflip.2420505611 |
| Short name | T2296 |
| Test name | |
| Test status | |
| Simulation time | 238842259 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 03:47:25 AM UTC 24 |
| Finished | Aug 29 03:47:27 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2420505611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 32.usbdev_phy_config_pinflip.2420505611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_phy_config_usb_ref_disable.1542784857 |
| Short name | T2297 |
| Test name | |
| Test status | |
| Simulation time | 181463416 ps |
| CPU time | 0.95 seconds |
| Started | Aug 29 03:47:25 AM UTC 24 |
| Finished | Aug 29 03:47:27 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1542784857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_phy_config_usb_ref_disable.1542784857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_phy_pins_sense.1218041700 |
| Short name | T2290 |
| Test name | |
| Test status | |
| Simulation time | 31298009 ps |
| CPU time | 0.66 seconds |
| Started | Aug 29 03:47:25 AM UTC 24 |
| Finished | Aug 29 03:47:27 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1218041700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_phy_pins_sense.1218041700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_buffer.731954737 |
| Short name | T2379 |
| Test name | |
| Test status | |
| Simulation time | 22465690438 ps |
| CPU time | 53.18 seconds |
| Started | Aug 29 03:47:25 AM UTC 24 |
| Finished | Aug 29 03:48:20 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=731954737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_pkt_buffer.731954737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_received.3569288824 |
| Short name | T2298 |
| Test name | |
| Test status | |
| Simulation time | 173935159 ps |
| CPU time | 0.88 seconds |
| Started | Aug 29 03:47:25 AM UTC 24 |
| Finished | Aug 29 03:47:27 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3569288824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_pkt_received.3569288824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_sent.3561196677 |
| Short name | T2304 |
| Test name | |
| Test status | |
| Simulation time | 191092952 ps |
| CPU time | 1.01 seconds |
| Started | Aug 29 03:47:25 AM UTC 24 |
| Finished | Aug 29 03:47:27 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3561196677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_pkt_sent.3561196677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_random_length_in_transaction.3884685261 |
| Short name | T2309 |
| Test name | |
| Test status | |
| Simulation time | 222673217 ps |
| CPU time | 1.12 seconds |
| Started | Aug 29 03:47:25 AM UTC 24 |
| Finished | Aug 29 03:47:27 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3884685261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 32.usbdev_random_length_in_transaction.3884685261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_random_length_out_transaction.2063191896 |
| Short name | T2299 |
| Test name | |
| Test status | |
| Simulation time | 150422270 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 03:47:25 AM UTC 24 |
| Finished | Aug 29 03:47:27 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2063191896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 32.usbdev_random_length_out_transaction.2063191896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_rx_crc_err.4104230006 |
| Short name | T2302 |
| Test name | |
| Test status | |
| Simulation time | 175862584 ps |
| CPU time | 0.9 seconds |
| Started | Aug 29 03:47:25 AM UTC 24 |
| Finished | Aug 29 03:47:27 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4104230006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 32.usbdev_rx_crc_err.4104230006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_rx_full.1146379393 |
| Short name | T2306 |
| Test name | |
| Test status | |
| Simulation time | 241905959 ps |
| CPU time | 1.04 seconds |
| Started | Aug 29 03:47:25 AM UTC 24 |
| Finished | Aug 29 03:47:27 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1146379393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 32.usbdev_rx_full.1146379393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_setup_stage.729207439 |
| Short name | T2300 |
| Test name | |
| Test status | |
| Simulation time | 149253822 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 03:47:25 AM UTC 24 |
| Finished | Aug 29 03:47:27 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=729207439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 32.usbdev_setup_stage.729207439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_setup_trans_ignored.2854886731 |
| Short name | T2301 |
| Test name | |
| Test status | |
| Simulation time | 149958634 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 03:47:25 AM UTC 24 |
| Finished | Aug 29 03:47:27 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2854886731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 32.usbdev_setup_trans_ignored.2854886731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_smoke.3620684537 |
| Short name | T2311 |
| Test name | |
| Test status | |
| Simulation time | 212619332 ps |
| CPU time | 1.09 seconds |
| Started | Aug 29 03:47:25 AM UTC 24 |
| Finished | Aug 29 03:47:27 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3620684537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_smoke.3620684537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_spurious_pids_ignored.26776286 |
| Short name | T2428 |
| Test name | |
| Test status | |
| Simulation time | 3476148250 ps |
| CPU time | 83.34 seconds |
| Started | Aug 29 03:47:25 AM UTC 24 |
| Finished | Aug 29 03:48:50 AM UTC 24 |
| Peak memory | 234244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=26776286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_ traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 32.usbdev_spurious_pids_ignored.26776286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_stall_priority_over_nak.2542379755 |
| Short name | T2303 |
| Test name | |
| Test status | |
| Simulation time | 225922262 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 03:47:25 AM UTC 24 |
| Finished | Aug 29 03:47:27 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2542379755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_stall_priority_over_nak.2542379755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_stall_trans.2549695736 |
| Short name | T2308 |
| Test name | |
| Test status | |
| Simulation time | 169550351 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 03:47:25 AM UTC 24 |
| Finished | Aug 29 03:47:27 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2549695736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_stall_trans.2549695736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_stream_len_max.1538463788 |
| Short name | T2321 |
| Test name | |
| Test status | |
| Simulation time | 724146296 ps |
| CPU time | 1.97 seconds |
| Started | Aug 29 03:47:25 AM UTC 24 |
| Finished | Aug 29 03:47:28 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1538463788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_stream_len_max.1538463788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_streaming_out.159135799 |
| Short name | T2435 |
| Test name | |
| Test status | |
| Simulation time | 4257976428 ps |
| CPU time | 103.72 seconds |
| Started | Aug 29 03:47:25 AM UTC 24 |
| Finished | Aug 29 03:49:11 AM UTC 24 |
| Peak memory | 227912 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=159135799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_streaming_out.159135799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_timeout_missing_host_handshake.920593428 |
| Short name | T2281 |
| Test name | |
| Test status | |
| Simulation time | 2502575757 ps |
| CPU time | 15.18 seconds |
| Started | Aug 29 03:46:46 AM UTC 24 |
| Finished | Aug 29 03:47:03 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=920593428 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_timeout_missing_host_handshake.920593428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/32.usbdev_tx_rx_disruption.1985136856 |
| Short name | T2320 |
| Test name | |
| Test status | |
| Simulation time | 636926188 ps |
| CPU time | 1.69 seconds |
| Started | Aug 29 03:47:25 AM UTC 24 |
| Finished | Aug 29 03:47:28 AM UTC 24 |
| Peak memory | 215016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1985136856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_t x_rx_disruption.1985136856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/32.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/320.usbdev_tx_rx_disruption.751794848 |
| Short name | T3636 |
| Test name | |
| Test status | |
| Simulation time | 571534044 ps |
| CPU time | 1.74 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:07 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=751794848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 320.usbdev_t x_rx_disruption.751794848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/320.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/321.usbdev_tx_rx_disruption.906933859 |
| Short name | T3620 |
| Test name | |
| Test status | |
| Simulation time | 476766796 ps |
| CPU time | 1.38 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:06 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=906933859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 321.usbdev_t x_rx_disruption.906933859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/321.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/323.usbdev_tx_rx_disruption.3615708955 |
| Short name | T3637 |
| Test name | |
| Test status | |
| Simulation time | 592996503 ps |
| CPU time | 1.75 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:07 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3615708955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 323.usbdev_ tx_rx_disruption.3615708955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/323.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/324.usbdev_tx_rx_disruption.1050674878 |
| Short name | T3628 |
| Test name | |
| Test status | |
| Simulation time | 503358943 ps |
| CPU time | 1.48 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:07 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1050674878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 324.usbdev_ tx_rx_disruption.1050674878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/324.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/325.usbdev_tx_rx_disruption.924393811 |
| Short name | T3625 |
| Test name | |
| Test status | |
| Simulation time | 536313072 ps |
| CPU time | 1.49 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:06 AM UTC 24 |
| Peak memory | 216980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=924393811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 325.usbdev_t x_rx_disruption.924393811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/325.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/326.usbdev_tx_rx_disruption.195383563 |
| Short name | T3622 |
| Test name | |
| Test status | |
| Simulation time | 433645205 ps |
| CPU time | 1.31 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:06 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=195383563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 326.usbdev_t x_rx_disruption.195383563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/326.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/327.usbdev_tx_rx_disruption.2902976519 |
| Short name | T3639 |
| Test name | |
| Test status | |
| Simulation time | 571304539 ps |
| CPU time | 1.78 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:07 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2902976519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 327.usbdev_ tx_rx_disruption.2902976519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/327.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/328.usbdev_tx_rx_disruption.1385667913 |
| Short name | T3630 |
| Test name | |
| Test status | |
| Simulation time | 477479251 ps |
| CPU time | 1.46 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:07 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1385667913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 328.usbdev_ tx_rx_disruption.1385667913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/328.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/329.usbdev_tx_rx_disruption.1339046060 |
| Short name | T3661 |
| Test name | |
| Test status | |
| Simulation time | 560203580 ps |
| CPU time | 2.27 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:08 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1339046060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 329.usbdev_ tx_rx_disruption.1339046060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/329.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_alert_test.2284940526 |
| Short name | T2352 |
| Test name | |
| Test status | |
| Simulation time | 40995820 ps |
| CPU time | 0.64 seconds |
| Started | Aug 29 03:48:04 AM UTC 24 |
| Finished | Aug 29 03:48:06 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2284940526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 33.usbdev_alert_test.2284940526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_disconnect.1680144275 |
| Short name | T2325 |
| Test name | |
| Test status | |
| Simulation time | 6139577663 ps |
| CPU time | 7.46 seconds |
| Started | Aug 29 03:47:25 AM UTC 24 |
| Finished | Aug 29 03:47:34 AM UTC 24 |
| Peak memory | 227476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1680144275 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_disconnect.1680144275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_reset.3893219399 |
| Short name | T2329 |
| Test name | |
| Test status | |
| Simulation time | 14134593640 ps |
| CPU time | 16.29 seconds |
| Started | Aug 29 03:47:25 AM UTC 24 |
| Finished | Aug 29 03:47:43 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3893219399 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_reset.3893219399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_resume.3401395406 |
| Short name | T2334 |
| Test name | |
| Test status | |
| Simulation time | 23924446025 ps |
| CPU time | 30.11 seconds |
| Started | Aug 29 03:47:25 AM UTC 24 |
| Finished | Aug 29 03:47:57 AM UTC 24 |
| Peak memory | 227476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3401395406 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_resume.3401395406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_av_buffer.99773100 |
| Short name | T2312 |
| Test name | |
| Test status | |
| Simulation time | 171432039 ps |
| CPU time | 0.91 seconds |
| Started | Aug 29 03:47:25 AM UTC 24 |
| Finished | Aug 29 03:47:27 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=99773100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 33.usbdev_av_buffer.99773100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_bitstuff_err.1898834128 |
| Short name | T2316 |
| Test name | |
| Test status | |
| Simulation time | 160387082 ps |
| CPU time | 0.95 seconds |
| Started | Aug 29 03:47:25 AM UTC 24 |
| Finished | Aug 29 03:47:28 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1898834128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_bitstuff_err.1898834128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_data_toggle_clear.2439662308 |
| Short name | T2315 |
| Test name | |
| Test status | |
| Simulation time | 240025916 ps |
| CPU time | 1.01 seconds |
| Started | Aug 29 03:47:25 AM UTC 24 |
| Finished | Aug 29 03:47:28 AM UTC 24 |
| Peak memory | 217136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2439662308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 33.usbdev_data_toggle_clear.2439662308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_data_toggle_restore.2792588089 |
| Short name | T2318 |
| Test name | |
| Test status | |
| Simulation time | 338992510 ps |
| CPU time | 1.14 seconds |
| Started | Aug 29 03:47:25 AM UTC 24 |
| Finished | Aug 29 03:47:28 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2792588089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_data_toggle_restore.2792588089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_device_address.108460165 |
| Short name | T2375 |
| Test name | |
| Test status | |
| Simulation time | 26920979567 ps |
| CPU time | 43.45 seconds |
| Started | Aug 29 03:47:25 AM UTC 24 |
| Finished | Aug 29 03:48:10 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=108460165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 33.usbdev_device_address.108460165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_device_timeout.3799914389 |
| Short name | T2331 |
| Test name | |
| Test status | |
| Simulation time | 1282233150 ps |
| CPU time | 24.5 seconds |
| Started | Aug 29 03:47:26 AM UTC 24 |
| Finished | Aug 29 03:47:51 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3799914389 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_device_timeout.3799914389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_disable_endpoint.2534343818 |
| Short name | T2319 |
| Test name | |
| Test status | |
| Simulation time | 456561632 ps |
| CPU time | 1.34 seconds |
| Started | Aug 29 03:47:26 AM UTC 24 |
| Finished | Aug 29 03:47:28 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2534343818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 33.usbdev_disable_endpoint.2534343818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_disconnected.1033237386 |
| Short name | T2313 |
| Test name | |
| Test status | |
| Simulation time | 142164694 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 03:47:26 AM UTC 24 |
| Finished | Aug 29 03:47:28 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1033237386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_disconnected.1033237386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_enable.48599852 |
| Short name | T2314 |
| Test name | |
| Test status | |
| Simulation time | 42625718 ps |
| CPU time | 0.65 seconds |
| Started | Aug 29 03:47:26 AM UTC 24 |
| Finished | Aug 29 03:47:28 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=48599852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_enable.48599852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_endpoint_access.1444899011 |
| Short name | T2322 |
| Test name | |
| Test status | |
| Simulation time | 916045209 ps |
| CPU time | 2.32 seconds |
| Started | Aug 29 03:47:26 AM UTC 24 |
| Finished | Aug 29 03:47:29 AM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1444899011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_endpoint_access.1444899011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_endpoint_types.3450284249 |
| Short name | T2317 |
| Test name | |
| Test status | |
| Simulation time | 244582664 ps |
| CPU time | 1 seconds |
| Started | Aug 29 03:47:26 AM UTC 24 |
| Finished | Aug 29 03:47:28 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3450284249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_endpoint_types.3450284249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_fifo_levels.824612654 |
| Short name | T355 |
| Test name | |
| Test status | |
| Simulation time | 151886766 ps |
| CPU time | 0.95 seconds |
| Started | Aug 29 03:47:26 AM UTC 24 |
| Finished | Aug 29 03:47:28 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=824612654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_fifo_levels.824612654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_fifo_rst.4146644632 |
| Short name | T2323 |
| Test name | |
| Test status | |
| Simulation time | 438094484 ps |
| CPU time | 2.73 seconds |
| Started | Aug 29 03:47:26 AM UTC 24 |
| Finished | Aug 29 03:47:30 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4146644632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_fifo_rst.4146644632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_in_iso.4095218231 |
| Short name | T2341 |
| Test name | |
| Test status | |
| Simulation time | 245259671 ps |
| CPU time | 1.16 seconds |
| Started | Aug 29 03:48:02 AM UTC 24 |
| Finished | Aug 29 03:48:05 AM UTC 24 |
| Peak memory | 226852 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4095218231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 33.usbdev_in_iso.4095218231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_in_stall.1029646353 |
| Short name | T2337 |
| Test name | |
| Test status | |
| Simulation time | 133040697 ps |
| CPU time | 0.72 seconds |
| Started | Aug 29 03:48:03 AM UTC 24 |
| Finished | Aug 29 03:48:05 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1029646353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_in_stall.1029646353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_in_trans.2300297542 |
| Short name | T2338 |
| Test name | |
| Test status | |
| Simulation time | 258469696 ps |
| CPU time | 0.97 seconds |
| Started | Aug 29 03:48:03 AM UTC 24 |
| Finished | Aug 29 03:48:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2300297542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_in_trans.2300297542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_invalid_sync.2481119653 |
| Short name | T2387 |
| Test name | |
| Test status | |
| Simulation time | 4300848212 ps |
| CPU time | 38.31 seconds |
| Started | Aug 29 03:48:02 AM UTC 24 |
| Finished | Aug 29 03:48:43 AM UTC 24 |
| Peak memory | 229240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2481119653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 33.usbdev_invalid_sync.2481119653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_iso_retraction.1165960707 |
| Short name | T2468 |
| Test name | |
| Test status | |
| Simulation time | 8468350173 ps |
| CPU time | 82.93 seconds |
| Started | Aug 29 03:48:03 AM UTC 24 |
| Finished | Aug 29 03:49:28 AM UTC 24 |
| Peak memory | 217392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1165960707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_iso_retraction.1165960707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_link_in_err.4015488177 |
| Short name | T2339 |
| Test name | |
| Test status | |
| Simulation time | 189031945 ps |
| CPU time | 0.88 seconds |
| Started | Aug 29 03:48:03 AM UTC 24 |
| Finished | Aug 29 03:48:05 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4015488177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_link_in_err.4015488177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_link_resume.463378302 |
| Short name | T2424 |
| Test name | |
| Test status | |
| Simulation time | 29593774051 ps |
| CPU time | 41.49 seconds |
| Started | Aug 29 03:48:03 AM UTC 24 |
| Finished | Aug 29 03:48:46 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=463378302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_link_resume.463378302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_link_suspend.3526056326 |
| Short name | T2376 |
| Test name | |
| Test status | |
| Simulation time | 10834990857 ps |
| CPU time | 14.12 seconds |
| Started | Aug 29 03:48:03 AM UTC 24 |
| Finished | Aug 29 03:48:18 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3526056326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_link_suspend.3526056326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_low_speed_traffic.1496091432 |
| Short name | T2385 |
| Test name | |
| Test status | |
| Simulation time | 4617196156 ps |
| CPU time | 29.83 seconds |
| Started | Aug 29 03:48:03 AM UTC 24 |
| Finished | Aug 29 03:48:34 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1496091432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_low_speed_traffic.1496091432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_max_inter_pkt_delay.1489732562 |
| Short name | T2386 |
| Test name | |
| Test status | |
| Simulation time | 1503042147 ps |
| CPU time | 35.01 seconds |
| Started | Aug 29 03:48:03 AM UTC 24 |
| Finished | Aug 29 03:48:39 AM UTC 24 |
| Peak memory | 227228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1489732562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_max_inter_pkt_delay.1489732562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_max_length_in_transaction.1097071537 |
| Short name | T2344 |
| Test name | |
| Test status | |
| Simulation time | 250587979 ps |
| CPU time | 0.93 seconds |
| Started | Aug 29 03:48:03 AM UTC 24 |
| Finished | Aug 29 03:48:05 AM UTC 24 |
| Peak memory | 214628 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1097071537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 33.usbdev_max_length_in_transaction.1097071537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_max_length_out_transaction.4202605988 |
| Short name | T2349 |
| Test name | |
| Test status | |
| Simulation time | 200373292 ps |
| CPU time | 1.02 seconds |
| Started | Aug 29 03:48:03 AM UTC 24 |
| Finished | Aug 29 03:48:05 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4202605988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 33.usbdev_max_length_out_transaction.4202605988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_min_inter_pkt_delay.3669913786 |
| Short name | T2380 |
| Test name | |
| Test status | |
| Simulation time | 2063616578 ps |
| CPU time | 17.53 seconds |
| Started | Aug 29 03:48:03 AM UTC 24 |
| Finished | Aug 29 03:48:22 AM UTC 24 |
| Peak memory | 227424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3669913786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_min_inter_pkt_delay.3669913786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_min_length_in_transaction.1518087863 |
| Short name | T2345 |
| Test name | |
| Test status | |
| Simulation time | 162498663 ps |
| CPU time | 0.77 seconds |
| Started | Aug 29 03:48:03 AM UTC 24 |
| Finished | Aug 29 03:48:05 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1518087863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 33.usbdev_min_length_in_transaction.1518087863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_min_length_out_transaction.201980770 |
| Short name | T2342 |
| Test name | |
| Test status | |
| Simulation time | 149559377 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 03:48:03 AM UTC 24 |
| Finished | Aug 29 03:48:05 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=201980770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 33.usbdev_min_length_out_transaction.201980770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_nak_trans.1782080472 |
| Short name | T2346 |
| Test name | |
| Test status | |
| Simulation time | 211186242 ps |
| CPU time | 0.91 seconds |
| Started | Aug 29 03:48:03 AM UTC 24 |
| Finished | Aug 29 03:48:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1782080472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_nak_trans.1782080472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_out_iso.2113387275 |
| Short name | T2351 |
| Test name | |
| Test status | |
| Simulation time | 252598384 ps |
| CPU time | 0.88 seconds |
| Started | Aug 29 03:48:03 AM UTC 24 |
| Finished | Aug 29 03:48:05 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2113387275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 33.usbdev_out_iso.2113387275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_out_stall.2398224212 |
| Short name | T2356 |
| Test name | |
| Test status | |
| Simulation time | 163893664 ps |
| CPU time | 0.91 seconds |
| Started | Aug 29 03:48:03 AM UTC 24 |
| Finished | Aug 29 03:48:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2398224212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_out_stall.2398224212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_out_trans_nak.1059617195 |
| Short name | T2347 |
| Test name | |
| Test status | |
| Simulation time | 138432865 ps |
| CPU time | 0.74 seconds |
| Started | Aug 29 03:48:03 AM UTC 24 |
| Finished | Aug 29 03:48:05 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1059617195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 33.usbdev_out_trans_nak.1059617195 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_pending_in_trans.29040863 |
| Short name | T2350 |
| Test name | |
| Test status | |
| Simulation time | 165148061 ps |
| CPU time | 0.77 seconds |
| Started | Aug 29 03:48:03 AM UTC 24 |
| Finished | Aug 29 03:48:05 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=29040863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_pending_in_trans.29040863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_phy_config_pinflip.3075394270 |
| Short name | T2359 |
| Test name | |
| Test status | |
| Simulation time | 217669253 ps |
| CPU time | 0.94 seconds |
| Started | Aug 29 03:48:03 AM UTC 24 |
| Finished | Aug 29 03:48:05 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3075394270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 33.usbdev_phy_config_pinflip.3075394270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_phy_config_usb_ref_disable.2877052806 |
| Short name | T2354 |
| Test name | |
| Test status | |
| Simulation time | 150649218 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 03:48:03 AM UTC 24 |
| Finished | Aug 29 03:48:05 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2877052806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 33.usbdev_phy_config_usb_ref_disable.2877052806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_phy_pins_sense.3387911443 |
| Short name | T2353 |
| Test name | |
| Test status | |
| Simulation time | 79728847 ps |
| CPU time | 0.69 seconds |
| Started | Aug 29 03:48:03 AM UTC 24 |
| Finished | Aug 29 03:48:05 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3387911443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_phy_pins_sense.3387911443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_buffer.2721420957 |
| Short name | T2427 |
| Test name | |
| Test status | |
| Simulation time | 17069730808 ps |
| CPU time | 43.66 seconds |
| Started | Aug 29 03:48:03 AM UTC 24 |
| Finished | Aug 29 03:48:49 AM UTC 24 |
| Peak memory | 231568 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2721420957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_pkt_buffer.2721420957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_received.2449539187 |
| Short name | T2293 |
| Test name | |
| Test status | |
| Simulation time | 175929450 ps |
| CPU time | 0.88 seconds |
| Started | Aug 29 03:48:03 AM UTC 24 |
| Finished | Aug 29 03:48:06 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2449539187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_pkt_received.2449539187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_sent.2530955636 |
| Short name | T2355 |
| Test name | |
| Test status | |
| Simulation time | 178466082 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 03:48:03 AM UTC 24 |
| Finished | Aug 29 03:48:05 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2530955636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_pkt_sent.2530955636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_random_length_in_transaction.2327790276 |
| Short name | T2362 |
| Test name | |
| Test status | |
| Simulation time | 202624862 ps |
| CPU time | 0.97 seconds |
| Started | Aug 29 03:48:03 AM UTC 24 |
| Finished | Aug 29 03:48:06 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2327790276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 33.usbdev_random_length_in_transaction.2327790276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_random_length_out_transaction.687599609 |
| Short name | T2361 |
| Test name | |
| Test status | |
| Simulation time | 157805385 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 03:48:03 AM UTC 24 |
| Finished | Aug 29 03:48:06 AM UTC 24 |
| Peak memory | 214920 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=687599609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 33.usbdev_random_length_out_transaction.687599609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_rx_crc_err.4094368926 |
| Short name | T2363 |
| Test name | |
| Test status | |
| Simulation time | 163858359 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 03:48:03 AM UTC 24 |
| Finished | Aug 29 03:48:06 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4094368926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_rx_crc_err.4094368926 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_rx_full.1649338881 |
| Short name | T2369 |
| Test name | |
| Test status | |
| Simulation time | 384825682 ps |
| CPU time | 1.25 seconds |
| Started | Aug 29 03:48:03 AM UTC 24 |
| Finished | Aug 29 03:48:06 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1649338881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 33.usbdev_rx_full.1649338881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_setup_stage.2816892063 |
| Short name | T2360 |
| Test name | |
| Test status | |
| Simulation time | 153511713 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 03:48:03 AM UTC 24 |
| Finished | Aug 29 03:48:06 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2816892063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_setup_stage.2816892063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_setup_trans_ignored.3372738386 |
| Short name | T2357 |
| Test name | |
| Test status | |
| Simulation time | 156899755 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 03:48:03 AM UTC 24 |
| Finished | Aug 29 03:48:06 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3372738386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 33.usbdev_setup_trans_ignored.3372738386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_smoke.2099104513 |
| Short name | T2365 |
| Test name | |
| Test status | |
| Simulation time | 264575771 ps |
| CPU time | 1.03 seconds |
| Started | Aug 29 03:48:03 AM UTC 24 |
| Finished | Aug 29 03:48:06 AM UTC 24 |
| Peak memory | 217056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2099104513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_smoke.2099104513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_spurious_pids_ignored.3754884625 |
| Short name | T2383 |
| Test name | |
| Test status | |
| Simulation time | 3154282539 ps |
| CPU time | 25.66 seconds |
| Started | Aug 29 03:48:03 AM UTC 24 |
| Finished | Aug 29 03:48:31 AM UTC 24 |
| Peak memory | 229532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3754884625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 33.usbdev_spurious_pids_ignored.3754884625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_stall_priority_over_nak.3450999829 |
| Short name | T2364 |
| Test name | |
| Test status | |
| Simulation time | 161705408 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 03:48:03 AM UTC 24 |
| Finished | Aug 29 03:48:06 AM UTC 24 |
| Peak memory | 214960 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3450999829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_stall_priority_over_nak.3450999829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_stall_trans.4019492701 |
| Short name | T2366 |
| Test name | |
| Test status | |
| Simulation time | 202376553 ps |
| CPU time | 1.01 seconds |
| Started | Aug 29 03:48:03 AM UTC 24 |
| Finished | Aug 29 03:48:06 AM UTC 24 |
| Peak memory | 214956 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4019492701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_stall_trans.4019492701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_stream_len_max.2317479126 |
| Short name | T2373 |
| Test name | |
| Test status | |
| Simulation time | 842483624 ps |
| CPU time | 2.34 seconds |
| Started | Aug 29 03:48:04 AM UTC 24 |
| Finished | Aug 29 03:48:07 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2317479126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_stream_len_max.2317479126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_streaming_out.4256726780 |
| Short name | T2381 |
| Test name | |
| Test status | |
| Simulation time | 2513597397 ps |
| CPU time | 20.21 seconds |
| Started | Aug 29 03:48:03 AM UTC 24 |
| Finished | Aug 29 03:48:25 AM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4256726780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_streaming_out.4256726780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_timeout_missing_host_handshake.2331209685 |
| Short name | T2330 |
| Test name | |
| Test status | |
| Simulation time | 3148182406 ps |
| CPU time | 18.5 seconds |
| Started | Aug 29 03:47:26 AM UTC 24 |
| Finished | Aug 29 03:47:46 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2331209685 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_timeout_missing_host_handshake.2331209685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/33.usbdev_tx_rx_disruption.142692666 |
| Short name | T2370 |
| Test name | |
| Test status | |
| Simulation time | 643700793 ps |
| CPU time | 1.58 seconds |
| Started | Aug 29 03:48:04 AM UTC 24 |
| Finished | Aug 29 03:48:06 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=142692666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_tx _rx_disruption.142692666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/33.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/330.usbdev_tx_rx_disruption.2330038592 |
| Short name | T3648 |
| Test name | |
| Test status | |
| Simulation time | 632017112 ps |
| CPU time | 1.98 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:07 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2330038592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 330.usbdev_ tx_rx_disruption.2330038592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/330.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/331.usbdev_tx_rx_disruption.978263931 |
| Short name | T3643 |
| Test name | |
| Test status | |
| Simulation time | 481013209 ps |
| CPU time | 1.83 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:07 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=978263931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 331.usbdev_t x_rx_disruption.978263931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/331.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/332.usbdev_tx_rx_disruption.4055295135 |
| Short name | T3650 |
| Test name | |
| Test status | |
| Simulation time | 441123154 ps |
| CPU time | 1.98 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:07 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4055295135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 332.usbdev_ tx_rx_disruption.4055295135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/332.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/333.usbdev_tx_rx_disruption.4020842309 |
| Short name | T3649 |
| Test name | |
| Test status | |
| Simulation time | 489869229 ps |
| CPU time | 1.96 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:07 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4020842309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 333.usbdev_ tx_rx_disruption.4020842309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/333.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/334.usbdev_tx_rx_disruption.2671057131 |
| Short name | T3640 |
| Test name | |
| Test status | |
| Simulation time | 521820184 ps |
| CPU time | 1.58 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:07 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2671057131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 334.usbdev_ tx_rx_disruption.2671057131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/334.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/335.usbdev_tx_rx_disruption.428849368 |
| Short name | T3646 |
| Test name | |
| Test status | |
| Simulation time | 551615555 ps |
| CPU time | 1.79 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:07 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=428849368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 335.usbdev_t x_rx_disruption.428849368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/335.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/336.usbdev_tx_rx_disruption.3441899649 |
| Short name | T3645 |
| Test name | |
| Test status | |
| Simulation time | 508049446 ps |
| CPU time | 1.68 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:07 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3441899649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 336.usbdev_ tx_rx_disruption.3441899649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/336.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/337.usbdev_tx_rx_disruption.2849539056 |
| Short name | T207 |
| Test name | |
| Test status | |
| Simulation time | 552691953 ps |
| CPU time | 1.52 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:07 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2849539056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 337.usbdev_ tx_rx_disruption.2849539056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/337.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/338.usbdev_tx_rx_disruption.680449156 |
| Short name | T3659 |
| Test name | |
| Test status | |
| Simulation time | 560027090 ps |
| CPU time | 1.98 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:08 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=680449156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 338.usbdev_t x_rx_disruption.680449156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/338.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/339.usbdev_tx_rx_disruption.4087146343 |
| Short name | T3641 |
| Test name | |
| Test status | |
| Simulation time | 510600783 ps |
| CPU time | 1.4 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:07 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4087146343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 339.usbdev_ tx_rx_disruption.4087146343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/339.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_alert_test.2451044150 |
| Short name | T2412 |
| Test name | |
| Test status | |
| Simulation time | 33339883 ps |
| CPU time | 0.77 seconds |
| Started | Aug 29 03:48:42 AM UTC 24 |
| Finished | Aug 29 03:48:44 AM UTC 24 |
| Peak memory | 216996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2451044150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 34.usbdev_alert_test.2451044150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_disconnect.3086173696 |
| Short name | T2378 |
| Test name | |
| Test status | |
| Simulation time | 10728014477 ps |
| CPU time | 14.52 seconds |
| Started | Aug 29 03:48:04 AM UTC 24 |
| Finished | Aug 29 03:48:20 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3086173696 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_disconnect.3086173696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_reset.2266292895 |
| Short name | T2382 |
| Test name | |
| Test status | |
| Simulation time | 15708509299 ps |
| CPU time | 20.65 seconds |
| Started | Aug 29 03:48:04 AM UTC 24 |
| Finished | Aug 29 03:48:26 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2266292895 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_reset.2266292895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_resume.2453636124 |
| Short name | T2391 |
| Test name | |
| Test status | |
| Simulation time | 29475214266 ps |
| CPU time | 37.79 seconds |
| Started | Aug 29 03:48:04 AM UTC 24 |
| Finished | Aug 29 03:48:43 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2453636124 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_resume.2453636124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_av_buffer.473263854 |
| Short name | T2367 |
| Test name | |
| Test status | |
| Simulation time | 173644527 ps |
| CPU time | 0.95 seconds |
| Started | Aug 29 03:48:04 AM UTC 24 |
| Finished | Aug 29 03:48:06 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=473263854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_av_buffer.473263854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_bitstuff_err.3395401749 |
| Short name | T2368 |
| Test name | |
| Test status | |
| Simulation time | 174112113 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 03:48:04 AM UTC 24 |
| Finished | Aug 29 03:48:06 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3395401749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_bitstuff_err.3395401749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_data_toggle_clear.2779793988 |
| Short name | T2372 |
| Test name | |
| Test status | |
| Simulation time | 497711750 ps |
| CPU time | 1.53 seconds |
| Started | Aug 29 03:48:04 AM UTC 24 |
| Finished | Aug 29 03:48:07 AM UTC 24 |
| Peak memory | 214924 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2779793988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 34.usbdev_data_toggle_clear.2779793988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_data_toggle_restore.2568986900 |
| Short name | T2374 |
| Test name | |
| Test status | |
| Simulation time | 1069947990 ps |
| CPU time | 2.54 seconds |
| Started | Aug 29 03:48:04 AM UTC 24 |
| Finished | Aug 29 03:48:08 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2568986900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_data_toggle_restore.2568986900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_device_address.4019170413 |
| Short name | T2426 |
| Test name | |
| Test status | |
| Simulation time | 28435628769 ps |
| CPU time | 42.23 seconds |
| Started | Aug 29 03:48:04 AM UTC 24 |
| Finished | Aug 29 03:48:48 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4019170413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_device_address.4019170413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_device_timeout.2519461659 |
| Short name | T2377 |
| Test name | |
| Test status | |
| Simulation time | 2013441556 ps |
| CPU time | 14.18 seconds |
| Started | Aug 29 03:48:04 AM UTC 24 |
| Finished | Aug 29 03:48:20 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2519461659 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_device_timeout.2519461659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_disable_endpoint.3311500279 |
| Short name | T2371 |
| Test name | |
| Test status | |
| Simulation time | 457909928 ps |
| CPU time | 1.5 seconds |
| Started | Aug 29 03:48:04 AM UTC 24 |
| Finished | Aug 29 03:48:07 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3311500279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 34.usbdev_disable_endpoint.3311500279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_disconnected.1546958999 |
| Short name | T2390 |
| Test name | |
| Test status | |
| Simulation time | 167193168 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 03:48:41 AM UTC 24 |
| Finished | Aug 29 03:48:43 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1546958999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_disconnected.1546958999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_enable.2603307288 |
| Short name | T2388 |
| Test name | |
| Test status | |
| Simulation time | 43714945 ps |
| CPU time | 0.72 seconds |
| Started | Aug 29 03:48:41 AM UTC 24 |
| Finished | Aug 29 03:48:43 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2603307288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 34.usbdev_enable.2603307288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_endpoint_access.1478857951 |
| Short name | T2421 |
| Test name | |
| Test status | |
| Simulation time | 933280294 ps |
| CPU time | 2.47 seconds |
| Started | Aug 29 03:48:41 AM UTC 24 |
| Finished | Aug 29 03:48:45 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1478857951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_endpoint_access.1478857951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_endpoint_types.2365061727 |
| Short name | T497 |
| Test name | |
| Test status | |
| Simulation time | 650379351 ps |
| CPU time | 1.67 seconds |
| Started | Aug 29 03:48:41 AM UTC 24 |
| Finished | Aug 29 03:48:44 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2365061727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_endpoint_types.2365061727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_fifo_levels.3739062479 |
| Short name | T384 |
| Test name | |
| Test status | |
| Simulation time | 173568301 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 03:48:41 AM UTC 24 |
| Finished | Aug 29 03:48:43 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3739062479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_fifo_levels.3739062479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_fifo_rst.2907181804 |
| Short name | T2422 |
| Test name | |
| Test status | |
| Simulation time | 328117645 ps |
| CPU time | 2.41 seconds |
| Started | Aug 29 03:48:41 AM UTC 24 |
| Finished | Aug 29 03:48:45 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2907181804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_fifo_rst.2907181804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_in_iso.2553144003 |
| Short name | T2392 |
| Test name | |
| Test status | |
| Simulation time | 194646060 ps |
| CPU time | 0.98 seconds |
| Started | Aug 29 03:48:41 AM UTC 24 |
| Finished | Aug 29 03:48:43 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2553144003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 34.usbdev_in_iso.2553144003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_in_stall.1920257707 |
| Short name | T2395 |
| Test name | |
| Test status | |
| Simulation time | 153560676 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 03:48:41 AM UTC 24 |
| Finished | Aug 29 03:48:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1920257707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_in_stall.1920257707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_in_trans.1972927564 |
| Short name | T2394 |
| Test name | |
| Test status | |
| Simulation time | 241112567 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 03:48:41 AM UTC 24 |
| Finished | Aug 29 03:48:43 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1972927564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_in_trans.1972927564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_invalid_sync.120201984 |
| Short name | T2480 |
| Test name | |
| Test status | |
| Simulation time | 3157712820 ps |
| CPU time | 77.8 seconds |
| Started | Aug 29 03:48:41 AM UTC 24 |
| Finished | Aug 29 03:50:01 AM UTC 24 |
| Peak memory | 234440 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=120201984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 34.usbdev_invalid_sync.120201984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_iso_retraction.2146775640 |
| Short name | T2305 |
| Test name | |
| Test status | |
| Simulation time | 5199628349 ps |
| CPU time | 32.61 seconds |
| Started | Aug 29 03:48:41 AM UTC 24 |
| Finished | Aug 29 03:49:15 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2146775640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_iso_retraction.2146775640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_link_in_err.1705303554 |
| Short name | T2393 |
| Test name | |
| Test status | |
| Simulation time | 236120808 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 03:48:41 AM UTC 24 |
| Finished | Aug 29 03:48:43 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1705303554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_link_in_err.1705303554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_link_resume.1337131817 |
| Short name | T2389 |
| Test name | |
| Test status | |
| Simulation time | 23741884002 ps |
| CPU time | 30.69 seconds |
| Started | Aug 29 03:48:41 AM UTC 24 |
| Finished | Aug 29 03:49:13 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1337131817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_link_resume.1337131817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_link_suspend.1350871209 |
| Short name | T2429 |
| Test name | |
| Test status | |
| Simulation time | 5862608483 ps |
| CPU time | 8.52 seconds |
| Started | Aug 29 03:48:42 AM UTC 24 |
| Finished | Aug 29 03:48:51 AM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1350871209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_link_suspend.1350871209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_low_speed_traffic.2660703365 |
| Short name | T2155 |
| Test name | |
| Test status | |
| Simulation time | 4588111245 ps |
| CPU time | 31.58 seconds |
| Started | Aug 29 03:48:42 AM UTC 24 |
| Finished | Aug 29 03:49:15 AM UTC 24 |
| Peak memory | 229664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2660703365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_low_speed_traffic.2660703365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_max_inter_pkt_delay.1910923869 |
| Short name | T2472 |
| Test name | |
| Test status | |
| Simulation time | 2269905895 ps |
| CPU time | 54.23 seconds |
| Started | Aug 29 03:48:42 AM UTC 24 |
| Finished | Aug 29 03:49:37 AM UTC 24 |
| Peak memory | 227488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1910923869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_max_inter_pkt_delay.1910923869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_max_length_in_transaction.1396367609 |
| Short name | T2400 |
| Test name | |
| Test status | |
| Simulation time | 258751587 ps |
| CPU time | 1.14 seconds |
| Started | Aug 29 03:48:42 AM UTC 24 |
| Finished | Aug 29 03:48:44 AM UTC 24 |
| Peak memory | 214300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1396367609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 34.usbdev_max_length_in_transaction.1396367609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_max_length_out_transaction.3308070233 |
| Short name | T2399 |
| Test name | |
| Test status | |
| Simulation time | 276673550 ps |
| CPU time | 1.02 seconds |
| Started | Aug 29 03:48:42 AM UTC 24 |
| Finished | Aug 29 03:48:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3308070233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 34.usbdev_max_length_out_transaction.3308070233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_min_inter_pkt_delay.3301390939 |
| Short name | T2432 |
| Test name | |
| Test status | |
| Simulation time | 2510417278 ps |
| CPU time | 16.75 seconds |
| Started | Aug 29 03:48:42 AM UTC 24 |
| Finished | Aug 29 03:49:00 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3301390939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_min_inter_pkt_delay.3301390939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_min_length_in_transaction.3381270160 |
| Short name | T2398 |
| Test name | |
| Test status | |
| Simulation time | 161758050 ps |
| CPU time | 0.95 seconds |
| Started | Aug 29 03:48:42 AM UTC 24 |
| Finished | Aug 29 03:48:44 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3381270160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 34.usbdev_min_length_in_transaction.3381270160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_min_length_out_transaction.827404127 |
| Short name | T2396 |
| Test name | |
| Test status | |
| Simulation time | 141384190 ps |
| CPU time | 0.75 seconds |
| Started | Aug 29 03:48:42 AM UTC 24 |
| Finished | Aug 29 03:48:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=827404127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 34.usbdev_min_length_out_transaction.827404127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_nak_trans.332404019 |
| Short name | T135 |
| Test name | |
| Test status | |
| Simulation time | 237338167 ps |
| CPU time | 1.08 seconds |
| Started | Aug 29 03:48:42 AM UTC 24 |
| Finished | Aug 29 03:48:44 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=332404019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_nak_trans.332404019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_out_iso.1668575979 |
| Short name | T2401 |
| Test name | |
| Test status | |
| Simulation time | 210059090 ps |
| CPU time | 0.91 seconds |
| Started | Aug 29 03:48:42 AM UTC 24 |
| Finished | Aug 29 03:48:44 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1668575979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 34.usbdev_out_iso.1668575979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_out_stall.4125669039 |
| Short name | T2407 |
| Test name | |
| Test status | |
| Simulation time | 189428503 ps |
| CPU time | 1.07 seconds |
| Started | Aug 29 03:48:42 AM UTC 24 |
| Finished | Aug 29 03:48:44 AM UTC 24 |
| Peak memory | 215020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4125669039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_out_stall.4125669039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_out_trans_nak.2500803230 |
| Short name | T2410 |
| Test name | |
| Test status | |
| Simulation time | 243138283 ps |
| CPU time | 1.17 seconds |
| Started | Aug 29 03:48:42 AM UTC 24 |
| Finished | Aug 29 03:48:44 AM UTC 24 |
| Peak memory | 215024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2500803230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 34.usbdev_out_trans_nak.2500803230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_pending_in_trans.3729012971 |
| Short name | T2402 |
| Test name | |
| Test status | |
| Simulation time | 148905812 ps |
| CPU time | 0.97 seconds |
| Started | Aug 29 03:48:42 AM UTC 24 |
| Finished | Aug 29 03:48:44 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3729012971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 34.usbdev_pending_in_trans.3729012971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_phy_config_pinflip.1694261221 |
| Short name | T2409 |
| Test name | |
| Test status | |
| Simulation time | 231670690 ps |
| CPU time | 1.11 seconds |
| Started | Aug 29 03:48:42 AM UTC 24 |
| Finished | Aug 29 03:48:44 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1694261221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 34.usbdev_phy_config_pinflip.1694261221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_phy_config_usb_ref_disable.2048079868 |
| Short name | T2403 |
| Test name | |
| Test status | |
| Simulation time | 158323616 ps |
| CPU time | 0.92 seconds |
| Started | Aug 29 03:48:42 AM UTC 24 |
| Finished | Aug 29 03:48:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2048079868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 34.usbdev_phy_config_usb_ref_disable.2048079868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_phy_pins_sense.1135492271 |
| Short name | T2397 |
| Test name | |
| Test status | |
| Simulation time | 38762846 ps |
| CPU time | 0.64 seconds |
| Started | Aug 29 03:48:42 AM UTC 24 |
| Finished | Aug 29 03:48:44 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1135492271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_phy_pins_sense.1135492271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_buffer.2534432761 |
| Short name | T2340 |
| Test name | |
| Test status | |
| Simulation time | 12705606219 ps |
| CPU time | 30.03 seconds |
| Started | Aug 29 03:48:42 AM UTC 24 |
| Finished | Aug 29 03:49:14 AM UTC 24 |
| Peak memory | 227732 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2534432761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_pkt_buffer.2534432761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_received.2147000878 |
| Short name | T2404 |
| Test name | |
| Test status | |
| Simulation time | 190734153 ps |
| CPU time | 0.95 seconds |
| Started | Aug 29 03:48:42 AM UTC 24 |
| Finished | Aug 29 03:48:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2147000878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_pkt_received.2147000878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_sent.929611718 |
| Short name | T2415 |
| Test name | |
| Test status | |
| Simulation time | 235782788 ps |
| CPU time | 1.09 seconds |
| Started | Aug 29 03:48:42 AM UTC 24 |
| Finished | Aug 29 03:48:44 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=929611718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 34.usbdev_pkt_sent.929611718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_random_length_in_transaction.3937695488 |
| Short name | T2411 |
| Test name | |
| Test status | |
| Simulation time | 177174605 ps |
| CPU time | 1 seconds |
| Started | Aug 29 03:48:42 AM UTC 24 |
| Finished | Aug 29 03:48:44 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3937695488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 34.usbdev_random_length_in_transaction.3937695488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_random_length_out_transaction.1946360763 |
| Short name | T2413 |
| Test name | |
| Test status | |
| Simulation time | 198628880 ps |
| CPU time | 0.99 seconds |
| Started | Aug 29 03:48:42 AM UTC 24 |
| Finished | Aug 29 03:48:44 AM UTC 24 |
| Peak memory | 214952 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1946360763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 34.usbdev_random_length_out_transaction.1946360763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_rx_crc_err.4180568905 |
| Short name | T2408 |
| Test name | |
| Test status | |
| Simulation time | 154747099 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 03:48:42 AM UTC 24 |
| Finished | Aug 29 03:48:44 AM UTC 24 |
| Peak memory | 217140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4180568905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_rx_crc_err.4180568905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_rx_full.3012056717 |
| Short name | T2420 |
| Test name | |
| Test status | |
| Simulation time | 264451046 ps |
| CPU time | 1.27 seconds |
| Started | Aug 29 03:48:42 AM UTC 24 |
| Finished | Aug 29 03:48:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3012056717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 34.usbdev_rx_full.3012056717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_setup_stage.617564451 |
| Short name | T2414 |
| Test name | |
| Test status | |
| Simulation time | 196720800 ps |
| CPU time | 0.99 seconds |
| Started | Aug 29 03:48:42 AM UTC 24 |
| Finished | Aug 29 03:48:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=617564451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_setup_stage.617564451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_setup_trans_ignored.4001324825 |
| Short name | T2417 |
| Test name | |
| Test status | |
| Simulation time | 149322043 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 03:48:42 AM UTC 24 |
| Finished | Aug 29 03:48:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4001324825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 34.usbdev_setup_trans_ignored.4001324825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_smoke.3763127678 |
| Short name | T2419 |
| Test name | |
| Test status | |
| Simulation time | 215392229 ps |
| CPU time | 1.1 seconds |
| Started | Aug 29 03:48:42 AM UTC 24 |
| Finished | Aug 29 03:48:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3763127678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_smoke.3763127678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_spurious_pids_ignored.2234767176 |
| Short name | T2431 |
| Test name | |
| Test status | |
| Simulation time | 2221419201 ps |
| CPU time | 14.06 seconds |
| Started | Aug 29 03:48:42 AM UTC 24 |
| Finished | Aug 29 03:48:58 AM UTC 24 |
| Peak memory | 234104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2234767176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 34.usbdev_spurious_pids_ignored.2234767176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_stall_priority_over_nak.981010250 |
| Short name | T2416 |
| Test name | |
| Test status | |
| Simulation time | 195147794 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:48:42 AM UTC 24 |
| Finished | Aug 29 03:48:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=981010250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_stall_priority_over_nak.981010250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_stall_trans.953415097 |
| Short name | T2418 |
| Test name | |
| Test status | |
| Simulation time | 152438918 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 03:48:42 AM UTC 24 |
| Finished | Aug 29 03:48:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=953415097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_stall_trans.953415097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_stream_len_max.1053541260 |
| Short name | T2425 |
| Test name | |
| Test status | |
| Simulation time | 1267711915 ps |
| CPU time | 2.82 seconds |
| Started | Aug 29 03:48:42 AM UTC 24 |
| Finished | Aug 29 03:48:46 AM UTC 24 |
| Peak memory | 217264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1053541260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_stream_len_max.1053541260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_streaming_out.3336413039 |
| Short name | T2287 |
| Test name | |
| Test status | |
| Simulation time | 4457878916 ps |
| CPU time | 31.02 seconds |
| Started | Aug 29 03:48:42 AM UTC 24 |
| Finished | Aug 29 03:49:15 AM UTC 24 |
| Peak memory | 229144 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3336413039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_streaming_out.3336413039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_timeout_missing_host_handshake.2472951 |
| Short name | T2384 |
| Test name | |
| Test status | |
| Simulation time | 1309005250 ps |
| CPU time | 25.65 seconds |
| Started | Aug 29 03:48:04 AM UTC 24 |
| Finished | Aug 29 03:48:31 AM UTC 24 |
| Peak memory | 217188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2472951 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_timeout_missing_host_handshake.2472951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/34.usbdev_tx_rx_disruption.2747674247 |
| Short name | T2423 |
| Test name | |
| Test status | |
| Simulation time | 682975667 ps |
| CPU time | 1.8 seconds |
| Started | Aug 29 03:48:42 AM UTC 24 |
| Finished | Aug 29 03:48:45 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2747674247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_t x_rx_disruption.2747674247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/34.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/340.usbdev_tx_rx_disruption.3901753165 |
| Short name | T3644 |
| Test name | |
| Test status | |
| Simulation time | 562919629 ps |
| CPU time | 1.5 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:07 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3901753165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 340.usbdev_ tx_rx_disruption.3901753165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/340.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/341.usbdev_tx_rx_disruption.998591368 |
| Short name | T3666 |
| Test name | |
| Test status | |
| Simulation time | 553817119 ps |
| CPU time | 1.98 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:08 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=998591368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 341.usbdev_t x_rx_disruption.998591368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/341.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/342.usbdev_tx_rx_disruption.3077930827 |
| Short name | T3652 |
| Test name | |
| Test status | |
| Simulation time | 524261601 ps |
| CPU time | 1.73 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:07 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3077930827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 342.usbdev_ tx_rx_disruption.3077930827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/342.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/343.usbdev_tx_rx_disruption.2149942330 |
| Short name | T3655 |
| Test name | |
| Test status | |
| Simulation time | 564989146 ps |
| CPU time | 1.8 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:08 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2149942330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 343.usbdev_ tx_rx_disruption.2149942330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/343.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/344.usbdev_tx_rx_disruption.1484604731 |
| Short name | T3667 |
| Test name | |
| Test status | |
| Simulation time | 532343647 ps |
| CPU time | 1.96 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:08 AM UTC 24 |
| Peak memory | 216672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1484604731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 344.usbdev_ tx_rx_disruption.1484604731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/344.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/345.usbdev_tx_rx_disruption.994899627 |
| Short name | T3653 |
| Test name | |
| Test status | |
| Simulation time | 636059396 ps |
| CPU time | 1.71 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:07 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=994899627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 345.usbdev_t x_rx_disruption.994899627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/345.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/346.usbdev_tx_rx_disruption.2653303993 |
| Short name | T3642 |
| Test name | |
| Test status | |
| Simulation time | 534042520 ps |
| CPU time | 1.45 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:07 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2653303993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 346.usbdev_ tx_rx_disruption.2653303993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/346.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/347.usbdev_tx_rx_disruption.110661349 |
| Short name | T3651 |
| Test name | |
| Test status | |
| Simulation time | 479091096 ps |
| CPU time | 1.69 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:07 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=110661349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 347.usbdev_t x_rx_disruption.110661349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/347.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/348.usbdev_tx_rx_disruption.2788671454 |
| Short name | T3621 |
| Test name | |
| Test status | |
| Simulation time | 746848640 ps |
| CPU time | 2.07 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:08 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2788671454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 348.usbdev_ tx_rx_disruption.2788671454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/348.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/349.usbdev_tx_rx_disruption.2887572716 |
| Short name | T3654 |
| Test name | |
| Test status | |
| Simulation time | 578814621 ps |
| CPU time | 1.74 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:08 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2887572716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 349.usbdev_ tx_rx_disruption.2887572716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/349.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_alert_test.651005897 |
| Short name | T2484 |
| Test name | |
| Test status | |
| Simulation time | 39846391 ps |
| CPU time | 0.57 seconds |
| Started | Aug 29 03:50:06 AM UTC 24 |
| Finished | Aug 29 03:50:07 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=651005897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 35.usbdev_alert_test.651005897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_disconnect.331634656 |
| Short name | T2430 |
| Test name | |
| Test status | |
| Simulation time | 6521786560 ps |
| CPU time | 8.99 seconds |
| Started | Aug 29 03:48:42 AM UTC 24 |
| Finished | Aug 29 03:48:53 AM UTC 24 |
| Peak memory | 227480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=331634656 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_disconnect.331634656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_reset.2794698506 |
| Short name | T2433 |
| Test name | |
| Test status | |
| Simulation time | 14692334551 ps |
| CPU time | 18.71 seconds |
| Started | Aug 29 03:48:43 AM UTC 24 |
| Finished | Aug 29 03:49:03 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2794698506 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_reset.2794698506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_resume.935522129 |
| Short name | T2406 |
| Test name | |
| Test status | |
| Simulation time | 24585580545 ps |
| CPU time | 27.57 seconds |
| Started | Aug 29 03:48:43 AM UTC 24 |
| Finished | Aug 29 03:49:11 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=935522129 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_resume.935522129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_av_buffer.1821429158 |
| Short name | T2343 |
| Test name | |
| Test status | |
| Simulation time | 234241071 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 03:49:21 AM UTC 24 |
| Finished | Aug 29 03:49:23 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1821429158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_av_buffer.1821429158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_bitstuff_err.3756227916 |
| Short name | T2310 |
| Test name | |
| Test status | |
| Simulation time | 167149370 ps |
| CPU time | 0.74 seconds |
| Started | Aug 29 03:49:21 AM UTC 24 |
| Finished | Aug 29 03:49:23 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3756227916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_bitstuff_err.3756227916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_data_toggle_clear.3754350181 |
| Short name | T2437 |
| Test name | |
| Test status | |
| Simulation time | 412543637 ps |
| CPU time | 1.31 seconds |
| Started | Aug 29 03:49:21 AM UTC 24 |
| Finished | Aug 29 03:49:24 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3754350181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 35.usbdev_data_toggle_clear.3754350181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_data_toggle_restore.688976532 |
| Short name | T2448 |
| Test name | |
| Test status | |
| Simulation time | 696868167 ps |
| CPU time | 2.25 seconds |
| Started | Aug 29 03:49:21 AM UTC 24 |
| Finished | Aug 29 03:49:25 AM UTC 24 |
| Peak memory | 217188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=688976532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_data_toggle_restore.688976532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_device_address.3511813300 |
| Short name | T2520 |
| Test name | |
| Test status | |
| Simulation time | 29591146021 ps |
| CPU time | 47.41 seconds |
| Started | Aug 29 03:49:21 AM UTC 24 |
| Finished | Aug 29 03:50:10 AM UTC 24 |
| Peak memory | 217392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3511813300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_device_address.3511813300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_device_timeout.1509625659 |
| Short name | T2482 |
| Test name | |
| Test status | |
| Simulation time | 7037482150 ps |
| CPU time | 40.79 seconds |
| Started | Aug 29 03:49:21 AM UTC 24 |
| Finished | Aug 29 03:50:04 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1509625659 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_device_timeout.1509625659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_disable_endpoint.2655311615 |
| Short name | T2447 |
| Test name | |
| Test status | |
| Simulation time | 808809171 ps |
| CPU time | 1.97 seconds |
| Started | Aug 29 03:49:21 AM UTC 24 |
| Finished | Aug 29 03:49:24 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2655311615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 35.usbdev_disable_endpoint.2655311615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_disconnected.1824046975 |
| Short name | T2358 |
| Test name | |
| Test status | |
| Simulation time | 135793295 ps |
| CPU time | 0.77 seconds |
| Started | Aug 29 03:49:21 AM UTC 24 |
| Finished | Aug 29 03:49:23 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1824046975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_disconnected.1824046975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_enable.4011544437 |
| Short name | T2405 |
| Test name | |
| Test status | |
| Simulation time | 58102728 ps |
| CPU time | 0.63 seconds |
| Started | Aug 29 03:49:21 AM UTC 24 |
| Finished | Aug 29 03:49:23 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4011544437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 35.usbdev_enable.4011544437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_endpoint_access.968225218 |
| Short name | T2454 |
| Test name | |
| Test status | |
| Simulation time | 766854638 ps |
| CPU time | 2 seconds |
| Started | Aug 29 03:49:21 AM UTC 24 |
| Finished | Aug 29 03:49:25 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=968225218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_endpoint_access.968225218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_fifo_levels.1939965871 |
| Short name | T371 |
| Test name | |
| Test status | |
| Simulation time | 316568603 ps |
| CPU time | 1.2 seconds |
| Started | Aug 29 03:49:22 AM UTC 24 |
| Finished | Aug 29 03:49:24 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1939965871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_fifo_levels.1939965871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_fifo_rst.83143023 |
| Short name | T2466 |
| Test name | |
| Test status | |
| Simulation time | 403680079 ps |
| CPU time | 2.29 seconds |
| Started | Aug 29 03:49:22 AM UTC 24 |
| Finished | Aug 29 03:49:25 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=83143023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 35.usbdev_fifo_rst.83143023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_in_iso.3480596857 |
| Short name | T2438 |
| Test name | |
| Test status | |
| Simulation time | 165647844 ps |
| CPU time | 0.92 seconds |
| Started | Aug 29 03:49:22 AM UTC 24 |
| Finished | Aug 29 03:49:24 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3480596857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 35.usbdev_in_iso.3480596857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_in_stall.861614710 |
| Short name | T2436 |
| Test name | |
| Test status | |
| Simulation time | 146403714 ps |
| CPU time | 0.74 seconds |
| Started | Aug 29 03:49:22 AM UTC 24 |
| Finished | Aug 29 03:49:24 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=861614710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 35.usbdev_in_stall.861614710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_in_trans.1414743997 |
| Short name | T2439 |
| Test name | |
| Test status | |
| Simulation time | 190387438 ps |
| CPU time | 0.95 seconds |
| Started | Aug 29 03:49:22 AM UTC 24 |
| Finished | Aug 29 03:49:24 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1414743997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_in_trans.1414743997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_invalid_sync.1751579345 |
| Short name | T2477 |
| Test name | |
| Test status | |
| Simulation time | 3426230592 ps |
| CPU time | 23.85 seconds |
| Started | Aug 29 03:49:22 AM UTC 24 |
| Finished | Aug 29 03:49:47 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1751579345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 35.usbdev_invalid_sync.1751579345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_iso_retraction.2914349028 |
| Short name | T2481 |
| Test name | |
| Test status | |
| Simulation time | 5627838332 ps |
| CPU time | 37.79 seconds |
| Started | Aug 29 03:49:22 AM UTC 24 |
| Finished | Aug 29 03:50:01 AM UTC 24 |
| Peak memory | 216884 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2914349028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_iso_retraction.2914349028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_link_in_err.327144554 |
| Short name | T2348 |
| Test name | |
| Test status | |
| Simulation time | 189970038 ps |
| CPU time | 0.82 seconds |
| Started | Aug 29 03:49:22 AM UTC 24 |
| Finished | Aug 29 03:49:24 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=327144554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 35.usbdev_link_in_err.327144554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_link_resume.1950038306 |
| Short name | T2471 |
| Test name | |
| Test status | |
| Simulation time | 7486042164 ps |
| CPU time | 10.23 seconds |
| Started | Aug 29 03:49:22 AM UTC 24 |
| Finished | Aug 29 03:49:33 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1950038306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_link_resume.1950038306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_link_suspend.721678366 |
| Short name | T2470 |
| Test name | |
| Test status | |
| Simulation time | 6356641593 ps |
| CPU time | 8.98 seconds |
| Started | Aug 29 03:49:22 AM UTC 24 |
| Finished | Aug 29 03:49:32 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=721678366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_link_suspend.721678366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_low_speed_traffic.305255796 |
| Short name | T2479 |
| Test name | |
| Test status | |
| Simulation time | 3285296904 ps |
| CPU time | 28.34 seconds |
| Started | Aug 29 03:49:22 AM UTC 24 |
| Finished | Aug 29 03:49:52 AM UTC 24 |
| Peak memory | 228964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=305255796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_low_speed_traffic.305255796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_max_inter_pkt_delay.3377226993 |
| Short name | T2473 |
| Test name | |
| Test status | |
| Simulation time | 2215826143 ps |
| CPU time | 14.65 seconds |
| Started | Aug 29 03:49:22 AM UTC 24 |
| Finished | Aug 29 03:49:38 AM UTC 24 |
| Peak memory | 227556 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3377226993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_max_inter_pkt_delay.3377226993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_max_length_in_transaction.510774603 |
| Short name | T2442 |
| Test name | |
| Test status | |
| Simulation time | 265417113 ps |
| CPU time | 1.09 seconds |
| Started | Aug 29 03:49:22 AM UTC 24 |
| Finished | Aug 29 03:49:24 AM UTC 24 |
| Peak memory | 215984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=510774603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 35.usbdev_max_length_in_transaction.510774603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_max_length_out_transaction.1119986204 |
| Short name | T2446 |
| Test name | |
| Test status | |
| Simulation time | 213461304 ps |
| CPU time | 1.03 seconds |
| Started | Aug 29 03:49:22 AM UTC 24 |
| Finished | Aug 29 03:49:24 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1119986204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 35.usbdev_max_length_out_transaction.1119986204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_min_inter_pkt_delay.1664902517 |
| Short name | T2474 |
| Test name | |
| Test status | |
| Simulation time | 1701535073 ps |
| CPU time | 14.51 seconds |
| Started | Aug 29 03:49:22 AM UTC 24 |
| Finished | Aug 29 03:49:38 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1664902517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_min_inter_pkt_delay.1664902517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_min_length_in_transaction.598980574 |
| Short name | T2440 |
| Test name | |
| Test status | |
| Simulation time | 155717140 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 03:49:22 AM UTC 24 |
| Finished | Aug 29 03:49:24 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=598980574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 35.usbdev_min_length_in_transaction.598980574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_min_length_out_transaction.506812711 |
| Short name | T2450 |
| Test name | |
| Test status | |
| Simulation time | 163614516 ps |
| CPU time | 1.02 seconds |
| Started | Aug 29 03:49:22 AM UTC 24 |
| Finished | Aug 29 03:49:25 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=506812711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 35.usbdev_min_length_out_transaction.506812711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_nak_trans.1509861476 |
| Short name | T144 |
| Test name | |
| Test status | |
| Simulation time | 220027852 ps |
| CPU time | 1.05 seconds |
| Started | Aug 29 03:49:22 AM UTC 24 |
| Finished | Aug 29 03:49:25 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1509861476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_nak_trans.1509861476 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_out_iso.373055200 |
| Short name | T2441 |
| Test name | |
| Test status | |
| Simulation time | 212839366 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 03:49:22 AM UTC 24 |
| Finished | Aug 29 03:49:24 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=373055200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 35.usbdev_out_iso.373055200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_out_stall.2116888342 |
| Short name | T2445 |
| Test name | |
| Test status | |
| Simulation time | 206441484 ps |
| CPU time | 0.82 seconds |
| Started | Aug 29 03:49:22 AM UTC 24 |
| Finished | Aug 29 03:49:24 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2116888342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_out_stall.2116888342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_out_trans_nak.3168767257 |
| Short name | T2444 |
| Test name | |
| Test status | |
| Simulation time | 185849753 ps |
| CPU time | 0.76 seconds |
| Started | Aug 29 03:49:22 AM UTC 24 |
| Finished | Aug 29 03:49:24 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3168767257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 35.usbdev_out_trans_nak.3168767257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_pending_in_trans.120416657 |
| Short name | T2451 |
| Test name | |
| Test status | |
| Simulation time | 157199174 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 03:49:22 AM UTC 24 |
| Finished | Aug 29 03:49:25 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=120416657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_pending_in_trans.120416657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_phy_config_pinflip.3465814360 |
| Short name | T2464 |
| Test name | |
| Test status | |
| Simulation time | 237440557 ps |
| CPU time | 1.26 seconds |
| Started | Aug 29 03:49:22 AM UTC 24 |
| Finished | Aug 29 03:49:25 AM UTC 24 |
| Peak memory | 214920 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3465814360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 35.usbdev_phy_config_pinflip.3465814360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_phy_config_usb_ref_disable.486958592 |
| Short name | T2462 |
| Test name | |
| Test status | |
| Simulation time | 146115837 ps |
| CPU time | 1.18 seconds |
| Started | Aug 29 03:49:22 AM UTC 24 |
| Finished | Aug 29 03:49:25 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=486958592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 35.usbdev_phy_config_usb_ref_disable.486958592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_phy_pins_sense.751990762 |
| Short name | T2452 |
| Test name | |
| Test status | |
| Simulation time | 39143626 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 03:49:22 AM UTC 24 |
| Finished | Aug 29 03:49:25 AM UTC 24 |
| Peak memory | 214892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=751990762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 35.usbdev_phy_pins_sense.751990762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_buffer.403372021 |
| Short name | T2478 |
| Test name | |
| Test status | |
| Simulation time | 9907098690 ps |
| CPU time | 26.71 seconds |
| Started | Aug 29 03:49:22 AM UTC 24 |
| Finished | Aug 29 03:49:51 AM UTC 24 |
| Peak memory | 227724 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=403372021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_pkt_buffer.403372021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_received.2516927817 |
| Short name | T2455 |
| Test name | |
| Test status | |
| Simulation time | 163305291 ps |
| CPU time | 0.97 seconds |
| Started | Aug 29 03:49:22 AM UTC 24 |
| Finished | Aug 29 03:49:25 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2516927817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_pkt_received.2516927817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_sent.4271147734 |
| Short name | T2449 |
| Test name | |
| Test status | |
| Simulation time | 174514799 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 03:49:22 AM UTC 24 |
| Finished | Aug 29 03:49:25 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4271147734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_pkt_sent.4271147734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_random_length_in_transaction.3646189878 |
| Short name | T2456 |
| Test name | |
| Test status | |
| Simulation time | 193611399 ps |
| CPU time | 0.9 seconds |
| Started | Aug 29 03:49:22 AM UTC 24 |
| Finished | Aug 29 03:49:25 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3646189878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 35.usbdev_random_length_in_transaction.3646189878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_random_length_out_transaction.1465018606 |
| Short name | T2461 |
| Test name | |
| Test status | |
| Simulation time | 221976538 ps |
| CPU time | 1.06 seconds |
| Started | Aug 29 03:49:22 AM UTC 24 |
| Finished | Aug 29 03:49:25 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1465018606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 35.usbdev_random_length_out_transaction.1465018606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_rx_crc_err.2564027506 |
| Short name | T2458 |
| Test name | |
| Test status | |
| Simulation time | 178057996 ps |
| CPU time | 0.97 seconds |
| Started | Aug 29 03:49:22 AM UTC 24 |
| Finished | Aug 29 03:49:25 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2564027506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 35.usbdev_rx_crc_err.2564027506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_rx_full.1893769933 |
| Short name | T2460 |
| Test name | |
| Test status | |
| Simulation time | 331922979 ps |
| CPU time | 1.14 seconds |
| Started | Aug 29 03:49:22 AM UTC 24 |
| Finished | Aug 29 03:49:25 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1893769933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 35.usbdev_rx_full.1893769933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_setup_stage.1645027308 |
| Short name | T2457 |
| Test name | |
| Test status | |
| Simulation time | 165354418 ps |
| CPU time | 1.01 seconds |
| Started | Aug 29 03:49:22 AM UTC 24 |
| Finished | Aug 29 03:49:25 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1645027308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_setup_stage.1645027308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_setup_trans_ignored.2573670286 |
| Short name | T2453 |
| Test name | |
| Test status | |
| Simulation time | 155845747 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 03:49:22 AM UTC 24 |
| Finished | Aug 29 03:49:25 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2573670286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 35.usbdev_setup_trans_ignored.2573670286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_smoke.3922817211 |
| Short name | T2463 |
| Test name | |
| Test status | |
| Simulation time | 203013516 ps |
| CPU time | 1.04 seconds |
| Started | Aug 29 03:49:22 AM UTC 24 |
| Finished | Aug 29 03:49:25 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3922817211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_smoke.3922817211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_spurious_pids_ignored.15398248 |
| Short name | T2476 |
| Test name | |
| Test status | |
| Simulation time | 2999841739 ps |
| CPU time | 20.33 seconds |
| Started | Aug 29 03:49:22 AM UTC 24 |
| Finished | Aug 29 03:49:44 AM UTC 24 |
| Peak memory | 227560 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=15398248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_ traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 35.usbdev_spurious_pids_ignored.15398248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_stall_priority_over_nak.371687423 |
| Short name | T2459 |
| Test name | |
| Test status | |
| Simulation time | 176557605 ps |
| CPU time | 0.97 seconds |
| Started | Aug 29 03:49:23 AM UTC 24 |
| Finished | Aug 29 03:49:25 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=371687423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_stall_priority_over_nak.371687423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_stall_trans.1037323964 |
| Short name | T2465 |
| Test name | |
| Test status | |
| Simulation time | 209213918 ps |
| CPU time | 1.02 seconds |
| Started | Aug 29 03:49:23 AM UTC 24 |
| Finished | Aug 29 03:49:25 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1037323964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_stall_trans.1037323964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_stream_len_max.3830135811 |
| Short name | T2467 |
| Test name | |
| Test status | |
| Simulation time | 1233556944 ps |
| CPU time | 3.08 seconds |
| Started | Aug 29 03:49:23 AM UTC 24 |
| Finished | Aug 29 03:49:27 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3830135811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_stream_len_max.3830135811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_streaming_out.1836984716 |
| Short name | T2475 |
| Test name | |
| Test status | |
| Simulation time | 2953739312 ps |
| CPU time | 19.19 seconds |
| Started | Aug 29 03:49:23 AM UTC 24 |
| Finished | Aug 29 03:49:43 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1836984716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_streaming_out.1836984716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_timeout_missing_host_handshake.2925137516 |
| Short name | T2469 |
| Test name | |
| Test status | |
| Simulation time | 1048732498 ps |
| CPU time | 7.98 seconds |
| Started | Aug 29 03:49:21 AM UTC 24 |
| Finished | Aug 29 03:49:31 AM UTC 24 |
| Peak memory | 217316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2925137516 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_timeout_missing_host_handshake.2925137516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/35.usbdev_tx_rx_disruption.4248772543 |
| Short name | T2490 |
| Test name | |
| Test status | |
| Simulation time | 584163904 ps |
| CPU time | 1.58 seconds |
| Started | Aug 29 03:50:06 AM UTC 24 |
| Finished | Aug 29 03:50:08 AM UTC 24 |
| Peak memory | 214480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4248772543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_t x_rx_disruption.4248772543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/35.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/350.usbdev_tx_rx_disruption.3810482376 |
| Short name | T3668 |
| Test name | |
| Test status | |
| Simulation time | 484336987 ps |
| CPU time | 1.94 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:08 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3810482376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 350.usbdev_ tx_rx_disruption.3810482376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/350.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/351.usbdev_tx_rx_disruption.3072241660 |
| Short name | T3613 |
| Test name | |
| Test status | |
| Simulation time | 591391284 ps |
| CPU time | 2.13 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:08 AM UTC 24 |
| Peak memory | 216752 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3072241660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 351.usbdev_ tx_rx_disruption.3072241660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/351.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/352.usbdev_tx_rx_disruption.4093741386 |
| Short name | T3634 |
| Test name | |
| Test status | |
| Simulation time | 525352122 ps |
| CPU time | 1.82 seconds |
| Started | Aug 29 04:13:04 AM UTC 24 |
| Finished | Aug 29 04:13:08 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4093741386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 352.usbdev_ tx_rx_disruption.4093741386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/352.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/353.usbdev_tx_rx_disruption.4060429058 |
| Short name | T3647 |
| Test name | |
| Test status | |
| Simulation time | 534777410 ps |
| CPU time | 1.4 seconds |
| Started | Aug 29 04:13:05 AM UTC 24 |
| Finished | Aug 29 04:13:07 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4060429058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 353.usbdev_ tx_rx_disruption.4060429058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/353.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/354.usbdev_tx_rx_disruption.3027201794 |
| Short name | T3627 |
| Test name | |
| Test status | |
| Simulation time | 655756299 ps |
| CPU time | 1.86 seconds |
| Started | Aug 29 04:13:05 AM UTC 24 |
| Finished | Aug 29 04:13:08 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3027201794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 354.usbdev_ tx_rx_disruption.3027201794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/354.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/355.usbdev_tx_rx_disruption.2437050802 |
| Short name | T3665 |
| Test name | |
| Test status | |
| Simulation time | 585571774 ps |
| CPU time | 1.7 seconds |
| Started | Aug 29 04:13:05 AM UTC 24 |
| Finished | Aug 29 04:13:08 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2437050802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 355.usbdev_ tx_rx_disruption.2437050802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/355.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/356.usbdev_tx_rx_disruption.2393722437 |
| Short name | T3638 |
| Test name | |
| Test status | |
| Simulation time | 606124111 ps |
| CPU time | 2.03 seconds |
| Started | Aug 29 04:13:05 AM UTC 24 |
| Finished | Aug 29 04:13:08 AM UTC 24 |
| Peak memory | 217036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2393722437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 356.usbdev_ tx_rx_disruption.2393722437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/356.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/357.usbdev_tx_rx_disruption.597444465 |
| Short name | T3660 |
| Test name | |
| Test status | |
| Simulation time | 533176857 ps |
| CPU time | 1.48 seconds |
| Started | Aug 29 04:13:05 AM UTC 24 |
| Finished | Aug 29 04:13:08 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=597444465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 357.usbdev_t x_rx_disruption.597444465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/357.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/358.usbdev_tx_rx_disruption.2664358156 |
| Short name | T3657 |
| Test name | |
| Test status | |
| Simulation time | 568600491 ps |
| CPU time | 1.6 seconds |
| Started | Aug 29 04:13:05 AM UTC 24 |
| Finished | Aug 29 04:13:08 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2664358156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 358.usbdev_ tx_rx_disruption.2664358156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/358.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/359.usbdev_tx_rx_disruption.3694441543 |
| Short name | T3615 |
| Test name | |
| Test status | |
| Simulation time | 550838408 ps |
| CPU time | 1.83 seconds |
| Started | Aug 29 04:13:05 AM UTC 24 |
| Finished | Aug 29 04:13:08 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3694441543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 359.usbdev_ tx_rx_disruption.3694441543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/359.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_alert_test.3125230309 |
| Short name | T2531 |
| Test name | |
| Test status | |
| Simulation time | 55662815 ps |
| CPU time | 0.62 seconds |
| Started | Aug 29 03:50:48 AM UTC 24 |
| Finished | Aug 29 03:50:50 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3125230309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 36.usbdev_alert_test.3125230309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_disconnect.717081681 |
| Short name | T2523 |
| Test name | |
| Test status | |
| Simulation time | 10611312294 ps |
| CPU time | 13.73 seconds |
| Started | Aug 29 03:50:06 AM UTC 24 |
| Finished | Aug 29 03:50:21 AM UTC 24 |
| Peak memory | 217464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=717081681 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_disconnect.717081681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_reset.1241053197 |
| Short name | T2526 |
| Test name | |
| Test status | |
| Simulation time | 14224929914 ps |
| CPU time | 16.01 seconds |
| Started | Aug 29 03:50:06 AM UTC 24 |
| Finished | Aug 29 03:50:23 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1241053197 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_reset.1241053197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_resume.2601055885 |
| Short name | T2530 |
| Test name | |
| Test status | |
| Simulation time | 31442191893 ps |
| CPU time | 39.89 seconds |
| Started | Aug 29 03:50:06 AM UTC 24 |
| Finished | Aug 29 03:50:47 AM UTC 24 |
| Peak memory | 217528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2601055885 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_resume.2601055885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_av_buffer.3966542768 |
| Short name | T2485 |
| Test name | |
| Test status | |
| Simulation time | 210218100 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 03:50:06 AM UTC 24 |
| Finished | Aug 29 03:50:08 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3966542768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_av_buffer.3966542768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_bitstuff_err.1246917707 |
| Short name | T2483 |
| Test name | |
| Test status | |
| Simulation time | 139824078 ps |
| CPU time | 0.71 seconds |
| Started | Aug 29 03:50:06 AM UTC 24 |
| Finished | Aug 29 03:50:07 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1246917707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_bitstuff_err.1246917707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_data_toggle_clear.3450856333 |
| Short name | T2488 |
| Test name | |
| Test status | |
| Simulation time | 210550024 ps |
| CPU time | 1.05 seconds |
| Started | Aug 29 03:50:06 AM UTC 24 |
| Finished | Aug 29 03:50:08 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3450856333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 36.usbdev_data_toggle_clear.3450856333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_data_toggle_restore.2125421243 |
| Short name | T2519 |
| Test name | |
| Test status | |
| Simulation time | 1241887744 ps |
| CPU time | 3.26 seconds |
| Started | Aug 29 03:50:06 AM UTC 24 |
| Finished | Aug 29 03:50:10 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2125421243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_data_toggle_restore.2125421243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_device_address.165563769 |
| Short name | T615 |
| Test name | |
| Test status | |
| Simulation time | 42980062773 ps |
| CPU time | 68.69 seconds |
| Started | Aug 29 03:50:06 AM UTC 24 |
| Finished | Aug 29 03:51:16 AM UTC 24 |
| Peak memory | 217392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=165563769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 36.usbdev_device_address.165563769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_device_timeout.4039590971 |
| Short name | T2522 |
| Test name | |
| Test status | |
| Simulation time | 770736536 ps |
| CPU time | 13.18 seconds |
| Started | Aug 29 03:50:06 AM UTC 24 |
| Finished | Aug 29 03:50:20 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4039590971 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_device_timeout.4039590971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_disable_endpoint.2266888750 |
| Short name | T2516 |
| Test name | |
| Test status | |
| Simulation time | 1156690796 ps |
| CPU time | 2.25 seconds |
| Started | Aug 29 03:50:06 AM UTC 24 |
| Finished | Aug 29 03:50:09 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2266888750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 36.usbdev_disable_endpoint.2266888750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_disconnected.1449526738 |
| Short name | T2487 |
| Test name | |
| Test status | |
| Simulation time | 133852788 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 03:50:06 AM UTC 24 |
| Finished | Aug 29 03:50:08 AM UTC 24 |
| Peak memory | 214624 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1449526738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_disconnected.1449526738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_enable.2475931701 |
| Short name | T2486 |
| Test name | |
| Test status | |
| Simulation time | 53430351 ps |
| CPU time | 0.64 seconds |
| Started | Aug 29 03:50:06 AM UTC 24 |
| Finished | Aug 29 03:50:08 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2475931701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 36.usbdev_enable.2475931701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_endpoint_access.761198274 |
| Short name | T2518 |
| Test name | |
| Test status | |
| Simulation time | 980172406 ps |
| CPU time | 2.41 seconds |
| Started | Aug 29 03:50:06 AM UTC 24 |
| Finished | Aug 29 03:50:10 AM UTC 24 |
| Peak memory | 217152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=761198274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_endpoint_access.761198274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_endpoint_types.1251597783 |
| Short name | T438 |
| Test name | |
| Test status | |
| Simulation time | 560924730 ps |
| CPU time | 1.53 seconds |
| Started | Aug 29 03:50:06 AM UTC 24 |
| Finished | Aug 29 03:50:09 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1251597783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_endpoint_types.1251597783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_fifo_levels.1343280485 |
| Short name | T343 |
| Test name | |
| Test status | |
| Simulation time | 257330500 ps |
| CPU time | 1.05 seconds |
| Started | Aug 29 03:50:06 AM UTC 24 |
| Finished | Aug 29 03:50:08 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1343280485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_fifo_levels.1343280485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_fifo_rst.2151680757 |
| Short name | T2443 |
| Test name | |
| Test status | |
| Simulation time | 270049007 ps |
| CPU time | 1.48 seconds |
| Started | Aug 29 03:50:06 AM UTC 24 |
| Finished | Aug 29 03:50:09 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2151680757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_fifo_rst.2151680757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_in_iso.2024972874 |
| Short name | T2495 |
| Test name | |
| Test status | |
| Simulation time | 245643959 ps |
| CPU time | 1.08 seconds |
| Started | Aug 29 03:50:06 AM UTC 24 |
| Finished | Aug 29 03:50:08 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2024972874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 36.usbdev_in_iso.2024972874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_in_stall.2288662575 |
| Short name | T2494 |
| Test name | |
| Test status | |
| Simulation time | 178004110 ps |
| CPU time | 0.97 seconds |
| Started | Aug 29 03:50:06 AM UTC 24 |
| Finished | Aug 29 03:50:08 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2288662575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_in_stall.2288662575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_in_trans.2172743230 |
| Short name | T2493 |
| Test name | |
| Test status | |
| Simulation time | 196372305 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 03:50:06 AM UTC 24 |
| Finished | Aug 29 03:50:08 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2172743230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_in_trans.2172743230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_invalid_sync.1735420762 |
| Short name | T2615 |
| Test name | |
| Test status | |
| Simulation time | 3723603770 ps |
| CPU time | 87.1 seconds |
| Started | Aug 29 03:50:06 AM UTC 24 |
| Finished | Aug 29 03:51:35 AM UTC 24 |
| Peak memory | 229808 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1735420762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 36.usbdev_invalid_sync.1735420762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_iso_retraction.3558265624 |
| Short name | T2571 |
| Test name | |
| Test status | |
| Simulation time | 10037257249 ps |
| CPU time | 56.7 seconds |
| Started | Aug 29 03:50:06 AM UTC 24 |
| Finished | Aug 29 03:51:05 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3558265624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_iso_retraction.3558265624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_link_in_err.3365412064 |
| Short name | T2491 |
| Test name | |
| Test status | |
| Simulation time | 193819904 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 03:50:06 AM UTC 24 |
| Finished | Aug 29 03:50:08 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3365412064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_link_in_err.3365412064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_link_resume.2627873212 |
| Short name | T2568 |
| Test name | |
| Test status | |
| Simulation time | 27787505123 ps |
| CPU time | 47.3 seconds |
| Started | Aug 29 03:50:06 AM UTC 24 |
| Finished | Aug 29 03:50:55 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2627873212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_link_resume.2627873212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_link_suspend.4005005621 |
| Short name | T2525 |
| Test name | |
| Test status | |
| Simulation time | 10970847179 ps |
| CPU time | 14.57 seconds |
| Started | Aug 29 03:50:06 AM UTC 24 |
| Finished | Aug 29 03:50:22 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4005005621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_link_suspend.4005005621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_low_speed_traffic.1913835427 |
| Short name | T2528 |
| Test name | |
| Test status | |
| Simulation time | 2620883075 ps |
| CPU time | 21.99 seconds |
| Started | Aug 29 03:50:06 AM UTC 24 |
| Finished | Aug 29 03:50:30 AM UTC 24 |
| Peak memory | 229604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1913835427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_low_speed_traffic.1913835427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_max_inter_pkt_delay.2443121775 |
| Short name | T2572 |
| Test name | |
| Test status | |
| Simulation time | 2522267597 ps |
| CPU time | 60.09 seconds |
| Started | Aug 29 03:50:06 AM UTC 24 |
| Finished | Aug 29 03:51:08 AM UTC 24 |
| Peak memory | 229772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2443121775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_max_inter_pkt_delay.2443121775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_max_length_in_transaction.3562376216 |
| Short name | T2496 |
| Test name | |
| Test status | |
| Simulation time | 243662502 ps |
| CPU time | 0.9 seconds |
| Started | Aug 29 03:50:06 AM UTC 24 |
| Finished | Aug 29 03:50:08 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3562376216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 36.usbdev_max_length_in_transaction.3562376216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_max_length_out_transaction.1149524279 |
| Short name | T2492 |
| Test name | |
| Test status | |
| Simulation time | 191296026 ps |
| CPU time | 0.98 seconds |
| Started | Aug 29 03:50:06 AM UTC 24 |
| Finished | Aug 29 03:50:09 AM UTC 24 |
| Peak memory | 214640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1149524279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 36.usbdev_max_length_out_transaction.1149524279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_min_inter_pkt_delay.1470745426 |
| Short name | T2620 |
| Test name | |
| Test status | |
| Simulation time | 4089421251 ps |
| CPU time | 99.72 seconds |
| Started | Aug 29 03:50:06 AM UTC 24 |
| Finished | Aug 29 03:51:48 AM UTC 24 |
| Peak memory | 227384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1470745426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_min_inter_pkt_delay.1470745426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_min_length_in_transaction.3205291159 |
| Short name | T2501 |
| Test name | |
| Test status | |
| Simulation time | 162944415 ps |
| CPU time | 0.98 seconds |
| Started | Aug 29 03:50:06 AM UTC 24 |
| Finished | Aug 29 03:50:09 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3205291159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 36.usbdev_min_length_in_transaction.3205291159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_min_length_out_transaction.1626865115 |
| Short name | T2489 |
| Test name | |
| Test status | |
| Simulation time | 171221821 ps |
| CPU time | 0.92 seconds |
| Started | Aug 29 03:50:06 AM UTC 24 |
| Finished | Aug 29 03:50:09 AM UTC 24 |
| Peak memory | 215012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1626865115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 36.usbdev_min_length_out_transaction.1626865115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_nak_trans.745360160 |
| Short name | T2500 |
| Test name | |
| Test status | |
| Simulation time | 230600381 ps |
| CPU time | 0.94 seconds |
| Started | Aug 29 03:50:06 AM UTC 24 |
| Finished | Aug 29 03:50:09 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=745360160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_nak_trans.745360160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_out_iso.3170798609 |
| Short name | T2510 |
| Test name | |
| Test status | |
| Simulation time | 167990517 ps |
| CPU time | 1.31 seconds |
| Started | Aug 29 03:50:06 AM UTC 24 |
| Finished | Aug 29 03:50:09 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3170798609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 36.usbdev_out_iso.3170798609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_out_stall.958279382 |
| Short name | T2498 |
| Test name | |
| Test status | |
| Simulation time | 171570795 ps |
| CPU time | 0.94 seconds |
| Started | Aug 29 03:50:07 AM UTC 24 |
| Finished | Aug 29 03:50:09 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=958279382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_out_stall.958279382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_out_trans_nak.240680507 |
| Short name | T2507 |
| Test name | |
| Test status | |
| Simulation time | 207832521 ps |
| CPU time | 1.07 seconds |
| Started | Aug 29 03:50:07 AM UTC 24 |
| Finished | Aug 29 03:50:09 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=240680507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_out_trans_nak.240680507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_pending_in_trans.1514173572 |
| Short name | T2503 |
| Test name | |
| Test status | |
| Simulation time | 219948947 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:50:07 AM UTC 24 |
| Finished | Aug 29 03:50:09 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1514173572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 36.usbdev_pending_in_trans.1514173572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_phy_config_pinflip.819082956 |
| Short name | T2504 |
| Test name | |
| Test status | |
| Simulation time | 215175277 ps |
| CPU time | 1.06 seconds |
| Started | Aug 29 03:50:07 AM UTC 24 |
| Finished | Aug 29 03:50:09 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=819082956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 36.usbdev_phy_config_pinflip.819082956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_phy_config_usb_ref_disable.1210126160 |
| Short name | T2497 |
| Test name | |
| Test status | |
| Simulation time | 163893182 ps |
| CPU time | 0.77 seconds |
| Started | Aug 29 03:50:07 AM UTC 24 |
| Finished | Aug 29 03:50:09 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1210126160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 36.usbdev_phy_config_usb_ref_disable.1210126160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_phy_pins_sense.2372982921 |
| Short name | T2502 |
| Test name | |
| Test status | |
| Simulation time | 37463413 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 03:50:07 AM UTC 24 |
| Finished | Aug 29 03:50:09 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2372982921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_phy_pins_sense.2372982921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_buffer.1958684928 |
| Short name | T2529 |
| Test name | |
| Test status | |
| Simulation time | 12166699432 ps |
| CPU time | 30.12 seconds |
| Started | Aug 29 03:50:07 AM UTC 24 |
| Finished | Aug 29 03:50:38 AM UTC 24 |
| Peak memory | 227628 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1958684928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_pkt_buffer.1958684928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_received.3756181095 |
| Short name | T2506 |
| Test name | |
| Test status | |
| Simulation time | 235338669 ps |
| CPU time | 0.94 seconds |
| Started | Aug 29 03:50:07 AM UTC 24 |
| Finished | Aug 29 03:50:09 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3756181095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_pkt_received.3756181095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_sent.2336322578 |
| Short name | T2511 |
| Test name | |
| Test status | |
| Simulation time | 224505686 ps |
| CPU time | 1.15 seconds |
| Started | Aug 29 03:50:07 AM UTC 24 |
| Finished | Aug 29 03:50:09 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2336322578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_pkt_sent.2336322578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_random_length_in_transaction.2531129596 |
| Short name | T2509 |
| Test name | |
| Test status | |
| Simulation time | 244012606 ps |
| CPU time | 1.09 seconds |
| Started | Aug 29 03:50:07 AM UTC 24 |
| Finished | Aug 29 03:50:09 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2531129596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 36.usbdev_random_length_in_transaction.2531129596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_random_length_out_transaction.3579933306 |
| Short name | T2513 |
| Test name | |
| Test status | |
| Simulation time | 200682351 ps |
| CPU time | 1.15 seconds |
| Started | Aug 29 03:50:07 AM UTC 24 |
| Finished | Aug 29 03:50:09 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3579933306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 36.usbdev_random_length_out_transaction.3579933306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_rx_crc_err.3849143491 |
| Short name | T2505 |
| Test name | |
| Test status | |
| Simulation time | 141342075 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 03:50:07 AM UTC 24 |
| Finished | Aug 29 03:50:09 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3849143491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_rx_crc_err.3849143491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_rx_full.525289992 |
| Short name | T2517 |
| Test name | |
| Test status | |
| Simulation time | 302821020 ps |
| CPU time | 1.37 seconds |
| Started | Aug 29 03:50:07 AM UTC 24 |
| Finished | Aug 29 03:50:09 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=525289992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 36.usbdev_rx_full.525289992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_setup_stage.2699973394 |
| Short name | T2512 |
| Test name | |
| Test status | |
| Simulation time | 198204652 ps |
| CPU time | 1.1 seconds |
| Started | Aug 29 03:50:07 AM UTC 24 |
| Finished | Aug 29 03:50:09 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2699973394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_setup_stage.2699973394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_setup_trans_ignored.3801628782 |
| Short name | T2499 |
| Test name | |
| Test status | |
| Simulation time | 144115498 ps |
| CPU time | 0.75 seconds |
| Started | Aug 29 03:50:07 AM UTC 24 |
| Finished | Aug 29 03:50:09 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3801628782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 36.usbdev_setup_trans_ignored.3801628782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_smoke.1261633034 |
| Short name | T2514 |
| Test name | |
| Test status | |
| Simulation time | 253481706 ps |
| CPU time | 1.12 seconds |
| Started | Aug 29 03:50:07 AM UTC 24 |
| Finished | Aug 29 03:50:09 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1261633034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_smoke.1261633034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_spurious_pids_ignored.3130630296 |
| Short name | T2527 |
| Test name | |
| Test status | |
| Simulation time | 2395820779 ps |
| CPU time | 20.36 seconds |
| Started | Aug 29 03:50:07 AM UTC 24 |
| Finished | Aug 29 03:50:29 AM UTC 24 |
| Peak memory | 234168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3130630296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 36.usbdev_spurious_pids_ignored.3130630296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_stall_priority_over_nak.1268034990 |
| Short name | T2515 |
| Test name | |
| Test status | |
| Simulation time | 164024584 ps |
| CPU time | 1.02 seconds |
| Started | Aug 29 03:50:07 AM UTC 24 |
| Finished | Aug 29 03:50:09 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1268034990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_stall_priority_over_nak.1268034990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_stall_trans.726189941 |
| Short name | T2508 |
| Test name | |
| Test status | |
| Simulation time | 206215302 ps |
| CPU time | 0.82 seconds |
| Started | Aug 29 03:50:07 AM UTC 24 |
| Finished | Aug 29 03:50:09 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=726189941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_stall_trans.726189941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_stream_len_max.3165752283 |
| Short name | T2548 |
| Test name | |
| Test status | |
| Simulation time | 807653470 ps |
| CPU time | 1.91 seconds |
| Started | Aug 29 03:50:48 AM UTC 24 |
| Finished | Aug 29 03:50:51 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3165752283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_stream_len_max.3165752283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_streaming_out.2111458392 |
| Short name | T2524 |
| Test name | |
| Test status | |
| Simulation time | 1950481731 ps |
| CPU time | 13.02 seconds |
| Started | Aug 29 03:50:07 AM UTC 24 |
| Finished | Aug 29 03:50:21 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2111458392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_streaming_out.2111458392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_timeout_missing_host_handshake.2889224360 |
| Short name | T2521 |
| Test name | |
| Test status | |
| Simulation time | 587365587 ps |
| CPU time | 10.02 seconds |
| Started | Aug 29 03:50:06 AM UTC 24 |
| Finished | Aug 29 03:50:17 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2889224360 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_timeout_missing_host_handshake.2889224360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/36.usbdev_tx_rx_disruption.3841167318 |
| Short name | T188 |
| Test name | |
| Test status | |
| Simulation time | 529743104 ps |
| CPU time | 1.47 seconds |
| Started | Aug 29 03:50:48 AM UTC 24 |
| Finished | Aug 29 03:50:51 AM UTC 24 |
| Peak memory | 214764 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3841167318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_t x_rx_disruption.3841167318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/36.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/360.usbdev_tx_rx_disruption.3824197573 |
| Short name | T3626 |
| Test name | |
| Test status | |
| Simulation time | 559149055 ps |
| CPU time | 1.67 seconds |
| Started | Aug 29 04:13:05 AM UTC 24 |
| Finished | Aug 29 04:13:08 AM UTC 24 |
| Peak memory | 216944 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3824197573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 360.usbdev_ tx_rx_disruption.3824197573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/360.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/361.usbdev_tx_rx_disruption.2575013701 |
| Short name | T3656 |
| Test name | |
| Test status | |
| Simulation time | 633429728 ps |
| CPU time | 1.49 seconds |
| Started | Aug 29 04:13:05 AM UTC 24 |
| Finished | Aug 29 04:13:08 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2575013701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 361.usbdev_ tx_rx_disruption.2575013701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/361.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/362.usbdev_tx_rx_disruption.4016849564 |
| Short name | T3662 |
| Test name | |
| Test status | |
| Simulation time | 476384932 ps |
| CPU time | 1.56 seconds |
| Started | Aug 29 04:13:05 AM UTC 24 |
| Finished | Aug 29 04:13:08 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4016849564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 362.usbdev_ tx_rx_disruption.4016849564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/362.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/363.usbdev_tx_rx_disruption.620097006 |
| Short name | T3664 |
| Test name | |
| Test status | |
| Simulation time | 533761749 ps |
| CPU time | 1.5 seconds |
| Started | Aug 29 04:13:05 AM UTC 24 |
| Finished | Aug 29 04:13:08 AM UTC 24 |
| Peak memory | 217052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=620097006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 363.usbdev_t x_rx_disruption.620097006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/363.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/364.usbdev_tx_rx_disruption.553532889 |
| Short name | T3669 |
| Test name | |
| Test status | |
| Simulation time | 512963296 ps |
| CPU time | 1.64 seconds |
| Started | Aug 29 04:13:05 AM UTC 24 |
| Finished | Aug 29 04:13:08 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=553532889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 364.usbdev_t x_rx_disruption.553532889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/364.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/365.usbdev_tx_rx_disruption.2632963363 |
| Short name | T3658 |
| Test name | |
| Test status | |
| Simulation time | 435427137 ps |
| CPU time | 1.23 seconds |
| Started | Aug 29 04:13:05 AM UTC 24 |
| Finished | Aug 29 04:13:08 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2632963363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 365.usbdev_ tx_rx_disruption.2632963363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/365.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/366.usbdev_tx_rx_disruption.3055223846 |
| Short name | T3663 |
| Test name | |
| Test status | |
| Simulation time | 478357649 ps |
| CPU time | 1.53 seconds |
| Started | Aug 29 04:13:05 AM UTC 24 |
| Finished | Aug 29 04:13:08 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3055223846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 366.usbdev_ tx_rx_disruption.3055223846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/366.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/367.usbdev_tx_rx_disruption.2208497628 |
| Short name | T3624 |
| Test name | |
| Test status | |
| Simulation time | 578273495 ps |
| CPU time | 1.58 seconds |
| Started | Aug 29 04:13:05 AM UTC 24 |
| Finished | Aug 29 04:13:08 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2208497628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 367.usbdev_ tx_rx_disruption.2208497628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/367.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/368.usbdev_tx_rx_disruption.1563672064 |
| Short name | T3635 |
| Test name | |
| Test status | |
| Simulation time | 645522620 ps |
| CPU time | 1.65 seconds |
| Started | Aug 29 04:13:05 AM UTC 24 |
| Finished | Aug 29 04:13:08 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1563672064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 368.usbdev_ tx_rx_disruption.1563672064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/368.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/369.usbdev_tx_rx_disruption.3500963657 |
| Short name | T3673 |
| Test name | |
| Test status | |
| Simulation time | 586236753 ps |
| CPU time | 1.93 seconds |
| Started | Aug 29 04:13:05 AM UTC 24 |
| Finished | Aug 29 04:13:08 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3500963657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 369.usbdev_ tx_rx_disruption.3500963657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/369.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_alert_test.3743470215 |
| Short name | T2585 |
| Test name | |
| Test status | |
| Simulation time | 70934693 ps |
| CPU time | 0.63 seconds |
| Started | Aug 29 03:51:29 AM UTC 24 |
| Finished | Aug 29 03:51:31 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3743470215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 37.usbdev_alert_test.3743470215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_disconnect.3962061934 |
| Short name | T2570 |
| Test name | |
| Test status | |
| Simulation time | 9986149611 ps |
| CPU time | 12.22 seconds |
| Started | Aug 29 03:50:48 AM UTC 24 |
| Finished | Aug 29 03:51:02 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3962061934 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_disconnect.3962061934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_reset.2771990354 |
| Short name | T2574 |
| Test name | |
| Test status | |
| Simulation time | 16048561227 ps |
| CPU time | 19.33 seconds |
| Started | Aug 29 03:50:48 AM UTC 24 |
| Finished | Aug 29 03:51:09 AM UTC 24 |
| Peak memory | 226720 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2771990354 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_reset.2771990354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_resume.1279642572 |
| Short name | T2580 |
| Test name | |
| Test status | |
| Simulation time | 29943562606 ps |
| CPU time | 32.58 seconds |
| Started | Aug 29 03:50:48 AM UTC 24 |
| Finished | Aug 29 03:51:22 AM UTC 24 |
| Peak memory | 217328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1279642572 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_resume.1279642572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_av_buffer.1417753540 |
| Short name | T2532 |
| Test name | |
| Test status | |
| Simulation time | 185294610 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 03:50:48 AM UTC 24 |
| Finished | Aug 29 03:50:50 AM UTC 24 |
| Peak memory | 215952 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1417753540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_av_buffer.1417753540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_bitstuff_err.849072850 |
| Short name | T2533 |
| Test name | |
| Test status | |
| Simulation time | 163495579 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 03:50:48 AM UTC 24 |
| Finished | Aug 29 03:50:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=849072850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_bitstuff_err.849072850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_data_toggle_clear.239146681 |
| Short name | T2534 |
| Test name | |
| Test status | |
| Simulation time | 197228820 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 03:50:48 AM UTC 24 |
| Finished | Aug 29 03:50:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=239146681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 37.usbdev_data_toggle_clear.239146681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_data_toggle_restore.1176093023 |
| Short name | T2566 |
| Test name | |
| Test status | |
| Simulation time | 1175378204 ps |
| CPU time | 2.69 seconds |
| Started | Aug 29 03:50:48 AM UTC 24 |
| Finished | Aug 29 03:50:52 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1176093023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_data_toggle_restore.1176093023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_device_address.4034719700 |
| Short name | T2622 |
| Test name | |
| Test status | |
| Simulation time | 35370934094 ps |
| CPU time | 61.41 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:51:52 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4034719700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_device_address.4034719700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_device_timeout.2813138298 |
| Short name | T2576 |
| Test name | |
| Test status | |
| Simulation time | 3723681718 ps |
| CPU time | 22.87 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:51:13 AM UTC 24 |
| Peak memory | 217352 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2813138298 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_device_timeout.2813138298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_disable_endpoint.4015201533 |
| Short name | T2565 |
| Test name | |
| Test status | |
| Simulation time | 1201320522 ps |
| CPU time | 2.4 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:50:52 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4015201533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 37.usbdev_disable_endpoint.4015201533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_disconnected.3427286686 |
| Short name | T2536 |
| Test name | |
| Test status | |
| Simulation time | 146136038 ps |
| CPU time | 0.72 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:50:51 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3427286686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_disconnected.3427286686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_enable.1910366564 |
| Short name | T2535 |
| Test name | |
| Test status | |
| Simulation time | 42826719 ps |
| CPU time | 0.66 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:50:51 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1910366564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 37.usbdev_enable.1910366564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_endpoint_access.2589828418 |
| Short name | T2567 |
| Test name | |
| Test status | |
| Simulation time | 909530931 ps |
| CPU time | 2.57 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:50:52 AM UTC 24 |
| Peak memory | 217196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2589828418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_endpoint_access.2589828418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_endpoint_types.4114278409 |
| Short name | T2538 |
| Test name | |
| Test status | |
| Simulation time | 237262316 ps |
| CPU time | 0.88 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:50:51 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4114278409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_endpoint_types.4114278409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_fifo_levels.2296889895 |
| Short name | T408 |
| Test name | |
| Test status | |
| Simulation time | 266590166 ps |
| CPU time | 1 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:50:51 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2296889895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_fifo_levels.2296889895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_fifo_rst.1018732924 |
| Short name | T2564 |
| Test name | |
| Test status | |
| Simulation time | 329036827 ps |
| CPU time | 1.87 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:50:52 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1018732924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_fifo_rst.1018732924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_in_iso.2896569897 |
| Short name | T2539 |
| Test name | |
| Test status | |
| Simulation time | 161479365 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:50:51 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2896569897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 37.usbdev_in_iso.2896569897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_in_stall.4197111124 |
| Short name | T2537 |
| Test name | |
| Test status | |
| Simulation time | 143362806 ps |
| CPU time | 0.74 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:50:51 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4197111124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_in_stall.4197111124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_in_trans.1129894135 |
| Short name | T2545 |
| Test name | |
| Test status | |
| Simulation time | 231238001 ps |
| CPU time | 1.05 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:50:51 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1129894135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_in_trans.1129894135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_invalid_sync.3816380330 |
| Short name | T2573 |
| Test name | |
| Test status | |
| Simulation time | 2695875545 ps |
| CPU time | 18.07 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:51:08 AM UTC 24 |
| Peak memory | 229584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3816380330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 37.usbdev_invalid_sync.3816380330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_iso_retraction.303548588 |
| Short name | T2583 |
| Test name | |
| Test status | |
| Simulation time | 3728702401 ps |
| CPU time | 40.92 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:51:31 AM UTC 24 |
| Peak memory | 217252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=303548588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 37.usbdev_iso_retraction.303548588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_link_in_err.3640066269 |
| Short name | T2540 |
| Test name | |
| Test status | |
| Simulation time | 193925207 ps |
| CPU time | 0.95 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:50:51 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3640066269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_link_in_err.3640066269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_link_resume.2166921227 |
| Short name | T2579 |
| Test name | |
| Test status | |
| Simulation time | 23593068163 ps |
| CPU time | 30.91 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:51:21 AM UTC 24 |
| Peak memory | 227364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2166921227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_link_resume.2166921227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_link_suspend.3291794515 |
| Short name | T2569 |
| Test name | |
| Test status | |
| Simulation time | 4614072449 ps |
| CPU time | 6.47 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:50:57 AM UTC 24 |
| Peak memory | 226820 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3291794515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_link_suspend.3291794515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_low_speed_traffic.1030972340 |
| Short name | T2544 |
| Test name | |
| Test status | |
| Simulation time | 4156716156 ps |
| CPU time | 28.26 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:51:19 AM UTC 24 |
| Peak memory | 229512 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1030972340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_low_speed_traffic.1030972340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_max_inter_pkt_delay.422281992 |
| Short name | T2626 |
| Test name | |
| Test status | |
| Simulation time | 3143558682 ps |
| CPU time | 74.62 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:52:06 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=422281992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_max_inter_pkt_delay.422281992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_max_length_in_transaction.227852219 |
| Short name | T2546 |
| Test name | |
| Test status | |
| Simulation time | 235680404 ps |
| CPU time | 0.9 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:50:51 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=227852219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 37.usbdev_max_length_in_transaction.227852219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_max_length_out_transaction.902676032 |
| Short name | T2543 |
| Test name | |
| Test status | |
| Simulation time | 200522255 ps |
| CPU time | 0.91 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:50:51 AM UTC 24 |
| Peak memory | 217012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=902676032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 37.usbdev_max_length_out_transaction.902676032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_min_inter_pkt_delay.804281746 |
| Short name | T2581 |
| Test name | |
| Test status | |
| Simulation time | 1653519449 ps |
| CPU time | 37.94 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:51:29 AM UTC 24 |
| Peak memory | 234120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=804281746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_min_inter_pkt_delay.804281746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_min_length_in_transaction.3455252951 |
| Short name | T2555 |
| Test name | |
| Test status | |
| Simulation time | 198682786 ps |
| CPU time | 1.22 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:50:52 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3455252951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 37.usbdev_min_length_in_transaction.3455252951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_min_length_out_transaction.32980667 |
| Short name | T2542 |
| Test name | |
| Test status | |
| Simulation time | 139020159 ps |
| CPU time | 0.76 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:50:51 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=32980667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transacti on_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 37.usbdev_min_length_out_transaction.32980667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_nak_trans.1123430319 |
| Short name | T2547 |
| Test name | |
| Test status | |
| Simulation time | 212923225 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:50:51 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1123430319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_nak_trans.1123430319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_out_iso.1537322422 |
| Short name | T2541 |
| Test name | |
| Test status | |
| Simulation time | 152241355 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:50:51 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1537322422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 37.usbdev_out_iso.1537322422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_out_stall.504501966 |
| Short name | T2556 |
| Test name | |
| Test status | |
| Simulation time | 165089741 ps |
| CPU time | 1.13 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:50:52 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=504501966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_out_stall.504501966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_out_trans_nak.576516225 |
| Short name | T2550 |
| Test name | |
| Test status | |
| Simulation time | 177402336 ps |
| CPU time | 0.82 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:50:51 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=576516225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_out_trans_nak.576516225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_pending_in_trans.3964000336 |
| Short name | T2549 |
| Test name | |
| Test status | |
| Simulation time | 165698446 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:50:51 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3964000336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 37.usbdev_pending_in_trans.3964000336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_phy_config_pinflip.1604427946 |
| Short name | T2557 |
| Test name | |
| Test status | |
| Simulation time | 218850470 ps |
| CPU time | 1.15 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:50:52 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1604427946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 37.usbdev_phy_config_pinflip.1604427946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_phy_config_usb_ref_disable.992844606 |
| Short name | T2551 |
| Test name | |
| Test status | |
| Simulation time | 167946012 ps |
| CPU time | 0.88 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:50:51 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=992844606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 37.usbdev_phy_config_usb_ref_disable.992844606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_phy_pins_sense.3398189724 |
| Short name | T2552 |
| Test name | |
| Test status | |
| Simulation time | 62979503 ps |
| CPU time | 0.69 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:50:51 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3398189724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_phy_pins_sense.3398189724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_buffer.1946125691 |
| Short name | T2575 |
| Test name | |
| Test status | |
| Simulation time | 9006964120 ps |
| CPU time | 20.24 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:51:11 AM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1946125691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 37.usbdev_pkt_buffer.1946125691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_received.3767602880 |
| Short name | T2561 |
| Test name | |
| Test status | |
| Simulation time | 168555902 ps |
| CPU time | 1.1 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:50:52 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3767602880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_pkt_received.3767602880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_sent.2911037339 |
| Short name | T2554 |
| Test name | |
| Test status | |
| Simulation time | 203285791 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:50:52 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2911037339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_pkt_sent.2911037339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_random_length_in_transaction.2986052636 |
| Short name | T2563 |
| Test name | |
| Test status | |
| Simulation time | 223622087 ps |
| CPU time | 1.25 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:50:52 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2986052636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 37.usbdev_random_length_in_transaction.2986052636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_random_length_out_transaction.3768710232 |
| Short name | T2559 |
| Test name | |
| Test status | |
| Simulation time | 161879801 ps |
| CPU time | 1.09 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:50:52 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3768710232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 37.usbdev_random_length_out_transaction.3768710232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_rx_crc_err.2395294729 |
| Short name | T2553 |
| Test name | |
| Test status | |
| Simulation time | 179659547 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:50:52 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2395294729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 37.usbdev_rx_crc_err.2395294729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_rx_full.1412919535 |
| Short name | T2560 |
| Test name | |
| Test status | |
| Simulation time | 295370453 ps |
| CPU time | 1.11 seconds |
| Started | Aug 29 03:50:50 AM UTC 24 |
| Finished | Aug 29 03:50:52 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1412919535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 37.usbdev_rx_full.1412919535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_setup_stage.1092172543 |
| Short name | T2558 |
| Test name | |
| Test status | |
| Simulation time | 152716577 ps |
| CPU time | 1.05 seconds |
| Started | Aug 29 03:50:50 AM UTC 24 |
| Finished | Aug 29 03:50:52 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1092172543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_setup_stage.1092172543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_setup_trans_ignored.372682581 |
| Short name | T2562 |
| Test name | |
| Test status | |
| Simulation time | 195190421 ps |
| CPU time | 1.12 seconds |
| Started | Aug 29 03:50:50 AM UTC 24 |
| Finished | Aug 29 03:50:52 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=372682581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 37.usbdev_setup_trans_ignored.372682581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_smoke.652579022 |
| Short name | T2586 |
| Test name | |
| Test status | |
| Simulation time | 247398476 ps |
| CPU time | 0.97 seconds |
| Started | Aug 29 03:51:29 AM UTC 24 |
| Finished | Aug 29 03:51:32 AM UTC 24 |
| Peak memory | 215352 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=652579022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_smoke.652579022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_spurious_pids_ignored.479362251 |
| Short name | T2621 |
| Test name | |
| Test status | |
| Simulation time | 2971047195 ps |
| CPU time | 19.86 seconds |
| Started | Aug 29 03:51:29 AM UTC 24 |
| Finished | Aug 29 03:51:51 AM UTC 24 |
| Peak memory | 228568 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=479362251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 37.usbdev_spurious_pids_ignored.479362251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_stall_priority_over_nak.1773378371 |
| Short name | T2582 |
| Test name | |
| Test status | |
| Simulation time | 163830300 ps |
| CPU time | 0.77 seconds |
| Started | Aug 29 03:51:29 AM UTC 24 |
| Finished | Aug 29 03:51:31 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1773378371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_stall_priority_over_nak.1773378371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_stall_trans.2844106456 |
| Short name | T2584 |
| Test name | |
| Test status | |
| Simulation time | 185242862 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 03:51:29 AM UTC 24 |
| Finished | Aug 29 03:51:31 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2844106456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_stall_trans.2844106456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_stream_len_max.2269380873 |
| Short name | T2587 |
| Test name | |
| Test status | |
| Simulation time | 210372313 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 03:51:29 AM UTC 24 |
| Finished | Aug 29 03:51:32 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2269380873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_stream_len_max.2269380873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_streaming_out.3231099181 |
| Short name | T2675 |
| Test name | |
| Test status | |
| Simulation time | 2848850004 ps |
| CPU time | 69.93 seconds |
| Started | Aug 29 03:51:29 AM UTC 24 |
| Finished | Aug 29 03:52:41 AM UTC 24 |
| Peak memory | 227700 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3231099181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_streaming_out.3231099181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_timeout_missing_host_handshake.2237294297 |
| Short name | T2578 |
| Test name | |
| Test status | |
| Simulation time | 4897014483 ps |
| CPU time | 29.8 seconds |
| Started | Aug 29 03:50:49 AM UTC 24 |
| Finished | Aug 29 03:51:20 AM UTC 24 |
| Peak memory | 217384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2237294297 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_timeout_missing_host_handshake.2237294297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/37.usbdev_tx_rx_disruption.4017416466 |
| Short name | T2596 |
| Test name | |
| Test status | |
| Simulation time | 588016108 ps |
| CPU time | 1.45 seconds |
| Started | Aug 29 03:51:29 AM UTC 24 |
| Finished | Aug 29 03:51:32 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4017416466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_t x_rx_disruption.4017416466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/37.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/370.usbdev_tx_rx_disruption.2235180443 |
| Short name | T3671 |
| Test name | |
| Test status | |
| Simulation time | 480413807 ps |
| CPU time | 1.74 seconds |
| Started | Aug 29 04:13:05 AM UTC 24 |
| Finished | Aug 29 04:13:08 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2235180443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 370.usbdev_ tx_rx_disruption.2235180443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/370.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/371.usbdev_tx_rx_disruption.936561461 |
| Short name | T3672 |
| Test name | |
| Test status | |
| Simulation time | 639870333 ps |
| CPU time | 1.93 seconds |
| Started | Aug 29 04:13:05 AM UTC 24 |
| Finished | Aug 29 04:13:08 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=936561461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 371.usbdev_t x_rx_disruption.936561461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/371.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/372.usbdev_tx_rx_disruption.1122703376 |
| Short name | T3631 |
| Test name | |
| Test status | |
| Simulation time | 562707577 ps |
| CPU time | 1.61 seconds |
| Started | Aug 29 04:13:05 AM UTC 24 |
| Finished | Aug 29 04:13:08 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1122703376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 372.usbdev_ tx_rx_disruption.1122703376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/372.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/373.usbdev_tx_rx_disruption.2724944599 |
| Short name | T3674 |
| Test name | |
| Test status | |
| Simulation time | 539548682 ps |
| CPU time | 1.8 seconds |
| Started | Aug 29 04:13:05 AM UTC 24 |
| Finished | Aug 29 04:13:08 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2724944599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 373.usbdev_ tx_rx_disruption.2724944599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/373.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/374.usbdev_tx_rx_disruption.2039677973 |
| Short name | T3670 |
| Test name | |
| Test status | |
| Simulation time | 570191418 ps |
| CPU time | 1.69 seconds |
| Started | Aug 29 04:13:05 AM UTC 24 |
| Finished | Aug 29 04:13:08 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2039677973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 374.usbdev_ tx_rx_disruption.2039677973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/374.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/375.usbdev_tx_rx_disruption.3384443337 |
| Short name | T3685 |
| Test name | |
| Test status | |
| Simulation time | 652626932 ps |
| CPU time | 1.81 seconds |
| Started | Aug 29 04:14:24 AM UTC 24 |
| Finished | Aug 29 04:14:27 AM UTC 24 |
| Peak memory | 214952 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3384443337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 375.usbdev_ tx_rx_disruption.3384443337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/375.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/376.usbdev_tx_rx_disruption.2065820736 |
| Short name | T3684 |
| Test name | |
| Test status | |
| Simulation time | 550543734 ps |
| CPU time | 1.76 seconds |
| Started | Aug 29 04:14:24 AM UTC 24 |
| Finished | Aug 29 04:14:27 AM UTC 24 |
| Peak memory | 214960 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2065820736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 376.usbdev_ tx_rx_disruption.2065820736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/376.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/377.usbdev_tx_rx_disruption.2282845582 |
| Short name | T3676 |
| Test name | |
| Test status | |
| Simulation time | 493098789 ps |
| CPU time | 1.35 seconds |
| Started | Aug 29 04:14:24 AM UTC 24 |
| Finished | Aug 29 04:14:27 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2282845582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 377.usbdev_ tx_rx_disruption.2282845582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/377.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/378.usbdev_tx_rx_disruption.3051238464 |
| Short name | T3675 |
| Test name | |
| Test status | |
| Simulation time | 469518513 ps |
| CPU time | 1.29 seconds |
| Started | Aug 29 04:14:24 AM UTC 24 |
| Finished | Aug 29 04:14:26 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3051238464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 378.usbdev_ tx_rx_disruption.3051238464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/378.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/379.usbdev_tx_rx_disruption.3297262275 |
| Short name | T3682 |
| Test name | |
| Test status | |
| Simulation time | 624606901 ps |
| CPU time | 1.66 seconds |
| Started | Aug 29 04:14:24 AM UTC 24 |
| Finished | Aug 29 04:14:27 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3297262275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 379.usbdev_ tx_rx_disruption.3297262275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/379.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_alert_test.1839041743 |
| Short name | T2641 |
| Test name | |
| Test status | |
| Simulation time | 50297869 ps |
| CPU time | 0.62 seconds |
| Started | Aug 29 03:52:16 AM UTC 24 |
| Finished | Aug 29 03:52:18 AM UTC 24 |
| Peak memory | 214916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1839041743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 38.usbdev_alert_test.1839041743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_disconnect.179675589 |
| Short name | T2617 |
| Test name | |
| Test status | |
| Simulation time | 9099523668 ps |
| CPU time | 13.81 seconds |
| Started | Aug 29 03:51:29 AM UTC 24 |
| Finished | Aug 29 03:51:45 AM UTC 24 |
| Peak memory | 216160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=179675589 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_disconnect.179675589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_reset.917739882 |
| Short name | T2618 |
| Test name | |
| Test status | |
| Simulation time | 13645659649 ps |
| CPU time | 14.94 seconds |
| Started | Aug 29 03:51:29 AM UTC 24 |
| Finished | Aug 29 03:51:46 AM UTC 24 |
| Peak memory | 227448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=917739882 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_reset.917739882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_resume.4105646968 |
| Short name | T2625 |
| Test name | |
| Test status | |
| Simulation time | 25297038739 ps |
| CPU time | 31.36 seconds |
| Started | Aug 29 03:51:29 AM UTC 24 |
| Finished | Aug 29 03:52:03 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4105646968 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_resume.4105646968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_av_buffer.2131430506 |
| Short name | T2592 |
| Test name | |
| Test status | |
| Simulation time | 177668225 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 03:51:29 AM UTC 24 |
| Finished | Aug 29 03:51:32 AM UTC 24 |
| Peak memory | 214960 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2131430506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_av_buffer.2131430506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_bitstuff_err.2151028486 |
| Short name | T2590 |
| Test name | |
| Test status | |
| Simulation time | 160946088 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 03:51:29 AM UTC 24 |
| Finished | Aug 29 03:51:32 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2151028486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_bitstuff_err.2151028486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_data_toggle_clear.1939571740 |
| Short name | T2605 |
| Test name | |
| Test status | |
| Simulation time | 457532841 ps |
| CPU time | 1.66 seconds |
| Started | Aug 29 03:51:29 AM UTC 24 |
| Finished | Aug 29 03:51:33 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1939571740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 38.usbdev_data_toggle_clear.1939571740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_data_toggle_restore.16209020 |
| Short name | T2611 |
| Test name | |
| Test status | |
| Simulation time | 691028058 ps |
| CPU time | 1.83 seconds |
| Started | Aug 29 03:51:29 AM UTC 24 |
| Finished | Aug 29 03:51:33 AM UTC 24 |
| Peak memory | 214788 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=16209020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_data_toggle_restore.16209020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_device_address.1593522447 |
| Short name | T2680 |
| Test name | |
| Test status | |
| Simulation time | 48398869117 ps |
| CPU time | 78.83 seconds |
| Started | Aug 29 03:51:29 AM UTC 24 |
| Finished | Aug 29 03:52:51 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1593522447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_device_address.1593522447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_device_timeout.2419428888 |
| Short name | T2614 |
| Test name | |
| Test status | |
| Simulation time | 296315437 ps |
| CPU time | 3.75 seconds |
| Started | Aug 29 03:51:29 AM UTC 24 |
| Finished | Aug 29 03:51:35 AM UTC 24 |
| Peak memory | 217012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2419428888 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_device_timeout.2419428888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_disable_endpoint.1569254252 |
| Short name | T2600 |
| Test name | |
| Test status | |
| Simulation time | 509775437 ps |
| CPU time | 1.51 seconds |
| Started | Aug 29 03:51:30 AM UTC 24 |
| Finished | Aug 29 03:51:33 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1569254252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 38.usbdev_disable_endpoint.1569254252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_disconnected.1534583397 |
| Short name | T2588 |
| Test name | |
| Test status | |
| Simulation time | 135032440 ps |
| CPU time | 0.76 seconds |
| Started | Aug 29 03:51:30 AM UTC 24 |
| Finished | Aug 29 03:51:32 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1534583397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_disconnected.1534583397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_enable.1251070791 |
| Short name | T2589 |
| Test name | |
| Test status | |
| Simulation time | 69121061 ps |
| CPU time | 0.68 seconds |
| Started | Aug 29 03:51:30 AM UTC 24 |
| Finished | Aug 29 03:51:32 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1251070791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 38.usbdev_enable.1251070791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_endpoint_access.3595753295 |
| Short name | T2613 |
| Test name | |
| Test status | |
| Simulation time | 1046886986 ps |
| CPU time | 2.76 seconds |
| Started | Aug 29 03:51:30 AM UTC 24 |
| Finished | Aug 29 03:51:34 AM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3595753295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_endpoint_access.3595753295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_endpoint_types.212783473 |
| Short name | T455 |
| Test name | |
| Test status | |
| Simulation time | 415137470 ps |
| CPU time | 1.33 seconds |
| Started | Aug 29 03:51:30 AM UTC 24 |
| Finished | Aug 29 03:51:33 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=212783473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 38.usbdev_endpoint_types.212783473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_fifo_levels.2596011296 |
| Short name | T390 |
| Test name | |
| Test status | |
| Simulation time | 289948473 ps |
| CPU time | 1.09 seconds |
| Started | Aug 29 03:51:30 AM UTC 24 |
| Finished | Aug 29 03:51:32 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2596011296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_fifo_levels.2596011296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_fifo_rst.1665560068 |
| Short name | T2612 |
| Test name | |
| Test status | |
| Simulation time | 320105425 ps |
| CPU time | 2.48 seconds |
| Started | Aug 29 03:51:30 AM UTC 24 |
| Finished | Aug 29 03:51:34 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1665560068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_fifo_rst.1665560068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_in_iso.1957663320 |
| Short name | T2594 |
| Test name | |
| Test status | |
| Simulation time | 207622236 ps |
| CPU time | 0.94 seconds |
| Started | Aug 29 03:51:30 AM UTC 24 |
| Finished | Aug 29 03:51:32 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1957663320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 38.usbdev_in_iso.1957663320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_in_stall.1801926122 |
| Short name | T2593 |
| Test name | |
| Test status | |
| Simulation time | 146431501 ps |
| CPU time | 0.75 seconds |
| Started | Aug 29 03:51:30 AM UTC 24 |
| Finished | Aug 29 03:51:32 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1801926122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_in_stall.1801926122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_in_trans.2609961430 |
| Short name | T2595 |
| Test name | |
| Test status | |
| Simulation time | 196804269 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 03:51:30 AM UTC 24 |
| Finished | Aug 29 03:51:32 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2609961430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_in_trans.2609961430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_invalid_sync.3920748120 |
| Short name | T2619 |
| Test name | |
| Test status | |
| Simulation time | 2552611728 ps |
| CPU time | 16.12 seconds |
| Started | Aug 29 03:51:30 AM UTC 24 |
| Finished | Aug 29 03:51:48 AM UTC 24 |
| Peak memory | 234292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3920748120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 38.usbdev_invalid_sync.3920748120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_iso_retraction.3845060313 |
| Short name | T2673 |
| Test name | |
| Test status | |
| Simulation time | 10817835073 ps |
| CPU time | 68.3 seconds |
| Started | Aug 29 03:51:30 AM UTC 24 |
| Finished | Aug 29 03:52:40 AM UTC 24 |
| Peak memory | 217440 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3845060313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_iso_retraction.3845060313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_link_in_err.124815676 |
| Short name | T2601 |
| Test name | |
| Test status | |
| Simulation time | 226908378 ps |
| CPU time | 1.15 seconds |
| Started | Aug 29 03:51:30 AM UTC 24 |
| Finished | Aug 29 03:51:33 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=124815676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 38.usbdev_link_in_err.124815676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_link_resume.1506084165 |
| Short name | T2627 |
| Test name | |
| Test status | |
| Simulation time | 32880360074 ps |
| CPU time | 42.29 seconds |
| Started | Aug 29 03:51:30 AM UTC 24 |
| Finished | Aug 29 03:52:14 AM UTC 24 |
| Peak memory | 217432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1506084165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_link_resume.1506084165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_link_suspend.2279063870 |
| Short name | T2616 |
| Test name | |
| Test status | |
| Simulation time | 3595162736 ps |
| CPU time | 5.14 seconds |
| Started | Aug 29 03:51:30 AM UTC 24 |
| Finished | Aug 29 03:51:37 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2279063870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_link_suspend.2279063870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_low_speed_traffic.1055938402 |
| Short name | T2672 |
| Test name | |
| Test status | |
| Simulation time | 2772000868 ps |
| CPU time | 66.23 seconds |
| Started | Aug 29 03:51:30 AM UTC 24 |
| Finished | Aug 29 03:52:38 AM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1055938402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_low_speed_traffic.1055938402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_max_inter_pkt_delay.507255840 |
| Short name | T2624 |
| Test name | |
| Test status | |
| Simulation time | 3394816490 ps |
| CPU time | 27.98 seconds |
| Started | Aug 29 03:51:30 AM UTC 24 |
| Finished | Aug 29 03:52:00 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=507255840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_max_inter_pkt_delay.507255840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_max_length_in_transaction.1583319539 |
| Short name | T2598 |
| Test name | |
| Test status | |
| Simulation time | 246239879 ps |
| CPU time | 0.92 seconds |
| Started | Aug 29 03:51:30 AM UTC 24 |
| Finished | Aug 29 03:51:32 AM UTC 24 |
| Peak memory | 215028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1583319539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 38.usbdev_max_length_in_transaction.1583319539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_max_length_out_transaction.1380111697 |
| Short name | T2597 |
| Test name | |
| Test status | |
| Simulation time | 195281835 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:51:30 AM UTC 24 |
| Finished | Aug 29 03:51:32 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1380111697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 38.usbdev_max_length_out_transaction.1380111697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_min_inter_pkt_delay.906022021 |
| Short name | T2623 |
| Test name | |
| Test status | |
| Simulation time | 3712679943 ps |
| CPU time | 24.36 seconds |
| Started | Aug 29 03:51:30 AM UTC 24 |
| Finished | Aug 29 03:51:56 AM UTC 24 |
| Peak memory | 229608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=906022021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_min_inter_pkt_delay.906022021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_min_length_in_transaction.237191406 |
| Short name | T2599 |
| Test name | |
| Test status | |
| Simulation time | 159681497 ps |
| CPU time | 0.91 seconds |
| Started | Aug 29 03:51:30 AM UTC 24 |
| Finished | Aug 29 03:51:33 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=237191406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 38.usbdev_min_length_in_transaction.237191406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_min_length_out_transaction.484306208 |
| Short name | T2604 |
| Test name | |
| Test status | |
| Simulation time | 215569962 ps |
| CPU time | 1.1 seconds |
| Started | Aug 29 03:51:30 AM UTC 24 |
| Finished | Aug 29 03:51:33 AM UTC 24 |
| Peak memory | 214964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=484306208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 38.usbdev_min_length_out_transaction.484306208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_nak_trans.3396623780 |
| Short name | T2603 |
| Test name | |
| Test status | |
| Simulation time | 190113292 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 03:51:30 AM UTC 24 |
| Finished | Aug 29 03:51:33 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3396623780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_nak_trans.3396623780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_out_iso.1656063709 |
| Short name | T2610 |
| Test name | |
| Test status | |
| Simulation time | 179585008 ps |
| CPU time | 1.13 seconds |
| Started | Aug 29 03:51:30 AM UTC 24 |
| Finished | Aug 29 03:51:33 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1656063709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_out_iso.1656063709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_out_stall.907143337 |
| Short name | T2608 |
| Test name | |
| Test status | |
| Simulation time | 196302297 ps |
| CPU time | 1.05 seconds |
| Started | Aug 29 03:51:30 AM UTC 24 |
| Finished | Aug 29 03:51:33 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=907143337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_out_stall.907143337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_out_trans_nak.4065033687 |
| Short name | T2607 |
| Test name | |
| Test status | |
| Simulation time | 173769405 ps |
| CPU time | 1.04 seconds |
| Started | Aug 29 03:51:30 AM UTC 24 |
| Finished | Aug 29 03:51:33 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4065033687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 38.usbdev_out_trans_nak.4065033687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_pending_in_trans.3128505506 |
| Short name | T2602 |
| Test name | |
| Test status | |
| Simulation time | 157166992 ps |
| CPU time | 0.94 seconds |
| Started | Aug 29 03:51:30 AM UTC 24 |
| Finished | Aug 29 03:51:33 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3128505506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 38.usbdev_pending_in_trans.3128505506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_phy_config_pinflip.2724202651 |
| Short name | T2609 |
| Test name | |
| Test status | |
| Simulation time | 218271952 ps |
| CPU time | 1.07 seconds |
| Started | Aug 29 03:51:30 AM UTC 24 |
| Finished | Aug 29 03:51:33 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2724202651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 38.usbdev_phy_config_pinflip.2724202651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_phy_config_usb_ref_disable.4272706581 |
| Short name | T2606 |
| Test name | |
| Test status | |
| Simulation time | 141843508 ps |
| CPU time | 0.74 seconds |
| Started | Aug 29 03:51:30 AM UTC 24 |
| Finished | Aug 29 03:51:33 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4272706581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 38.usbdev_phy_config_usb_ref_disable.4272706581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_phy_pins_sense.714142865 |
| Short name | T2628 |
| Test name | |
| Test status | |
| Simulation time | 51019767 ps |
| CPU time | 0.61 seconds |
| Started | Aug 29 03:52:15 AM UTC 24 |
| Finished | Aug 29 03:52:17 AM UTC 24 |
| Peak memory | 214648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=714142865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 38.usbdev_phy_pins_sense.714142865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_buffer.52909881 |
| Short name | T2678 |
| Test name | |
| Test status | |
| Simulation time | 12039148961 ps |
| CPU time | 30.01 seconds |
| Started | Aug 29 03:52:15 AM UTC 24 |
| Finished | Aug 29 03:52:46 AM UTC 24 |
| Peak memory | 227160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=52909881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_pkt_buffer.52909881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_received.226176282 |
| Short name | T2632 |
| Test name | |
| Test status | |
| Simulation time | 183621692 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:52:15 AM UTC 24 |
| Finished | Aug 29 03:52:17 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=226176282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_pkt_received.226176282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_sent.1693000273 |
| Short name | T2631 |
| Test name | |
| Test status | |
| Simulation time | 210679306 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 03:52:15 AM UTC 24 |
| Finished | Aug 29 03:52:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1693000273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_pkt_sent.1693000273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_random_length_in_transaction.2063281854 |
| Short name | T2636 |
| Test name | |
| Test status | |
| Simulation time | 225264380 ps |
| CPU time | 0.91 seconds |
| Started | Aug 29 03:52:15 AM UTC 24 |
| Finished | Aug 29 03:52:17 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2063281854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 38.usbdev_random_length_in_transaction.2063281854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_random_length_out_transaction.4061281488 |
| Short name | T2634 |
| Test name | |
| Test status | |
| Simulation time | 240977892 ps |
| CPU time | 0.91 seconds |
| Started | Aug 29 03:52:15 AM UTC 24 |
| Finished | Aug 29 03:52:17 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4061281488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 38.usbdev_random_length_out_transaction.4061281488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_rx_crc_err.4181523038 |
| Short name | T2629 |
| Test name | |
| Test status | |
| Simulation time | 144269082 ps |
| CPU time | 0.71 seconds |
| Started | Aug 29 03:52:15 AM UTC 24 |
| Finished | Aug 29 03:52:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4181523038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 38.usbdev_rx_crc_err.4181523038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_rx_full.2678497624 |
| Short name | T2639 |
| Test name | |
| Test status | |
| Simulation time | 373018189 ps |
| CPU time | 1.16 seconds |
| Started | Aug 29 03:52:15 AM UTC 24 |
| Finished | Aug 29 03:52:18 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2678497624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_rx_full.2678497624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_setup_stage.85137516 |
| Short name | T2633 |
| Test name | |
| Test status | |
| Simulation time | 154279247 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 03:52:15 AM UTC 24 |
| Finished | Aug 29 03:52:17 AM UTC 24 |
| Peak memory | 214928 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=85137516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_setup_stage.85137516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_setup_trans_ignored.2920220864 |
| Short name | T2635 |
| Test name | |
| Test status | |
| Simulation time | 181453030 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 03:52:15 AM UTC 24 |
| Finished | Aug 29 03:52:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2920220864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 38.usbdev_setup_trans_ignored.2920220864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_smoke.609677505 |
| Short name | T2640 |
| Test name | |
| Test status | |
| Simulation time | 201337098 ps |
| CPU time | 0.93 seconds |
| Started | Aug 29 03:52:16 AM UTC 24 |
| Finished | Aug 29 03:52:18 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=609677505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_smoke.609677505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_spurious_pids_ignored.2509514973 |
| Short name | T2671 |
| Test name | |
| Test status | |
| Simulation time | 3215501976 ps |
| CPU time | 20.98 seconds |
| Started | Aug 29 03:52:16 AM UTC 24 |
| Finished | Aug 29 03:52:38 AM UTC 24 |
| Peak memory | 234328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2509514973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 38.usbdev_spurious_pids_ignored.2509514973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_stall_priority_over_nak.1824424063 |
| Short name | T2642 |
| Test name | |
| Test status | |
| Simulation time | 210720931 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 03:52:16 AM UTC 24 |
| Finished | Aug 29 03:52:18 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1824424063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_stall_priority_over_nak.1824424063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_stall_trans.2966118886 |
| Short name | T2638 |
| Test name | |
| Test status | |
| Simulation time | 157922924 ps |
| CPU time | 0.76 seconds |
| Started | Aug 29 03:52:16 AM UTC 24 |
| Finished | Aug 29 03:52:18 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2966118886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_stall_trans.2966118886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_stream_len_max.2119662184 |
| Short name | T2658 |
| Test name | |
| Test status | |
| Simulation time | 833144236 ps |
| CPU time | 2.24 seconds |
| Started | Aug 29 03:52:16 AM UTC 24 |
| Finished | Aug 29 03:52:19 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2119662184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_stream_len_max.2119662184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_streaming_out.2358201687 |
| Short name | T2670 |
| Test name | |
| Test status | |
| Simulation time | 3019947411 ps |
| CPU time | 19.2 seconds |
| Started | Aug 29 03:52:16 AM UTC 24 |
| Finished | Aug 29 03:52:36 AM UTC 24 |
| Peak memory | 227720 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2358201687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_streaming_out.2358201687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_timeout_missing_host_handshake.1255807840 |
| Short name | T2591 |
| Test name | |
| Test status | |
| Simulation time | 148652361 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 03:51:29 AM UTC 24 |
| Finished | Aug 29 03:51:32 AM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1255807840 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_timeout_missing_host_handshake.1255807840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/38.usbdev_tx_rx_disruption.901535811 |
| Short name | T2653 |
| Test name | |
| Test status | |
| Simulation time | 632613065 ps |
| CPU time | 1.78 seconds |
| Started | Aug 29 03:52:16 AM UTC 24 |
| Finished | Aug 29 03:52:19 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=901535811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_tx _rx_disruption.901535811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/38.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/380.usbdev_tx_rx_disruption.3871960595 |
| Short name | T3679 |
| Test name | |
| Test status | |
| Simulation time | 518241544 ps |
| CPU time | 1.44 seconds |
| Started | Aug 29 04:14:24 AM UTC 24 |
| Finished | Aug 29 04:14:27 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3871960595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 380.usbdev_ tx_rx_disruption.3871960595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/380.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/381.usbdev_tx_rx_disruption.2136796339 |
| Short name | T3677 |
| Test name | |
| Test status | |
| Simulation time | 431485570 ps |
| CPU time | 1.22 seconds |
| Started | Aug 29 04:14:24 AM UTC 24 |
| Finished | Aug 29 04:14:27 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2136796339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 381.usbdev_ tx_rx_disruption.2136796339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/381.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/382.usbdev_tx_rx_disruption.3314159650 |
| Short name | T3695 |
| Test name | |
| Test status | |
| Simulation time | 546314644 ps |
| CPU time | 1.84 seconds |
| Started | Aug 29 04:14:24 AM UTC 24 |
| Finished | Aug 29 04:14:27 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3314159650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 382.usbdev_ tx_rx_disruption.3314159650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/382.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/383.usbdev_tx_rx_disruption.241584069 |
| Short name | T3683 |
| Test name | |
| Test status | |
| Simulation time | 524748568 ps |
| CPU time | 1.51 seconds |
| Started | Aug 29 04:14:24 AM UTC 24 |
| Finished | Aug 29 04:14:27 AM UTC 24 |
| Peak memory | 216276 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=241584069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 383.usbdev_t x_rx_disruption.241584069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/383.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/384.usbdev_tx_rx_disruption.1089108098 |
| Short name | T3708 |
| Test name | |
| Test status | |
| Simulation time | 679803528 ps |
| CPU time | 2.29 seconds |
| Started | Aug 29 04:14:24 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 216588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1089108098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 384.usbdev_ tx_rx_disruption.1089108098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/384.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/385.usbdev_tx_rx_disruption.3101189944 |
| Short name | T3687 |
| Test name | |
| Test status | |
| Simulation time | 488741330 ps |
| CPU time | 1.65 seconds |
| Started | Aug 29 04:14:24 AM UTC 24 |
| Finished | Aug 29 04:14:27 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3101189944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 385.usbdev_ tx_rx_disruption.3101189944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/385.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/386.usbdev_tx_rx_disruption.1458499017 |
| Short name | T3688 |
| Test name | |
| Test status | |
| Simulation time | 620586749 ps |
| CPU time | 1.61 seconds |
| Started | Aug 29 04:14:24 AM UTC 24 |
| Finished | Aug 29 04:14:27 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1458499017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 386.usbdev_ tx_rx_disruption.1458499017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/386.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/387.usbdev_tx_rx_disruption.2872602369 |
| Short name | T3680 |
| Test name | |
| Test status | |
| Simulation time | 444437379 ps |
| CPU time | 1.32 seconds |
| Started | Aug 29 04:14:24 AM UTC 24 |
| Finished | Aug 29 04:14:27 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2872602369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 387.usbdev_ tx_rx_disruption.2872602369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/387.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/388.usbdev_tx_rx_disruption.980815060 |
| Short name | T3693 |
| Test name | |
| Test status | |
| Simulation time | 513217386 ps |
| CPU time | 1.68 seconds |
| Started | Aug 29 04:14:24 AM UTC 24 |
| Finished | Aug 29 04:14:27 AM UTC 24 |
| Peak memory | 216732 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=980815060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 388.usbdev_t x_rx_disruption.980815060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/388.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/389.usbdev_tx_rx_disruption.2472612151 |
| Short name | T3686 |
| Test name | |
| Test status | |
| Simulation time | 497238063 ps |
| CPU time | 1.41 seconds |
| Started | Aug 29 04:14:24 AM UTC 24 |
| Finished | Aug 29 04:14:27 AM UTC 24 |
| Peak memory | 216812 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2472612151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 389.usbdev_ tx_rx_disruption.2472612151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/389.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_alert_test.1549169771 |
| Short name | T2697 |
| Test name | |
| Test status | |
| Simulation time | 69386772 ps |
| CPU time | 0.63 seconds |
| Started | Aug 29 03:53:03 AM UTC 24 |
| Finished | Aug 29 03:53:05 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1549169771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 39.usbdev_alert_test.1549169771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_disconnect.2189615404 |
| Short name | T2667 |
| Test name | |
| Test status | |
| Simulation time | 11262279465 ps |
| CPU time | 14.87 seconds |
| Started | Aug 29 03:52:16 AM UTC 24 |
| Finished | Aug 29 03:52:32 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2189615404 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_disconnect.2189615404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_reset.2988772293 |
| Short name | T2674 |
| Test name | |
| Test status | |
| Simulation time | 21307476439 ps |
| CPU time | 24.01 seconds |
| Started | Aug 29 03:52:16 AM UTC 24 |
| Finished | Aug 29 03:52:41 AM UTC 24 |
| Peak memory | 217188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2988772293 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_reset.2988772293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_resume.2997365817 |
| Short name | T2681 |
| Test name | |
| Test status | |
| Simulation time | 28530544439 ps |
| CPU time | 34.09 seconds |
| Started | Aug 29 03:52:16 AM UTC 24 |
| Finished | Aug 29 03:52:51 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2997365817 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_resume.2997365817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_av_buffer.1166835353 |
| Short name | T2643 |
| Test name | |
| Test status | |
| Simulation time | 149334491 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:52:16 AM UTC 24 |
| Finished | Aug 29 03:52:18 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1166835353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_av_buffer.1166835353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_bitstuff_err.2986480612 |
| Short name | T2644 |
| Test name | |
| Test status | |
| Simulation time | 147835018 ps |
| CPU time | 0.76 seconds |
| Started | Aug 29 03:52:16 AM UTC 24 |
| Finished | Aug 29 03:52:18 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2986480612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_bitstuff_err.2986480612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_data_toggle_clear.1478213692 |
| Short name | T2646 |
| Test name | |
| Test status | |
| Simulation time | 209046642 ps |
| CPU time | 0.92 seconds |
| Started | Aug 29 03:52:16 AM UTC 24 |
| Finished | Aug 29 03:52:18 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1478213692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 39.usbdev_data_toggle_clear.1478213692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_data_toggle_restore.4761163 |
| Short name | T2657 |
| Test name | |
| Test status | |
| Simulation time | 679001724 ps |
| CPU time | 1.81 seconds |
| Started | Aug 29 03:52:16 AM UTC 24 |
| Finished | Aug 29 03:52:19 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4761163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs /coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_data_toggle_restore.4761163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_device_address.3561537515 |
| Short name | T2722 |
| Test name | |
| Test status | |
| Simulation time | 38351054138 ps |
| CPU time | 65.64 seconds |
| Started | Aug 29 03:52:16 AM UTC 24 |
| Finished | Aug 29 03:53:23 AM UTC 24 |
| Peak memory | 217476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3561537515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_device_address.3561537515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_device_timeout.1140115973 |
| Short name | T2679 |
| Test name | |
| Test status | |
| Simulation time | 5542303803 ps |
| CPU time | 32.4 seconds |
| Started | Aug 29 03:52:16 AM UTC 24 |
| Finished | Aug 29 03:52:50 AM UTC 24 |
| Peak memory | 217452 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1140115973 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_device_timeout.1140115973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_disable_endpoint.1436540532 |
| Short name | T2649 |
| Test name | |
| Test status | |
| Simulation time | 432037829 ps |
| CPU time | 1.29 seconds |
| Started | Aug 29 03:52:16 AM UTC 24 |
| Finished | Aug 29 03:52:19 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1436540532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 39.usbdev_disable_endpoint.1436540532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_disconnected.3337692776 |
| Short name | T2647 |
| Test name | |
| Test status | |
| Simulation time | 161558072 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 03:52:16 AM UTC 24 |
| Finished | Aug 29 03:52:18 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3337692776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_disconnected.3337692776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_enable.1561723259 |
| Short name | T2645 |
| Test name | |
| Test status | |
| Simulation time | 40406175 ps |
| CPU time | 0.65 seconds |
| Started | Aug 29 03:52:16 AM UTC 24 |
| Finished | Aug 29 03:52:18 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1561723259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 39.usbdev_enable.1561723259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_endpoint_access.4038061600 |
| Short name | T2664 |
| Test name | |
| Test status | |
| Simulation time | 867331352 ps |
| CPU time | 2.18 seconds |
| Started | Aug 29 03:52:16 AM UTC 24 |
| Finished | Aug 29 03:52:20 AM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4038061600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_endpoint_access.4038061600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_fifo_levels.1073723220 |
| Short name | T350 |
| Test name | |
| Test status | |
| Simulation time | 267131593 ps |
| CPU time | 1.14 seconds |
| Started | Aug 29 03:52:16 AM UTC 24 |
| Finished | Aug 29 03:52:19 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1073723220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_fifo_levels.1073723220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_fifo_rst.2210575454 |
| Short name | T2662 |
| Test name | |
| Test status | |
| Simulation time | 289351703 ps |
| CPU time | 1.59 seconds |
| Started | Aug 29 03:52:16 AM UTC 24 |
| Finished | Aug 29 03:52:19 AM UTC 24 |
| Peak memory | 214540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2210575454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_fifo_rst.2210575454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_in_iso.2962916288 |
| Short name | T2630 |
| Test name | |
| Test status | |
| Simulation time | 176010867 ps |
| CPU time | 0.88 seconds |
| Started | Aug 29 03:52:16 AM UTC 24 |
| Finished | Aug 29 03:52:18 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2962916288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 39.usbdev_in_iso.2962916288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_in_stall.674381009 |
| Short name | T2650 |
| Test name | |
| Test status | |
| Simulation time | 149026561 ps |
| CPU time | 1.05 seconds |
| Started | Aug 29 03:52:16 AM UTC 24 |
| Finished | Aug 29 03:52:19 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=674381009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 39.usbdev_in_stall.674381009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_in_trans.124424836 |
| Short name | T2637 |
| Test name | |
| Test status | |
| Simulation time | 178739933 ps |
| CPU time | 0.88 seconds |
| Started | Aug 29 03:52:16 AM UTC 24 |
| Finished | Aug 29 03:52:18 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=124424836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 39.usbdev_in_trans.124424836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_invalid_sync.3719478098 |
| Short name | T2724 |
| Test name | |
| Test status | |
| Simulation time | 3037753014 ps |
| CPU time | 69.51 seconds |
| Started | Aug 29 03:52:16 AM UTC 24 |
| Finished | Aug 29 03:53:28 AM UTC 24 |
| Peak memory | 229524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3719478098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 39.usbdev_invalid_sync.3719478098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_iso_retraction.319271535 |
| Short name | T2774 |
| Test name | |
| Test status | |
| Simulation time | 10157685909 ps |
| CPU time | 100.93 seconds |
| Started | Aug 29 03:52:16 AM UTC 24 |
| Finished | Aug 29 03:54:00 AM UTC 24 |
| Peak memory | 217464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=319271535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 39.usbdev_iso_retraction.319271535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_link_in_err.2542820151 |
| Short name | T2654 |
| Test name | |
| Test status | |
| Simulation time | 227118908 ps |
| CPU time | 1.16 seconds |
| Started | Aug 29 03:52:16 AM UTC 24 |
| Finished | Aug 29 03:52:19 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2542820151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_link_in_err.2542820151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_link_resume.2197410426 |
| Short name | T2668 |
| Test name | |
| Test status | |
| Simulation time | 11224812964 ps |
| CPU time | 14.14 seconds |
| Started | Aug 29 03:52:16 AM UTC 24 |
| Finished | Aug 29 03:52:32 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2197410426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_link_resume.2197410426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_link_suspend.185602340 |
| Short name | T2665 |
| Test name | |
| Test status | |
| Simulation time | 3459431314 ps |
| CPU time | 5.49 seconds |
| Started | Aug 29 03:52:16 AM UTC 24 |
| Finished | Aug 29 03:52:23 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=185602340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_link_suspend.185602340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_low_speed_traffic.3410541659 |
| Short name | T2676 |
| Test name | |
| Test status | |
| Simulation time | 2977179286 ps |
| CPU time | 23.94 seconds |
| Started | Aug 29 03:52:16 AM UTC 24 |
| Finished | Aug 29 03:52:42 AM UTC 24 |
| Peak memory | 229600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3410541659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_low_speed_traffic.3410541659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_max_inter_pkt_delay.1422769251 |
| Short name | T2677 |
| Test name | |
| Test status | |
| Simulation time | 4195892535 ps |
| CPU time | 26.99 seconds |
| Started | Aug 29 03:52:16 AM UTC 24 |
| Finished | Aug 29 03:52:45 AM UTC 24 |
| Peak memory | 229576 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1422769251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_max_inter_pkt_delay.1422769251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_max_length_in_transaction.1541409869 |
| Short name | T2659 |
| Test name | |
| Test status | |
| Simulation time | 255047675 ps |
| CPU time | 1.25 seconds |
| Started | Aug 29 03:52:16 AM UTC 24 |
| Finished | Aug 29 03:52:19 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1541409869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 39.usbdev_max_length_in_transaction.1541409869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_max_length_out_transaction.2880906983 |
| Short name | T2652 |
| Test name | |
| Test status | |
| Simulation time | 194426485 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 03:52:16 AM UTC 24 |
| Finished | Aug 29 03:52:19 AM UTC 24 |
| Peak memory | 214916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2880906983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 39.usbdev_max_length_out_transaction.2880906983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_min_inter_pkt_delay.3013819920 |
| Short name | T2666 |
| Test name | |
| Test status | |
| Simulation time | 2003855900 ps |
| CPU time | 12.86 seconds |
| Started | Aug 29 03:52:17 AM UTC 24 |
| Finished | Aug 29 03:52:31 AM UTC 24 |
| Peak memory | 234108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3013819920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_min_inter_pkt_delay.3013819920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_min_length_in_transaction.137956896 |
| Short name | T2648 |
| Test name | |
| Test status | |
| Simulation time | 194614021 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 03:52:17 AM UTC 24 |
| Finished | Aug 29 03:52:19 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=137956896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 39.usbdev_min_length_in_transaction.137956896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_min_length_out_transaction.4272809198 |
| Short name | T2663 |
| Test name | |
| Test status | |
| Simulation time | 156495487 ps |
| CPU time | 1.18 seconds |
| Started | Aug 29 03:52:17 AM UTC 24 |
| Finished | Aug 29 03:52:19 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4272809198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 39.usbdev_min_length_out_transaction.4272809198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_nak_trans.4050938620 |
| Short name | T2661 |
| Test name | |
| Test status | |
| Simulation time | 229823415 ps |
| CPU time | 1.11 seconds |
| Started | Aug 29 03:52:17 AM UTC 24 |
| Finished | Aug 29 03:52:19 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4050938620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_nak_trans.4050938620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_out_iso.761631070 |
| Short name | T2651 |
| Test name | |
| Test status | |
| Simulation time | 156607122 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 03:52:17 AM UTC 24 |
| Finished | Aug 29 03:52:19 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=761631070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 39.usbdev_out_iso.761631070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_out_stall.1305729808 |
| Short name | T2655 |
| Test name | |
| Test status | |
| Simulation time | 194704470 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 03:52:17 AM UTC 24 |
| Finished | Aug 29 03:52:19 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1305729808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_out_stall.1305729808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_out_trans_nak.3088198468 |
| Short name | T2660 |
| Test name | |
| Test status | |
| Simulation time | 190586852 ps |
| CPU time | 1.1 seconds |
| Started | Aug 29 03:52:17 AM UTC 24 |
| Finished | Aug 29 03:52:19 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3088198468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 39.usbdev_out_trans_nak.3088198468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_pending_in_trans.1912959124 |
| Short name | T2656 |
| Test name | |
| Test status | |
| Simulation time | 175421067 ps |
| CPU time | 0.95 seconds |
| Started | Aug 29 03:52:17 AM UTC 24 |
| Finished | Aug 29 03:52:19 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1912959124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 39.usbdev_pending_in_trans.1912959124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_phy_config_pinflip.3182638141 |
| Short name | T2684 |
| Test name | |
| Test status | |
| Simulation time | 260619717 ps |
| CPU time | 0.94 seconds |
| Started | Aug 29 03:53:03 AM UTC 24 |
| Finished | Aug 29 03:53:05 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3182638141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 39.usbdev_phy_config_pinflip.3182638141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_phy_config_usb_ref_disable.16201713 |
| Short name | T2683 |
| Test name | |
| Test status | |
| Simulation time | 147587701 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 03:53:03 AM UTC 24 |
| Finished | Aug 29 03:53:05 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=16201713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disab le_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 39.usbdev_phy_config_usb_ref_disable.16201713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_phy_pins_sense.3752776035 |
| Short name | T2682 |
| Test name | |
| Test status | |
| Simulation time | 33011281 ps |
| CPU time | 0.59 seconds |
| Started | Aug 29 03:53:03 AM UTC 24 |
| Finished | Aug 29 03:53:05 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3752776035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_phy_pins_sense.3752776035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_buffer.901496340 |
| Short name | T2732 |
| Test name | |
| Test status | |
| Simulation time | 19215793914 ps |
| CPU time | 46.2 seconds |
| Started | Aug 29 03:53:03 AM UTC 24 |
| Finished | Aug 29 03:53:51 AM UTC 24 |
| Peak memory | 231696 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=901496340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_pkt_buffer.901496340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_received.2502686286 |
| Short name | T2686 |
| Test name | |
| Test status | |
| Simulation time | 174507656 ps |
| CPU time | 0.88 seconds |
| Started | Aug 29 03:53:03 AM UTC 24 |
| Finished | Aug 29 03:53:05 AM UTC 24 |
| Peak memory | 214832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2502686286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_pkt_received.2502686286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_sent.4162149475 |
| Short name | T2685 |
| Test name | |
| Test status | |
| Simulation time | 193201560 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 03:53:03 AM UTC 24 |
| Finished | Aug 29 03:53:05 AM UTC 24 |
| Peak memory | 214812 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4162149475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_pkt_sent.4162149475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_random_length_in_transaction.3753056747 |
| Short name | T2688 |
| Test name | |
| Test status | |
| Simulation time | 183896824 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 03:53:03 AM UTC 24 |
| Finished | Aug 29 03:53:05 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3753056747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 39.usbdev_random_length_in_transaction.3753056747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_random_length_out_transaction.3310758617 |
| Short name | T2687 |
| Test name | |
| Test status | |
| Simulation time | 155990212 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 03:53:03 AM UTC 24 |
| Finished | Aug 29 03:53:05 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3310758617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 39.usbdev_random_length_out_transaction.3310758617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_rx_crc_err.1715103157 |
| Short name | T2689 |
| Test name | |
| Test status | |
| Simulation time | 153236184 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 03:53:03 AM UTC 24 |
| Finished | Aug 29 03:53:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1715103157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_rx_crc_err.1715103157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_rx_full.2464145813 |
| Short name | T2698 |
| Test name | |
| Test status | |
| Simulation time | 255581912 ps |
| CPU time | 1.05 seconds |
| Started | Aug 29 03:53:03 AM UTC 24 |
| Finished | Aug 29 03:53:05 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2464145813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 39.usbdev_rx_full.2464145813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_setup_stage.3888782853 |
| Short name | T2693 |
| Test name | |
| Test status | |
| Simulation time | 163207401 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 03:53:03 AM UTC 24 |
| Finished | Aug 29 03:53:05 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3888782853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_setup_stage.3888782853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_setup_trans_ignored.3253382806 |
| Short name | T2690 |
| Test name | |
| Test status | |
| Simulation time | 201549478 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 03:53:03 AM UTC 24 |
| Finished | Aug 29 03:53:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3253382806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 39.usbdev_setup_trans_ignored.3253382806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_smoke.1038538439 |
| Short name | T2696 |
| Test name | |
| Test status | |
| Simulation time | 200347578 ps |
| CPU time | 0.88 seconds |
| Started | Aug 29 03:53:03 AM UTC 24 |
| Finished | Aug 29 03:53:05 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1038538439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_smoke.1038538439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_spurious_pids_ignored.1262530471 |
| Short name | T2720 |
| Test name | |
| Test status | |
| Simulation time | 1925947347 ps |
| CPU time | 12.44 seconds |
| Started | Aug 29 03:53:03 AM UTC 24 |
| Finished | Aug 29 03:53:17 AM UTC 24 |
| Peak memory | 229600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1262530471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 39.usbdev_spurious_pids_ignored.1262530471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_stall_priority_over_nak.571976119 |
| Short name | T2695 |
| Test name | |
| Test status | |
| Simulation time | 221667347 ps |
| CPU time | 0.88 seconds |
| Started | Aug 29 03:53:03 AM UTC 24 |
| Finished | Aug 29 03:53:05 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=571976119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_stall_priority_over_nak.571976119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_stall_trans.148690332 |
| Short name | T2694 |
| Test name | |
| Test status | |
| Simulation time | 167698673 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 03:53:03 AM UTC 24 |
| Finished | Aug 29 03:53:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=148690332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_stall_trans.148690332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_stream_len_max.3033127127 |
| Short name | T2707 |
| Test name | |
| Test status | |
| Simulation time | 558035736 ps |
| CPU time | 1.56 seconds |
| Started | Aug 29 03:53:03 AM UTC 24 |
| Finished | Aug 29 03:53:06 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3033127127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_stream_len_max.3033127127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_streaming_out.266077289 |
| Short name | T2731 |
| Test name | |
| Test status | |
| Simulation time | 1865749664 ps |
| CPU time | 45.16 seconds |
| Started | Aug 29 03:53:03 AM UTC 24 |
| Finished | Aug 29 03:53:50 AM UTC 24 |
| Peak memory | 227396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=266077289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_streaming_out.266077289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_timeout_missing_host_handshake.989949304 |
| Short name | T2669 |
| Test name | |
| Test status | |
| Simulation time | 2894194549 ps |
| CPU time | 16.41 seconds |
| Started | Aug 29 03:52:16 AM UTC 24 |
| Finished | Aug 29 03:52:34 AM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=989949304 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_timeout_missing_host_handshake.989949304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/39.usbdev_tx_rx_disruption.3974081333 |
| Short name | T2703 |
| Test name | |
| Test status | |
| Simulation time | 501509134 ps |
| CPU time | 1.41 seconds |
| Started | Aug 29 03:53:03 AM UTC 24 |
| Finished | Aug 29 03:53:06 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3974081333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_t x_rx_disruption.3974081333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/39.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/390.usbdev_tx_rx_disruption.2548144772 |
| Short name | T3697 |
| Test name | |
| Test status | |
| Simulation time | 629637081 ps |
| CPU time | 1.76 seconds |
| Started | Aug 29 04:14:24 AM UTC 24 |
| Finished | Aug 29 04:14:27 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2548144772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 390.usbdev_ tx_rx_disruption.2548144772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/390.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/391.usbdev_tx_rx_disruption.1939851602 |
| Short name | T3692 |
| Test name | |
| Test status | |
| Simulation time | 588844751 ps |
| CPU time | 1.43 seconds |
| Started | Aug 29 04:14:24 AM UTC 24 |
| Finished | Aug 29 04:14:27 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1939851602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 391.usbdev_ tx_rx_disruption.1939851602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/391.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/392.usbdev_tx_rx_disruption.3271151475 |
| Short name | T3700 |
| Test name | |
| Test status | |
| Simulation time | 548272853 ps |
| CPU time | 1.82 seconds |
| Started | Aug 29 04:14:24 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3271151475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 392.usbdev_ tx_rx_disruption.3271151475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/392.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/393.usbdev_tx_rx_disruption.3511929818 |
| Short name | T3719 |
| Test name | |
| Test status | |
| Simulation time | 672755406 ps |
| CPU time | 2.25 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 217036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3511929818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 393.usbdev_ tx_rx_disruption.3511929818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/393.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/394.usbdev_tx_rx_disruption.2524554055 |
| Short name | T3694 |
| Test name | |
| Test status | |
| Simulation time | 494850621 ps |
| CPU time | 1.55 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:27 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2524554055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 394.usbdev_ tx_rx_disruption.2524554055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/394.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/395.usbdev_tx_rx_disruption.1721802850 |
| Short name | T3710 |
| Test name | |
| Test status | |
| Simulation time | 449487360 ps |
| CPU time | 1.96 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1721802850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 395.usbdev_ tx_rx_disruption.1721802850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/395.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/396.usbdev_tx_rx_disruption.3501209265 |
| Short name | T3699 |
| Test name | |
| Test status | |
| Simulation time | 503022339 ps |
| CPU time | 1.66 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:27 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3501209265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 396.usbdev_ tx_rx_disruption.3501209265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/396.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/397.usbdev_tx_rx_disruption.1361711430 |
| Short name | T3703 |
| Test name | |
| Test status | |
| Simulation time | 498663836 ps |
| CPU time | 1.81 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1361711430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 397.usbdev_ tx_rx_disruption.1361711430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/397.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/398.usbdev_tx_rx_disruption.3865548451 |
| Short name | T3706 |
| Test name | |
| Test status | |
| Simulation time | 625598573 ps |
| CPU time | 1.87 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3865548451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 398.usbdev_ tx_rx_disruption.3865548451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/398.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/399.usbdev_tx_rx_disruption.3913044298 |
| Short name | T3698 |
| Test name | |
| Test status | |
| Simulation time | 529963273 ps |
| CPU time | 1.46 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:27 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3913044298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 399.usbdev_ tx_rx_disruption.3913044298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/399.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_alert_test.4135897048 |
| Short name | T797 |
| Test name | |
| Test status | |
| Simulation time | 44798229 ps |
| CPU time | 1.02 seconds |
| Started | Aug 29 03:32:52 AM UTC 24 |
| Finished | Aug 29 03:32:54 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4135897048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 4.usbdev_alert_test.4135897048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_disconnect.4036984993 |
| Short name | T750 |
| Test name | |
| Test status | |
| Simulation time | 9887715558 ps |
| CPU time | 17.96 seconds |
| Started | Aug 29 03:31:49 AM UTC 24 |
| Finished | Aug 29 03:32:08 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4036984993 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_disconnect.4036984993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_reset.1218170652 |
| Short name | T225 |
| Test name | |
| Test status | |
| Simulation time | 14534280754 ps |
| CPU time | 34.25 seconds |
| Started | Aug 29 03:31:50 AM UTC 24 |
| Finished | Aug 29 03:32:26 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1218170652 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_reset.1218170652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_resume.755863723 |
| Short name | T789 |
| Test name | |
| Test status | |
| Simulation time | 25929916450 ps |
| CPU time | 56.77 seconds |
| Started | Aug 29 03:31:51 AM UTC 24 |
| Finished | Aug 29 03:32:50 AM UTC 24 |
| Peak memory | 227476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=755863723 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_resume.755863723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_av_buffer.1523210486 |
| Short name | T738 |
| Test name | |
| Test status | |
| Simulation time | 167440743 ps |
| CPU time | 1.34 seconds |
| Started | Aug 29 03:31:51 AM UTC 24 |
| Finished | Aug 29 03:31:53 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1523210486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_av_buffer.1523210486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_av_empty.2236108419 |
| Short name | T57 |
| Test name | |
| Test status | |
| Simulation time | 190142905 ps |
| CPU time | 1.45 seconds |
| Started | Aug 29 03:31:51 AM UTC 24 |
| Finished | Aug 29 03:31:54 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2236108419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_av_empty.2236108419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_av_overflow.253050624 |
| Short name | T90 |
| Test name | |
| Test status | |
| Simulation time | 183104331 ps |
| CPU time | 1.72 seconds |
| Started | Aug 29 03:31:53 AM UTC 24 |
| Finished | Aug 29 03:31:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=253050624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_av_overflow.253050624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_bitstuff_err.1844053601 |
| Short name | T739 |
| Test name | |
| Test status | |
| Simulation time | 150554163 ps |
| CPU time | 1.34 seconds |
| Started | Aug 29 03:31:53 AM UTC 24 |
| Finished | Aug 29 03:31:55 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1844053601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_bitstuff_err.1844053601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_data_toggle_clear.2943827550 |
| Short name | T740 |
| Test name | |
| Test status | |
| Simulation time | 383495142 ps |
| CPU time | 2.12 seconds |
| Started | Aug 29 03:31:55 AM UTC 24 |
| Finished | Aug 29 03:31:58 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2943827550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 4.usbdev_data_toggle_clear.2943827550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_data_toggle_restore.583255052 |
| Short name | T637 |
| Test name | |
| Test status | |
| Simulation time | 1065071224 ps |
| CPU time | 4.47 seconds |
| Started | Aug 29 03:31:55 AM UTC 24 |
| Finished | Aug 29 03:32:00 AM UTC 24 |
| Peak memory | 217188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=583255052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_data_toggle_restore.583255052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_device_address.4084551089 |
| Short name | T196 |
| Test name | |
| Test status | |
| Simulation time | 46309197329 ps |
| CPU time | 121.28 seconds |
| Started | Aug 29 03:31:55 AM UTC 24 |
| Finished | Aug 29 03:33:58 AM UTC 24 |
| Peak memory | 217324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4084551089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_device_address.4084551089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_device_timeout.875118769 |
| Short name | T776 |
| Test name | |
| Test status | |
| Simulation time | 5027263918 ps |
| CPU time | 39.33 seconds |
| Started | Aug 29 03:31:56 AM UTC 24 |
| Finished | Aug 29 03:32:37 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=875118769 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_device_timeout.875118769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_disable_endpoint.297155329 |
| Short name | T433 |
| Test name | |
| Test status | |
| Simulation time | 949297152 ps |
| CPU time | 3.25 seconds |
| Started | Aug 29 03:31:59 AM UTC 24 |
| Finished | Aug 29 03:32:03 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=297155329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_disable_endpoint.297155329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_disconnected.655698109 |
| Short name | T745 |
| Test name | |
| Test status | |
| Simulation time | 165388753 ps |
| CPU time | 1.43 seconds |
| Started | Aug 29 03:32:01 AM UTC 24 |
| Finished | Aug 29 03:32:04 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=655698109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_disconnected.655698109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_enable.3489846560 |
| Short name | T744 |
| Test name | |
| Test status | |
| Simulation time | 85795061 ps |
| CPU time | 1.2 seconds |
| Started | Aug 29 03:32:01 AM UTC 24 |
| Finished | Aug 29 03:32:04 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3489846560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 4.usbdev_enable.3489846560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_endpoint_access.124892869 |
| Short name | T748 |
| Test name | |
| Test status | |
| Simulation time | 822068979 ps |
| CPU time | 3.76 seconds |
| Started | Aug 29 03:32:01 AM UTC 24 |
| Finished | Aug 29 03:32:06 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=124892869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_endpoint_access.124892869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_endpoint_types.1260862794 |
| Short name | T531 |
| Test name | |
| Test status | |
| Simulation time | 205103232 ps |
| CPU time | 1.35 seconds |
| Started | Aug 29 03:32:04 AM UTC 24 |
| Finished | Aug 29 03:32:07 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1260862794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_endpoint_types.1260862794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_fifo_levels.1527396910 |
| Short name | T346 |
| Test name | |
| Test status | |
| Simulation time | 291619646 ps |
| CPU time | 1.91 seconds |
| Started | Aug 29 03:32:04 AM UTC 24 |
| Finished | Aug 29 03:32:07 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1527396910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_fifo_levels.1527396910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_fifo_rst.3050010550 |
| Short name | T751 |
| Test name | |
| Test status | |
| Simulation time | 281184048 ps |
| CPU time | 3.27 seconds |
| Started | Aug 29 03:32:04 AM UTC 24 |
| Finished | Aug 29 03:32:09 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3050010550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_fifo_rst.3050010550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_freq_hiclk.1203579702 |
| Short name | T1009 |
| Test name | |
| Test status | |
| Simulation time | 111250975181 ps |
| CPU time | 215.91 seconds |
| Started | Aug 29 03:32:04 AM UTC 24 |
| Finished | Aug 29 03:35:43 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1203579702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_hiclk.1203579702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_freq_hiclk_max.2449959834 |
| Short name | T1049 |
| Test name | |
| Test status | |
| Simulation time | 105254889909 ps |
| CPU time | 232.41 seconds |
| Started | Aug 29 03:32:06 AM UTC 24 |
| Finished | Aug 29 03:36:02 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=2449959834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 4.usbdev_freq_hiclk_max.2449959834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_freq_loclk.3004744526 |
| Short name | T644 |
| Test name | |
| Test status | |
| Simulation time | 81117177771 ps |
| CPU time | 196.89 seconds |
| Started | Aug 29 03:32:06 AM UTC 24 |
| Finished | Aug 29 03:35:26 AM UTC 24 |
| Peak memory | 217388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3004744526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_loclk.3004744526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_freq_loclk_max.1346682200 |
| Short name | T994 |
| Test name | |
| Test status | |
| Simulation time | 108998002401 ps |
| CPU time | 206.76 seconds |
| Started | Aug 29 03:32:07 AM UTC 24 |
| Finished | Aug 29 03:35:37 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=1346682200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 4.usbdev_freq_loclk_max.1346682200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_freq_phase.3647437374 |
| Short name | T959 |
| Test name | |
| Test status | |
| Simulation time | 102113120289 ps |
| CPU time | 187.03 seconds |
| Started | Aug 29 03:32:08 AM UTC 24 |
| Finished | Aug 29 03:35:18 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3647437374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_freq_phase.3647437374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_in_iso.211929740 |
| Short name | T754 |
| Test name | |
| Test status | |
| Simulation time | 215408663 ps |
| CPU time | 1.9 seconds |
| Started | Aug 29 03:32:08 AM UTC 24 |
| Finished | Aug 29 03:32:11 AM UTC 24 |
| Peak memory | 227416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=211929740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_in_iso.211929740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_in_stall.2201143007 |
| Short name | T755 |
| Test name | |
| Test status | |
| Simulation time | 152799424 ps |
| CPU time | 1.42 seconds |
| Started | Aug 29 03:32:09 AM UTC 24 |
| Finished | Aug 29 03:32:12 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2201143007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_in_stall.2201143007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_in_trans.1037856481 |
| Short name | T756 |
| Test name | |
| Test status | |
| Simulation time | 246267215 ps |
| CPU time | 1.62 seconds |
| Started | Aug 29 03:32:09 AM UTC 24 |
| Finished | Aug 29 03:32:12 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1037856481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_in_trans.1037856481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_invalid_sync.645982576 |
| Short name | T910 |
| Test name | |
| Test status | |
| Simulation time | 4386325459 ps |
| CPU time | 149.06 seconds |
| Started | Aug 29 03:32:08 AM UTC 24 |
| Finished | Aug 29 03:34:40 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=645982576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 4.usbdev_invalid_sync.645982576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_iso_retraction.540405884 |
| Short name | T836 |
| Test name | |
| Test status | |
| Simulation time | 10717295266 ps |
| CPU time | 84.55 seconds |
| Started | Aug 29 03:32:09 AM UTC 24 |
| Finished | Aug 29 03:33:36 AM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=540405884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 4.usbdev_iso_retraction.540405884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_link_in_err.1124501325 |
| Short name | T757 |
| Test name | |
| Test status | |
| Simulation time | 205772007 ps |
| CPU time | 1.58 seconds |
| Started | Aug 29 03:32:10 AM UTC 24 |
| Finished | Aug 29 03:32:13 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1124501325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_link_in_err.1124501325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_link_resume.3872570080 |
| Short name | T780 |
| Test name | |
| Test status | |
| Simulation time | 13486743118 ps |
| CPU time | 28.74 seconds |
| Started | Aug 29 03:32:12 AM UTC 24 |
| Finished | Aug 29 03:32:42 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3872570080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_link_resume.3872570080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_link_suspend.2705182693 |
| Short name | T100 |
| Test name | |
| Test status | |
| Simulation time | 11152532972 ps |
| CPU time | 37.76 seconds |
| Started | Aug 29 03:32:13 AM UTC 24 |
| Finished | Aug 29 03:32:52 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2705182693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_link_suspend.2705182693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_low_speed_traffic.1372547134 |
| Short name | T502 |
| Test name | |
| Test status | |
| Simulation time | 2888213507 ps |
| CPU time | 28.82 seconds |
| Started | Aug 29 03:32:13 AM UTC 24 |
| Finished | Aug 29 03:32:43 AM UTC 24 |
| Peak memory | 229584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1372547134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_low_speed_traffic.1372547134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_max_inter_pkt_delay.2989742414 |
| Short name | T784 |
| Test name | |
| Test status | |
| Simulation time | 2396075695 ps |
| CPU time | 29.71 seconds |
| Started | Aug 29 03:32:14 AM UTC 24 |
| Finished | Aug 29 03:32:45 AM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2989742414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_inter_pkt_delay.2989742414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_max_length_in_transaction.2852320735 |
| Short name | T760 |
| Test name | |
| Test status | |
| Simulation time | 260340477 ps |
| CPU time | 1.6 seconds |
| Started | Aug 29 03:32:14 AM UTC 24 |
| Finished | Aug 29 03:32:16 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2852320735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_max_length_in_transaction.2852320735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_max_length_out_transaction.1733422400 |
| Short name | T762 |
| Test name | |
| Test status | |
| Simulation time | 186794211 ps |
| CPU time | 1.42 seconds |
| Started | Aug 29 03:32:16 AM UTC 24 |
| Finished | Aug 29 03:32:18 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1733422400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 4.usbdev_max_length_out_transaction.1733422400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_max_non_iso_usb_traffic.1385711710 |
| Short name | T792 |
| Test name | |
| Test status | |
| Simulation time | 2270589508 ps |
| CPU time | 32.86 seconds |
| Started | Aug 29 03:32:16 AM UTC 24 |
| Finished | Aug 29 03:32:50 AM UTC 24 |
| Peak memory | 229608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1385711710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_non_iso_usb_traffic.1385711710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_max_usb_traffic.2578942455 |
| Short name | T853 |
| Test name | |
| Test status | |
| Simulation time | 2632751352 ps |
| CPU time | 93.3 seconds |
| Started | Aug 29 03:32:16 AM UTC 24 |
| Finished | Aug 29 03:33:52 AM UTC 24 |
| Peak memory | 234272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2578942455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_usb_traffic.2578942455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_min_inter_pkt_delay.3263328003 |
| Short name | T823 |
| Test name | |
| Test status | |
| Simulation time | 1947555407 ps |
| CPU time | 65.59 seconds |
| Started | Aug 29 03:32:17 AM UTC 24 |
| Finished | Aug 29 03:33:25 AM UTC 24 |
| Peak memory | 227432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3263328003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_min_inter_pkt_delay.3263328003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_min_length_in_transaction.2281906060 |
| Short name | T764 |
| Test name | |
| Test status | |
| Simulation time | 190373351 ps |
| CPU time | 1.56 seconds |
| Started | Aug 29 03:32:19 AM UTC 24 |
| Finished | Aug 29 03:32:21 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2281906060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_min_length_in_transaction.2281906060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_min_length_out_transaction.924638155 |
| Short name | T763 |
| Test name | |
| Test status | |
| Simulation time | 145206993 ps |
| CPU time | 1.51 seconds |
| Started | Aug 29 03:32:19 AM UTC 24 |
| Finished | Aug 29 03:32:21 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=924638155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 4.usbdev_min_length_out_transaction.924638155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_nak_trans.2633831346 |
| Short name | T125 |
| Test name | |
| Test status | |
| Simulation time | 219848728 ps |
| CPU time | 1.44 seconds |
| Started | Aug 29 03:32:20 AM UTC 24 |
| Finished | Aug 29 03:32:22 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2633831346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_nak_trans.2633831346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_out_iso.2442603960 |
| Short name | T766 |
| Test name | |
| Test status | |
| Simulation time | 170120109 ps |
| CPU time | 1.49 seconds |
| Started | Aug 29 03:32:22 AM UTC 24 |
| Finished | Aug 29 03:32:25 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2442603960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_out_iso.2442603960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_out_stall.2296217887 |
| Short name | T767 |
| Test name | |
| Test status | |
| Simulation time | 230450319 ps |
| CPU time | 1.52 seconds |
| Started | Aug 29 03:32:22 AM UTC 24 |
| Finished | Aug 29 03:32:25 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2296217887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_out_stall.2296217887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_out_trans_nak.2601289629 |
| Short name | T621 |
| Test name | |
| Test status | |
| Simulation time | 175682380 ps |
| CPU time | 1.49 seconds |
| Started | Aug 29 03:32:23 AM UTC 24 |
| Finished | Aug 29 03:32:26 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2601289629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 4.usbdev_out_trans_nak.2601289629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_pending_in_trans.1551605015 |
| Short name | T768 |
| Test name | |
| Test status | |
| Simulation time | 190435823 ps |
| CPU time | 1.52 seconds |
| Started | Aug 29 03:32:25 AM UTC 24 |
| Finished | Aug 29 03:32:27 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1551605015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_pending_in_trans.1551605015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_pinflip.2516496348 |
| Short name | T769 |
| Test name | |
| Test status | |
| Simulation time | 229188765 ps |
| CPU time | 1.75 seconds |
| Started | Aug 29 03:32:26 AM UTC 24 |
| Finished | Aug 29 03:32:29 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2516496348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_pinflip.2516496348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_rand_bus_type.873501150 |
| Short name | T770 |
| Test name | |
| Test status | |
| Simulation time | 273657065 ps |
| CPU time | 1.73 seconds |
| Started | Aug 29 03:32:26 AM UTC 24 |
| Finished | Aug 29 03:32:29 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=873501150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_typ e_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_rand_bus_type.873501150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_usb_ref_disable.3772643133 |
| Short name | T771 |
| Test name | |
| Test status | |
| Simulation time | 140083794 ps |
| CPU time | 1.31 seconds |
| Started | Aug 29 03:32:28 AM UTC 24 |
| Finished | Aug 29 03:32:30 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3772643133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_usb_ref_disable.3772643133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_phy_pins_sense.568448796 |
| Short name | T35 |
| Test name | |
| Test status | |
| Simulation time | 78426600 ps |
| CPU time | 1.2 seconds |
| Started | Aug 29 03:32:28 AM UTC 24 |
| Finished | Aug 29 03:32:30 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=568448796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 4.usbdev_phy_pins_sense.568448796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_buffer.3834468819 |
| Short name | T322 |
| Test name | |
| Test status | |
| Simulation time | 18724710421 ps |
| CPU time | 62.44 seconds |
| Started | Aug 29 03:32:28 AM UTC 24 |
| Finished | Aug 29 03:33:32 AM UTC 24 |
| Peak memory | 227564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3834468819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_pkt_buffer.3834468819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_received.1864683091 |
| Short name | T772 |
| Test name | |
| Test status | |
| Simulation time | 175397313 ps |
| CPU time | 1.27 seconds |
| Started | Aug 29 03:32:28 AM UTC 24 |
| Finished | Aug 29 03:32:30 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1864683091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_pkt_received.1864683091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_sent.3773269625 |
| Short name | T773 |
| Test name | |
| Test status | |
| Simulation time | 192306004 ps |
| CPU time | 1.59 seconds |
| Started | Aug 29 03:32:30 AM UTC 24 |
| Finished | Aug 29 03:32:32 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3773269625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_pkt_sent.3773269625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_rand_bus_disconnects.2097443448 |
| Short name | T182 |
| Test name | |
| Test status | |
| Simulation time | 3801762616 ps |
| CPU time | 35.34 seconds |
| Started | Aug 29 03:32:31 AM UTC 24 |
| Finished | Aug 29 03:33:08 AM UTC 24 |
| Peak memory | 227672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2097443448 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_bus_disconnects.2097443448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_rand_bus_resets.4068372124 |
| Short name | T806 |
| Test name | |
| Test status | |
| Simulation time | 3542918134 ps |
| CPU time | 33.17 seconds |
| Started | Aug 29 03:32:31 AM UTC 24 |
| Finished | Aug 29 03:33:06 AM UTC 24 |
| Peak memory | 229576 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4068372124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_bus_resets.4068372124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_rand_suspends.3431282179 |
| Short name | T857 |
| Test name | |
| Test status | |
| Simulation time | 5707395461 ps |
| CPU time | 81.61 seconds |
| Started | Aug 29 03:32:34 AM UTC 24 |
| Finished | Aug 29 03:33:57 AM UTC 24 |
| Peak memory | 229604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3431282179 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_suspends.3431282179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_random_length_in_transaction.4145831232 |
| Short name | T774 |
| Test name | |
| Test status | |
| Simulation time | 217599310 ps |
| CPU time | 1.62 seconds |
| Started | Aug 29 03:32:30 AM UTC 24 |
| Finished | Aug 29 03:32:33 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4145831232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 4.usbdev_random_length_in_transaction.4145831232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_random_length_out_transaction.986745955 |
| Short name | T775 |
| Test name | |
| Test status | |
| Simulation time | 166442590 ps |
| CPU time | 1.42 seconds |
| Started | Aug 29 03:32:31 AM UTC 24 |
| Finished | Aug 29 03:32:34 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=986745955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 4.usbdev_random_length_out_transaction.986745955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_resume_link_active.1285938502 |
| Short name | T816 |
| Test name | |
| Test status | |
| Simulation time | 20229264213 ps |
| CPU time | 42.92 seconds |
| Started | Aug 29 03:32:34 AM UTC 24 |
| Finished | Aug 29 03:33:18 AM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1285938502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 4.usbdev_resume_link_active.1285938502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_rx_crc_err.2807842033 |
| Short name | T777 |
| Test name | |
| Test status | |
| Simulation time | 166517738 ps |
| CPU time | 1.39 seconds |
| Started | Aug 29 03:32:35 AM UTC 24 |
| Finished | Aug 29 03:32:37 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2807842033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_rx_crc_err.2807842033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_rx_full.2782795176 |
| Short name | T54 |
| Test name | |
| Test status | |
| Simulation time | 251972299 ps |
| CPU time | 1.84 seconds |
| Started | Aug 29 03:32:38 AM UTC 24 |
| Finished | Aug 29 03:32:41 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2782795176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_rx_full.2782795176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_rx_pid_err.1496859588 |
| Short name | T779 |
| Test name | |
| Test status | |
| Simulation time | 175124531 ps |
| CPU time | 1.4 seconds |
| Started | Aug 29 03:32:38 AM UTC 24 |
| Finished | Aug 29 03:32:40 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1496859588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_rx_pid_err.1496859588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_sec_cm.766324694 |
| Short name | T237 |
| Test name | |
| Test status | |
| Simulation time | 339581501 ps |
| CPU time | 1.9 seconds |
| Started | Aug 29 03:32:51 AM UTC 24 |
| Finished | Aug 29 03:32:54 AM UTC 24 |
| Peak memory | 249172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=766324694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_sec_cm.766324694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_setup_priority.903912551 |
| Short name | T781 |
| Test name | |
| Test status | |
| Simulation time | 368960985 ps |
| CPU time | 2.29 seconds |
| Started | Aug 29 03:32:39 AM UTC 24 |
| Finished | Aug 29 03:32:43 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=903912551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 4.usbdev_setup_priority.903912551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_setup_priority_over_stall_response.2893467972 |
| Short name | T783 |
| Test name | |
| Test status | |
| Simulation time | 207157391 ps |
| CPU time | 1.5 seconds |
| Started | Aug 29 03:32:41 AM UTC 24 |
| Finished | Aug 29 03:32:44 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2893467972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 4.usbdev_setup_priority_over_stall_response.2893467972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_setup_stage.2177961511 |
| Short name | T782 |
| Test name | |
| Test status | |
| Simulation time | 174810363 ps |
| CPU time | 1.39 seconds |
| Started | Aug 29 03:32:41 AM UTC 24 |
| Finished | Aug 29 03:32:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2177961511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_setup_stage.2177961511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_setup_trans_ignored.3403756038 |
| Short name | T785 |
| Test name | |
| Test status | |
| Simulation time | 161837066 ps |
| CPU time | 1.36 seconds |
| Started | Aug 29 03:32:43 AM UTC 24 |
| Finished | Aug 29 03:32:45 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3403756038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 4.usbdev_setup_trans_ignored.3403756038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_smoke.4053916671 |
| Short name | T786 |
| Test name | |
| Test status | |
| Simulation time | 218732602 ps |
| CPU time | 1.58 seconds |
| Started | Aug 29 03:32:44 AM UTC 24 |
| Finished | Aug 29 03:32:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4053916671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_smoke.4053916671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_spurious_pids_ignored.1066761347 |
| Short name | T845 |
| Test name | |
| Test status | |
| Simulation time | 1997118690 ps |
| CPU time | 58.32 seconds |
| Started | Aug 29 03:32:44 AM UTC 24 |
| Finished | Aug 29 03:33:44 AM UTC 24 |
| Peak memory | 227504 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1066761347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 4.usbdev_spurious_pids_ignored.1066761347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_stall_priority_over_nak.3914732318 |
| Short name | T787 |
| Test name | |
| Test status | |
| Simulation time | 156025635 ps |
| CPU time | 1.2 seconds |
| Started | Aug 29 03:32:45 AM UTC 24 |
| Finished | Aug 29 03:32:47 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3914732318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stall_priority_over_nak.3914732318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_stall_trans.2412288856 |
| Short name | T788 |
| Test name | |
| Test status | |
| Simulation time | 212317272 ps |
| CPU time | 1.55 seconds |
| Started | Aug 29 03:32:45 AM UTC 24 |
| Finished | Aug 29 03:32:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2412288856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_stall_trans.2412288856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_stream_len_max.1053698423 |
| Short name | T790 |
| Test name | |
| Test status | |
| Simulation time | 484755049 ps |
| CPU time | 2.22 seconds |
| Started | Aug 29 03:32:46 AM UTC 24 |
| Finished | Aug 29 03:32:50 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1053698423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stream_len_max.1053698423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_streaming_out.1775530699 |
| Short name | T923 |
| Test name | |
| Test status | |
| Simulation time | 3511401971 ps |
| CPU time | 119.05 seconds |
| Started | Aug 29 03:32:46 AM UTC 24 |
| Finished | Aug 29 03:34:48 AM UTC 24 |
| Peak memory | 227660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1775530699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_streaming_out.1775530699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_timeout_missing_host_handshake.1302169346 |
| Short name | T778 |
| Test name | |
| Test status | |
| Simulation time | 4362839391 ps |
| CPU time | 39.79 seconds |
| Started | Aug 29 03:31:57 AM UTC 24 |
| Finished | Aug 29 03:32:38 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1302169346 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_timeout_missing_host_handshake.1302169346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/4.usbdev_tx_rx_disruption.484253389 |
| Short name | T204 |
| Test name | |
| Test status | |
| Simulation time | 491968754 ps |
| CPU time | 2.38 seconds |
| Started | Aug 29 03:32:49 AM UTC 24 |
| Finished | Aug 29 03:32:53 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=484253389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_tx_ rx_disruption.484253389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/4.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_alert_test.2020658715 |
| Short name | T2747 |
| Test name | |
| Test status | |
| Simulation time | 48811324 ps |
| CPU time | 0.6 seconds |
| Started | Aug 29 03:53:55 AM UTC 24 |
| Finished | Aug 29 03:53:56 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2020658715 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 40.usbdev_alert_test.2020658715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_disconnect.3583551945 |
| Short name | T2577 |
| Test name | |
| Test status | |
| Simulation time | 6708268517 ps |
| CPU time | 9.48 seconds |
| Started | Aug 29 03:53:03 AM UTC 24 |
| Finished | Aug 29 03:53:14 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3583551945 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_disconnect.3583551945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_reset.2470275860 |
| Short name | T2725 |
| Test name | |
| Test status | |
| Simulation time | 19329563767 ps |
| CPU time | 24.89 seconds |
| Started | Aug 29 03:53:03 AM UTC 24 |
| Finished | Aug 29 03:53:30 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2470275860 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_reset.2470275860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_resume.3148076919 |
| Short name | T2728 |
| Test name | |
| Test status | |
| Simulation time | 26429934319 ps |
| CPU time | 29.91 seconds |
| Started | Aug 29 03:53:03 AM UTC 24 |
| Finished | Aug 29 03:53:35 AM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3148076919 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_resume.3148076919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_av_buffer.2438775821 |
| Short name | T2699 |
| Test name | |
| Test status | |
| Simulation time | 220062314 ps |
| CPU time | 0.88 seconds |
| Started | Aug 29 03:53:03 AM UTC 24 |
| Finished | Aug 29 03:53:06 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2438775821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_av_buffer.2438775821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_bitstuff_err.3681471747 |
| Short name | T2700 |
| Test name | |
| Test status | |
| Simulation time | 167954617 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 03:53:03 AM UTC 24 |
| Finished | Aug 29 03:53:06 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3681471747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_bitstuff_err.3681471747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_data_toggle_clear.3844233829 |
| Short name | T2717 |
| Test name | |
| Test status | |
| Simulation time | 449531898 ps |
| CPU time | 1.5 seconds |
| Started | Aug 29 03:53:03 AM UTC 24 |
| Finished | Aug 29 03:53:06 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3844233829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 40.usbdev_data_toggle_clear.3844233829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_data_toggle_restore.1331124022 |
| Short name | T2709 |
| Test name | |
| Test status | |
| Simulation time | 374396839 ps |
| CPU time | 1.14 seconds |
| Started | Aug 29 03:53:03 AM UTC 24 |
| Finished | Aug 29 03:53:06 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1331124022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_data_toggle_restore.1331124022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_device_address.557841581 |
| Short name | T2730 |
| Test name | |
| Test status | |
| Simulation time | 23101636322 ps |
| CPU time | 36.03 seconds |
| Started | Aug 29 03:53:03 AM UTC 24 |
| Finished | Aug 29 03:53:41 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=557841581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 40.usbdev_device_address.557841581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_device_timeout.2147886372 |
| Short name | T2729 |
| Test name | |
| Test status | |
| Simulation time | 5705851646 ps |
| CPU time | 31.2 seconds |
| Started | Aug 29 03:53:03 AM UTC 24 |
| Finished | Aug 29 03:53:36 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2147886372 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_device_timeout.2147886372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_disable_endpoint.1230744747 |
| Short name | T2719 |
| Test name | |
| Test status | |
| Simulation time | 892528893 ps |
| CPU time | 1.99 seconds |
| Started | Aug 29 03:53:04 AM UTC 24 |
| Finished | Aug 29 03:53:07 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1230744747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 40.usbdev_disable_endpoint.1230744747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_disconnected.3218243140 |
| Short name | T2702 |
| Test name | |
| Test status | |
| Simulation time | 140038690 ps |
| CPU time | 0.71 seconds |
| Started | Aug 29 03:53:04 AM UTC 24 |
| Finished | Aug 29 03:53:06 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3218243140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_disconnected.3218243140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_enable.3560421193 |
| Short name | T2701 |
| Test name | |
| Test status | |
| Simulation time | 50847602 ps |
| CPU time | 0.63 seconds |
| Started | Aug 29 03:53:04 AM UTC 24 |
| Finished | Aug 29 03:53:06 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3560421193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 40.usbdev_enable.3560421193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_endpoint_access.3600875890 |
| Short name | T2691 |
| Test name | |
| Test status | |
| Simulation time | 827325974 ps |
| CPU time | 2.07 seconds |
| Started | Aug 29 03:53:04 AM UTC 24 |
| Finished | Aug 29 03:53:07 AM UTC 24 |
| Peak memory | 217040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3600875890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_endpoint_access.3600875890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_fifo_levels.4262690985 |
| Short name | T2705 |
| Test name | |
| Test status | |
| Simulation time | 174435636 ps |
| CPU time | 0.94 seconds |
| Started | Aug 29 03:53:04 AM UTC 24 |
| Finished | Aug 29 03:53:06 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4262690985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_fifo_levels.4262690985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_fifo_rst.3656339671 |
| Short name | T2718 |
| Test name | |
| Test status | |
| Simulation time | 261065344 ps |
| CPU time | 1.65 seconds |
| Started | Aug 29 03:53:04 AM UTC 24 |
| Finished | Aug 29 03:53:07 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3656339671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_fifo_rst.3656339671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_in_iso.2828424446 |
| Short name | T2710 |
| Test name | |
| Test status | |
| Simulation time | 178263465 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 03:53:04 AM UTC 24 |
| Finished | Aug 29 03:53:06 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2828424446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 40.usbdev_in_iso.2828424446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_in_stall.2419062283 |
| Short name | T2708 |
| Test name | |
| Test status | |
| Simulation time | 203526091 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 03:53:04 AM UTC 24 |
| Finished | Aug 29 03:53:06 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2419062283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_in_stall.2419062283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_in_trans.4081265816 |
| Short name | T2706 |
| Test name | |
| Test status | |
| Simulation time | 199168137 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 03:53:04 AM UTC 24 |
| Finished | Aug 29 03:53:06 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4081265816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_in_trans.4081265816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_invalid_sync.3907238175 |
| Short name | T2727 |
| Test name | |
| Test status | |
| Simulation time | 4444855221 ps |
| CPU time | 29.39 seconds |
| Started | Aug 29 03:53:04 AM UTC 24 |
| Finished | Aug 29 03:53:35 AM UTC 24 |
| Peak memory | 229516 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3907238175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 40.usbdev_invalid_sync.3907238175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_iso_retraction.1238896327 |
| Short name | T2779 |
| Test name | |
| Test status | |
| Simulation time | 10939087512 ps |
| CPU time | 69.7 seconds |
| Started | Aug 29 03:53:04 AM UTC 24 |
| Finished | Aug 29 03:54:16 AM UTC 24 |
| Peak memory | 217464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1238896327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_iso_retraction.1238896327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_link_in_err.2394775250 |
| Short name | T2711 |
| Test name | |
| Test status | |
| Simulation time | 233749920 ps |
| CPU time | 0.95 seconds |
| Started | Aug 29 03:53:04 AM UTC 24 |
| Finished | Aug 29 03:53:06 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2394775250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_link_in_err.2394775250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_link_resume.3822476451 |
| Short name | T2721 |
| Test name | |
| Test status | |
| Simulation time | 10540609900 ps |
| CPU time | 13.79 seconds |
| Started | Aug 29 03:53:04 AM UTC 24 |
| Finished | Aug 29 03:53:19 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3822476451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_link_resume.3822476451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_link_suspend.425752790 |
| Short name | T2692 |
| Test name | |
| Test status | |
| Simulation time | 4424313190 ps |
| CPU time | 6.69 seconds |
| Started | Aug 29 03:53:04 AM UTC 24 |
| Finished | Aug 29 03:53:12 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=425752790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_link_suspend.425752790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_low_speed_traffic.367348136 |
| Short name | T2776 |
| Test name | |
| Test status | |
| Simulation time | 2548740969 ps |
| CPU time | 62.35 seconds |
| Started | Aug 29 03:53:04 AM UTC 24 |
| Finished | Aug 29 03:54:08 AM UTC 24 |
| Peak memory | 229596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=367348136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_low_speed_traffic.367348136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_max_inter_pkt_delay.1852706246 |
| Short name | T2723 |
| Test name | |
| Test status | |
| Simulation time | 3119867080 ps |
| CPU time | 20.28 seconds |
| Started | Aug 29 03:53:04 AM UTC 24 |
| Finished | Aug 29 03:53:26 AM UTC 24 |
| Peak memory | 227660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1852706246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_max_inter_pkt_delay.1852706246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_max_length_in_transaction.2909433068 |
| Short name | T2713 |
| Test name | |
| Test status | |
| Simulation time | 240933464 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 03:53:04 AM UTC 24 |
| Finished | Aug 29 03:53:06 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2909433068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 40.usbdev_max_length_in_transaction.2909433068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_max_length_out_transaction.2244453679 |
| Short name | T2716 |
| Test name | |
| Test status | |
| Simulation time | 215890209 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 03:53:04 AM UTC 24 |
| Finished | Aug 29 03:53:06 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2244453679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 40.usbdev_max_length_out_transaction.2244453679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_min_inter_pkt_delay.1224302071 |
| Short name | T2726 |
| Test name | |
| Test status | |
| Simulation time | 3060536904 ps |
| CPU time | 26 seconds |
| Started | Aug 29 03:53:04 AM UTC 24 |
| Finished | Aug 29 03:53:32 AM UTC 24 |
| Peak memory | 227624 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1224302071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_min_inter_pkt_delay.1224302071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_min_length_in_transaction.842658255 |
| Short name | T2714 |
| Test name | |
| Test status | |
| Simulation time | 152496792 ps |
| CPU time | 0.94 seconds |
| Started | Aug 29 03:53:04 AM UTC 24 |
| Finished | Aug 29 03:53:06 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=842658255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 40.usbdev_min_length_in_transaction.842658255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_min_length_out_transaction.3024846582 |
| Short name | T2715 |
| Test name | |
| Test status | |
| Simulation time | 148830455 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 03:53:04 AM UTC 24 |
| Finished | Aug 29 03:53:06 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3024846582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 40.usbdev_min_length_out_transaction.3024846582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_nak_trans.602517767 |
| Short name | T2712 |
| Test name | |
| Test status | |
| Simulation time | 209208453 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 03:53:04 AM UTC 24 |
| Finished | Aug 29 03:53:06 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=602517767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_nak_trans.602517767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_out_iso.3703930190 |
| Short name | T2735 |
| Test name | |
| Test status | |
| Simulation time | 179785081 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 03:53:54 AM UTC 24 |
| Finished | Aug 29 03:53:56 AM UTC 24 |
| Peak memory | 214888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3703930190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_out_iso.3703930190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_out_stall.2181887852 |
| Short name | T2739 |
| Test name | |
| Test status | |
| Simulation time | 218297061 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:53:54 AM UTC 24 |
| Finished | Aug 29 03:53:56 AM UTC 24 |
| Peak memory | 214848 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2181887852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_out_stall.2181887852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_out_trans_nak.1611579948 |
| Short name | T2738 |
| Test name | |
| Test status | |
| Simulation time | 184441636 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:53:54 AM UTC 24 |
| Finished | Aug 29 03:53:56 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1611579948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 40.usbdev_out_trans_nak.1611579948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_pending_in_trans.3915349628 |
| Short name | T2733 |
| Test name | |
| Test status | |
| Simulation time | 163928898 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 03:53:54 AM UTC 24 |
| Finished | Aug 29 03:53:56 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3915349628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 40.usbdev_pending_in_trans.3915349628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_phy_config_pinflip.2183530991 |
| Short name | T2740 |
| Test name | |
| Test status | |
| Simulation time | 189177573 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:53:54 AM UTC 24 |
| Finished | Aug 29 03:53:56 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2183530991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 40.usbdev_phy_config_pinflip.2183530991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_phy_config_usb_ref_disable.2031758110 |
| Short name | T2736 |
| Test name | |
| Test status | |
| Simulation time | 145680718 ps |
| CPU time | 0.75 seconds |
| Started | Aug 29 03:53:54 AM UTC 24 |
| Finished | Aug 29 03:53:56 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2031758110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 40.usbdev_phy_config_usb_ref_disable.2031758110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_phy_pins_sense.2243085133 |
| Short name | T2734 |
| Test name | |
| Test status | |
| Simulation time | 38502492 ps |
| CPU time | 0.6 seconds |
| Started | Aug 29 03:53:54 AM UTC 24 |
| Finished | Aug 29 03:53:56 AM UTC 24 |
| Peak memory | 214928 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2243085133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_phy_pins_sense.2243085133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_buffer.3202885997 |
| Short name | T2788 |
| Test name | |
| Test status | |
| Simulation time | 19362175897 ps |
| CPU time | 42.06 seconds |
| Started | Aug 29 03:53:54 AM UTC 24 |
| Finished | Aug 29 03:54:38 AM UTC 24 |
| Peak memory | 227736 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3202885997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 40.usbdev_pkt_buffer.3202885997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_received.461801468 |
| Short name | T2742 |
| Test name | |
| Test status | |
| Simulation time | 189298862 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 03:53:54 AM UTC 24 |
| Finished | Aug 29 03:53:56 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=461801468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_pkt_received.461801468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_sent.3067699356 |
| Short name | T2749 |
| Test name | |
| Test status | |
| Simulation time | 226225890 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 03:53:54 AM UTC 24 |
| Finished | Aug 29 03:53:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3067699356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_pkt_sent.3067699356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_random_length_in_transaction.987859508 |
| Short name | T2746 |
| Test name | |
| Test status | |
| Simulation time | 218938736 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 03:53:54 AM UTC 24 |
| Finished | Aug 29 03:53:56 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=987859508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_random_length_in_transaction.987859508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_random_length_out_transaction.2184386015 |
| Short name | T2743 |
| Test name | |
| Test status | |
| Simulation time | 185614645 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 03:53:54 AM UTC 24 |
| Finished | Aug 29 03:53:56 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2184386015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 40.usbdev_random_length_out_transaction.2184386015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_rx_crc_err.741783694 |
| Short name | T2744 |
| Test name | |
| Test status | |
| Simulation time | 166912392 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 03:53:54 AM UTC 24 |
| Finished | Aug 29 03:53:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=741783694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_rx_crc_err.741783694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_rx_full.4260881929 |
| Short name | T2753 |
| Test name | |
| Test status | |
| Simulation time | 377466626 ps |
| CPU time | 1.24 seconds |
| Started | Aug 29 03:53:54 AM UTC 24 |
| Finished | Aug 29 03:53:57 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4260881929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_rx_full.4260881929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_setup_stage.265574441 |
| Short name | T2748 |
| Test name | |
| Test status | |
| Simulation time | 147441235 ps |
| CPU time | 0.76 seconds |
| Started | Aug 29 03:53:54 AM UTC 24 |
| Finished | Aug 29 03:53:56 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=265574441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 40.usbdev_setup_stage.265574441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_setup_trans_ignored.1515775426 |
| Short name | T2745 |
| Test name | |
| Test status | |
| Simulation time | 190068119 ps |
| CPU time | 0.82 seconds |
| Started | Aug 29 03:53:54 AM UTC 24 |
| Finished | Aug 29 03:53:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1515775426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 40.usbdev_setup_trans_ignored.1515775426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_smoke.987387613 |
| Short name | T2751 |
| Test name | |
| Test status | |
| Simulation time | 231805046 ps |
| CPU time | 0.91 seconds |
| Started | Aug 29 03:53:54 AM UTC 24 |
| Finished | Aug 29 03:53:56 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=987387613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_smoke.987387613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_spurious_pids_ignored.1112071171 |
| Short name | T2785 |
| Test name | |
| Test status | |
| Simulation time | 3568554867 ps |
| CPU time | 30.34 seconds |
| Started | Aug 29 03:53:54 AM UTC 24 |
| Finished | Aug 29 03:54:26 AM UTC 24 |
| Peak memory | 229720 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1112071171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 40.usbdev_spurious_pids_ignored.1112071171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_stall_priority_over_nak.3360941097 |
| Short name | T2750 |
| Test name | |
| Test status | |
| Simulation time | 184246760 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 03:53:54 AM UTC 24 |
| Finished | Aug 29 03:53:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3360941097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_stall_priority_over_nak.3360941097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_stall_trans.3741027539 |
| Short name | T2752 |
| Test name | |
| Test status | |
| Simulation time | 198390698 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:53:54 AM UTC 24 |
| Finished | Aug 29 03:53:57 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3741027539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_stall_trans.3741027539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_stream_len_max.1518699178 |
| Short name | T2756 |
| Test name | |
| Test status | |
| Simulation time | 372832513 ps |
| CPU time | 1.23 seconds |
| Started | Aug 29 03:53:54 AM UTC 24 |
| Finished | Aug 29 03:53:57 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1518699178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_stream_len_max.1518699178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_streaming_out.4246159016 |
| Short name | T2783 |
| Test name | |
| Test status | |
| Simulation time | 2627623927 ps |
| CPU time | 22.23 seconds |
| Started | Aug 29 03:53:54 AM UTC 24 |
| Finished | Aug 29 03:54:18 AM UTC 24 |
| Peak memory | 229640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4246159016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_streaming_out.4246159016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_timeout_missing_host_handshake.2956103754 |
| Short name | T2704 |
| Test name | |
| Test status | |
| Simulation time | 348067123 ps |
| CPU time | 3.89 seconds |
| Started | Aug 29 03:53:03 AM UTC 24 |
| Finished | Aug 29 03:53:09 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2956103754 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_timeout_missing_host_handshake.2956103754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/40.usbdev_tx_rx_disruption.4230757547 |
| Short name | T2763 |
| Test name | |
| Test status | |
| Simulation time | 590346186 ps |
| CPU time | 1.46 seconds |
| Started | Aug 29 03:53:55 AM UTC 24 |
| Finished | Aug 29 03:53:57 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4230757547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_t x_rx_disruption.4230757547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/40.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/400.usbdev_tx_rx_disruption.2166464720 |
| Short name | T3702 |
| Test name | |
| Test status | |
| Simulation time | 539935371 ps |
| CPU time | 1.82 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2166464720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 400.usbdev_ tx_rx_disruption.2166464720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/400.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/401.usbdev_tx_rx_disruption.1407463688 |
| Short name | T3713 |
| Test name | |
| Test status | |
| Simulation time | 740726870 ps |
| CPU time | 1.91 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 215020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1407463688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 401.usbdev_ tx_rx_disruption.1407463688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/401.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/402.usbdev_tx_rx_disruption.1354352165 |
| Short name | T3705 |
| Test name | |
| Test status | |
| Simulation time | 496255341 ps |
| CPU time | 1.69 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1354352165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 402.usbdev_ tx_rx_disruption.1354352165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/402.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/403.usbdev_tx_rx_disruption.2054913041 |
| Short name | T121 |
| Test name | |
| Test status | |
| Simulation time | 633102673 ps |
| CPU time | 1.63 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2054913041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 403.usbdev_ tx_rx_disruption.2054913041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/403.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/404.usbdev_tx_rx_disruption.239476606 |
| Short name | T3711 |
| Test name | |
| Test status | |
| Simulation time | 474200018 ps |
| CPU time | 1.78 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=239476606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 404.usbdev_t x_rx_disruption.239476606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/404.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/405.usbdev_tx_rx_disruption.1927605092 |
| Short name | T3709 |
| Test name | |
| Test status | |
| Simulation time | 602630405 ps |
| CPU time | 1.6 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1927605092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 405.usbdev_ tx_rx_disruption.1927605092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/405.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/406.usbdev_tx_rx_disruption.2229135911 |
| Short name | T3704 |
| Test name | |
| Test status | |
| Simulation time | 444728877 ps |
| CPU time | 1.52 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2229135911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 406.usbdev_ tx_rx_disruption.2229135911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/406.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/407.usbdev_tx_rx_disruption.1800921051 |
| Short name | T3707 |
| Test name | |
| Test status | |
| Simulation time | 493088376 ps |
| CPU time | 1.64 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1800921051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 407.usbdev_ tx_rx_disruption.1800921051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/407.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/408.usbdev_tx_rx_disruption.2143796192 |
| Short name | T3724 |
| Test name | |
| Test status | |
| Simulation time | 526290632 ps |
| CPU time | 2.01 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2143796192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 408.usbdev_ tx_rx_disruption.2143796192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/408.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/409.usbdev_tx_rx_disruption.2995990073 |
| Short name | T3732 |
| Test name | |
| Test status | |
| Simulation time | 570311342 ps |
| CPU time | 2.21 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2995990073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 409.usbdev_ tx_rx_disruption.2995990073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/409.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_alert_test.2412777033 |
| Short name | T2805 |
| Test name | |
| Test status | |
| Simulation time | 49971533 ps |
| CPU time | 0.62 seconds |
| Started | Aug 29 03:54:48 AM UTC 24 |
| Finished | Aug 29 03:54:50 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2412777033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 41.usbdev_alert_test.2412777033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_disconnect.2449594911 |
| Short name | T2778 |
| Test name | |
| Test status | |
| Simulation time | 12043323134 ps |
| CPU time | 17.89 seconds |
| Started | Aug 29 03:53:55 AM UTC 24 |
| Finished | Aug 29 03:54:14 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2449594911 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_disconnect.2449594911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_reset.3865745459 |
| Short name | T2782 |
| Test name | |
| Test status | |
| Simulation time | 18645868770 ps |
| CPU time | 22.05 seconds |
| Started | Aug 29 03:53:55 AM UTC 24 |
| Finished | Aug 29 03:54:18 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3865745459 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_reset.3865745459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_resume.918374160 |
| Short name | T2787 |
| Test name | |
| Test status | |
| Simulation time | 23471711178 ps |
| CPU time | 31.25 seconds |
| Started | Aug 29 03:53:55 AM UTC 24 |
| Finished | Aug 29 03:54:27 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=918374160 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_resume.918374160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_av_buffer.561555441 |
| Short name | T2754 |
| Test name | |
| Test status | |
| Simulation time | 157238949 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:53:55 AM UTC 24 |
| Finished | Aug 29 03:53:57 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=561555441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_av_buffer.561555441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_bitstuff_err.675729485 |
| Short name | T2761 |
| Test name | |
| Test status | |
| Simulation time | 159392097 ps |
| CPU time | 0.99 seconds |
| Started | Aug 29 03:53:55 AM UTC 24 |
| Finished | Aug 29 03:53:57 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=675729485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_bitstuff_err.675729485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_data_toggle_clear.2880288574 |
| Short name | T2758 |
| Test name | |
| Test status | |
| Simulation time | 195527144 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:53:55 AM UTC 24 |
| Finished | Aug 29 03:53:57 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2880288574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 41.usbdev_data_toggle_clear.2880288574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_data_toggle_restore.2729675001 |
| Short name | T2755 |
| Test name | |
| Test status | |
| Simulation time | 327473173 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 03:53:55 AM UTC 24 |
| Finished | Aug 29 03:53:57 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2729675001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_data_toggle_restore.2729675001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_device_address.2861809407 |
| Short name | T2831 |
| Test name | |
| Test status | |
| Simulation time | 42750518791 ps |
| CPU time | 67.91 seconds |
| Started | Aug 29 03:53:55 AM UTC 24 |
| Finished | Aug 29 03:55:05 AM UTC 24 |
| Peak memory | 217464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2861809407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_device_address.2861809407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_device_timeout.2925584910 |
| Short name | T2775 |
| Test name | |
| Test status | |
| Simulation time | 1533855187 ps |
| CPU time | 8.41 seconds |
| Started | Aug 29 03:53:55 AM UTC 24 |
| Finished | Aug 29 03:54:04 AM UTC 24 |
| Peak memory | 217196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2925584910 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_device_timeout.2925584910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_disable_endpoint.2222197654 |
| Short name | T2772 |
| Test name | |
| Test status | |
| Simulation time | 891927300 ps |
| CPU time | 2.08 seconds |
| Started | Aug 29 03:53:55 AM UTC 24 |
| Finished | Aug 29 03:53:58 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2222197654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 41.usbdev_disable_endpoint.2222197654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_disconnected.3196708550 |
| Short name | T2759 |
| Test name | |
| Test status | |
| Simulation time | 145141913 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 03:53:55 AM UTC 24 |
| Finished | Aug 29 03:53:57 AM UTC 24 |
| Peak memory | 214648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3196708550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_disconnected.3196708550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_enable.3502675919 |
| Short name | T2760 |
| Test name | |
| Test status | |
| Simulation time | 45167853 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 03:53:55 AM UTC 24 |
| Finished | Aug 29 03:53:57 AM UTC 24 |
| Peak memory | 215004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3502675919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 41.usbdev_enable.3502675919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_endpoint_access.4075187947 |
| Short name | T2773 |
| Test name | |
| Test status | |
| Simulation time | 909428209 ps |
| CPU time | 2.35 seconds |
| Started | Aug 29 03:53:55 AM UTC 24 |
| Finished | Aug 29 03:53:59 AM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4075187947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_endpoint_access.4075187947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_endpoint_types.3499195023 |
| Short name | T564 |
| Test name | |
| Test status | |
| Simulation time | 315458521 ps |
| CPU time | 1.15 seconds |
| Started | Aug 29 03:53:55 AM UTC 24 |
| Finished | Aug 29 03:53:57 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3499195023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_endpoint_types.3499195023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_fifo_levels.432179458 |
| Short name | T372 |
| Test name | |
| Test status | |
| Simulation time | 302775800 ps |
| CPU time | 1.2 seconds |
| Started | Aug 29 03:53:55 AM UTC 24 |
| Finished | Aug 29 03:53:58 AM UTC 24 |
| Peak memory | 214996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=432179458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 41.usbdev_fifo_levels.432179458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_fifo_rst.4037295502 |
| Short name | T2771 |
| Test name | |
| Test status | |
| Simulation time | 371554552 ps |
| CPU time | 1.84 seconds |
| Started | Aug 29 03:53:55 AM UTC 24 |
| Finished | Aug 29 03:53:58 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4037295502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_fifo_rst.4037295502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_in_iso.2180834522 |
| Short name | T2770 |
| Test name | |
| Test status | |
| Simulation time | 219863121 ps |
| CPU time | 1.16 seconds |
| Started | Aug 29 03:53:55 AM UTC 24 |
| Finished | Aug 29 03:53:58 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2180834522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 41.usbdev_in_iso.2180834522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_in_stall.2003865273 |
| Short name | T2765 |
| Test name | |
| Test status | |
| Simulation time | 209293212 ps |
| CPU time | 0.94 seconds |
| Started | Aug 29 03:53:55 AM UTC 24 |
| Finished | Aug 29 03:53:57 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2003865273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_in_stall.2003865273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_in_trans.2054794675 |
| Short name | T2764 |
| Test name | |
| Test status | |
| Simulation time | 202383098 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 03:53:55 AM UTC 24 |
| Finished | Aug 29 03:53:57 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2054794675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_in_trans.2054794675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_invalid_sync.1267528582 |
| Short name | T2786 |
| Test name | |
| Test status | |
| Simulation time | 4629839720 ps |
| CPU time | 30.48 seconds |
| Started | Aug 29 03:53:55 AM UTC 24 |
| Finished | Aug 29 03:54:27 AM UTC 24 |
| Peak memory | 229744 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1267528582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 41.usbdev_invalid_sync.1267528582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_iso_retraction.1002196650 |
| Short name | T2835 |
| Test name | |
| Test status | |
| Simulation time | 12288201985 ps |
| CPU time | 69.25 seconds |
| Started | Aug 29 03:53:55 AM UTC 24 |
| Finished | Aug 29 03:55:06 AM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1002196650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_iso_retraction.1002196650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_link_in_err.551239949 |
| Short name | T2762 |
| Test name | |
| Test status | |
| Simulation time | 144734430 ps |
| CPU time | 0.75 seconds |
| Started | Aug 29 03:53:55 AM UTC 24 |
| Finished | Aug 29 03:53:57 AM UTC 24 |
| Peak memory | 214976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=551239949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 41.usbdev_link_in_err.551239949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_link_resume.1192214427 |
| Short name | T2789 |
| Test name | |
| Test status | |
| Simulation time | 27732341008 ps |
| CPU time | 42.29 seconds |
| Started | Aug 29 03:53:55 AM UTC 24 |
| Finished | Aug 29 03:54:39 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1192214427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_link_resume.1192214427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_link_suspend.2820789026 |
| Short name | T2777 |
| Test name | |
| Test status | |
| Simulation time | 10815841777 ps |
| CPU time | 13.28 seconds |
| Started | Aug 29 03:53:55 AM UTC 24 |
| Finished | Aug 29 03:54:10 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2820789026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_link_suspend.2820789026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_low_speed_traffic.385436708 |
| Short name | T2865 |
| Test name | |
| Test status | |
| Simulation time | 4234079013 ps |
| CPU time | 105.14 seconds |
| Started | Aug 29 03:53:55 AM UTC 24 |
| Finished | Aug 29 03:55:43 AM UTC 24 |
| Peak memory | 229680 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=385436708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_low_speed_traffic.385436708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_max_inter_pkt_delay.2497001565 |
| Short name | T2784 |
| Test name | |
| Test status | |
| Simulation time | 3285096276 ps |
| CPU time | 21.43 seconds |
| Started | Aug 29 03:53:55 AM UTC 24 |
| Finished | Aug 29 03:54:18 AM UTC 24 |
| Peak memory | 229512 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2497001565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_max_inter_pkt_delay.2497001565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_max_length_in_transaction.1273111697 |
| Short name | T2768 |
| Test name | |
| Test status | |
| Simulation time | 242059785 ps |
| CPU time | 1.01 seconds |
| Started | Aug 29 03:53:55 AM UTC 24 |
| Finished | Aug 29 03:53:58 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1273111697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 41.usbdev_max_length_in_transaction.1273111697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_max_length_out_transaction.3157083225 |
| Short name | T2769 |
| Test name | |
| Test status | |
| Simulation time | 203816995 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 03:53:55 AM UTC 24 |
| Finished | Aug 29 03:53:58 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3157083225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 41.usbdev_max_length_out_transaction.3157083225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_min_inter_pkt_delay.2645105913 |
| Short name | T2780 |
| Test name | |
| Test status | |
| Simulation time | 2343607878 ps |
| CPU time | 18.9 seconds |
| Started | Aug 29 03:53:55 AM UTC 24 |
| Finished | Aug 29 03:54:16 AM UTC 24 |
| Peak memory | 229652 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2645105913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_min_inter_pkt_delay.2645105913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_min_length_in_transaction.450276136 |
| Short name | T2767 |
| Test name | |
| Test status | |
| Simulation time | 163586233 ps |
| CPU time | 0.76 seconds |
| Started | Aug 29 03:53:55 AM UTC 24 |
| Finished | Aug 29 03:53:58 AM UTC 24 |
| Peak memory | 216880 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=450276136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 41.usbdev_min_length_in_transaction.450276136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_min_length_out_transaction.3517253005 |
| Short name | T2766 |
| Test name | |
| Test status | |
| Simulation time | 171046775 ps |
| CPU time | 0.76 seconds |
| Started | Aug 29 03:53:55 AM UTC 24 |
| Finished | Aug 29 03:53:57 AM UTC 24 |
| Peak memory | 217052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3517253005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 41.usbdev_min_length_out_transaction.3517253005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_nak_trans.2278603955 |
| Short name | T2737 |
| Test name | |
| Test status | |
| Simulation time | 250306067 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 03:54:47 AM UTC 24 |
| Finished | Aug 29 03:54:49 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2278603955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_nak_trans.2278603955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_out_iso.978983660 |
| Short name | T2793 |
| Test name | |
| Test status | |
| Simulation time | 172308791 ps |
| CPU time | 0.76 seconds |
| Started | Aug 29 03:54:47 AM UTC 24 |
| Finished | Aug 29 03:54:49 AM UTC 24 |
| Peak memory | 216264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=978983660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 41.usbdev_out_iso.978983660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_out_stall.1226487627 |
| Short name | T2757 |
| Test name | |
| Test status | |
| Simulation time | 209671288 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 03:54:47 AM UTC 24 |
| Finished | Aug 29 03:54:49 AM UTC 24 |
| Peak memory | 214596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1226487627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_out_stall.1226487627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_out_trans_nak.3325273880 |
| Short name | T2741 |
| Test name | |
| Test status | |
| Simulation time | 205765282 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 03:54:47 AM UTC 24 |
| Finished | Aug 29 03:54:49 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3325273880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 41.usbdev_out_trans_nak.3325273880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_pending_in_trans.1450365525 |
| Short name | T2791 |
| Test name | |
| Test status | |
| Simulation time | 147093108 ps |
| CPU time | 0.76 seconds |
| Started | Aug 29 03:54:47 AM UTC 24 |
| Finished | Aug 29 03:54:49 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1450365525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 41.usbdev_pending_in_trans.1450365525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_phy_config_pinflip.2143794135 |
| Short name | T2794 |
| Test name | |
| Test status | |
| Simulation time | 200802876 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 03:54:47 AM UTC 24 |
| Finished | Aug 29 03:54:49 AM UTC 24 |
| Peak memory | 214964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2143794135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 41.usbdev_phy_config_pinflip.2143794135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_phy_config_usb_ref_disable.3662288772 |
| Short name | T2792 |
| Test name | |
| Test status | |
| Simulation time | 142645264 ps |
| CPU time | 0.71 seconds |
| Started | Aug 29 03:54:47 AM UTC 24 |
| Finished | Aug 29 03:54:49 AM UTC 24 |
| Peak memory | 216492 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3662288772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 41.usbdev_phy_config_usb_ref_disable.3662288772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_phy_pins_sense.1133759720 |
| Short name | T2790 |
| Test name | |
| Test status | |
| Simulation time | 35003246 ps |
| CPU time | 0.6 seconds |
| Started | Aug 29 03:54:47 AM UTC 24 |
| Finished | Aug 29 03:54:49 AM UTC 24 |
| Peak memory | 217120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1133759720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_phy_pins_sense.1133759720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_buffer.499077090 |
| Short name | T2837 |
| Test name | |
| Test status | |
| Simulation time | 11324645781 ps |
| CPU time | 28.69 seconds |
| Started | Aug 29 03:54:47 AM UTC 24 |
| Finished | Aug 29 03:55:17 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=499077090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_pkt_buffer.499077090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_received.2565990963 |
| Short name | T2800 |
| Test name | |
| Test status | |
| Simulation time | 189656325 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 03:54:47 AM UTC 24 |
| Finished | Aug 29 03:54:50 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2565990963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_pkt_received.2565990963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_sent.1744249850 |
| Short name | T2797 |
| Test name | |
| Test status | |
| Simulation time | 211933927 ps |
| CPU time | 0.88 seconds |
| Started | Aug 29 03:54:47 AM UTC 24 |
| Finished | Aug 29 03:54:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1744249850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_pkt_sent.1744249850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_random_length_in_transaction.3811309326 |
| Short name | T2799 |
| Test name | |
| Test status | |
| Simulation time | 267700910 ps |
| CPU time | 0.97 seconds |
| Started | Aug 29 03:54:47 AM UTC 24 |
| Finished | Aug 29 03:54:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3811309326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 41.usbdev_random_length_in_transaction.3811309326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_random_length_out_transaction.2828983072 |
| Short name | T2795 |
| Test name | |
| Test status | |
| Simulation time | 210373362 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 03:54:47 AM UTC 24 |
| Finished | Aug 29 03:54:49 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2828983072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 41.usbdev_random_length_out_transaction.2828983072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_rx_crc_err.1372048812 |
| Short name | T2803 |
| Test name | |
| Test status | |
| Simulation time | 153005582 ps |
| CPU time | 0.73 seconds |
| Started | Aug 29 03:54:47 AM UTC 24 |
| Finished | Aug 29 03:54:50 AM UTC 24 |
| Peak memory | 215504 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1372048812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 41.usbdev_rx_crc_err.1372048812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_rx_full.2068103077 |
| Short name | T2809 |
| Test name | |
| Test status | |
| Simulation time | 335818352 ps |
| CPU time | 1.25 seconds |
| Started | Aug 29 03:54:47 AM UTC 24 |
| Finished | Aug 29 03:54:50 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2068103077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 41.usbdev_rx_full.2068103077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_setup_stage.3648970234 |
| Short name | T2802 |
| Test name | |
| Test status | |
| Simulation time | 150703470 ps |
| CPU time | 0.74 seconds |
| Started | Aug 29 03:54:47 AM UTC 24 |
| Finished | Aug 29 03:54:50 AM UTC 24 |
| Peak memory | 215368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3648970234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_setup_stage.3648970234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_setup_trans_ignored.1529121178 |
| Short name | T2804 |
| Test name | |
| Test status | |
| Simulation time | 156023023 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:54:47 AM UTC 24 |
| Finished | Aug 29 03:54:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1529121178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 41.usbdev_setup_trans_ignored.1529121178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_smoke.2108086461 |
| Short name | T2806 |
| Test name | |
| Test status | |
| Simulation time | 257628727 ps |
| CPU time | 0.97 seconds |
| Started | Aug 29 03:54:47 AM UTC 24 |
| Finished | Aug 29 03:54:50 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2108086461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_smoke.2108086461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_spurious_pids_ignored.1025099431 |
| Short name | T2833 |
| Test name | |
| Test status | |
| Simulation time | 2367863257 ps |
| CPU time | 16.49 seconds |
| Started | Aug 29 03:54:47 AM UTC 24 |
| Finished | Aug 29 03:55:06 AM UTC 24 |
| Peak memory | 227564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1025099431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 41.usbdev_spurious_pids_ignored.1025099431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_stall_priority_over_nak.875670579 |
| Short name | T2807 |
| Test name | |
| Test status | |
| Simulation time | 231487092 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 03:54:47 AM UTC 24 |
| Finished | Aug 29 03:54:50 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=875670579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_stall_priority_over_nak.875670579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_stall_trans.1815597986 |
| Short name | T2808 |
| Test name | |
| Test status | |
| Simulation time | 211714338 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 03:54:47 AM UTC 24 |
| Finished | Aug 29 03:54:50 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1815597986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_stall_trans.1815597986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_stream_len_max.2942414613 |
| Short name | T2825 |
| Test name | |
| Test status | |
| Simulation time | 1012504461 ps |
| CPU time | 2.46 seconds |
| Started | Aug 29 03:54:48 AM UTC 24 |
| Finished | Aug 29 03:54:52 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2942414613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_stream_len_max.2942414613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_streaming_out.335524698 |
| Short name | T2842 |
| Test name | |
| Test status | |
| Simulation time | 1915399033 ps |
| CPU time | 45.35 seconds |
| Started | Aug 29 03:54:47 AM UTC 24 |
| Finished | Aug 29 03:55:35 AM UTC 24 |
| Peak memory | 227492 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=335524698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_streaming_out.335524698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_timeout_missing_host_handshake.3909149973 |
| Short name | T2781 |
| Test name | |
| Test status | |
| Simulation time | 1094831211 ps |
| CPU time | 20.91 seconds |
| Started | Aug 29 03:53:55 AM UTC 24 |
| Finished | Aug 29 03:54:17 AM UTC 24 |
| Peak memory | 217152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3909149973 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_timeout_missing_host_handshake.3909149973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/41.usbdev_tx_rx_disruption.2929086361 |
| Short name | T205 |
| Test name | |
| Test status | |
| Simulation time | 533749216 ps |
| CPU time | 1.62 seconds |
| Started | Aug 29 03:54:48 AM UTC 24 |
| Finished | Aug 29 03:54:51 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2929086361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_t x_rx_disruption.2929086361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/41.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/410.usbdev_tx_rx_disruption.2876102009 |
| Short name | T3701 |
| Test name | |
| Test status | |
| Simulation time | 437396941 ps |
| CPU time | 1.35 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2876102009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 410.usbdev_ tx_rx_disruption.2876102009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/410.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/411.usbdev_tx_rx_disruption.508894711 |
| Short name | T3716 |
| Test name | |
| Test status | |
| Simulation time | 481639430 ps |
| CPU time | 1.75 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=508894711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 411.usbdev_t x_rx_disruption.508894711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/411.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/412.usbdev_tx_rx_disruption.2616840602 |
| Short name | T3727 |
| Test name | |
| Test status | |
| Simulation time | 505062767 ps |
| CPU time | 1.84 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2616840602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 412.usbdev_ tx_rx_disruption.2616840602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/412.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/413.usbdev_tx_rx_disruption.3901770831 |
| Short name | T3722 |
| Test name | |
| Test status | |
| Simulation time | 584913850 ps |
| CPU time | 1.89 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3901770831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 413.usbdev_ tx_rx_disruption.3901770831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/413.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/414.usbdev_tx_rx_disruption.1279744963 |
| Short name | T3717 |
| Test name | |
| Test status | |
| Simulation time | 506751071 ps |
| CPU time | 1.63 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 214940 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1279744963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 414.usbdev_ tx_rx_disruption.1279744963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/414.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/415.usbdev_tx_rx_disruption.1522981053 |
| Short name | T3718 |
| Test name | |
| Test status | |
| Simulation time | 619685341 ps |
| CPU time | 1.6 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1522981053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 415.usbdev_ tx_rx_disruption.1522981053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/415.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/416.usbdev_tx_rx_disruption.2222362585 |
| Short name | T3731 |
| Test name | |
| Test status | |
| Simulation time | 502453161 ps |
| CPU time | 1.95 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2222362585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 416.usbdev_ tx_rx_disruption.2222362585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/416.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/417.usbdev_tx_rx_disruption.2653998275 |
| Short name | T3714 |
| Test name | |
| Test status | |
| Simulation time | 474282212 ps |
| CPU time | 1.52 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 214944 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2653998275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 417.usbdev_ tx_rx_disruption.2653998275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/417.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/418.usbdev_tx_rx_disruption.3201895125 |
| Short name | T3721 |
| Test name | |
| Test status | |
| Simulation time | 638167929 ps |
| CPU time | 1.7 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3201895125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 418.usbdev_ tx_rx_disruption.3201895125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/418.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/419.usbdev_tx_rx_disruption.4172342038 |
| Short name | T3720 |
| Test name | |
| Test status | |
| Simulation time | 428251089 ps |
| CPU time | 1.62 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4172342038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 419.usbdev_ tx_rx_disruption.4172342038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/419.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_alert_test.2088772914 |
| Short name | T2859 |
| Test name | |
| Test status | |
| Simulation time | 72668114 ps |
| CPU time | 0.65 seconds |
| Started | Aug 29 03:55:41 AM UTC 24 |
| Finished | Aug 29 03:55:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2088772914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 42.usbdev_alert_test.2088772914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_disconnect.988061788 |
| Short name | T2832 |
| Test name | |
| Test status | |
| Simulation time | 11677264631 ps |
| CPU time | 15.94 seconds |
| Started | Aug 29 03:54:48 AM UTC 24 |
| Finished | Aug 29 03:55:05 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=988061788 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_disconnect.988061788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_reset.791008645 |
| Short name | T2834 |
| Test name | |
| Test status | |
| Simulation time | 13895933084 ps |
| CPU time | 16.84 seconds |
| Started | Aug 29 03:54:48 AM UTC 24 |
| Finished | Aug 29 03:55:06 AM UTC 24 |
| Peak memory | 226280 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=791008645 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_reset.791008645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_resume.346750235 |
| Short name | T2838 |
| Test name | |
| Test status | |
| Simulation time | 24424919428 ps |
| CPU time | 27.92 seconds |
| Started | Aug 29 03:54:48 AM UTC 24 |
| Finished | Aug 29 03:55:17 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=346750235 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_resume.346750235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_av_buffer.4137788583 |
| Short name | T2811 |
| Test name | |
| Test status | |
| Simulation time | 212785371 ps |
| CPU time | 0.92 seconds |
| Started | Aug 29 03:54:48 AM UTC 24 |
| Finished | Aug 29 03:54:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4137788583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_av_buffer.4137788583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_bitstuff_err.437407926 |
| Short name | T2810 |
| Test name | |
| Test status | |
| Simulation time | 171671474 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 03:54:48 AM UTC 24 |
| Finished | Aug 29 03:54:50 AM UTC 24 |
| Peak memory | 214804 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=437407926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_bitstuff_err.437407926 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_data_toggle_clear.4185927555 |
| Short name | T2813 |
| Test name | |
| Test status | |
| Simulation time | 182360374 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 03:54:48 AM UTC 24 |
| Finished | Aug 29 03:54:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4185927555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 42.usbdev_data_toggle_clear.4185927555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_data_toggle_restore.231015814 |
| Short name | T2828 |
| Test name | |
| Test status | |
| Simulation time | 1403196218 ps |
| CPU time | 3.38 seconds |
| Started | Aug 29 03:54:48 AM UTC 24 |
| Finished | Aug 29 03:54:53 AM UTC 24 |
| Peak memory | 217272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=231015814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_data_toggle_restore.231015814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_device_address.3164859343 |
| Short name | T2843 |
| Test name | |
| Test status | |
| Simulation time | 34865689409 ps |
| CPU time | 51.24 seconds |
| Started | Aug 29 03:54:48 AM UTC 24 |
| Finished | Aug 29 03:55:41 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3164859343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_device_address.3164859343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_device_timeout.2951936282 |
| Short name | T2841 |
| Test name | |
| Test status | |
| Simulation time | 7737249208 ps |
| CPU time | 43.02 seconds |
| Started | Aug 29 03:54:48 AM UTC 24 |
| Finished | Aug 29 03:55:33 AM UTC 24 |
| Peak memory | 217452 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2951936282 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_device_timeout.2951936282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_disable_endpoint.3573718986 |
| Short name | T2823 |
| Test name | |
| Test status | |
| Simulation time | 363938255 ps |
| CPU time | 1.55 seconds |
| Started | Aug 29 03:54:48 AM UTC 24 |
| Finished | Aug 29 03:54:51 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3573718986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 42.usbdev_disable_endpoint.3573718986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_disconnected.3525727236 |
| Short name | T2812 |
| Test name | |
| Test status | |
| Simulation time | 160095471 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 03:54:48 AM UTC 24 |
| Finished | Aug 29 03:54:50 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3525727236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_disconnected.3525727236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_enable.368191336 |
| Short name | T2814 |
| Test name | |
| Test status | |
| Simulation time | 64742570 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 03:54:48 AM UTC 24 |
| Finished | Aug 29 03:54:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=368191336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_enable.368191336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_endpoint_access.4173308176 |
| Short name | T2827 |
| Test name | |
| Test status | |
| Simulation time | 875470926 ps |
| CPU time | 2.82 seconds |
| Started | Aug 29 03:54:48 AM UTC 24 |
| Finished | Aug 29 03:54:53 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4173308176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_endpoint_access.4173308176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_endpoint_types.564712562 |
| Short name | T2816 |
| Test name | |
| Test status | |
| Simulation time | 153466144 ps |
| CPU time | 1.13 seconds |
| Started | Aug 29 03:54:48 AM UTC 24 |
| Finished | Aug 29 03:54:51 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=564712562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 42.usbdev_endpoint_types.564712562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_fifo_levels.3430523106 |
| Short name | T351 |
| Test name | |
| Test status | |
| Simulation time | 251064714 ps |
| CPU time | 1.05 seconds |
| Started | Aug 29 03:54:48 AM UTC 24 |
| Finished | Aug 29 03:54:51 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3430523106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_fifo_levels.3430523106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_fifo_rst.104247371 |
| Short name | T2826 |
| Test name | |
| Test status | |
| Simulation time | 287370624 ps |
| CPU time | 2.25 seconds |
| Started | Aug 29 03:54:48 AM UTC 24 |
| Finished | Aug 29 03:54:52 AM UTC 24 |
| Peak memory | 217252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=104247371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 42.usbdev_fifo_rst.104247371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_in_iso.3843680731 |
| Short name | T2821 |
| Test name | |
| Test status | |
| Simulation time | 178749608 ps |
| CPU time | 1.18 seconds |
| Started | Aug 29 03:54:48 AM UTC 24 |
| Finished | Aug 29 03:54:51 AM UTC 24 |
| Peak memory | 227216 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3843680731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 42.usbdev_in_iso.3843680731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_in_stall.3344154006 |
| Short name | T2815 |
| Test name | |
| Test status | |
| Simulation time | 134828259 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 03:54:48 AM UTC 24 |
| Finished | Aug 29 03:54:51 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3344154006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_in_stall.3344154006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_in_trans.4244634593 |
| Short name | T2822 |
| Test name | |
| Test status | |
| Simulation time | 215226216 ps |
| CPU time | 1.25 seconds |
| Started | Aug 29 03:54:48 AM UTC 24 |
| Finished | Aug 29 03:54:51 AM UTC 24 |
| Peak memory | 214888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4244634593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_in_trans.4244634593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_invalid_sync.3013618879 |
| Short name | T2840 |
| Test name | |
| Test status | |
| Simulation time | 4494965617 ps |
| CPU time | 38.16 seconds |
| Started | Aug 29 03:54:48 AM UTC 24 |
| Finished | Aug 29 03:55:28 AM UTC 24 |
| Peak memory | 229720 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3013618879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 42.usbdev_invalid_sync.3013618879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_iso_retraction.2192135393 |
| Short name | T2880 |
| Test name | |
| Test status | |
| Simulation time | 10667721602 ps |
| CPU time | 61.42 seconds |
| Started | Aug 29 03:54:48 AM UTC 24 |
| Finished | Aug 29 03:55:52 AM UTC 24 |
| Peak memory | 217376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2192135393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_iso_retraction.2192135393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_link_in_err.3739179074 |
| Short name | T2820 |
| Test name | |
| Test status | |
| Simulation time | 256260940 ps |
| CPU time | 1.17 seconds |
| Started | Aug 29 03:54:48 AM UTC 24 |
| Finished | Aug 29 03:54:51 AM UTC 24 |
| Peak memory | 214780 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3739179074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_link_in_err.3739179074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_link_resume.1917526205 |
| Short name | T2836 |
| Test name | |
| Test status | |
| Simulation time | 21739207959 ps |
| CPU time | 26.73 seconds |
| Started | Aug 29 03:54:48 AM UTC 24 |
| Finished | Aug 29 03:55:17 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1917526205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_link_resume.1917526205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_link_suspend.744724198 |
| Short name | T2830 |
| Test name | |
| Test status | |
| Simulation time | 9957233241 ps |
| CPU time | 13.17 seconds |
| Started | Aug 29 03:54:48 AM UTC 24 |
| Finished | Aug 29 03:55:03 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=744724198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_link_suspend.744724198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_low_speed_traffic.1785265695 |
| Short name | T2839 |
| Test name | |
| Test status | |
| Simulation time | 3752674081 ps |
| CPU time | 32.51 seconds |
| Started | Aug 29 03:54:48 AM UTC 24 |
| Finished | Aug 29 03:55:23 AM UTC 24 |
| Peak memory | 229688 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1785265695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_low_speed_traffic.1785265695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_max_inter_pkt_delay.1718141025 |
| Short name | T2892 |
| Test name | |
| Test status | |
| Simulation time | 3716466267 ps |
| CPU time | 87.85 seconds |
| Started | Aug 29 03:54:48 AM UTC 24 |
| Finished | Aug 29 03:56:19 AM UTC 24 |
| Peak memory | 227780 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1718141025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_max_inter_pkt_delay.1718141025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_max_length_in_transaction.573226371 |
| Short name | T2824 |
| Test name | |
| Test status | |
| Simulation time | 245720140 ps |
| CPU time | 1.16 seconds |
| Started | Aug 29 03:54:48 AM UTC 24 |
| Finished | Aug 29 03:54:51 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=573226371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 42.usbdev_max_length_in_transaction.573226371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_max_length_out_transaction.2254275525 |
| Short name | T2819 |
| Test name | |
| Test status | |
| Simulation time | 252399837 ps |
| CPU time | 0.91 seconds |
| Started | Aug 29 03:54:48 AM UTC 24 |
| Finished | Aug 29 03:54:51 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2254275525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 42.usbdev_max_length_out_transaction.2254275525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_min_inter_pkt_delay.3334815383 |
| Short name | T2894 |
| Test name | |
| Test status | |
| Simulation time | 3789375655 ps |
| CPU time | 93.77 seconds |
| Started | Aug 29 03:54:48 AM UTC 24 |
| Finished | Aug 29 03:56:25 AM UTC 24 |
| Peak memory | 227624 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3334815383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_min_inter_pkt_delay.3334815383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_min_length_in_transaction.1053841682 |
| Short name | T2818 |
| Test name | |
| Test status | |
| Simulation time | 156130627 ps |
| CPU time | 0.82 seconds |
| Started | Aug 29 03:54:49 AM UTC 24 |
| Finished | Aug 29 03:54:51 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1053841682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 42.usbdev_min_length_in_transaction.1053841682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_min_length_out_transaction.3906611343 |
| Short name | T2817 |
| Test name | |
| Test status | |
| Simulation time | 172082855 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 03:54:49 AM UTC 24 |
| Finished | Aug 29 03:54:51 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3906611343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 42.usbdev_min_length_out_transaction.3906611343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_nak_trans.2284796166 |
| Short name | T2849 |
| Test name | |
| Test status | |
| Simulation time | 199569656 ps |
| CPU time | 0.9 seconds |
| Started | Aug 29 03:55:40 AM UTC 24 |
| Finished | Aug 29 03:55:42 AM UTC 24 |
| Peak memory | 214828 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2284796166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_nak_trans.2284796166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_out_iso.2294266735 |
| Short name | T2846 |
| Test name | |
| Test status | |
| Simulation time | 196277892 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:55:40 AM UTC 24 |
| Finished | Aug 29 03:55:42 AM UTC 24 |
| Peak memory | 214832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2294266735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 42.usbdev_out_iso.2294266735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_out_stall.2963758328 |
| Short name | T2844 |
| Test name | |
| Test status | |
| Simulation time | 182667344 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 03:55:40 AM UTC 24 |
| Finished | Aug 29 03:55:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2963758328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_out_stall.2963758328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_out_trans_nak.489527489 |
| Short name | T2848 |
| Test name | |
| Test status | |
| Simulation time | 191773340 ps |
| CPU time | 0.77 seconds |
| Started | Aug 29 03:55:40 AM UTC 24 |
| Finished | Aug 29 03:55:42 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=489527489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_out_trans_nak.489527489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_pending_in_trans.977373595 |
| Short name | T2847 |
| Test name | |
| Test status | |
| Simulation time | 152283455 ps |
| CPU time | 0.75 seconds |
| Started | Aug 29 03:55:40 AM UTC 24 |
| Finished | Aug 29 03:55:42 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=977373595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_pending_in_trans.977373595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_phy_config_pinflip.2062728318 |
| Short name | T2855 |
| Test name | |
| Test status | |
| Simulation time | 255765570 ps |
| CPU time | 1.08 seconds |
| Started | Aug 29 03:55:40 AM UTC 24 |
| Finished | Aug 29 03:55:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2062728318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 42.usbdev_phy_config_pinflip.2062728318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_phy_config_usb_ref_disable.1683741921 |
| Short name | T2851 |
| Test name | |
| Test status | |
| Simulation time | 150052671 ps |
| CPU time | 0.76 seconds |
| Started | Aug 29 03:55:40 AM UTC 24 |
| Finished | Aug 29 03:55:42 AM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1683741921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 42.usbdev_phy_config_usb_ref_disable.1683741921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_phy_pins_sense.3017136189 |
| Short name | T2845 |
| Test name | |
| Test status | |
| Simulation time | 37020688 ps |
| CPU time | 0.61 seconds |
| Started | Aug 29 03:55:40 AM UTC 24 |
| Finished | Aug 29 03:55:42 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3017136189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_phy_pins_sense.3017136189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_buffer.1032824922 |
| Short name | T2889 |
| Test name | |
| Test status | |
| Simulation time | 12009281687 ps |
| CPU time | 27.33 seconds |
| Started | Aug 29 03:55:40 AM UTC 24 |
| Finished | Aug 29 03:56:09 AM UTC 24 |
| Peak memory | 227412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1032824922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 42.usbdev_pkt_buffer.1032824922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_received.561889903 |
| Short name | T2854 |
| Test name | |
| Test status | |
| Simulation time | 194494459 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:55:40 AM UTC 24 |
| Finished | Aug 29 03:55:42 AM UTC 24 |
| Peak memory | 214944 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=561889903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_pkt_received.561889903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_sent.2965751262 |
| Short name | T2852 |
| Test name | |
| Test status | |
| Simulation time | 186552156 ps |
| CPU time | 0.82 seconds |
| Started | Aug 29 03:55:40 AM UTC 24 |
| Finished | Aug 29 03:55:42 AM UTC 24 |
| Peak memory | 215532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2965751262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_pkt_sent.2965751262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_random_length_in_transaction.4014156988 |
| Short name | T2858 |
| Test name | |
| Test status | |
| Simulation time | 189403909 ps |
| CPU time | 0.92 seconds |
| Started | Aug 29 03:55:40 AM UTC 24 |
| Finished | Aug 29 03:55:42 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4014156988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 42.usbdev_random_length_in_transaction.4014156988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_random_length_out_transaction.4052935092 |
| Short name | T2853 |
| Test name | |
| Test status | |
| Simulation time | 249548518 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 03:55:40 AM UTC 24 |
| Finished | Aug 29 03:55:42 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4052935092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 42.usbdev_random_length_out_transaction.4052935092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_rx_crc_err.2282049881 |
| Short name | T2856 |
| Test name | |
| Test status | |
| Simulation time | 140955337 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 03:55:40 AM UTC 24 |
| Finished | Aug 29 03:55:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2282049881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 42.usbdev_rx_crc_err.2282049881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_rx_full.2519050654 |
| Short name | T2796 |
| Test name | |
| Test status | |
| Simulation time | 417164741 ps |
| CPU time | 1.26 seconds |
| Started | Aug 29 03:55:40 AM UTC 24 |
| Finished | Aug 29 03:55:43 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2519050654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 42.usbdev_rx_full.2519050654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_setup_stage.705588364 |
| Short name | T2857 |
| Test name | |
| Test status | |
| Simulation time | 156845127 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 03:55:40 AM UTC 24 |
| Finished | Aug 29 03:55:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=705588364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 42.usbdev_setup_stage.705588364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_setup_trans_ignored.2536443204 |
| Short name | T2860 |
| Test name | |
| Test status | |
| Simulation time | 163258808 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 03:55:40 AM UTC 24 |
| Finished | Aug 29 03:55:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2536443204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 42.usbdev_setup_trans_ignored.2536443204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_smoke.2010904848 |
| Short name | T2863 |
| Test name | |
| Test status | |
| Simulation time | 204818513 ps |
| CPU time | 0.99 seconds |
| Started | Aug 29 03:55:40 AM UTC 24 |
| Finished | Aug 29 03:55:43 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2010904848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_smoke.2010904848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_spurious_pids_ignored.2935771182 |
| Short name | T2897 |
| Test name | |
| Test status | |
| Simulation time | 2554135879 ps |
| CPU time | 56.67 seconds |
| Started | Aug 29 03:55:40 AM UTC 24 |
| Finished | Aug 29 03:56:39 AM UTC 24 |
| Peak memory | 229740 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2935771182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 42.usbdev_spurious_pids_ignored.2935771182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_stall_priority_over_nak.3476821014 |
| Short name | T2862 |
| Test name | |
| Test status | |
| Simulation time | 201631194 ps |
| CPU time | 0.91 seconds |
| Started | Aug 29 03:55:40 AM UTC 24 |
| Finished | Aug 29 03:55:43 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3476821014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_stall_priority_over_nak.3476821014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_stall_trans.2463295319 |
| Short name | T2864 |
| Test name | |
| Test status | |
| Simulation time | 198802776 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 03:55:40 AM UTC 24 |
| Finished | Aug 29 03:55:43 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2463295319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_stall_trans.2463295319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_stream_len_max.1656476759 |
| Short name | T2798 |
| Test name | |
| Test status | |
| Simulation time | 314986874 ps |
| CPU time | 1.13 seconds |
| Started | Aug 29 03:55:41 AM UTC 24 |
| Finished | Aug 29 03:55:43 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1656476759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_stream_len_max.1656476759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_streaming_out.1619997544 |
| Short name | T2885 |
| Test name | |
| Test status | |
| Simulation time | 1924616208 ps |
| CPU time | 15.18 seconds |
| Started | Aug 29 03:55:41 AM UTC 24 |
| Finished | Aug 29 03:55:57 AM UTC 24 |
| Peak memory | 229440 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1619997544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_streaming_out.1619997544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_timeout_missing_host_handshake.1341474508 |
| Short name | T2829 |
| Test name | |
| Test status | |
| Simulation time | 834626078 ps |
| CPU time | 4.94 seconds |
| Started | Aug 29 03:54:48 AM UTC 24 |
| Finished | Aug 29 03:54:54 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1341474508 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_timeout_missing_host_handshake.1341474508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/42.usbdev_tx_rx_disruption.4190507795 |
| Short name | T2870 |
| Test name | |
| Test status | |
| Simulation time | 507332358 ps |
| CPU time | 1.44 seconds |
| Started | Aug 29 03:55:41 AM UTC 24 |
| Finished | Aug 29 03:55:43 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4190507795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_t x_rx_disruption.4190507795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/42.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/420.usbdev_tx_rx_disruption.2624613310 |
| Short name | T3712 |
| Test name | |
| Test status | |
| Simulation time | 589658162 ps |
| CPU time | 1.43 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2624613310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 420.usbdev_ tx_rx_disruption.2624613310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/420.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/421.usbdev_tx_rx_disruption.2616198653 |
| Short name | T3715 |
| Test name | |
| Test status | |
| Simulation time | 514751392 ps |
| CPU time | 1.51 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2616198653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 421.usbdev_ tx_rx_disruption.2616198653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/421.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/422.usbdev_tx_rx_disruption.1463253630 |
| Short name | T3726 |
| Test name | |
| Test status | |
| Simulation time | 557627326 ps |
| CPU time | 1.65 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1463253630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 422.usbdev_ tx_rx_disruption.1463253630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/422.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/423.usbdev_tx_rx_disruption.1798566713 |
| Short name | T3736 |
| Test name | |
| Test status | |
| Simulation time | 581102137 ps |
| CPU time | 1.75 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1798566713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 423.usbdev_ tx_rx_disruption.1798566713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/423.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/424.usbdev_tx_rx_disruption.4245137330 |
| Short name | T3681 |
| Test name | |
| Test status | |
| Simulation time | 658064157 ps |
| CPU time | 2.11 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:29 AM UTC 24 |
| Peak memory | 217008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4245137330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 424.usbdev_ tx_rx_disruption.4245137330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/424.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/425.usbdev_tx_rx_disruption.1729558048 |
| Short name | T3739 |
| Test name | |
| Test status | |
| Simulation time | 612391713 ps |
| CPU time | 1.96 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1729558048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 425.usbdev_ tx_rx_disruption.1729558048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/425.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/426.usbdev_tx_rx_disruption.3980728467 |
| Short name | T3725 |
| Test name | |
| Test status | |
| Simulation time | 554008252 ps |
| CPU time | 1.51 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3980728467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 426.usbdev_ tx_rx_disruption.3980728467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/426.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/427.usbdev_tx_rx_disruption.842611772 |
| Short name | T3678 |
| Test name | |
| Test status | |
| Simulation time | 636310231 ps |
| CPU time | 2 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:29 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=842611772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 427.usbdev_t x_rx_disruption.842611772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/427.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/428.usbdev_tx_rx_disruption.1186763382 |
| Short name | T3723 |
| Test name | |
| Test status | |
| Simulation time | 569074205 ps |
| CPU time | 1.61 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1186763382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 428.usbdev_ tx_rx_disruption.1186763382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/428.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/429.usbdev_tx_rx_disruption.3182666449 |
| Short name | T3729 |
| Test name | |
| Test status | |
| Simulation time | 482627277 ps |
| CPU time | 1.41 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3182666449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 429.usbdev_ tx_rx_disruption.3182666449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/429.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_alert_test.3773388902 |
| Short name | T2916 |
| Test name | |
| Test status | |
| Simulation time | 45944773 ps |
| CPU time | 0.64 seconds |
| Started | Aug 29 03:56:38 AM UTC 24 |
| Finished | Aug 29 03:56:40 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3773388902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 43.usbdev_alert_test.3773388902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_disconnect.3445190729 |
| Short name | T2884 |
| Test name | |
| Test status | |
| Simulation time | 10655548736 ps |
| CPU time | 13.6 seconds |
| Started | Aug 29 03:55:41 AM UTC 24 |
| Finished | Aug 29 03:55:56 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3445190729 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_disconnect.3445190729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_reset.176565329 |
| Short name | T2887 |
| Test name | |
| Test status | |
| Simulation time | 13719705424 ps |
| CPU time | 16.18 seconds |
| Started | Aug 29 03:55:41 AM UTC 24 |
| Finished | Aug 29 03:55:58 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=176565329 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_reset.176565329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_resume.2633109652 |
| Short name | T2890 |
| Test name | |
| Test status | |
| Simulation time | 30609039998 ps |
| CPU time | 34.7 seconds |
| Started | Aug 29 03:55:41 AM UTC 24 |
| Finished | Aug 29 03:56:17 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2633109652 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_resume.2633109652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_av_buffer.2810712360 |
| Short name | T2850 |
| Test name | |
| Test status | |
| Simulation time | 183972139 ps |
| CPU time | 0.91 seconds |
| Started | Aug 29 03:55:41 AM UTC 24 |
| Finished | Aug 29 03:55:43 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2810712360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_av_buffer.2810712360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_bitstuff_err.1027122750 |
| Short name | T2801 |
| Test name | |
| Test status | |
| Simulation time | 162926800 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 03:55:41 AM UTC 24 |
| Finished | Aug 29 03:55:43 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1027122750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_bitstuff_err.1027122750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_data_toggle_clear.1810339817 |
| Short name | T2867 |
| Test name | |
| Test status | |
| Simulation time | 220061883 ps |
| CPU time | 0.94 seconds |
| Started | Aug 29 03:55:41 AM UTC 24 |
| Finished | Aug 29 03:55:43 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1810339817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 43.usbdev_data_toggle_clear.1810339817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_data_toggle_restore.978565530 |
| Short name | T2878 |
| Test name | |
| Test status | |
| Simulation time | 1244676486 ps |
| CPU time | 2.94 seconds |
| Started | Aug 29 03:55:41 AM UTC 24 |
| Finished | Aug 29 03:55:45 AM UTC 24 |
| Peak memory | 217272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=978565530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_data_toggle_restore.978565530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_device_address.2273039378 |
| Short name | T2896 |
| Test name | |
| Test status | |
| Simulation time | 31445942195 ps |
| CPU time | 52.48 seconds |
| Started | Aug 29 03:55:41 AM UTC 24 |
| Finished | Aug 29 03:56:35 AM UTC 24 |
| Peak memory | 217060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2273039378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_device_address.2273039378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_device_timeout.2910695091 |
| Short name | T2881 |
| Test name | |
| Test status | |
| Simulation time | 1924356417 ps |
| CPU time | 11.3 seconds |
| Started | Aug 29 03:55:41 AM UTC 24 |
| Finished | Aug 29 03:55:54 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2910695091 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_device_timeout.2910695091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_disable_endpoint.3359031216 |
| Short name | T2876 |
| Test name | |
| Test status | |
| Simulation time | 543226245 ps |
| CPU time | 1.48 seconds |
| Started | Aug 29 03:55:41 AM UTC 24 |
| Finished | Aug 29 03:55:44 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3359031216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 43.usbdev_disable_endpoint.3359031216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_disconnected.2076448234 |
| Short name | T2866 |
| Test name | |
| Test status | |
| Simulation time | 146588297 ps |
| CPU time | 0.74 seconds |
| Started | Aug 29 03:55:41 AM UTC 24 |
| Finished | Aug 29 03:55:43 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2076448234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_disconnected.2076448234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_enable.627143817 |
| Short name | T2861 |
| Test name | |
| Test status | |
| Simulation time | 41853088 ps |
| CPU time | 0.63 seconds |
| Started | Aug 29 03:55:41 AM UTC 24 |
| Finished | Aug 29 03:55:43 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=627143817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_enable.627143817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_endpoint_access.1951887304 |
| Short name | T2877 |
| Test name | |
| Test status | |
| Simulation time | 998707290 ps |
| CPU time | 2.58 seconds |
| Started | Aug 29 03:55:41 AM UTC 24 |
| Finished | Aug 29 03:55:45 AM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1951887304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_endpoint_access.1951887304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_endpoint_types.2672561197 |
| Short name | T439 |
| Test name | |
| Test status | |
| Simulation time | 388082687 ps |
| CPU time | 1.16 seconds |
| Started | Aug 29 03:55:41 AM UTC 24 |
| Finished | Aug 29 03:55:43 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2672561197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_endpoint_types.2672561197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_fifo_levels.1340585283 |
| Short name | T344 |
| Test name | |
| Test status | |
| Simulation time | 260909641 ps |
| CPU time | 0.99 seconds |
| Started | Aug 29 03:55:41 AM UTC 24 |
| Finished | Aug 29 03:55:43 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1340585283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_fifo_levels.1340585283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_fifo_rst.720593984 |
| Short name | T2879 |
| Test name | |
| Test status | |
| Simulation time | 451304354 ps |
| CPU time | 2.71 seconds |
| Started | Aug 29 03:55:41 AM UTC 24 |
| Finished | Aug 29 03:55:45 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=720593984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 43.usbdev_fifo_rst.720593984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_in_iso.125630120 |
| Short name | T2871 |
| Test name | |
| Test status | |
| Simulation time | 203115184 ps |
| CPU time | 0.98 seconds |
| Started | Aug 29 03:55:41 AM UTC 24 |
| Finished | Aug 29 03:55:43 AM UTC 24 |
| Peak memory | 227416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=125630120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 43.usbdev_in_iso.125630120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_in_stall.1203687378 |
| Short name | T2868 |
| Test name | |
| Test status | |
| Simulation time | 147806270 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 03:55:41 AM UTC 24 |
| Finished | Aug 29 03:55:43 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1203687378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_in_stall.1203687378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_in_trans.17486271 |
| Short name | T2869 |
| Test name | |
| Test status | |
| Simulation time | 214658183 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:55:41 AM UTC 24 |
| Finished | Aug 29 03:55:43 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=17486271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 43.usbdev_in_trans.17486271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_invalid_sync.3628852409 |
| Short name | T2891 |
| Test name | |
| Test status | |
| Simulation time | 5014071709 ps |
| CPU time | 34.81 seconds |
| Started | Aug 29 03:55:41 AM UTC 24 |
| Finished | Aug 29 03:56:17 AM UTC 24 |
| Peak memory | 227736 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3628852409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 43.usbdev_invalid_sync.3628852409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_iso_retraction.1930837745 |
| Short name | T2910 |
| Test name | |
| Test status | |
| Simulation time | 5656531584 ps |
| CPU time | 57.18 seconds |
| Started | Aug 29 03:55:41 AM UTC 24 |
| Finished | Aug 29 03:56:40 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1930837745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_iso_retraction.1930837745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_link_in_err.1642579169 |
| Short name | T2872 |
| Test name | |
| Test status | |
| Simulation time | 259577781 ps |
| CPU time | 0.92 seconds |
| Started | Aug 29 03:55:41 AM UTC 24 |
| Finished | Aug 29 03:55:43 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1642579169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_link_in_err.1642579169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_link_resume.4002947962 |
| Short name | T2883 |
| Test name | |
| Test status | |
| Simulation time | 8229381838 ps |
| CPU time | 11.81 seconds |
| Started | Aug 29 03:55:41 AM UTC 24 |
| Finished | Aug 29 03:55:54 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4002947962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_link_resume.4002947962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_link_suspend.2971598509 |
| Short name | T2886 |
| Test name | |
| Test status | |
| Simulation time | 10614408844 ps |
| CPU time | 14.71 seconds |
| Started | Aug 29 03:55:41 AM UTC 24 |
| Finished | Aug 29 03:55:57 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2971598509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_link_suspend.2971598509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_low_speed_traffic.766361360 |
| Short name | T2893 |
| Test name | |
| Test status | |
| Simulation time | 4273843977 ps |
| CPU time | 37.84 seconds |
| Started | Aug 29 03:55:41 AM UTC 24 |
| Finished | Aug 29 03:56:21 AM UTC 24 |
| Peak memory | 229580 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=766361360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_low_speed_traffic.766361360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_max_inter_pkt_delay.1693220550 |
| Short name | T2895 |
| Test name | |
| Test status | |
| Simulation time | 2234401020 ps |
| CPU time | 49.12 seconds |
| Started | Aug 29 03:55:41 AM UTC 24 |
| Finished | Aug 29 03:56:32 AM UTC 24 |
| Peak memory | 234084 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1693220550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_max_inter_pkt_delay.1693220550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_max_length_in_transaction.1804454966 |
| Short name | T2875 |
| Test name | |
| Test status | |
| Simulation time | 243930805 ps |
| CPU time | 1.03 seconds |
| Started | Aug 29 03:55:41 AM UTC 24 |
| Finished | Aug 29 03:55:44 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1804454966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 43.usbdev_max_length_in_transaction.1804454966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_max_length_out_transaction.2234899094 |
| Short name | T2873 |
| Test name | |
| Test status | |
| Simulation time | 222488295 ps |
| CPU time | 0.92 seconds |
| Started | Aug 29 03:55:41 AM UTC 24 |
| Finished | Aug 29 03:55:43 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2234899094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 43.usbdev_max_length_out_transaction.2234899094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_min_inter_pkt_delay.1059618538 |
| Short name | T2888 |
| Test name | |
| Test status | |
| Simulation time | 2695027585 ps |
| CPU time | 17.13 seconds |
| Started | Aug 29 03:55:41 AM UTC 24 |
| Finished | Aug 29 03:56:00 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1059618538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_min_inter_pkt_delay.1059618538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_min_length_in_transaction.48970738 |
| Short name | T2874 |
| Test name | |
| Test status | |
| Simulation time | 201566144 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 03:55:41 AM UTC 24 |
| Finished | Aug 29 03:55:44 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=48970738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_ trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 43.usbdev_min_length_in_transaction.48970738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_min_length_out_transaction.2650479673 |
| Short name | T2901 |
| Test name | |
| Test status | |
| Simulation time | 141799310 ps |
| CPU time | 0.76 seconds |
| Started | Aug 29 03:56:38 AM UTC 24 |
| Finished | Aug 29 03:56:40 AM UTC 24 |
| Peak memory | 214892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2650479673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 43.usbdev_min_length_out_transaction.2650479673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_nak_trans.3116082051 |
| Short name | T2902 |
| Test name | |
| Test status | |
| Simulation time | 188976712 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 03:56:38 AM UTC 24 |
| Finished | Aug 29 03:56:40 AM UTC 24 |
| Peak memory | 214920 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3116082051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_nak_trans.3116082051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_out_iso.2845630553 |
| Short name | T2899 |
| Test name | |
| Test status | |
| Simulation time | 253981179 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 03:56:38 AM UTC 24 |
| Finished | Aug 29 03:56:40 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2845630553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 43.usbdev_out_iso.2845630553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_out_stall.346017147 |
| Short name | T2904 |
| Test name | |
| Test status | |
| Simulation time | 172445829 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 03:56:38 AM UTC 24 |
| Finished | Aug 29 03:56:40 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=346017147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_out_stall.346017147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_out_trans_nak.3576048643 |
| Short name | T2905 |
| Test name | |
| Test status | |
| Simulation time | 179256541 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 03:56:38 AM UTC 24 |
| Finished | Aug 29 03:56:40 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3576048643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 43.usbdev_out_trans_nak.3576048643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_pending_in_trans.3735593646 |
| Short name | T2900 |
| Test name | |
| Test status | |
| Simulation time | 151348068 ps |
| CPU time | 0.75 seconds |
| Started | Aug 29 03:56:38 AM UTC 24 |
| Finished | Aug 29 03:56:40 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3735593646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 43.usbdev_pending_in_trans.3735593646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_phy_config_pinflip.390305840 |
| Short name | T2907 |
| Test name | |
| Test status | |
| Simulation time | 236225360 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 03:56:38 AM UTC 24 |
| Finished | Aug 29 03:56:40 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=390305840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 43.usbdev_phy_config_pinflip.390305840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_phy_config_usb_ref_disable.2305553075 |
| Short name | T2906 |
| Test name | |
| Test status | |
| Simulation time | 211551623 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 03:56:38 AM UTC 24 |
| Finished | Aug 29 03:56:40 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2305553075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 43.usbdev_phy_config_usb_ref_disable.2305553075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_phy_pins_sense.324306752 |
| Short name | T2898 |
| Test name | |
| Test status | |
| Simulation time | 31513786 ps |
| CPU time | 0.6 seconds |
| Started | Aug 29 03:56:38 AM UTC 24 |
| Finished | Aug 29 03:56:40 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=324306752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 43.usbdev_phy_pins_sense.324306752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_buffer.2058362723 |
| Short name | T2949 |
| Test name | |
| Test status | |
| Simulation time | 14774683406 ps |
| CPU time | 36.41 seconds |
| Started | Aug 29 03:56:38 AM UTC 24 |
| Finished | Aug 29 03:57:16 AM UTC 24 |
| Peak memory | 227548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2058362723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_pkt_buffer.2058362723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_received.540090323 |
| Short name | T2903 |
| Test name | |
| Test status | |
| Simulation time | 170005748 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 03:56:38 AM UTC 24 |
| Finished | Aug 29 03:56:40 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=540090323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_pkt_received.540090323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_sent.233218239 |
| Short name | T2908 |
| Test name | |
| Test status | |
| Simulation time | 209929049 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 03:56:38 AM UTC 24 |
| Finished | Aug 29 03:56:40 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=233218239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 43.usbdev_pkt_sent.233218239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_random_length_in_transaction.3666710925 |
| Short name | T2914 |
| Test name | |
| Test status | |
| Simulation time | 227286564 ps |
| CPU time | 0.93 seconds |
| Started | Aug 29 03:56:38 AM UTC 24 |
| Finished | Aug 29 03:56:40 AM UTC 24 |
| Peak memory | 215028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3666710925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 43.usbdev_random_length_in_transaction.3666710925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_random_length_out_transaction.1119540975 |
| Short name | T2909 |
| Test name | |
| Test status | |
| Simulation time | 157474800 ps |
| CPU time | 0.74 seconds |
| Started | Aug 29 03:56:38 AM UTC 24 |
| Finished | Aug 29 03:56:40 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1119540975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 43.usbdev_random_length_out_transaction.1119540975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_rx_crc_err.987270056 |
| Short name | T2911 |
| Test name | |
| Test status | |
| Simulation time | 132345777 ps |
| CPU time | 0.73 seconds |
| Started | Aug 29 03:56:38 AM UTC 24 |
| Finished | Aug 29 03:56:40 AM UTC 24 |
| Peak memory | 215016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=987270056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_rx_crc_err.987270056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_rx_full.1548107719 |
| Short name | T2921 |
| Test name | |
| Test status | |
| Simulation time | 330345796 ps |
| CPU time | 1.15 seconds |
| Started | Aug 29 03:56:38 AM UTC 24 |
| Finished | Aug 29 03:56:41 AM UTC 24 |
| Peak memory | 214984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1548107719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 43.usbdev_rx_full.1548107719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_setup_stage.2508574349 |
| Short name | T2915 |
| Test name | |
| Test status | |
| Simulation time | 144347145 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 03:56:38 AM UTC 24 |
| Finished | Aug 29 03:56:40 AM UTC 24 |
| Peak memory | 214876 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2508574349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_setup_stage.2508574349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_setup_trans_ignored.183391290 |
| Short name | T2912 |
| Test name | |
| Test status | |
| Simulation time | 150064753 ps |
| CPU time | 0.73 seconds |
| Started | Aug 29 03:56:38 AM UTC 24 |
| Finished | Aug 29 03:56:40 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=183391290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 43.usbdev_setup_trans_ignored.183391290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_smoke.18461110 |
| Short name | T2920 |
| Test name | |
| Test status | |
| Simulation time | 242064583 ps |
| CPU time | 1.07 seconds |
| Started | Aug 29 03:56:38 AM UTC 24 |
| Finished | Aug 29 03:56:41 AM UTC 24 |
| Peak memory | 214972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=18461110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null - cm_name 43.usbdev_smoke.18461110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_spurious_pids_ignored.2711633684 |
| Short name | T2945 |
| Test name | |
| Test status | |
| Simulation time | 2367577328 ps |
| CPU time | 19.48 seconds |
| Started | Aug 29 03:56:38 AM UTC 24 |
| Finished | Aug 29 03:56:59 AM UTC 24 |
| Peak memory | 229596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2711633684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 43.usbdev_spurious_pids_ignored.2711633684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_stall_priority_over_nak.2802049420 |
| Short name | T2913 |
| Test name | |
| Test status | |
| Simulation time | 166929776 ps |
| CPU time | 0.82 seconds |
| Started | Aug 29 03:56:38 AM UTC 24 |
| Finished | Aug 29 03:56:40 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2802049420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_stall_priority_over_nak.2802049420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_stall_trans.683085183 |
| Short name | T2918 |
| Test name | |
| Test status | |
| Simulation time | 171088627 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 03:56:38 AM UTC 24 |
| Finished | Aug 29 03:56:41 AM UTC 24 |
| Peak memory | 214948 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=683085183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_stall_trans.683085183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_stream_len_max.2776997899 |
| Short name | T2928 |
| Test name | |
| Test status | |
| Simulation time | 433564167 ps |
| CPU time | 1.43 seconds |
| Started | Aug 29 03:56:38 AM UTC 24 |
| Finished | Aug 29 03:56:41 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2776997899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_stream_len_max.2776997899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_streaming_out.1417375601 |
| Short name | T2943 |
| Test name | |
| Test status | |
| Simulation time | 1990838885 ps |
| CPU time | 13.56 seconds |
| Started | Aug 29 03:56:38 AM UTC 24 |
| Finished | Aug 29 03:56:53 AM UTC 24 |
| Peak memory | 227408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1417375601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_streaming_out.1417375601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_timeout_missing_host_handshake.2905817992 |
| Short name | T2882 |
| Test name | |
| Test status | |
| Simulation time | 1509116318 ps |
| CPU time | 11.81 seconds |
| Started | Aug 29 03:55:41 AM UTC 24 |
| Finished | Aug 29 03:55:54 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2905817992 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_timeout_missing_host_handshake.2905817992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/43.usbdev_tx_rx_disruption.1779571331 |
| Short name | T194 |
| Test name | |
| Test status | |
| Simulation time | 454315482 ps |
| CPU time | 1.38 seconds |
| Started | Aug 29 03:56:38 AM UTC 24 |
| Finished | Aug 29 03:56:41 AM UTC 24 |
| Peak memory | 215000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1779571331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_t x_rx_disruption.1779571331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/43.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/430.usbdev_tx_rx_disruption.2949350629 |
| Short name | T3735 |
| Test name | |
| Test status | |
| Simulation time | 479037108 ps |
| CPU time | 1.75 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2949350629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 430.usbdev_ tx_rx_disruption.2949350629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/430.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/431.usbdev_tx_rx_disruption.888415094 |
| Short name | T3689 |
| Test name | |
| Test status | |
| Simulation time | 544841268 ps |
| CPU time | 1.68 seconds |
| Started | Aug 29 04:14:25 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=888415094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 431.usbdev_t x_rx_disruption.888415094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/431.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/432.usbdev_tx_rx_disruption.1977686919 |
| Short name | T3740 |
| Test name | |
| Test status | |
| Simulation time | 533160830 ps |
| CPU time | 1.81 seconds |
| Started | Aug 29 04:14:26 AM UTC 24 |
| Finished | Aug 29 04:14:29 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1977686919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 432.usbdev_ tx_rx_disruption.1977686919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/432.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/433.usbdev_tx_rx_disruption.1992780132 |
| Short name | T3738 |
| Test name | |
| Test status | |
| Simulation time | 642140923 ps |
| CPU time | 1.75 seconds |
| Started | Aug 29 04:14:26 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 215464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1992780132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 433.usbdev_ tx_rx_disruption.1992780132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/433.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/434.usbdev_tx_rx_disruption.1740470460 |
| Short name | T3730 |
| Test name | |
| Test status | |
| Simulation time | 547156373 ps |
| CPU time | 1.48 seconds |
| Started | Aug 29 04:14:26 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 215136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1740470460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 434.usbdev_ tx_rx_disruption.1740470460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/434.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/435.usbdev_tx_rx_disruption.558834867 |
| Short name | T3733 |
| Test name | |
| Test status | |
| Simulation time | 543822507 ps |
| CPU time | 1.55 seconds |
| Started | Aug 29 04:14:26 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=558834867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 435.usbdev_t x_rx_disruption.558834867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/435.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/436.usbdev_tx_rx_disruption.2930888499 |
| Short name | T3728 |
| Test name | |
| Test status | |
| Simulation time | 468434782 ps |
| CPU time | 1.31 seconds |
| Started | Aug 29 04:14:26 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2930888499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 436.usbdev_ tx_rx_disruption.2930888499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/436.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/437.usbdev_tx_rx_disruption.531080234 |
| Short name | T3734 |
| Test name | |
| Test status | |
| Simulation time | 480518912 ps |
| CPU time | 1.52 seconds |
| Started | Aug 29 04:14:26 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=531080234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 437.usbdev_t x_rx_disruption.531080234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/437.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/438.usbdev_tx_rx_disruption.686444906 |
| Short name | T3690 |
| Test name | |
| Test status | |
| Simulation time | 499823753 ps |
| CPU time | 1.64 seconds |
| Started | Aug 29 04:14:26 AM UTC 24 |
| Finished | Aug 29 04:14:29 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=686444906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 438.usbdev_t x_rx_disruption.686444906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/438.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/439.usbdev_tx_rx_disruption.765990439 |
| Short name | T3737 |
| Test name | |
| Test status | |
| Simulation time | 429988269 ps |
| CPU time | 1.5 seconds |
| Started | Aug 29 04:14:26 AM UTC 24 |
| Finished | Aug 29 04:14:28 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=765990439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 439.usbdev_t x_rx_disruption.765990439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/439.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_alert_test.1091283168 |
| Short name | T2976 |
| Test name | |
| Test status | |
| Simulation time | 49190735 ps |
| CPU time | 0.63 seconds |
| Started | Aug 29 03:57:39 AM UTC 24 |
| Finished | Aug 29 03:57:41 AM UTC 24 |
| Peak memory | 214852 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1091283168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 44.usbdev_alert_test.1091283168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_disconnect.1317065585 |
| Short name | T2941 |
| Test name | |
| Test status | |
| Simulation time | 7010432676 ps |
| CPU time | 9.34 seconds |
| Started | Aug 29 03:56:38 AM UTC 24 |
| Finished | Aug 29 03:56:49 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1317065585 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_disconnect.1317065585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_reset.1209923343 |
| Short name | T2944 |
| Test name | |
| Test status | |
| Simulation time | 13704599545 ps |
| CPU time | 15.11 seconds |
| Started | Aug 29 03:56:38 AM UTC 24 |
| Finished | Aug 29 03:56:55 AM UTC 24 |
| Peak memory | 227668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1209923343 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_reset.1209923343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_resume.2672322990 |
| Short name | T2948 |
| Test name | |
| Test status | |
| Simulation time | 23581298703 ps |
| CPU time | 32.24 seconds |
| Started | Aug 29 03:56:38 AM UTC 24 |
| Finished | Aug 29 03:57:13 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2672322990 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_resume.2672322990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_av_buffer.3254696312 |
| Short name | T2922 |
| Test name | |
| Test status | |
| Simulation time | 155269764 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 03:56:38 AM UTC 24 |
| Finished | Aug 29 03:56:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3254696312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_av_buffer.3254696312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_bitstuff_err.468246034 |
| Short name | T2924 |
| Test name | |
| Test status | |
| Simulation time | 158211515 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 03:56:38 AM UTC 24 |
| Finished | Aug 29 03:56:41 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=468246034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_bitstuff_err.468246034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_data_toggle_clear.761530879 |
| Short name | T2930 |
| Test name | |
| Test status | |
| Simulation time | 228710298 ps |
| CPU time | 1.11 seconds |
| Started | Aug 29 03:56:38 AM UTC 24 |
| Finished | Aug 29 03:56:41 AM UTC 24 |
| Peak memory | 215008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=761530879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 44.usbdev_data_toggle_clear.761530879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_data_toggle_restore.361930479 |
| Short name | T2939 |
| Test name | |
| Test status | |
| Simulation time | 1498480316 ps |
| CPU time | 3.73 seconds |
| Started | Aug 29 03:56:38 AM UTC 24 |
| Finished | Aug 29 03:56:44 AM UTC 24 |
| Peak memory | 217252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=361930479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_data_toggle_restore.361930479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_device_address.3189329227 |
| Short name | T3011 |
| Test name | |
| Test status | |
| Simulation time | 46175626240 ps |
| CPU time | 82.41 seconds |
| Started | Aug 29 03:56:38 AM UTC 24 |
| Finished | Aug 29 03:58:03 AM UTC 24 |
| Peak memory | 218912 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3189329227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_device_address.3189329227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_device_timeout.3284920372 |
| Short name | T2940 |
| Test name | |
| Test status | |
| Simulation time | 1124823716 ps |
| CPU time | 7.29 seconds |
| Started | Aug 29 03:56:38 AM UTC 24 |
| Finished | Aug 29 03:56:47 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3284920372 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_device_timeout.3284920372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_disable_endpoint.2199242107 |
| Short name | T2923 |
| Test name | |
| Test status | |
| Simulation time | 796122033 ps |
| CPU time | 1.97 seconds |
| Started | Aug 29 03:56:39 AM UTC 24 |
| Finished | Aug 29 03:56:42 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2199242107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 44.usbdev_disable_endpoint.2199242107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_disconnected.3259691396 |
| Short name | T2927 |
| Test name | |
| Test status | |
| Simulation time | 147244083 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 03:56:39 AM UTC 24 |
| Finished | Aug 29 03:56:41 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3259691396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_disconnected.3259691396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_enable.2257554299 |
| Short name | T2926 |
| Test name | |
| Test status | |
| Simulation time | 28307180 ps |
| CPU time | 0.63 seconds |
| Started | Aug 29 03:56:39 AM UTC 24 |
| Finished | Aug 29 03:56:41 AM UTC 24 |
| Peak memory | 214960 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2257554299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 44.usbdev_enable.2257554299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_endpoint_access.103997174 |
| Short name | T2938 |
| Test name | |
| Test status | |
| Simulation time | 898389317 ps |
| CPU time | 2.46 seconds |
| Started | Aug 29 03:56:39 AM UTC 24 |
| Finished | Aug 29 03:56:43 AM UTC 24 |
| Peak memory | 217152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=103997174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_endpoint_access.103997174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_endpoint_types.2724621337 |
| Short name | T539 |
| Test name | |
| Test status | |
| Simulation time | 295607408 ps |
| CPU time | 1.02 seconds |
| Started | Aug 29 03:56:39 AM UTC 24 |
| Finished | Aug 29 03:56:41 AM UTC 24 |
| Peak memory | 215020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2724621337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_endpoint_types.2724621337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_fifo_levels.3666939752 |
| Short name | T2931 |
| Test name | |
| Test status | |
| Simulation time | 153324398 ps |
| CPU time | 0.95 seconds |
| Started | Aug 29 03:56:39 AM UTC 24 |
| Finished | Aug 29 03:56:41 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3666939752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_fifo_levels.3666939752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_fifo_rst.4275425223 |
| Short name | T2919 |
| Test name | |
| Test status | |
| Simulation time | 475284478 ps |
| CPU time | 2.62 seconds |
| Started | Aug 29 03:56:39 AM UTC 24 |
| Finished | Aug 29 03:56:43 AM UTC 24 |
| Peak memory | 217152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4275425223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_fifo_rst.4275425223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_in_iso.533503988 |
| Short name | T2929 |
| Test name | |
| Test status | |
| Simulation time | 156232698 ps |
| CPU time | 0.77 seconds |
| Started | Aug 29 03:56:39 AM UTC 24 |
| Finished | Aug 29 03:56:41 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=533503988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 44.usbdev_in_iso.533503988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_in_stall.1086962095 |
| Short name | T2935 |
| Test name | |
| Test status | |
| Simulation time | 154924017 ps |
| CPU time | 0.9 seconds |
| Started | Aug 29 03:56:39 AM UTC 24 |
| Finished | Aug 29 03:56:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1086962095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_in_stall.1086962095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_in_trans.3513585957 |
| Short name | T2925 |
| Test name | |
| Test status | |
| Simulation time | 225482194 ps |
| CPU time | 1.01 seconds |
| Started | Aug 29 03:56:39 AM UTC 24 |
| Finished | Aug 29 03:56:42 AM UTC 24 |
| Peak memory | 214980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3513585957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_in_trans.3513585957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_invalid_sync.4190331078 |
| Short name | T2970 |
| Test name | |
| Test status | |
| Simulation time | 4908712574 ps |
| CPU time | 114.51 seconds |
| Started | Aug 29 03:56:39 AM UTC 24 |
| Finished | Aug 29 03:58:36 AM UTC 24 |
| Peak memory | 229832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4190331078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 44.usbdev_invalid_sync.4190331078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_iso_retraction.1016381278 |
| Short name | T2952 |
| Test name | |
| Test status | |
| Simulation time | 11161767536 ps |
| CPU time | 113.23 seconds |
| Started | Aug 29 03:56:39 AM UTC 24 |
| Finished | Aug 29 03:58:35 AM UTC 24 |
| Peak memory | 217376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1016381278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_iso_retraction.1016381278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_link_in_err.35043751 |
| Short name | T2934 |
| Test name | |
| Test status | |
| Simulation time | 195266026 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 03:56:39 AM UTC 24 |
| Finished | Aug 29 03:56:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=35043751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_link_in_err.35043751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_link_resume.1893763839 |
| Short name | T2950 |
| Test name | |
| Test status | |
| Simulation time | 23536986894 ps |
| CPU time | 37.69 seconds |
| Started | Aug 29 03:56:39 AM UTC 24 |
| Finished | Aug 29 03:57:19 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1893763839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_link_resume.1893763839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_link_suspend.3583030616 |
| Short name | T2942 |
| Test name | |
| Test status | |
| Simulation time | 8538516433 ps |
| CPU time | 11.26 seconds |
| Started | Aug 29 03:56:39 AM UTC 24 |
| Finished | Aug 29 03:56:52 AM UTC 24 |
| Peak memory | 217324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3583030616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_link_suspend.3583030616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_low_speed_traffic.3278238719 |
| Short name | T3002 |
| Test name | |
| Test status | |
| Simulation time | 2982855033 ps |
| CPU time | 64.36 seconds |
| Started | Aug 29 03:56:39 AM UTC 24 |
| Finished | Aug 29 03:57:45 AM UTC 24 |
| Peak memory | 227484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3278238719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_low_speed_traffic.3278238719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_max_inter_pkt_delay.2790231706 |
| Short name | T2946 |
| Test name | |
| Test status | |
| Simulation time | 2920956056 ps |
| CPU time | 22.11 seconds |
| Started | Aug 29 03:56:39 AM UTC 24 |
| Finished | Aug 29 03:57:03 AM UTC 24 |
| Peak memory | 227380 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2790231706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_max_inter_pkt_delay.2790231706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_max_length_in_transaction.1924409233 |
| Short name | T2933 |
| Test name | |
| Test status | |
| Simulation time | 262101928 ps |
| CPU time | 0.97 seconds |
| Started | Aug 29 03:56:39 AM UTC 24 |
| Finished | Aug 29 03:56:41 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1924409233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 44.usbdev_max_length_in_transaction.1924409233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_max_length_out_transaction.3907284120 |
| Short name | T2932 |
| Test name | |
| Test status | |
| Simulation time | 190197953 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 03:56:39 AM UTC 24 |
| Finished | Aug 29 03:56:41 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3907284120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 44.usbdev_max_length_out_transaction.3907284120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_min_inter_pkt_delay.1063960555 |
| Short name | T2951 |
| Test name | |
| Test status | |
| Simulation time | 2191803772 ps |
| CPU time | 50.69 seconds |
| Started | Aug 29 03:56:39 AM UTC 24 |
| Finished | Aug 29 03:57:32 AM UTC 24 |
| Peak memory | 227484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1063960555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_min_inter_pkt_delay.1063960555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_min_length_in_transaction.3758077652 |
| Short name | T2937 |
| Test name | |
| Test status | |
| Simulation time | 211762313 ps |
| CPU time | 0.93 seconds |
| Started | Aug 29 03:56:39 AM UTC 24 |
| Finished | Aug 29 03:56:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3758077652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 44.usbdev_min_length_in_transaction.3758077652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_min_length_out_transaction.1741339113 |
| Short name | T2936 |
| Test name | |
| Test status | |
| Simulation time | 210099941 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 03:56:39 AM UTC 24 |
| Finished | Aug 29 03:56:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1741339113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 44.usbdev_min_length_out_transaction.1741339113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_nak_trans.220328472 |
| Short name | T2954 |
| Test name | |
| Test status | |
| Simulation time | 210994522 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 03:57:38 AM UTC 24 |
| Finished | Aug 29 03:57:40 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=220328472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_nak_trans.220328472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_out_iso.2269483125 |
| Short name | T2961 |
| Test name | |
| Test status | |
| Simulation time | 162684696 ps |
| CPU time | 0.88 seconds |
| Started | Aug 29 03:57:38 AM UTC 24 |
| Finished | Aug 29 03:57:40 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2269483125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 44.usbdev_out_iso.2269483125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_out_stall.3850609156 |
| Short name | T2957 |
| Test name | |
| Test status | |
| Simulation time | 196839105 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 03:57:38 AM UTC 24 |
| Finished | Aug 29 03:57:40 AM UTC 24 |
| Peak memory | 215028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3850609156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_out_stall.3850609156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_out_trans_nak.1171704761 |
| Short name | T2959 |
| Test name | |
| Test status | |
| Simulation time | 176135685 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:57:38 AM UTC 24 |
| Finished | Aug 29 03:57:40 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1171704761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 44.usbdev_out_trans_nak.1171704761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_pending_in_trans.4032224160 |
| Short name | T2955 |
| Test name | |
| Test status | |
| Simulation time | 149497226 ps |
| CPU time | 0.77 seconds |
| Started | Aug 29 03:57:38 AM UTC 24 |
| Finished | Aug 29 03:57:40 AM UTC 24 |
| Peak memory | 214940 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4032224160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 44.usbdev_pending_in_trans.4032224160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_phy_config_pinflip.1719419947 |
| Short name | T2958 |
| Test name | |
| Test status | |
| Simulation time | 185617434 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 03:57:38 AM UTC 24 |
| Finished | Aug 29 03:57:40 AM UTC 24 |
| Peak memory | 215012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1719419947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 44.usbdev_phy_config_pinflip.1719419947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_phy_config_usb_ref_disable.850058842 |
| Short name | T2956 |
| Test name | |
| Test status | |
| Simulation time | 184778402 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 03:57:38 AM UTC 24 |
| Finished | Aug 29 03:57:40 AM UTC 24 |
| Peak memory | 214968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=850058842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 44.usbdev_phy_config_usb_ref_disable.850058842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_phy_pins_sense.1384425417 |
| Short name | T2953 |
| Test name | |
| Test status | |
| Simulation time | 47670921 ps |
| CPU time | 0.61 seconds |
| Started | Aug 29 03:57:38 AM UTC 24 |
| Finished | Aug 29 03:57:40 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1384425417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_phy_pins_sense.1384425417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_buffer.1412442620 |
| Short name | T2968 |
| Test name | |
| Test status | |
| Simulation time | 10733617141 ps |
| CPU time | 25.34 seconds |
| Started | Aug 29 03:57:38 AM UTC 24 |
| Finished | Aug 29 03:58:05 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1412442620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 44.usbdev_pkt_buffer.1412442620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_received.3498414772 |
| Short name | T2965 |
| Test name | |
| Test status | |
| Simulation time | 219213248 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 03:57:38 AM UTC 24 |
| Finished | Aug 29 03:57:40 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3498414772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_pkt_received.3498414772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_sent.1651277266 |
| Short name | T2967 |
| Test name | |
| Test status | |
| Simulation time | 215420508 ps |
| CPU time | 0.93 seconds |
| Started | Aug 29 03:57:38 AM UTC 24 |
| Finished | Aug 29 03:57:40 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1651277266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_pkt_sent.1651277266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_random_length_in_transaction.892229055 |
| Short name | T2963 |
| Test name | |
| Test status | |
| Simulation time | 241102471 ps |
| CPU time | 0.92 seconds |
| Started | Aug 29 03:57:38 AM UTC 24 |
| Finished | Aug 29 03:57:40 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=892229055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_random_length_in_transaction.892229055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_random_length_out_transaction.1149364159 |
| Short name | T2964 |
| Test name | |
| Test status | |
| Simulation time | 166039495 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 03:57:38 AM UTC 24 |
| Finished | Aug 29 03:57:40 AM UTC 24 |
| Peak memory | 214824 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1149364159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 44.usbdev_random_length_out_transaction.1149364159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_rx_crc_err.1632833754 |
| Short name | T2962 |
| Test name | |
| Test status | |
| Simulation time | 143052954 ps |
| CPU time | 0.75 seconds |
| Started | Aug 29 03:57:38 AM UTC 24 |
| Finished | Aug 29 03:57:40 AM UTC 24 |
| Peak memory | 214728 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1632833754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 44.usbdev_rx_crc_err.1632833754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_rx_full.2772800756 |
| Short name | T2978 |
| Test name | |
| Test status | |
| Simulation time | 309178760 ps |
| CPU time | 1.1 seconds |
| Started | Aug 29 03:57:38 AM UTC 24 |
| Finished | Aug 29 03:57:41 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2772800756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 44.usbdev_rx_full.2772800756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_setup_stage.2319892119 |
| Short name | T2971 |
| Test name | |
| Test status | |
| Simulation time | 142395805 ps |
| CPU time | 0.85 seconds |
| Started | Aug 29 03:57:38 AM UTC 24 |
| Finished | Aug 29 03:57:40 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2319892119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_setup_stage.2319892119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_setup_trans_ignored.3381434093 |
| Short name | T2973 |
| Test name | |
| Test status | |
| Simulation time | 193062998 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 03:57:38 AM UTC 24 |
| Finished | Aug 29 03:57:40 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3381434093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 44.usbdev_setup_trans_ignored.3381434093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_smoke.3230370104 |
| Short name | T2972 |
| Test name | |
| Test status | |
| Simulation time | 235488531 ps |
| CPU time | 0.92 seconds |
| Started | Aug 29 03:57:38 AM UTC 24 |
| Finished | Aug 29 03:57:40 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3230370104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_smoke.3230370104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_spurious_pids_ignored.3865050640 |
| Short name | T2917 |
| Test name | |
| Test status | |
| Simulation time | 1757208878 ps |
| CPU time | 40.18 seconds |
| Started | Aug 29 03:57:38 AM UTC 24 |
| Finished | Aug 29 03:58:20 AM UTC 24 |
| Peak memory | 227480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3865050640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 44.usbdev_spurious_pids_ignored.3865050640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_stall_priority_over_nak.2783240196 |
| Short name | T2974 |
| Test name | |
| Test status | |
| Simulation time | 209175999 ps |
| CPU time | 0.88 seconds |
| Started | Aug 29 03:57:38 AM UTC 24 |
| Finished | Aug 29 03:57:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2783240196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_stall_priority_over_nak.2783240196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_stall_trans.3560625758 |
| Short name | T2975 |
| Test name | |
| Test status | |
| Simulation time | 179235185 ps |
| CPU time | 0.88 seconds |
| Started | Aug 29 03:57:39 AM UTC 24 |
| Finished | Aug 29 03:57:41 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3560625758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_stall_trans.3560625758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_stream_len_max.3913342137 |
| Short name | T2999 |
| Test name | |
| Test status | |
| Simulation time | 1379880082 ps |
| CPU time | 3.21 seconds |
| Started | Aug 29 03:57:39 AM UTC 24 |
| Finished | Aug 29 03:57:43 AM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3913342137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_stream_len_max.3913342137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_streaming_out.3225599614 |
| Short name | T3007 |
| Test name | |
| Test status | |
| Simulation time | 2330503404 ps |
| CPU time | 14.97 seconds |
| Started | Aug 29 03:57:39 AM UTC 24 |
| Finished | Aug 29 03:57:55 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3225599614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_streaming_out.3225599614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_timeout_missing_host_handshake.2312574833 |
| Short name | T2947 |
| Test name | |
| Test status | |
| Simulation time | 3427469727 ps |
| CPU time | 26.38 seconds |
| Started | Aug 29 03:56:39 AM UTC 24 |
| Finished | Aug 29 03:57:07 AM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2312574833 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_timeout_missing_host_handshake.2312574833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/44.usbdev_tx_rx_disruption.3433893904 |
| Short name | T2989 |
| Test name | |
| Test status | |
| Simulation time | 558206364 ps |
| CPU time | 1.69 seconds |
| Started | Aug 29 03:57:39 AM UTC 24 |
| Finished | Aug 29 03:57:42 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3433893904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_t x_rx_disruption.3433893904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/44.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/440.usbdev_tx_rx_disruption.4056560553 |
| Short name | T3742 |
| Test name | |
| Test status | |
| Simulation time | 563474039 ps |
| CPU time | 1.54 seconds |
| Started | Aug 29 04:15:51 AM UTC 24 |
| Finished | Aug 29 04:15:54 AM UTC 24 |
| Peak memory | 214708 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4056560553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 440.usbdev_ tx_rx_disruption.4056560553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/440.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/441.usbdev_tx_rx_disruption.3286954781 |
| Short name | T3745 |
| Test name | |
| Test status | |
| Simulation time | 700694799 ps |
| CPU time | 1.7 seconds |
| Started | Aug 29 04:15:51 AM UTC 24 |
| Finished | Aug 29 04:15:54 AM UTC 24 |
| Peak memory | 214640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3286954781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 441.usbdev_ tx_rx_disruption.3286954781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/441.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/442.usbdev_tx_rx_disruption.1277235738 |
| Short name | T3691 |
| Test name | |
| Test status | |
| Simulation time | 447646061 ps |
| CPU time | 1.3 seconds |
| Started | Aug 29 04:15:51 AM UTC 24 |
| Finished | Aug 29 04:15:54 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1277235738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 442.usbdev_ tx_rx_disruption.1277235738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/442.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/443.usbdev_tx_rx_disruption.396849811 |
| Short name | T3696 |
| Test name | |
| Test status | |
| Simulation time | 461931796 ps |
| CPU time | 1.26 seconds |
| Started | Aug 29 04:15:51 AM UTC 24 |
| Finished | Aug 29 04:15:54 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=396849811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 443.usbdev_t x_rx_disruption.396849811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/443.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/444.usbdev_tx_rx_disruption.2132977757 |
| Short name | T3743 |
| Test name | |
| Test status | |
| Simulation time | 551097432 ps |
| CPU time | 1.54 seconds |
| Started | Aug 29 04:15:51 AM UTC 24 |
| Finished | Aug 29 04:15:54 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2132977757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 444.usbdev_ tx_rx_disruption.2132977757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/444.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/445.usbdev_tx_rx_disruption.3884883996 |
| Short name | T3741 |
| Test name | |
| Test status | |
| Simulation time | 517286147 ps |
| CPU time | 1.41 seconds |
| Started | Aug 29 04:15:51 AM UTC 24 |
| Finished | Aug 29 04:15:54 AM UTC 24 |
| Peak memory | 217116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3884883996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 445.usbdev_ tx_rx_disruption.3884883996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/445.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/446.usbdev_tx_rx_disruption.3520370613 |
| Short name | T3752 |
| Test name | |
| Test status | |
| Simulation time | 589736337 ps |
| CPU time | 1.77 seconds |
| Started | Aug 29 04:15:51 AM UTC 24 |
| Finished | Aug 29 04:15:54 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3520370613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 446.usbdev_ tx_rx_disruption.3520370613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/446.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/447.usbdev_tx_rx_disruption.1508398164 |
| Short name | T3747 |
| Test name | |
| Test status | |
| Simulation time | 586059562 ps |
| CPU time | 1.4 seconds |
| Started | Aug 29 04:15:51 AM UTC 24 |
| Finished | Aug 29 04:15:54 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1508398164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 447.usbdev_ tx_rx_disruption.1508398164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/447.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/448.usbdev_tx_rx_disruption.2110044405 |
| Short name | T3753 |
| Test name | |
| Test status | |
| Simulation time | 622957727 ps |
| CPU time | 1.76 seconds |
| Started | Aug 29 04:15:51 AM UTC 24 |
| Finished | Aug 29 04:15:54 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2110044405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 448.usbdev_ tx_rx_disruption.2110044405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/448.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/449.usbdev_tx_rx_disruption.2932261844 |
| Short name | T3748 |
| Test name | |
| Test status | |
| Simulation time | 522899845 ps |
| CPU time | 1.42 seconds |
| Started | Aug 29 04:15:51 AM UTC 24 |
| Finished | Aug 29 04:15:54 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2932261844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 449.usbdev_ tx_rx_disruption.2932261844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/449.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_alert_test.2417540948 |
| Short name | T3033 |
| Test name | |
| Test status | |
| Simulation time | 42852283 ps |
| CPU time | 0.65 seconds |
| Started | Aug 29 03:58:36 AM UTC 24 |
| Finished | Aug 29 03:58:38 AM UTC 24 |
| Peak memory | 214420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2417540948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 45.usbdev_alert_test.2417540948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_disconnect.284886369 |
| Short name | T3005 |
| Test name | |
| Test status | |
| Simulation time | 11580962656 ps |
| CPU time | 14.63 seconds |
| Started | Aug 29 03:57:39 AM UTC 24 |
| Finished | Aug 29 03:57:55 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=284886369 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_disconnect.284886369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_reset.610398362 |
| Short name | T3009 |
| Test name | |
| Test status | |
| Simulation time | 16088439736 ps |
| CPU time | 18.99 seconds |
| Started | Aug 29 03:57:39 AM UTC 24 |
| Finished | Aug 29 03:57:59 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=610398362 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_reset.610398362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_resume.531776923 |
| Short name | T2969 |
| Test name | |
| Test status | |
| Simulation time | 23644967824 ps |
| CPU time | 27.26 seconds |
| Started | Aug 29 03:57:39 AM UTC 24 |
| Finished | Aug 29 03:58:07 AM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=531776923 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_resume.531776923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_av_buffer.1936309302 |
| Short name | T2979 |
| Test name | |
| Test status | |
| Simulation time | 171268002 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 03:57:39 AM UTC 24 |
| Finished | Aug 29 03:57:41 AM UTC 24 |
| Peak memory | 214752 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1936309302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_av_buffer.1936309302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_bitstuff_err.1011356507 |
| Short name | T2980 |
| Test name | |
| Test status | |
| Simulation time | 156611056 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 03:57:39 AM UTC 24 |
| Finished | Aug 29 03:57:41 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1011356507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_bitstuff_err.1011356507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_data_toggle_clear.2838830435 |
| Short name | T2983 |
| Test name | |
| Test status | |
| Simulation time | 212652746 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 03:57:39 AM UTC 24 |
| Finished | Aug 29 03:57:41 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2838830435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 45.usbdev_data_toggle_clear.2838830435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_data_toggle_restore.2336834759 |
| Short name | T3000 |
| Test name | |
| Test status | |
| Simulation time | 1315982146 ps |
| CPU time | 3.07 seconds |
| Started | Aug 29 03:57:39 AM UTC 24 |
| Finished | Aug 29 03:57:43 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2336834759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_data_toggle_restore.2336834759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_device_address.61277669 |
| Short name | T3066 |
| Test name | |
| Test status | |
| Simulation time | 43958393257 ps |
| CPU time | 67.99 seconds |
| Started | Aug 29 03:57:39 AM UTC 24 |
| Finished | Aug 29 03:58:49 AM UTC 24 |
| Peak memory | 217524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=61277669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_device_address.61277669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_device_timeout.2788441090 |
| Short name | T3004 |
| Test name | |
| Test status | |
| Simulation time | 557908364 ps |
| CPU time | 9.6 seconds |
| Started | Aug 29 03:57:39 AM UTC 24 |
| Finished | Aug 29 03:57:50 AM UTC 24 |
| Peak memory | 217324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2788441090 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_device_timeout.2788441090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_disable_endpoint.1245992899 |
| Short name | T2998 |
| Test name | |
| Test status | |
| Simulation time | 891996983 ps |
| CPU time | 1.92 seconds |
| Started | Aug 29 03:57:39 AM UTC 24 |
| Finished | Aug 29 03:57:42 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1245992899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 45.usbdev_disable_endpoint.1245992899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_disconnected.3481321918 |
| Short name | T2982 |
| Test name | |
| Test status | |
| Simulation time | 149082692 ps |
| CPU time | 0.77 seconds |
| Started | Aug 29 03:57:39 AM UTC 24 |
| Finished | Aug 29 03:57:41 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3481321918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_disconnected.3481321918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_enable.1013408409 |
| Short name | T2981 |
| Test name | |
| Test status | |
| Simulation time | 28680051 ps |
| CPU time | 0.61 seconds |
| Started | Aug 29 03:57:39 AM UTC 24 |
| Finished | Aug 29 03:57:41 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1013408409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 45.usbdev_enable.1013408409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_endpoint_access.955145554 |
| Short name | T3001 |
| Test name | |
| Test status | |
| Simulation time | 937891762 ps |
| CPU time | 2.96 seconds |
| Started | Aug 29 03:57:39 AM UTC 24 |
| Finished | Aug 29 03:57:43 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=955145554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_endpoint_access.955145554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_fifo_levels.2353505654 |
| Short name | T423 |
| Test name | |
| Test status | |
| Simulation time | 265893847 ps |
| CPU time | 1.12 seconds |
| Started | Aug 29 03:57:39 AM UTC 24 |
| Finished | Aug 29 03:57:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2353505654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_fifo_levels.2353505654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_fifo_rst.2078990835 |
| Short name | T2997 |
| Test name | |
| Test status | |
| Simulation time | 243038663 ps |
| CPU time | 1.54 seconds |
| Started | Aug 29 03:57:39 AM UTC 24 |
| Finished | Aug 29 03:57:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2078990835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_fifo_rst.2078990835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_in_iso.472865349 |
| Short name | T2984 |
| Test name | |
| Test status | |
| Simulation time | 208808164 ps |
| CPU time | 1 seconds |
| Started | Aug 29 03:57:39 AM UTC 24 |
| Finished | Aug 29 03:57:41 AM UTC 24 |
| Peak memory | 227416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=472865349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 45.usbdev_in_iso.472865349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_in_stall.1896167019 |
| Short name | T2985 |
| Test name | |
| Test status | |
| Simulation time | 172817865 ps |
| CPU time | 0.92 seconds |
| Started | Aug 29 03:57:39 AM UTC 24 |
| Finished | Aug 29 03:57:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1896167019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_in_stall.1896167019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_in_trans.1899942095 |
| Short name | T2986 |
| Test name | |
| Test status | |
| Simulation time | 252836718 ps |
| CPU time | 1.01 seconds |
| Started | Aug 29 03:57:39 AM UTC 24 |
| Finished | Aug 29 03:57:42 AM UTC 24 |
| Peak memory | 214896 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1899942095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_in_trans.1899942095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_invalid_sync.485209763 |
| Short name | T2960 |
| Test name | |
| Test status | |
| Simulation time | 4362010327 ps |
| CPU time | 28.01 seconds |
| Started | Aug 29 03:57:39 AM UTC 24 |
| Finished | Aug 29 03:58:09 AM UTC 24 |
| Peak memory | 229604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=485209763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 45.usbdev_invalid_sync.485209763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_iso_retraction.2829787135 |
| Short name | T3013 |
| Test name | |
| Test status | |
| Simulation time | 4190551466 ps |
| CPU time | 38.59 seconds |
| Started | Aug 29 03:57:39 AM UTC 24 |
| Finished | Aug 29 03:58:19 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2829787135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_iso_retraction.2829787135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_link_in_err.103253026 |
| Short name | T2992 |
| Test name | |
| Test status | |
| Simulation time | 218605780 ps |
| CPU time | 1.21 seconds |
| Started | Aug 29 03:57:39 AM UTC 24 |
| Finished | Aug 29 03:57:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=103253026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_link_in_err.103253026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_link_resume.2308901197 |
| Short name | T3008 |
| Test name | |
| Test status | |
| Simulation time | 12371607581 ps |
| CPU time | 15.14 seconds |
| Started | Aug 29 03:57:39 AM UTC 24 |
| Finished | Aug 29 03:57:56 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2308901197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_link_resume.2308901197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_link_suspend.471092868 |
| Short name | T3003 |
| Test name | |
| Test status | |
| Simulation time | 4584672545 ps |
| CPU time | 7.27 seconds |
| Started | Aug 29 03:57:39 AM UTC 24 |
| Finished | Aug 29 03:57:48 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=471092868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_link_suspend.471092868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_low_speed_traffic.1182958873 |
| Short name | T3012 |
| Test name | |
| Test status | |
| Simulation time | 2975625174 ps |
| CPU time | 25.13 seconds |
| Started | Aug 29 03:57:39 AM UTC 24 |
| Finished | Aug 29 03:58:06 AM UTC 24 |
| Peak memory | 227616 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1182958873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_low_speed_traffic.1182958873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_max_inter_pkt_delay.2188501444 |
| Short name | T2966 |
| Test name | |
| Test status | |
| Simulation time | 3663243431 ps |
| CPU time | 30.66 seconds |
| Started | Aug 29 03:57:39 AM UTC 24 |
| Finished | Aug 29 03:58:12 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2188501444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_max_inter_pkt_delay.2188501444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_max_length_in_transaction.9635507 |
| Short name | T2991 |
| Test name | |
| Test status | |
| Simulation time | 267430206 ps |
| CPU time | 1.03 seconds |
| Started | Aug 29 03:57:39 AM UTC 24 |
| Finished | Aug 29 03:57:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=9635507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_ trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 45.usbdev_max_length_in_transaction.9635507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_max_length_out_transaction.3956788377 |
| Short name | T2995 |
| Test name | |
| Test status | |
| Simulation time | 192159545 ps |
| CPU time | 1.14 seconds |
| Started | Aug 29 03:57:39 AM UTC 24 |
| Finished | Aug 29 03:57:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3956788377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 45.usbdev_max_length_out_transaction.3956788377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_min_inter_pkt_delay.4081755485 |
| Short name | T3010 |
| Test name | |
| Test status | |
| Simulation time | 3328677804 ps |
| CPU time | 21.75 seconds |
| Started | Aug 29 03:57:39 AM UTC 24 |
| Finished | Aug 29 03:58:03 AM UTC 24 |
| Peak memory | 226304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4081755485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_min_inter_pkt_delay.4081755485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_min_length_in_transaction.2030454687 |
| Short name | T2994 |
| Test name | |
| Test status | |
| Simulation time | 153617537 ps |
| CPU time | 1.1 seconds |
| Started | Aug 29 03:57:39 AM UTC 24 |
| Finished | Aug 29 03:57:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2030454687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 45.usbdev_min_length_in_transaction.2030454687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_min_length_out_transaction.1053219097 |
| Short name | T2987 |
| Test name | |
| Test status | |
| Simulation time | 144289534 ps |
| CPU time | 0.72 seconds |
| Started | Aug 29 03:57:40 AM UTC 24 |
| Finished | Aug 29 03:57:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1053219097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 45.usbdev_min_length_out_transaction.1053219097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_nak_trans.191858375 |
| Short name | T2988 |
| Test name | |
| Test status | |
| Simulation time | 212953025 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 03:57:40 AM UTC 24 |
| Finished | Aug 29 03:57:42 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=191858375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_nak_trans.191858375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_out_iso.1621415434 |
| Short name | T2993 |
| Test name | |
| Test status | |
| Simulation time | 183580459 ps |
| CPU time | 0.94 seconds |
| Started | Aug 29 03:57:40 AM UTC 24 |
| Finished | Aug 29 03:57:42 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1621415434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 45.usbdev_out_iso.1621415434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_out_stall.1365493668 |
| Short name | T2996 |
| Test name | |
| Test status | |
| Simulation time | 171315800 ps |
| CPU time | 1.07 seconds |
| Started | Aug 29 03:57:40 AM UTC 24 |
| Finished | Aug 29 03:57:42 AM UTC 24 |
| Peak memory | 215008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1365493668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_out_stall.1365493668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_out_trans_nak.4138172706 |
| Short name | T2990 |
| Test name | |
| Test status | |
| Simulation time | 146413747 ps |
| CPU time | 0.82 seconds |
| Started | Aug 29 03:57:40 AM UTC 24 |
| Finished | Aug 29 03:57:42 AM UTC 24 |
| Peak memory | 215016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4138172706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 45.usbdev_out_trans_nak.4138172706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_pending_in_trans.2201643785 |
| Short name | T3016 |
| Test name | |
| Test status | |
| Simulation time | 177945562 ps |
| CPU time | 0.82 seconds |
| Started | Aug 29 03:58:36 AM UTC 24 |
| Finished | Aug 29 03:58:38 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2201643785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 45.usbdev_pending_in_trans.2201643785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_phy_config_pinflip.3539210177 |
| Short name | T3021 |
| Test name | |
| Test status | |
| Simulation time | 215161583 ps |
| CPU time | 1.01 seconds |
| Started | Aug 29 03:58:36 AM UTC 24 |
| Finished | Aug 29 03:58:38 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3539210177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 45.usbdev_phy_config_pinflip.3539210177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_phy_config_usb_ref_disable.3908792086 |
| Short name | T3014 |
| Test name | |
| Test status | |
| Simulation time | 141141131 ps |
| CPU time | 0.71 seconds |
| Started | Aug 29 03:58:36 AM UTC 24 |
| Finished | Aug 29 03:58:38 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3908792086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 45.usbdev_phy_config_usb_ref_disable.3908792086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_phy_pins_sense.188280154 |
| Short name | T2977 |
| Test name | |
| Test status | |
| Simulation time | 42443093 ps |
| CPU time | 0.63 seconds |
| Started | Aug 29 03:58:36 AM UTC 24 |
| Finished | Aug 29 03:58:38 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=188280154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 45.usbdev_phy_pins_sense.188280154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_buffer.627522696 |
| Short name | T3075 |
| Test name | |
| Test status | |
| Simulation time | 20959411237 ps |
| CPU time | 50.47 seconds |
| Started | Aug 29 03:58:36 AM UTC 24 |
| Finished | Aug 29 03:59:28 AM UTC 24 |
| Peak memory | 234288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=627522696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_pkt_buffer.627522696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_received.2165326240 |
| Short name | T3017 |
| Test name | |
| Test status | |
| Simulation time | 155333476 ps |
| CPU time | 0.77 seconds |
| Started | Aug 29 03:58:36 AM UTC 24 |
| Finished | Aug 29 03:58:38 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2165326240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_pkt_received.2165326240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_sent.2511483913 |
| Short name | T3020 |
| Test name | |
| Test status | |
| Simulation time | 232861999 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 03:58:36 AM UTC 24 |
| Finished | Aug 29 03:58:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2511483913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_pkt_sent.2511483913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_random_length_in_transaction.102455935 |
| Short name | T3022 |
| Test name | |
| Test status | |
| Simulation time | 182751090 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 03:58:36 AM UTC 24 |
| Finished | Aug 29 03:58:38 AM UTC 24 |
| Peak memory | 215096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=102455935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_random_length_in_transaction.102455935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_random_length_out_transaction.2133955681 |
| Short name | T3023 |
| Test name | |
| Test status | |
| Simulation time | 189468679 ps |
| CPU time | 0.82 seconds |
| Started | Aug 29 03:58:36 AM UTC 24 |
| Finished | Aug 29 03:58:38 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2133955681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 45.usbdev_random_length_out_transaction.2133955681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_rx_crc_err.1189426644 |
| Short name | T3026 |
| Test name | |
| Test status | |
| Simulation time | 181602160 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 03:58:36 AM UTC 24 |
| Finished | Aug 29 03:58:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1189426644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_rx_crc_err.1189426644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_rx_full.2663683572 |
| Short name | T3032 |
| Test name | |
| Test status | |
| Simulation time | 255133067 ps |
| CPU time | 1.08 seconds |
| Started | Aug 29 03:58:36 AM UTC 24 |
| Finished | Aug 29 03:58:38 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2663683572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 45.usbdev_rx_full.2663683572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_setup_stage.523871678 |
| Short name | T3029 |
| Test name | |
| Test status | |
| Simulation time | 151360576 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 03:58:36 AM UTC 24 |
| Finished | Aug 29 03:58:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=523871678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_setup_stage.523871678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_setup_trans_ignored.2573267013 |
| Short name | T3028 |
| Test name | |
| Test status | |
| Simulation time | 152771284 ps |
| CPU time | 0.77 seconds |
| Started | Aug 29 03:58:36 AM UTC 24 |
| Finished | Aug 29 03:58:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2573267013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 45.usbdev_setup_trans_ignored.2573267013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_smoke.1541705275 |
| Short name | T3027 |
| Test name | |
| Test status | |
| Simulation time | 217207352 ps |
| CPU time | 0.91 seconds |
| Started | Aug 29 03:58:36 AM UTC 24 |
| Finished | Aug 29 03:58:38 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1541705275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_smoke.1541705275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_spurious_pids_ignored.3044455104 |
| Short name | T3073 |
| Test name | |
| Test status | |
| Simulation time | 1687609471 ps |
| CPU time | 37.54 seconds |
| Started | Aug 29 03:58:36 AM UTC 24 |
| Finished | Aug 29 03:59:15 AM UTC 24 |
| Peak memory | 234112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3044455104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 45.usbdev_spurious_pids_ignored.3044455104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_stall_priority_over_nak.3202576795 |
| Short name | T3034 |
| Test name | |
| Test status | |
| Simulation time | 215732580 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 03:58:36 AM UTC 24 |
| Finished | Aug 29 03:58:38 AM UTC 24 |
| Peak memory | 216336 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3202576795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_stall_priority_over_nak.3202576795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_stall_trans.147637276 |
| Short name | T3030 |
| Test name | |
| Test status | |
| Simulation time | 143091413 ps |
| CPU time | 0.75 seconds |
| Started | Aug 29 03:58:36 AM UTC 24 |
| Finished | Aug 29 03:58:38 AM UTC 24 |
| Peak memory | 215868 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=147637276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_stall_trans.147637276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_stream_len_max.3760683493 |
| Short name | T3039 |
| Test name | |
| Test status | |
| Simulation time | 387561571 ps |
| CPU time | 1.21 seconds |
| Started | Aug 29 03:58:36 AM UTC 24 |
| Finished | Aug 29 03:58:39 AM UTC 24 |
| Peak memory | 216452 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3760683493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_stream_len_max.3760683493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_streaming_out.1344426542 |
| Short name | T3070 |
| Test name | |
| Test status | |
| Simulation time | 3460949452 ps |
| CPU time | 21.96 seconds |
| Started | Aug 29 03:58:36 AM UTC 24 |
| Finished | Aug 29 03:59:00 AM UTC 24 |
| Peak memory | 229592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1344426542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_streaming_out.1344426542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_timeout_missing_host_handshake.3360508873 |
| Short name | T3006 |
| Test name | |
| Test status | |
| Simulation time | 2617302167 ps |
| CPU time | 14.6 seconds |
| Started | Aug 29 03:57:39 AM UTC 24 |
| Finished | Aug 29 03:57:55 AM UTC 24 |
| Peak memory | 217384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3360508873 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_timeout_missing_host_handshake.3360508873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/45.usbdev_tx_rx_disruption.3583340966 |
| Short name | T3044 |
| Test name | |
| Test status | |
| Simulation time | 613479459 ps |
| CPU time | 1.57 seconds |
| Started | Aug 29 03:58:36 AM UTC 24 |
| Finished | Aug 29 03:58:39 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3583340966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_t x_rx_disruption.3583340966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/45.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/450.usbdev_tx_rx_disruption.1395784099 |
| Short name | T3749 |
| Test name | |
| Test status | |
| Simulation time | 509826886 ps |
| CPU time | 1.38 seconds |
| Started | Aug 29 04:15:51 AM UTC 24 |
| Finished | Aug 29 04:15:54 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1395784099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 450.usbdev_ tx_rx_disruption.1395784099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/450.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/451.usbdev_tx_rx_disruption.4073640613 |
| Short name | T3751 |
| Test name | |
| Test status | |
| Simulation time | 651038244 ps |
| CPU time | 1.65 seconds |
| Started | Aug 29 04:15:51 AM UTC 24 |
| Finished | Aug 29 04:15:54 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4073640613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 451.usbdev_ tx_rx_disruption.4073640613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/451.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/452.usbdev_tx_rx_disruption.4195135478 |
| Short name | T3756 |
| Test name | |
| Test status | |
| Simulation time | 503138344 ps |
| CPU time | 1.52 seconds |
| Started | Aug 29 04:15:51 AM UTC 24 |
| Finished | Aug 29 04:15:54 AM UTC 24 |
| Peak memory | 214848 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4195135478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 452.usbdev_ tx_rx_disruption.4195135478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/452.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/453.usbdev_tx_rx_disruption.1668268867 |
| Short name | T3763 |
| Test name | |
| Test status | |
| Simulation time | 624480468 ps |
| CPU time | 1.82 seconds |
| Started | Aug 29 04:15:51 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1668268867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 453.usbdev_ tx_rx_disruption.1668268867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/453.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/454.usbdev_tx_rx_disruption.918597650 |
| Short name | T3758 |
| Test name | |
| Test status | |
| Simulation time | 446494719 ps |
| CPU time | 1.63 seconds |
| Started | Aug 29 04:15:51 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=918597650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 454.usbdev_t x_rx_disruption.918597650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/454.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/455.usbdev_tx_rx_disruption.3642418173 |
| Short name | T3761 |
| Test name | |
| Test status | |
| Simulation time | 655709661 ps |
| CPU time | 1.74 seconds |
| Started | Aug 29 04:15:51 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 214908 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3642418173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 455.usbdev_ tx_rx_disruption.3642418173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/455.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/456.usbdev_tx_rx_disruption.140444686 |
| Short name | T3746 |
| Test name | |
| Test status | |
| Simulation time | 484983722 ps |
| CPU time | 1.31 seconds |
| Started | Aug 29 04:15:51 AM UTC 24 |
| Finished | Aug 29 04:15:54 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=140444686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 456.usbdev_t x_rx_disruption.140444686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/456.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/457.usbdev_tx_rx_disruption.3231762086 |
| Short name | T3775 |
| Test name | |
| Test status | |
| Simulation time | 652735951 ps |
| CPU time | 2.12 seconds |
| Started | Aug 29 04:15:51 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 216580 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3231762086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 457.usbdev_ tx_rx_disruption.3231762086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/457.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/458.usbdev_tx_rx_disruption.1404659685 |
| Short name | T3750 |
| Test name | |
| Test status | |
| Simulation time | 458096347 ps |
| CPU time | 1.53 seconds |
| Started | Aug 29 04:15:51 AM UTC 24 |
| Finished | Aug 29 04:15:54 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1404659685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 458.usbdev_ tx_rx_disruption.1404659685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/458.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/459.usbdev_tx_rx_disruption.3490688685 |
| Short name | T3757 |
| Test name | |
| Test status | |
| Simulation time | 554384230 ps |
| CPU time | 1.63 seconds |
| Started | Aug 29 04:15:51 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 216092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3490688685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 459.usbdev_ tx_rx_disruption.3490688685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/459.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_alert_test.3101062859 |
| Short name | T3018 |
| Test name | |
| Test status | |
| Simulation time | 58228530 ps |
| CPU time | 0.61 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 03:59:38 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3101062859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 46.usbdev_alert_test.3101062859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_disconnect.2089160096 |
| Short name | T3068 |
| Test name | |
| Test status | |
| Simulation time | 12196312445 ps |
| CPU time | 14.15 seconds |
| Started | Aug 29 03:58:36 AM UTC 24 |
| Finished | Aug 29 03:58:52 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2089160096 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_disconnect.2089160096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_reset.900922039 |
| Short name | T3071 |
| Test name | |
| Test status | |
| Simulation time | 19168466386 ps |
| CPU time | 22.73 seconds |
| Started | Aug 29 03:58:36 AM UTC 24 |
| Finished | Aug 29 03:59:01 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=900922039 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_reset.900922039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_resume.3451307314 |
| Short name | T3074 |
| Test name | |
| Test status | |
| Simulation time | 31282602242 ps |
| CPU time | 39.57 seconds |
| Started | Aug 29 03:58:36 AM UTC 24 |
| Finished | Aug 29 03:59:18 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3451307314 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_resume.3451307314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_av_buffer.1040807060 |
| Short name | T3036 |
| Test name | |
| Test status | |
| Simulation time | 157039304 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 03:58:37 AM UTC 24 |
| Finished | Aug 29 03:58:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1040807060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_av_buffer.1040807060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_bitstuff_err.1944067817 |
| Short name | T3035 |
| Test name | |
| Test status | |
| Simulation time | 161449152 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 03:58:37 AM UTC 24 |
| Finished | Aug 29 03:58:39 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1944067817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_bitstuff_err.1944067817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_data_toggle_clear.1920550302 |
| Short name | T3041 |
| Test name | |
| Test status | |
| Simulation time | 315029983 ps |
| CPU time | 1.09 seconds |
| Started | Aug 29 03:58:37 AM UTC 24 |
| Finished | Aug 29 03:58:39 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1920550302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 46.usbdev_data_toggle_clear.1920550302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_data_toggle_restore.1216716245 |
| Short name | T3055 |
| Test name | |
| Test status | |
| Simulation time | 529932817 ps |
| CPU time | 1.56 seconds |
| Started | Aug 29 03:58:37 AM UTC 24 |
| Finished | Aug 29 03:58:39 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1216716245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_data_toggle_restore.1216716245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_device_address.1476952178 |
| Short name | T3072 |
| Test name | |
| Test status | |
| Simulation time | 21726393663 ps |
| CPU time | 35.11 seconds |
| Started | Aug 29 03:58:37 AM UTC 24 |
| Finished | Aug 29 03:59:13 AM UTC 24 |
| Peak memory | 217432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1476952178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_device_address.1476952178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_device_timeout.954789917 |
| Short name | T3064 |
| Test name | |
| Test status | |
| Simulation time | 578281307 ps |
| CPU time | 9.94 seconds |
| Started | Aug 29 03:58:37 AM UTC 24 |
| Finished | Aug 29 03:58:48 AM UTC 24 |
| Peak memory | 216732 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=954789917 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_device_timeout.954789917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_disable_endpoint.3733217850 |
| Short name | T3059 |
| Test name | |
| Test status | |
| Simulation time | 947685596 ps |
| CPU time | 1.94 seconds |
| Started | Aug 29 03:58:37 AM UTC 24 |
| Finished | Aug 29 03:58:40 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3733217850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 46.usbdev_disable_endpoint.3733217850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_disconnected.3155495617 |
| Short name | T3037 |
| Test name | |
| Test status | |
| Simulation time | 141778874 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 03:58:37 AM UTC 24 |
| Finished | Aug 29 03:58:39 AM UTC 24 |
| Peak memory | 216796 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3155495617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_disconnected.3155495617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_enable.2096195736 |
| Short name | T3040 |
| Test name | |
| Test status | |
| Simulation time | 46548052 ps |
| CPU time | 0.72 seconds |
| Started | Aug 29 03:58:37 AM UTC 24 |
| Finished | Aug 29 03:58:39 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2096195736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 46.usbdev_enable.2096195736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_endpoint_access.2627249979 |
| Short name | T3060 |
| Test name | |
| Test status | |
| Simulation time | 803361421 ps |
| CPU time | 2.48 seconds |
| Started | Aug 29 03:58:37 AM UTC 24 |
| Finished | Aug 29 03:58:41 AM UTC 24 |
| Peak memory | 217200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2627249979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_endpoint_access.2627249979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_fifo_levels.939941650 |
| Short name | T3042 |
| Test name | |
| Test status | |
| Simulation time | 194479556 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 03:58:37 AM UTC 24 |
| Finished | Aug 29 03:58:39 AM UTC 24 |
| Peak memory | 214996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=939941650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 46.usbdev_fifo_levels.939941650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_fifo_rst.3479653013 |
| Short name | T3061 |
| Test name | |
| Test status | |
| Simulation time | 298310255 ps |
| CPU time | 2.79 seconds |
| Started | Aug 29 03:58:37 AM UTC 24 |
| Finished | Aug 29 03:58:41 AM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3479653013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_fifo_rst.3479653013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_in_iso.3660695896 |
| Short name | T3048 |
| Test name | |
| Test status | |
| Simulation time | 231770150 ps |
| CPU time | 1.01 seconds |
| Started | Aug 29 03:58:37 AM UTC 24 |
| Finished | Aug 29 03:58:39 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3660695896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 46.usbdev_in_iso.3660695896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_in_stall.601780245 |
| Short name | T3043 |
| Test name | |
| Test status | |
| Simulation time | 167013823 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 03:58:37 AM UTC 24 |
| Finished | Aug 29 03:58:39 AM UTC 24 |
| Peak memory | 214912 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=601780245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 46.usbdev_in_stall.601780245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_in_trans.594926331 |
| Short name | T3047 |
| Test name | |
| Test status | |
| Simulation time | 221898259 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 03:58:37 AM UTC 24 |
| Finished | Aug 29 03:58:39 AM UTC 24 |
| Peak memory | 214724 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=594926331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 46.usbdev_in_trans.594926331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_invalid_sync.3881289093 |
| Short name | T3166 |
| Test name | |
| Test status | |
| Simulation time | 5226619471 ps |
| CPU time | 127.21 seconds |
| Started | Aug 29 03:58:37 AM UTC 24 |
| Finished | Aug 29 04:00:47 AM UTC 24 |
| Peak memory | 232420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3881289093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 46.usbdev_invalid_sync.3881289093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_iso_retraction.2103889717 |
| Short name | T3168 |
| Test name | |
| Test status | |
| Simulation time | 12600465447 ps |
| CPU time | 131.69 seconds |
| Started | Aug 29 03:58:37 AM UTC 24 |
| Finished | Aug 29 04:00:51 AM UTC 24 |
| Peak memory | 217392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2103889717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_iso_retraction.2103889717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_link_in_err.3259268388 |
| Short name | T3045 |
| Test name | |
| Test status | |
| Simulation time | 165228912 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 03:58:37 AM UTC 24 |
| Finished | Aug 29 03:58:39 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3259268388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_link_in_err.3259268388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_link_resume.3019976379 |
| Short name | T3065 |
| Test name | |
| Test status | |
| Simulation time | 7556262186 ps |
| CPU time | 9.84 seconds |
| Started | Aug 29 03:58:37 AM UTC 24 |
| Finished | Aug 29 03:58:48 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3019976379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_link_resume.3019976379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_link_suspend.2979484363 |
| Short name | T3063 |
| Test name | |
| Test status | |
| Simulation time | 4816717692 ps |
| CPU time | 6.28 seconds |
| Started | Aug 29 03:58:37 AM UTC 24 |
| Finished | Aug 29 03:58:45 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2979484363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_link_suspend.2979484363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_low_speed_traffic.4202270914 |
| Short name | T3124 |
| Test name | |
| Test status | |
| Simulation time | 4158211996 ps |
| CPU time | 100.46 seconds |
| Started | Aug 29 03:58:37 AM UTC 24 |
| Finished | Aug 29 04:00:20 AM UTC 24 |
| Peak memory | 229472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4202270914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_low_speed_traffic.4202270914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_max_inter_pkt_delay.1446588009 |
| Short name | T3067 |
| Test name | |
| Test status | |
| Simulation time | 1761971773 ps |
| CPU time | 10.73 seconds |
| Started | Aug 29 03:58:37 AM UTC 24 |
| Finished | Aug 29 03:58:49 AM UTC 24 |
| Peak memory | 234240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1446588009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_max_inter_pkt_delay.1446588009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_max_length_in_transaction.1346235283 |
| Short name | T3051 |
| Test name | |
| Test status | |
| Simulation time | 240709301 ps |
| CPU time | 0.9 seconds |
| Started | Aug 29 03:58:37 AM UTC 24 |
| Finished | Aug 29 03:58:39 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1346235283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 46.usbdev_max_length_in_transaction.1346235283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_max_length_out_transaction.1737266740 |
| Short name | T3052 |
| Test name | |
| Test status | |
| Simulation time | 197065530 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 03:58:37 AM UTC 24 |
| Finished | Aug 29 03:58:39 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1737266740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 46.usbdev_max_length_out_transaction.1737266740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_min_inter_pkt_delay.4210894084 |
| Short name | T3069 |
| Test name | |
| Test status | |
| Simulation time | 2515718052 ps |
| CPU time | 16.28 seconds |
| Started | Aug 29 03:58:37 AM UTC 24 |
| Finished | Aug 29 03:58:55 AM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4210894084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_min_inter_pkt_delay.4210894084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_min_length_in_transaction.791930807 |
| Short name | T3049 |
| Test name | |
| Test status | |
| Simulation time | 154077416 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 03:58:37 AM UTC 24 |
| Finished | Aug 29 03:58:39 AM UTC 24 |
| Peak memory | 216848 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=791930807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 46.usbdev_min_length_in_transaction.791930807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_min_length_out_transaction.3377697754 |
| Short name | T3053 |
| Test name | |
| Test status | |
| Simulation time | 153425129 ps |
| CPU time | 0.76 seconds |
| Started | Aug 29 03:58:37 AM UTC 24 |
| Finished | Aug 29 03:58:39 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3377697754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 46.usbdev_min_length_out_transaction.3377697754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_nak_trans.3778673161 |
| Short name | T3058 |
| Test name | |
| Test status | |
| Simulation time | 219345286 ps |
| CPU time | 0.88 seconds |
| Started | Aug 29 03:58:37 AM UTC 24 |
| Finished | Aug 29 03:58:40 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3778673161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_nak_trans.3778673161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_out_iso.3125554879 |
| Short name | T3050 |
| Test name | |
| Test status | |
| Simulation time | 143227559 ps |
| CPU time | 0.75 seconds |
| Started | Aug 29 03:58:37 AM UTC 24 |
| Finished | Aug 29 03:58:39 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3125554879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 46.usbdev_out_iso.3125554879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_out_stall.4225706607 |
| Short name | T3054 |
| Test name | |
| Test status | |
| Simulation time | 161570783 ps |
| CPU time | 0.91 seconds |
| Started | Aug 29 03:58:37 AM UTC 24 |
| Finished | Aug 29 03:58:39 AM UTC 24 |
| Peak memory | 214776 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4225706607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_out_stall.4225706607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_out_trans_nak.2831738762 |
| Short name | T3056 |
| Test name | |
| Test status | |
| Simulation time | 160310852 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 03:58:37 AM UTC 24 |
| Finished | Aug 29 03:58:39 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2831738762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 46.usbdev_out_trans_nak.2831738762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_pending_in_trans.2591809400 |
| Short name | T3057 |
| Test name | |
| Test status | |
| Simulation time | 159095759 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 03:58:37 AM UTC 24 |
| Finished | Aug 29 03:58:39 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2591809400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 46.usbdev_pending_in_trans.2591809400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_phy_config_pinflip.225334851 |
| Short name | T3082 |
| Test name | |
| Test status | |
| Simulation time | 215722702 ps |
| CPU time | 0.95 seconds |
| Started | Aug 29 03:59:35 AM UTC 24 |
| Finished | Aug 29 03:59:38 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=225334851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 46.usbdev_phy_config_pinflip.225334851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_phy_config_usb_ref_disable.1749425405 |
| Short name | T3077 |
| Test name | |
| Test status | |
| Simulation time | 150168171 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 03:59:35 AM UTC 24 |
| Finished | Aug 29 03:59:38 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1749425405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 46.usbdev_phy_config_usb_ref_disable.1749425405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_phy_pins_sense.849327740 |
| Short name | T3076 |
| Test name | |
| Test status | |
| Simulation time | 39900787 ps |
| CPU time | 0.59 seconds |
| Started | Aug 29 03:59:35 AM UTC 24 |
| Finished | Aug 29 03:59:37 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=849327740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 46.usbdev_phy_pins_sense.849327740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_buffer.2096210629 |
| Short name | T3116 |
| Test name | |
| Test status | |
| Simulation time | 9114856139 ps |
| CPU time | 21.52 seconds |
| Started | Aug 29 03:59:35 AM UTC 24 |
| Finished | Aug 29 03:59:59 AM UTC 24 |
| Peak memory | 227588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2096210629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 46.usbdev_pkt_buffer.2096210629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_received.868421279 |
| Short name | T3078 |
| Test name | |
| Test status | |
| Simulation time | 163592993 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 03:59:35 AM UTC 24 |
| Finished | Aug 29 03:59:38 AM UTC 24 |
| Peak memory | 214904 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=868421279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_pkt_received.868421279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_sent.3535312702 |
| Short name | T3080 |
| Test name | |
| Test status | |
| Simulation time | 246439590 ps |
| CPU time | 0.92 seconds |
| Started | Aug 29 03:59:35 AM UTC 24 |
| Finished | Aug 29 03:59:38 AM UTC 24 |
| Peak memory | 214968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3535312702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_pkt_sent.3535312702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_random_length_in_transaction.1055526865 |
| Short name | T3081 |
| Test name | |
| Test status | |
| Simulation time | 248395111 ps |
| CPU time | 0.92 seconds |
| Started | Aug 29 03:59:35 AM UTC 24 |
| Finished | Aug 29 03:59:38 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1055526865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 46.usbdev_random_length_in_transaction.1055526865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_random_length_out_transaction.2901138877 |
| Short name | T3079 |
| Test name | |
| Test status | |
| Simulation time | 193220902 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 03:59:35 AM UTC 24 |
| Finished | Aug 29 03:59:38 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2901138877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 46.usbdev_random_length_out_transaction.2901138877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_rx_crc_err.3032528554 |
| Short name | T3084 |
| Test name | |
| Test status | |
| Simulation time | 151667436 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 03:59:35 AM UTC 24 |
| Finished | Aug 29 03:59:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3032528554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 46.usbdev_rx_crc_err.3032528554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_rx_full.3234764335 |
| Short name | T3019 |
| Test name | |
| Test status | |
| Simulation time | 263741557 ps |
| CPU time | 1.15 seconds |
| Started | Aug 29 03:59:35 AM UTC 24 |
| Finished | Aug 29 03:59:39 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3234764335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 46.usbdev_rx_full.3234764335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_setup_stage.1823891570 |
| Short name | T3085 |
| Test name | |
| Test status | |
| Simulation time | 152001989 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 03:59:35 AM UTC 24 |
| Finished | Aug 29 03:59:38 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1823891570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_setup_stage.1823891570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_setup_trans_ignored.1414171501 |
| Short name | T3086 |
| Test name | |
| Test status | |
| Simulation time | 170337473 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 03:59:35 AM UTC 24 |
| Finished | Aug 29 03:59:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1414171501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 46.usbdev_setup_trans_ignored.1414171501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_smoke.2068928013 |
| Short name | T3024 |
| Test name | |
| Test status | |
| Simulation time | 214232728 ps |
| CPU time | 0.9 seconds |
| Started | Aug 29 03:59:35 AM UTC 24 |
| Finished | Aug 29 03:59:38 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2068928013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_smoke.2068928013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_spurious_pids_ignored.442683965 |
| Short name | T3164 |
| Test name | |
| Test status | |
| Simulation time | 2556122654 ps |
| CPU time | 61.76 seconds |
| Started | Aug 29 03:59:35 AM UTC 24 |
| Finished | Aug 29 04:00:40 AM UTC 24 |
| Peak memory | 229328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=442683965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 46.usbdev_spurious_pids_ignored.442683965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_stall_priority_over_nak.663175294 |
| Short name | T3087 |
| Test name | |
| Test status | |
| Simulation time | 177103057 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 03:59:35 AM UTC 24 |
| Finished | Aug 29 03:59:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=663175294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_stall_priority_over_nak.663175294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_stall_trans.2136896713 |
| Short name | T3031 |
| Test name | |
| Test status | |
| Simulation time | 195700149 ps |
| CPU time | 0.98 seconds |
| Started | Aug 29 03:59:35 AM UTC 24 |
| Finished | Aug 29 03:59:39 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2136896713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_stall_trans.2136896713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_stream_len_max.3819070904 |
| Short name | T3025 |
| Test name | |
| Test status | |
| Simulation time | 229562347 ps |
| CPU time | 0.95 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 03:59:39 AM UTC 24 |
| Peak memory | 214908 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3819070904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_stream_len_max.3819070904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_streaming_out.4219841328 |
| Short name | T3119 |
| Test name | |
| Test status | |
| Simulation time | 3209766860 ps |
| CPU time | 28.18 seconds |
| Started | Aug 29 03:59:35 AM UTC 24 |
| Finished | Aug 29 04:00:06 AM UTC 24 |
| Peak memory | 233968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4219841328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_streaming_out.4219841328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_timeout_missing_host_handshake.207992055 |
| Short name | T3062 |
| Test name | |
| Test status | |
| Simulation time | 641122258 ps |
| CPU time | 4.39 seconds |
| Started | Aug 29 03:58:37 AM UTC 24 |
| Finished | Aug 29 03:58:42 AM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=207992055 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_timeout_missing_host_handshake.207992055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/46.usbdev_tx_rx_disruption.42300333 |
| Short name | T3095 |
| Test name | |
| Test status | |
| Simulation time | 457227885 ps |
| CPU time | 1.64 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 03:59:39 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=42300333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_tx_ rx_disruption.42300333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/46.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/460.usbdev_tx_rx_disruption.3909961617 |
| Short name | T3744 |
| Test name | |
| Test status | |
| Simulation time | 551721372 ps |
| CPU time | 1.33 seconds |
| Started | Aug 29 04:15:51 AM UTC 24 |
| Finished | Aug 29 04:15:54 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3909961617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 460.usbdev_ tx_rx_disruption.3909961617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/460.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/461.usbdev_tx_rx_disruption.3163682525 |
| Short name | T3755 |
| Test name | |
| Test status | |
| Simulation time | 494919965 ps |
| CPU time | 1.42 seconds |
| Started | Aug 29 04:15:51 AM UTC 24 |
| Finished | Aug 29 04:15:54 AM UTC 24 |
| Peak memory | 216428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3163682525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 461.usbdev_ tx_rx_disruption.3163682525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/461.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/462.usbdev_tx_rx_disruption.3328712995 |
| Short name | T3754 |
| Test name | |
| Test status | |
| Simulation time | 489929703 ps |
| CPU time | 1.37 seconds |
| Started | Aug 29 04:15:51 AM UTC 24 |
| Finished | Aug 29 04:15:54 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3328712995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 462.usbdev_ tx_rx_disruption.3328712995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/462.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/463.usbdev_tx_rx_disruption.2754235494 |
| Short name | T3776 |
| Test name | |
| Test status | |
| Simulation time | 488707584 ps |
| CPU time | 1.93 seconds |
| Started | Aug 29 04:15:51 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 215000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2754235494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 463.usbdev_ tx_rx_disruption.2754235494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/463.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/464.usbdev_tx_rx_disruption.3170717786 |
| Short name | T3784 |
| Test name | |
| Test status | |
| Simulation time | 571123314 ps |
| CPU time | 2.09 seconds |
| Started | Aug 29 04:15:51 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 217044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3170717786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 464.usbdev_ tx_rx_disruption.3170717786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/464.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/465.usbdev_tx_rx_disruption.1014203421 |
| Short name | T3767 |
| Test name | |
| Test status | |
| Simulation time | 704303580 ps |
| CPU time | 1.77 seconds |
| Started | Aug 29 04:15:51 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1014203421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 465.usbdev_ tx_rx_disruption.1014203421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/465.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/466.usbdev_tx_rx_disruption.1673235403 |
| Short name | T3770 |
| Test name | |
| Test status | |
| Simulation time | 551374737 ps |
| CPU time | 1.94 seconds |
| Started | Aug 29 04:15:51 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1673235403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 466.usbdev_ tx_rx_disruption.1673235403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/466.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/467.usbdev_tx_rx_disruption.2396693630 |
| Short name | T3759 |
| Test name | |
| Test status | |
| Simulation time | 505165149 ps |
| CPU time | 1.51 seconds |
| Started | Aug 29 04:15:51 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2396693630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 467.usbdev_ tx_rx_disruption.2396693630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/467.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/468.usbdev_tx_rx_disruption.3188792857 |
| Short name | T3769 |
| Test name | |
| Test status | |
| Simulation time | 560457227 ps |
| CPU time | 1.78 seconds |
| Started | Aug 29 04:15:51 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3188792857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 468.usbdev_ tx_rx_disruption.3188792857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/468.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/469.usbdev_tx_rx_disruption.4040754484 |
| Short name | T3777 |
| Test name | |
| Test status | |
| Simulation time | 469618489 ps |
| CPU time | 1.95 seconds |
| Started | Aug 29 04:15:51 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4040754484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 469.usbdev_ tx_rx_disruption.4040754484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/469.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_alert_test.1805375919 |
| Short name | T3138 |
| Test name | |
| Test status | |
| Simulation time | 41382252 ps |
| CPU time | 0.62 seconds |
| Started | Aug 29 04:00:35 AM UTC 24 |
| Finished | Aug 29 04:00:37 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1805375919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 47.usbdev_alert_test.1805375919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_disconnect.3436384845 |
| Short name | T3111 |
| Test name | |
| Test status | |
| Simulation time | 5121220485 ps |
| CPU time | 8.09 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 03:59:46 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3436384845 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_disconnect.3436384845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_reset.3765659405 |
| Short name | T3115 |
| Test name | |
| Test status | |
| Simulation time | 15544006022 ps |
| CPU time | 17.98 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 03:59:56 AM UTC 24 |
| Peak memory | 227452 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3765659405 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_reset.3765659405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_resume.3883959246 |
| Short name | T3121 |
| Test name | |
| Test status | |
| Simulation time | 25312596345 ps |
| CPU time | 31.62 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 04:00:10 AM UTC 24 |
| Peak memory | 227460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3883959246 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_resume.3883959246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_av_buffer.2137678303 |
| Short name | T3015 |
| Test name | |
| Test status | |
| Simulation time | 216986150 ps |
| CPU time | 0.97 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 03:59:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2137678303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_av_buffer.2137678303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_bitstuff_err.2066743987 |
| Short name | T3038 |
| Test name | |
| Test status | |
| Simulation time | 189316146 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 03:59:38 AM UTC 24 |
| Peak memory | 216956 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2066743987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_bitstuff_err.2066743987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_data_toggle_clear.775999649 |
| Short name | T3093 |
| Test name | |
| Test status | |
| Simulation time | 458854668 ps |
| CPU time | 1.57 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 03:59:39 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=775999649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 47.usbdev_data_toggle_clear.775999649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_data_toggle_restore.1550687475 |
| Short name | T3098 |
| Test name | |
| Test status | |
| Simulation time | 300345964 ps |
| CPU time | 1.52 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 03:59:39 AM UTC 24 |
| Peak memory | 214916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1550687475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_data_toggle_restore.1550687475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_device_address.2585366461 |
| Short name | T3125 |
| Test name | |
| Test status | |
| Simulation time | 25468882679 ps |
| CPU time | 42.77 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 04:00:21 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2585366461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_device_address.2585366461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_device_timeout.2776219612 |
| Short name | T3118 |
| Test name | |
| Test status | |
| Simulation time | 4981270664 ps |
| CPU time | 28.16 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 04:00:06 AM UTC 24 |
| Peak memory | 217428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2776219612 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_device_timeout.2776219612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_disable_endpoint.3395222286 |
| Short name | T3108 |
| Test name | |
| Test status | |
| Simulation time | 936048999 ps |
| CPU time | 2.07 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 03:59:40 AM UTC 24 |
| Peak memory | 216972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3395222286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 47.usbdev_disable_endpoint.3395222286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_disconnected.810144406 |
| Short name | T3091 |
| Test name | |
| Test status | |
| Simulation time | 185747424 ps |
| CPU time | 1.26 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 03:59:39 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=810144406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_disconnected.810144406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_enable.1582066000 |
| Short name | T3089 |
| Test name | |
| Test status | |
| Simulation time | 96535422 ps |
| CPU time | 0.75 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 03:59:39 AM UTC 24 |
| Peak memory | 214796 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1582066000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 47.usbdev_enable.1582066000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_endpoint_access.667950005 |
| Short name | T3110 |
| Test name | |
| Test status | |
| Simulation time | 1002881860 ps |
| CPU time | 2.51 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 03:59:41 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=667950005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_endpoint_access.667950005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_endpoint_types.1850099314 |
| Short name | T587 |
| Test name | |
| Test status | |
| Simulation time | 346443025 ps |
| CPU time | 1.18 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 03:59:39 AM UTC 24 |
| Peak memory | 214948 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1850099314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_endpoint_types.1850099314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_fifo_levels.3660613534 |
| Short name | T337 |
| Test name | |
| Test status | |
| Simulation time | 252173856 ps |
| CPU time | 1.34 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 03:59:39 AM UTC 24 |
| Peak memory | 214916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3660613534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_fifo_levels.3660613534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_fifo_rst.2843743809 |
| Short name | T3109 |
| Test name | |
| Test status | |
| Simulation time | 369432789 ps |
| CPU time | 2.22 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 03:59:40 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2843743809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_fifo_rst.2843743809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_in_iso.2252851236 |
| Short name | T3092 |
| Test name | |
| Test status | |
| Simulation time | 150590290 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 03:59:39 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2252851236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 47.usbdev_in_iso.2252851236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_in_stall.4180470707 |
| Short name | T3046 |
| Test name | |
| Test status | |
| Simulation time | 137853959 ps |
| CPU time | 0.71 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 03:59:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4180470707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_in_stall.4180470707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_in_trans.255954272 |
| Short name | T3096 |
| Test name | |
| Test status | |
| Simulation time | 221574344 ps |
| CPU time | 1.2 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 03:59:39 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=255954272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 47.usbdev_in_trans.255954272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_invalid_sync.456215015 |
| Short name | T3120 |
| Test name | |
| Test status | |
| Simulation time | 3436440707 ps |
| CPU time | 30.29 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 04:00:09 AM UTC 24 |
| Peak memory | 229580 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=456215015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_invalid_sync.456215015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_iso_retraction.3625136884 |
| Short name | T3179 |
| Test name | |
| Test status | |
| Simulation time | 9022795595 ps |
| CPU time | 96.76 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 04:01:16 AM UTC 24 |
| Peak memory | 217392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3625136884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_iso_retraction.3625136884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_link_in_err.2305086686 |
| Short name | T3099 |
| Test name | |
| Test status | |
| Simulation time | 218365789 ps |
| CPU time | 1.17 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 03:59:39 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2305086686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_link_in_err.2305086686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_link_resume.1013667012 |
| Short name | T3123 |
| Test name | |
| Test status | |
| Simulation time | 27373785792 ps |
| CPU time | 39.01 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 04:00:18 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1013667012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_link_resume.1013667012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_link_suspend.1649040693 |
| Short name | T3112 |
| Test name | |
| Test status | |
| Simulation time | 5741669603 ps |
| CPU time | 9.06 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 03:59:48 AM UTC 24 |
| Peak memory | 217356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1649040693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_link_suspend.1649040693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_low_speed_traffic.3349712932 |
| Short name | T3117 |
| Test name | |
| Test status | |
| Simulation time | 3833010428 ps |
| CPU time | 24.51 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 04:00:03 AM UTC 24 |
| Peak memory | 229592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3349712932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_low_speed_traffic.3349712932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_max_inter_pkt_delay.1159534100 |
| Short name | T3113 |
| Test name | |
| Test status | |
| Simulation time | 1850668477 ps |
| CPU time | 12.4 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 03:59:51 AM UTC 24 |
| Peak memory | 227424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1159534100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_max_inter_pkt_delay.1159534100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_max_length_in_transaction.3458628256 |
| Short name | T3107 |
| Test name | |
| Test status | |
| Simulation time | 295753343 ps |
| CPU time | 1.46 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 03:59:40 AM UTC 24 |
| Peak memory | 214832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3458628256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 47.usbdev_max_length_in_transaction.3458628256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_max_length_out_transaction.905610253 |
| Short name | T3094 |
| Test name | |
| Test status | |
| Simulation time | 201760611 ps |
| CPU time | 0.9 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 03:59:39 AM UTC 24 |
| Peak memory | 215032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=905610253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 47.usbdev_max_length_out_transaction.905610253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_min_inter_pkt_delay.1292242016 |
| Short name | T3114 |
| Test name | |
| Test status | |
| Simulation time | 2497161911 ps |
| CPU time | 15.96 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 03:59:55 AM UTC 24 |
| Peak memory | 234232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1292242016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_min_inter_pkt_delay.1292242016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_min_length_in_transaction.2319578612 |
| Short name | T3104 |
| Test name | |
| Test status | |
| Simulation time | 168372190 ps |
| CPU time | 1.25 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 03:59:40 AM UTC 24 |
| Peak memory | 215028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2319578612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 47.usbdev_min_length_in_transaction.2319578612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_min_length_out_transaction.2664417973 |
| Short name | T3103 |
| Test name | |
| Test status | |
| Simulation time | 151214420 ps |
| CPU time | 1.14 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 03:59:40 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2664417973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_min_length_out_transaction.2664417973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_nak_trans.355872325 |
| Short name | T3105 |
| Test name | |
| Test status | |
| Simulation time | 255483922 ps |
| CPU time | 1.29 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 03:59:40 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=355872325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_nak_trans.355872325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_out_iso.1380586973 |
| Short name | T3102 |
| Test name | |
| Test status | |
| Simulation time | 199940538 ps |
| CPU time | 1.14 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 03:59:40 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1380586973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 47.usbdev_out_iso.1380586973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_out_stall.738670389 |
| Short name | T3106 |
| Test name | |
| Test status | |
| Simulation time | 164292698 ps |
| CPU time | 1.28 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 03:59:40 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=738670389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_out_stall.738670389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_out_trans_nak.2743300201 |
| Short name | T3100 |
| Test name | |
| Test status | |
| Simulation time | 165012404 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 03:59:37 AM UTC 24 |
| Finished | Aug 29 03:59:39 AM UTC 24 |
| Peak memory | 214916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2743300201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 47.usbdev_out_trans_nak.2743300201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_pending_in_trans.539797173 |
| Short name | T3101 |
| Test name | |
| Test status | |
| Simulation time | 151741838 ps |
| CPU time | 1 seconds |
| Started | Aug 29 03:59:37 AM UTC 24 |
| Finished | Aug 29 03:59:40 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=539797173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_pending_in_trans.539797173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_phy_config_pinflip.4287225030 |
| Short name | T3097 |
| Test name | |
| Test status | |
| Simulation time | 208986899 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 03:59:37 AM UTC 24 |
| Finished | Aug 29 03:59:39 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4287225030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 47.usbdev_phy_config_pinflip.4287225030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_phy_config_usb_ref_disable.1921355355 |
| Short name | T3127 |
| Test name | |
| Test status | |
| Simulation time | 141560867 ps |
| CPU time | 0.76 seconds |
| Started | Aug 29 04:00:34 AM UTC 24 |
| Finished | Aug 29 04:00:36 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1921355355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_phy_config_usb_ref_disable.1921355355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_phy_pins_sense.1572948967 |
| Short name | T3126 |
| Test name | |
| Test status | |
| Simulation time | 33851615 ps |
| CPU time | 0.61 seconds |
| Started | Aug 29 04:00:34 AM UTC 24 |
| Finished | Aug 29 04:00:36 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1572948967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_phy_pins_sense.1572948967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_buffer.3611321119 |
| Short name | T3180 |
| Test name | |
| Test status | |
| Simulation time | 21255842527 ps |
| CPU time | 48.42 seconds |
| Started | Aug 29 04:00:34 AM UTC 24 |
| Finished | Aug 29 04:01:25 AM UTC 24 |
| Peak memory | 227552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3611321119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 47.usbdev_pkt_buffer.3611321119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_received.3364716227 |
| Short name | T3129 |
| Test name | |
| Test status | |
| Simulation time | 182698934 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 04:00:34 AM UTC 24 |
| Finished | Aug 29 04:00:37 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3364716227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_pkt_received.3364716227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_sent.277043177 |
| Short name | T3134 |
| Test name | |
| Test status | |
| Simulation time | 255646991 ps |
| CPU time | 1 seconds |
| Started | Aug 29 04:00:34 AM UTC 24 |
| Finished | Aug 29 04:00:37 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=277043177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 47.usbdev_pkt_sent.277043177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_random_length_in_transaction.2352428645 |
| Short name | T3136 |
| Test name | |
| Test status | |
| Simulation time | 176719801 ps |
| CPU time | 0.82 seconds |
| Started | Aug 29 04:00:34 AM UTC 24 |
| Finished | Aug 29 04:00:37 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2352428645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 47.usbdev_random_length_in_transaction.2352428645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_random_length_out_transaction.277841981 |
| Short name | T3130 |
| Test name | |
| Test status | |
| Simulation time | 179092632 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 04:00:34 AM UTC 24 |
| Finished | Aug 29 04:00:37 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=277841981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 47.usbdev_random_length_out_transaction.277841981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_rx_crc_err.2314059167 |
| Short name | T3133 |
| Test name | |
| Test status | |
| Simulation time | 182412661 ps |
| CPU time | 0.75 seconds |
| Started | Aug 29 04:00:34 AM UTC 24 |
| Finished | Aug 29 04:00:37 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2314059167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 47.usbdev_rx_crc_err.2314059167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_rx_full.896631578 |
| Short name | T3140 |
| Test name | |
| Test status | |
| Simulation time | 245176373 ps |
| CPU time | 0.95 seconds |
| Started | Aug 29 04:00:35 AM UTC 24 |
| Finished | Aug 29 04:00:37 AM UTC 24 |
| Peak memory | 216104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=896631578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 47.usbdev_rx_full.896631578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_setup_stage.569171464 |
| Short name | T3131 |
| Test name | |
| Test status | |
| Simulation time | 165288666 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 04:00:35 AM UTC 24 |
| Finished | Aug 29 04:00:37 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=569171464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 47.usbdev_setup_stage.569171464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_setup_trans_ignored.3881640093 |
| Short name | T3135 |
| Test name | |
| Test status | |
| Simulation time | 177476927 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 04:00:35 AM UTC 24 |
| Finished | Aug 29 04:00:37 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3881640093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 47.usbdev_setup_trans_ignored.3881640093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_smoke.690460784 |
| Short name | T3139 |
| Test name | |
| Test status | |
| Simulation time | 204729007 ps |
| CPU time | 0.88 seconds |
| Started | Aug 29 04:00:35 AM UTC 24 |
| Finished | Aug 29 04:00:37 AM UTC 24 |
| Peak memory | 215656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=690460784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_smoke.690460784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_spurious_pids_ignored.2074702440 |
| Short name | T3182 |
| Test name | |
| Test status | |
| Simulation time | 2398794066 ps |
| CPU time | 57.07 seconds |
| Started | Aug 29 04:00:35 AM UTC 24 |
| Finished | Aug 29 04:01:34 AM UTC 24 |
| Peak memory | 229956 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2074702440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 47.usbdev_spurious_pids_ignored.2074702440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_stall_priority_over_nak.564571074 |
| Short name | T3141 |
| Test name | |
| Test status | |
| Simulation time | 200980380 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 04:00:35 AM UTC 24 |
| Finished | Aug 29 04:00:37 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=564571074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_stall_priority_over_nak.564571074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_stall_trans.1465229024 |
| Short name | T3137 |
| Test name | |
| Test status | |
| Simulation time | 197742282 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 04:00:35 AM UTC 24 |
| Finished | Aug 29 04:00:37 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1465229024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_stall_trans.1465229024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_stream_len_max.456826708 |
| Short name | T3161 |
| Test name | |
| Test status | |
| Simulation time | 1173833318 ps |
| CPU time | 2.78 seconds |
| Started | Aug 29 04:00:35 AM UTC 24 |
| Finished | Aug 29 04:00:39 AM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=456826708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 47.usbdev_stream_len_max.456826708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_streaming_out.1736226769 |
| Short name | T3171 |
| Test name | |
| Test status | |
| Simulation time | 2705135681 ps |
| CPU time | 18.2 seconds |
| Started | Aug 29 04:00:35 AM UTC 24 |
| Finished | Aug 29 04:00:54 AM UTC 24 |
| Peak memory | 229628 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1736226769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_streaming_out.1736226769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_timeout_missing_host_handshake.781865771 |
| Short name | T3122 |
| Test name | |
| Test status | |
| Simulation time | 4777524579 ps |
| CPU time | 37.72 seconds |
| Started | Aug 29 03:59:36 AM UTC 24 |
| Finished | Aug 29 04:00:16 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=781865771 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_timeout_missing_host_handshake.781865771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/47.usbdev_tx_rx_disruption.303320148 |
| Short name | T3153 |
| Test name | |
| Test status | |
| Simulation time | 678919069 ps |
| CPU time | 1.93 seconds |
| Started | Aug 29 04:00:35 AM UTC 24 |
| Finished | Aug 29 04:00:38 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=303320148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_tx _rx_disruption.303320148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/47.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/470.usbdev_tx_rx_disruption.2760479764 |
| Short name | T3762 |
| Test name | |
| Test status | |
| Simulation time | 448780971 ps |
| CPU time | 1.6 seconds |
| Started | Aug 29 04:15:52 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2760479764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 470.usbdev_ tx_rx_disruption.2760479764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/470.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/471.usbdev_tx_rx_disruption.1685856307 |
| Short name | T3760 |
| Test name | |
| Test status | |
| Simulation time | 655746817 ps |
| CPU time | 1.54 seconds |
| Started | Aug 29 04:15:52 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1685856307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 471.usbdev_ tx_rx_disruption.1685856307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/471.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/472.usbdev_tx_rx_disruption.461786286 |
| Short name | T3764 |
| Test name | |
| Test status | |
| Simulation time | 447495522 ps |
| CPU time | 1.54 seconds |
| Started | Aug 29 04:15:52 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=461786286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 472.usbdev_t x_rx_disruption.461786286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/472.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/473.usbdev_tx_rx_disruption.3516549671 |
| Short name | T3766 |
| Test name | |
| Test status | |
| Simulation time | 584214880 ps |
| CPU time | 1.58 seconds |
| Started | Aug 29 04:15:52 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3516549671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 473.usbdev_ tx_rx_disruption.3516549671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/473.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/474.usbdev_tx_rx_disruption.2558776363 |
| Short name | T3771 |
| Test name | |
| Test status | |
| Simulation time | 462344974 ps |
| CPU time | 1.77 seconds |
| Started | Aug 29 04:15:52 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2558776363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 474.usbdev_ tx_rx_disruption.2558776363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/474.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/475.usbdev_tx_rx_disruption.3946139482 |
| Short name | T3788 |
| Test name | |
| Test status | |
| Simulation time | 682057656 ps |
| CPU time | 2.12 seconds |
| Started | Aug 29 04:15:52 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3946139482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 475.usbdev_ tx_rx_disruption.3946139482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/475.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/476.usbdev_tx_rx_disruption.184659057 |
| Short name | T3768 |
| Test name | |
| Test status | |
| Simulation time | 474437568 ps |
| CPU time | 1.56 seconds |
| Started | Aug 29 04:15:52 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=184659057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 476.usbdev_t x_rx_disruption.184659057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/476.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/477.usbdev_tx_rx_disruption.3357807806 |
| Short name | T3781 |
| Test name | |
| Test status | |
| Simulation time | 503858862 ps |
| CPU time | 1.84 seconds |
| Started | Aug 29 04:15:52 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3357807806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 477.usbdev_ tx_rx_disruption.3357807806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/477.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/478.usbdev_tx_rx_disruption.1442932048 |
| Short name | T3772 |
| Test name | |
| Test status | |
| Simulation time | 553927384 ps |
| CPU time | 1.64 seconds |
| Started | Aug 29 04:15:52 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1442932048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 478.usbdev_ tx_rx_disruption.1442932048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/478.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/479.usbdev_tx_rx_disruption.547217184 |
| Short name | T3789 |
| Test name | |
| Test status | |
| Simulation time | 538713870 ps |
| CPU time | 1.88 seconds |
| Started | Aug 29 04:15:52 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=547217184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 479.usbdev_t x_rx_disruption.547217184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/479.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_alert_test.4084349449 |
| Short name | T3196 |
| Test name | |
| Test status | |
| Simulation time | 89720863 ps |
| CPU time | 0.65 seconds |
| Started | Aug 29 04:01:35 AM UTC 24 |
| Finished | Aug 29 04:01:38 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4084349449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 48.usbdev_alert_test.4084349449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_disconnect.3349895437 |
| Short name | T3165 |
| Test name | |
| Test status | |
| Simulation time | 5429625937 ps |
| CPU time | 7.96 seconds |
| Started | Aug 29 04:00:35 AM UTC 24 |
| Finished | Aug 29 04:00:45 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3349895437 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_disconnect.3349895437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_reset.1785875468 |
| Short name | T3173 |
| Test name | |
| Test status | |
| Simulation time | 15559436354 ps |
| CPU time | 18.71 seconds |
| Started | Aug 29 04:00:35 AM UTC 24 |
| Finished | Aug 29 04:00:55 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1785875468 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_reset.1785875468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_resume.3532020436 |
| Short name | T3178 |
| Test name | |
| Test status | |
| Simulation time | 28417908808 ps |
| CPU time | 33.72 seconds |
| Started | Aug 29 04:00:35 AM UTC 24 |
| Finished | Aug 29 04:01:10 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3532020436 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_resume.3532020436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_av_buffer.1440070901 |
| Short name | T3143 |
| Test name | |
| Test status | |
| Simulation time | 148475228 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 04:00:35 AM UTC 24 |
| Finished | Aug 29 04:00:37 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1440070901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_av_buffer.1440070901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_bitstuff_err.3355969081 |
| Short name | T3142 |
| Test name | |
| Test status | |
| Simulation time | 143745373 ps |
| CPU time | 0.75 seconds |
| Started | Aug 29 04:00:35 AM UTC 24 |
| Finished | Aug 29 04:00:37 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3355969081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_bitstuff_err.3355969081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_data_toggle_clear.2358929145 |
| Short name | T3151 |
| Test name | |
| Test status | |
| Simulation time | 334401450 ps |
| CPU time | 1.41 seconds |
| Started | Aug 29 04:00:35 AM UTC 24 |
| Finished | Aug 29 04:00:38 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2358929145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 48.usbdev_data_toggle_clear.2358929145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_data_toggle_restore.3356532731 |
| Short name | T3156 |
| Test name | |
| Test status | |
| Simulation time | 505665211 ps |
| CPU time | 1.57 seconds |
| Started | Aug 29 04:00:35 AM UTC 24 |
| Finished | Aug 29 04:00:38 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3356532731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_data_toggle_restore.3356532731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_device_address.1557013275 |
| Short name | T3181 |
| Test name | |
| Test status | |
| Simulation time | 33255413094 ps |
| CPU time | 53.95 seconds |
| Started | Aug 29 04:00:35 AM UTC 24 |
| Finished | Aug 29 04:01:31 AM UTC 24 |
| Peak memory | 217268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1557013275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_device_address.1557013275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_device_timeout.3448785869 |
| Short name | T3170 |
| Test name | |
| Test status | |
| Simulation time | 886836294 ps |
| CPU time | 15.94 seconds |
| Started | Aug 29 04:00:35 AM UTC 24 |
| Finished | Aug 29 04:00:53 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3448785869 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_device_timeout.3448785869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_disable_endpoint.1976679662 |
| Short name | T3160 |
| Test name | |
| Test status | |
| Simulation time | 767277227 ps |
| CPU time | 1.75 seconds |
| Started | Aug 29 04:00:35 AM UTC 24 |
| Finished | Aug 29 04:00:38 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1976679662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 48.usbdev_disable_endpoint.1976679662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_disconnected.2445552514 |
| Short name | T3146 |
| Test name | |
| Test status | |
| Simulation time | 185513081 ps |
| CPU time | 1.07 seconds |
| Started | Aug 29 04:00:35 AM UTC 24 |
| Finished | Aug 29 04:00:38 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2445552514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_disconnected.2445552514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_enable.2418716099 |
| Short name | T3144 |
| Test name | |
| Test status | |
| Simulation time | 35807197 ps |
| CPU time | 0.69 seconds |
| Started | Aug 29 04:00:35 AM UTC 24 |
| Finished | Aug 29 04:00:37 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2418716099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 48.usbdev_enable.2418716099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_endpoint_access.431903200 |
| Short name | T3163 |
| Test name | |
| Test status | |
| Simulation time | 859890940 ps |
| CPU time | 2.75 seconds |
| Started | Aug 29 04:00:35 AM UTC 24 |
| Finished | Aug 29 04:00:39 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=431903200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_endpoint_access.431903200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_endpoint_types.2697159902 |
| Short name | T546 |
| Test name | |
| Test status | |
| Simulation time | 349333217 ps |
| CPU time | 1.23 seconds |
| Started | Aug 29 04:00:35 AM UTC 24 |
| Finished | Aug 29 04:00:38 AM UTC 24 |
| Peak memory | 216652 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2697159902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_endpoint_types.2697159902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_fifo_levels.64446460 |
| Short name | T3149 |
| Test name | |
| Test status | |
| Simulation time | 262938160 ps |
| CPU time | 0.95 seconds |
| Started | Aug 29 04:00:35 AM UTC 24 |
| Finished | Aug 29 04:00:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=64446460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_fifo_levels.64446460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_fifo_rst.4266193919 |
| Short name | T3162 |
| Test name | |
| Test status | |
| Simulation time | 322880914 ps |
| CPU time | 2.13 seconds |
| Started | Aug 29 04:00:35 AM UTC 24 |
| Finished | Aug 29 04:00:39 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4266193919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_fifo_rst.4266193919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_in_iso.1012165458 |
| Short name | T3155 |
| Test name | |
| Test status | |
| Simulation time | 267986921 ps |
| CPU time | 1.26 seconds |
| Started | Aug 29 04:00:35 AM UTC 24 |
| Finished | Aug 29 04:00:38 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1012165458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 48.usbdev_in_iso.1012165458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_in_stall.2852012630 |
| Short name | T3145 |
| Test name | |
| Test status | |
| Simulation time | 133986209 ps |
| CPU time | 0.77 seconds |
| Started | Aug 29 04:00:35 AM UTC 24 |
| Finished | Aug 29 04:00:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2852012630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_in_stall.2852012630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_in_trans.4178539831 |
| Short name | T3147 |
| Test name | |
| Test status | |
| Simulation time | 237825113 ps |
| CPU time | 0.99 seconds |
| Started | Aug 29 04:00:35 AM UTC 24 |
| Finished | Aug 29 04:00:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4178539831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_in_trans.4178539831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_invalid_sync.737379087 |
| Short name | T3175 |
| Test name | |
| Test status | |
| Simulation time | 2520102962 ps |
| CPU time | 21.55 seconds |
| Started | Aug 29 04:00:35 AM UTC 24 |
| Finished | Aug 29 04:00:59 AM UTC 24 |
| Peak memory | 229008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=737379087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 48.usbdev_invalid_sync.737379087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_iso_retraction.2295821653 |
| Short name | T3239 |
| Test name | |
| Test status | |
| Simulation time | 11944421928 ps |
| CPU time | 118.08 seconds |
| Started | Aug 29 04:00:35 AM UTC 24 |
| Finished | Aug 29 04:02:36 AM UTC 24 |
| Peak memory | 220076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2295821653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_iso_retraction.2295821653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_link_in_err.450565556 |
| Short name | T3150 |
| Test name | |
| Test status | |
| Simulation time | 192144872 ps |
| CPU time | 1.01 seconds |
| Started | Aug 29 04:00:35 AM UTC 24 |
| Finished | Aug 29 04:00:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=450565556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_link_in_err.450565556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_link_resume.1812852708 |
| Short name | T3172 |
| Test name | |
| Test status | |
| Simulation time | 14465701381 ps |
| CPU time | 17.78 seconds |
| Started | Aug 29 04:00:35 AM UTC 24 |
| Finished | Aug 29 04:00:55 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1812852708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_link_resume.1812852708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_link_suspend.1669148035 |
| Short name | T3167 |
| Test name | |
| Test status | |
| Simulation time | 10322783804 ps |
| CPU time | 12.7 seconds |
| Started | Aug 29 04:00:35 AM UTC 24 |
| Finished | Aug 29 04:00:50 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1669148035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_link_suspend.1669148035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_low_speed_traffic.3066782668 |
| Short name | T3177 |
| Test name | |
| Test status | |
| Simulation time | 4195526710 ps |
| CPU time | 28.06 seconds |
| Started | Aug 29 04:00:35 AM UTC 24 |
| Finished | Aug 29 04:01:05 AM UTC 24 |
| Peak memory | 226776 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3066782668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_low_speed_traffic.3066782668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_max_inter_pkt_delay.3214990442 |
| Short name | T3174 |
| Test name | |
| Test status | |
| Simulation time | 2336201991 ps |
| CPU time | 19.02 seconds |
| Started | Aug 29 04:00:36 AM UTC 24 |
| Finished | Aug 29 04:00:56 AM UTC 24 |
| Peak memory | 229572 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3214990442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_max_inter_pkt_delay.3214990442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_max_length_in_transaction.3539158398 |
| Short name | T3083 |
| Test name | |
| Test status | |
| Simulation time | 233290361 ps |
| CPU time | 1.34 seconds |
| Started | Aug 29 04:00:36 AM UTC 24 |
| Finished | Aug 29 04:00:38 AM UTC 24 |
| Peak memory | 214460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3539158398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 48.usbdev_max_length_in_transaction.3539158398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_max_length_out_transaction.451768516 |
| Short name | T3152 |
| Test name | |
| Test status | |
| Simulation time | 222638952 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 04:00:36 AM UTC 24 |
| Finished | Aug 29 04:00:38 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=451768516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 48.usbdev_max_length_out_transaction.451768516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_min_inter_pkt_delay.3849209645 |
| Short name | T3176 |
| Test name | |
| Test status | |
| Simulation time | 3679000036 ps |
| CPU time | 24.08 seconds |
| Started | Aug 29 04:00:36 AM UTC 24 |
| Finished | Aug 29 04:01:01 AM UTC 24 |
| Peak memory | 229588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3849209645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_min_inter_pkt_delay.3849209645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_min_length_in_transaction.2327522927 |
| Short name | T3148 |
| Test name | |
| Test status | |
| Simulation time | 152009740 ps |
| CPU time | 0.75 seconds |
| Started | Aug 29 04:00:36 AM UTC 24 |
| Finished | Aug 29 04:00:38 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2327522927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 48.usbdev_min_length_in_transaction.2327522927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_min_length_out_transaction.3157900064 |
| Short name | T3157 |
| Test name | |
| Test status | |
| Simulation time | 151784257 ps |
| CPU time | 1.02 seconds |
| Started | Aug 29 04:00:36 AM UTC 24 |
| Finished | Aug 29 04:00:38 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3157900064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 48.usbdev_min_length_out_transaction.3157900064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_nak_trans.3980677749 |
| Short name | T3088 |
| Test name | |
| Test status | |
| Simulation time | 229434126 ps |
| CPU time | 1.24 seconds |
| Started | Aug 29 04:00:36 AM UTC 24 |
| Finished | Aug 29 04:00:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3980677749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_nak_trans.3980677749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_out_iso.1776897478 |
| Short name | T3158 |
| Test name | |
| Test status | |
| Simulation time | 181191080 ps |
| CPU time | 1.04 seconds |
| Started | Aug 29 04:00:36 AM UTC 24 |
| Finished | Aug 29 04:00:38 AM UTC 24 |
| Peak memory | 214968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1776897478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_out_iso.1776897478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_out_stall.3262035106 |
| Short name | T3154 |
| Test name | |
| Test status | |
| Simulation time | 187471638 ps |
| CPU time | 0.95 seconds |
| Started | Aug 29 04:00:36 AM UTC 24 |
| Finished | Aug 29 04:00:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3262035106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_out_stall.3262035106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_out_trans_nak.3181017943 |
| Short name | T3128 |
| Test name | |
| Test status | |
| Simulation time | 172647641 ps |
| CPU time | 1 seconds |
| Started | Aug 29 04:00:36 AM UTC 24 |
| Finished | Aug 29 04:00:38 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3181017943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 48.usbdev_out_trans_nak.3181017943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_pending_in_trans.1493891660 |
| Short name | T3090 |
| Test name | |
| Test status | |
| Simulation time | 180487142 ps |
| CPU time | 1.08 seconds |
| Started | Aug 29 04:00:36 AM UTC 24 |
| Finished | Aug 29 04:00:38 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1493891660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 48.usbdev_pending_in_trans.1493891660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_phy_config_pinflip.2500153775 |
| Short name | T3159 |
| Test name | |
| Test status | |
| Simulation time | 289201084 ps |
| CPU time | 1.1 seconds |
| Started | Aug 29 04:00:36 AM UTC 24 |
| Finished | Aug 29 04:00:38 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2500153775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 48.usbdev_phy_config_pinflip.2500153775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_phy_config_usb_ref_disable.3968453540 |
| Short name | T3184 |
| Test name | |
| Test status | |
| Simulation time | 148765292 ps |
| CPU time | 0.76 seconds |
| Started | Aug 29 04:01:35 AM UTC 24 |
| Finished | Aug 29 04:01:37 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3968453540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 48.usbdev_phy_config_usb_ref_disable.3968453540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_phy_pins_sense.3620191261 |
| Short name | T3183 |
| Test name | |
| Test status | |
| Simulation time | 34724131 ps |
| CPU time | 0.59 seconds |
| Started | Aug 29 04:01:35 AM UTC 24 |
| Finished | Aug 29 04:01:37 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3620191261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_phy_pins_sense.3620191261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_buffer.2272312089 |
| Short name | T3237 |
| Test name | |
| Test status | |
| Simulation time | 21535027524 ps |
| CPU time | 52.2 seconds |
| Started | Aug 29 04:01:35 AM UTC 24 |
| Finished | Aug 29 04:02:29 AM UTC 24 |
| Peak memory | 226188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2272312089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_pkt_buffer.2272312089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_received.2866553568 |
| Short name | T3189 |
| Test name | |
| Test status | |
| Simulation time | 244997889 ps |
| CPU time | 0.93 seconds |
| Started | Aug 29 04:01:35 AM UTC 24 |
| Finished | Aug 29 04:01:37 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2866553568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_pkt_received.2866553568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_sent.309443050 |
| Short name | T3185 |
| Test name | |
| Test status | |
| Simulation time | 198083808 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 04:01:35 AM UTC 24 |
| Finished | Aug 29 04:01:37 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=309443050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_pkt_sent.309443050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_random_length_in_transaction.2008090908 |
| Short name | T3192 |
| Test name | |
| Test status | |
| Simulation time | 237437521 ps |
| CPU time | 0.91 seconds |
| Started | Aug 29 04:01:35 AM UTC 24 |
| Finished | Aug 29 04:01:37 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2008090908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 48.usbdev_random_length_in_transaction.2008090908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_random_length_out_transaction.4114336366 |
| Short name | T3187 |
| Test name | |
| Test status | |
| Simulation time | 179297095 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 04:01:35 AM UTC 24 |
| Finished | Aug 29 04:01:37 AM UTC 24 |
| Peak memory | 215752 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4114336366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 48.usbdev_random_length_out_transaction.4114336366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_rx_crc_err.156806441 |
| Short name | T3186 |
| Test name | |
| Test status | |
| Simulation time | 153312438 ps |
| CPU time | 0.74 seconds |
| Started | Aug 29 04:01:35 AM UTC 24 |
| Finished | Aug 29 04:01:37 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=156806441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_rx_crc_err.156806441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_rx_full.666618508 |
| Short name | T3198 |
| Test name | |
| Test status | |
| Simulation time | 327827365 ps |
| CPU time | 1.14 seconds |
| Started | Aug 29 04:01:35 AM UTC 24 |
| Finished | Aug 29 04:01:38 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=666618508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 48.usbdev_rx_full.666618508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_setup_stage.168323395 |
| Short name | T3188 |
| Test name | |
| Test status | |
| Simulation time | 153913220 ps |
| CPU time | 0.73 seconds |
| Started | Aug 29 04:01:35 AM UTC 24 |
| Finished | Aug 29 04:01:37 AM UTC 24 |
| Peak memory | 214956 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=168323395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_setup_stage.168323395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_setup_trans_ignored.2385083748 |
| Short name | T3190 |
| Test name | |
| Test status | |
| Simulation time | 158556881 ps |
| CPU time | 0.76 seconds |
| Started | Aug 29 04:01:35 AM UTC 24 |
| Finished | Aug 29 04:01:37 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2385083748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 48.usbdev_setup_trans_ignored.2385083748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_smoke.1695724559 |
| Short name | T3194 |
| Test name | |
| Test status | |
| Simulation time | 213707015 ps |
| CPU time | 0.9 seconds |
| Started | Aug 29 04:01:35 AM UTC 24 |
| Finished | Aug 29 04:01:37 AM UTC 24 |
| Peak memory | 214980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1695724559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_smoke.1695724559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_spurious_pids_ignored.3865320891 |
| Short name | T3238 |
| Test name | |
| Test status | |
| Simulation time | 2237628078 ps |
| CPU time | 52.43 seconds |
| Started | Aug 29 04:01:35 AM UTC 24 |
| Finished | Aug 29 04:02:29 AM UTC 24 |
| Peak memory | 227424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3865320891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 48.usbdev_spurious_pids_ignored.3865320891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_stall_priority_over_nak.457046002 |
| Short name | T3193 |
| Test name | |
| Test status | |
| Simulation time | 153157635 ps |
| CPU time | 0.75 seconds |
| Started | Aug 29 04:01:35 AM UTC 24 |
| Finished | Aug 29 04:01:37 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=457046002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_stall_priority_over_nak.457046002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_stall_trans.3691997552 |
| Short name | T3195 |
| Test name | |
| Test status | |
| Simulation time | 178958516 ps |
| CPU time | 0.82 seconds |
| Started | Aug 29 04:01:35 AM UTC 24 |
| Finished | Aug 29 04:01:38 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3691997552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_stall_trans.3691997552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_stream_len_max.2896577059 |
| Short name | T3204 |
| Test name | |
| Test status | |
| Simulation time | 532539047 ps |
| CPU time | 1.51 seconds |
| Started | Aug 29 04:01:35 AM UTC 24 |
| Finished | Aug 29 04:01:38 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2896577059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_stream_len_max.2896577059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_streaming_out.1030387479 |
| Short name | T3231 |
| Test name | |
| Test status | |
| Simulation time | 1815448972 ps |
| CPU time | 14.94 seconds |
| Started | Aug 29 04:01:35 AM UTC 24 |
| Finished | Aug 29 04:01:52 AM UTC 24 |
| Peak memory | 227416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1030387479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_streaming_out.1030387479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_timeout_missing_host_handshake.1361228940 |
| Short name | T3169 |
| Test name | |
| Test status | |
| Simulation time | 926889501 ps |
| CPU time | 15.46 seconds |
| Started | Aug 29 04:00:35 AM UTC 24 |
| Finished | Aug 29 04:00:52 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1361228940 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_timeout_missing_host_handshake.1361228940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/48.usbdev_tx_rx_disruption.4225921062 |
| Short name | T3213 |
| Test name | |
| Test status | |
| Simulation time | 587239638 ps |
| CPU time | 1.48 seconds |
| Started | Aug 29 04:01:35 AM UTC 24 |
| Finished | Aug 29 04:01:39 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4225921062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_t x_rx_disruption.4225921062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/48.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/480.usbdev_tx_rx_disruption.244897966 |
| Short name | T3791 |
| Test name | |
| Test status | |
| Simulation time | 522599656 ps |
| CPU time | 1.92 seconds |
| Started | Aug 29 04:15:52 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=244897966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 480.usbdev_t x_rx_disruption.244897966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/480.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/481.usbdev_tx_rx_disruption.1143953165 |
| Short name | T3765 |
| Test name | |
| Test status | |
| Simulation time | 476915760 ps |
| CPU time | 1.47 seconds |
| Started | Aug 29 04:15:52 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1143953165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 481.usbdev_ tx_rx_disruption.1143953165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/481.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/482.usbdev_tx_rx_disruption.1361423688 |
| Short name | T3787 |
| Test name | |
| Test status | |
| Simulation time | 500364152 ps |
| CPU time | 1.8 seconds |
| Started | Aug 29 04:15:52 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1361423688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 482.usbdev_ tx_rx_disruption.1361423688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/482.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/483.usbdev_tx_rx_disruption.3255364050 |
| Short name | T3783 |
| Test name | |
| Test status | |
| Simulation time | 586145081 ps |
| CPU time | 1.62 seconds |
| Started | Aug 29 04:15:52 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 215004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3255364050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 483.usbdev_ tx_rx_disruption.3255364050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/483.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/484.usbdev_tx_rx_disruption.2670163975 |
| Short name | T3786 |
| Test name | |
| Test status | |
| Simulation time | 476786061 ps |
| CPU time | 1.5 seconds |
| Started | Aug 29 04:15:52 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 215020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2670163975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 484.usbdev_ tx_rx_disruption.2670163975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/484.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/485.usbdev_tx_rx_disruption.2162416260 |
| Short name | T3780 |
| Test name | |
| Test status | |
| Simulation time | 591113585 ps |
| CPU time | 1.51 seconds |
| Started | Aug 29 04:15:52 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 214920 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2162416260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 485.usbdev_ tx_rx_disruption.2162416260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/485.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/486.usbdev_tx_rx_disruption.880828336 |
| Short name | T3790 |
| Test name | |
| Test status | |
| Simulation time | 522981318 ps |
| CPU time | 1.8 seconds |
| Started | Aug 29 04:15:52 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=880828336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 486.usbdev_t x_rx_disruption.880828336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/486.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/487.usbdev_tx_rx_disruption.2971020856 |
| Short name | T3774 |
| Test name | |
| Test status | |
| Simulation time | 473518401 ps |
| CPU time | 1.36 seconds |
| Started | Aug 29 04:15:52 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 214920 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2971020856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 487.usbdev_ tx_rx_disruption.2971020856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/487.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/488.usbdev_tx_rx_disruption.636713828 |
| Short name | T3779 |
| Test name | |
| Test status | |
| Simulation time | 608739614 ps |
| CPU time | 1.42 seconds |
| Started | Aug 29 04:15:52 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=636713828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 488.usbdev_t x_rx_disruption.636713828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/488.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/489.usbdev_tx_rx_disruption.149468629 |
| Short name | T208 |
| Test name | |
| Test status | |
| Simulation time | 545382933 ps |
| CPU time | 1.41 seconds |
| Started | Aug 29 04:15:52 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=149468629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 489.usbdev_t x_rx_disruption.149468629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/489.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_alert_test.1140363712 |
| Short name | T3250 |
| Test name | |
| Test status | |
| Simulation time | 38677589 ps |
| CPU time | 0.63 seconds |
| Started | Aug 29 04:02:42 AM UTC 24 |
| Finished | Aug 29 04:02:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1140363712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 49.usbdev_alert_test.1140363712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_disconnect.2667971379 |
| Short name | T3229 |
| Test name | |
| Test status | |
| Simulation time | 9958344029 ps |
| CPU time | 11.67 seconds |
| Started | Aug 29 04:01:35 AM UTC 24 |
| Finished | Aug 29 04:01:49 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2667971379 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_disconnect.2667971379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_reset.3849632211 |
| Short name | T3232 |
| Test name | |
| Test status | |
| Simulation time | 18507643251 ps |
| CPU time | 21.77 seconds |
| Started | Aug 29 04:01:35 AM UTC 24 |
| Finished | Aug 29 04:01:59 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3849632211 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_reset.3849632211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_resume.268445524 |
| Short name | T3234 |
| Test name | |
| Test status | |
| Simulation time | 24798381192 ps |
| CPU time | 30.29 seconds |
| Started | Aug 29 04:01:35 AM UTC 24 |
| Finished | Aug 29 04:02:08 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=268445524 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_resume.268445524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_av_buffer.590950962 |
| Short name | T3201 |
| Test name | |
| Test status | |
| Simulation time | 145980175 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 04:01:36 AM UTC 24 |
| Finished | Aug 29 04:01:38 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=590950962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_av_buffer.590950962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_bitstuff_err.2173212953 |
| Short name | T3202 |
| Test name | |
| Test status | |
| Simulation time | 205778591 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 04:01:36 AM UTC 24 |
| Finished | Aug 29 04:01:38 AM UTC 24 |
| Peak memory | 214792 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2173212953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_bitstuff_err.2173212953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_data_toggle_clear.1252480861 |
| Short name | T3209 |
| Test name | |
| Test status | |
| Simulation time | 327466510 ps |
| CPU time | 1.1 seconds |
| Started | Aug 29 04:01:36 AM UTC 24 |
| Finished | Aug 29 04:01:38 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1252480861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 49.usbdev_data_toggle_clear.1252480861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_data_toggle_restore.3485064344 |
| Short name | T3226 |
| Test name | |
| Test status | |
| Simulation time | 674272992 ps |
| CPU time | 1.83 seconds |
| Started | Aug 29 04:01:36 AM UTC 24 |
| Finished | Aug 29 04:01:39 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3485064344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_data_toggle_restore.3485064344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_device_address.2640432537 |
| Short name | T3197 |
| Test name | |
| Test status | |
| Simulation time | 27928954998 ps |
| CPU time | 43.64 seconds |
| Started | Aug 29 04:01:36 AM UTC 24 |
| Finished | Aug 29 04:02:21 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2640432537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_device_address.2640432537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_device_timeout.332799684 |
| Short name | T3233 |
| Test name | |
| Test status | |
| Simulation time | 4302178787 ps |
| CPU time | 24.36 seconds |
| Started | Aug 29 04:01:36 AM UTC 24 |
| Finished | Aug 29 04:02:02 AM UTC 24 |
| Peak memory | 217060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=332799684 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_device_timeout.332799684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_disable_endpoint.3154333225 |
| Short name | T3219 |
| Test name | |
| Test status | |
| Simulation time | 527199155 ps |
| CPU time | 1.34 seconds |
| Started | Aug 29 04:01:36 AM UTC 24 |
| Finished | Aug 29 04:01:39 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3154333225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 49.usbdev_disable_endpoint.3154333225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_disconnected.174506593 |
| Short name | T3203 |
| Test name | |
| Test status | |
| Simulation time | 188106106 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 04:01:36 AM UTC 24 |
| Finished | Aug 29 04:01:38 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=174506593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_disconnected.174506593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_enable.2640108593 |
| Short name | T3200 |
| Test name | |
| Test status | |
| Simulation time | 49993449 ps |
| CPU time | 0.65 seconds |
| Started | Aug 29 04:01:36 AM UTC 24 |
| Finished | Aug 29 04:01:38 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2640108593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 49.usbdev_enable.2640108593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_endpoint_access.3649840252 |
| Short name | T3228 |
| Test name | |
| Test status | |
| Simulation time | 1036976494 ps |
| CPU time | 2.6 seconds |
| Started | Aug 29 04:01:36 AM UTC 24 |
| Finished | Aug 29 04:01:40 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3649840252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_endpoint_access.3649840252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_endpoint_types.2639382087 |
| Short name | T3205 |
| Test name | |
| Test status | |
| Simulation time | 195939024 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 04:01:36 AM UTC 24 |
| Finished | Aug 29 04:01:38 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2639382087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_endpoint_types.2639382087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_fifo_levels.2251882684 |
| Short name | T3214 |
| Test name | |
| Test status | |
| Simulation time | 279388768 ps |
| CPU time | 1.06 seconds |
| Started | Aug 29 04:01:36 AM UTC 24 |
| Finished | Aug 29 04:01:39 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2251882684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_fifo_levels.2251882684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_fifo_rst.3980038527 |
| Short name | T3227 |
| Test name | |
| Test status | |
| Simulation time | 388771341 ps |
| CPU time | 2.26 seconds |
| Started | Aug 29 04:01:36 AM UTC 24 |
| Finished | Aug 29 04:01:40 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3980038527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_fifo_rst.3980038527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_in_iso.75695224 |
| Short name | T3216 |
| Test name | |
| Test status | |
| Simulation time | 204861479 ps |
| CPU time | 1 seconds |
| Started | Aug 29 04:01:36 AM UTC 24 |
| Finished | Aug 29 04:01:39 AM UTC 24 |
| Peak memory | 227360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=75695224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 49.usbdev_in_iso.75695224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_in_stall.2839805126 |
| Short name | T3207 |
| Test name | |
| Test status | |
| Simulation time | 144019727 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 04:01:36 AM UTC 24 |
| Finished | Aug 29 04:01:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2839805126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_in_stall.2839805126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_in_trans.3902359924 |
| Short name | T3212 |
| Test name | |
| Test status | |
| Simulation time | 154037879 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 04:01:36 AM UTC 24 |
| Finished | Aug 29 04:01:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3902359924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_in_trans.3902359924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_invalid_sync.3088461532 |
| Short name | T3191 |
| Test name | |
| Test status | |
| Simulation time | 4341166989 ps |
| CPU time | 37.07 seconds |
| Started | Aug 29 04:01:36 AM UTC 24 |
| Finished | Aug 29 04:02:15 AM UTC 24 |
| Peak memory | 229608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3088461532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 49.usbdev_invalid_sync.3088461532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_iso_retraction.2370177734 |
| Short name | T3275 |
| Test name | |
| Test status | |
| Simulation time | 12927425331 ps |
| CPU time | 72.49 seconds |
| Started | Aug 29 04:01:36 AM UTC 24 |
| Finished | Aug 29 04:02:51 AM UTC 24 |
| Peak memory | 217464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2370177734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_iso_retraction.2370177734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_link_in_err.3899838210 |
| Short name | T3206 |
| Test name | |
| Test status | |
| Simulation time | 151766560 ps |
| CPU time | 0.76 seconds |
| Started | Aug 29 04:01:36 AM UTC 24 |
| Finished | Aug 29 04:01:38 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3899838210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_link_in_err.3899838210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_link_resume.3620952075 |
| Short name | T3235 |
| Test name | |
| Test status | |
| Simulation time | 23333209398 ps |
| CPU time | 30.99 seconds |
| Started | Aug 29 04:01:36 AM UTC 24 |
| Finished | Aug 29 04:02:09 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3620952075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_link_resume.3620952075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_link_suspend.4233218241 |
| Short name | T3230 |
| Test name | |
| Test status | |
| Simulation time | 10669120598 ps |
| CPU time | 13.5 seconds |
| Started | Aug 29 04:01:36 AM UTC 24 |
| Finished | Aug 29 04:01:52 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4233218241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_link_suspend.4233218241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_low_speed_traffic.2808486150 |
| Short name | T3132 |
| Test name | |
| Test status | |
| Simulation time | 4966114898 ps |
| CPU time | 44.76 seconds |
| Started | Aug 29 04:01:36 AM UTC 24 |
| Finished | Aug 29 04:02:23 AM UTC 24 |
| Peak memory | 234280 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2808486150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_low_speed_traffic.2808486150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_max_inter_pkt_delay.2431466346 |
| Short name | T3236 |
| Test name | |
| Test status | |
| Simulation time | 1938506495 ps |
| CPU time | 47.18 seconds |
| Started | Aug 29 04:01:36 AM UTC 24 |
| Finished | Aug 29 04:02:25 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2431466346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_max_inter_pkt_delay.2431466346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_max_length_in_transaction.2019962276 |
| Short name | T3224 |
| Test name | |
| Test status | |
| Simulation time | 239708340 ps |
| CPU time | 1.03 seconds |
| Started | Aug 29 04:01:36 AM UTC 24 |
| Finished | Aug 29 04:01:39 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2019962276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 49.usbdev_max_length_in_transaction.2019962276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_max_length_out_transaction.1480614841 |
| Short name | T3215 |
| Test name | |
| Test status | |
| Simulation time | 193232048 ps |
| CPU time | 0.9 seconds |
| Started | Aug 29 04:01:36 AM UTC 24 |
| Finished | Aug 29 04:01:39 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1480614841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_max_length_out_transaction.1480614841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_min_inter_pkt_delay.45177189 |
| Short name | T3210 |
| Test name | |
| Test status | |
| Simulation time | 1508951165 ps |
| CPU time | 34.66 seconds |
| Started | Aug 29 04:01:36 AM UTC 24 |
| Finished | Aug 29 04:02:13 AM UTC 24 |
| Peak memory | 227480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=45177189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TE ST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_min_inter_pkt_delay.45177189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_min_length_in_transaction.393485620 |
| Short name | T3217 |
| Test name | |
| Test status | |
| Simulation time | 147273499 ps |
| CPU time | 0.74 seconds |
| Started | Aug 29 04:01:36 AM UTC 24 |
| Finished | Aug 29 04:01:39 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=393485620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 49.usbdev_min_length_in_transaction.393485620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_min_length_out_transaction.4165883249 |
| Short name | T3208 |
| Test name | |
| Test status | |
| Simulation time | 150344292 ps |
| CPU time | 0.75 seconds |
| Started | Aug 29 04:01:36 AM UTC 24 |
| Finished | Aug 29 04:01:38 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4165883249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_min_length_out_transaction.4165883249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_nak_trans.1922151148 |
| Short name | T3211 |
| Test name | |
| Test status | |
| Simulation time | 194762679 ps |
| CPU time | 0.82 seconds |
| Started | Aug 29 04:01:36 AM UTC 24 |
| Finished | Aug 29 04:01:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1922151148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_nak_trans.1922151148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_out_iso.1134222253 |
| Short name | T3218 |
| Test name | |
| Test status | |
| Simulation time | 185372008 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 04:01:36 AM UTC 24 |
| Finished | Aug 29 04:01:39 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1134222253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 49.usbdev_out_iso.1134222253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_out_stall.3512047386 |
| Short name | T3222 |
| Test name | |
| Test status | |
| Simulation time | 222291868 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 04:01:36 AM UTC 24 |
| Finished | Aug 29 04:01:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3512047386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_out_stall.3512047386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_out_trans_nak.1088639817 |
| Short name | T3220 |
| Test name | |
| Test status | |
| Simulation time | 161065202 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 04:01:36 AM UTC 24 |
| Finished | Aug 29 04:01:39 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1088639817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 49.usbdev_out_trans_nak.1088639817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_pending_in_trans.2451905911 |
| Short name | T3223 |
| Test name | |
| Test status | |
| Simulation time | 153510640 ps |
| CPU time | 0.74 seconds |
| Started | Aug 29 04:01:36 AM UTC 24 |
| Finished | Aug 29 04:01:39 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2451905911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 49.usbdev_pending_in_trans.2451905911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_phy_config_pinflip.4134839190 |
| Short name | T3225 |
| Test name | |
| Test status | |
| Simulation time | 197872676 ps |
| CPU time | 0.92 seconds |
| Started | Aug 29 04:01:36 AM UTC 24 |
| Finished | Aug 29 04:01:39 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4134839190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 49.usbdev_phy_config_pinflip.4134839190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_phy_config_usb_ref_disable.2048916113 |
| Short name | T3221 |
| Test name | |
| Test status | |
| Simulation time | 151261394 ps |
| CPU time | 0.75 seconds |
| Started | Aug 29 04:01:36 AM UTC 24 |
| Finished | Aug 29 04:01:39 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2048916113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_phy_config_usb_ref_disable.2048916113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_phy_pins_sense.1117744959 |
| Short name | T3240 |
| Test name | |
| Test status | |
| Simulation time | 49965493 ps |
| CPU time | 0.64 seconds |
| Started | Aug 29 04:02:42 AM UTC 24 |
| Finished | Aug 29 04:02:43 AM UTC 24 |
| Peak memory | 214496 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1117744959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_phy_pins_sense.1117744959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_buffer.3940409549 |
| Short name | T3278 |
| Test name | |
| Test status | |
| Simulation time | 17476113172 ps |
| CPU time | 38.48 seconds |
| Started | Aug 29 04:02:42 AM UTC 24 |
| Finished | Aug 29 04:03:22 AM UTC 24 |
| Peak memory | 231472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3940409549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 49.usbdev_pkt_buffer.3940409549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_received.2879164280 |
| Short name | T3241 |
| Test name | |
| Test status | |
| Simulation time | 202526682 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 04:02:42 AM UTC 24 |
| Finished | Aug 29 04:02:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2879164280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_pkt_received.2879164280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_sent.744704469 |
| Short name | T3246 |
| Test name | |
| Test status | |
| Simulation time | 237558427 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 04:02:42 AM UTC 24 |
| Finished | Aug 29 04:02:44 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=744704469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 49.usbdev_pkt_sent.744704469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_random_length_in_transaction.2117870547 |
| Short name | T3245 |
| Test name | |
| Test status | |
| Simulation time | 194495876 ps |
| CPU time | 0.83 seconds |
| Started | Aug 29 04:02:42 AM UTC 24 |
| Finished | Aug 29 04:02:44 AM UTC 24 |
| Peak memory | 214844 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2117870547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 49.usbdev_random_length_in_transaction.2117870547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_random_length_out_transaction.1496653062 |
| Short name | T3242 |
| Test name | |
| Test status | |
| Simulation time | 153338060 ps |
| CPU time | 0.77 seconds |
| Started | Aug 29 04:02:42 AM UTC 24 |
| Finished | Aug 29 04:02:44 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1496653062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 49.usbdev_random_length_out_transaction.1496653062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_rx_crc_err.3831659267 |
| Short name | T3243 |
| Test name | |
| Test status | |
| Simulation time | 139073367 ps |
| CPU time | 0.86 seconds |
| Started | Aug 29 04:02:42 AM UTC 24 |
| Finished | Aug 29 04:02:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3831659267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 49.usbdev_rx_crc_err.3831659267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_rx_full.2921539021 |
| Short name | T3248 |
| Test name | |
| Test status | |
| Simulation time | 258522250 ps |
| CPU time | 0.98 seconds |
| Started | Aug 29 04:02:42 AM UTC 24 |
| Finished | Aug 29 04:02:44 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2921539021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 49.usbdev_rx_full.2921539021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_setup_stage.1647983122 |
| Short name | T3244 |
| Test name | |
| Test status | |
| Simulation time | 160932624 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 04:02:42 AM UTC 24 |
| Finished | Aug 29 04:02:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1647983122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_setup_stage.1647983122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_setup_trans_ignored.576791969 |
| Short name | T3247 |
| Test name | |
| Test status | |
| Simulation time | 161477977 ps |
| CPU time | 0.76 seconds |
| Started | Aug 29 04:02:42 AM UTC 24 |
| Finished | Aug 29 04:02:44 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=576791969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 49.usbdev_setup_trans_ignored.576791969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_smoke.4123304820 |
| Short name | T3252 |
| Test name | |
| Test status | |
| Simulation time | 232071799 ps |
| CPU time | 0.95 seconds |
| Started | Aug 29 04:02:42 AM UTC 24 |
| Finished | Aug 29 04:02:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4123304820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_smoke.4123304820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_spurious_pids_ignored.3558083076 |
| Short name | T3276 |
| Test name | |
| Test status | |
| Simulation time | 1991845904 ps |
| CPU time | 12.61 seconds |
| Started | Aug 29 04:02:42 AM UTC 24 |
| Finished | Aug 29 04:02:56 AM UTC 24 |
| Peak memory | 229596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3558083076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 49.usbdev_spurious_pids_ignored.3558083076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_stall_priority_over_nak.162204673 |
| Short name | T3249 |
| Test name | |
| Test status | |
| Simulation time | 138844618 ps |
| CPU time | 0.71 seconds |
| Started | Aug 29 04:02:42 AM UTC 24 |
| Finished | Aug 29 04:02:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=162204673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_stall_priority_over_nak.162204673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_stall_trans.2205444642 |
| Short name | T3251 |
| Test name | |
| Test status | |
| Simulation time | 156304585 ps |
| CPU time | 0.82 seconds |
| Started | Aug 29 04:02:42 AM UTC 24 |
| Finished | Aug 29 04:02:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2205444642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_stall_trans.2205444642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_stream_len_max.4130908544 |
| Short name | T3254 |
| Test name | |
| Test status | |
| Simulation time | 344151375 ps |
| CPU time | 1.09 seconds |
| Started | Aug 29 04:02:42 AM UTC 24 |
| Finished | Aug 29 04:02:44 AM UTC 24 |
| Peak memory | 215012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4130908544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_stream_len_max.4130908544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_streaming_out.3939053941 |
| Short name | T3277 |
| Test name | |
| Test status | |
| Simulation time | 2365778231 ps |
| CPU time | 17.19 seconds |
| Started | Aug 29 04:02:42 AM UTC 24 |
| Finished | Aug 29 04:03:00 AM UTC 24 |
| Peak memory | 227520 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3939053941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_streaming_out.3939053941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_timeout_missing_host_handshake.3126303026 |
| Short name | T3199 |
| Test name | |
| Test status | |
| Simulation time | 1582819804 ps |
| CPU time | 31.03 seconds |
| Started | Aug 29 04:01:36 AM UTC 24 |
| Finished | Aug 29 04:02:09 AM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3126303026 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_timeout_missing_host_handshake.3126303026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/49.usbdev_tx_rx_disruption.3202197562 |
| Short name | T3262 |
| Test name | |
| Test status | |
| Simulation time | 523971497 ps |
| CPU time | 1.79 seconds |
| Started | Aug 29 04:02:42 AM UTC 24 |
| Finished | Aug 29 04:02:45 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3202197562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_t x_rx_disruption.3202197562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/49.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/490.usbdev_tx_rx_disruption.48621032 |
| Short name | T3795 |
| Test name | |
| Test status | |
| Simulation time | 576481887 ps |
| CPU time | 1.65 seconds |
| Started | Aug 29 04:15:52 AM UTC 24 |
| Finished | Aug 29 04:15:56 AM UTC 24 |
| Peak memory | 214832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=48621032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 490.usbdev_tx _rx_disruption.48621032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/490.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/491.usbdev_tx_rx_disruption.1194141279 |
| Short name | T3797 |
| Test name | |
| Test status | |
| Simulation time | 545523814 ps |
| CPU time | 1.83 seconds |
| Started | Aug 29 04:15:52 AM UTC 24 |
| Finished | Aug 29 04:15:56 AM UTC 24 |
| Peak memory | 217016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1194141279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 491.usbdev_ tx_rx_disruption.1194141279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/491.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/492.usbdev_tx_rx_disruption.2180403696 |
| Short name | T3794 |
| Test name | |
| Test status | |
| Simulation time | 501806437 ps |
| CPU time | 1.55 seconds |
| Started | Aug 29 04:15:52 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2180403696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 492.usbdev_ tx_rx_disruption.2180403696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/492.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/493.usbdev_tx_rx_disruption.3659083464 |
| Short name | T3773 |
| Test name | |
| Test status | |
| Simulation time | 437703530 ps |
| CPU time | 1.31 seconds |
| Started | Aug 29 04:15:52 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3659083464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 493.usbdev_ tx_rx_disruption.3659083464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/493.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/494.usbdev_tx_rx_disruption.1357422409 |
| Short name | T3778 |
| Test name | |
| Test status | |
| Simulation time | 491255708 ps |
| CPU time | 1.28 seconds |
| Started | Aug 29 04:15:52 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1357422409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 494.usbdev_ tx_rx_disruption.1357422409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/494.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/495.usbdev_tx_rx_disruption.2405700603 |
| Short name | T3782 |
| Test name | |
| Test status | |
| Simulation time | 411180805 ps |
| CPU time | 1.4 seconds |
| Started | Aug 29 04:15:52 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2405700603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 495.usbdev_ tx_rx_disruption.2405700603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/495.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/496.usbdev_tx_rx_disruption.3202518269 |
| Short name | T3785 |
| Test name | |
| Test status | |
| Simulation time | 520897578 ps |
| CPU time | 1.5 seconds |
| Started | Aug 29 04:15:52 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3202518269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 496.usbdev_ tx_rx_disruption.3202518269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/496.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/497.usbdev_tx_rx_disruption.3324451318 |
| Short name | T3793 |
| Test name | |
| Test status | |
| Simulation time | 485151938 ps |
| CPU time | 1.55 seconds |
| Started | Aug 29 04:15:52 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3324451318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 497.usbdev_ tx_rx_disruption.3324451318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/497.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/498.usbdev_tx_rx_disruption.4060480170 |
| Short name | T3796 |
| Test name | |
| Test status | |
| Simulation time | 614285390 ps |
| CPU time | 1.68 seconds |
| Started | Aug 29 04:15:52 AM UTC 24 |
| Finished | Aug 29 04:15:56 AM UTC 24 |
| Peak memory | 215000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4060480170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 498.usbdev_ tx_rx_disruption.4060480170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/498.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/499.usbdev_tx_rx_disruption.2391602876 |
| Short name | T3792 |
| Test name | |
| Test status | |
| Simulation time | 607047304 ps |
| CPU time | 1.48 seconds |
| Started | Aug 29 04:15:52 AM UTC 24 |
| Finished | Aug 29 04:15:55 AM UTC 24 |
| Peak memory | 215012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2391602876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 499.usbdev_ tx_rx_disruption.2391602876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/499.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_alert_test.3346208060 |
| Short name | T846 |
| Test name | |
| Test status | |
| Simulation time | 35161333 ps |
| CPU time | 0.92 seconds |
| Started | Aug 29 03:33:42 AM UTC 24 |
| Finished | Aug 29 03:33:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3346208060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 5.usbdev_alert_test.3346208060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_reset.2739839519 |
| Short name | T818 |
| Test name | |
| Test status | |
| Simulation time | 18431651901 ps |
| CPU time | 26.76 seconds |
| Started | Aug 29 03:32:53 AM UTC 24 |
| Finished | Aug 29 03:33:21 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2739839519 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_reset.2739839519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_resume.2628835 |
| Short name | T856 |
| Test name | |
| Test status | |
| Simulation time | 30432352306 ps |
| CPU time | 59.52 seconds |
| Started | Aug 29 03:32:55 AM UTC 24 |
| Finished | Aug 29 03:33:56 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2628835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_resume.2628835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_av_buffer.4258638744 |
| Short name | T798 |
| Test name | |
| Test status | |
| Simulation time | 159342785 ps |
| CPU time | 1.32 seconds |
| Started | Aug 29 03:32:55 AM UTC 24 |
| Finished | Aug 29 03:32:58 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4258638744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_av_buffer.4258638744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_bitstuff_err.1518323034 |
| Short name | T799 |
| Test name | |
| Test status | |
| Simulation time | 156259003 ps |
| CPU time | 1.45 seconds |
| Started | Aug 29 03:32:55 AM UTC 24 |
| Finished | Aug 29 03:32:58 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1518323034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_bitstuff_err.1518323034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_data_toggle_clear.3434179015 |
| Short name | T800 |
| Test name | |
| Test status | |
| Simulation time | 252373575 ps |
| CPU time | 1.95 seconds |
| Started | Aug 29 03:32:56 AM UTC 24 |
| Finished | Aug 29 03:32:58 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3434179015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 5.usbdev_data_toggle_clear.3434179015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_data_toggle_restore.4180015155 |
| Short name | T801 |
| Test name | |
| Test status | |
| Simulation time | 334336295 ps |
| CPU time | 1.93 seconds |
| Started | Aug 29 03:32:56 AM UTC 24 |
| Finished | Aug 29 03:32:59 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4180015155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_data_toggle_restore.4180015155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_device_address.2713055143 |
| Short name | T490 |
| Test name | |
| Test status | |
| Simulation time | 48682533270 ps |
| CPU time | 109.43 seconds |
| Started | Aug 29 03:32:56 AM UTC 24 |
| Finished | Aug 29 03:34:47 AM UTC 24 |
| Peak memory | 217388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2713055143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_device_address.2713055143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_device_timeout.2679978755 |
| Short name | T814 |
| Test name | |
| Test status | |
| Simulation time | 2547810521 ps |
| CPU time | 19.41 seconds |
| Started | Aug 29 03:32:56 AM UTC 24 |
| Finished | Aug 29 03:33:16 AM UTC 24 |
| Peak memory | 217428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2679978755 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_device_timeout.2679978755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_disable_endpoint.3176647393 |
| Short name | T804 |
| Test name | |
| Test status | |
| Simulation time | 785831363 ps |
| CPU time | 3.13 seconds |
| Started | Aug 29 03:32:59 AM UTC 24 |
| Finished | Aug 29 03:33:03 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3176647393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 5.usbdev_disable_endpoint.3176647393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_disconnected.1660546861 |
| Short name | T802 |
| Test name | |
| Test status | |
| Simulation time | 138634235 ps |
| CPU time | 1.37 seconds |
| Started | Aug 29 03:32:59 AM UTC 24 |
| Finished | Aug 29 03:33:01 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1660546861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_disconnected.1660546861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_enable.1539111950 |
| Short name | T803 |
| Test name | |
| Test status | |
| Simulation time | 109705948 ps |
| CPU time | 1.19 seconds |
| Started | Aug 29 03:32:59 AM UTC 24 |
| Finished | Aug 29 03:33:01 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1539111950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 5.usbdev_enable.1539111950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_endpoint_access.3881255459 |
| Short name | T807 |
| Test name | |
| Test status | |
| Simulation time | 978870455 ps |
| CPU time | 4.1 seconds |
| Started | Aug 29 03:33:02 AM UTC 24 |
| Finished | Aug 29 03:33:08 AM UTC 24 |
| Peak memory | 217196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3881255459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_endpoint_access.3881255459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_endpoint_types.1383405628 |
| Short name | T450 |
| Test name | |
| Test status | |
| Simulation time | 336532088 ps |
| CPU time | 1.88 seconds |
| Started | Aug 29 03:33:02 AM UTC 24 |
| Finished | Aug 29 03:33:05 AM UTC 24 |
| Peak memory | 215028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1383405628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_endpoint_types.1383405628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_fifo_rst.885875753 |
| Short name | T397 |
| Test name | |
| Test status | |
| Simulation time | 313472624 ps |
| CPU time | 2.62 seconds |
| Started | Aug 29 03:33:06 AM UTC 24 |
| Finished | Aug 29 03:33:10 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=885875753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_fifo_rst.885875753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_in_iso.2393514790 |
| Short name | T810 |
| Test name | |
| Test status | |
| Simulation time | 157873236 ps |
| CPU time | 1.46 seconds |
| Started | Aug 29 03:33:07 AM UTC 24 |
| Finished | Aug 29 03:33:10 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2393514790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 5.usbdev_in_iso.2393514790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_in_stall.215015769 |
| Short name | T809 |
| Test name | |
| Test status | |
| Simulation time | 188472343 ps |
| CPU time | 1.32 seconds |
| Started | Aug 29 03:33:08 AM UTC 24 |
| Finished | Aug 29 03:33:10 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=215015769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_in_stall.215015769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_in_trans.610989635 |
| Short name | T811 |
| Test name | |
| Test status | |
| Simulation time | 285554400 ps |
| CPU time | 1.66 seconds |
| Started | Aug 29 03:33:09 AM UTC 24 |
| Finished | Aug 29 03:33:11 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=610989635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_in_trans.610989635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_invalid_sync.169913946 |
| Short name | T851 |
| Test name | |
| Test status | |
| Simulation time | 4010185055 ps |
| CPU time | 41.6 seconds |
| Started | Aug 29 03:33:06 AM UTC 24 |
| Finished | Aug 29 03:33:49 AM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=169913946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 5.usbdev_invalid_sync.169913946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_iso_retraction.1358404680 |
| Short name | T983 |
| Test name | |
| Test status | |
| Simulation time | 9932887855 ps |
| CPU time | 141.98 seconds |
| Started | Aug 29 03:33:09 AM UTC 24 |
| Finished | Aug 29 03:35:33 AM UTC 24 |
| Peak memory | 217316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1358404680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_iso_retraction.1358404680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_link_in_err.4142546408 |
| Short name | T812 |
| Test name | |
| Test status | |
| Simulation time | 235597607 ps |
| CPU time | 1.6 seconds |
| Started | Aug 29 03:33:10 AM UTC 24 |
| Finished | Aug 29 03:33:13 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4142546408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_link_in_err.4142546408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_link_resume.817765502 |
| Short name | T101 |
| Test name | |
| Test status | |
| Simulation time | 10955864118 ps |
| CPU time | 29.34 seconds |
| Started | Aug 29 03:33:10 AM UTC 24 |
| Finished | Aug 29 03:33:41 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=817765502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 5.usbdev_link_resume.817765502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_link_suspend.3050607415 |
| Short name | T817 |
| Test name | |
| Test status | |
| Simulation time | 3499843089 ps |
| CPU time | 8.76 seconds |
| Started | Aug 29 03:33:10 AM UTC 24 |
| Finished | Aug 29 03:33:20 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3050607415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_link_suspend.3050607415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_low_speed_traffic.2415355835 |
| Short name | T639 |
| Test name | |
| Test status | |
| Simulation time | 4000506904 ps |
| CPU time | 52 seconds |
| Started | Aug 29 03:33:10 AM UTC 24 |
| Finished | Aug 29 03:34:04 AM UTC 24 |
| Peak memory | 227736 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2415355835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_low_speed_traffic.2415355835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_max_inter_pkt_delay.741013441 |
| Short name | T854 |
| Test name | |
| Test status | |
| Simulation time | 2859695139 ps |
| CPU time | 40.43 seconds |
| Started | Aug 29 03:33:12 AM UTC 24 |
| Finished | Aug 29 03:33:53 AM UTC 24 |
| Peak memory | 234176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=741013441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_inter_pkt_delay.741013441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_max_length_in_transaction.3278364951 |
| Short name | T813 |
| Test name | |
| Test status | |
| Simulation time | 264584979 ps |
| CPU time | 1.82 seconds |
| Started | Aug 29 03:33:13 AM UTC 24 |
| Finished | Aug 29 03:33:15 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3278364951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_max_length_in_transaction.3278364951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_max_length_out_transaction.411452808 |
| Short name | T815 |
| Test name | |
| Test status | |
| Simulation time | 186702350 ps |
| CPU time | 1.59 seconds |
| Started | Aug 29 03:33:14 AM UTC 24 |
| Finished | Aug 29 03:33:16 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=411452808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 5.usbdev_max_length_out_transaction.411452808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_max_non_iso_usb_traffic.2642566807 |
| Short name | T839 |
| Test name | |
| Test status | |
| Simulation time | 2543641121 ps |
| CPU time | 22.06 seconds |
| Started | Aug 29 03:33:16 AM UTC 24 |
| Finished | Aug 29 03:33:39 AM UTC 24 |
| Peak memory | 234240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2642566807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_non_iso_usb_traffic.2642566807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_min_inter_pkt_delay.2399151791 |
| Short name | T914 |
| Test name | |
| Test status | |
| Simulation time | 3045458944 ps |
| CPU time | 83.72 seconds |
| Started | Aug 29 03:33:17 AM UTC 24 |
| Finished | Aug 29 03:34:43 AM UTC 24 |
| Peak memory | 227616 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2399151791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_min_inter_pkt_delay.2399151791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_min_length_in_transaction.1201852877 |
| Short name | T820 |
| Test name | |
| Test status | |
| Simulation time | 203856991 ps |
| CPU time | 1.56 seconds |
| Started | Aug 29 03:33:19 AM UTC 24 |
| Finished | Aug 29 03:33:22 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1201852877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 5.usbdev_min_length_in_transaction.1201852877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_min_length_out_transaction.3454291293 |
| Short name | T821 |
| Test name | |
| Test status | |
| Simulation time | 176193448 ps |
| CPU time | 1.47 seconds |
| Started | Aug 29 03:33:20 AM UTC 24 |
| Finished | Aug 29 03:33:23 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3454291293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 5.usbdev_min_length_out_transaction.3454291293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_nak_trans.2134054318 |
| Short name | T126 |
| Test name | |
| Test status | |
| Simulation time | 177566106 ps |
| CPU time | 1.5 seconds |
| Started | Aug 29 03:33:22 AM UTC 24 |
| Finished | Aug 29 03:33:24 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2134054318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_nak_trans.2134054318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_out_iso.2663865057 |
| Short name | T822 |
| Test name | |
| Test status | |
| Simulation time | 174565769 ps |
| CPU time | 1.13 seconds |
| Started | Aug 29 03:33:22 AM UTC 24 |
| Finished | Aug 29 03:33:24 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2663865057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_out_iso.2663865057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_out_stall.329913360 |
| Short name | T825 |
| Test name | |
| Test status | |
| Simulation time | 223279742 ps |
| CPU time | 1.67 seconds |
| Started | Aug 29 03:33:23 AM UTC 24 |
| Finished | Aug 29 03:33:26 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=329913360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_out_stall.329913360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_out_trans_nak.1085303721 |
| Short name | T824 |
| Test name | |
| Test status | |
| Simulation time | 178280446 ps |
| CPU time | 1.41 seconds |
| Started | Aug 29 03:33:23 AM UTC 24 |
| Finished | Aug 29 03:33:25 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1085303721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 5.usbdev_out_trans_nak.1085303721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_pending_in_trans.855472359 |
| Short name | T200 |
| Test name | |
| Test status | |
| Simulation time | 158685792 ps |
| CPU time | 1.4 seconds |
| Started | Aug 29 03:33:24 AM UTC 24 |
| Finished | Aug 29 03:33:27 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=855472359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_pending_in_trans.855472359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_phy_config_pinflip.1574077107 |
| Short name | T827 |
| Test name | |
| Test status | |
| Simulation time | 237699942 ps |
| CPU time | 1.68 seconds |
| Started | Aug 29 03:33:24 AM UTC 24 |
| Finished | Aug 29 03:33:27 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1574077107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_phy_config_pinflip.1574077107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_phy_config_usb_ref_disable.2763594534 |
| Short name | T830 |
| Test name | |
| Test status | |
| Simulation time | 172705718 ps |
| CPU time | 1.47 seconds |
| Started | Aug 29 03:33:26 AM UTC 24 |
| Finished | Aug 29 03:33:28 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2763594534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 5.usbdev_phy_config_usb_ref_disable.2763594534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_phy_pins_sense.1190548850 |
| Short name | T828 |
| Test name | |
| Test status | |
| Simulation time | 45214004 ps |
| CPU time | 1.09 seconds |
| Started | Aug 29 03:33:26 AM UTC 24 |
| Finished | Aug 29 03:33:28 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1190548850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_phy_pins_sense.1190548850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_buffer.1180765833 |
| Short name | T323 |
| Test name | |
| Test status | |
| Simulation time | 6480167662 ps |
| CPU time | 27.52 seconds |
| Started | Aug 29 03:33:27 AM UTC 24 |
| Finished | Aug 29 03:33:56 AM UTC 24 |
| Peak memory | 231612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1180765833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 5.usbdev_pkt_buffer.1180765833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_received.251040100 |
| Short name | T791 |
| Test name | |
| Test status | |
| Simulation time | 172050089 ps |
| CPU time | 1.39 seconds |
| Started | Aug 29 03:33:27 AM UTC 24 |
| Finished | Aug 29 03:33:29 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=251040100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_pkt_received.251040100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_sent.3090338205 |
| Short name | T796 |
| Test name | |
| Test status | |
| Simulation time | 214851600 ps |
| CPU time | 1.65 seconds |
| Started | Aug 29 03:33:28 AM UTC 24 |
| Finished | Aug 29 03:33:31 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3090338205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_pkt_sent.3090338205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_rand_bus_disconnects.336950936 |
| Short name | T1070 |
| Test name | |
| Test status | |
| Simulation time | 5750072254 ps |
| CPU time | 161.73 seconds |
| Started | Aug 29 03:33:28 AM UTC 24 |
| Finished | Aug 29 03:36:13 AM UTC 24 |
| Peak memory | 229580 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=336950936 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_bus_disconnects.336950936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_rand_bus_resets.3603130761 |
| Short name | T1129 |
| Test name | |
| Test status | |
| Simulation time | 6937666768 ps |
| CPU time | 181.31 seconds |
| Started | Aug 29 03:33:30 AM UTC 24 |
| Finished | Aug 29 03:36:35 AM UTC 24 |
| Peak memory | 229648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3603130761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_bus_resets.3603130761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_rand_suspends.39675674 |
| Short name | T894 |
| Test name | |
| Test status | |
| Simulation time | 6568412566 ps |
| CPU time | 98.09 seconds |
| Started | Aug 29 03:33:30 AM UTC 24 |
| Finished | Aug 29 03:35:11 AM UTC 24 |
| Peak memory | 234180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=39675674 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_suspends.39675674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_random_length_in_transaction.1865822071 |
| Short name | T832 |
| Test name | |
| Test status | |
| Simulation time | 209373179 ps |
| CPU time | 1.57 seconds |
| Started | Aug 29 03:33:28 AM UTC 24 |
| Finished | Aug 29 03:33:31 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1865822071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 5.usbdev_random_length_in_transaction.1865822071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_random_length_out_transaction.4276398295 |
| Short name | T831 |
| Test name | |
| Test status | |
| Simulation time | 149353165 ps |
| CPU time | 1.37 seconds |
| Started | Aug 29 03:33:28 AM UTC 24 |
| Finished | Aug 29 03:33:31 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4276398295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 5.usbdev_random_length_out_transaction.4276398295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_resume_link_active.3710474968 |
| Short name | T876 |
| Test name | |
| Test status | |
| Simulation time | 20188395007 ps |
| CPU time | 38.06 seconds |
| Started | Aug 29 03:33:30 AM UTC 24 |
| Finished | Aug 29 03:34:10 AM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3710474968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 5.usbdev_resume_link_active.3710474968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_rx_crc_err.3763440725 |
| Short name | T833 |
| Test name | |
| Test status | |
| Simulation time | 181168268 ps |
| CPU time | 1.3 seconds |
| Started | Aug 29 03:33:32 AM UTC 24 |
| Finished | Aug 29 03:33:34 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3763440725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 5.usbdev_rx_crc_err.3763440725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_rx_full.2086054358 |
| Short name | T55 |
| Test name | |
| Test status | |
| Simulation time | 243310669 ps |
| CPU time | 1.52 seconds |
| Started | Aug 29 03:33:32 AM UTC 24 |
| Finished | Aug 29 03:33:34 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2086054358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_rx_full.2086054358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_setup_stage.1678743240 |
| Short name | T834 |
| Test name | |
| Test status | |
| Simulation time | 158552252 ps |
| CPU time | 1.03 seconds |
| Started | Aug 29 03:33:32 AM UTC 24 |
| Finished | Aug 29 03:33:34 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1678743240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_setup_stage.1678743240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_setup_trans_ignored.2731040924 |
| Short name | T835 |
| Test name | |
| Test status | |
| Simulation time | 147817130 ps |
| CPU time | 1.41 seconds |
| Started | Aug 29 03:33:33 AM UTC 24 |
| Finished | Aug 29 03:33:36 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2731040924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 5.usbdev_setup_trans_ignored.2731040924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_smoke.3719171791 |
| Short name | T837 |
| Test name | |
| Test status | |
| Simulation time | 238880462 ps |
| CPU time | 1.54 seconds |
| Started | Aug 29 03:33:34 AM UTC 24 |
| Finished | Aug 29 03:33:37 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3719171791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_smoke.3719171791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_spurious_pids_ignored.1564146970 |
| Short name | T610 |
| Test name | |
| Test status | |
| Simulation time | 2257662127 ps |
| CPU time | 27.5 seconds |
| Started | Aug 29 03:33:36 AM UTC 24 |
| Finished | Aug 29 03:34:04 AM UTC 24 |
| Peak memory | 234116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1564146970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 5.usbdev_spurious_pids_ignored.1564146970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_stall_priority_over_nak.74860348 |
| Short name | T838 |
| Test name | |
| Test status | |
| Simulation time | 182913386 ps |
| CPU time | 1.36 seconds |
| Started | Aug 29 03:33:36 AM UTC 24 |
| Finished | Aug 29 03:33:38 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=74860348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 5.usbdev_stall_priority_over_nak.74860348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_stall_trans.1456990329 |
| Short name | T840 |
| Test name | |
| Test status | |
| Simulation time | 167650591 ps |
| CPU time | 1.41 seconds |
| Started | Aug 29 03:33:37 AM UTC 24 |
| Finished | Aug 29 03:33:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1456990329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_stall_trans.1456990329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_stream_len_max.114410479 |
| Short name | T843 |
| Test name | |
| Test status | |
| Simulation time | 574365227 ps |
| CPU time | 2.76 seconds |
| Started | Aug 29 03:33:38 AM UTC 24 |
| Finished | Aug 29 03:33:42 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=114410479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 5.usbdev_stream_len_max.114410479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_streaming_out.1242829731 |
| Short name | T964 |
| Test name | |
| Test status | |
| Simulation time | 3550054829 ps |
| CPU time | 102.49 seconds |
| Started | Aug 29 03:33:37 AM UTC 24 |
| Finished | Aug 29 03:35:22 AM UTC 24 |
| Peak memory | 229668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1242829731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_streaming_out.1242829731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_stress_usb_traffic.1460784701 |
| Short name | T112 |
| Test name | |
| Test status | |
| Simulation time | 7173397109 ps |
| CPU time | 45.5 seconds |
| Started | Aug 29 03:33:41 AM UTC 24 |
| Finished | Aug 29 03:34:28 AM UTC 24 |
| Peak memory | 227700 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1460784701 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stress_usb_traffic.1460784701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_timeout_missing_host_handshake.1535216426 |
| Short name | T842 |
| Test name | |
| Test status | |
| Simulation time | 4284591953 ps |
| CPU time | 40.85 seconds |
| Started | Aug 29 03:32:59 AM UTC 24 |
| Finished | Aug 29 03:33:41 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1535216426 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_timeout_missing_host_handshake.1535216426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/5.usbdev_tx_rx_disruption.2338054403 |
| Short name | T848 |
| Test name | |
| Test status | |
| Simulation time | 640184802 ps |
| CPU time | 3.13 seconds |
| Started | Aug 29 03:33:41 AM UTC 24 |
| Finished | Aug 29 03:33:45 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2338054403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_tx _rx_disruption.2338054403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/5.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/50.usbdev_endpoint_types.2280645732 |
| Short name | T483 |
| Test name | |
| Test status | |
| Simulation time | 328827695 ps |
| CPU time | 0.98 seconds |
| Started | Aug 29 04:02:42 AM UTC 24 |
| Finished | Aug 29 04:02:44 AM UTC 24 |
| Peak memory | 214996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2280645732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 50.usbdev_endpoint_types.2280645732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/50.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/50.usbdev_tx_rx_disruption.1510717454 |
| Short name | T3259 |
| Test name | |
| Test status | |
| Simulation time | 592214756 ps |
| CPU time | 1.55 seconds |
| Started | Aug 29 04:02:42 AM UTC 24 |
| Finished | Aug 29 04:02:45 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1510717454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 50.usbdev_t x_rx_disruption.1510717454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/50.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/51.usbdev_endpoint_types.1039356410 |
| Short name | T498 |
| Test name | |
| Test status | |
| Simulation time | 452468035 ps |
| CPU time | 1.24 seconds |
| Started | Aug 29 04:02:42 AM UTC 24 |
| Finished | Aug 29 04:02:45 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1039356410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 51.usbdev_endpoint_types.1039356410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/51.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/51.usbdev_fifo_levels.2050557687 |
| Short name | T3255 |
| Test name | |
| Test status | |
| Simulation time | 157713327 ps |
| CPU time | 0.87 seconds |
| Started | Aug 29 04:02:42 AM UTC 24 |
| Finished | Aug 29 04:02:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2050557687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 51.usbdev_fifo_levels.2050557687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/51.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/51.usbdev_tx_rx_disruption.3284292933 |
| Short name | T3257 |
| Test name | |
| Test status | |
| Simulation time | 488727965 ps |
| CPU time | 1.37 seconds |
| Started | Aug 29 04:02:42 AM UTC 24 |
| Finished | Aug 29 04:02:45 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3284292933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 51.usbdev_t x_rx_disruption.3284292933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/51.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/52.usbdev_endpoint_types.497620133 |
| Short name | T560 |
| Test name | |
| Test status | |
| Simulation time | 495632418 ps |
| CPU time | 1.3 seconds |
| Started | Aug 29 04:02:42 AM UTC 24 |
| Finished | Aug 29 04:02:45 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=497620133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 52.usbdev_endpoint_types.497620133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/52.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/52.usbdev_fifo_levels.2211827288 |
| Short name | T3258 |
| Test name | |
| Test status | |
| Simulation time | 245912798 ps |
| CPU time | 1.2 seconds |
| Started | Aug 29 04:02:42 AM UTC 24 |
| Finished | Aug 29 04:02:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2211827288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 52.usbdev_fifo_levels.2211827288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/52.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/52.usbdev_tx_rx_disruption.1973859152 |
| Short name | T3267 |
| Test name | |
| Test status | |
| Simulation time | 582854673 ps |
| CPU time | 1.58 seconds |
| Started | Aug 29 04:02:42 AM UTC 24 |
| Finished | Aug 29 04:02:45 AM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1973859152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 52.usbdev_t x_rx_disruption.1973859152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/52.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/53.usbdev_endpoint_types.1119642750 |
| Short name | T465 |
| Test name | |
| Test status | |
| Simulation time | 701773554 ps |
| CPU time | 1.74 seconds |
| Started | Aug 29 04:02:42 AM UTC 24 |
| Finished | Aug 29 04:02:45 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1119642750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 53.usbdev_endpoint_types.1119642750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/53.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/53.usbdev_fifo_levels.14113912 |
| Short name | T3256 |
| Test name | |
| Test status | |
| Simulation time | 296826343 ps |
| CPU time | 1.04 seconds |
| Started | Aug 29 04:02:42 AM UTC 24 |
| Finished | Aug 29 04:02:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=14113912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 53.usbdev_fifo_levels.14113912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/53.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/53.usbdev_tx_rx_disruption.3659447034 |
| Short name | T3264 |
| Test name | |
| Test status | |
| Simulation time | 575383038 ps |
| CPU time | 1.48 seconds |
| Started | Aug 29 04:02:42 AM UTC 24 |
| Finished | Aug 29 04:02:45 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3659447034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 53.usbdev_t x_rx_disruption.3659447034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/53.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/54.usbdev_endpoint_types.802563098 |
| Short name | T503 |
| Test name | |
| Test status | |
| Simulation time | 615934432 ps |
| CPU time | 1.42 seconds |
| Started | Aug 29 04:02:42 AM UTC 24 |
| Finished | Aug 29 04:02:45 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=802563098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 54.usbdev_endpoint_types.802563098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/54.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/54.usbdev_fifo_levels.1837305736 |
| Short name | T419 |
| Test name | |
| Test status | |
| Simulation time | 276745118 ps |
| CPU time | 1.03 seconds |
| Started | Aug 29 04:02:42 AM UTC 24 |
| Finished | Aug 29 04:02:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1837305736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 54.usbdev_fifo_levels.1837305736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/54.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/54.usbdev_tx_rx_disruption.1360366856 |
| Short name | T3265 |
| Test name | |
| Test status | |
| Simulation time | 500870479 ps |
| CPU time | 1.39 seconds |
| Started | Aug 29 04:02:42 AM UTC 24 |
| Finished | Aug 29 04:02:45 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1360366856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 54.usbdev_t x_rx_disruption.1360366856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/54.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/55.usbdev_tx_rx_disruption.4025868539 |
| Short name | T3271 |
| Test name | |
| Test status | |
| Simulation time | 609131020 ps |
| CPU time | 1.94 seconds |
| Started | Aug 29 04:02:43 AM UTC 24 |
| Finished | Aug 29 04:02:46 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4025868539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 55.usbdev_t x_rx_disruption.4025868539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/55.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/56.usbdev_endpoint_types.1636600826 |
| Short name | T529 |
| Test name | |
| Test status | |
| Simulation time | 338387875 ps |
| CPU time | 1.32 seconds |
| Started | Aug 29 04:02:43 AM UTC 24 |
| Finished | Aug 29 04:02:45 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1636600826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 56.usbdev_endpoint_types.1636600826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/56.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/56.usbdev_fifo_levels.3355904072 |
| Short name | T373 |
| Test name | |
| Test status | |
| Simulation time | 282871638 ps |
| CPU time | 0.97 seconds |
| Started | Aug 29 04:02:43 AM UTC 24 |
| Finished | Aug 29 04:02:45 AM UTC 24 |
| Peak memory | 215020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3355904072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 56.usbdev_fifo_levels.3355904072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/56.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/56.usbdev_tx_rx_disruption.3050937474 |
| Short name | T189 |
| Test name | |
| Test status | |
| Simulation time | 631440276 ps |
| CPU time | 1.74 seconds |
| Started | Aug 29 04:02:43 AM UTC 24 |
| Finished | Aug 29 04:02:46 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3050937474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 56.usbdev_t x_rx_disruption.3050937474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/56.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/57.usbdev_endpoint_types.3259914034 |
| Short name | T528 |
| Test name | |
| Test status | |
| Simulation time | 214231113 ps |
| CPU time | 1.08 seconds |
| Started | Aug 29 04:02:43 AM UTC 24 |
| Finished | Aug 29 04:02:45 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3259914034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 57.usbdev_endpoint_types.3259914034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/57.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/57.usbdev_fifo_levels.1942143507 |
| Short name | T406 |
| Test name | |
| Test status | |
| Simulation time | 170946490 ps |
| CPU time | 0.95 seconds |
| Started | Aug 29 04:02:43 AM UTC 24 |
| Finished | Aug 29 04:02:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1942143507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 57.usbdev_fifo_levels.1942143507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/57.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/57.usbdev_tx_rx_disruption.714232310 |
| Short name | T3273 |
| Test name | |
| Test status | |
| Simulation time | 661536345 ps |
| CPU time | 1.89 seconds |
| Started | Aug 29 04:02:43 AM UTC 24 |
| Finished | Aug 29 04:02:46 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=714232310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 57.usbdev_tx _rx_disruption.714232310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/57.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/58.usbdev_endpoint_types.2272392631 |
| Short name | T3263 |
| Test name | |
| Test status | |
| Simulation time | 215143412 ps |
| CPU time | 1.12 seconds |
| Started | Aug 29 04:02:43 AM UTC 24 |
| Finished | Aug 29 04:02:45 AM UTC 24 |
| Peak memory | 214604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2272392631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 58.usbdev_endpoint_types.2272392631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/58.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/58.usbdev_fifo_levels.1369064870 |
| Short name | T366 |
| Test name | |
| Test status | |
| Simulation time | 230175655 ps |
| CPU time | 1.1 seconds |
| Started | Aug 29 04:02:43 AM UTC 24 |
| Finished | Aug 29 04:02:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1369064870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 58.usbdev_fifo_levels.1369064870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/58.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/58.usbdev_tx_rx_disruption.1323165056 |
| Short name | T3270 |
| Test name | |
| Test status | |
| Simulation time | 644756374 ps |
| CPU time | 1.66 seconds |
| Started | Aug 29 04:02:43 AM UTC 24 |
| Finished | Aug 29 04:02:46 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1323165056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 58.usbdev_t x_rx_disruption.1323165056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/58.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/59.usbdev_endpoint_types.573030737 |
| Short name | T500 |
| Test name | |
| Test status | |
| Simulation time | 330135389 ps |
| CPU time | 1.06 seconds |
| Started | Aug 29 04:02:43 AM UTC 24 |
| Finished | Aug 29 04:02:45 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=573030737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 59.usbdev_endpoint_types.573030737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/59.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/59.usbdev_fifo_levels.440060557 |
| Short name | T413 |
| Test name | |
| Test status | |
| Simulation time | 266342999 ps |
| CPU time | 1.03 seconds |
| Started | Aug 29 04:02:43 AM UTC 24 |
| Finished | Aug 29 04:02:45 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=440060557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 59.usbdev_fifo_levels.440060557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/59.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/59.usbdev_tx_rx_disruption.1012112512 |
| Short name | T3268 |
| Test name | |
| Test status | |
| Simulation time | 517958962 ps |
| CPU time | 1.42 seconds |
| Started | Aug 29 04:02:43 AM UTC 24 |
| Finished | Aug 29 04:02:46 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1012112512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 59.usbdev_t x_rx_disruption.1012112512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/59.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_alert_test.865756440 |
| Short name | T895 |
| Test name | |
| Test status | |
| Simulation time | 35290775 ps |
| CPU time | 0.98 seconds |
| Started | Aug 29 03:34:25 AM UTC 24 |
| Finished | Aug 29 03:34:27 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=865756440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 6.usbdev_alert_test.865756440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_disconnect.3850483188 |
| Short name | T862 |
| Test name | |
| Test status | |
| Simulation time | 6551288568 ps |
| CPU time | 16.88 seconds |
| Started | Aug 29 03:33:42 AM UTC 24 |
| Finished | Aug 29 03:34:00 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3850483188 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_disconnect.3850483188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_reset.789540496 |
| Short name | T885 |
| Test name | |
| Test status | |
| Simulation time | 20735709758 ps |
| CPU time | 30.43 seconds |
| Started | Aug 29 03:33:43 AM UTC 24 |
| Finished | Aug 29 03:34:15 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=789540496 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_reset.789540496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_resume.850531557 |
| Short name | T903 |
| Test name | |
| Test status | |
| Simulation time | 30538023801 ps |
| CPU time | 48.48 seconds |
| Started | Aug 29 03:33:45 AM UTC 24 |
| Finished | Aug 29 03:34:35 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=850531557 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_resume.850531557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_av_buffer.451206404 |
| Short name | T850 |
| Test name | |
| Test status | |
| Simulation time | 170616911 ps |
| CPU time | 1.48 seconds |
| Started | Aug 29 03:33:45 AM UTC 24 |
| Finished | Aug 29 03:33:47 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=451206404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_av_buffer.451206404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_bitstuff_err.3206994397 |
| Short name | T849 |
| Test name | |
| Test status | |
| Simulation time | 142542757 ps |
| CPU time | 1.16 seconds |
| Started | Aug 29 03:33:45 AM UTC 24 |
| Finished | Aug 29 03:33:47 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3206994397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_bitstuff_err.3206994397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_data_toggle_clear.2290963639 |
| Short name | T852 |
| Test name | |
| Test status | |
| Simulation time | 373737870 ps |
| CPU time | 1.6 seconds |
| Started | Aug 29 03:33:47 AM UTC 24 |
| Finished | Aug 29 03:33:49 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2290963639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 6.usbdev_data_toggle_clear.2290963639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_data_toggle_restore.368983330 |
| Short name | T628 |
| Test name | |
| Test status | |
| Simulation time | 1006864669 ps |
| CPU time | 4.87 seconds |
| Started | Aug 29 03:33:47 AM UTC 24 |
| Finished | Aug 29 03:33:53 AM UTC 24 |
| Peak memory | 217316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=368983330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_data_toggle_restore.368983330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_device_address.858197462 |
| Short name | T491 |
| Test name | |
| Test status | |
| Simulation time | 43632707046 ps |
| CPU time | 109.04 seconds |
| Started | Aug 29 03:33:48 AM UTC 24 |
| Finished | Aug 29 03:35:39 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=858197462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 6.usbdev_device_address.858197462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_device_timeout.3778621418 |
| Short name | T892 |
| Test name | |
| Test status | |
| Simulation time | 1574816759 ps |
| CPU time | 36.88 seconds |
| Started | Aug 29 03:33:48 AM UTC 24 |
| Finished | Aug 29 03:34:26 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3778621418 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_device_timeout.3778621418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_disable_endpoint.1153563590 |
| Short name | T449 |
| Test name | |
| Test status | |
| Simulation time | 925217955 ps |
| CPU time | 3.01 seconds |
| Started | Aug 29 03:33:51 AM UTC 24 |
| Finished | Aug 29 03:33:55 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1153563590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 6.usbdev_disable_endpoint.1153563590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_disconnected.1689407100 |
| Short name | T855 |
| Test name | |
| Test status | |
| Simulation time | 174379613 ps |
| CPU time | 1.13 seconds |
| Started | Aug 29 03:33:53 AM UTC 24 |
| Finished | Aug 29 03:33:55 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1689407100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_disconnected.1689407100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_enable.3622469083 |
| Short name | T858 |
| Test name | |
| Test status | |
| Simulation time | 45675130 ps |
| CPU time | 1.13 seconds |
| Started | Aug 29 03:33:55 AM UTC 24 |
| Finished | Aug 29 03:33:57 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3622469083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 6.usbdev_enable.3622469083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_endpoint_access.1851789961 |
| Short name | T863 |
| Test name | |
| Test status | |
| Simulation time | 952676991 ps |
| CPU time | 4.19 seconds |
| Started | Aug 29 03:33:55 AM UTC 24 |
| Finished | Aug 29 03:34:00 AM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1851789961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_endpoint_access.1851789961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_endpoint_types.3047481397 |
| Short name | T532 |
| Test name | |
| Test status | |
| Simulation time | 465858422 ps |
| CPU time | 2.57 seconds |
| Started | Aug 29 03:33:55 AM UTC 24 |
| Finished | Aug 29 03:33:59 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3047481397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_endpoint_types.3047481397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_fifo_levels.3179588129 |
| Short name | T859 |
| Test name | |
| Test status | |
| Simulation time | 172073179 ps |
| CPU time | 1.44 seconds |
| Started | Aug 29 03:33:55 AM UTC 24 |
| Finished | Aug 29 03:33:58 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3179588129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_fifo_levels.3179588129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_fifo_rst.2312999175 |
| Short name | T861 |
| Test name | |
| Test status | |
| Simulation time | 177442969 ps |
| CPU time | 1.8 seconds |
| Started | Aug 29 03:33:57 AM UTC 24 |
| Finished | Aug 29 03:34:00 AM UTC 24 |
| Peak memory | 217376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2312999175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_fifo_rst.2312999175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_in_iso.1566421503 |
| Short name | T865 |
| Test name | |
| Test status | |
| Simulation time | 285354371 ps |
| CPU time | 1.56 seconds |
| Started | Aug 29 03:33:58 AM UTC 24 |
| Finished | Aug 29 03:34:01 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1566421503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 6.usbdev_in_iso.1566421503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_in_stall.1279016396 |
| Short name | T864 |
| Test name | |
| Test status | |
| Simulation time | 139539762 ps |
| CPU time | 1.22 seconds |
| Started | Aug 29 03:33:58 AM UTC 24 |
| Finished | Aug 29 03:34:01 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1279016396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_in_stall.1279016396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_in_trans.2133246223 |
| Short name | T866 |
| Test name | |
| Test status | |
| Simulation time | 247909062 ps |
| CPU time | 1.63 seconds |
| Started | Aug 29 03:33:58 AM UTC 24 |
| Finished | Aug 29 03:34:01 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2133246223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_in_trans.2133246223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_invalid_sync.794727754 |
| Short name | T916 |
| Test name | |
| Test status | |
| Simulation time | 4276222545 ps |
| CPU time | 45.85 seconds |
| Started | Aug 29 03:33:57 AM UTC 24 |
| Finished | Aug 29 03:34:44 AM UTC 24 |
| Peak memory | 234108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=794727754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 6.usbdev_invalid_sync.794727754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_iso_retraction.2072288327 |
| Short name | T924 |
| Test name | |
| Test status | |
| Simulation time | 7085075922 ps |
| CPU time | 48.56 seconds |
| Started | Aug 29 03:33:59 AM UTC 24 |
| Finished | Aug 29 03:34:49 AM UTC 24 |
| Peak memory | 217380 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2072288327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_iso_retraction.2072288327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_link_in_err.692232649 |
| Short name | T869 |
| Test name | |
| Test status | |
| Simulation time | 167888281 ps |
| CPU time | 1.26 seconds |
| Started | Aug 29 03:34:02 AM UTC 24 |
| Finished | Aug 29 03:34:04 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=692232649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 6.usbdev_link_in_err.692232649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_link_resume.854499002 |
| Short name | T904 |
| Test name | |
| Test status | |
| Simulation time | 12081226638 ps |
| CPU time | 31.97 seconds |
| Started | Aug 29 03:34:02 AM UTC 24 |
| Finished | Aug 29 03:34:35 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=854499002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 6.usbdev_link_resume.854499002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_link_suspend.2551565466 |
| Short name | T891 |
| Test name | |
| Test status | |
| Simulation time | 9604436618 ps |
| CPU time | 18.07 seconds |
| Started | Aug 29 03:34:02 AM UTC 24 |
| Finished | Aug 29 03:34:21 AM UTC 24 |
| Peak memory | 217432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2551565466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_link_suspend.2551565466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_low_speed_traffic.3377603923 |
| Short name | T912 |
| Test name | |
| Test status | |
| Simulation time | 4518786469 ps |
| CPU time | 37.26 seconds |
| Started | Aug 29 03:34:02 AM UTC 24 |
| Finished | Aug 29 03:34:41 AM UTC 24 |
| Peak memory | 234304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3377603923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_low_speed_traffic.3377603923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_max_inter_pkt_delay.2578475617 |
| Short name | T920 |
| Test name | |
| Test status | |
| Simulation time | 3332895915 ps |
| CPU time | 42.01 seconds |
| Started | Aug 29 03:34:02 AM UTC 24 |
| Finished | Aug 29 03:34:46 AM UTC 24 |
| Peak memory | 229672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2578475617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_inter_pkt_delay.2578475617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_max_length_in_transaction.3614510939 |
| Short name | T871 |
| Test name | |
| Test status | |
| Simulation time | 238985532 ps |
| CPU time | 1.74 seconds |
| Started | Aug 29 03:34:02 AM UTC 24 |
| Finished | Aug 29 03:34:05 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3614510939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 6.usbdev_max_length_in_transaction.3614510939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_max_length_out_transaction.1727557223 |
| Short name | T870 |
| Test name | |
| Test status | |
| Simulation time | 200833205 ps |
| CPU time | 1.64 seconds |
| Started | Aug 29 03:34:02 AM UTC 24 |
| Finished | Aug 29 03:34:05 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1727557223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 6.usbdev_max_length_out_transaction.1727557223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_max_non_iso_usb_traffic.1860284061 |
| Short name | T1008 |
| Test name | |
| Test status | |
| Simulation time | 3394553570 ps |
| CPU time | 98.84 seconds |
| Started | Aug 29 03:34:02 AM UTC 24 |
| Finished | Aug 29 03:35:43 AM UTC 24 |
| Peak memory | 229648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1860284061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_non_iso_usb_traffic.1860284061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_max_usb_traffic.1670846677 |
| Short name | T905 |
| Test name | |
| Test status | |
| Simulation time | 2865857950 ps |
| CPU time | 35.18 seconds |
| Started | Aug 29 03:34:02 AM UTC 24 |
| Finished | Aug 29 03:34:39 AM UTC 24 |
| Peak memory | 229792 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1670846677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_usb_traffic.1670846677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_min_inter_pkt_delay.1056832893 |
| Short name | T900 |
| Test name | |
| Test status | |
| Simulation time | 2126443985 ps |
| CPU time | 28.97 seconds |
| Started | Aug 29 03:34:02 AM UTC 24 |
| Finished | Aug 29 03:34:33 AM UTC 24 |
| Peak memory | 227632 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1056832893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_min_inter_pkt_delay.1056832893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_min_length_in_transaction.4256619419 |
| Short name | T873 |
| Test name | |
| Test status | |
| Simulation time | 179263192 ps |
| CPU time | 1.54 seconds |
| Started | Aug 29 03:34:04 AM UTC 24 |
| Finished | Aug 29 03:34:07 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4256619419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 6.usbdev_min_length_in_transaction.4256619419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_min_length_out_transaction.2238864106 |
| Short name | T872 |
| Test name | |
| Test status | |
| Simulation time | 197563660 ps |
| CPU time | 1.42 seconds |
| Started | Aug 29 03:34:05 AM UTC 24 |
| Finished | Aug 29 03:34:07 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2238864106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 6.usbdev_min_length_out_transaction.2238864106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_nak_trans.1849404057 |
| Short name | T138 |
| Test name | |
| Test status | |
| Simulation time | 200277120 ps |
| CPU time | 1.63 seconds |
| Started | Aug 29 03:34:06 AM UTC 24 |
| Finished | Aug 29 03:34:09 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1849404057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_nak_trans.1849404057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_out_iso.1198122314 |
| Short name | T874 |
| Test name | |
| Test status | |
| Simulation time | 183074075 ps |
| CPU time | 1.55 seconds |
| Started | Aug 29 03:34:06 AM UTC 24 |
| Finished | Aug 29 03:34:09 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1198122314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_out_iso.1198122314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_out_stall.2861954129 |
| Short name | T875 |
| Test name | |
| Test status | |
| Simulation time | 198689601 ps |
| CPU time | 1.45 seconds |
| Started | Aug 29 03:34:06 AM UTC 24 |
| Finished | Aug 29 03:34:09 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2861954129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_out_stall.2861954129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_out_trans_nak.1723200584 |
| Short name | T626 |
| Test name | |
| Test status | |
| Simulation time | 223710823 ps |
| CPU time | 1.64 seconds |
| Started | Aug 29 03:34:07 AM UTC 24 |
| Finished | Aug 29 03:34:09 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1723200584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 6.usbdev_out_trans_nak.1723200584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_pending_in_trans.833939115 |
| Short name | T176 |
| Test name | |
| Test status | |
| Simulation time | 169290906 ps |
| CPU time | 1.54 seconds |
| Started | Aug 29 03:34:07 AM UTC 24 |
| Finished | Aug 29 03:34:09 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=833939115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_pending_in_trans.833939115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_phy_config_pinflip.3199575350 |
| Short name | T877 |
| Test name | |
| Test status | |
| Simulation time | 225289645 ps |
| CPU time | 1.32 seconds |
| Started | Aug 29 03:34:08 AM UTC 24 |
| Finished | Aug 29 03:34:10 AM UTC 24 |
| Peak memory | 214928 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3199575350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 6.usbdev_phy_config_pinflip.3199575350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_phy_config_usb_ref_disable.968325507 |
| Short name | T878 |
| Test name | |
| Test status | |
| Simulation time | 187848599 ps |
| CPU time | 1.49 seconds |
| Started | Aug 29 03:34:08 AM UTC 24 |
| Finished | Aug 29 03:34:10 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=968325507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 6.usbdev_phy_config_usb_ref_disable.968325507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_phy_pins_sense.2485197528 |
| Short name | T36 |
| Test name | |
| Test status | |
| Simulation time | 36234316 ps |
| CPU time | 1.08 seconds |
| Started | Aug 29 03:34:11 AM UTC 24 |
| Finished | Aug 29 03:34:13 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2485197528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_phy_pins_sense.2485197528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_buffer.1711528940 |
| Short name | T293 |
| Test name | |
| Test status | |
| Simulation time | 22848038499 ps |
| CPU time | 94.87 seconds |
| Started | Aug 29 03:34:11 AM UTC 24 |
| Finished | Aug 29 03:35:48 AM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1711528940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 6.usbdev_pkt_buffer.1711528940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_received.1896220939 |
| Short name | T882 |
| Test name | |
| Test status | |
| Simulation time | 205303754 ps |
| CPU time | 1.71 seconds |
| Started | Aug 29 03:34:11 AM UTC 24 |
| Finished | Aug 29 03:34:14 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1896220939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_pkt_received.1896220939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_sent.397879413 |
| Short name | T883 |
| Test name | |
| Test status | |
| Simulation time | 212498978 ps |
| CPU time | 1.63 seconds |
| Started | Aug 29 03:34:11 AM UTC 24 |
| Finished | Aug 29 03:34:14 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=397879413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_pkt_sent.397879413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_rand_bus_disconnects.3582189330 |
| Short name | T179 |
| Test name | |
| Test status | |
| Simulation time | 7119610763 ps |
| CPU time | 68.11 seconds |
| Started | Aug 29 03:34:11 AM UTC 24 |
| Finished | Aug 29 03:35:21 AM UTC 24 |
| Peak memory | 229596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3582189330 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_bus_disconnects.3582189330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_rand_bus_resets.683214139 |
| Short name | T915 |
| Test name | |
| Test status | |
| Simulation time | 5447634396 ps |
| CPU time | 29.58 seconds |
| Started | Aug 29 03:34:12 AM UTC 24 |
| Finished | Aug 29 03:34:43 AM UTC 24 |
| Peak memory | 234324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=683214139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_b us_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_bus_resets.683214139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_rand_suspends.681684889 |
| Short name | T985 |
| Test name | |
| Test status | |
| Simulation time | 9537769222 ps |
| CPU time | 77.43 seconds |
| Started | Aug 29 03:34:15 AM UTC 24 |
| Finished | Aug 29 03:35:34 AM UTC 24 |
| Peak memory | 229648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=681684889 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_suspends.681684889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_random_length_in_transaction.179712055 |
| Short name | T880 |
| Test name | |
| Test status | |
| Simulation time | 178939773 ps |
| CPU time | 1.47 seconds |
| Started | Aug 29 03:34:11 AM UTC 24 |
| Finished | Aug 29 03:34:14 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=179712055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_random_length_in_transaction.179712055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_random_length_out_transaction.368049717 |
| Short name | T881 |
| Test name | |
| Test status | |
| Simulation time | 199614056 ps |
| CPU time | 1.61 seconds |
| Started | Aug 29 03:34:11 AM UTC 24 |
| Finished | Aug 29 03:34:14 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=368049717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 6.usbdev_random_length_out_transaction.368049717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_resume_link_active.249995013 |
| Short name | T943 |
| Test name | |
| Test status | |
| Simulation time | 20166106094 ps |
| CPU time | 41.56 seconds |
| Started | Aug 29 03:34:15 AM UTC 24 |
| Finished | Aug 29 03:34:58 AM UTC 24 |
| Peak memory | 217352 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=249995013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 6.usbdev_resume_link_active.249995013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_rx_crc_err.3884742151 |
| Short name | T886 |
| Test name | |
| Test status | |
| Simulation time | 140725267 ps |
| CPU time | 1.3 seconds |
| Started | Aug 29 03:34:15 AM UTC 24 |
| Finished | Aug 29 03:34:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3884742151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 6.usbdev_rx_crc_err.3884742151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_rx_full.1347829223 |
| Short name | T364 |
| Test name | |
| Test status | |
| Simulation time | 283040259 ps |
| CPU time | 1.8 seconds |
| Started | Aug 29 03:34:15 AM UTC 24 |
| Finished | Aug 29 03:34:18 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1347829223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_rx_full.1347829223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_setup_stage.2687427049 |
| Short name | T888 |
| Test name | |
| Test status | |
| Simulation time | 156221373 ps |
| CPU time | 1.35 seconds |
| Started | Aug 29 03:34:15 AM UTC 24 |
| Finished | Aug 29 03:34:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2687427049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_setup_stage.2687427049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_setup_trans_ignored.1956799165 |
| Short name | T889 |
| Test name | |
| Test status | |
| Simulation time | 161602661 ps |
| CPU time | 1.43 seconds |
| Started | Aug 29 03:34:15 AM UTC 24 |
| Finished | Aug 29 03:34:17 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1956799165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 6.usbdev_setup_trans_ignored.1956799165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_smoke.2164163873 |
| Short name | T890 |
| Test name | |
| Test status | |
| Simulation time | 254423740 ps |
| CPU time | 1.73 seconds |
| Started | Aug 29 03:34:17 AM UTC 24 |
| Finished | Aug 29 03:34:20 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2164163873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_smoke.2164163873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_spurious_pids_ignored.239897551 |
| Short name | T1041 |
| Test name | |
| Test status | |
| Simulation time | 2921379861 ps |
| CPU time | 99.26 seconds |
| Started | Aug 29 03:34:17 AM UTC 24 |
| Finished | Aug 29 03:35:58 AM UTC 24 |
| Peak memory | 229584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=239897551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 6.usbdev_spurious_pids_ignored.239897551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_stall_priority_over_nak.1279426914 |
| Short name | T841 |
| Test name | |
| Test status | |
| Simulation time | 197990533 ps |
| CPU time | 1.52 seconds |
| Started | Aug 29 03:34:20 AM UTC 24 |
| Finished | Aug 29 03:34:23 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1279426914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stall_priority_over_nak.1279426914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_stall_trans.3485085368 |
| Short name | T844 |
| Test name | |
| Test status | |
| Simulation time | 183243488 ps |
| CPU time | 1.53 seconds |
| Started | Aug 29 03:34:20 AM UTC 24 |
| Finished | Aug 29 03:34:23 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3485085368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_stall_trans.3485085368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_stream_len_max.868050172 |
| Short name | T893 |
| Test name | |
| Test status | |
| Simulation time | 342837425 ps |
| CPU time | 1.97 seconds |
| Started | Aug 29 03:34:20 AM UTC 24 |
| Finished | Aug 29 03:34:24 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=868050172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 6.usbdev_stream_len_max.868050172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_streaming_out.2451104763 |
| Short name | T927 |
| Test name | |
| Test status | |
| Simulation time | 2586736798 ps |
| CPU time | 29.15 seconds |
| Started | Aug 29 03:34:20 AM UTC 24 |
| Finished | Aug 29 03:34:51 AM UTC 24 |
| Peak memory | 229648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2451104763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_streaming_out.2451104763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_stress_usb_traffic.403346701 |
| Short name | T1078 |
| Test name | |
| Test status | |
| Simulation time | 4002754824 ps |
| CPU time | 113.19 seconds |
| Started | Aug 29 03:34:21 AM UTC 24 |
| Finished | Aug 29 03:36:16 AM UTC 24 |
| Peak memory | 234268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=403346701 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_2 8/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stress_usb_traffic.403346701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/6.usbdev_timeout_missing_host_handshake.1581242575 |
| Short name | T867 |
| Test name | |
| Test status | |
| Simulation time | 404850071 ps |
| CPU time | 9.64 seconds |
| Started | Aug 29 03:33:50 AM UTC 24 |
| Finished | Aug 29 03:34:01 AM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1581242575 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_timeout_missing_host_handshake.1581242575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/6.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/60.usbdev_endpoint_types.897978429 |
| Short name | T574 |
| Test name | |
| Test status | |
| Simulation time | 175513984 ps |
| CPU time | 1.14 seconds |
| Started | Aug 29 04:02:43 AM UTC 24 |
| Finished | Aug 29 04:02:45 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=897978429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 60.usbdev_endpoint_types.897978429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/60.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/60.usbdev_fifo_levels.2578782791 |
| Short name | T341 |
| Test name | |
| Test status | |
| Simulation time | 275899076 ps |
| CPU time | 1.03 seconds |
| Started | Aug 29 04:02:43 AM UTC 24 |
| Finished | Aug 29 04:02:45 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2578782791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 60.usbdev_fifo_levels.2578782791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/60.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/60.usbdev_tx_rx_disruption.4181654994 |
| Short name | T3272 |
| Test name | |
| Test status | |
| Simulation time | 622692038 ps |
| CPU time | 1.62 seconds |
| Started | Aug 29 04:02:43 AM UTC 24 |
| Finished | Aug 29 04:02:46 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4181654994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 60.usbdev_t x_rx_disruption.4181654994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/60.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/61.usbdev_fifo_levels.137997536 |
| Short name | T3261 |
| Test name | |
| Test status | |
| Simulation time | 155944858 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 04:02:43 AM UTC 24 |
| Finished | Aug 29 04:02:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=137997536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 61.usbdev_fifo_levels.137997536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/61.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/61.usbdev_tx_rx_disruption.388267543 |
| Short name | T3274 |
| Test name | |
| Test status | |
| Simulation time | 598886104 ps |
| CPU time | 1.77 seconds |
| Started | Aug 29 04:02:43 AM UTC 24 |
| Finished | Aug 29 04:02:46 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=388267543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 61.usbdev_tx _rx_disruption.388267543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/61.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/62.usbdev_endpoint_types.2759813046 |
| Short name | T461 |
| Test name | |
| Test status | |
| Simulation time | 385423099 ps |
| CPU time | 1.32 seconds |
| Started | Aug 29 04:02:43 AM UTC 24 |
| Finished | Aug 29 04:02:46 AM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2759813046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 62.usbdev_endpoint_types.2759813046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/62.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/62.usbdev_fifo_levels.1199605450 |
| Short name | T3266 |
| Test name | |
| Test status | |
| Simulation time | 154488880 ps |
| CPU time | 0.79 seconds |
| Started | Aug 29 04:02:43 AM UTC 24 |
| Finished | Aug 29 04:02:45 AM UTC 24 |
| Peak memory | 215016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1199605450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 62.usbdev_fifo_levels.1199605450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/62.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/62.usbdev_tx_rx_disruption.3812419820 |
| Short name | T119 |
| Test name | |
| Test status | |
| Simulation time | 595951515 ps |
| CPU time | 1.75 seconds |
| Started | Aug 29 04:02:43 AM UTC 24 |
| Finished | Aug 29 04:02:46 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3812419820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 62.usbdev_t x_rx_disruption.3812419820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/62.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/63.usbdev_endpoint_types.3766591938 |
| Short name | T508 |
| Test name | |
| Test status | |
| Simulation time | 704089294 ps |
| CPU time | 1.72 seconds |
| Started | Aug 29 04:02:43 AM UTC 24 |
| Finished | Aug 29 04:02:46 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3766591938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 63.usbdev_endpoint_types.3766591938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/63.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/63.usbdev_fifo_levels.3035172484 |
| Short name | T379 |
| Test name | |
| Test status | |
| Simulation time | 264988124 ps |
| CPU time | 1.05 seconds |
| Started | Aug 29 04:02:43 AM UTC 24 |
| Finished | Aug 29 04:02:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3035172484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 63.usbdev_fifo_levels.3035172484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/63.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/63.usbdev_tx_rx_disruption.1190158857 |
| Short name | T3269 |
| Test name | |
| Test status | |
| Simulation time | 456487576 ps |
| CPU time | 1.27 seconds |
| Started | Aug 29 04:02:43 AM UTC 24 |
| Finished | Aug 29 04:02:46 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1190158857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 63.usbdev_t x_rx_disruption.1190158857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/63.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/64.usbdev_endpoint_types.3806552260 |
| Short name | T542 |
| Test name | |
| Test status | |
| Simulation time | 562305957 ps |
| CPU time | 1.49 seconds |
| Started | Aug 29 04:02:43 AM UTC 24 |
| Finished | Aug 29 04:02:46 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3806552260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 64.usbdev_endpoint_types.3806552260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/64.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/64.usbdev_fifo_levels.3664993534 |
| Short name | T3279 |
| Test name | |
| Test status | |
| Simulation time | 167267894 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 04:03:52 AM UTC 24 |
| Finished | Aug 29 04:03:54 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3664993534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 64.usbdev_fifo_levels.3664993534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/64.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/64.usbdev_tx_rx_disruption.3867916357 |
| Short name | T172 |
| Test name | |
| Test status | |
| Simulation time | 632148173 ps |
| CPU time | 1.88 seconds |
| Started | Aug 29 04:03:52 AM UTC 24 |
| Finished | Aug 29 04:03:55 AM UTC 24 |
| Peak memory | 214860 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3867916357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 64.usbdev_t x_rx_disruption.3867916357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/64.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/65.usbdev_endpoint_types.1919679545 |
| Short name | T506 |
| Test name | |
| Test status | |
| Simulation time | 592156512 ps |
| CPU time | 1.58 seconds |
| Started | Aug 29 04:03:52 AM UTC 24 |
| Finished | Aug 29 04:03:55 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1919679545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 65.usbdev_endpoint_types.1919679545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/65.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/65.usbdev_fifo_levels.2003063720 |
| Short name | T356 |
| Test name | |
| Test status | |
| Simulation time | 148991330 ps |
| CPU time | 0.78 seconds |
| Started | Aug 29 04:03:52 AM UTC 24 |
| Finished | Aug 29 04:03:54 AM UTC 24 |
| Peak memory | 215012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2003063720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 65.usbdev_fifo_levels.2003063720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/65.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/65.usbdev_tx_rx_disruption.989489097 |
| Short name | T3253 |
| Test name | |
| Test status | |
| Simulation time | 509236374 ps |
| CPU time | 1.43 seconds |
| Started | Aug 29 04:03:52 AM UTC 24 |
| Finished | Aug 29 04:03:55 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=989489097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 65.usbdev_tx _rx_disruption.989489097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/65.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/66.usbdev_endpoint_types.3777918820 |
| Short name | T467 |
| Test name | |
| Test status | |
| Simulation time | 455291964 ps |
| CPU time | 1.24 seconds |
| Started | Aug 29 04:03:52 AM UTC 24 |
| Finished | Aug 29 04:03:55 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3777918820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 66.usbdev_endpoint_types.3777918820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/66.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/66.usbdev_tx_rx_disruption.27759949 |
| Short name | T3281 |
| Test name | |
| Test status | |
| Simulation time | 486034990 ps |
| CPU time | 1.32 seconds |
| Started | Aug 29 04:03:52 AM UTC 24 |
| Finished | Aug 29 04:03:55 AM UTC 24 |
| Peak memory | 214972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=27759949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 66.usbdev_tx_ rx_disruption.27759949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/66.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/67.usbdev_endpoint_types.3847947071 |
| Short name | T558 |
| Test name | |
| Test status | |
| Simulation time | 229102431 ps |
| CPU time | 0.93 seconds |
| Started | Aug 29 04:03:52 AM UTC 24 |
| Finished | Aug 29 04:03:55 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3847947071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 67.usbdev_endpoint_types.3847947071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/67.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/67.usbdev_fifo_levels.3175793604 |
| Short name | T3280 |
| Test name | |
| Test status | |
| Simulation time | 154746271 ps |
| CPU time | 0.82 seconds |
| Started | Aug 29 04:03:52 AM UTC 24 |
| Finished | Aug 29 04:03:55 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3175793604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 67.usbdev_fifo_levels.3175793604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/67.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/67.usbdev_tx_rx_disruption.3371790938 |
| Short name | T3284 |
| Test name | |
| Test status | |
| Simulation time | 586278628 ps |
| CPU time | 1.49 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:55 AM UTC 24 |
| Peak memory | 214968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3371790938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 67.usbdev_t x_rx_disruption.3371790938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/67.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/68.usbdev_endpoint_types.3810472554 |
| Short name | T511 |
| Test name | |
| Test status | |
| Simulation time | 462879545 ps |
| CPU time | 1.31 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:55 AM UTC 24 |
| Peak memory | 214172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3810472554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 68.usbdev_endpoint_types.3810472554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/68.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/68.usbdev_fifo_levels.197886948 |
| Short name | T394 |
| Test name | |
| Test status | |
| Simulation time | 275250262 ps |
| CPU time | 0.97 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=197886948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 68.usbdev_fifo_levels.197886948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/68.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/68.usbdev_tx_rx_disruption.1522595023 |
| Short name | T3282 |
| Test name | |
| Test status | |
| Simulation time | 439906683 ps |
| CPU time | 1.29 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:55 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1522595023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 68.usbdev_t x_rx_disruption.1522595023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/68.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/69.usbdev_endpoint_types.1286271160 |
| Short name | T556 |
| Test name | |
| Test status | |
| Simulation time | 238750044 ps |
| CPU time | 0.92 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:55 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1286271160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 69.usbdev_endpoint_types.1286271160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/69.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/69.usbdev_fifo_levels.3367048484 |
| Short name | T3260 |
| Test name | |
| Test status | |
| Simulation time | 287082320 ps |
| CPU time | 1.16 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:55 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3367048484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 69.usbdev_fifo_levels.3367048484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/69.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/69.usbdev_tx_rx_disruption.4244778434 |
| Short name | T3285 |
| Test name | |
| Test status | |
| Simulation time | 528261502 ps |
| CPU time | 1.44 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:55 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4244778434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 69.usbdev_t x_rx_disruption.4244778434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/69.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_alert_test.696325237 |
| Short name | T283 |
| Test name | |
| Test status | |
| Simulation time | 33774461 ps |
| CPU time | 1.04 seconds |
| Started | Aug 29 03:34:59 AM UTC 24 |
| Finished | Aug 29 03:35:01 AM UTC 24 |
| Peak memory | 214912 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=696325237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 7.usbdev_alert_test.696325237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_disconnect.219017624 |
| Short name | T97 |
| Test name | |
| Test status | |
| Simulation time | 4984355300 ps |
| CPU time | 8.56 seconds |
| Started | Aug 29 03:34:25 AM UTC 24 |
| Finished | Aug 29 03:34:34 AM UTC 24 |
| Peak memory | 227476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=219017624 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_disconnect.219017624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_reset.2789909982 |
| Short name | T935 |
| Test name | |
| Test status | |
| Simulation time | 19774231464 ps |
| CPU time | 29.21 seconds |
| Started | Aug 29 03:34:25 AM UTC 24 |
| Finished | Aug 29 03:34:55 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2789909982 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_reset.2789909982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_resume.4090555194 |
| Short name | T958 |
| Test name | |
| Test status | |
| Simulation time | 23720411187 ps |
| CPU time | 50.32 seconds |
| Started | Aug 29 03:34:25 AM UTC 24 |
| Finished | Aug 29 03:35:17 AM UTC 24 |
| Peak memory | 227376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4090555194 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_resume.4090555194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_av_buffer.1685077098 |
| Short name | T896 |
| Test name | |
| Test status | |
| Simulation time | 213720125 ps |
| CPU time | 1.6 seconds |
| Started | Aug 29 03:34:25 AM UTC 24 |
| Finished | Aug 29 03:34:28 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1685077098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_av_buffer.1685077098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_bitstuff_err.2935238569 |
| Short name | T898 |
| Test name | |
| Test status | |
| Simulation time | 148718670 ps |
| CPU time | 1.37 seconds |
| Started | Aug 29 03:34:26 AM UTC 24 |
| Finished | Aug 29 03:34:29 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2935238569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_bitstuff_err.2935238569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_data_toggle_clear.882263094 |
| Short name | T899 |
| Test name | |
| Test status | |
| Simulation time | 248879581 ps |
| CPU time | 1.77 seconds |
| Started | Aug 29 03:34:28 AM UTC 24 |
| Finished | Aug 29 03:34:31 AM UTC 24 |
| Peak memory | 215032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=882263094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 7.usbdev_data_toggle_clear.882263094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_data_toggle_restore.3268965153 |
| Short name | T629 |
| Test name | |
| Test status | |
| Simulation time | 654704500 ps |
| CPU time | 3.51 seconds |
| Started | Aug 29 03:34:28 AM UTC 24 |
| Finished | Aug 29 03:34:32 AM UTC 24 |
| Peak memory | 217012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3268965153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_data_toggle_restore.3268965153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_device_address.167214465 |
| Short name | T181 |
| Test name | |
| Test status | |
| Simulation time | 29985463033 ps |
| CPU time | 57.83 seconds |
| Started | Aug 29 03:34:30 AM UTC 24 |
| Finished | Aug 29 03:35:30 AM UTC 24 |
| Peak memory | 217316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=167214465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 7.usbdev_device_address.167214465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_device_timeout.2969086207 |
| Short name | T996 |
| Test name | |
| Test status | |
| Simulation time | 8378930073 ps |
| CPU time | 65.09 seconds |
| Started | Aug 29 03:34:30 AM UTC 24 |
| Finished | Aug 29 03:35:37 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2969086207 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_device_timeout.2969086207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_disable_endpoint.3106717434 |
| Short name | T606 |
| Test name | |
| Test status | |
| Simulation time | 561151892 ps |
| CPU time | 3.03 seconds |
| Started | Aug 29 03:34:30 AM UTC 24 |
| Finished | Aug 29 03:34:34 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3106717434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 7.usbdev_disable_endpoint.3106717434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_disconnected.3091021379 |
| Short name | T902 |
| Test name | |
| Test status | |
| Simulation time | 149045861 ps |
| CPU time | 0.98 seconds |
| Started | Aug 29 03:34:32 AM UTC 24 |
| Finished | Aug 29 03:34:33 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3091021379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_disconnected.3091021379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_enable.2622616936 |
| Short name | T860 |
| Test name | |
| Test status | |
| Simulation time | 50176522 ps |
| CPU time | 1.06 seconds |
| Started | Aug 29 03:34:35 AM UTC 24 |
| Finished | Aug 29 03:34:37 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2622616936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 7.usbdev_enable.2622616936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_endpoint_access.1841970942 |
| Short name | T906 |
| Test name | |
| Test status | |
| Simulation time | 866785265 ps |
| CPU time | 3.21 seconds |
| Started | Aug 29 03:34:35 AM UTC 24 |
| Finished | Aug 29 03:34:39 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1841970942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_endpoint_access.1841970942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_endpoint_types.2157376808 |
| Short name | T451 |
| Test name | |
| Test status | |
| Simulation time | 477167167 ps |
| CPU time | 2.36 seconds |
| Started | Aug 29 03:34:35 AM UTC 24 |
| Finished | Aug 29 03:34:38 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2157376808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_endpoint_types.2157376808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_fifo_rst.94326214 |
| Short name | T908 |
| Test name | |
| Test status | |
| Simulation time | 269459627 ps |
| CPU time | 3.48 seconds |
| Started | Aug 29 03:34:35 AM UTC 24 |
| Finished | Aug 29 03:34:40 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=94326214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 7.usbdev_fifo_rst.94326214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_in_iso.1979272106 |
| Short name | T909 |
| Test name | |
| Test status | |
| Simulation time | 224870757 ps |
| CPU time | 2.07 seconds |
| Started | Aug 29 03:34:37 AM UTC 24 |
| Finished | Aug 29 03:34:40 AM UTC 24 |
| Peak memory | 227420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1979272106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 7.usbdev_in_iso.1979272106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_in_stall.3856252376 |
| Short name | T907 |
| Test name | |
| Test status | |
| Simulation time | 139816008 ps |
| CPU time | 1.37 seconds |
| Started | Aug 29 03:34:37 AM UTC 24 |
| Finished | Aug 29 03:34:39 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3856252376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_in_stall.3856252376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_in_trans.2189420086 |
| Short name | T911 |
| Test name | |
| Test status | |
| Simulation time | 182286888 ps |
| CPU time | 1.48 seconds |
| Started | Aug 29 03:34:38 AM UTC 24 |
| Finished | Aug 29 03:34:41 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2189420086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_in_trans.2189420086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_invalid_sync.1200245931 |
| Short name | T1189 |
| Test name | |
| Test status | |
| Simulation time | 4921207052 ps |
| CPU time | 140.76 seconds |
| Started | Aug 29 03:34:37 AM UTC 24 |
| Finished | Aug 29 03:37:00 AM UTC 24 |
| Peak memory | 234024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1200245931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 7.usbdev_invalid_sync.1200245931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_iso_retraction.2974289203 |
| Short name | T1104 |
| Test name | |
| Test status | |
| Simulation time | 13562976569 ps |
| CPU time | 104.64 seconds |
| Started | Aug 29 03:34:39 AM UTC 24 |
| Finished | Aug 29 03:36:27 AM UTC 24 |
| Peak memory | 217316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2974289203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_iso_retraction.2974289203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_link_in_err.2511843966 |
| Short name | T913 |
| Test name | |
| Test status | |
| Simulation time | 177607100 ps |
| CPU time | 1.44 seconds |
| Started | Aug 29 03:34:39 AM UTC 24 |
| Finished | Aug 29 03:34:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2511843966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_link_in_err.2511843966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_link_resume.3441208560 |
| Short name | T936 |
| Test name | |
| Test status | |
| Simulation time | 7228687113 ps |
| CPU time | 13.44 seconds |
| Started | Aug 29 03:34:41 AM UTC 24 |
| Finished | Aug 29 03:34:56 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3441208560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_link_resume.3441208560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_link_suspend.2397313037 |
| Short name | T929 |
| Test name | |
| Test status | |
| Simulation time | 4989025419 ps |
| CPU time | 8.68 seconds |
| Started | Aug 29 03:34:41 AM UTC 24 |
| Finished | Aug 29 03:34:51 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2397313037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_link_suspend.2397313037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_low_speed_traffic.1878412808 |
| Short name | T977 |
| Test name | |
| Test status | |
| Simulation time | 4364053604 ps |
| CPU time | 46.55 seconds |
| Started | Aug 29 03:34:41 AM UTC 24 |
| Finished | Aug 29 03:35:30 AM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1878412808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_low_speed_traffic.1878412808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_max_inter_pkt_delay.4085726930 |
| Short name | T968 |
| Test name | |
| Test status | |
| Simulation time | 1607970061 ps |
| CPU time | 41.88 seconds |
| Started | Aug 29 03:34:42 AM UTC 24 |
| Finished | Aug 29 03:35:25 AM UTC 24 |
| Peak memory | 227424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4085726930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_inter_pkt_delay.4085726930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_max_length_in_transaction.2953254287 |
| Short name | T917 |
| Test name | |
| Test status | |
| Simulation time | 234518502 ps |
| CPU time | 1.53 seconds |
| Started | Aug 29 03:34:42 AM UTC 24 |
| Finished | Aug 29 03:34:44 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2953254287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_max_length_in_transaction.2953254287 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_max_length_out_transaction.1033387785 |
| Short name | T918 |
| Test name | |
| Test status | |
| Simulation time | 210467462 ps |
| CPU time | 1.59 seconds |
| Started | Aug 29 03:34:42 AM UTC 24 |
| Finished | Aug 29 03:34:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1033387785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 7.usbdev_max_length_out_transaction.1033387785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_max_non_iso_usb_traffic.1305310154 |
| Short name | T961 |
| Test name | |
| Test status | |
| Simulation time | 3330230491 ps |
| CPU time | 37.01 seconds |
| Started | Aug 29 03:34:42 AM UTC 24 |
| Finished | Aug 29 03:35:20 AM UTC 24 |
| Peak memory | 229652 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1305310154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_non_iso_usb_traffic.1305310154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_max_usb_traffic.3411671375 |
| Short name | T955 |
| Test name | |
| Test status | |
| Simulation time | 2393059828 ps |
| CPU time | 27.31 seconds |
| Started | Aug 29 03:34:44 AM UTC 24 |
| Finished | Aug 29 03:35:14 AM UTC 24 |
| Peak memory | 229668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3411671375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_usb_traffic.3411671375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_min_inter_pkt_delay.426229477 |
| Short name | T1102 |
| Test name | |
| Test status | |
| Simulation time | 3502337520 ps |
| CPU time | 97.96 seconds |
| Started | Aug 29 03:34:44 AM UTC 24 |
| Finished | Aug 29 03:36:25 AM UTC 24 |
| Peak memory | 227684 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=426229477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_min_inter_pkt_delay.426229477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_min_length_in_transaction.3440029172 |
| Short name | T922 |
| Test name | |
| Test status | |
| Simulation time | 203872289 ps |
| CPU time | 1.52 seconds |
| Started | Aug 29 03:34:45 AM UTC 24 |
| Finished | Aug 29 03:34:48 AM UTC 24 |
| Peak memory | 214856 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3440029172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 7.usbdev_min_length_in_transaction.3440029172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_min_length_out_transaction.3000435003 |
| Short name | T921 |
| Test name | |
| Test status | |
| Simulation time | 153082770 ps |
| CPU time | 1.38 seconds |
| Started | Aug 29 03:34:45 AM UTC 24 |
| Finished | Aug 29 03:34:47 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3000435003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 7.usbdev_min_length_out_transaction.3000435003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_nak_trans.717317224 |
| Short name | T136 |
| Test name | |
| Test status | |
| Simulation time | 299905214 ps |
| CPU time | 1.78 seconds |
| Started | Aug 29 03:34:45 AM UTC 24 |
| Finished | Aug 29 03:34:48 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=717317224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_nak_trans.717317224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_out_iso.946017554 |
| Short name | T925 |
| Test name | |
| Test status | |
| Simulation time | 234510226 ps |
| CPU time | 1.66 seconds |
| Started | Aug 29 03:34:46 AM UTC 24 |
| Finished | Aug 29 03:34:49 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=946017554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 7.usbdev_out_iso.946017554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_out_stall.2112889688 |
| Short name | T926 |
| Test name | |
| Test status | |
| Simulation time | 219983510 ps |
| CPU time | 1.6 seconds |
| Started | Aug 29 03:34:46 AM UTC 24 |
| Finished | Aug 29 03:34:49 AM UTC 24 |
| Peak memory | 215024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2112889688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_out_stall.2112889688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_out_trans_nak.3290569211 |
| Short name | T622 |
| Test name | |
| Test status | |
| Simulation time | 167852131 ps |
| CPU time | 1.57 seconds |
| Started | Aug 29 03:34:46 AM UTC 24 |
| Finished | Aug 29 03:34:49 AM UTC 24 |
| Peak memory | 215024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3290569211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 7.usbdev_out_trans_nak.3290569211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_pending_in_trans.1026159725 |
| Short name | T177 |
| Test name | |
| Test status | |
| Simulation time | 155017194 ps |
| CPU time | 1.45 seconds |
| Started | Aug 29 03:34:49 AM UTC 24 |
| Finished | Aug 29 03:34:51 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1026159725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 7.usbdev_pending_in_trans.1026159725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_phy_config_pinflip.2202521101 |
| Short name | T932 |
| Test name | |
| Test status | |
| Simulation time | 278843051 ps |
| CPU time | 1.74 seconds |
| Started | Aug 29 03:34:49 AM UTC 24 |
| Finished | Aug 29 03:34:52 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2202521101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_phy_config_pinflip.2202521101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_phy_config_usb_ref_disable.1140658930 |
| Short name | T928 |
| Test name | |
| Test status | |
| Simulation time | 181315201 ps |
| CPU time | 1.03 seconds |
| Started | Aug 29 03:34:49 AM UTC 24 |
| Finished | Aug 29 03:34:51 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1140658930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 7.usbdev_phy_config_usb_ref_disable.1140658930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_phy_pins_sense.1510252300 |
| Short name | T38 |
| Test name | |
| Test status | |
| Simulation time | 37762877 ps |
| CPU time | 1.04 seconds |
| Started | Aug 29 03:34:49 AM UTC 24 |
| Finished | Aug 29 03:34:51 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1510252300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_phy_pins_sense.1510252300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_buffer.1835745245 |
| Short name | T292 |
| Test name | |
| Test status | |
| Simulation time | 6328653118 ps |
| CPU time | 28.01 seconds |
| Started | Aug 29 03:34:49 AM UTC 24 |
| Finished | Aug 29 03:35:19 AM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1835745245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 7.usbdev_pkt_buffer.1835745245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_received.1863673355 |
| Short name | T930 |
| Test name | |
| Test status | |
| Simulation time | 190735343 ps |
| CPU time | 1.4 seconds |
| Started | Aug 29 03:34:49 AM UTC 24 |
| Finished | Aug 29 03:34:52 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1863673355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_pkt_received.1863673355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_sent.48800093 |
| Short name | T931 |
| Test name | |
| Test status | |
| Simulation time | 185228789 ps |
| CPU time | 1.43 seconds |
| Started | Aug 29 03:34:49 AM UTC 24 |
| Finished | Aug 29 03:34:52 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=48800093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 7.usbdev_pkt_sent.48800093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_rand_bus_disconnects.917133675 |
| Short name | T1060 |
| Test name | |
| Test status | |
| Simulation time | 6052415842 ps |
| CPU time | 74.82 seconds |
| Started | Aug 29 03:34:51 AM UTC 24 |
| Finished | Aug 29 03:36:08 AM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=917133675 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_bus_disconnects.917133675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_rand_bus_resets.3440840986 |
| Short name | T993 |
| Test name | |
| Test status | |
| Simulation time | 1633397181 ps |
| CPU time | 43.66 seconds |
| Started | Aug 29 03:34:51 AM UTC 24 |
| Finished | Aug 29 03:35:37 AM UTC 24 |
| Peak memory | 227400 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3440840986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_bus_resets.3440840986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_rand_suspends.3649967751 |
| Short name | T1010 |
| Test name | |
| Test status | |
| Simulation time | 7728107151 ps |
| CPU time | 51.51 seconds |
| Started | Aug 29 03:34:51 AM UTC 24 |
| Finished | Aug 29 03:35:45 AM UTC 24 |
| Peak memory | 234364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3649967751 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_suspends.3649967751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_random_length_in_transaction.940151356 |
| Short name | T933 |
| Test name | |
| Test status | |
| Simulation time | 165721206 ps |
| CPU time | 1.51 seconds |
| Started | Aug 29 03:34:51 AM UTC 24 |
| Finished | Aug 29 03:34:54 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=940151356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_random_length_in_transaction.940151356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_random_length_out_transaction.1552331259 |
| Short name | T934 |
| Test name | |
| Test status | |
| Simulation time | 201522525 ps |
| CPU time | 1.65 seconds |
| Started | Aug 29 03:34:51 AM UTC 24 |
| Finished | Aug 29 03:34:54 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1552331259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 7.usbdev_random_length_out_transaction.1552331259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_resume_link_active.3489069288 |
| Short name | T1005 |
| Test name | |
| Test status | |
| Simulation time | 20173063039 ps |
| CPU time | 45.05 seconds |
| Started | Aug 29 03:34:54 AM UTC 24 |
| Finished | Aug 29 03:35:41 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3489069288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 7.usbdev_resume_link_active.3489069288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_rx_crc_err.342563525 |
| Short name | T938 |
| Test name | |
| Test status | |
| Simulation time | 157571727 ps |
| CPU time | 1.4 seconds |
| Started | Aug 29 03:34:54 AM UTC 24 |
| Finished | Aug 29 03:34:57 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=342563525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_rx_crc_err.342563525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_rx_full.1668167218 |
| Short name | T944 |
| Test name | |
| Test status | |
| Simulation time | 403076443 ps |
| CPU time | 2.54 seconds |
| Started | Aug 29 03:34:54 AM UTC 24 |
| Finished | Aug 29 03:34:58 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1668167218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 7.usbdev_rx_full.1668167218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_setup_stage.1320883325 |
| Short name | T940 |
| Test name | |
| Test status | |
| Simulation time | 159828256 ps |
| CPU time | 1.48 seconds |
| Started | Aug 29 03:34:55 AM UTC 24 |
| Finished | Aug 29 03:34:57 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1320883325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_setup_stage.1320883325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_setup_trans_ignored.28407029 |
| Short name | T937 |
| Test name | |
| Test status | |
| Simulation time | 196872403 ps |
| CPU time | 1.18 seconds |
| Started | Aug 29 03:34:55 AM UTC 24 |
| Finished | Aug 29 03:34:57 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=28407029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 7.usbdev_setup_trans_ignored.28407029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_smoke.253627833 |
| Short name | T941 |
| Test name | |
| Test status | |
| Simulation time | 249034311 ps |
| CPU time | 1.65 seconds |
| Started | Aug 29 03:34:55 AM UTC 24 |
| Finished | Aug 29 03:34:57 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=253627833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_smoke.253627833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_spurious_pids_ignored.3933811364 |
| Short name | T990 |
| Test name | |
| Test status | |
| Simulation time | 3342583405 ps |
| CPU time | 38.92 seconds |
| Started | Aug 29 03:34:55 AM UTC 24 |
| Finished | Aug 29 03:35:35 AM UTC 24 |
| Peak memory | 229660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3933811364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 7.usbdev_spurious_pids_ignored.3933811364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_stall_priority_over_nak.2001938287 |
| Short name | T942 |
| Test name | |
| Test status | |
| Simulation time | 158601881 ps |
| CPU time | 1.5 seconds |
| Started | Aug 29 03:34:55 AM UTC 24 |
| Finished | Aug 29 03:34:57 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2001938287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stall_priority_over_nak.2001938287 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_stall_trans.132928167 |
| Short name | T939 |
| Test name | |
| Test status | |
| Simulation time | 171478998 ps |
| CPU time | 1.16 seconds |
| Started | Aug 29 03:34:55 AM UTC 24 |
| Finished | Aug 29 03:34:57 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=132928167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 7.usbdev_stall_trans.132928167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_stream_len_max.1243182291 |
| Short name | T946 |
| Test name | |
| Test status | |
| Simulation time | 371424313 ps |
| CPU time | 2.19 seconds |
| Started | Aug 29 03:34:56 AM UTC 24 |
| Finished | Aug 29 03:35:00 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1243182291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stream_len_max.1243182291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_streaming_out.139176386 |
| Short name | T998 |
| Test name | |
| Test status | |
| Simulation time | 4215582187 ps |
| CPU time | 39.34 seconds |
| Started | Aug 29 03:34:56 AM UTC 24 |
| Finished | Aug 29 03:35:38 AM UTC 24 |
| Peak memory | 229648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=139176386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_streaming_out.139176386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_stress_usb_traffic.3978849271 |
| Short name | T1147 |
| Test name | |
| Test status | |
| Simulation time | 7294723133 ps |
| CPU time | 100.11 seconds |
| Started | Aug 29 03:34:59 AM UTC 24 |
| Finished | Aug 29 03:36:41 AM UTC 24 |
| Peak memory | 231728 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3978849271 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stress_usb_traffic.3978849271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_timeout_missing_host_handshake.229918382 |
| Short name | T284 |
| Test name | |
| Test status | |
| Simulation time | 1358385817 ps |
| CPU time | 31.31 seconds |
| Started | Aug 29 03:34:30 AM UTC 24 |
| Finished | Aug 29 03:35:03 AM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=229918382 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_timeout_missing_host_handshake.229918382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/7.usbdev_tx_rx_disruption.719897572 |
| Short name | T285 |
| Test name | |
| Test status | |
| Simulation time | 511285090 ps |
| CPU time | 2.73 seconds |
| Started | Aug 29 03:34:59 AM UTC 24 |
| Finished | Aug 29 03:35:03 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=719897572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_tx_ rx_disruption.719897572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/7.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/70.usbdev_endpoint_types.2449163391 |
| Short name | T495 |
| Test name | |
| Test status | |
| Simulation time | 634668447 ps |
| CPU time | 1.42 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:55 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2449163391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 70.usbdev_endpoint_types.2449163391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/70.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/70.usbdev_fifo_levels.1347872852 |
| Short name | T391 |
| Test name | |
| Test status | |
| Simulation time | 263047172 ps |
| CPU time | 1.11 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:55 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1347872852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 70.usbdev_fifo_levels.1347872852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/70.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/70.usbdev_tx_rx_disruption.4089086665 |
| Short name | T3288 |
| Test name | |
| Test status | |
| Simulation time | 521787214 ps |
| CPU time | 1.6 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:56 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4089086665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 70.usbdev_t x_rx_disruption.4089086665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/70.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/71.usbdev_endpoint_types.351494570 |
| Short name | T496 |
| Test name | |
| Test status | |
| Simulation time | 697880992 ps |
| CPU time | 1.62 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:56 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=351494570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 71.usbdev_endpoint_types.351494570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/71.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/71.usbdev_tx_rx_disruption.3910680138 |
| Short name | T3290 |
| Test name | |
| Test status | |
| Simulation time | 392908423 ps |
| CPU time | 1.59 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:56 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3910680138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 71.usbdev_t x_rx_disruption.3910680138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/71.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/72.usbdev_endpoint_types.4270052913 |
| Short name | T512 |
| Test name | |
| Test status | |
| Simulation time | 413724612 ps |
| CPU time | 1.16 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:55 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4270052913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 72.usbdev_endpoint_types.4270052913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/72.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/72.usbdev_fifo_levels.3452296430 |
| Short name | T362 |
| Test name | |
| Test status | |
| Simulation time | 311724548 ps |
| CPU time | 1.09 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:55 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3452296430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 72.usbdev_fifo_levels.3452296430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/72.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/72.usbdev_tx_rx_disruption.3789896700 |
| Short name | T3296 |
| Test name | |
| Test status | |
| Simulation time | 546896371 ps |
| CPU time | 1.76 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:56 AM UTC 24 |
| Peak memory | 215020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3789896700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 72.usbdev_t x_rx_disruption.3789896700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/72.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/73.usbdev_endpoint_types.2057384654 |
| Short name | T3289 |
| Test name | |
| Test status | |
| Simulation time | 391195985 ps |
| CPU time | 1.28 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:56 AM UTC 24 |
| Peak memory | 214976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2057384654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 73.usbdev_endpoint_types.2057384654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/73.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/73.usbdev_fifo_levels.1351177388 |
| Short name | T3283 |
| Test name | |
| Test status | |
| Simulation time | 165181877 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:55 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1351177388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 73.usbdev_fifo_levels.1351177388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/73.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/73.usbdev_tx_rx_disruption.3595452403 |
| Short name | T3292 |
| Test name | |
| Test status | |
| Simulation time | 595090856 ps |
| CPU time | 1.58 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:56 AM UTC 24 |
| Peak memory | 215020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3595452403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 73.usbdev_t x_rx_disruption.3595452403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/73.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/74.usbdev_endpoint_types.3210616310 |
| Short name | T563 |
| Test name | |
| Test status | |
| Simulation time | 533004852 ps |
| CPU time | 1.49 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:56 AM UTC 24 |
| Peak memory | 215024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3210616310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 74.usbdev_endpoint_types.3210616310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/74.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/74.usbdev_fifo_levels.2507075385 |
| Short name | T357 |
| Test name | |
| Test status | |
| Simulation time | 285936878 ps |
| CPU time | 1.15 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:56 AM UTC 24 |
| Peak memory | 214820 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2507075385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 74.usbdev_fifo_levels.2507075385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/74.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/74.usbdev_tx_rx_disruption.1735620909 |
| Short name | T3291 |
| Test name | |
| Test status | |
| Simulation time | 487408670 ps |
| CPU time | 1.47 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:56 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1735620909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 74.usbdev_t x_rx_disruption.1735620909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/74.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/75.usbdev_endpoint_types.2894011405 |
| Short name | T471 |
| Test name | |
| Test status | |
| Simulation time | 522581833 ps |
| CPU time | 1.37 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:56 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2894011405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 75.usbdev_endpoint_types.2894011405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/75.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/75.usbdev_fifo_levels.2147905915 |
| Short name | T3286 |
| Test name | |
| Test status | |
| Simulation time | 195548678 ps |
| CPU time | 1.05 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:55 AM UTC 24 |
| Peak memory | 214960 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2147905915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 75.usbdev_fifo_levels.2147905915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/75.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/75.usbdev_tx_rx_disruption.2283737910 |
| Short name | T3295 |
| Test name | |
| Test status | |
| Simulation time | 528221903 ps |
| CPU time | 1.49 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:56 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2283737910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 75.usbdev_t x_rx_disruption.2283737910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/75.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/76.usbdev_endpoint_types.169773079 |
| Short name | T557 |
| Test name | |
| Test status | |
| Simulation time | 256632226 ps |
| CPU time | 1.09 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:56 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=169773079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 76.usbdev_endpoint_types.169773079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/76.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/76.usbdev_fifo_levels.3007781037 |
| Short name | T395 |
| Test name | |
| Test status | |
| Simulation time | 283396904 ps |
| CPU time | 1.04 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:55 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3007781037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 76.usbdev_fifo_levels.3007781037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/76.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/76.usbdev_tx_rx_disruption.680340436 |
| Short name | T3303 |
| Test name | |
| Test status | |
| Simulation time | 603790257 ps |
| CPU time | 2.11 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:57 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=680340436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 76.usbdev_tx _rx_disruption.680340436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/76.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/77.usbdev_fifo_levels.2752346269 |
| Short name | T367 |
| Test name | |
| Test status | |
| Simulation time | 165933358 ps |
| CPU time | 1.07 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:56 AM UTC 24 |
| Peak memory | 216920 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2752346269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 77.usbdev_fifo_levels.2752346269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/77.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/77.usbdev_tx_rx_disruption.2249500586 |
| Short name | T3297 |
| Test name | |
| Test status | |
| Simulation time | 601815043 ps |
| CPU time | 1.65 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:56 AM UTC 24 |
| Peak memory | 214860 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2249500586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 77.usbdev_t x_rx_disruption.2249500586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/77.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/78.usbdev_endpoint_types.2529945870 |
| Short name | T545 |
| Test name | |
| Test status | |
| Simulation time | 184018565 ps |
| CPU time | 0.89 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:56 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2529945870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 78.usbdev_endpoint_types.2529945870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/78.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/78.usbdev_fifo_levels.3099175098 |
| Short name | T338 |
| Test name | |
| Test status | |
| Simulation time | 246477344 ps |
| CPU time | 1.35 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:56 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3099175098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 78.usbdev_fifo_levels.3099175098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/78.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/78.usbdev_tx_rx_disruption.1149438187 |
| Short name | T3301 |
| Test name | |
| Test status | |
| Simulation time | 619238918 ps |
| CPU time | 1.81 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:57 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1149438187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 78.usbdev_t x_rx_disruption.1149438187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/78.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/79.usbdev_endpoint_types.4292456323 |
| Short name | T3294 |
| Test name | |
| Test status | |
| Simulation time | 226951788 ps |
| CPU time | 1.23 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:56 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4292456323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 79.usbdev_endpoint_types.4292456323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/79.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/79.usbdev_fifo_levels.3798995109 |
| Short name | T426 |
| Test name | |
| Test status | |
| Simulation time | 306767387 ps |
| CPU time | 1.15 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:56 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3798995109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 79.usbdev_fifo_levels.3798995109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/79.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/79.usbdev_tx_rx_disruption.1186550809 |
| Short name | T3298 |
| Test name | |
| Test status | |
| Simulation time | 466391161 ps |
| CPU time | 1.69 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:56 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1186550809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 79.usbdev_t x_rx_disruption.1186550809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/79.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_alert_test.3922119954 |
| Short name | T1000 |
| Test name | |
| Test status | |
| Simulation time | 74729671 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 03:35:38 AM UTC 24 |
| Finished | Aug 29 03:35:39 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3922119954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 8.usbdev_alert_test.3922119954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_disconnect.1717147219 |
| Short name | T948 |
| Test name | |
| Test status | |
| Simulation time | 5652183342 ps |
| CPU time | 8.42 seconds |
| Started | Aug 29 03:34:59 AM UTC 24 |
| Finished | Aug 29 03:35:09 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1717147219 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_disconnect.1717147219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_reset.732881363 |
| Short name | T98 |
| Test name | |
| Test status | |
| Simulation time | 14403104116 ps |
| CPU time | 35.13 seconds |
| Started | Aug 29 03:34:59 AM UTC 24 |
| Finished | Aug 29 03:35:36 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=732881363 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_reset.732881363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_resume.520397922 |
| Short name | T995 |
| Test name | |
| Test status | |
| Simulation time | 24587585965 ps |
| CPU time | 36.19 seconds |
| Started | Aug 29 03:34:59 AM UTC 24 |
| Finished | Aug 29 03:35:37 AM UTC 24 |
| Peak memory | 227548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=520397922 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_resume.520397922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_av_buffer.3912876735 |
| Short name | T287 |
| Test name | |
| Test status | |
| Simulation time | 192047006 ps |
| CPU time | 1.53 seconds |
| Started | Aug 29 03:35:01 AM UTC 24 |
| Finished | Aug 29 03:35:04 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3912876735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_av_buffer.3912876735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_bitstuff_err.2231145380 |
| Short name | T286 |
| Test name | |
| Test status | |
| Simulation time | 149883586 ps |
| CPU time | 1.45 seconds |
| Started | Aug 29 03:35:01 AM UTC 24 |
| Finished | Aug 29 03:35:04 AM UTC 24 |
| Peak memory | 215024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2231145380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_bitstuff_err.2231145380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_data_toggle_clear.4046586385 |
| Short name | T288 |
| Test name | |
| Test status | |
| Simulation time | 285524521 ps |
| CPU time | 2 seconds |
| Started | Aug 29 03:35:01 AM UTC 24 |
| Finished | Aug 29 03:35:05 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4046586385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 8.usbdev_data_toggle_clear.4046586385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_data_toggle_restore.1303544410 |
| Short name | T289 |
| Test name | |
| Test status | |
| Simulation time | 870054940 ps |
| CPU time | 2.68 seconds |
| Started | Aug 29 03:35:01 AM UTC 24 |
| Finished | Aug 29 03:35:05 AM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1303544410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_data_toggle_restore.1303544410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_device_timeout.211595145 |
| Short name | T982 |
| Test name | |
| Test status | |
| Simulation time | 2940281486 ps |
| CPU time | 28.06 seconds |
| Started | Aug 29 03:35:03 AM UTC 24 |
| Finished | Aug 29 03:35:32 AM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=211595145 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_device_timeout.211595145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_disable_endpoint.1587037371 |
| Short name | T947 |
| Test name | |
| Test status | |
| Simulation time | 459964141 ps |
| CPU time | 2.49 seconds |
| Started | Aug 29 03:35:05 AM UTC 24 |
| Finished | Aug 29 03:35:08 AM UTC 24 |
| Peak memory | 217152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1587037371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 8.usbdev_disable_endpoint.1587037371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_disconnected.876964326 |
| Short name | T291 |
| Test name | |
| Test status | |
| Simulation time | 156551758 ps |
| CPU time | 1.44 seconds |
| Started | Aug 29 03:35:05 AM UTC 24 |
| Finished | Aug 29 03:35:07 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=876964326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_disconnected.876964326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_enable.3194342640 |
| Short name | T290 |
| Test name | |
| Test status | |
| Simulation time | 53908035 ps |
| CPU time | 1.17 seconds |
| Started | Aug 29 03:35:05 AM UTC 24 |
| Finished | Aug 29 03:35:07 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3194342640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 8.usbdev_enable.3194342640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_endpoint_access.3048474369 |
| Short name | T945 |
| Test name | |
| Test status | |
| Simulation time | 890260582 ps |
| CPU time | 4.02 seconds |
| Started | Aug 29 03:35:05 AM UTC 24 |
| Finished | Aug 29 03:35:10 AM UTC 24 |
| Peak memory | 217200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3048474369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_endpoint_access.3048474369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_fifo_levels.1253459163 |
| Short name | T949 |
| Test name | |
| Test status | |
| Simulation time | 220530471 ps |
| CPU time | 1.6 seconds |
| Started | Aug 29 03:35:06 AM UTC 24 |
| Finished | Aug 29 03:35:09 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1253459163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_fifo_levels.1253459163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_fifo_rst.793033194 |
| Short name | T952 |
| Test name | |
| Test status | |
| Simulation time | 395171192 ps |
| CPU time | 3.48 seconds |
| Started | Aug 29 03:35:08 AM UTC 24 |
| Finished | Aug 29 03:35:12 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=793033194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 8.usbdev_fifo_rst.793033194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_in_iso.2270372776 |
| Short name | T951 |
| Test name | |
| Test status | |
| Simulation time | 228110137 ps |
| CPU time | 1.92 seconds |
| Started | Aug 29 03:35:09 AM UTC 24 |
| Finished | Aug 29 03:35:12 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2270372776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 8.usbdev_in_iso.2270372776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_in_stall.2674885266 |
| Short name | T954 |
| Test name | |
| Test status | |
| Simulation time | 142040818 ps |
| CPU time | 1.3 seconds |
| Started | Aug 29 03:35:11 AM UTC 24 |
| Finished | Aug 29 03:35:14 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2674885266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_in_stall.2674885266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_in_trans.912796686 |
| Short name | T953 |
| Test name | |
| Test status | |
| Simulation time | 226163832 ps |
| CPU time | 1.29 seconds |
| Started | Aug 29 03:35:11 AM UTC 24 |
| Finished | Aug 29 03:35:14 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=912796686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 8.usbdev_in_trans.912796686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_invalid_sync.538820191 |
| Short name | T1044 |
| Test name | |
| Test status | |
| Simulation time | 4776806341 ps |
| CPU time | 49.82 seconds |
| Started | Aug 29 03:35:09 AM UTC 24 |
| Finished | Aug 29 03:36:01 AM UTC 24 |
| Peak memory | 234168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=538820191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 8.usbdev_invalid_sync.538820191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_iso_retraction.1467418371 |
| Short name | T1029 |
| Test name | |
| Test status | |
| Simulation time | 4883284635 ps |
| CPU time | 40.18 seconds |
| Started | Aug 29 03:35:11 AM UTC 24 |
| Finished | Aug 29 03:35:53 AM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1467418371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_iso_retraction.1467418371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_link_in_err.932128207 |
| Short name | T956 |
| Test name | |
| Test status | |
| Simulation time | 284512665 ps |
| CPU time | 1.89 seconds |
| Started | Aug 29 03:35:11 AM UTC 24 |
| Finished | Aug 29 03:35:14 AM UTC 24 |
| Peak memory | 217016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=932128207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 8.usbdev_link_in_err.932128207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_link_resume.482287205 |
| Short name | T991 |
| Test name | |
| Test status | |
| Simulation time | 8840601031 ps |
| CPU time | 22.57 seconds |
| Started | Aug 29 03:35:12 AM UTC 24 |
| Finished | Aug 29 03:35:35 AM UTC 24 |
| Peak memory | 227448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=482287205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 8.usbdev_link_resume.482287205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_link_suspend.2325601640 |
| Short name | T210 |
| Test name | |
| Test status | |
| Simulation time | 4177890687 ps |
| CPU time | 13.03 seconds |
| Started | Aug 29 03:35:14 AM UTC 24 |
| Finished | Aug 29 03:35:28 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2325601640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_link_suspend.2325601640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_low_speed_traffic.1732679283 |
| Short name | T1018 |
| Test name | |
| Test status | |
| Simulation time | 3292142435 ps |
| CPU time | 35.1 seconds |
| Started | Aug 29 03:35:14 AM UTC 24 |
| Finished | Aug 29 03:35:50 AM UTC 24 |
| Peak memory | 227496 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1732679283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_low_speed_traffic.1732679283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_max_inter_pkt_delay.3303954995 |
| Short name | T1103 |
| Test name | |
| Test status | |
| Simulation time | 2483216394 ps |
| CPU time | 70.47 seconds |
| Started | Aug 29 03:35:14 AM UTC 24 |
| Finished | Aug 29 03:36:26 AM UTC 24 |
| Peak memory | 229648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3303954995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_inter_pkt_delay.3303954995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_max_length_in_transaction.398847781 |
| Short name | T957 |
| Test name | |
| Test status | |
| Simulation time | 289773096 ps |
| CPU time | 1.97 seconds |
| Started | Aug 29 03:35:14 AM UTC 24 |
| Finished | Aug 29 03:35:17 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=398847781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 8.usbdev_max_length_in_transaction.398847781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_max_length_out_transaction.1612698576 |
| Short name | T960 |
| Test name | |
| Test status | |
| Simulation time | 184890928 ps |
| CPU time | 1.66 seconds |
| Started | Aug 29 03:35:16 AM UTC 24 |
| Finished | Aug 29 03:35:18 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1612698576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 8.usbdev_max_length_out_transaction.1612698576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_max_non_iso_usb_traffic.2966602688 |
| Short name | T1090 |
| Test name | |
| Test status | |
| Simulation time | 2484012765 ps |
| CPU time | 63.29 seconds |
| Started | Aug 29 03:35:16 AM UTC 24 |
| Finished | Aug 29 03:36:21 AM UTC 24 |
| Peak memory | 227624 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2966602688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_non_iso_usb_traffic.2966602688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_max_usb_traffic.2428301541 |
| Short name | T1002 |
| Test name | |
| Test status | |
| Simulation time | 2439066784 ps |
| CPU time | 23.21 seconds |
| Started | Aug 29 03:35:16 AM UTC 24 |
| Finished | Aug 29 03:35:40 AM UTC 24 |
| Peak memory | 229616 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2428301541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_usb_traffic.2428301541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_min_inter_pkt_delay.981879974 |
| Short name | T1006 |
| Test name | |
| Test status | |
| Simulation time | 2985759858 ps |
| CPU time | 24.46 seconds |
| Started | Aug 29 03:35:16 AM UTC 24 |
| Finished | Aug 29 03:35:41 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=981879974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_min_inter_pkt_delay.981879974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_min_length_in_transaction.1467341302 |
| Short name | T962 |
| Test name | |
| Test status | |
| Simulation time | 194520771 ps |
| CPU time | 1.47 seconds |
| Started | Aug 29 03:35:18 AM UTC 24 |
| Finished | Aug 29 03:35:21 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1467341302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 8.usbdev_min_length_in_transaction.1467341302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_min_length_out_transaction.570855839 |
| Short name | T963 |
| Test name | |
| Test status | |
| Simulation time | 221097207 ps |
| CPU time | 1.61 seconds |
| Started | Aug 29 03:35:18 AM UTC 24 |
| Finished | Aug 29 03:35:21 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=570855839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 8.usbdev_min_length_out_transaction.570855839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_nak_trans.2819198786 |
| Short name | T127 |
| Test name | |
| Test status | |
| Simulation time | 172459976 ps |
| CPU time | 1.56 seconds |
| Started | Aug 29 03:35:21 AM UTC 24 |
| Finished | Aug 29 03:35:23 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2819198786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_nak_trans.2819198786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_out_iso.1326049489 |
| Short name | T965 |
| Test name | |
| Test status | |
| Simulation time | 151370954 ps |
| CPU time | 1.4 seconds |
| Started | Aug 29 03:35:21 AM UTC 24 |
| Finished | Aug 29 03:35:23 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1326049489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 8.usbdev_out_iso.1326049489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_out_stall.2525939329 |
| Short name | T966 |
| Test name | |
| Test status | |
| Simulation time | 182124489 ps |
| CPU time | 1.57 seconds |
| Started | Aug 29 03:35:21 AM UTC 24 |
| Finished | Aug 29 03:35:23 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2525939329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_out_stall.2525939329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_out_trans_nak.2610552185 |
| Short name | T969 |
| Test name | |
| Test status | |
| Simulation time | 156875959 ps |
| CPU time | 1.42 seconds |
| Started | Aug 29 03:35:22 AM UTC 24 |
| Finished | Aug 29 03:35:25 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2610552185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 8.usbdev_out_trans_nak.2610552185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_pending_in_trans.3744976420 |
| Short name | T967 |
| Test name | |
| Test status | |
| Simulation time | 163442817 ps |
| CPU time | 1.35 seconds |
| Started | Aug 29 03:35:22 AM UTC 24 |
| Finished | Aug 29 03:35:25 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3744976420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 8.usbdev_pending_in_trans.3744976420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_phy_config_pinflip.261345523 |
| Short name | T971 |
| Test name | |
| Test status | |
| Simulation time | 228441801 ps |
| CPU time | 1.72 seconds |
| Started | Aug 29 03:35:22 AM UTC 24 |
| Finished | Aug 29 03:35:25 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=261345523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 8.usbdev_phy_config_pinflip.261345523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_phy_config_usb_ref_disable.132073023 |
| Short name | T970 |
| Test name | |
| Test status | |
| Simulation time | 150059150 ps |
| CPU time | 1.46 seconds |
| Started | Aug 29 03:35:22 AM UTC 24 |
| Finished | Aug 29 03:35:25 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=132073023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 8.usbdev_phy_config_usb_ref_disable.132073023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_phy_pins_sense.3270042420 |
| Short name | T972 |
| Test name | |
| Test status | |
| Simulation time | 71769663 ps |
| CPU time | 1.14 seconds |
| Started | Aug 29 03:35:24 AM UTC 24 |
| Finished | Aug 29 03:35:27 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3270042420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_phy_pins_sense.3270042420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_buffer.1773237087 |
| Short name | T282 |
| Test name | |
| Test status | |
| Simulation time | 7637964651 ps |
| CPU time | 23.52 seconds |
| Started | Aug 29 03:35:24 AM UTC 24 |
| Finished | Aug 29 03:35:49 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1773237087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 8.usbdev_pkt_buffer.1773237087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_received.339668423 |
| Short name | T973 |
| Test name | |
| Test status | |
| Simulation time | 151881354 ps |
| CPU time | 1.42 seconds |
| Started | Aug 29 03:35:25 AM UTC 24 |
| Finished | Aug 29 03:35:27 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=339668423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_pkt_received.339668423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_sent.4124874571 |
| Short name | T974 |
| Test name | |
| Test status | |
| Simulation time | 248947206 ps |
| CPU time | 1.69 seconds |
| Started | Aug 29 03:35:25 AM UTC 24 |
| Finished | Aug 29 03:35:27 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4124874571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_pkt_sent.4124874571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_rand_bus_disconnects.3440916313 |
| Short name | T1032 |
| Test name | |
| Test status | |
| Simulation time | 6888416603 ps |
| CPU time | 50.83 seconds |
| Started | Aug 29 03:35:27 AM UTC 24 |
| Finished | Aug 29 03:36:19 AM UTC 24 |
| Peak memory | 234308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3440916313 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_bus_disconnects.3440916313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_rand_bus_resets.137995360 |
| Short name | T1235 |
| Test name | |
| Test status | |
| Simulation time | 7155850545 ps |
| CPU time | 109.77 seconds |
| Started | Aug 29 03:35:27 AM UTC 24 |
| Finished | Aug 29 03:37:19 AM UTC 24 |
| Peak memory | 229660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=137995360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_b us_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_bus_resets.137995360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_rand_suspends.108891075 |
| Short name | T1073 |
| Test name | |
| Test status | |
| Simulation time | 9137526482 ps |
| CPU time | 45.15 seconds |
| Started | Aug 29 03:35:27 AM UTC 24 |
| Finished | Aug 29 03:36:13 AM UTC 24 |
| Peak memory | 227624 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=108891075 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_suspends.108891075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_random_length_in_transaction.2715259877 |
| Short name | T976 |
| Test name | |
| Test status | |
| Simulation time | 230949545 ps |
| CPU time | 1.74 seconds |
| Started | Aug 29 03:35:26 AM UTC 24 |
| Finished | Aug 29 03:35:29 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2715259877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 8.usbdev_random_length_in_transaction.2715259877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_random_length_out_transaction.3947325843 |
| Short name | T975 |
| Test name | |
| Test status | |
| Simulation time | 239116122 ps |
| CPU time | 1.67 seconds |
| Started | Aug 29 03:35:26 AM UTC 24 |
| Finished | Aug 29 03:35:29 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3947325843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 8.usbdev_random_length_out_transaction.3947325843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_resume_link_active.3441234146 |
| Short name | T1054 |
| Test name | |
| Test status | |
| Simulation time | 20183103756 ps |
| CPU time | 35.51 seconds |
| Started | Aug 29 03:35:29 AM UTC 24 |
| Finished | Aug 29 03:36:06 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3441234146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 8.usbdev_resume_link_active.3441234146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_rx_crc_err.941555621 |
| Short name | T978 |
| Test name | |
| Test status | |
| Simulation time | 139827031 ps |
| CPU time | 1.32 seconds |
| Started | Aug 29 03:35:29 AM UTC 24 |
| Finished | Aug 29 03:35:31 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=941555621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_rx_crc_err.941555621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_rx_full.359044399 |
| Short name | T981 |
| Test name | |
| Test status | |
| Simulation time | 325043020 ps |
| CPU time | 2.15 seconds |
| Started | Aug 29 03:35:29 AM UTC 24 |
| Finished | Aug 29 03:35:32 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=359044399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 8.usbdev_rx_full.359044399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_setup_stage.3731811422 |
| Short name | T980 |
| Test name | |
| Test status | |
| Simulation time | 163264581 ps |
| CPU time | 1.53 seconds |
| Started | Aug 29 03:35:29 AM UTC 24 |
| Finished | Aug 29 03:35:32 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3731811422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_setup_stage.3731811422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_setup_trans_ignored.1029361015 |
| Short name | T979 |
| Test name | |
| Test status | |
| Simulation time | 150639288 ps |
| CPU time | 1.37 seconds |
| Started | Aug 29 03:35:29 AM UTC 24 |
| Finished | Aug 29 03:35:32 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1029361015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 8.usbdev_setup_trans_ignored.1029361015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_smoke.417703826 |
| Short name | T989 |
| Test name | |
| Test status | |
| Simulation time | 271457933 ps |
| CPU time | 1.9 seconds |
| Started | Aug 29 03:35:32 AM UTC 24 |
| Finished | Aug 29 03:35:35 AM UTC 24 |
| Peak memory | 214732 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=417703826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_smoke.417703826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_spurious_pids_ignored.445629403 |
| Short name | T1157 |
| Test name | |
| Test status | |
| Simulation time | 2898180832 ps |
| CPU time | 73.74 seconds |
| Started | Aug 29 03:35:32 AM UTC 24 |
| Finished | Aug 29 03:36:48 AM UTC 24 |
| Peak memory | 227612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=445629403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 8.usbdev_spurious_pids_ignored.445629403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_stall_priority_over_nak.3160860146 |
| Short name | T988 |
| Test name | |
| Test status | |
| Simulation time | 166313188 ps |
| CPU time | 1.5 seconds |
| Started | Aug 29 03:35:32 AM UTC 24 |
| Finished | Aug 29 03:35:35 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3160860146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stall_priority_over_nak.3160860146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_stall_trans.2644404344 |
| Short name | T987 |
| Test name | |
| Test status | |
| Simulation time | 183164697 ps |
| CPU time | 1.46 seconds |
| Started | Aug 29 03:35:32 AM UTC 24 |
| Finished | Aug 29 03:35:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2644404344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_stall_trans.2644404344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_stream_len_max.3185085882 |
| Short name | T992 |
| Test name | |
| Test status | |
| Simulation time | 795023464 ps |
| CPU time | 2.94 seconds |
| Started | Aug 29 03:35:32 AM UTC 24 |
| Finished | Aug 29 03:35:36 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3185085882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stream_len_max.3185085882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_streaming_out.2613942075 |
| Short name | T1072 |
| Test name | |
| Test status | |
| Simulation time | 3926308224 ps |
| CPU time | 39.45 seconds |
| Started | Aug 29 03:35:32 AM UTC 24 |
| Finished | Aug 29 03:36:13 AM UTC 24 |
| Peak memory | 229584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2613942075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_streaming_out.2613942075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_stress_usb_traffic.4172862590 |
| Short name | T252 |
| Test name | |
| Test status | |
| Simulation time | 6911699291 ps |
| CPU time | 32.92 seconds |
| Started | Aug 29 03:35:34 AM UTC 24 |
| Finished | Aug 29 03:36:08 AM UTC 24 |
| Peak memory | 234172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4172862590 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stress_usb_traffic.4172862590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_timeout_missing_host_handshake.707311171 |
| Short name | T950 |
| Test name | |
| Test status | |
| Simulation time | 275807583 ps |
| CPU time | 5.78 seconds |
| Started | Aug 29 03:35:05 AM UTC 24 |
| Finished | Aug 29 03:35:11 AM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=707311171 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_timeout_missing_host_handshake.707311171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/8.usbdev_tx_rx_disruption.2585277 |
| Short name | T997 |
| Test name | |
| Test status | |
| Simulation time | 563783835 ps |
| CPU time | 1.94 seconds |
| Started | Aug 29 03:35:34 AM UTC 24 |
| Finished | Aug 29 03:35:37 AM UTC 24 |
| Peak memory | 214712 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2585277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_tx_rx _disruption.2585277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/8.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/80.usbdev_endpoint_types.2430203100 |
| Short name | T441 |
| Test name | |
| Test status | |
| Simulation time | 655581919 ps |
| CPU time | 1.96 seconds |
| Started | Aug 29 04:03:53 AM UTC 24 |
| Finished | Aug 29 04:03:57 AM UTC 24 |
| Peak memory | 214816 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2430203100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 80.usbdev_endpoint_types.2430203100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/80.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/80.usbdev_fifo_levels.687654573 |
| Short name | T398 |
| Test name | |
| Test status | |
| Simulation time | 224931688 ps |
| CPU time | 1.2 seconds |
| Started | Aug 29 04:03:54 AM UTC 24 |
| Finished | Aug 29 04:03:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=687654573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 80.usbdev_fifo_levels.687654573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/80.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/80.usbdev_tx_rx_disruption.689163527 |
| Short name | T3300 |
| Test name | |
| Test status | |
| Simulation time | 549289547 ps |
| CPU time | 1.63 seconds |
| Started | Aug 29 04:03:54 AM UTC 24 |
| Finished | Aug 29 04:03:57 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=689163527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 80.usbdev_tx _rx_disruption.689163527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/80.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/81.usbdev_endpoint_types.2123533292 |
| Short name | T457 |
| Test name | |
| Test status | |
| Simulation time | 496639683 ps |
| CPU time | 1.42 seconds |
| Started | Aug 29 04:03:54 AM UTC 24 |
| Finished | Aug 29 04:03:56 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2123533292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 81.usbdev_endpoint_types.2123533292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/81.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/81.usbdev_fifo_levels.2530883185 |
| Short name | T3293 |
| Test name | |
| Test status | |
| Simulation time | 159941660 ps |
| CPU time | 0.88 seconds |
| Started | Aug 29 04:03:54 AM UTC 24 |
| Finished | Aug 29 04:03:56 AM UTC 24 |
| Peak memory | 214856 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2530883185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 81.usbdev_fifo_levels.2530883185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/81.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/81.usbdev_tx_rx_disruption.1522587671 |
| Short name | T3299 |
| Test name | |
| Test status | |
| Simulation time | 443520778 ps |
| CPU time | 1.45 seconds |
| Started | Aug 29 04:03:54 AM UTC 24 |
| Finished | Aug 29 04:03:56 AM UTC 24 |
| Peak memory | 214828 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1522587671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 81.usbdev_t x_rx_disruption.1522587671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/81.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/82.usbdev_endpoint_types.2792036302 |
| Short name | T468 |
| Test name | |
| Test status | |
| Simulation time | 790336701 ps |
| CPU time | 1.71 seconds |
| Started | Aug 29 04:03:54 AM UTC 24 |
| Finished | Aug 29 04:03:57 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2792036302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 82.usbdev_endpoint_types.2792036302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/82.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/82.usbdev_tx_rx_disruption.185592345 |
| Short name | T3306 |
| Test name | |
| Test status | |
| Simulation time | 531968074 ps |
| CPU time | 1.75 seconds |
| Started | Aug 29 04:03:54 AM UTC 24 |
| Finished | Aug 29 04:03:57 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=185592345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 82.usbdev_tx _rx_disruption.185592345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/82.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/83.usbdev_fifo_levels.2171164386 |
| Short name | T392 |
| Test name | |
| Test status | |
| Simulation time | 311267267 ps |
| CPU time | 1.05 seconds |
| Started | Aug 29 04:03:54 AM UTC 24 |
| Finished | Aug 29 04:03:56 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2171164386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 83.usbdev_fifo_levels.2171164386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/83.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/83.usbdev_tx_rx_disruption.1803257133 |
| Short name | T3305 |
| Test name | |
| Test status | |
| Simulation time | 543514006 ps |
| CPU time | 1.59 seconds |
| Started | Aug 29 04:03:54 AM UTC 24 |
| Finished | Aug 29 04:03:57 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1803257133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 83.usbdev_t x_rx_disruption.1803257133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/83.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/84.usbdev_endpoint_types.3817573417 |
| Short name | T576 |
| Test name | |
| Test status | |
| Simulation time | 458563613 ps |
| CPU time | 1.42 seconds |
| Started | Aug 29 04:03:54 AM UTC 24 |
| Finished | Aug 29 04:03:57 AM UTC 24 |
| Peak memory | 214544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3817573417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 84.usbdev_endpoint_types.3817573417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/84.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/84.usbdev_fifo_levels.1181066566 |
| Short name | T410 |
| Test name | |
| Test status | |
| Simulation time | 263407368 ps |
| CPU time | 1.05 seconds |
| Started | Aug 29 04:03:54 AM UTC 24 |
| Finished | Aug 29 04:03:56 AM UTC 24 |
| Peak memory | 214636 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1181066566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 84.usbdev_fifo_levels.1181066566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/84.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/84.usbdev_tx_rx_disruption.3986391405 |
| Short name | T3302 |
| Test name | |
| Test status | |
| Simulation time | 477020364 ps |
| CPU time | 1.51 seconds |
| Started | Aug 29 04:03:54 AM UTC 24 |
| Finished | Aug 29 04:03:57 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3986391405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 84.usbdev_t x_rx_disruption.3986391405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/84.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/85.usbdev_endpoint_types.2349120125 |
| Short name | T565 |
| Test name | |
| Test status | |
| Simulation time | 256381992 ps |
| CPU time | 0.98 seconds |
| Started | Aug 29 04:03:54 AM UTC 24 |
| Finished | Aug 29 04:03:56 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2349120125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 85.usbdev_endpoint_types.2349120125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/85.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/85.usbdev_fifo_levels.590016692 |
| Short name | T427 |
| Test name | |
| Test status | |
| Simulation time | 247826456 ps |
| CPU time | 1.02 seconds |
| Started | Aug 29 04:03:54 AM UTC 24 |
| Finished | Aug 29 04:03:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=590016692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 85.usbdev_fifo_levels.590016692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/85.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/85.usbdev_tx_rx_disruption.3060752652 |
| Short name | T3304 |
| Test name | |
| Test status | |
| Simulation time | 481825988 ps |
| CPU time | 1.42 seconds |
| Started | Aug 29 04:03:54 AM UTC 24 |
| Finished | Aug 29 04:03:57 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3060752652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 85.usbdev_t x_rx_disruption.3060752652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/85.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/86.usbdev_endpoint_types.1758249650 |
| Short name | T541 |
| Test name | |
| Test status | |
| Simulation time | 649078476 ps |
| CPU time | 1.51 seconds |
| Started | Aug 29 04:03:54 AM UTC 24 |
| Finished | Aug 29 04:03:57 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1758249650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 86.usbdev_endpoint_types.1758249650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/86.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/86.usbdev_fifo_levels.1076017945 |
| Short name | T3307 |
| Test name | |
| Test status | |
| Simulation time | 250218976 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 04:05:07 AM UTC 24 |
| Finished | Aug 29 04:05:10 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1076017945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 86.usbdev_fifo_levels.1076017945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/86.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/86.usbdev_tx_rx_disruption.3833931225 |
| Short name | T3312 |
| Test name | |
| Test status | |
| Simulation time | 474408155 ps |
| CPU time | 1.39 seconds |
| Started | Aug 29 04:05:07 AM UTC 24 |
| Finished | Aug 29 04:05:10 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3833931225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 86.usbdev_t x_rx_disruption.3833931225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/86.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/87.usbdev_endpoint_types.4050858705 |
| Short name | T3308 |
| Test name | |
| Test status | |
| Simulation time | 340593289 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 04:05:07 AM UTC 24 |
| Finished | Aug 29 04:05:10 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4050858705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 87.usbdev_endpoint_types.4050858705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/87.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/87.usbdev_fifo_levels.2256754971 |
| Short name | T342 |
| Test name | |
| Test status | |
| Simulation time | 248486784 ps |
| CPU time | 0.95 seconds |
| Started | Aug 29 04:05:07 AM UTC 24 |
| Finished | Aug 29 04:05:10 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2256754971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 87.usbdev_fifo_levels.2256754971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/87.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/87.usbdev_tx_rx_disruption.2213058296 |
| Short name | T3314 |
| Test name | |
| Test status | |
| Simulation time | 472419110 ps |
| CPU time | 1.32 seconds |
| Started | Aug 29 04:05:07 AM UTC 24 |
| Finished | Aug 29 04:05:10 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2213058296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 87.usbdev_t x_rx_disruption.2213058296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/87.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/88.usbdev_endpoint_types.3166913489 |
| Short name | T453 |
| Test name | |
| Test status | |
| Simulation time | 469832613 ps |
| CPU time | 1.23 seconds |
| Started | Aug 29 04:05:07 AM UTC 24 |
| Finished | Aug 29 04:05:10 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3166913489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 88.usbdev_endpoint_types.3166913489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/88.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/88.usbdev_fifo_levels.1024233589 |
| Short name | T3309 |
| Test name | |
| Test status | |
| Simulation time | 178972225 ps |
| CPU time | 0.84 seconds |
| Started | Aug 29 04:05:07 AM UTC 24 |
| Finished | Aug 29 04:05:10 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1024233589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 88.usbdev_fifo_levels.1024233589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/88.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/88.usbdev_tx_rx_disruption.3307423063 |
| Short name | T3321 |
| Test name | |
| Test status | |
| Simulation time | 423559671 ps |
| CPU time | 1.29 seconds |
| Started | Aug 29 04:05:07 AM UTC 24 |
| Finished | Aug 29 04:05:10 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3307423063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 88.usbdev_t x_rx_disruption.3307423063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/88.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/89.usbdev_endpoint_types.2041975648 |
| Short name | T582 |
| Test name | |
| Test status | |
| Simulation time | 274895703 ps |
| CPU time | 1.02 seconds |
| Started | Aug 29 04:05:07 AM UTC 24 |
| Finished | Aug 29 04:05:10 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2041975648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 89.usbdev_endpoint_types.2041975648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/89.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/89.usbdev_fifo_levels.4173600108 |
| Short name | T3310 |
| Test name | |
| Test status | |
| Simulation time | 177640989 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 04:05:07 AM UTC 24 |
| Finished | Aug 29 04:05:10 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4173600108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 89.usbdev_fifo_levels.4173600108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/89.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/89.usbdev_tx_rx_disruption.1743788279 |
| Short name | T3328 |
| Test name | |
| Test status | |
| Simulation time | 529062365 ps |
| CPU time | 1.72 seconds |
| Started | Aug 29 04:05:07 AM UTC 24 |
| Finished | Aug 29 04:05:11 AM UTC 24 |
| Peak memory | 214880 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1743788279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 89.usbdev_t x_rx_disruption.1743788279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/89.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_alert_test.2524419152 |
| Short name | T1048 |
| Test name | |
| Test status | |
| Simulation time | 39410802 ps |
| CPU time | 0.99 seconds |
| Started | Aug 29 03:36:00 AM UTC 24 |
| Finished | Aug 29 03:36:02 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2524419152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 9.usbdev_alert_test.2524419152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_disconnect.3436161738 |
| Short name | T1017 |
| Test name | |
| Test status | |
| Simulation time | 4485439027 ps |
| CPU time | 7.82 seconds |
| Started | Aug 29 03:35:38 AM UTC 24 |
| Finished | Aug 29 03:35:46 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3436161738 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_disconnect.3436161738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_reset.3630217839 |
| Short name | T1058 |
| Test name | |
| Test status | |
| Simulation time | 15804845533 ps |
| CPU time | 28.89 seconds |
| Started | Aug 29 03:35:38 AM UTC 24 |
| Finished | Aug 29 03:36:08 AM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3630217839 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_reset.3630217839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_resume.424624974 |
| Short name | T1091 |
| Test name | |
| Test status | |
| Simulation time | 24938514746 ps |
| CPU time | 41.59 seconds |
| Started | Aug 29 03:35:38 AM UTC 24 |
| Finished | Aug 29 03:36:21 AM UTC 24 |
| Peak memory | 227548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=424624974 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_resume.424624974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_av_buffer.2156750401 |
| Short name | T1001 |
| Test name | |
| Test status | |
| Simulation time | 162492956 ps |
| CPU time | 1.05 seconds |
| Started | Aug 29 03:35:38 AM UTC 24 |
| Finished | Aug 29 03:35:40 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2156750401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_av_buffer.2156750401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_bitstuff_err.4147847185 |
| Short name | T1003 |
| Test name | |
| Test status | |
| Simulation time | 145084807 ps |
| CPU time | 1.4 seconds |
| Started | Aug 29 03:35:38 AM UTC 24 |
| Finished | Aug 29 03:35:40 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4147847185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_bitstuff_err.4147847185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_data_toggle_clear.3480521282 |
| Short name | T1004 |
| Test name | |
| Test status | |
| Simulation time | 351701197 ps |
| CPU time | 2.17 seconds |
| Started | Aug 29 03:35:38 AM UTC 24 |
| Finished | Aug 29 03:35:41 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3480521282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 9.usbdev_data_toggle_clear.3480521282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_data_toggle_restore.48368398 |
| Short name | T1007 |
| Test name | |
| Test status | |
| Simulation time | 572717374 ps |
| CPU time | 3 seconds |
| Started | Aug 29 03:35:38 AM UTC 24 |
| Finished | Aug 29 03:35:42 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=48368398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_data_toggle_restore.48368398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_device_address.2779718336 |
| Short name | T605 |
| Test name | |
| Test status | |
| Simulation time | 44869913074 ps |
| CPU time | 84.14 seconds |
| Started | Aug 29 03:35:38 AM UTC 24 |
| Finished | Aug 29 03:37:04 AM UTC 24 |
| Peak memory | 217432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2779718336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_device_address.2779718336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_device_timeout.580561136 |
| Short name | T1045 |
| Test name | |
| Test status | |
| Simulation time | 980505016 ps |
| CPU time | 21.77 seconds |
| Started | Aug 29 03:35:38 AM UTC 24 |
| Finished | Aug 29 03:36:01 AM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=580561136 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_device_timeout.580561136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_disable_endpoint.1420999227 |
| Short name | T984 |
| Test name | |
| Test status | |
| Simulation time | 728560676 ps |
| CPU time | 3.69 seconds |
| Started | Aug 29 03:35:43 AM UTC 24 |
| Finished | Aug 29 03:35:47 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1420999227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 9.usbdev_disable_endpoint.1420999227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_disconnected.3036915869 |
| Short name | T1012 |
| Test name | |
| Test status | |
| Simulation time | 144732117 ps |
| CPU time | 1.36 seconds |
| Started | Aug 29 03:35:43 AM UTC 24 |
| Finished | Aug 29 03:35:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3036915869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_disconnected.3036915869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_enable.1302334048 |
| Short name | T1011 |
| Test name | |
| Test status | |
| Simulation time | 52519487 ps |
| CPU time | 1.04 seconds |
| Started | Aug 29 03:35:43 AM UTC 24 |
| Finished | Aug 29 03:35:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1302334048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 9.usbdev_enable.1302334048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_endpoint_access.4112949712 |
| Short name | T999 |
| Test name | |
| Test status | |
| Simulation time | 940777716 ps |
| CPU time | 4.01 seconds |
| Started | Aug 29 03:35:43 AM UTC 24 |
| Finished | Aug 29 03:35:48 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4112949712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_endpoint_access.4112949712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_endpoint_types.3355812495 |
| Short name | T505 |
| Test name | |
| Test status | |
| Simulation time | 389143168 ps |
| CPU time | 1.54 seconds |
| Started | Aug 29 03:35:43 AM UTC 24 |
| Finished | Aug 29 03:35:45 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3355812495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_endpoint_types.3355812495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_fifo_levels.2932179114 |
| Short name | T245 |
| Test name | |
| Test status | |
| Simulation time | 303670009 ps |
| CPU time | 1.41 seconds |
| Started | Aug 29 03:35:43 AM UTC 24 |
| Finished | Aug 29 03:35:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2932179114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_fifo_levels.2932179114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_fifo_rst.3811395321 |
| Short name | T986 |
| Test name | |
| Test status | |
| Simulation time | 332810194 ps |
| CPU time | 2.76 seconds |
| Started | Aug 29 03:35:43 AM UTC 24 |
| Finished | Aug 29 03:35:47 AM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3811395321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_fifo_rst.3811395321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_in_iso.3533236424 |
| Short name | T1015 |
| Test name | |
| Test status | |
| Simulation time | 173588988 ps |
| CPU time | 1.47 seconds |
| Started | Aug 29 03:35:43 AM UTC 24 |
| Finished | Aug 29 03:35:46 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3533236424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 9.usbdev_in_iso.3533236424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_in_stall.2098539715 |
| Short name | T1013 |
| Test name | |
| Test status | |
| Simulation time | 172845522 ps |
| CPU time | 1.42 seconds |
| Started | Aug 29 03:35:43 AM UTC 24 |
| Finished | Aug 29 03:35:45 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2098539715 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_in_stall.2098539715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_in_trans.4284775713 |
| Short name | T1016 |
| Test name | |
| Test status | |
| Simulation time | 245989097 ps |
| CPU time | 1.66 seconds |
| Started | Aug 29 03:35:43 AM UTC 24 |
| Finished | Aug 29 03:35:46 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4284775713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_in_trans.4284775713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_invalid_sync.927755218 |
| Short name | T1122 |
| Test name | |
| Test status | |
| Simulation time | 4258205513 ps |
| CPU time | 46.79 seconds |
| Started | Aug 29 03:35:43 AM UTC 24 |
| Finished | Aug 29 03:36:31 AM UTC 24 |
| Peak memory | 229772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=927755218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 9.usbdev_invalid_sync.927755218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_iso_retraction.3167865477 |
| Short name | T1190 |
| Test name | |
| Test status | |
| Simulation time | 11471726013 ps |
| CPU time | 77.86 seconds |
| Started | Aug 29 03:35:43 AM UTC 24 |
| Finished | Aug 29 03:37:03 AM UTC 24 |
| Peak memory | 217380 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3167865477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_iso_retraction.3167865477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_link_in_err.2557456935 |
| Short name | T1014 |
| Test name | |
| Test status | |
| Simulation time | 156997233 ps |
| CPU time | 1.43 seconds |
| Started | Aug 29 03:35:43 AM UTC 24 |
| Finished | Aug 29 03:35:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2557456935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_link_in_err.2557456935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_link_resume.80944943 |
| Short name | T1120 |
| Test name | |
| Test status | |
| Simulation time | 25027127735 ps |
| CPU time | 45.99 seconds |
| Started | Aug 29 03:35:43 AM UTC 24 |
| Finished | Aug 29 03:36:31 AM UTC 24 |
| Peak memory | 217416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=80944943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_link_resume.80944943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_link_suspend.2209360751 |
| Short name | T1042 |
| Test name | |
| Test status | |
| Simulation time | 4678545133 ps |
| CPU time | 9.61 seconds |
| Started | Aug 29 03:35:48 AM UTC 24 |
| Finished | Aug 29 03:35:58 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2209360751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_link_suspend.2209360751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_low_speed_traffic.4100741601 |
| Short name | T1079 |
| Test name | |
| Test status | |
| Simulation time | 3372964539 ps |
| CPU time | 27.99 seconds |
| Started | Aug 29 03:35:48 AM UTC 24 |
| Finished | Aug 29 03:36:17 AM UTC 24 |
| Peak memory | 229720 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4100741601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_low_speed_traffic.4100741601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_max_inter_pkt_delay.3537032297 |
| Short name | T1202 |
| Test name | |
| Test status | |
| Simulation time | 2720638279 ps |
| CPU time | 76 seconds |
| Started | Aug 29 03:35:48 AM UTC 24 |
| Finished | Aug 29 03:37:05 AM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3537032297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_inter_pkt_delay.3537032297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_max_length_in_transaction.2893740370 |
| Short name | T1022 |
| Test name | |
| Test status | |
| Simulation time | 269911095 ps |
| CPU time | 1.71 seconds |
| Started | Aug 29 03:35:48 AM UTC 24 |
| Finished | Aug 29 03:35:50 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2893740370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_max_length_in_transaction.2893740370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_max_length_out_transaction.1897242357 |
| Short name | T1021 |
| Test name | |
| Test status | |
| Simulation time | 219261430 ps |
| CPU time | 1.64 seconds |
| Started | Aug 29 03:35:48 AM UTC 24 |
| Finished | Aug 29 03:35:50 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1897242357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 9.usbdev_max_length_out_transaction.1897242357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_max_non_iso_usb_traffic.409217562 |
| Short name | T1093 |
| Test name | |
| Test status | |
| Simulation time | 3765782408 ps |
| CPU time | 32.77 seconds |
| Started | Aug 29 03:35:48 AM UTC 24 |
| Finished | Aug 29 03:36:22 AM UTC 24 |
| Peak memory | 229612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=409217562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_non_iso_usb_traffic.409217562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_max_usb_traffic.4292494288 |
| Short name | T1059 |
| Test name | |
| Test status | |
| Simulation time | 2663050076 ps |
| CPU time | 18.92 seconds |
| Started | Aug 29 03:35:48 AM UTC 24 |
| Finished | Aug 29 03:36:08 AM UTC 24 |
| Peak memory | 234100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4292494288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_usb_traffic.4292494288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_min_inter_pkt_delay.1244981719 |
| Short name | T1063 |
| Test name | |
| Test status | |
| Simulation time | 2095583473 ps |
| CPU time | 21.09 seconds |
| Started | Aug 29 03:35:48 AM UTC 24 |
| Finished | Aug 29 03:36:10 AM UTC 24 |
| Peak memory | 233980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1244981719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_min_inter_pkt_delay.1244981719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_min_length_in_transaction.573715875 |
| Short name | T1020 |
| Test name | |
| Test status | |
| Simulation time | 171034549 ps |
| CPU time | 1.41 seconds |
| Started | Aug 29 03:35:48 AM UTC 24 |
| Finished | Aug 29 03:35:50 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=573715875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 9.usbdev_min_length_in_transaction.573715875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_min_length_out_transaction.2398130625 |
| Short name | T1019 |
| Test name | |
| Test status | |
| Simulation time | 149836730 ps |
| CPU time | 1.32 seconds |
| Started | Aug 29 03:35:48 AM UTC 24 |
| Finished | Aug 29 03:35:50 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2398130625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 9.usbdev_min_length_out_transaction.2398130625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_nak_trans.1067904855 |
| Short name | T142 |
| Test name | |
| Test status | |
| Simulation time | 192058103 ps |
| CPU time | 1.3 seconds |
| Started | Aug 29 03:35:48 AM UTC 24 |
| Finished | Aug 29 03:35:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1067904855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_nak_trans.1067904855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_out_iso.1181627148 |
| Short name | T1024 |
| Test name | |
| Test status | |
| Simulation time | 148774212 ps |
| CPU time | 1.33 seconds |
| Started | Aug 29 03:35:48 AM UTC 24 |
| Finished | Aug 29 03:35:50 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1181627148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_out_iso.1181627148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_out_stall.1511181306 |
| Short name | T1025 |
| Test name | |
| Test status | |
| Simulation time | 168279900 ps |
| CPU time | 1.43 seconds |
| Started | Aug 29 03:35:48 AM UTC 24 |
| Finished | Aug 29 03:35:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1511181306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_out_stall.1511181306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_out_trans_nak.3555178007 |
| Short name | T624 |
| Test name | |
| Test status | |
| Simulation time | 253720560 ps |
| CPU time | 1.37 seconds |
| Started | Aug 29 03:35:48 AM UTC 24 |
| Finished | Aug 29 03:35:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3555178007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 9.usbdev_out_trans_nak.3555178007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_pending_in_trans.4094538647 |
| Short name | T1023 |
| Test name | |
| Test status | |
| Simulation time | 166706455 ps |
| CPU time | 1.16 seconds |
| Started | Aug 29 03:35:48 AM UTC 24 |
| Finished | Aug 29 03:35:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4094538647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 9.usbdev_pending_in_trans.4094538647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_phy_config_pinflip.244672560 |
| Short name | T1031 |
| Test name | |
| Test status | |
| Simulation time | 237647479 ps |
| CPU time | 1.96 seconds |
| Started | Aug 29 03:35:50 AM UTC 24 |
| Finished | Aug 29 03:35:53 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=244672560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 9.usbdev_phy_config_pinflip.244672560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_phy_config_usb_ref_disable.3324216935 |
| Short name | T1027 |
| Test name | |
| Test status | |
| Simulation time | 157895140 ps |
| CPU time | 1.18 seconds |
| Started | Aug 29 03:35:50 AM UTC 24 |
| Finished | Aug 29 03:35:53 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3324216935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 9.usbdev_phy_config_usb_ref_disable.3324216935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_phy_pins_sense.4182222602 |
| Short name | T1026 |
| Test name | |
| Test status | |
| Simulation time | 70935154 ps |
| CPU time | 1.13 seconds |
| Started | Aug 29 03:35:50 AM UTC 24 |
| Finished | Aug 29 03:35:53 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4182222602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_phy_pins_sense.4182222602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_buffer.1538554260 |
| Short name | T294 |
| Test name | |
| Test status | |
| Simulation time | 17754120279 ps |
| CPU time | 45.4 seconds |
| Started | Aug 29 03:35:51 AM UTC 24 |
| Finished | Aug 29 03:36:37 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1538554260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 9.usbdev_pkt_buffer.1538554260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_received.1710188629 |
| Short name | T1028 |
| Test name | |
| Test status | |
| Simulation time | 176240711 ps |
| CPU time | 1.59 seconds |
| Started | Aug 29 03:35:51 AM UTC 24 |
| Finished | Aug 29 03:35:53 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1710188629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_pkt_received.1710188629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_sent.2567253607 |
| Short name | T1030 |
| Test name | |
| Test status | |
| Simulation time | 195212142 ps |
| CPU time | 1.49 seconds |
| Started | Aug 29 03:35:51 AM UTC 24 |
| Finished | Aug 29 03:35:53 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2567253607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_pkt_sent.2567253607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_rand_bus_disconnects.396533232 |
| Short name | T1208 |
| Test name | |
| Test status | |
| Simulation time | 7773353776 ps |
| CPU time | 71.08 seconds |
| Started | Aug 29 03:35:55 AM UTC 24 |
| Finished | Aug 29 03:37:08 AM UTC 24 |
| Peak memory | 234208 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=396533232 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_bus_disconnects.396533232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_rand_bus_resets.60750681 |
| Short name | T1109 |
| Test name | |
| Test status | |
| Simulation time | 3981051114 ps |
| CPU time | 31.59 seconds |
| Started | Aug 29 03:35:55 AM UTC 24 |
| Finished | Aug 29 03:36:28 AM UTC 24 |
| Peak memory | 229584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=60750681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bu s_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_bus_resets.60750681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_rand_suspends.2528413600 |
| Short name | T1146 |
| Test name | |
| Test status | |
| Simulation time | 7121647246 ps |
| CPU time | 44.33 seconds |
| Started | Aug 29 03:35:55 AM UTC 24 |
| Finished | Aug 29 03:36:41 AM UTC 24 |
| Peak memory | 231640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2528413600 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_suspends.2528413600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_random_length_in_transaction.2487951126 |
| Short name | T1036 |
| Test name | |
| Test status | |
| Simulation time | 243573364 ps |
| CPU time | 1.76 seconds |
| Started | Aug 29 03:35:55 AM UTC 24 |
| Finished | Aug 29 03:35:57 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2487951126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 9.usbdev_random_length_in_transaction.2487951126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_random_length_out_transaction.2456756444 |
| Short name | T1033 |
| Test name | |
| Test status | |
| Simulation time | 157997435 ps |
| CPU time | 1.22 seconds |
| Started | Aug 29 03:35:55 AM UTC 24 |
| Finished | Aug 29 03:35:57 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2456756444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 9.usbdev_random_length_out_transaction.2456756444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_resume_link_active.2275439646 |
| Short name | T1106 |
| Test name | |
| Test status | |
| Simulation time | 20157349517 ps |
| CPU time | 31.3 seconds |
| Started | Aug 29 03:35:55 AM UTC 24 |
| Finished | Aug 29 03:36:28 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2275439646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 9.usbdev_resume_link_active.2275439646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_rx_crc_err.2625590104 |
| Short name | T1034 |
| Test name | |
| Test status | |
| Simulation time | 135161441 ps |
| CPU time | 1.25 seconds |
| Started | Aug 29 03:35:55 AM UTC 24 |
| Finished | Aug 29 03:35:57 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2625590104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 9.usbdev_rx_crc_err.2625590104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_rx_full.3780140417 |
| Short name | T1043 |
| Test name | |
| Test status | |
| Simulation time | 358556896 ps |
| CPU time | 2.26 seconds |
| Started | Aug 29 03:35:55 AM UTC 24 |
| Finished | Aug 29 03:35:58 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3780140417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_rx_full.3780140417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_setup_stage.2165293368 |
| Short name | T1038 |
| Test name | |
| Test status | |
| Simulation time | 175170081 ps |
| CPU time | 1.4 seconds |
| Started | Aug 29 03:35:55 AM UTC 24 |
| Finished | Aug 29 03:35:58 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2165293368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_setup_stage.2165293368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_setup_trans_ignored.528000189 |
| Short name | T1035 |
| Test name | |
| Test status | |
| Simulation time | 154770418 ps |
| CPU time | 1.12 seconds |
| Started | Aug 29 03:35:55 AM UTC 24 |
| Finished | Aug 29 03:35:57 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=528000189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 9.usbdev_setup_trans_ignored.528000189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_smoke.956337162 |
| Short name | T1040 |
| Test name | |
| Test status | |
| Simulation time | 223028801 ps |
| CPU time | 1.8 seconds |
| Started | Aug 29 03:35:55 AM UTC 24 |
| Finished | Aug 29 03:35:58 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=956337162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_smoke.956337162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_spurious_pids_ignored.603413607 |
| Short name | T1062 |
| Test name | |
| Test status | |
| Simulation time | 1873896697 ps |
| CPU time | 13.29 seconds |
| Started | Aug 29 03:35:55 AM UTC 24 |
| Finished | Aug 29 03:36:10 AM UTC 24 |
| Peak memory | 229512 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=603413607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_spurious_pids_ignored.603413607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_stall_priority_over_nak.2109954883 |
| Short name | T1037 |
| Test name | |
| Test status | |
| Simulation time | 183639375 ps |
| CPU time | 1.09 seconds |
| Started | Aug 29 03:35:55 AM UTC 24 |
| Finished | Aug 29 03:35:57 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2109954883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stall_priority_over_nak.2109954883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_stall_trans.3628812039 |
| Short name | T1039 |
| Test name | |
| Test status | |
| Simulation time | 153788318 ps |
| CPU time | 1.13 seconds |
| Started | Aug 29 03:35:55 AM UTC 24 |
| Finished | Aug 29 03:35:58 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3628812039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_stall_trans.3628812039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_stream_len_max.967485503 |
| Short name | T1050 |
| Test name | |
| Test status | |
| Simulation time | 1348542098 ps |
| CPU time | 6.17 seconds |
| Started | Aug 29 03:35:57 AM UTC 24 |
| Finished | Aug 29 03:36:04 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=967485503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 9.usbdev_stream_len_max.967485503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_streaming_out.1568434653 |
| Short name | T1222 |
| Test name | |
| Test status | |
| Simulation time | 2876698910 ps |
| CPU time | 76.58 seconds |
| Started | Aug 29 03:35:55 AM UTC 24 |
| Finished | Aug 29 03:37:14 AM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1568434653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_streaming_out.1568434653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_stress_usb_traffic.1019705282 |
| Short name | T1328 |
| Test name | |
| Test status | |
| Simulation time | 4791310352 ps |
| CPU time | 117.52 seconds |
| Started | Aug 29 03:36:00 AM UTC 24 |
| Finished | Aug 29 03:37:59 AM UTC 24 |
| Peak memory | 229660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1019705282 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stress_usb_traffic.1019705282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_timeout_missing_host_handshake.3842174906 |
| Short name | T1069 |
| Test name | |
| Test status | |
| Simulation time | 3210921873 ps |
| CPU time | 28.68 seconds |
| Started | Aug 29 03:35:43 AM UTC 24 |
| Finished | Aug 29 03:36:13 AM UTC 24 |
| Peak memory | 217448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3842174906 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_timeout_missing_host_handshake.3842174906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/9.usbdev_tx_rx_disruption.3899688158 |
| Short name | T192 |
| Test name | |
| Test status | |
| Simulation time | 635554210 ps |
| CPU time | 2.31 seconds |
| Started | Aug 29 03:36:00 AM UTC 24 |
| Finished | Aug 29 03:36:03 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3899688158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_tx _rx_disruption.3899688158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/9.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/90.usbdev_endpoint_types.4193755832 |
| Short name | T3311 |
| Test name | |
| Test status | |
| Simulation time | 199596276 ps |
| CPU time | 0.91 seconds |
| Started | Aug 29 04:05:07 AM UTC 24 |
| Finished | Aug 29 04:05:10 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4193755832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 90.usbdev_endpoint_types.4193755832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/90.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/90.usbdev_fifo_levels.464615105 |
| Short name | T3315 |
| Test name | |
| Test status | |
| Simulation time | 246462409 ps |
| CPU time | 0.94 seconds |
| Started | Aug 29 04:05:07 AM UTC 24 |
| Finished | Aug 29 04:05:10 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=464615105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 90.usbdev_fifo_levels.464615105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/90.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/90.usbdev_tx_rx_disruption.3341169988 |
| Short name | T3320 |
| Test name | |
| Test status | |
| Simulation time | 530832693 ps |
| CPU time | 1.37 seconds |
| Started | Aug 29 04:05:07 AM UTC 24 |
| Finished | Aug 29 04:05:10 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3341169988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 90.usbdev_t x_rx_disruption.3341169988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/90.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/91.usbdev_endpoint_types.1355455657 |
| Short name | T469 |
| Test name | |
| Test status | |
| Simulation time | 275675929 ps |
| CPU time | 1 seconds |
| Started | Aug 29 04:05:07 AM UTC 24 |
| Finished | Aug 29 04:05:10 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1355455657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 91.usbdev_endpoint_types.1355455657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/91.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/91.usbdev_fifo_levels.1523090972 |
| Short name | T353 |
| Test name | |
| Test status | |
| Simulation time | 186385875 ps |
| CPU time | 0.82 seconds |
| Started | Aug 29 04:05:07 AM UTC 24 |
| Finished | Aug 29 04:05:10 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1523090972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 91.usbdev_fifo_levels.1523090972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/91.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/91.usbdev_tx_rx_disruption.1841565121 |
| Short name | T3324 |
| Test name | |
| Test status | |
| Simulation time | 563520437 ps |
| CPU time | 1.46 seconds |
| Started | Aug 29 04:05:07 AM UTC 24 |
| Finished | Aug 29 04:05:11 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1841565121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 91.usbdev_t x_rx_disruption.1841565121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/91.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/92.usbdev_endpoint_types.3618234735 |
| Short name | T3319 |
| Test name | |
| Test status | |
| Simulation time | 276483744 ps |
| CPU time | 1.06 seconds |
| Started | Aug 29 04:05:07 AM UTC 24 |
| Finished | Aug 29 04:05:10 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3618234735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 92.usbdev_endpoint_types.3618234735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/92.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/92.usbdev_fifo_levels.3633694460 |
| Short name | T3316 |
| Test name | |
| Test status | |
| Simulation time | 161694745 ps |
| CPU time | 0.8 seconds |
| Started | Aug 29 04:05:07 AM UTC 24 |
| Finished | Aug 29 04:05:10 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3633694460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 92.usbdev_fifo_levels.3633694460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/92.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/92.usbdev_tx_rx_disruption.6987657 |
| Short name | T3332 |
| Test name | |
| Test status | |
| Simulation time | 512899296 ps |
| CPU time | 1.88 seconds |
| Started | Aug 29 04:05:07 AM UTC 24 |
| Finished | Aug 29 04:05:11 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=6987657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 92.usbdev_tx_r x_disruption.6987657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/92.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/93.usbdev_endpoint_types.2301682749 |
| Short name | T3313 |
| Test name | |
| Test status | |
| Simulation time | 335165819 ps |
| CPU time | 1.21 seconds |
| Started | Aug 29 04:05:07 AM UTC 24 |
| Finished | Aug 29 04:05:10 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2301682749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 93.usbdev_endpoint_types.2301682749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/93.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/93.usbdev_fifo_levels.280309883 |
| Short name | T3317 |
| Test name | |
| Test status | |
| Simulation time | 159000883 ps |
| CPU time | 0.77 seconds |
| Started | Aug 29 04:05:07 AM UTC 24 |
| Finished | Aug 29 04:05:10 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=280309883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 93.usbdev_fifo_levels.280309883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/93.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/93.usbdev_tx_rx_disruption.4204466417 |
| Short name | T3331 |
| Test name | |
| Test status | |
| Simulation time | 518734334 ps |
| CPU time | 1.78 seconds |
| Started | Aug 29 04:05:07 AM UTC 24 |
| Finished | Aug 29 04:05:11 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4204466417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 93.usbdev_t x_rx_disruption.4204466417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/93.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/94.usbdev_endpoint_types.3630047168 |
| Short name | T477 |
| Test name | |
| Test status | |
| Simulation time | 401950153 ps |
| CPU time | 1.29 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:11 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3630047168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 94.usbdev_endpoint_types.3630047168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/94.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/94.usbdev_fifo_levels.2597044506 |
| Short name | T375 |
| Test name | |
| Test status | |
| Simulation time | 253697376 ps |
| CPU time | 1.01 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:10 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2597044506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 94.usbdev_fifo_levels.2597044506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/94.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/94.usbdev_tx_rx_disruption.713900632 |
| Short name | T183 |
| Test name | |
| Test status | |
| Simulation time | 492325373 ps |
| CPU time | 1.35 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:11 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=713900632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 94.usbdev_tx _rx_disruption.713900632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/94.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/95.usbdev_endpoint_types.2785168708 |
| Short name | T473 |
| Test name | |
| Test status | |
| Simulation time | 350580757 ps |
| CPU time | 1.59 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:11 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2785168708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 95.usbdev_endpoint_types.2785168708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/95.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/95.usbdev_fifo_levels.4129662428 |
| Short name | T3322 |
| Test name | |
| Test status | |
| Simulation time | 170092043 ps |
| CPU time | 0.81 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:10 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4129662428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 95.usbdev_fifo_levels.4129662428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/95.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/95.usbdev_tx_rx_disruption.1323480467 |
| Short name | T3343 |
| Test name | |
| Test status | |
| Simulation time | 500971235 ps |
| CPU time | 1.93 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:12 AM UTC 24 |
| Peak memory | 214976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1323480467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 95.usbdev_t x_rx_disruption.1323480467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/95.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/96.usbdev_fifo_levels.344989616 |
| Short name | T420 |
| Test name | |
| Test status | |
| Simulation time | 341362823 ps |
| CPU time | 1.34 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:11 AM UTC 24 |
| Peak memory | 214956 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=344989616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 96.usbdev_fifo_levels.344989616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/96.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/96.usbdev_tx_rx_disruption.1528069839 |
| Short name | T3342 |
| Test name | |
| Test status | |
| Simulation time | 622026478 ps |
| CPU time | 2.02 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:11 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1528069839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 96.usbdev_t x_rx_disruption.1528069839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/96.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/97.usbdev_endpoint_types.3526077882 |
| Short name | T3287 |
| Test name | |
| Test status | |
| Simulation time | 199453307 ps |
| CPU time | 0.93 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:10 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3526077882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 97.usbdev_endpoint_types.3526077882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/97.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/97.usbdev_fifo_levels.1422188156 |
| Short name | T380 |
| Test name | |
| Test status | |
| Simulation time | 250735726 ps |
| CPU time | 1.36 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:11 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1422188156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 97.usbdev_fifo_levels.1422188156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/97.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/97.usbdev_tx_rx_disruption.290150787 |
| Short name | T3336 |
| Test name | |
| Test status | |
| Simulation time | 707860893 ps |
| CPU time | 1.7 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:11 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=290150787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 97.usbdev_tx _rx_disruption.290150787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/97.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/98.usbdev_endpoint_types.2012062200 |
| Short name | T476 |
| Test name | |
| Test status | |
| Simulation time | 387858887 ps |
| CPU time | 1.28 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:11 AM UTC 24 |
| Peak memory | 215016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2012062200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 98.usbdev_endpoint_types.2012062200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/98.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/98.usbdev_fifo_levels.2374373586 |
| Short name | T401 |
| Test name | |
| Test status | |
| Simulation time | 326706822 ps |
| CPU time | 1.17 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:11 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2374373586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 98.usbdev_fifo_levels.2374373586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/98.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/98.usbdev_tx_rx_disruption.1520935738 |
| Short name | T3333 |
| Test name | |
| Test status | |
| Simulation time | 456635837 ps |
| CPU time | 1.37 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:11 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1520935738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 98.usbdev_t x_rx_disruption.1520935738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/98.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/99.usbdev_endpoint_types.656667803 |
| Short name | T3326 |
| Test name | |
| Test status | |
| Simulation time | 237697560 ps |
| CPU time | 0.96 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:11 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=656667803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 99.usbdev_endpoint_types.656667803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/99.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/99.usbdev_fifo_levels.4178294426 |
| Short name | T339 |
| Test name | |
| Test status | |
| Simulation time | 287653156 ps |
| CPU time | 1.46 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:11 AM UTC 24 |
| Peak memory | 216784 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4178294426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 99.usbdev_fifo_levels.4178294426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/99.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default/99.usbdev_tx_rx_disruption.3650784472 |
| Short name | T3330 |
| Test name | |
| Test status | |
| Simulation time | 566513010 ps |
| CPU time | 1.41 seconds |
| Started | Aug 29 04:05:08 AM UTC 24 |
| Finished | Aug 29 04:05:11 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3650784472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 99.usbdev_t x_rx_disruption.3650784472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_28/usbdev-sim-vcs/99.usbdev_tx_rx_disruption/latest |
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |