Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.16 98.22 96.03 97.44 93.22 98.38 98.17 98.64


Total test records in report: 3903
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html | tests27.html | tests28.html | tests29.html | tests30.html | tests31.html | tests32.html | tests33.html | tests34.html | tests35.html | tests36.html | tests37.html | tests38.html | tests39.html | tests40.html | tests41.html | tests42.html | tests43.html | tests44.html | tests45.html | tests46.html | tests47.html | tests48.html | tests49.html | tests50.html | tests51.html | tests52.html | tests53.html | tests54.html | tests55.html | tests56.html | tests57.html | tests58.html | tests59.html | tests60.html | tests61.html | tests62.html | tests63.html | tests64.html | tests65.html | tests66.html | tests67.html | tests68.html | tests69.html | tests70.html | tests71.html | tests72.html | tests73.html | tests74.html | tests75.html | tests76.html | tests77.html | tests78.html | tests79.html | tests80.html | tests81.html | tests82.html

T3208 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_stall_trans.4223744323 Sep 04 06:07:29 AM UTC 24 Sep 04 06:07:31 AM UTC 24 180663170 ps
T3209 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_smoke.476566397 Sep 04 06:07:29 AM UTC 24 Sep 04 06:07:32 AM UTC 24 264958727 ps
T370 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/68.usbdev_endpoint_types.1442276064 Sep 04 06:07:46 AM UTC 24 Sep 04 06:07:49 AM UTC 24 602138332 ps
T3210 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_low_speed_traffic.4287011665 Sep 04 06:05:42 AM UTC 24 Sep 04 06:07:32 AM UTC 24 3689449910 ps
T3211 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_alert_test.2251665472 Sep 04 06:07:30 AM UTC 24 Sep 04 06:07:32 AM UTC 24 52078148 ps
T3212 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_device_timeout.1828183992 Sep 04 06:07:13 AM UTC 24 Sep 04 06:07:33 AM UTC 24 706919205 ps
T3213 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_tx_rx_disruption.1649450208 Sep 04 06:07:30 AM UTC 24 Sep 04 06:07:34 AM UTC 24 491459062 ps
T406 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/50.usbdev_endpoint_types.3093614609 Sep 04 06:07:31 AM UTC 24 Sep 04 06:07:34 AM UTC 24 562526764 ps
T3214 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/50.usbdev_fifo_levels.3497890530 Sep 04 06:07:31 AM UTC 24 Sep 04 06:07:34 AM UTC 24 344415330 ps
T3215 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_streaming_out.1817015241 Sep 04 06:07:10 AM UTC 24 Sep 04 06:07:34 AM UTC 24 2656502161 ps
T3216 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/53.usbdev_endpoint_types.4106672021 Sep 04 06:07:33 AM UTC 24 Sep 04 06:07:35 AM UTC 24 225549535 ps
T508 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/51.usbdev_fifo_levels.360975073 Sep 04 06:07:33 AM UTC 24 Sep 04 06:07:36 AM UTC 24 250040103 ps
T3217 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_stream_len_max.2058509533 Sep 04 06:07:30 AM UTC 24 Sep 04 06:07:36 AM UTC 24 1249932122 ps
T580 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/52.usbdev_fifo_levels.3138404150 Sep 04 06:07:33 AM UTC 24 Sep 04 06:07:36 AM UTC 24 247914182 ps
T3218 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/51.usbdev_tx_rx_disruption.1060306348 Sep 04 06:07:33 AM UTC 24 Sep 04 06:07:36 AM UTC 24 622310466 ps
T386 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/52.usbdev_endpoint_types.1923200242 Sep 04 06:07:33 AM UTC 24 Sep 04 06:07:37 AM UTC 24 606404120 ps
T3219 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/53.usbdev_fifo_levels.3995219892 Sep 04 06:07:34 AM UTC 24 Sep 04 06:07:37 AM UTC 24 171900149 ps
T3220 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/50.usbdev_tx_rx_disruption.3584231427 Sep 04 06:07:33 AM UTC 24 Sep 04 06:07:37 AM UTC 24 632223729 ps
T3221 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/52.usbdev_tx_rx_disruption.3493744186 Sep 04 06:07:33 AM UTC 24 Sep 04 06:07:37 AM UTC 24 546968159 ps
T305 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/51.usbdev_endpoint_types.3118481207 Sep 04 06:07:33 AM UTC 24 Sep 04 06:07:37 AM UTC 24 673941980 ps
T297 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/54.usbdev_endpoint_types.2225424559 Sep 04 06:07:34 AM UTC 24 Sep 04 06:07:37 AM UTC 24 752340914 ps
T3222 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/53.usbdev_tx_rx_disruption.3034459237 Sep 04 06:07:34 AM UTC 24 Sep 04 06:07:38 AM UTC 24 518920540 ps
T316 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/55.usbdev_endpoint_types.3404486428 Sep 04 06:07:36 AM UTC 24 Sep 04 06:07:38 AM UTC 24 319774049 ps
T525 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/55.usbdev_fifo_levels.3512001946 Sep 04 06:07:36 AM UTC 24 Sep 04 06:07:38 AM UTC 24 155289358 ps
T3223 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/54.usbdev_tx_rx_disruption.2959813728 Sep 04 06:07:36 AM UTC 24 Sep 04 06:07:39 AM UTC 24 490573206 ps
T573 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/54.usbdev_fifo_levels.2537806709 Sep 04 06:07:36 AM UTC 24 Sep 04 06:07:39 AM UTC 24 256820792 ps
T3224 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_spurious_pids_ignored.2106749292 Sep 04 06:07:09 AM UTC 24 Sep 04 06:07:39 AM UTC 24 3392400866 ps
T438 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/57.usbdev_endpoint_types.3943023926 Sep 04 06:07:38 AM UTC 24 Sep 04 06:07:40 AM UTC 24 198930187 ps
T3225 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_timeout_missing_host_handshake.428812441 Sep 04 06:07:15 AM UTC 24 Sep 04 06:07:40 AM UTC 24 3266439525 ps
T564 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/56.usbdev_fifo_levels.631833485 Sep 04 06:07:37 AM UTC 24 Sep 04 06:07:40 AM UTC 24 286334511 ps
T3226 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/56.usbdev_tx_rx_disruption.3412459111 Sep 04 06:07:37 AM UTC 24 Sep 04 06:07:40 AM UTC 24 470159822 ps
T547 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/57.usbdev_fifo_levels.1275276770 Sep 04 06:07:38 AM UTC 24 Sep 04 06:07:41 AM UTC 24 322678070 ps
T310 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/56.usbdev_endpoint_types.200049462 Sep 04 06:07:37 AM UTC 24 Sep 04 06:07:41 AM UTC 24 721047280 ps
T3227 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/55.usbdev_tx_rx_disruption.2693994224 Sep 04 06:07:37 AM UTC 24 Sep 04 06:07:41 AM UTC 24 564489313 ps
T420 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/59.usbdev_endpoint_types.2508629966 Sep 04 06:07:39 AM UTC 24 Sep 04 06:07:42 AM UTC 24 154202472 ps
T538 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/58.usbdev_fifo_levels.1674065 Sep 04 06:07:39 AM UTC 24 Sep 04 06:07:42 AM UTC 24 294659394 ps
T308 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/58.usbdev_endpoint_types.2073583559 Sep 04 06:07:39 AM UTC 24 Sep 04 06:07:42 AM UTC 24 418253031 ps
T581 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/59.usbdev_fifo_levels.1543356864 Sep 04 06:07:39 AM UTC 24 Sep 04 06:07:42 AM UTC 24 274386623 ps
T3228 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/59.usbdev_tx_rx_disruption.3106475051 Sep 04 06:07:39 AM UTC 24 Sep 04 06:07:42 AM UTC 24 496608797 ps
T3229 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_resume.3623700813 Sep 04 06:06:45 AM UTC 24 Sep 04 06:07:42 AM UTC 24 29868454920 ps
T3230 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/58.usbdev_tx_rx_disruption.549466109 Sep 04 06:07:39 AM UTC 24 Sep 04 06:07:42 AM UTC 24 569567711 ps
T3231 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/57.usbdev_tx_rx_disruption.2942605645 Sep 04 06:07:39 AM UTC 24 Sep 04 06:07:43 AM UTC 24 513491754 ps
T3232 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/61.usbdev_endpoint_types.1733896183 Sep 04 06:07:41 AM UTC 24 Sep 04 06:07:43 AM UTC 24 149310950 ps
T3233 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/60.usbdev_fifo_levels.2361307147 Sep 04 06:07:41 AM UTC 24 Sep 04 06:07:43 AM UTC 24 147587839 ps
T3234 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/60.usbdev_tx_rx_disruption.4179645799 Sep 04 06:07:41 AM UTC 24 Sep 04 06:07:44 AM UTC 24 449111839 ps
T3235 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/61.usbdev_fifo_levels.3924793360 Sep 04 06:07:41 AM UTC 24 Sep 04 06:07:44 AM UTC 24 201608090 ps
T328 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/62.usbdev_endpoint_types.1680179622 Sep 04 06:07:41 AM UTC 24 Sep 04 06:07:44 AM UTC 24 368133879 ps
T367 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/60.usbdev_endpoint_types.3327704884 Sep 04 06:07:41 AM UTC 24 Sep 04 06:07:44 AM UTC 24 433018481 ps
T552 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/62.usbdev_fifo_levels.817335391 Sep 04 06:07:41 AM UTC 24 Sep 04 06:07:44 AM UTC 24 282689090 ps
T3236 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/61.usbdev_tx_rx_disruption.519895856 Sep 04 06:07:41 AM UTC 24 Sep 04 06:07:44 AM UTC 24 461592095 ps
T3237 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_resume.3111359950 Sep 04 06:07:12 AM UTC 24 Sep 04 06:07:44 AM UTC 24 24828261566 ps
T3238 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_reset.431251985 Sep 04 06:07:11 AM UTC 24 Sep 04 06:07:45 AM UTC 24 20112671612 ps
T3239 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/63.usbdev_endpoint_types.3671454055 Sep 04 06:07:43 AM UTC 24 Sep 04 06:07:45 AM UTC 24 265190016 ps
T3240 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/63.usbdev_fifo_levels.2744725694 Sep 04 06:07:43 AM UTC 24 Sep 04 06:07:46 AM UTC 24 240477156 ps
T516 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/64.usbdev_fifo_levels.2130105104 Sep 04 06:07:43 AM UTC 24 Sep 04 06:07:46 AM UTC 24 257112601 ps
T3241 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/62.usbdev_tx_rx_disruption.2568447859 Sep 04 06:07:43 AM UTC 24 Sep 04 06:07:46 AM UTC 24 466973403 ps
T3242 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/63.usbdev_tx_rx_disruption.1804915065 Sep 04 06:07:43 AM UTC 24 Sep 04 06:07:46 AM UTC 24 468373902 ps
T196 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/64.usbdev_tx_rx_disruption.2389926499 Sep 04 06:07:43 AM UTC 24 Sep 04 06:07:46 AM UTC 24 533280855 ps
T351 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/64.usbdev_endpoint_types.3417922672 Sep 04 06:07:43 AM UTC 24 Sep 04 06:07:46 AM UTC 24 787972710 ps
T421 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/66.usbdev_endpoint_types.1642324435 Sep 04 06:07:45 AM UTC 24 Sep 04 06:07:47 AM UTC 24 181513766 ps
T566 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/65.usbdev_fifo_levels.2205123500 Sep 04 06:07:44 AM UTC 24 Sep 04 06:07:47 AM UTC 24 262581575 ps
T3243 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/66.usbdev_fifo_levels.2719090751 Sep 04 06:07:45 AM UTC 24 Sep 04 06:07:47 AM UTC 24 169239900 ps
T298 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/65.usbdev_endpoint_types.1028848933 Sep 04 06:07:44 AM UTC 24 Sep 04 06:07:47 AM UTC 24 485702537 ps
T411 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/67.usbdev_endpoint_types.3536718839 Sep 04 06:07:45 AM UTC 24 Sep 04 06:07:47 AM UTC 24 462263077 ps
T197 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/66.usbdev_tx_rx_disruption.2586868202 Sep 04 06:07:45 AM UTC 24 Sep 04 06:07:47 AM UTC 24 508034849 ps
T3244 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/67.usbdev_fifo_levels.4195057994 Sep 04 06:07:45 AM UTC 24 Sep 04 06:07:48 AM UTC 24 272714072 ps
T3245 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/67.usbdev_tx_rx_disruption.4003848735 Sep 04 06:07:45 AM UTC 24 Sep 04 06:07:48 AM UTC 24 558516730 ps
T393 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/70.usbdev_endpoint_types.3786893132 Sep 04 06:07:46 AM UTC 24 Sep 04 06:07:49 AM UTC 24 284316243 ps
T3246 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/65.usbdev_tx_rx_disruption.709084364 Sep 04 06:07:45 AM UTC 24 Sep 04 06:07:48 AM UTC 24 626815978 ps
T577 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/68.usbdev_fifo_levels.4136937166 Sep 04 06:07:46 AM UTC 24 Sep 04 06:07:49 AM UTC 24 261040798 ps
T3247 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/69.usbdev_endpoint_types.1646491784 Sep 04 06:07:46 AM UTC 24 Sep 04 06:07:49 AM UTC 24 237911342 ps
T3248 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/72.usbdev_tx_rx_disruption.2859388184 Sep 04 06:07:48 AM UTC 24 Sep 04 06:07:51 AM UTC 24 464460657 ps
T329 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/73.usbdev_endpoint_types.2381430624 Sep 04 06:07:48 AM UTC 24 Sep 04 06:07:52 AM UTC 24 514936004 ps
T3249 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/71.usbdev_tx_rx_disruption.693953425 Sep 04 06:07:48 AM UTC 24 Sep 04 06:07:52 AM UTC 24 509805238 ps
T348 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/74.usbdev_endpoint_types.2835914232 Sep 04 06:07:50 AM UTC 24 Sep 04 06:07:52 AM UTC 24 226707981 ps
T3250 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/75.usbdev_fifo_levels.1379805512 Sep 04 06:07:50 AM UTC 24 Sep 04 06:07:52 AM UTC 24 169946093 ps
T3251 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/74.usbdev_fifo_levels.3145494689 Sep 04 06:07:50 AM UTC 24 Sep 04 06:07:52 AM UTC 24 247531584 ps
T3252 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/74.usbdev_tx_rx_disruption.2944916466 Sep 04 06:07:50 AM UTC 24 Sep 04 06:07:52 AM UTC 24 526648531 ps
T3253 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/73.usbdev_tx_rx_disruption.2585421323 Sep 04 06:07:49 AM UTC 24 Sep 04 06:07:52 AM UTC 24 621091116 ps
T344 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/75.usbdev_endpoint_types.2485099983 Sep 04 06:07:50 AM UTC 24 Sep 04 06:07:53 AM UTC 24 408963579 ps
T3254 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_invalid_sync.2845881854 Sep 04 06:06:53 AM UTC 24 Sep 04 06:07:53 AM UTC 24 2457993761 ps
T517 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/76.usbdev_fifo_levels.683976903 Sep 04 06:07:51 AM UTC 24 Sep 04 06:07:54 AM UTC 24 267295789 ps
T3255 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/75.usbdev_tx_rx_disruption.2728303081 Sep 04 06:07:51 AM UTC 24 Sep 04 06:07:54 AM UTC 24 495098697 ps
T3256 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/76.usbdev_endpoint_types.1918151941 Sep 04 06:07:51 AM UTC 24 Sep 04 06:07:54 AM UTC 24 243303565 ps
T390 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/77.usbdev_endpoint_types.1275901576 Sep 04 06:07:51 AM UTC 24 Sep 04 06:07:54 AM UTC 24 364306902 ps
T3257 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/76.usbdev_tx_rx_disruption.935030724 Sep 04 06:07:51 AM UTC 24 Sep 04 06:07:54 AM UTC 24 658377013 ps
T535 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/78.usbdev_fifo_levels.1724927560 Sep 04 06:07:53 AM UTC 24 Sep 04 06:07:55 AM UTC 24 151904164 ps
T392 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/78.usbdev_endpoint_types.1790876772 Sep 04 06:07:53 AM UTC 24 Sep 04 06:07:55 AM UTC 24 279190639 ps
T3258 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/79.usbdev_fifo_levels.1258820369 Sep 04 06:07:53 AM UTC 24 Sep 04 06:07:55 AM UTC 24 294614999 ps
T3259 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/77.usbdev_fifo_levels.1076245101 Sep 04 06:07:53 AM UTC 24 Sep 04 06:07:56 AM UTC 24 263553844 ps
T332 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/79.usbdev_endpoint_types.3115189582 Sep 04 06:07:53 AM UTC 24 Sep 04 06:07:56 AM UTC 24 507111122 ps
T349 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/81.usbdev_endpoint_types.4291698250 Sep 04 06:07:53 AM UTC 24 Sep 04 06:07:56 AM UTC 24 388166503 ps
T3260 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/77.usbdev_tx_rx_disruption.362233939 Sep 04 06:07:53 AM UTC 24 Sep 04 06:07:56 AM UTC 24 509808613 ps
T391 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/80.usbdev_endpoint_types.702369458 Sep 04 06:07:53 AM UTC 24 Sep 04 06:07:56 AM UTC 24 422970659 ps
T578 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/80.usbdev_fifo_levels.1989891711 Sep 04 06:07:53 AM UTC 24 Sep 04 06:07:56 AM UTC 24 285784169 ps
T3261 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/78.usbdev_tx_rx_disruption.2209162418 Sep 04 06:07:53 AM UTC 24 Sep 04 06:07:56 AM UTC 24 654165413 ps
T3262 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/79.usbdev_tx_rx_disruption.2930214494 Sep 04 06:07:53 AM UTC 24 Sep 04 06:07:56 AM UTC 24 511263662 ps
T550 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/81.usbdev_fifo_levels.2761371896 Sep 04 06:07:55 AM UTC 24 Sep 04 06:07:57 AM UTC 24 237485556 ps
T3263 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/80.usbdev_tx_rx_disruption.1042385755 Sep 04 06:07:53 AM UTC 24 Sep 04 06:07:57 AM UTC 24 620066732 ps
T3264 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/82.usbdev_fifo_levels.4186150823 Sep 04 06:07:55 AM UTC 24 Sep 04 06:07:57 AM UTC 24 160566781 ps
T3265 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/83.usbdev_fifo_levels.2594130782 Sep 04 06:07:55 AM UTC 24 Sep 04 06:07:57 AM UTC 24 253777275 ps
T3266 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/83.usbdev_endpoint_types.2002817908 Sep 04 06:07:55 AM UTC 24 Sep 04 06:07:57 AM UTC 24 172874906 ps
T340 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/82.usbdev_endpoint_types.829156249 Sep 04 06:07:55 AM UTC 24 Sep 04 06:07:58 AM UTC 24 560552981 ps
T3267 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/82.usbdev_tx_rx_disruption.4173475053 Sep 04 06:07:55 AM UTC 24 Sep 04 06:07:58 AM UTC 24 537087279 ps
T3268 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/81.usbdev_tx_rx_disruption.3647459358 Sep 04 06:07:55 AM UTC 24 Sep 04 06:07:58 AM UTC 24 681475440 ps
T3269 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/83.usbdev_tx_rx_disruption.1272591804 Sep 04 06:07:55 AM UTC 24 Sep 04 06:07:58 AM UTC 24 540757250 ps
T3270 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_device_address.4223255487 Sep 04 06:07:13 AM UTC 24 Sep 04 06:07:58 AM UTC 24 17381815082 ps
T350 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/84.usbdev_endpoint_types.4053526849 Sep 04 06:07:55 AM UTC 24 Sep 04 06:07:58 AM UTC 24 507532408 ps
T536 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/86.usbdev_fifo_levels.20268155 Sep 04 06:07:56 AM UTC 24 Sep 04 06:07:59 AM UTC 24 223209018 ps
T545 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/85.usbdev_fifo_levels.1686231166 Sep 04 06:07:56 AM UTC 24 Sep 04 06:07:59 AM UTC 24 277012591 ps
T3271 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/84.usbdev_tx_rx_disruption.3532716313 Sep 04 06:07:56 AM UTC 24 Sep 04 06:07:59 AM UTC 24 513843025 ps
T514 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/84.usbdev_fifo_levels.781130722 Sep 04 06:07:56 AM UTC 24 Sep 04 06:07:59 AM UTC 24 292460315 ps
T377 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/85.usbdev_endpoint_types.3310236327 Sep 04 06:07:56 AM UTC 24 Sep 04 06:07:59 AM UTC 24 375759733 ps
T116 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/86.usbdev_tx_rx_disruption.615276143 Sep 04 06:07:56 AM UTC 24 Sep 04 06:07:59 AM UTC 24 602531508 ps
T359 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/86.usbdev_endpoint_types.2254206470 Sep 04 06:07:56 AM UTC 24 Sep 04 06:08:00 AM UTC 24 426226396 ps
T368 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/99.usbdev_endpoint_types.160352108 Sep 04 06:08:04 AM UTC 24 Sep 04 06:08:06 AM UTC 24 247315007 ps
T3272 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/85.usbdev_tx_rx_disruption.2278738070 Sep 04 06:07:56 AM UTC 24 Sep 04 06:08:00 AM UTC 24 554529552 ps
T3273 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/89.usbdev_fifo_levels.3827713606 Sep 04 06:07:58 AM UTC 24 Sep 04 06:08:00 AM UTC 24 179770693 ps
T567 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/87.usbdev_fifo_levels.1243656126 Sep 04 06:07:58 AM UTC 24 Sep 04 06:08:00 AM UTC 24 259319076 ps
T562 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/88.usbdev_fifo_levels.1753794467 Sep 04 06:07:58 AM UTC 24 Sep 04 06:08:00 AM UTC 24 166159045 ps
T3274 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/87.usbdev_endpoint_types.73985355 Sep 04 06:07:58 AM UTC 24 Sep 04 06:08:01 AM UTC 24 272269617 ps
T3275 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_low_speed_traffic.3650410332 Sep 04 06:06:05 AM UTC 24 Sep 04 06:08:01 AM UTC 24 3998647496 ps
T3276 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/87.usbdev_tx_rx_disruption.3503781737 Sep 04 06:07:58 AM UTC 24 Sep 04 06:08:01 AM UTC 24 490445829 ps
T385 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/88.usbdev_endpoint_types.707180208 Sep 04 06:07:58 AM UTC 24 Sep 04 06:08:01 AM UTC 24 302807457 ps
T3277 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/88.usbdev_tx_rx_disruption.1578318549 Sep 04 06:07:58 AM UTC 24 Sep 04 06:08:01 AM UTC 24 560499564 ps
T309 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/89.usbdev_endpoint_types.518380536 Sep 04 06:07:58 AM UTC 24 Sep 04 06:08:01 AM UTC 24 787182958 ps
T3278 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/90.usbdev_fifo_levels.1753980824 Sep 04 06:08:00 AM UTC 24 Sep 04 06:08:02 AM UTC 24 163205850 ps
T3279 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/91.usbdev_fifo_levels.613716236 Sep 04 06:08:00 AM UTC 24 Sep 04 06:08:02 AM UTC 24 165966318 ps
T3280 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/93.usbdev_fifo_levels.1863068820 Sep 04 06:08:00 AM UTC 24 Sep 04 06:08:02 AM UTC 24 248126088 ps
T3281 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/90.usbdev_tx_rx_disruption.3809476120 Sep 04 06:08:00 AM UTC 24 Sep 04 06:08:02 AM UTC 24 534357484 ps
T3282 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/90.usbdev_endpoint_types.579284000 Sep 04 06:08:00 AM UTC 24 Sep 04 06:08:02 AM UTC 24 236058486 ps
T3283 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/92.usbdev_fifo_levels.4294398858 Sep 04 06:08:00 AM UTC 24 Sep 04 06:08:03 AM UTC 24 182079528 ps
T3284 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/89.usbdev_tx_rx_disruption.126949594 Sep 04 06:08:00 AM UTC 24 Sep 04 06:08:03 AM UTC 24 519338004 ps
T347 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/92.usbdev_endpoint_types.2206376552 Sep 04 06:08:00 AM UTC 24 Sep 04 06:08:03 AM UTC 24 239320443 ps
T3285 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/91.usbdev_tx_rx_disruption.712275759 Sep 04 06:08:00 AM UTC 24 Sep 04 06:08:03 AM UTC 24 519535568 ps
T3286 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/92.usbdev_tx_rx_disruption.1917128671 Sep 04 06:08:00 AM UTC 24 Sep 04 06:08:03 AM UTC 24 550419704 ps
T389 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/91.usbdev_endpoint_types.2682834754 Sep 04 06:08:00 AM UTC 24 Sep 04 06:08:03 AM UTC 24 612812172 ps
T384 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/93.usbdev_endpoint_types.94152146 Sep 04 06:08:00 AM UTC 24 Sep 04 06:08:03 AM UTC 24 386543081 ps
T3287 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_streaming_out.124057616 Sep 04 06:06:43 AM UTC 24 Sep 04 06:08:03 AM UTC 24 2844613665 ps
T502 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/96.usbdev_fifo_levels.415353957 Sep 04 06:08:02 AM UTC 24 Sep 04 06:08:05 AM UTC 24 260600716 ps
T314 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/95.usbdev_endpoint_types.3696474937 Sep 04 06:08:02 AM UTC 24 Sep 04 06:08:05 AM UTC 24 482827350 ps
T434 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/96.usbdev_endpoint_types.725876790 Sep 04 06:08:02 AM UTC 24 Sep 04 06:08:05 AM UTC 24 410897937 ps
T3288 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/95.usbdev_fifo_levels.1234395624 Sep 04 06:08:02 AM UTC 24 Sep 04 06:08:05 AM UTC 24 269904897 ps
T414 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/97.usbdev_endpoint_types.607421636 Sep 04 06:08:02 AM UTC 24 Sep 04 06:08:05 AM UTC 24 314205621 ps
T3289 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/94.usbdev_tx_rx_disruption.692852016 Sep 04 06:08:02 AM UTC 24 Sep 04 06:08:05 AM UTC 24 649692868 ps
T500 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/94.usbdev_fifo_levels.2912784721 Sep 04 06:08:02 AM UTC 24 Sep 04 06:08:05 AM UTC 24 267434235 ps
T3290 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/96.usbdev_tx_rx_disruption.684059903 Sep 04 06:08:02 AM UTC 24 Sep 04 06:08:05 AM UTC 24 474478553 ps
T338 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/94.usbdev_endpoint_types.2121049752 Sep 04 06:08:02 AM UTC 24 Sep 04 06:08:05 AM UTC 24 630483993 ps
T3291 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/93.usbdev_tx_rx_disruption.3701323410 Sep 04 06:08:02 AM UTC 24 Sep 04 06:08:05 AM UTC 24 571900277 ps
T3292 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/95.usbdev_tx_rx_disruption.2367305152 Sep 04 06:08:02 AM UTC 24 Sep 04 06:08:06 AM UTC 24 627396084 ps
T3293 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/97.usbdev_fifo_levels.1361404378 Sep 04 06:08:03 AM UTC 24 Sep 04 06:08:06 AM UTC 24 275954951 ps
T3294 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/98.usbdev_endpoint_types.2188451470 Sep 04 06:08:03 AM UTC 24 Sep 04 06:08:06 AM UTC 24 253951304 ps
T3295 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_link_resume.2231694 Sep 04 06:07:19 AM UTC 24 Sep 04 06:08:06 AM UTC 24 28709872182 ps
T3296 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_iso_retraction.1260534046 Sep 04 06:07:19 AM UTC 24 Sep 04 06:08:06 AM UTC 24 4056740681 ps
T3297 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/98.usbdev_tx_rx_disruption.1355203343 Sep 04 06:08:04 AM UTC 24 Sep 04 06:08:06 AM UTC 24 546886239 ps
T509 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/100.usbdev_fifo_levels.711699694 Sep 04 06:08:04 AM UTC 24 Sep 04 06:08:07 AM UTC 24 246424489 ps
T3298 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/97.usbdev_tx_rx_disruption.3534505089 Sep 04 06:08:03 AM UTC 24 Sep 04 06:08:07 AM UTC 24 420922180 ps
T542 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/99.usbdev_fifo_levels.1585067215 Sep 04 06:08:04 AM UTC 24 Sep 04 06:08:07 AM UTC 24 296132385 ps
T395 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/100.usbdev_endpoint_types.899677711 Sep 04 06:08:04 AM UTC 24 Sep 04 06:08:07 AM UTC 24 641798264 ps
T3299 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/99.usbdev_tx_rx_disruption.493411583 Sep 04 06:08:04 AM UTC 24 Sep 04 06:08:07 AM UTC 24 513881646 ps
T3300 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/101.usbdev_fifo_levels.3466222377 Sep 04 06:08:05 AM UTC 24 Sep 04 06:08:08 AM UTC 24 251896252 ps
T3301 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/102.usbdev_endpoint_types.235672138 Sep 04 06:08:05 AM UTC 24 Sep 04 06:08:08 AM UTC 24 291992648 ps
T428 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/101.usbdev_endpoint_types.1330899096 Sep 04 06:08:05 AM UTC 24 Sep 04 06:08:08 AM UTC 24 519920813 ps
T3302 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/101.usbdev_tx_rx_disruption.1801987817 Sep 04 06:08:05 AM UTC 24 Sep 04 06:08:08 AM UTC 24 479096575 ps
T501 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/102.usbdev_fifo_levels.2823672827 Sep 04 06:08:05 AM UTC 24 Sep 04 06:08:08 AM UTC 24 275394518 ps
T117 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/100.usbdev_tx_rx_disruption.2445263741 Sep 04 06:08:05 AM UTC 24 Sep 04 06:08:08 AM UTC 24 576154058 ps
T3303 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_invalid_sync.540002567 Sep 04 06:07:18 AM UTC 24 Sep 04 06:08:09 AM UTC 24 5428278250 ps
T3304 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/103.usbdev_fifo_levels.1245392640 Sep 04 06:08:07 AM UTC 24 Sep 04 06:08:10 AM UTC 24 252816123 ps
T3305 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/123.usbdev_fifo_levels.794024686 Sep 04 06:08:16 AM UTC 24 Sep 04 06:08:18 AM UTC 24 168340636 ps
T511 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/105.usbdev_fifo_levels.2165095086 Sep 04 06:08:07 AM UTC 24 Sep 04 06:08:10 AM UTC 24 145384624 ps
T425 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/103.usbdev_endpoint_types.2121151779 Sep 04 06:08:07 AM UTC 24 Sep 04 06:08:10 AM UTC 24 234886957 ps
T558 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/104.usbdev_fifo_levels.2988075449 Sep 04 06:08:07 AM UTC 24 Sep 04 06:08:10 AM UTC 24 245076406 ps
T3306 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_buffer.1500054055 Sep 04 06:07:05 AM UTC 24 Sep 04 06:08:10 AM UTC 24 21126812467 ps
T429 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/104.usbdev_endpoint_types.3043965000 Sep 04 06:08:07 AM UTC 24 Sep 04 06:08:10 AM UTC 24 282173129 ps
T3307 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/105.usbdev_endpoint_types.1544672351 Sep 04 06:08:07 AM UTC 24 Sep 04 06:08:10 AM UTC 24 502957153 ps
T3308 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/104.usbdev_tx_rx_disruption.677317630 Sep 04 06:08:07 AM UTC 24 Sep 04 06:08:10 AM UTC 24 493051619 ps
T3309 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/103.usbdev_tx_rx_disruption.1366830003 Sep 04 06:08:07 AM UTC 24 Sep 04 06:08:10 AM UTC 24 619164036 ps
T3310 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_device_address.3515784183 Sep 04 06:06:49 AM UTC 24 Sep 04 06:08:10 AM UTC 24 41336820312 ps
T3311 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/102.usbdev_tx_rx_disruption.1341962227 Sep 04 06:08:07 AM UTC 24 Sep 04 06:08:10 AM UTC 24 619706104 ps
T3312 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/106.usbdev_endpoint_types.1720067573 Sep 04 06:08:08 AM UTC 24 Sep 04 06:08:10 AM UTC 24 277617144 ps
T3313 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/107.usbdev_fifo_levels.3083283303 Sep 04 06:08:08 AM UTC 24 Sep 04 06:08:10 AM UTC 24 349098122 ps
T515 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/106.usbdev_fifo_levels.4083125821 Sep 04 06:08:08 AM UTC 24 Sep 04 06:08:10 AM UTC 24 303766768 ps
T3314 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/107.usbdev_tx_rx_disruption.3136400968 Sep 04 06:08:08 AM UTC 24 Sep 04 06:08:11 AM UTC 24 639327461 ps
T3315 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/105.usbdev_tx_rx_disruption.677082807 Sep 04 06:08:08 AM UTC 24 Sep 04 06:08:11 AM UTC 24 531576803 ps
T354 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/107.usbdev_endpoint_types.1029256979 Sep 04 06:08:08 AM UTC 24 Sep 04 06:08:11 AM UTC 24 575221172 ps
T3316 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/148.usbdev_fifo_levels.3681540930 Sep 04 06:08:25 AM UTC 24 Sep 04 06:08:28 AM UTC 24 257407592 ps
T3317 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/106.usbdev_tx_rx_disruption.214210410 Sep 04 06:08:08 AM UTC 24 Sep 04 06:08:11 AM UTC 24 486790127 ps
T3318 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/108.usbdev_endpoint_types.3420526199 Sep 04 06:08:09 AM UTC 24 Sep 04 06:08:11 AM UTC 24 239270165 ps
T437 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/109.usbdev_endpoint_types.614265344 Sep 04 06:08:09 AM UTC 24 Sep 04 06:08:11 AM UTC 24 175935621 ps
T3319 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/110.usbdev_endpoint_types.240900544 Sep 04 06:08:09 AM UTC 24 Sep 04 06:08:11 AM UTC 24 162324852 ps
T498 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/108.usbdev_fifo_levels.2706475989 Sep 04 06:08:09 AM UTC 24 Sep 04 06:08:11 AM UTC 24 276905306 ps
T563 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/110.usbdev_fifo_levels.2349342761 Sep 04 06:08:10 AM UTC 24 Sep 04 06:08:11 AM UTC 24 146868921 ps
T568 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/109.usbdev_fifo_levels.62359496 Sep 04 06:08:09 AM UTC 24 Sep 04 06:08:12 AM UTC 24 280200738 ps
T3320 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/108.usbdev_tx_rx_disruption.2378973619 Sep 04 06:08:09 AM UTC 24 Sep 04 06:08:12 AM UTC 24 710889463 ps
T408 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/111.usbdev_endpoint_types.3997717263 Sep 04 06:08:10 AM UTC 24 Sep 04 06:08:12 AM UTC 24 566560711 ps
T3321 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/110.usbdev_tx_rx_disruption.2320558908 Sep 04 06:08:10 AM UTC 24 Sep 04 06:08:12 AM UTC 24 575538838 ps
T3322 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/109.usbdev_tx_rx_disruption.1723430731 Sep 04 06:08:09 AM UTC 24 Sep 04 06:08:12 AM UTC 24 654042299 ps
T3323 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_low_speed_traffic.3134111145 Sep 04 06:07:20 AM UTC 24 Sep 04 06:08:13 AM UTC 24 4840385514 ps
T569 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/111.usbdev_fifo_levels.502987055 Sep 04 06:08:12 AM UTC 24 Sep 04 06:08:14 AM UTC 24 263464102 ps
T530 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/112.usbdev_fifo_levels.2328838435 Sep 04 06:08:12 AM UTC 24 Sep 04 06:08:14 AM UTC 24 280074798 ps
T533 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/113.usbdev_fifo_levels.3374625549 Sep 04 06:08:12 AM UTC 24 Sep 04 06:08:14 AM UTC 24 300112829 ps
T3324 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/114.usbdev_endpoint_types.1622629449 Sep 04 06:08:12 AM UTC 24 Sep 04 06:08:15 AM UTC 24 258716311 ps
T513 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/116.usbdev_fifo_levels.1527377127 Sep 04 06:08:13 AM UTC 24 Sep 04 06:08:15 AM UTC 24 192890995 ps
T3325 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/114.usbdev_fifo_levels.3372444991 Sep 04 06:08:12 AM UTC 24 Sep 04 06:08:15 AM UTC 24 257666544 ps
T337 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/112.usbdev_endpoint_types.3731895708 Sep 04 06:08:12 AM UTC 24 Sep 04 06:08:15 AM UTC 24 562506591 ps
T3326 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/111.usbdev_tx_rx_disruption.2786263664 Sep 04 06:08:12 AM UTC 24 Sep 04 06:08:15 AM UTC 24 618497624 ps
T3327 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/115.usbdev_fifo_levels.3156511659 Sep 04 06:08:12 AM UTC 24 Sep 04 06:08:15 AM UTC 24 270775033 ps
T3328 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/119.usbdev_fifo_levels.4027037948 Sep 04 06:08:13 AM UTC 24 Sep 04 06:08:15 AM UTC 24 161717063 ps
T379 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/113.usbdev_endpoint_types.340242828 Sep 04 06:08:12 AM UTC 24 Sep 04 06:08:15 AM UTC 24 274678935 ps
T3329 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/117.usbdev_fifo_levels.369407964 Sep 04 06:08:13 AM UTC 24 Sep 04 06:08:15 AM UTC 24 192382938 ps
T380 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/115.usbdev_endpoint_types.4070627436 Sep 04 06:08:12 AM UTC 24 Sep 04 06:08:15 AM UTC 24 424534099 ps
T3330 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/118.usbdev_fifo_levels.4176825414 Sep 04 06:08:13 AM UTC 24 Sep 04 06:08:15 AM UTC 24 298209219 ps
T388 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/119.usbdev_endpoint_types.4245237232 Sep 04 06:08:13 AM UTC 24 Sep 04 06:08:15 AM UTC 24 187342328 ps
T440 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/116.usbdev_endpoint_types.2126730065 Sep 04 06:08:12 AM UTC 24 Sep 04 06:08:15 AM UTC 24 536486117 ps
T3331 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/112.usbdev_tx_rx_disruption.3919442345 Sep 04 06:08:12 AM UTC 24 Sep 04 06:08:15 AM UTC 24 575354892 ps
T374 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/118.usbdev_endpoint_types.860198018 Sep 04 06:08:13 AM UTC 24 Sep 04 06:08:15 AM UTC 24 516929741 ps
T3332 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/115.usbdev_tx_rx_disruption.9644868 Sep 04 06:08:12 AM UTC 24 Sep 04 06:08:15 AM UTC 24 514153989 ps
T3333 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/113.usbdev_tx_rx_disruption.4004684934 Sep 04 06:08:12 AM UTC 24 Sep 04 06:08:16 AM UTC 24 668557260 ps
T3334 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/118.usbdev_tx_rx_disruption.1098276167 Sep 04 06:08:13 AM UTC 24 Sep 04 06:08:16 AM UTC 24 566251111 ps
T3335 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/116.usbdev_tx_rx_disruption.2413206065 Sep 04 06:08:13 AM UTC 24 Sep 04 06:08:16 AM UTC 24 515101566 ps
T3336 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/114.usbdev_tx_rx_disruption.2645154410 Sep 04 06:08:12 AM UTC 24 Sep 04 06:08:16 AM UTC 24 651538103 ps
T299 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/117.usbdev_endpoint_types.867245827 Sep 04 06:08:13 AM UTC 24 Sep 04 06:08:16 AM UTC 24 639517216 ps
T3337 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/117.usbdev_tx_rx_disruption.4188065600 Sep 04 06:08:13 AM UTC 24 Sep 04 06:08:16 AM UTC 24 484798856 ps
T518 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/120.usbdev_fifo_levels.2955563931 Sep 04 06:08:14 AM UTC 24 Sep 04 06:08:16 AM UTC 24 255086746 ps
T3338 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/120.usbdev_endpoint_types.2243976423 Sep 04 06:08:14 AM UTC 24 Sep 04 06:08:16 AM UTC 24 221096333 ps
T3339 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_min_inter_pkt_delay.322617658 Sep 04 06:07:22 AM UTC 24 Sep 04 06:08:16 AM UTC 24 2054475265 ps
T118 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/120.usbdev_tx_rx_disruption.1032700015 Sep 04 06:08:14 AM UTC 24 Sep 04 06:08:17 AM UTC 24 543975118 ps
T333 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/121.usbdev_endpoint_types.4053011764 Sep 04 06:08:14 AM UTC 24 Sep 04 06:08:17 AM UTC 24 635863660 ps
T3340 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/119.usbdev_tx_rx_disruption.2008038746 Sep 04 06:08:14 AM UTC 24 Sep 04 06:08:17 AM UTC 24 480979645 ps
T3341 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_low_speed_traffic.3125663715 Sep 04 06:06:58 AM UTC 24 Sep 04 06:08:17 AM UTC 24 2904354676 ps
T496 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/121.usbdev_fifo_levels.757985043 Sep 04 06:08:16 AM UTC 24 Sep 04 06:08:18 AM UTC 24 293579054 ps
T3342 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_buffer.1905939774 Sep 04 06:07:26 AM UTC 24 Sep 04 06:08:18 AM UTC 24 19507267004 ps
T355 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/122.usbdev_endpoint_types.32790228 Sep 04 06:08:16 AM UTC 24 Sep 04 06:08:18 AM UTC 24 355096337 ps
T3343 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/122.usbdev_fifo_levels.1764876398 Sep 04 06:08:16 AM UTC 24 Sep 04 06:08:18 AM UTC 24 160564021 ps
T3344 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/124.usbdev_endpoint_types.3769114721 Sep 04 06:08:16 AM UTC 24 Sep 04 06:08:18 AM UTC 24 188807317 ps
T3345 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/126.usbdev_endpoint_types.2600210695 Sep 04 06:08:16 AM UTC 24 Sep 04 06:08:18 AM UTC 24 182116881 ps
T3346 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/121.usbdev_tx_rx_disruption.605144325 Sep 04 06:08:16 AM UTC 24 Sep 04 06:08:18 AM UTC 24 500508465 ps
T322 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/125.usbdev_endpoint_types.3781262672 Sep 04 06:08:16 AM UTC 24 Sep 04 06:08:18 AM UTC 24 278076930 ps
T3347 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/124.usbdev_fifo_levels.2815633755 Sep 04 06:08:16 AM UTC 24 Sep 04 06:08:18 AM UTC 24 267866793 ps
T3348 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/123.usbdev_endpoint_types.1152696277 Sep 04 06:08:16 AM UTC 24 Sep 04 06:08:18 AM UTC 24 280919682 ps
T570 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/126.usbdev_fifo_levels.117234415 Sep 04 06:08:16 AM UTC 24 Sep 04 06:08:19 AM UTC 24 300403384 ps
T3349 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/122.usbdev_tx_rx_disruption.3302510159 Sep 04 06:08:16 AM UTC 24 Sep 04 06:08:19 AM UTC 24 535903313 ps
T3350 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/123.usbdev_tx_rx_disruption.3921779948 Sep 04 06:08:16 AM UTC 24 Sep 04 06:08:19 AM UTC 24 530191389 ps
T3351 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/125.usbdev_tx_rx_disruption.599779827 Sep 04 06:08:16 AM UTC 24 Sep 04 06:08:19 AM UTC 24 510231271 ps
T3352 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/125.usbdev_fifo_levels.1244613415 Sep 04 06:08:16 AM UTC 24 Sep 04 06:08:19 AM UTC 24 280353735 ps
T3353 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/126.usbdev_tx_rx_disruption.3932757252 Sep 04 06:08:16 AM UTC 24 Sep 04 06:08:19 AM UTC 24 553132925 ps
T3354 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/124.usbdev_tx_rx_disruption.3317237879 Sep 04 06:08:16 AM UTC 24 Sep 04 06:08:19 AM UTC 24 621678934 ps
T556 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/128.usbdev_fifo_levels.875385799 Sep 04 06:08:18 AM UTC 24 Sep 04 06:08:20 AM UTC 24 266530159 ps
T553 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/127.usbdev_fifo_levels.1192944312 Sep 04 06:08:18 AM UTC 24 Sep 04 06:08:20 AM UTC 24 285470776 ps
T576 /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/129.usbdev_fifo_levels.2217419128 Sep 04 06:08:18 AM UTC 24 Sep 04 06:08:20 AM UTC 24 261965494 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%