| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP |
| 97.16 | 98.22 | 96.03 | 97.44 | 93.22 | 98.38 | 98.17 | 98.64 |
| T229 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_errors.1233153394 | Sep 04 06:10:21 AM UTC 24 | Sep 04 06:10:24 AM UTC 24 | 90553353 ps | ||
| T264 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_partial_access.2656373024 | Sep 04 06:10:21 AM UTC 24 | Sep 04 06:10:24 AM UTC 24 | 113024296 ps | ||
| T3794 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_walk.4244701356 | Sep 04 06:10:19 AM UTC 24 | Sep 04 06:10:24 AM UTC 24 | 481368830 ps | ||
| T246 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_mem_rw_with_rand_reset.2246942769 | Sep 04 06:10:21 AM UTC 24 | Sep 04 06:10:24 AM UTC 24 | 101090239 ps | ||
| T220 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_intr_test.11224090 | Sep 04 06:10:19 AM UTC 24 | Sep 04 06:10:24 AM UTC 24 | 37869627 ps | ||
| T3795 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_bit_bash.3574105778 | Sep 04 06:10:19 AM UTC 24 | Sep 04 06:10:24 AM UTC 24 | 425361900 ps | ||
| T234 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_intg_err.3100196635 | Sep 04 06:10:19 AM UTC 24 | Sep 04 06:10:24 AM UTC 24 | 419386051 ps | ||
| T242 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_errors.3210415200 | Sep 04 06:10:19 AM UTC 24 | Sep 04 06:10:24 AM UTC 24 | 122934248 ps | ||
| T277 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_same_csr_outstanding.2925224418 | Sep 04 06:10:21 AM UTC 24 | Sep 04 06:10:24 AM UTC 24 | 186457755 ps | ||
| T3796 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_walk.1219307448 | Sep 04 06:10:19 AM UTC 24 | Sep 04 06:10:24 AM UTC 24 | 370109894 ps | ||
| T3797 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_walk.1520229306 | Sep 04 06:10:21 AM UTC 24 | Sep 04 06:10:24 AM UTC 24 | 123946474 ps | ||
| T235 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_intg_err.814713895 | Sep 04 06:10:19 AM UTC 24 | Sep 04 06:10:24 AM UTC 24 | 888988316 ps | ||
| T265 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_partial_access.2604275740 | Sep 04 06:10:21 AM UTC 24 | Sep 04 06:10:25 AM UTC 24 | 192138142 ps | ||
| T284 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_intr_test.1090008648 | Sep 04 06:10:23 AM UTC 24 | Sep 04 06:10:25 AM UTC 24 | 40020217 ps | ||
| T236 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_intg_err.774765577 | Sep 04 06:10:21 AM UTC 24 | Sep 04 06:10:25 AM UTC 24 | 507178664 ps | ||
| T266 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_rw.1254267569 | Sep 04 06:10:23 AM UTC 24 | Sep 04 06:10:25 AM UTC 24 | 87575748 ps | ||
| T278 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_same_csr_outstanding.3901847022 | Sep 04 06:10:23 AM UTC 24 | Sep 04 06:10:25 AM UTC 24 | 144975316 ps | ||
| T247 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_errors.693036185 | Sep 04 06:10:23 AM UTC 24 | Sep 04 06:10:25 AM UTC 24 | 103515386 ps | ||
| T248 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_mem_rw_with_rand_reset.1988069436 | Sep 04 06:10:23 AM UTC 24 | Sep 04 06:10:26 AM UTC 24 | 166745800 ps | ||
| T3798 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_walk.3008357408 | Sep 04 06:10:19 AM UTC 24 | Sep 04 06:10:26 AM UTC 24 | 329140310 ps | ||
| T267 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_aliasing.410823159 | Sep 04 06:10:21 AM UTC 24 | Sep 04 06:10:26 AM UTC 24 | 372212450 ps | ||
| T3799 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_aliasing.242207546 | Sep 04 06:10:23 AM UTC 24 | Sep 04 06:10:26 AM UTC 24 | 229273197 ps | ||
| T3800 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_walk.3088623580 | Sep 04 06:10:23 AM UTC 24 | Sep 04 06:10:26 AM UTC 24 | 103446146 ps | ||
| T268 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_bit_bash.3829466029 | Sep 04 06:10:21 AM UTC 24 | Sep 04 06:10:26 AM UTC 24 | 686706900 ps | ||
| T269 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_partial_access.2632255059 | Sep 04 06:10:23 AM UTC 24 | Sep 04 06:10:27 AM UTC 24 | 224234761 ps | ||
| T285 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_intr_test.2891858192 | Sep 04 06:10:28 AM UTC 24 | Sep 04 06:10:29 AM UTC 24 | 42170814 ps | ||
| T3801 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_rw.3494115725 | Sep 04 06:10:28 AM UTC 24 | Sep 04 06:10:30 AM UTC 24 | 62126343 ps | ||
| T270 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_bit_bash.455894219 | Sep 04 06:10:19 AM UTC 24 | Sep 04 06:10:27 AM UTC 24 | 568348287 ps | ||
| T286 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_intr_test.947473502 | Sep 04 06:10:25 AM UTC 24 | Sep 04 06:10:28 AM UTC 24 | 43541563 ps | ||
| T3802 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_same_csr_outstanding.3960099079 | Sep 04 06:10:25 AM UTC 24 | Sep 04 06:10:28 AM UTC 24 | 104566614 ps | ||
| T271 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_hw_reset.2744199401 | Sep 04 06:10:25 AM UTC 24 | Sep 04 06:10:28 AM UTC 24 | 211614342 ps | ||
| T3803 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_bit_bash.2116301221 | Sep 04 06:10:23 AM UTC 24 | Sep 04 06:10:28 AM UTC 24 | 657659989 ps | ||
| T272 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_rw.3927388366 | Sep 04 06:10:25 AM UTC 24 | Sep 04 06:10:28 AM UTC 24 | 117797832 ps | ||
| T3804 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_rw.798474770 | Sep 04 06:10:25 AM UTC 24 | Sep 04 06:10:28 AM UTC 24 | 67927832 ps | ||
| T444 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_intg_err.347792998 | Sep 04 06:10:19 AM UTC 24 | Sep 04 06:10:28 AM UTC 24 | 1215591667 ps | ||
| T445 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_intg_err.1316166731 | Sep 04 06:10:23 AM UTC 24 | Sep 04 06:10:28 AM UTC 24 | 831372723 ps | ||
| T287 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_intr_test.355540883 | Sep 04 06:10:25 AM UTC 24 | Sep 04 06:10:28 AM UTC 24 | 103761200 ps | ||
| T3805 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_rw.2689083362 | Sep 04 06:10:25 AM UTC 24 | Sep 04 06:10:29 AM UTC 24 | 90178460 ps | ||
| T3806 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_mem_rw_with_rand_reset.2402286141 | Sep 04 06:10:25 AM UTC 24 | Sep 04 06:10:29 AM UTC 24 | 115675663 ps | ||
| T3807 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_same_csr_outstanding.2368092261 | Sep 04 06:10:25 AM UTC 24 | Sep 04 06:10:29 AM UTC 24 | 211101396 ps | ||
| T241 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_errors.2409719136 | Sep 04 06:10:25 AM UTC 24 | Sep 04 06:10:29 AM UTC 24 | 150674519 ps | ||
| T3808 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_mem_rw_with_rand_reset.35230667 | Sep 04 06:10:25 AM UTC 24 | Sep 04 06:10:29 AM UTC 24 | 86378685 ps | ||
| T3809 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_mem_rw_with_rand_reset.3295993300 | Sep 04 06:10:25 AM UTC 24 | Sep 04 06:10:29 AM UTC 24 | 144106690 ps | ||
| T243 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_errors.2781237771 | Sep 04 06:10:25 AM UTC 24 | Sep 04 06:10:29 AM UTC 24 | 111244032 ps | ||
| T3810 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_same_csr_outstanding.2481322688 | Sep 04 06:10:25 AM UTC 24 | Sep 04 06:10:29 AM UTC 24 | 167012467 ps | ||
| T288 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_intr_test.1164506863 | Sep 04 06:10:28 AM UTC 24 | Sep 04 06:10:30 AM UTC 24 | 105441700 ps | ||
| T290 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_intr_test.68816322 | Sep 04 06:10:27 AM UTC 24 | Sep 04 06:10:29 AM UTC 24 | 40374938 ps | ||
| T3811 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_errors.4070612365 | Sep 04 06:10:25 AM UTC 24 | Sep 04 06:10:30 AM UTC 24 | 76625232 ps | ||
| T450 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_intg_err.1657611712 | Sep 04 06:10:25 AM UTC 24 | Sep 04 06:10:30 AM UTC 24 | 574152109 ps | ||
| T3812 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_aliasing.275810722 | Sep 04 06:10:25 AM UTC 24 | Sep 04 06:10:30 AM UTC 24 | 114929542 ps | ||
| T3813 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_intg_err.4268020874 | Sep 04 06:10:25 AM UTC 24 | Sep 04 06:10:30 AM UTC 24 | 472737255 ps | ||
| T3814 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_same_csr_outstanding.1139270858 | Sep 04 06:10:28 AM UTC 24 | Sep 04 06:10:30 AM UTC 24 | 130606885 ps | ||
| T244 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_errors.3070835609 | Sep 04 06:10:27 AM UTC 24 | Sep 04 06:10:30 AM UTC 24 | 98017213 ps | ||
| T3815 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_same_csr_outstanding.2431062979 | Sep 04 06:10:27 AM UTC 24 | Sep 04 06:10:30 AM UTC 24 | 276937689 ps | ||
| T245 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_errors.3769444043 | Sep 04 06:10:28 AM UTC 24 | Sep 04 06:10:30 AM UTC 24 | 143689852 ps | ||
| T3816 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_mem_rw_with_rand_reset.596577414 | Sep 04 06:10:27 AM UTC 24 | Sep 04 06:10:30 AM UTC 24 | 181226001 ps | ||
| T3817 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_same_csr_outstanding.2965291421 | Sep 04 06:10:28 AM UTC 24 | Sep 04 06:10:31 AM UTC 24 | 210324156 ps | ||
| T3818 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_mem_rw_with_rand_reset.600002657 | Sep 04 06:10:28 AM UTC 24 | Sep 04 06:10:31 AM UTC 24 | 158639362 ps | ||
| T3819 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_intg_err.3282529281 | Sep 04 06:10:27 AM UTC 24 | Sep 04 06:10:31 AM UTC 24 | 398373683 ps | ||
| T3820 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_bit_bash.2195276318 | Sep 04 06:10:25 AM UTC 24 | Sep 04 06:10:31 AM UTC 24 | 349755584 ps | ||
| T3821 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_intg_err.2288042113 | Sep 04 06:10:28 AM UTC 24 | Sep 04 06:10:31 AM UTC 24 | 361379900 ps | ||
| T449 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_intg_err.3621943867 | Sep 04 06:10:27 AM UTC 24 | Sep 04 06:10:31 AM UTC 24 | 548379184 ps | ||
| T289 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_intr_test.3152105713 | Sep 04 06:10:34 AM UTC 24 | Sep 04 06:10:36 AM UTC 24 | 58878825 ps | ||
| T3822 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_rw.900622155 | Sep 04 06:10:34 AM UTC 24 | Sep 04 06:10:36 AM UTC 24 | 89552388 ps | ||
| T291 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_intr_test.3629321295 | Sep 04 06:10:34 AM UTC 24 | Sep 04 06:10:36 AM UTC 24 | 56501793 ps | ||
| T3823 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_intr_test.697246446 | Sep 04 06:10:34 AM UTC 24 | Sep 04 06:10:36 AM UTC 24 | 51864069 ps | ||
| T3824 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_rw.1017637986 | Sep 04 06:10:34 AM UTC 24 | Sep 04 06:10:36 AM UTC 24 | 74557840 ps | ||
| T3825 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_same_csr_outstanding.1301006547 | Sep 04 06:10:34 AM UTC 24 | Sep 04 06:10:36 AM UTC 24 | 177139279 ps | ||
| T3826 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_intr_test.4214114673 | Sep 04 06:10:34 AM UTC 24 | Sep 04 06:10:36 AM UTC 24 | 35471082 ps | ||
| T3827 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_rw.1384134826 | Sep 04 06:10:34 AM UTC 24 | Sep 04 06:10:36 AM UTC 24 | 63589207 ps | ||
| T292 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_intr_test.1382554051 | Sep 04 06:10:35 AM UTC 24 | Sep 04 06:10:37 AM UTC 24 | 44881244 ps | ||
| T3828 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_mem_rw_with_rand_reset.2463188625 | Sep 04 06:10:34 AM UTC 24 | Sep 04 06:10:37 AM UTC 24 | 143808791 ps | ||
| T3829 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_errors.2765701381 | Sep 04 06:10:34 AM UTC 24 | Sep 04 06:10:37 AM UTC 24 | 60403864 ps | ||
| T3830 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_errors.3874718584 | Sep 04 06:10:34 AM UTC 24 | Sep 04 06:10:37 AM UTC 24 | 135157396 ps | ||
| T3831 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_rw.398533101 | Sep 04 06:10:34 AM UTC 24 | Sep 04 06:10:37 AM UTC 24 | 106760757 ps | ||
| T3832 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_same_csr_outstanding.373295751 | Sep 04 06:10:34 AM UTC 24 | Sep 04 06:10:37 AM UTC 24 | 178135512 ps | ||
| T3833 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_same_csr_outstanding.1927277180 | Sep 04 06:10:34 AM UTC 24 | Sep 04 06:10:37 AM UTC 24 | 68355282 ps | ||
| T3834 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_same_csr_outstanding.456745961 | Sep 04 06:10:34 AM UTC 24 | Sep 04 06:10:37 AM UTC 24 | 294377418 ps | ||
| T3835 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_rw.2920791268 | Sep 04 06:10:35 AM UTC 24 | Sep 04 06:10:37 AM UTC 24 | 76040729 ps | ||
| T3836 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_intr_test.162033635 | Sep 04 06:10:35 AM UTC 24 | Sep 04 06:10:37 AM UTC 24 | 49286386 ps | ||
| T3837 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_mem_rw_with_rand_reset.2797252130 | Sep 04 06:10:34 AM UTC 24 | Sep 04 06:10:37 AM UTC 24 | 63356025 ps | ||
| T3838 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_mem_rw_with_rand_reset.582362627 | Sep 04 06:10:34 AM UTC 24 | Sep 04 06:10:37 AM UTC 24 | 184373495 ps | ||
| T3839 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_mem_rw_with_rand_reset.1280625310 | Sep 04 06:10:34 AM UTC 24 | Sep 04 06:10:37 AM UTC 24 | 171132295 ps | ||
| T3840 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_same_csr_outstanding.566765418 | Sep 04 06:10:35 AM UTC 24 | Sep 04 06:10:37 AM UTC 24 | 67066322 ps | ||
| T447 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_intg_err.1071090841 | Sep 04 06:10:34 AM UTC 24 | Sep 04 06:10:37 AM UTC 24 | 306337396 ps | ||
| T3841 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/35.usbdev_intr_test.1151343584 | Sep 04 06:11:01 AM UTC 24 | Sep 04 06:11:03 AM UTC 24 | 36475938 ps | ||
| T3842 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_errors.317544923 | Sep 04 06:10:34 AM UTC 24 | Sep 04 06:10:37 AM UTC 24 | 121304243 ps | ||
| T3843 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_errors.1624773007 | Sep 04 06:10:34 AM UTC 24 | Sep 04 06:10:37 AM UTC 24 | 201415229 ps | ||
| T3844 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_mem_rw_with_rand_reset.1174651655 | Sep 04 06:10:35 AM UTC 24 | Sep 04 06:10:37 AM UTC 24 | 145013296 ps | ||
| T3845 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_mem_rw_with_rand_reset.3617794273 | Sep 04 06:10:34 AM UTC 24 | Sep 04 06:10:38 AM UTC 24 | 140783987 ps | ||
| T3846 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_rw.1943999154 | Sep 04 06:10:35 AM UTC 24 | Sep 04 06:10:38 AM UTC 24 | 39120393 ps | ||
| T3847 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_intg_err.1937178151 | Sep 04 06:10:34 AM UTC 24 | Sep 04 06:10:38 AM UTC 24 | 293091137 ps | ||
| T3848 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_errors.1661569631 | Sep 04 06:10:34 AM UTC 24 | Sep 04 06:10:38 AM UTC 24 | 258316169 ps | ||
| T3849 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_same_csr_outstanding.1837747653 | Sep 04 06:10:35 AM UTC 24 | Sep 04 06:10:38 AM UTC 24 | 212801058 ps | ||
| T3850 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_intg_err.1696414916 | Sep 04 06:10:35 AM UTC 24 | Sep 04 06:10:39 AM UTC 24 | 481772015 ps | ||
| T3851 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_intg_err.2510663932 | Sep 04 06:10:34 AM UTC 24 | Sep 04 06:10:39 AM UTC 24 | 745118496 ps | ||
| T3852 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_errors.816561452 | Sep 04 06:10:35 AM UTC 24 | Sep 04 06:10:40 AM UTC 24 | 380898217 ps | ||
| T451 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_intg_err.1337568954 | Sep 04 06:10:34 AM UTC 24 | Sep 04 06:10:40 AM UTC 24 | 875138792 ps | ||
| T446 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_intg_err.958308157 | Sep 04 06:10:34 AM UTC 24 | Sep 04 06:10:41 AM UTC 24 | 1977998860 ps | ||
| T3853 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_intr_test.421896886 | Sep 04 06:10:45 AM UTC 24 | Sep 04 06:10:47 AM UTC 24 | 31784718 ps | ||
| T3854 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_intr_test.2688009898 | Sep 04 06:10:45 AM UTC 24 | Sep 04 06:10:47 AM UTC 24 | 52405148 ps | ||
| T3855 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_rw.626087338 | Sep 04 06:10:45 AM UTC 24 | Sep 04 06:10:47 AM UTC 24 | 70153866 ps | ||
| T3856 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_rw.2593515860 | Sep 04 06:10:45 AM UTC 24 | Sep 04 06:10:48 AM UTC 24 | 64446746 ps | ||
| T3857 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_intr_test.2509255852 | Sep 04 06:10:46 AM UTC 24 | Sep 04 06:10:48 AM UTC 24 | 60221369 ps | ||
| T3858 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_mem_rw_with_rand_reset.3633760452 | Sep 04 06:10:45 AM UTC 24 | Sep 04 06:10:48 AM UTC 24 | 162667884 ps | ||
| T3859 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_rw.4151561336 | Sep 04 06:10:46 AM UTC 24 | Sep 04 06:10:48 AM UTC 24 | 87403113 ps | ||
| T3860 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_same_csr_outstanding.1580248446 | Sep 04 06:10:46 AM UTC 24 | Sep 04 06:10:48 AM UTC 24 | 62288133 ps | ||
| T3861 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_intr_test.1018545087 | Sep 04 06:10:46 AM UTC 24 | Sep 04 06:10:48 AM UTC 24 | 34017910 ps | ||
| T3862 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/24.usbdev_intr_test.3139488271 | Sep 04 06:10:46 AM UTC 24 | Sep 04 06:10:48 AM UTC 24 | 28983296 ps | ||
| T3863 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/25.usbdev_intr_test.4263901060 | Sep 04 06:10:46 AM UTC 24 | Sep 04 06:10:48 AM UTC 24 | 37279692 ps | ||
| T3864 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/28.usbdev_intr_test.4103818921 | Sep 04 06:10:46 AM UTC 24 | Sep 04 06:10:48 AM UTC 24 | 49183685 ps | ||
| T3865 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_mem_rw_with_rand_reset.2128358517 | Sep 04 06:10:46 AM UTC 24 | Sep 04 06:10:48 AM UTC 24 | 82158978 ps | ||
| T3866 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/23.usbdev_intr_test.882372999 | Sep 04 06:10:46 AM UTC 24 | Sep 04 06:10:48 AM UTC 24 | 56909711 ps | ||
| T3867 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/31.usbdev_intr_test.1126222682 | Sep 04 06:11:01 AM UTC 24 | Sep 04 06:11:03 AM UTC 24 | 112973898 ps | ||
| T3868 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_mem_rw_with_rand_reset.4263305247 | Sep 04 06:10:45 AM UTC 24 | Sep 04 06:10:48 AM UTC 24 | 66260404 ps | ||
| T3869 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_rw.3529152372 | Sep 04 06:10:46 AM UTC 24 | Sep 04 06:10:48 AM UTC 24 | 50510602 ps | ||
| T3870 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/22.usbdev_intr_test.2909713355 | Sep 04 06:10:46 AM UTC 24 | Sep 04 06:10:48 AM UTC 24 | 85734861 ps | ||
| T3871 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/20.usbdev_intr_test.531278144 | Sep 04 06:10:46 AM UTC 24 | Sep 04 06:10:48 AM UTC 24 | 36546789 ps | ||
| T3872 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_same_csr_outstanding.2920446679 | Sep 04 06:10:45 AM UTC 24 | Sep 04 06:10:48 AM UTC 24 | 156371137 ps | ||
| T3873 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/26.usbdev_intr_test.2179898485 | Sep 04 06:10:46 AM UTC 24 | Sep 04 06:10:48 AM UTC 24 | 51952403 ps | ||
| T3874 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/30.usbdev_intr_test.496431865 | Sep 04 06:10:46 AM UTC 24 | Sep 04 06:10:48 AM UTC 24 | 54147963 ps | ||
| T3875 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/21.usbdev_intr_test.92557147 | Sep 04 06:10:46 AM UTC 24 | Sep 04 06:10:48 AM UTC 24 | 42428950 ps | ||
| T3876 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_same_csr_outstanding.4040732491 | Sep 04 06:10:46 AM UTC 24 | Sep 04 06:10:48 AM UTC 24 | 158336070 ps | ||
| T3877 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/27.usbdev_intr_test.763228697 | Sep 04 06:10:46 AM UTC 24 | Sep 04 06:10:48 AM UTC 24 | 65157529 ps | ||
| T3878 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/29.usbdev_intr_test.3789263910 | Sep 04 06:10:46 AM UTC 24 | Sep 04 06:10:48 AM UTC 24 | 49042797 ps | ||
| T3879 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_mem_rw_with_rand_reset.3252351325 | Sep 04 06:10:46 AM UTC 24 | Sep 04 06:10:48 AM UTC 24 | 124183414 ps | ||
| T3880 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_mem_rw_with_rand_reset.4093845077 | Sep 04 06:10:46 AM UTC 24 | Sep 04 06:10:49 AM UTC 24 | 139642664 ps | ||
| T3881 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_same_csr_outstanding.175324155 | Sep 04 06:10:46 AM UTC 24 | Sep 04 06:10:49 AM UTC 24 | 145255382 ps | ||
| T3882 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_errors.2228402845 | Sep 04 06:10:46 AM UTC 24 | Sep 04 06:10:49 AM UTC 24 | 136198184 ps | ||
| T3883 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_errors.3045959095 | Sep 04 06:10:45 AM UTC 24 | Sep 04 06:10:49 AM UTC 24 | 239614974 ps | ||
| T3884 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_errors.3737239584 | Sep 04 06:10:46 AM UTC 24 | Sep 04 06:10:50 AM UTC 24 | 162919807 ps | ||
| T3885 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_errors.219800444 | Sep 04 06:10:45 AM UTC 24 | Sep 04 06:10:50 AM UTC 24 | 292618579 ps | ||
| T452 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_intg_err.2572023627 | Sep 04 06:10:45 AM UTC 24 | Sep 04 06:10:51 AM UTC 24 | 1500879032 ps | ||
| T453 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_intg_err.2407239145 | Sep 04 06:10:45 AM UTC 24 | Sep 04 06:10:52 AM UTC 24 | 1362070971 ps | ||
| T448 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_intg_err.705946414 | Sep 04 06:10:46 AM UTC 24 | Sep 04 06:10:52 AM UTC 24 | 1022631534 ps | ||
| T3886 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_intg_err.2931283943 | Sep 04 06:10:46 AM UTC 24 | Sep 04 06:10:52 AM UTC 24 | 1554395171 ps | ||
| T3887 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/32.usbdev_intr_test.2705292049 | Sep 04 06:11:01 AM UTC 24 | Sep 04 06:11:03 AM UTC 24 | 31446117 ps | ||
| T3888 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/34.usbdev_intr_test.946475667 | Sep 04 06:11:01 AM UTC 24 | Sep 04 06:11:03 AM UTC 24 | 94282623 ps | ||
| T3889 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/33.usbdev_intr_test.1513075636 | Sep 04 06:11:01 AM UTC 24 | Sep 04 06:11:03 AM UTC 24 | 47542476 ps | ||
| T3890 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/37.usbdev_intr_test.1577378327 | Sep 04 06:11:02 AM UTC 24 | Sep 04 06:11:03 AM UTC 24 | 48029207 ps | ||
| T3891 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/36.usbdev_intr_test.744977882 | Sep 04 06:11:01 AM UTC 24 | Sep 04 06:11:03 AM UTC 24 | 64840559 ps | ||
| T3892 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/38.usbdev_intr_test.1312379424 | Sep 04 06:11:02 AM UTC 24 | Sep 04 06:11:03 AM UTC 24 | 73326346 ps | ||
| T3893 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/40.usbdev_intr_test.3287207840 | Sep 04 06:11:02 AM UTC 24 | Sep 04 06:11:03 AM UTC 24 | 45443780 ps | ||
| T3894 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/39.usbdev_intr_test.1092891551 | Sep 04 06:11:02 AM UTC 24 | Sep 04 06:11:03 AM UTC 24 | 36133627 ps | ||
| T3895 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/41.usbdev_intr_test.3063432651 | Sep 04 06:11:02 AM UTC 24 | Sep 04 06:11:10 AM UTC 24 | 50125873 ps | ||
| T3896 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/43.usbdev_intr_test.3215352131 | Sep 04 06:11:02 AM UTC 24 | Sep 04 06:11:11 AM UTC 24 | 37206438 ps | ||
| T3897 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/42.usbdev_intr_test.1777315724 | Sep 04 06:11:02 AM UTC 24 | Sep 04 06:11:11 AM UTC 24 | 97771558 ps | ||
| T3898 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/45.usbdev_intr_test.3372387120 | Sep 04 06:11:02 AM UTC 24 | Sep 04 06:11:11 AM UTC 24 | 60907757 ps | ||
| T3899 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/49.usbdev_intr_test.2892023596 | Sep 04 06:11:02 AM UTC 24 | Sep 04 06:11:11 AM UTC 24 | 34460982 ps | ||
| T3900 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/44.usbdev_intr_test.1838027180 | Sep 04 06:11:02 AM UTC 24 | Sep 04 06:11:11 AM UTC 24 | 51106253 ps | ||
| T3901 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/47.usbdev_intr_test.3484907204 | Sep 04 06:11:02 AM UTC 24 | Sep 04 06:11:11 AM UTC 24 | 83201932 ps | ||
| T3902 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/48.usbdev_intr_test.1781935976 | Sep 04 06:11:02 AM UTC 24 | Sep 04 06:11:11 AM UTC 24 | 36956374 ps | ||
| T3903 | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/46.usbdev_intr_test.248257922 | Sep 04 06:11:02 AM UTC 24 | Sep 04 06:11:11 AM UTC 24 | 82023486 ps |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_restore.327622891 |
| Short name | T19 |
| Test name | |
| Test status | |
| Simulation time | 552129335 ps |
| CPU time | 3.01 seconds |
| Started | Sep 04 05:39:09 AM UTC 24 |
| Finished | Sep 04 05:39:13 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=327622891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_data_toggle_restore.327622891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_device_address.518560626 |
| Short name | T65 |
| Test name | |
| Test status | |
| Simulation time | 37683713981 ps |
| CPU time | 86.01 seconds |
| Started | Sep 04 05:39:10 AM UTC 24 |
| Finished | Sep 04 05:40:38 AM UTC 24 |
| Peak memory | 217392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=518560626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 0.usbdev_device_address.518560626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_disconnect.2093319728 |
| Short name | T1 |
| Test name | |
| Test status | |
| Simulation time | 6431563216 ps |
| CPU time | 8.3 seconds |
| Started | Sep 04 05:38:59 AM UTC 24 |
| Finished | Sep 04 05:39:08 AM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2093319728 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_disconnect.2093319728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_low_speed_traffic.3915830965 |
| Short name | T4 |
| Test name | |
| Test status | |
| Simulation time | 2624891036 ps |
| CPU time | 18.85 seconds |
| Started | Sep 04 05:39:46 AM UTC 24 |
| Finished | Sep 04 05:40:06 AM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3915830965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_low_speed_traffic.3915830965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_intr_test.830931159 |
| Short name | T217 |
| Test name | |
| Test status | |
| Simulation time | 38120273 ps |
| CPU time | 0.62 seconds |
| Started | Sep 04 06:10:19 AM UTC 24 |
| Finished | Sep 04 06:10:20 AM UTC 24 |
| Peak memory | 216620 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=830931159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 0.usbdev_intr_test.830931159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_link_resume.807956208 |
| Short name | T66 |
| Test name | |
| Test status | |
| Simulation time | 14829715553 ps |
| CPU time | 48.83 seconds |
| Started | Sep 04 05:39:44 AM UTC 24 |
| Finished | Sep 04 05:40:34 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=807956208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_link_resume.807956208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_intg_err.814713895 |
| Short name | T235 |
| Test name | |
| Test status | |
| Simulation time | 888988316 ps |
| CPU time | 4.5 seconds |
| Started | Sep 04 06:10:19 AM UTC 24 |
| Finished | Sep 04 06:10:24 AM UTC 24 |
| Peak memory | 217484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=814713895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_tl_intg_err.814713895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_reset.2848819067 |
| Short name | T213 |
| Test name | |
| Test status | |
| Simulation time | 20794994142 ps |
| CPU time | 34.88 seconds |
| Started | Sep 04 05:43:39 AM UTC 24 |
| Finished | Sep 04 05:44:15 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2848819067 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_reset.2848819067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_osc_test_mode.2406676399 |
| Short name | T193 |
| Test name | |
| Test status | |
| Simulation time | 318674494 ps |
| CPU time | 1.85 seconds |
| Started | Sep 04 05:40:19 AM UTC 24 |
| Finished | Sep 04 05:40:22 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2406676399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_tx_osc_test _mode_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_tx_osc_test_mode.2406676399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_phy_config_tx_osc_test_mode/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_stress_usb_traffic.3626841394 |
| Short name | T76 |
| Test name | |
| Test status | |
| Simulation time | 8002680436 ps |
| CPU time | 95.01 seconds |
| Started | Sep 04 05:40:37 AM UTC 24 |
| Finished | Sep 04 05:42:14 AM UTC 24 |
| Peak memory | 229748 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3626841394 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_ 03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stress_usb_traffic.3626841394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_sec_cm.765143547 |
| Short name | T207 |
| Test name | |
| Test status | |
| Simulation time | 1172933561 ps |
| CPU time | 4.28 seconds |
| Started | Sep 04 05:40:40 AM UTC 24 |
| Finished | Sep 04 05:40:45 AM UTC 24 |
| Peak memory | 251336 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=765143547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 0.usbdev_sec_cm.765143547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_link_resume.3895004859 |
| Short name | T738 |
| Test name | |
| Test status | |
| Simulation time | 7897079239 ps |
| CPU time | 28.05 seconds |
| Started | Sep 04 05:45:17 AM UTC 24 |
| Finished | Sep 04 05:45:46 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3895004859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_link_resume.3895004859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_intr_test.947473502 |
| Short name | T286 |
| Test name | |
| Test status | |
| Simulation time | 43541563 ps |
| CPU time | 0.68 seconds |
| Started | Sep 04 06:10:25 AM UTC 24 |
| Finished | Sep 04 06:10:28 AM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=947473502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 5.usbdev_intr_test.947473502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/183.usbdev_tx_rx_disruption.59244994 |
| Short name | T3447 |
| Test name | |
| Test status | |
| Simulation time | 578236091 ps |
| CPU time | 1.63 seconds |
| Started | Sep 04 06:08:36 AM UTC 24 |
| Finished | Sep 04 06:08:39 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=59244994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 183.usbdev_tx _rx_disruption.59244994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/183.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_errors.1718220096 |
| Short name | T211 |
| Test name | |
| Test status | |
| Simulation time | 321785219 ps |
| CPU time | 3.01 seconds |
| Started | Sep 04 06:10:19 AM UTC 24 |
| Finished | Sep 04 06:10:23 AM UTC 24 |
| Peak memory | 234596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1718220096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_tl_errors.1718220096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_phy_pins_sense.2075742575 |
| Short name | T24 |
| Test name | |
| Test status | |
| Simulation time | 51480246 ps |
| CPU time | 1.11 seconds |
| Started | Sep 04 05:41:41 AM UTC 24 |
| Finished | Sep 04 05:41:43 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2075742575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_pins_sense.2075742575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_disconnected.4141342584 |
| Short name | T21 |
| Test name | |
| Test status | |
| Simulation time | 146874191 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 05:39:14 AM UTC 24 |
| Finished | Sep 04 05:39:16 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4141342584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_disconnected.4141342584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_buffer.73315766 |
| Short name | T101 |
| Test name | |
| Test status | |
| Simulation time | 11515541093 ps |
| CPU time | 37.35 seconds |
| Started | Sep 04 05:40:21 AM UTC 24 |
| Finished | Sep 04 05:40:59 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=73315766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_pkt_buffer.73315766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_rw.2608097002 |
| Short name | T261 |
| Test name | |
| Test status | |
| Simulation time | 50142723 ps |
| CPU time | 0.82 seconds |
| Started | Sep 04 06:10:27 AM UTC 24 |
| Finished | Sep 04 06:10:29 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2608097002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_csr_rw.2608097002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_fifo_rst.742099203 |
| Short name | T28 |
| Test name | |
| Test status | |
| Simulation time | 493636795 ps |
| CPU time | 4.25 seconds |
| Started | Sep 04 05:39:20 AM UTC 24 |
| Finished | Sep 04 05:39:25 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=742099203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_fifo_rst.742099203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_device_address.1548895260 |
| Short name | T356 |
| Test name | |
| Test status | |
| Simulation time | 14309171566 ps |
| CPU time | 34.29 seconds |
| Started | Sep 04 05:46:12 AM UTC 24 |
| Finished | Sep 04 05:46:48 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1548895260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_device_address.1548895260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/428.usbdev_tx_rx_disruption.2648384211 |
| Short name | T194 |
| Test name | |
| Test status | |
| Simulation time | 494604742 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 06:10:06 AM UTC 24 |
| Finished | Sep 04 06:10:08 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2648384211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 428.usbdev_ tx_rx_disruption.2648384211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/428.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_rx_full.1336903794 |
| Short name | T50 |
| Test name | |
| Test status | |
| Simulation time | 256153848 ps |
| CPU time | 1.22 seconds |
| Started | Sep 04 05:40:27 AM UTC 24 |
| Finished | Sep 04 05:40:30 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1336903794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_rx_full.1336903794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_endpoint_types.445698374 |
| Short name | T331 |
| Test name | |
| Test status | |
| Simulation time | 798962455 ps |
| CPU time | 3.03 seconds |
| Started | Sep 04 06:06:52 AM UTC 24 |
| Finished | Sep 04 06:06:56 AM UTC 24 |
| Peak memory | 217036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=445698374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 48.usbdev_endpoint_types.445698374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/107.usbdev_endpoint_types.1029256979 |
| Short name | T354 |
| Test name | |
| Test status | |
| Simulation time | 575221172 ps |
| CPU time | 1.82 seconds |
| Started | Sep 04 06:08:08 AM UTC 24 |
| Finished | Sep 04 06:08:11 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1029256979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 107.usbdev_endpoint_types.1029256979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/107.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/54.usbdev_endpoint_types.2225424559 |
| Short name | T297 |
| Test name | |
| Test status | |
| Simulation time | 752340914 ps |
| CPU time | 2.04 seconds |
| Started | Sep 04 06:07:34 AM UTC 24 |
| Finished | Sep 04 06:07:37 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2225424559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 54.usbdev_endpoint_types.2225424559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/54.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_tx_rx_disruption.1251382347 |
| Short name | T115 |
| Test name | |
| Test status | |
| Simulation time | 663237059 ps |
| CPU time | 2.6 seconds |
| Started | Sep 04 05:40:38 AM UTC 24 |
| Finished | Sep 04 05:40:41 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1251382347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_tx _rx_disruption.1251382347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/117.usbdev_endpoint_types.867245827 |
| Short name | T299 |
| Test name | |
| Test status | |
| Simulation time | 639517216 ps |
| CPU time | 2.33 seconds |
| Started | Sep 04 06:08:13 AM UTC 24 |
| Finished | Sep 04 06:08:16 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=867245827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 117.usbdev_endpoint_types.867245827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/117.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_device_address.3174947065 |
| Short name | T293 |
| Test name | |
| Test status | |
| Simulation time | 46373208740 ps |
| CPU time | 99.73 seconds |
| Started | Sep 04 05:44:58 AM UTC 24 |
| Finished | Sep 04 05:46:40 AM UTC 24 |
| Peak memory | 217332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3174947065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_device_address.3174947065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_bitstuff_err.167995580 |
| Short name | T17 |
| Test name | |
| Test status | |
| Simulation time | 158987064 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 05:39:08 AM UTC 24 |
| Finished | Sep 04 05:39:11 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=167995580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_bitstuff_err.167995580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_rx_crc_err.3252460074 |
| Short name | T71 |
| Test name | |
| Test status | |
| Simulation time | 179303984 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 05:40:26 AM UTC 24 |
| Finished | Sep 04 05:40:29 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3252460074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_rx_crc_err.3252460074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/128.usbdev_endpoint_types.3798934571 |
| Short name | T378 |
| Test name | |
| Test status | |
| Simulation time | 500483173 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 06:08:18 AM UTC 24 |
| Finished | Sep 04 06:08:20 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3798934571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 128.usbdev_endpoint_types.3798934571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/128.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_data_toggle_restore.3173619579 |
| Short name | T1693 |
| Test name | |
| Test status | |
| Simulation time | 1090089938 ps |
| CPU time | 5.62 seconds |
| Started | Sep 04 05:56:06 AM UTC 24 |
| Finished | Sep 04 05:56:13 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3173619579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_data_toggle_restore.3173619579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_endpoint_types.2868187108 |
| Short name | T325 |
| Test name | |
| Test status | |
| Simulation time | 684619197 ps |
| CPU time | 2.75 seconds |
| Started | Sep 04 05:57:35 AM UTC 24 |
| Finished | Sep 04 05:57:39 AM UTC 24 |
| Peak memory | 216432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2868187108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_endpoint_types.2868187108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_endpoint_types.2420555915 |
| Short name | T321 |
| Test name | |
| Test status | |
| Simulation time | 514006577 ps |
| CPU time | 2.48 seconds |
| Started | Sep 04 05:47:07 AM UTC 24 |
| Finished | Sep 04 05:47:11 AM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2420555915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_endpoint_types.2420555915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/112.usbdev_endpoint_types.3731895708 |
| Short name | T337 |
| Test name | |
| Test status | |
| Simulation time | 562506591 ps |
| CPU time | 1.67 seconds |
| Started | Sep 04 06:08:12 AM UTC 24 |
| Finished | Sep 04 06:08:15 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3731895708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 112.usbdev_endpoint_types.3731895708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/112.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_endpoint_types.1700601353 |
| Short name | T302 |
| Test name | |
| Test status | |
| Simulation time | 580082555 ps |
| CPU time | 2.76 seconds |
| Started | Sep 04 06:03:42 AM UTC 24 |
| Finished | Sep 04 06:03:46 AM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1700601353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_endpoint_types.1700601353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_intr_test.2664371057 |
| Short name | T221 |
| Test name | |
| Test status | |
| Simulation time | 52995904 ps |
| CPU time | 0.95 seconds |
| Started | Sep 04 06:10:21 AM UTC 24 |
| Finished | Sep 04 06:10:23 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2664371057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_intr_test.2664371057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/151.usbdev_endpoint_types.745393150 |
| Short name | T396 |
| Test name | |
| Test status | |
| Simulation time | 913614553 ps |
| CPU time | 2.16 seconds |
| Started | Sep 04 06:08:27 AM UTC 24 |
| Finished | Sep 04 06:08:30 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=745393150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 151.usbdev_endpoint_types.745393150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/151.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_endpoint_types.1552807921 |
| Short name | T339 |
| Test name | |
| Test status | |
| Simulation time | 802357994 ps |
| CPU time | 3.05 seconds |
| Started | Sep 04 05:54:40 AM UTC 24 |
| Finished | Sep 04 05:54:44 AM UTC 24 |
| Peak memory | 217040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1552807921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_endpoint_types.1552807921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_endpoint_types.2804980291 |
| Short name | T357 |
| Test name | |
| Test status | |
| Simulation time | 651242057 ps |
| CPU time | 2.43 seconds |
| Started | Sep 04 06:06:24 AM UTC 24 |
| Finished | Sep 04 06:06:27 AM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2804980291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_endpoint_types.2804980291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority.2241090028 |
| Short name | T51 |
| Test name | |
| Test status | |
| Simulation time | 447190174 ps |
| CPU time | 2.53 seconds |
| Started | Sep 04 05:40:30 AM UTC 24 |
| Finished | Sep 04 05:40:33 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2241090028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_setup_priority.2241090028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_received.1628211920 |
| Short name | T442 |
| Test name | |
| Test status | |
| Simulation time | 166637841 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 05:41:42 AM UTC 24 |
| Finished | Sep 04 05:41:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1628211920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_pkt_received.1628211920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_device_address.686720047 |
| Short name | T463 |
| Test name | |
| Test status | |
| Simulation time | 50134382346 ps |
| CPU time | 144.38 seconds |
| Started | Sep 04 05:49:05 AM UTC 24 |
| Finished | Sep 04 05:51:32 AM UTC 24 |
| Peak memory | 217428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=686720047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 9.usbdev_device_address.686720047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/58.usbdev_endpoint_types.2073583559 |
| Short name | T308 |
| Test name | |
| Test status | |
| Simulation time | 418253031 ps |
| CPU time | 1.73 seconds |
| Started | Sep 04 06:07:39 AM UTC 24 |
| Finished | Sep 04 06:07:42 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2073583559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 58.usbdev_endpoint_types.2073583559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/58.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/82.usbdev_endpoint_types.829156249 |
| Short name | T340 |
| Test name | |
| Test status | |
| Simulation time | 560552981 ps |
| CPU time | 1.91 seconds |
| Started | Sep 04 06:07:55 AM UTC 24 |
| Finished | Sep 04 06:07:58 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=829156249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 82.usbdev_endpoint_types.829156249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/82.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_nak_trans.3776373752 |
| Short name | T70 |
| Test name | |
| Test status | |
| Simulation time | 220277611 ps |
| CPU time | 1.63 seconds |
| Started | Sep 04 05:40:13 AM UTC 24 |
| Finished | Sep 04 05:40:15 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3776373752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_nak_trans.3776373752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_fifo_levels.2344229212 |
| Short name | T554 |
| Test name | |
| Test status | |
| Simulation time | 264605508 ps |
| CPU time | 1.83 seconds |
| Started | Sep 04 05:51:09 AM UTC 24 |
| Finished | Sep 04 05:51:12 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2344229212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_fifo_levels.2344229212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_alert_test.1445513001 |
| Short name | T201 |
| Test name | |
| Test status | |
| Simulation time | 55844009 ps |
| CPU time | 0.88 seconds |
| Started | Sep 04 05:40:40 AM UTC 24 |
| Finished | Sep 04 05:40:42 AM UTC 24 |
| Peak memory | 214832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1445513001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 0.usbdev_alert_test.1445513001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_rw.4015530433 |
| Short name | T230 |
| Test name | |
| Test status | |
| Simulation time | 75059033 ps |
| CPU time | 0.74 seconds |
| Started | Sep 04 06:10:19 AM UTC 24 |
| Finished | Sep 04 06:10:21 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4015530433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_rw.4015530433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_rand_bus_disconnects.2285921378 |
| Short name | T164 |
| Test name | |
| Test status | |
| Simulation time | 4016310298 ps |
| CPU time | 123.82 seconds |
| Started | Sep 04 05:40:24 AM UTC 24 |
| Finished | Sep 04 05:42:30 AM UTC 24 |
| Peak memory | 229580 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2285921378 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_bus_disconnects.2285921378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_intr_test.3629321295 |
| Short name | T291 |
| Test name | |
| Test status | |
| Simulation time | 56501793 ps |
| CPU time | 0.68 seconds |
| Started | Sep 04 06:10:34 AM UTC 24 |
| Finished | Sep 04 06:10:36 AM UTC 24 |
| Peak memory | 216648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3629321295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_intr_test.3629321295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_intg_err.958308157 |
| Short name | T446 |
| Test name | |
| Test status | |
| Simulation time | 1977998860 ps |
| CPU time | 4.88 seconds |
| Started | Sep 04 06:10:34 AM UTC 24 |
| Finished | Sep 04 06:10:41 AM UTC 24 |
| Peak memory | 217604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=958308157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_tl_intg_err.958308157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/111.usbdev_endpoint_types.3997717263 |
| Short name | T408 |
| Test name | |
| Test status | |
| Simulation time | 566560711 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 06:08:10 AM UTC 24 |
| Finished | Sep 04 06:08:12 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3997717263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 111.usbdev_endpoint_types.3997717263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/111.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/129.usbdev_endpoint_types.628450544 |
| Short name | T352 |
| Test name | |
| Test status | |
| Simulation time | 659095095 ps |
| CPU time | 1.61 seconds |
| Started | Sep 04 06:08:18 AM UTC 24 |
| Finished | Sep 04 06:08:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=628450544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 129.usbdev_endpoint_types.628450544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/129.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/155.usbdev_endpoint_types.2270101056 |
| Short name | T3413 |
| Test name | |
| Test status | |
| Simulation time | 469071849 ps |
| CPU time | 1.28 seconds |
| Started | Sep 04 06:08:29 AM UTC 24 |
| Finished | Sep 04 06:08:32 AM UTC 24 |
| Peak memory | 214856 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2270101056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 155.usbdev_endpoint_types.2270101056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/155.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_endpoint_types.330222191 |
| Short name | T303 |
| Test name | |
| Test status | |
| Simulation time | 661606948 ps |
| CPU time | 2.68 seconds |
| Started | Sep 04 06:00:24 AM UTC 24 |
| Finished | Sep 04 06:00:28 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=330222191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 32.usbdev_endpoint_types.330222191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_low_speed_traffic.609962161 |
| Short name | T461 |
| Test name | |
| Test status | |
| Simulation time | 3787370385 ps |
| CPU time | 40.13 seconds |
| Started | Sep 04 06:03:47 AM UTC 24 |
| Finished | Sep 04 06:04:29 AM UTC 24 |
| Peak memory | 229788 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=609962161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_low_speed_traffic.609962161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_endpoint_types.3011418134 |
| Short name | T319 |
| Test name | |
| Test status | |
| Simulation time | 458281354 ps |
| CPU time | 2.51 seconds |
| Started | Sep 04 06:04:03 AM UTC 24 |
| Finished | Sep 04 06:04:07 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3011418134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_endpoint_types.3011418134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/72.usbdev_endpoint_types.1041857506 |
| Short name | T412 |
| Test name | |
| Test status | |
| Simulation time | 377549443 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 06:07:48 AM UTC 24 |
| Finished | Sep 04 06:07:51 AM UTC 24 |
| Peak memory | 215012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1041857506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 72.usbdev_endpoint_types.1041857506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/72.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_spurious_pids_ignored.3269692137 |
| Short name | T157 |
| Test name | |
| Test status | |
| Simulation time | 1764854144 ps |
| CPU time | 55.52 seconds |
| Started | Sep 04 05:40:34 AM UTC 24 |
| Finished | Sep 04 05:41:31 AM UTC 24 |
| Peak memory | 227296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3269692137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_spurious_pids_ignored.3269692137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_fifo_levels.3365063964 |
| Short name | T548 |
| Test name | |
| Test status | |
| Simulation time | 175911266 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 05:57:35 AM UTC 24 |
| Finished | Sep 04 05:57:38 AM UTC 24 |
| Peak memory | 215888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3365063964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_fifo_levels.3365063964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_dpi_config_host.3323055587 |
| Short name | T85 |
| Test name | |
| Test status | |
| Simulation time | 5112569360 ps |
| CPU time | 53.76 seconds |
| Started | Sep 04 05:39:14 AM UTC 24 |
| Finished | Sep 04 05:40:09 AM UTC 24 |
| Peak memory | 227552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3323055587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_dpi_config_host_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_dpi_config_host.3323055587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_dpi_config_host/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_tx_rx_disruption.1989566654 |
| Short name | T214 |
| Test name | |
| Test status | |
| Simulation time | 512145956 ps |
| CPU time | 2.67 seconds |
| Started | Sep 04 05:47:41 AM UTC 24 |
| Finished | Sep 04 05:47:45 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1989566654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_tx _rx_disruption.1989566654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_errors.3051185481 |
| Short name | T228 |
| Test name | |
| Test status | |
| Simulation time | 338726128 ps |
| CPU time | 2.79 seconds |
| Started | Sep 04 06:10:19 AM UTC 24 |
| Finished | Sep 04 06:10:23 AM UTC 24 |
| Peak memory | 234540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3051185481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_tl_errors.3051185481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_av_overflow.3981424034 |
| Short name | T16 |
| Test name | |
| Test status | |
| Simulation time | 147970506 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 05:39:08 AM UTC 24 |
| Finished | Sep 04 05:39:11 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3981424034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_av_overflow.3981424034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_intg_err.1071090841 |
| Short name | T447 |
| Test name | |
| Test status | |
| Simulation time | 306337396 ps |
| CPU time | 2.07 seconds |
| Started | Sep 04 06:10:34 AM UTC 24 |
| Finished | Sep 04 06:10:37 AM UTC 24 |
| Peak memory | 217492 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1071090841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_tl_intg_err.1071090841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_intg_err.3621943867 |
| Short name | T449 |
| Test name | |
| Test status | |
| Simulation time | 548379184 ps |
| CPU time | 2.62 seconds |
| Started | Sep 04 06:10:27 AM UTC 24 |
| Finished | Sep 04 06:10:31 AM UTC 24 |
| Peak memory | 217420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3621943867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_tl_intg_err.3621943867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_data_toggle_restore.247699935 |
| Short name | T482 |
| Test name | |
| Test status | |
| Simulation time | 1375054948 ps |
| CPU time | 6.5 seconds |
| Started | Sep 04 05:51:05 AM UTC 24 |
| Finished | Sep 04 05:51:12 AM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=247699935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_data_toggle_restore.247699935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/168.usbdev_endpoint_types.173641257 |
| Short name | T387 |
| Test name | |
| Test status | |
| Simulation time | 337098263 ps |
| CPU time | 1.06 seconds |
| Started | Sep 04 06:08:32 AM UTC 24 |
| Finished | Sep 04 06:08:34 AM UTC 24 |
| Peak memory | 215016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=173641257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 168.usbdev_endpoint_types.173641257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/168.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_endpoint_types.3272651680 |
| Short name | T327 |
| Test name | |
| Test status | |
| Simulation time | 757558574 ps |
| CPU time | 2.96 seconds |
| Started | Sep 04 05:53:41 AM UTC 24 |
| Finished | Sep 04 05:53:45 AM UTC 24 |
| Peak memory | 217040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3272651680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_endpoint_types.3272651680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/173.usbdev_endpoint_types.1946302306 |
| Short name | T318 |
| Test name | |
| Test status | |
| Simulation time | 419149456 ps |
| CPU time | 1.33 seconds |
| Started | Sep 04 06:08:34 AM UTC 24 |
| Finished | Sep 04 06:08:53 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1946302306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 173.usbdev_endpoint_types.1946302306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/173.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_device_address.836885730 |
| Short name | T1653 |
| Test name | |
| Test status | |
| Simulation time | 46981802362 ps |
| CPU time | 102.06 seconds |
| Started | Sep 04 05:54:11 AM UTC 24 |
| Finished | Sep 04 05:55:55 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=836885730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 18.usbdev_device_address.836885730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/196.usbdev_endpoint_types.3835451924 |
| Short name | T360 |
| Test name | |
| Test status | |
| Simulation time | 851234568 ps |
| CPU time | 1.88 seconds |
| Started | Sep 04 06:08:50 AM UTC 24 |
| Finished | Sep 04 06:09:04 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3835451924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 196.usbdev_endpoint_types.3835451924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/196.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_endpoint_types.792490389 |
| Short name | T343 |
| Test name | |
| Test status | |
| Simulation time | 401290157 ps |
| CPU time | 2.19 seconds |
| Started | Sep 04 05:56:09 AM UTC 24 |
| Finished | Sep 04 05:56:13 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=792490389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 22.usbdev_endpoint_types.792490389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_data_toggle_restore.2229128026 |
| Short name | T2237 |
| Test name | |
| Test status | |
| Simulation time | 1280761938 ps |
| CPU time | 5.91 seconds |
| Started | Sep 04 06:00:20 AM UTC 24 |
| Finished | Sep 04 06:00:27 AM UTC 24 |
| Peak memory | 217388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2229128026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_data_toggle_restore.2229128026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_rx_full.1351015824 |
| Short name | T527 |
| Test name | |
| Test status | |
| Simulation time | 252124624 ps |
| CPU time | 1.85 seconds |
| Started | Sep 04 06:00:39 AM UTC 24 |
| Finished | Sep 04 06:00:42 AM UTC 24 |
| Peak memory | 214932 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1351015824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 32.usbdev_rx_full.1351015824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_endpoint_types.1927692370 |
| Short name | T358 |
| Test name | |
| Test status | |
| Simulation time | 451918652 ps |
| CPU time | 2.52 seconds |
| Started | Sep 04 06:02:41 AM UTC 24 |
| Finished | Sep 04 06:02:44 AM UTC 24 |
| Peak memory | 217040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1927692370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_endpoint_types.1927692370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_endpoint_types.3702577505 |
| Short name | T335 |
| Test name | |
| Test status | |
| Simulation time | 610919280 ps |
| CPU time | 2.23 seconds |
| Started | Sep 04 06:03:20 AM UTC 24 |
| Finished | Sep 04 06:03:24 AM UTC 24 |
| Peak memory | 217040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3702577505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_endpoint_types.3702577505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_endpoint_types.3057770151 |
| Short name | T346 |
| Test name | |
| Test status | |
| Simulation time | 491329865 ps |
| CPU time | 2.75 seconds |
| Started | Sep 04 05:46:19 AM UTC 24 |
| Finished | Sep 04 05:46:23 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3057770151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_endpoint_types.3057770151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_endpoint_types.1939386493 |
| Short name | T362 |
| Test name | |
| Test status | |
| Simulation time | 702566481 ps |
| CPU time | 2.35 seconds |
| Started | Sep 04 05:49:09 AM UTC 24 |
| Finished | Sep 04 05:49:13 AM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1939386493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_endpoint_types.1939386493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_host_lost.2397216800 |
| Short name | T43 |
| Test name | |
| Test status | |
| Simulation time | 4172299438 ps |
| CPU time | 10 seconds |
| Started | Sep 04 05:39:24 AM UTC 24 |
| Finished | Sep 04 05:39:35 AM UTC 24 |
| Peak memory | 217316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2397216800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_host_lost_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_host_lost.2397216800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_host_lost/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_nak_trans.4284707400 |
| Short name | T142 |
| Test name | |
| Test status | |
| Simulation time | 187136252 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 06:02:19 AM UTC 24 |
| Finished | Sep 04 06:02:21 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4284707400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_nak_trans.4284707400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_rand_bus_disconnects.1716382597 |
| Short name | T158 |
| Test name | |
| Test status | |
| Simulation time | 10609962367 ps |
| CPU time | 57.33 seconds |
| Started | Sep 04 05:41:45 AM UTC 24 |
| Finished | Sep 04 05:42:43 AM UTC 24 |
| Peak memory | 234216 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1716382597 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_bus_disconnects.1716382597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_intg_err.1316166731 |
| Short name | T445 |
| Test name | |
| Test status | |
| Simulation time | 831372723 ps |
| CPU time | 4.15 seconds |
| Started | Sep 04 06:10:23 AM UTC 24 |
| Finished | Sep 04 06:10:28 AM UTC 24 |
| Peak memory | 217280 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1316166731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_tl_intg_err.1316166731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_fifo_levels.3424476115 |
| Short name | T60 |
| Test name | |
| Test status | |
| Simulation time | 182725034 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 05:39:18 AM UTC 24 |
| Finished | Sep 04 05:39:21 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3424476115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_fifo_levels.3424476115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_freq_hiclk.3427332074 |
| Short name | T586 |
| Test name | |
| Test status | |
| Simulation time | 99252838551 ps |
| CPU time | 212.71 seconds |
| Started | Sep 04 05:39:21 AM UTC 24 |
| Finished | Sep 04 05:42:58 AM UTC 24 |
| Peak memory | 217352 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3427332074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_hiclk.3427332074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_out_stall.643364095 |
| Short name | T156 |
| Test name | |
| Test status | |
| Simulation time | 189923542 ps |
| CPU time | 1.14 seconds |
| Started | Sep 04 05:40:15 AM UTC 24 |
| Finished | Sep 04 05:40:17 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=643364095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_out_stall.643364095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_stall_priority_over_nak.1393741539 |
| Short name | T182 |
| Test name | |
| Test status | |
| Simulation time | 147369148 ps |
| CPU time | 1.18 seconds |
| Started | Sep 04 05:40:34 AM UTC 24 |
| Finished | Sep 04 05:40:36 AM UTC 24 |
| Peak memory | 214752 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1393741539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stall_priority_over_nak.1393741539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_fifo_levels.949439458 |
| Short name | T54 |
| Test name | |
| Test status | |
| Simulation time | 273561939 ps |
| CPU time | 1.91 seconds |
| Started | Sep 04 05:40:59 AM UTC 24 |
| Finished | Sep 04 05:41:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=949439458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_fifo_levels.949439458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_freq_hiclk.392456999 |
| Short name | T583 |
| Test name | |
| Test status | |
| Simulation time | 110195640040 ps |
| CPU time | 224.8 seconds |
| Started | Sep 04 05:41:01 AM UTC 24 |
| Finished | Sep 04 05:44:49 AM UTC 24 |
| Peak memory | 220080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=392456999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_hiclk.392456999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/100.usbdev_fifo_levels.711699694 |
| Short name | T509 |
| Test name | |
| Test status | |
| Simulation time | 246424489 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 06:08:04 AM UTC 24 |
| Finished | Sep 04 06:08:07 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=711699694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 100.usbdev_fifo_levels.711699694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/100.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/102.usbdev_fifo_levels.2823672827 |
| Short name | T501 |
| Test name | |
| Test status | |
| Simulation time | 275394518 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 06:08:05 AM UTC 24 |
| Finished | Sep 04 06:08:08 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2823672827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 102.usbdev_fifo_levels.2823672827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/102.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/104.usbdev_fifo_levels.2988075449 |
| Short name | T558 |
| Test name | |
| Test status | |
| Simulation time | 245076406 ps |
| CPU time | 1.08 seconds |
| Started | Sep 04 06:08:07 AM UTC 24 |
| Finished | Sep 04 06:08:10 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2988075449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 104.usbdev_fifo_levels.2988075449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/104.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/105.usbdev_fifo_levels.2165095086 |
| Short name | T511 |
| Test name | |
| Test status | |
| Simulation time | 145384624 ps |
| CPU time | 0.98 seconds |
| Started | Sep 04 06:08:07 AM UTC 24 |
| Finished | Sep 04 06:08:10 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2165095086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 105.usbdev_fifo_levels.2165095086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/105.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/106.usbdev_fifo_levels.4083125821 |
| Short name | T515 |
| Test name | |
| Test status | |
| Simulation time | 303766768 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 06:08:08 AM UTC 24 |
| Finished | Sep 04 06:08:10 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4083125821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 106.usbdev_fifo_levels.4083125821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/106.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/107.usbdev_fifo_levels.3083283303 |
| Short name | T3313 |
| Test name | |
| Test status | |
| Simulation time | 349098122 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 06:08:08 AM UTC 24 |
| Finished | Sep 04 06:08:10 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3083283303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 107.usbdev_fifo_levels.3083283303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/107.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/108.usbdev_fifo_levels.2706475989 |
| Short name | T498 |
| Test name | |
| Test status | |
| Simulation time | 276905306 ps |
| CPU time | 1.23 seconds |
| Started | Sep 04 06:08:09 AM UTC 24 |
| Finished | Sep 04 06:08:11 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2706475989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 108.usbdev_fifo_levels.2706475989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/108.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/109.usbdev_fifo_levels.62359496 |
| Short name | T568 |
| Test name | |
| Test status | |
| Simulation time | 280200738 ps |
| CPU time | 1.19 seconds |
| Started | Sep 04 06:08:09 AM UTC 24 |
| Finished | Sep 04 06:08:12 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=62359496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 109.usbdev_fifo_levels.62359496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/109.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/112.usbdev_fifo_levels.2328838435 |
| Short name | T530 |
| Test name | |
| Test status | |
| Simulation time | 280074798 ps |
| CPU time | 1.11 seconds |
| Started | Sep 04 06:08:12 AM UTC 24 |
| Finished | Sep 04 06:08:14 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2328838435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 112.usbdev_fifo_levels.2328838435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/112.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/113.usbdev_fifo_levels.3374625549 |
| Short name | T533 |
| Test name | |
| Test status | |
| Simulation time | 300112829 ps |
| CPU time | 1.15 seconds |
| Started | Sep 04 06:08:12 AM UTC 24 |
| Finished | Sep 04 06:08:14 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3374625549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 113.usbdev_fifo_levels.3374625549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/113.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/116.usbdev_fifo_levels.1527377127 |
| Short name | T513 |
| Test name | |
| Test status | |
| Simulation time | 192890995 ps |
| CPU time | 1.14 seconds |
| Started | Sep 04 06:08:13 AM UTC 24 |
| Finished | Sep 04 06:08:15 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1527377127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 116.usbdev_fifo_levels.1527377127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/116.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/118.usbdev_fifo_levels.4176825414 |
| Short name | T3330 |
| Test name | |
| Test status | |
| Simulation time | 298209219 ps |
| CPU time | 1.29 seconds |
| Started | Sep 04 06:08:13 AM UTC 24 |
| Finished | Sep 04 06:08:15 AM UTC 24 |
| Peak memory | 215016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4176825414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 118.usbdev_fifo_levels.4176825414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/118.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/119.usbdev_fifo_levels.4027037948 |
| Short name | T3328 |
| Test name | |
| Test status | |
| Simulation time | 161717063 ps |
| CPU time | 0.94 seconds |
| Started | Sep 04 06:08:13 AM UTC 24 |
| Finished | Sep 04 06:08:15 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4027037948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 119.usbdev_fifo_levels.4027037948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/119.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/120.usbdev_fifo_levels.2955563931 |
| Short name | T518 |
| Test name | |
| Test status | |
| Simulation time | 255086746 ps |
| CPU time | 1.08 seconds |
| Started | Sep 04 06:08:14 AM UTC 24 |
| Finished | Sep 04 06:08:16 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2955563931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 120.usbdev_fifo_levels.2955563931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/120.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/121.usbdev_endpoint_types.4053011764 |
| Short name | T333 |
| Test name | |
| Test status | |
| Simulation time | 635863660 ps |
| CPU time | 1.74 seconds |
| Started | Sep 04 06:08:14 AM UTC 24 |
| Finished | Sep 04 06:08:17 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4053011764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 121.usbdev_endpoint_types.4053011764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/121.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/121.usbdev_fifo_levels.757985043 |
| Short name | T496 |
| Test name | |
| Test status | |
| Simulation time | 293579054 ps |
| CPU time | 1.12 seconds |
| Started | Sep 04 06:08:16 AM UTC 24 |
| Finished | Sep 04 06:08:18 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=757985043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 121.usbdev_fifo_levels.757985043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/121.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/127.usbdev_endpoint_types.3697049519 |
| Short name | T326 |
| Test name | |
| Test status | |
| Simulation time | 809017594 ps |
| CPU time | 1.74 seconds |
| Started | Sep 04 06:08:18 AM UTC 24 |
| Finished | Sep 04 06:08:21 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3697049519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 127.usbdev_endpoint_types.3697049519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/127.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/127.usbdev_fifo_levels.1192944312 |
| Short name | T553 |
| Test name | |
| Test status | |
| Simulation time | 285470776 ps |
| CPU time | 1.12 seconds |
| Started | Sep 04 06:08:18 AM UTC 24 |
| Finished | Sep 04 06:08:20 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1192944312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 127.usbdev_fifo_levels.1192944312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/127.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/129.usbdev_fifo_levels.2217419128 |
| Short name | T576 |
| Test name | |
| Test status | |
| Simulation time | 261965494 ps |
| CPU time | 1.1 seconds |
| Started | Sep 04 06:08:18 AM UTC 24 |
| Finished | Sep 04 06:08:20 AM UTC 24 |
| Peak memory | 214920 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2217419128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 129.usbdev_fifo_levels.2217419128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/129.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/130.usbdev_fifo_levels.1377551417 |
| Short name | T499 |
| Test name | |
| Test status | |
| Simulation time | 263189527 ps |
| CPU time | 1.29 seconds |
| Started | Sep 04 06:08:18 AM UTC 24 |
| Finished | Sep 04 06:08:20 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1377551417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 130.usbdev_fifo_levels.1377551417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/130.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/132.usbdev_fifo_levels.3308107952 |
| Short name | T505 |
| Test name | |
| Test status | |
| Simulation time | 268937252 ps |
| CPU time | 1.03 seconds |
| Started | Sep 04 06:08:20 AM UTC 24 |
| Finished | Sep 04 06:08:22 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3308107952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 132.usbdev_fifo_levels.3308107952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/132.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/135.usbdev_endpoint_types.2957356439 |
| Short name | T398 |
| Test name | |
| Test status | |
| Simulation time | 572860649 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 06:08:21 AM UTC 24 |
| Finished | Sep 04 06:08:23 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2957356439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 135.usbdev_endpoint_types.2957356439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/135.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/137.usbdev_endpoint_types.3059881921 |
| Short name | T394 |
| Test name | |
| Test status | |
| Simulation time | 330383623 ps |
| CPU time | 1.21 seconds |
| Started | Sep 04 06:08:21 AM UTC 24 |
| Finished | Sep 04 06:08:23 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3059881921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 137.usbdev_endpoint_types.3059881921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/137.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/138.usbdev_endpoint_types.174315930 |
| Short name | T315 |
| Test name | |
| Test status | |
| Simulation time | 316077565 ps |
| CPU time | 1.26 seconds |
| Started | Sep 04 06:08:22 AM UTC 24 |
| Finished | Sep 04 06:08:25 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=174315930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 138.usbdev_endpoint_types.174315930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/138.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/138.usbdev_fifo_levels.606406787 |
| Short name | T3374 |
| Test name | |
| Test status | |
| Simulation time | 242098088 ps |
| CPU time | 1.13 seconds |
| Started | Sep 04 06:08:22 AM UTC 24 |
| Finished | Sep 04 06:08:25 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=606406787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 138.usbdev_fifo_levels.606406787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/138.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_rx_full.1716736116 |
| Short name | T560 |
| Test name | |
| Test status | |
| Simulation time | 446755726 ps |
| CPU time | 2.54 seconds |
| Started | Sep 04 05:52:29 AM UTC 24 |
| Finished | Sep 04 05:52:33 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1716736116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 14.usbdev_rx_full.1716736116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/141.usbdev_endpoint_types.3451193353 |
| Short name | T311 |
| Test name | |
| Test status | |
| Simulation time | 871953755 ps |
| CPU time | 1.91 seconds |
| Started | Sep 04 06:08:23 AM UTC 24 |
| Finished | Sep 04 06:08:26 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3451193353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 141.usbdev_endpoint_types.3451193353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/141.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/150.usbdev_fifo_levels.1959845261 |
| Short name | T529 |
| Test name | |
| Test status | |
| Simulation time | 267991765 ps |
| CPU time | 1.03 seconds |
| Started | Sep 04 06:08:27 AM UTC 24 |
| Finished | Sep 04 06:08:29 AM UTC 24 |
| Peak memory | 214848 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1959845261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 150.usbdev_fifo_levels.1959845261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/150.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/153.usbdev_fifo_levels.4087419016 |
| Short name | T543 |
| Test name | |
| Test status | |
| Simulation time | 284587172 ps |
| CPU time | 1.12 seconds |
| Started | Sep 04 06:08:27 AM UTC 24 |
| Finished | Sep 04 06:08:30 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4087419016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 153.usbdev_fifo_levels.4087419016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/153.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/164.usbdev_endpoint_types.3708815976 |
| Short name | T436 |
| Test name | |
| Test status | |
| Simulation time | 493836007 ps |
| CPU time | 1.28 seconds |
| Started | Sep 04 06:08:32 AM UTC 24 |
| Finished | Sep 04 06:08:34 AM UTC 24 |
| Peak memory | 215016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3708815976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 164.usbdev_endpoint_types.3708815976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/164.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/198.usbdev_endpoint_types.466760046 |
| Short name | T427 |
| Test name | |
| Test status | |
| Simulation time | 262260028 ps |
| CPU time | 1.12 seconds |
| Started | Sep 04 06:08:50 AM UTC 24 |
| Finished | Sep 04 06:09:03 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=466760046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 198.usbdev_endpoint_types.466760046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/198.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_fifo_levels.1944353830 |
| Short name | T571 |
| Test name | |
| Test status | |
| Simulation time | 267283429 ps |
| CPU time | 1.93 seconds |
| Started | Sep 04 05:55:45 AM UTC 24 |
| Finished | Sep 04 05:55:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1944353830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_fifo_levels.1944353830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_fifo_levels.4207944353 |
| Short name | T565 |
| Test name | |
| Test status | |
| Simulation time | 270054108 ps |
| CPU time | 1.89 seconds |
| Started | Sep 04 05:59:39 AM UTC 24 |
| Finished | Sep 04 05:59:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4207944353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_fifo_levels.4207944353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_fifo_levels.2625212084 |
| Short name | T539 |
| Test name | |
| Test status | |
| Simulation time | 269150994 ps |
| CPU time | 1.9 seconds |
| Started | Sep 04 06:00:49 AM UTC 24 |
| Finished | Sep 04 06:00:52 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2625212084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_fifo_levels.2625212084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_freq_phase.2882298676 |
| Short name | T589 |
| Test name | |
| Test status | |
| Simulation time | 108142210091 ps |
| CPU time | 186.93 seconds |
| Started | Sep 04 05:45:09 AM UTC 24 |
| Finished | Sep 04 05:48:18 AM UTC 24 |
| Peak memory | 217352 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2882298676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_freq_phase.2882298676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_fifo_levels.1778232822 |
| Short name | T574 |
| Test name | |
| Test status | |
| Simulation time | 182424022 ps |
| CPU time | 1.32 seconds |
| Started | Sep 04 06:04:03 AM UTC 24 |
| Finished | Sep 04 06:04:06 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1778232822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_fifo_levels.1778232822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_endpoint_types.3701948973 |
| Short name | T306 |
| Test name | |
| Test status | |
| Simulation time | 492282138 ps |
| CPU time | 2.07 seconds |
| Started | Sep 04 06:05:13 AM UTC 24 |
| Finished | Sep 04 06:05:16 AM UTC 24 |
| Peak memory | 217040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3701948973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_endpoint_types.3701948973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_fifo_levels.717881657 |
| Short name | T181 |
| Test name | |
| Test status | |
| Simulation time | 267926579 ps |
| CPU time | 1.85 seconds |
| Started | Sep 04 05:46:19 AM UTC 24 |
| Finished | Sep 04 05:46:22 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=717881657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 5.usbdev_fifo_levels.717881657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/55.usbdev_fifo_levels.3512001946 |
| Short name | T525 |
| Test name | |
| Test status | |
| Simulation time | 155289358 ps |
| CPU time | 1.33 seconds |
| Started | Sep 04 06:07:36 AM UTC 24 |
| Finished | Sep 04 06:07:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3512001946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 55.usbdev_fifo_levels.3512001946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/55.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/56.usbdev_fifo_levels.631833485 |
| Short name | T564 |
| Test name | |
| Test status | |
| Simulation time | 286334511 ps |
| CPU time | 1.88 seconds |
| Started | Sep 04 06:07:37 AM UTC 24 |
| Finished | Sep 04 06:07:40 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=631833485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 56.usbdev_fifo_levels.631833485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/56.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/57.usbdev_fifo_levels.1275276770 |
| Short name | T547 |
| Test name | |
| Test status | |
| Simulation time | 322678070 ps |
| CPU time | 1.98 seconds |
| Started | Sep 04 06:07:38 AM UTC 24 |
| Finished | Sep 04 06:07:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1275276770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 57.usbdev_fifo_levels.1275276770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/57.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_fifo_levels.1528505203 |
| Short name | T468 |
| Test name | |
| Test status | |
| Simulation time | 250061694 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 05:47:08 AM UTC 24 |
| Finished | Sep 04 05:47:11 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1528505203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_fifo_levels.1528505203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/68.usbdev_fifo_levels.4136937166 |
| Short name | T577 |
| Test name | |
| Test status | |
| Simulation time | 261040798 ps |
| CPU time | 1.23 seconds |
| Started | Sep 04 06:07:46 AM UTC 24 |
| Finished | Sep 04 06:07:49 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4136937166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 68.usbdev_fifo_levels.4136937166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/68.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/70.usbdev_fifo_levels.157131846 |
| Short name | T544 |
| Test name | |
| Test status | |
| Simulation time | 308809515 ps |
| CPU time | 1.32 seconds |
| Started | Sep 04 06:07:48 AM UTC 24 |
| Finished | Sep 04 06:07:51 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=157131846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 70.usbdev_fifo_levels.157131846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/70.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/94.usbdev_fifo_levels.2912784721 |
| Short name | T500 |
| Test name | |
| Test status | |
| Simulation time | 267434235 ps |
| CPU time | 1.81 seconds |
| Started | Sep 04 06:08:02 AM UTC 24 |
| Finished | Sep 04 06:08:05 AM UTC 24 |
| Peak memory | 215032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2912784721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 94.usbdev_fifo_levels.2912784721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/94.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/98.usbdev_fifo_levels.746791659 |
| Short name | T185 |
| Test name | |
| Test status | |
| Simulation time | 293174163 ps |
| CPU time | 1.23 seconds |
| Started | Sep 04 06:08:04 AM UTC 24 |
| Finished | Sep 04 06:08:06 AM UTC 24 |
| Peak memory | 214992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=746791659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 98.usbdev_fifo_levels.746791659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/98.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_usb_ref_disable.4200724938 |
| Short name | T204 |
| Test name | |
| Test status | |
| Simulation time | 144282759 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 05:40:21 AM UTC 24 |
| Finished | Sep 04 05:40:23 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4200724938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_usb_ref_disable.4200724938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_resume.1192586933 |
| Short name | T199 |
| Test name | |
| Test status | |
| Simulation time | 31237185952 ps |
| CPU time | 42.96 seconds |
| Started | Sep 04 05:52:07 AM UTC 24 |
| Finished | Sep 04 05:52:52 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1192586933 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_resume.1192586933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_av_overflow.2255628553 |
| Short name | T62 |
| Test name | |
| Test status | |
| Simulation time | 137582677 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 05:42:09 AM UTC 24 |
| Finished | Sep 04 05:42:12 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2255628553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_av_overflow.2255628553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_phy_pins_sense.3997110442 |
| Short name | T37 |
| Test name | |
| Test status | |
| Simulation time | 49006173 ps |
| CPU time | 1.09 seconds |
| Started | Sep 04 05:44:30 AM UTC 24 |
| Finished | Sep 04 05:44:32 AM UTC 24 |
| Peak memory | 214988 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3997110442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_pins_sense.3997110442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_av_empty.3340465782 |
| Short name | T3 |
| Test name | |
| Test status | |
| Simulation time | 182735908 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 05:39:07 AM UTC 24 |
| Finished | Sep 04 05:39:09 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3340465782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_av_empty.3340465782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_data1_data0_toggle_test.378443200 |
| Short name | T29 |
| Test name | |
| Test status | |
| Simulation time | 520244592 ps |
| CPU time | 3.26 seconds |
| Started | Sep 04 05:39:25 AM UTC 24 |
| Finished | Sep 04 05:39:29 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=378443200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_invalid_data1_data0_toggle_test.378443200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_invalid_data1_data0_toggle_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_link_reset.3141694051 |
| Short name | T44 |
| Test name | |
| Test status | |
| Simulation time | 163774659 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 05:39:43 AM UTC 24 |
| Finished | Sep 04 05:39:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3141694051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_reset_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_link_reset.3141694051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_link_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_rx_pid_err.2154428180 |
| Short name | T74 |
| Test name | |
| Test status | |
| Simulation time | 149270731 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 05:40:29 AM UTC 24 |
| Finished | Sep 04 05:40:31 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2154428180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_rx_pid_err.2154428180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_av_empty.174709401 |
| Short name | T56 |
| Test name | |
| Test status | |
| Simulation time | 239345062 ps |
| CPU time | 1.71 seconds |
| Started | Sep 04 05:40:43 AM UTC 24 |
| Finished | Sep 04 05:40:46 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=174709401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_av_empty.174709401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_errors.3737239584 |
| Short name | T3884 |
| Test name | |
| Test status | |
| Simulation time | 162919807 ps |
| CPU time | 2.82 seconds |
| Started | Sep 04 06:10:46 AM UTC 24 |
| Finished | Sep 04 06:10:50 AM UTC 24 |
| Peak memory | 234000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3737239584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_tl_errors.3737239584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_iso_retraction.1942004358 |
| Short name | T91 |
| Test name | |
| Test status | |
| Simulation time | 12134721969 ps |
| CPU time | 155.89 seconds |
| Started | Sep 04 05:39:38 AM UTC 24 |
| Finished | Sep 04 05:42:16 AM UTC 24 |
| Peak memory | 217384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1942004358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_iso_retraction.1942004358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_nak_trans.1746727318 |
| Short name | T119 |
| Test name | |
| Test status | |
| Simulation time | 217950461 ps |
| CPU time | 1.65 seconds |
| Started | Sep 04 05:41:35 AM UTC 24 |
| Finished | Sep 04 05:41:38 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1746727318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_nak_trans.1746727318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_nak_trans.3133895150 |
| Short name | T150 |
| Test name | |
| Test status | |
| Simulation time | 212197713 ps |
| CPU time | 1.22 seconds |
| Started | Sep 04 05:50:10 AM UTC 24 |
| Finished | Sep 04 05:50:12 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3133895150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_nak_trans.3133895150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_nak_trans.2258929146 |
| Short name | T127 |
| Test name | |
| Test status | |
| Simulation time | 185772590 ps |
| CPU time | 1.28 seconds |
| Started | Sep 04 05:52:22 AM UTC 24 |
| Finished | Sep 04 05:52:24 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2258929146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_nak_trans.2258929146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_nak_trans.3069526328 |
| Short name | T125 |
| Test name | |
| Test status | |
| Simulation time | 225660883 ps |
| CPU time | 1.66 seconds |
| Started | Sep 04 05:52:53 AM UTC 24 |
| Finished | Sep 04 05:52:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3069526328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_nak_trans.3069526328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_nak_trans.3132724441 |
| Short name | T134 |
| Test name | |
| Test status | |
| Simulation time | 190694574 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 05:53:20 AM UTC 24 |
| Finished | Sep 04 05:53:23 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3132724441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_nak_trans.3132724441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_nak_trans.574448269 |
| Short name | T139 |
| Test name | |
| Test status | |
| Simulation time | 216197319 ps |
| CPU time | 1.74 seconds |
| Started | Sep 04 05:53:55 AM UTC 24 |
| Finished | Sep 04 05:53:58 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=574448269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_nak_trans.574448269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_nak_trans.1279890043 |
| Short name | T122 |
| Test name | |
| Test status | |
| Simulation time | 196877816 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 05:54:51 AM UTC 24 |
| Finished | Sep 04 05:54:53 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1279890043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_nak_trans.1279890043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_nak_trans.2985816589 |
| Short name | T145 |
| Test name | |
| Test status | |
| Simulation time | 224063447 ps |
| CPU time | 1.73 seconds |
| Started | Sep 04 05:43:00 AM UTC 24 |
| Finished | Sep 04 05:43:02 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2985816589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_nak_trans.2985816589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/251.usbdev_tx_rx_disruption.1889030832 |
| Short name | T114 |
| Test name | |
| Test status | |
| Simulation time | 641253305 ps |
| CPU time | 1.68 seconds |
| Started | Sep 04 06:09:20 AM UTC 24 |
| Finished | Sep 04 06:09:32 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1889030832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 251.usbdev_ tx_rx_disruption.1889030832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/251.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_nak_trans.600319323 |
| Short name | T136 |
| Test name | |
| Test status | |
| Simulation time | 274403820 ps |
| CPU time | 1.73 seconds |
| Started | Sep 04 05:59:23 AM UTC 24 |
| Finished | Sep 04 05:59:26 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=600319323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_nak_trans.600319323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_stress_usb_traffic.3283882591 |
| Short name | T191 |
| Test name | |
| Test status | |
| Simulation time | 11967404830 ps |
| CPU time | 250.97 seconds |
| Started | Sep 04 05:44:47 AM UTC 24 |
| Finished | Sep 04 05:49:02 AM UTC 24 |
| Peak memory | 230264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3283882591 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_ 03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stress_usb_traffic.3283882591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_nak_trans.2725663483 |
| Short name | T130 |
| Test name | |
| Test status | |
| Simulation time | 237582688 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 05:46:35 AM UTC 24 |
| Finished | Sep 04 05:46:37 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2725663483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_nak_trans.2725663483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_aliasing.2127189155 |
| Short name | T3793 |
| Test name | |
| Test status | |
| Simulation time | 416074965 ps |
| CPU time | 3.34 seconds |
| Started | Sep 04 06:10:19 AM UTC 24 |
| Finished | Sep 04 06:10:23 AM UTC 24 |
| Peak memory | 217440 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2127189155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_aliasing.2127189155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_bit_bash.3574105778 |
| Short name | T3795 |
| Test name | |
| Test status | |
| Simulation time | 425361900 ps |
| CPU time | 4.01 seconds |
| Started | Sep 04 06:10:19 AM UTC 24 |
| Finished | Sep 04 06:10:24 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3574105778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_bit_bash.3574105778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_hw_reset.2231964160 |
| Short name | T218 |
| Test name | |
| Test status | |
| Simulation time | 96429501 ps |
| CPU time | 0.74 seconds |
| Started | Sep 04 06:10:19 AM UTC 24 |
| Finished | Sep 04 06:10:21 AM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2231964160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_hw_reset.2231964160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_mem_rw_with_rand_reset.2921078458 |
| Short name | T210 |
| Test name | |
| Test status | |
| Simulation time | 76657920 ps |
| CPU time | 1.28 seconds |
| Started | Sep 04 06:10:19 AM UTC 24 |
| Finished | Sep 04 06:10:21 AM UTC 24 |
| Peak memory | 226816 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2921078458 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_mem_rw_with_rand_reset.2921078458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_partial_access.57419256 |
| Short name | T260 |
| Test name | |
| Test status | |
| Simulation time | 215241696 ps |
| CPU time | 2.14 seconds |
| Started | Sep 04 06:10:19 AM UTC 24 |
| Finished | Sep 04 06:10:22 AM UTC 24 |
| Peak memory | 227656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=57419256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs /coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_mem_partial_access.57419256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_walk.4244701356 |
| Short name | T3794 |
| Test name | |
| Test status | |
| Simulation time | 481368830 ps |
| CPU time | 3.85 seconds |
| Started | Sep 04 06:10:19 AM UTC 24 |
| Finished | Sep 04 06:10:24 AM UTC 24 |
| Peak memory | 217344 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4244701356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_mem_walk.4244701356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_same_csr_outstanding.737935069 |
| Short name | T231 |
| Test name | |
| Test status | |
| Simulation time | 249315456 ps |
| CPU time | 1.55 seconds |
| Started | Sep 04 06:10:19 AM UTC 24 |
| Finished | Sep 04 06:10:22 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=737935069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_same_csr_outstanding.737935069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_aliasing.943516920 |
| Short name | T262 |
| Test name | |
| Test status | |
| Simulation time | 210500118 ps |
| CPU time | 1.83 seconds |
| Started | Sep 04 06:10:19 AM UTC 24 |
| Finished | Sep 04 06:10:23 AM UTC 24 |
| Peak memory | 216800 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=943516920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_aliasing.943516920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_bit_bash.455894219 |
| Short name | T270 |
| Test name | |
| Test status | |
| Simulation time | 568348287 ps |
| CPU time | 5.96 seconds |
| Started | Sep 04 06:10:19 AM UTC 24 |
| Finished | Sep 04 06:10:27 AM UTC 24 |
| Peak memory | 217376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=455894219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_bit_bash.455894219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_hw_reset.2689577121 |
| Short name | T237 |
| Test name | |
| Test status | |
| Simulation time | 61092346 ps |
| CPU time | 0.71 seconds |
| Started | Sep 04 06:10:19 AM UTC 24 |
| Finished | Sep 04 06:10:22 AM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2689577121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_hw_reset.2689577121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_mem_rw_with_rand_reset.3589762159 |
| Short name | T212 |
| Test name | |
| Test status | |
| Simulation time | 67141103 ps |
| CPU time | 1.27 seconds |
| Started | Sep 04 06:10:19 AM UTC 24 |
| Finished | Sep 04 06:10:23 AM UTC 24 |
| Peak memory | 226828 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3589762159 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_mem_rw_with_rand_reset.3589762159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_rw.2416639561 |
| Short name | T273 |
| Test name | |
| Test status | |
| Simulation time | 76459334 ps |
| CPU time | 0.86 seconds |
| Started | Sep 04 06:10:19 AM UTC 24 |
| Finished | Sep 04 06:10:22 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2416639561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_rw.2416639561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_intr_test.11224090 |
| Short name | T220 |
| Test name | |
| Test status | |
| Simulation time | 37869627 ps |
| CPU time | 0.75 seconds |
| Started | Sep 04 06:10:19 AM UTC 24 |
| Finished | Sep 04 06:10:24 AM UTC 24 |
| Peak memory | 216692 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=11224090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_com mon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg _top.vdb -cm_log /dev/null -cm_name 1.usbdev_intr_test.11224090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_partial_access.4204143192 |
| Short name | T263 |
| Test name | |
| Test status | |
| Simulation time | 234528019 ps |
| CPU time | 2.14 seconds |
| Started | Sep 04 06:10:19 AM UTC 24 |
| Finished | Sep 04 06:10:23 AM UTC 24 |
| Peak memory | 227824 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4204143192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_mem_partial_access.4204143192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_walk.3008357408 |
| Short name | T3798 |
| Test name | |
| Test status | |
| Simulation time | 329140310 ps |
| CPU time | 2.32 seconds |
| Started | Sep 04 06:10:19 AM UTC 24 |
| Finished | Sep 04 06:10:26 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3008357408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_mem_walk.3008357408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_same_csr_outstanding.903420255 |
| Short name | T274 |
| Test name | |
| Test status | |
| Simulation time | 79323902 ps |
| CPU time | 0.89 seconds |
| Started | Sep 04 06:10:19 AM UTC 24 |
| Finished | Sep 04 06:10:22 AM UTC 24 |
| Peak memory | 216908 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=903420255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_same_csr_outstanding.903420255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_intg_err.347792998 |
| Short name | T444 |
| Test name | |
| Test status | |
| Simulation time | 1215591667 ps |
| CPU time | 5.04 seconds |
| Started | Sep 04 06:10:19 AM UTC 24 |
| Finished | Sep 04 06:10:28 AM UTC 24 |
| Peak memory | 217448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=347792998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_tl_intg_err.347792998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_mem_rw_with_rand_reset.582362627 |
| Short name | T3838 |
| Test name | |
| Test status | |
| Simulation time | 184373495 ps |
| CPU time | 1.69 seconds |
| Started | Sep 04 06:10:34 AM UTC 24 |
| Finished | Sep 04 06:10:37 AM UTC 24 |
| Peak memory | 226812 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=582362627 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_csr_mem_rw_with_rand_reset.582362627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_rw.900622155 |
| Short name | T3822 |
| Test name | |
| Test status | |
| Simulation time | 89552388 ps |
| CPU time | 0.96 seconds |
| Started | Sep 04 06:10:34 AM UTC 24 |
| Finished | Sep 04 06:10:36 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=900622155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_csr_rw.900622155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_intr_test.3152105713 |
| Short name | T289 |
| Test name | |
| Test status | |
| Simulation time | 58878825 ps |
| CPU time | 0.71 seconds |
| Started | Sep 04 06:10:34 AM UTC 24 |
| Finished | Sep 04 06:10:36 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3152105713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_intr_test.3152105713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_same_csr_outstanding.1301006547 |
| Short name | T3825 |
| Test name | |
| Test status | |
| Simulation time | 177139279 ps |
| CPU time | 1.22 seconds |
| Started | Sep 04 06:10:34 AM UTC 24 |
| Finished | Sep 04 06:10:36 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1301006547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_same_csr_outstanding.1301006547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_errors.2765701381 |
| Short name | T3829 |
| Test name | |
| Test status | |
| Simulation time | 60403864 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 06:10:34 AM UTC 24 |
| Finished | Sep 04 06:10:37 AM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2765701381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_tl_errors.2765701381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_intg_err.2510663932 |
| Short name | T3851 |
| Test name | |
| Test status | |
| Simulation time | 745118496 ps |
| CPU time | 4.22 seconds |
| Started | Sep 04 06:10:34 AM UTC 24 |
| Finished | Sep 04 06:10:39 AM UTC 24 |
| Peak memory | 217416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2510663932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_tl_intg_err.2510663932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_mem_rw_with_rand_reset.1280625310 |
| Short name | T3839 |
| Test name | |
| Test status | |
| Simulation time | 171132295 ps |
| CPU time | 1.57 seconds |
| Started | Sep 04 06:10:34 AM UTC 24 |
| Finished | Sep 04 06:10:37 AM UTC 24 |
| Peak memory | 226832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1280625310 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_csr_mem_rw_with_rand_reset.1280625310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_rw.1017637986 |
| Short name | T3824 |
| Test name | |
| Test status | |
| Simulation time | 74557840 ps |
| CPU time | 0.93 seconds |
| Started | Sep 04 06:10:34 AM UTC 24 |
| Finished | Sep 04 06:10:36 AM UTC 24 |
| Peak memory | 216776 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1017637986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_csr_rw.1017637986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_same_csr_outstanding.456745961 |
| Short name | T3834 |
| Test name | |
| Test status | |
| Simulation time | 294377418 ps |
| CPU time | 1.68 seconds |
| Started | Sep 04 06:10:34 AM UTC 24 |
| Finished | Sep 04 06:10:37 AM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=456745961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_same_csr_outstanding.456745961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_errors.1624773007 |
| Short name | T3843 |
| Test name | |
| Test status | |
| Simulation time | 201415229 ps |
| CPU time | 2.29 seconds |
| Started | Sep 04 06:10:34 AM UTC 24 |
| Finished | Sep 04 06:10:37 AM UTC 24 |
| Peak memory | 217488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1624773007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_tl_errors.1624773007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_mem_rw_with_rand_reset.2797252130 |
| Short name | T3837 |
| Test name | |
| Test status | |
| Simulation time | 63356025 ps |
| CPU time | 1.36 seconds |
| Started | Sep 04 06:10:34 AM UTC 24 |
| Finished | Sep 04 06:10:37 AM UTC 24 |
| Peak memory | 226772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2797252130 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_csr_mem_rw_with_rand_reset.2797252130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_rw.1384134826 |
| Short name | T3827 |
| Test name | |
| Test status | |
| Simulation time | 63589207 ps |
| CPU time | 0.96 seconds |
| Started | Sep 04 06:10:34 AM UTC 24 |
| Finished | Sep 04 06:10:36 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1384134826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_csr_rw.1384134826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_intr_test.697246446 |
| Short name | T3823 |
| Test name | |
| Test status | |
| Simulation time | 51864069 ps |
| CPU time | 0.74 seconds |
| Started | Sep 04 06:10:34 AM UTC 24 |
| Finished | Sep 04 06:10:36 AM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=697246446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 12.usbdev_intr_test.697246446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_same_csr_outstanding.373295751 |
| Short name | T3832 |
| Test name | |
| Test status | |
| Simulation time | 178135512 ps |
| CPU time | 1.33 seconds |
| Started | Sep 04 06:10:34 AM UTC 24 |
| Finished | Sep 04 06:10:37 AM UTC 24 |
| Peak memory | 216952 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=373295751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_same_csr_outstanding.373295751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_errors.3874718584 |
| Short name | T3830 |
| Test name | |
| Test status | |
| Simulation time | 135157396 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 06:10:34 AM UTC 24 |
| Finished | Sep 04 06:10:37 AM UTC 24 |
| Peak memory | 226824 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3874718584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_tl_errors.3874718584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_intg_err.1937178151 |
| Short name | T3847 |
| Test name | |
| Test status | |
| Simulation time | 293091137 ps |
| CPU time | 2.66 seconds |
| Started | Sep 04 06:10:34 AM UTC 24 |
| Finished | Sep 04 06:10:38 AM UTC 24 |
| Peak memory | 217632 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1937178151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_tl_intg_err.1937178151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_mem_rw_with_rand_reset.3617794273 |
| Short name | T3845 |
| Test name | |
| Test status | |
| Simulation time | 140783987 ps |
| CPU time | 1.71 seconds |
| Started | Sep 04 06:10:34 AM UTC 24 |
| Finished | Sep 04 06:10:38 AM UTC 24 |
| Peak memory | 226828 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3617794273 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_csr_mem_rw_with_rand_reset.3617794273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_rw.398533101 |
| Short name | T3831 |
| Test name | |
| Test status | |
| Simulation time | 106760757 ps |
| CPU time | 0.99 seconds |
| Started | Sep 04 06:10:34 AM UTC 24 |
| Finished | Sep 04 06:10:37 AM UTC 24 |
| Peak memory | 216676 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=398533101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_csr_rw.398533101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_intr_test.4214114673 |
| Short name | T3826 |
| Test name | |
| Test status | |
| Simulation time | 35471082 ps |
| CPU time | 0.64 seconds |
| Started | Sep 04 06:10:34 AM UTC 24 |
| Finished | Sep 04 06:10:36 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4214114673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_intr_test.4214114673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_same_csr_outstanding.1927277180 |
| Short name | T3833 |
| Test name | |
| Test status | |
| Simulation time | 68355282 ps |
| CPU time | 1.19 seconds |
| Started | Sep 04 06:10:34 AM UTC 24 |
| Finished | Sep 04 06:10:37 AM UTC 24 |
| Peak memory | 216800 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1927277180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_same_csr_outstanding.1927277180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_errors.1661569631 |
| Short name | T3848 |
| Test name | |
| Test status | |
| Simulation time | 258316169 ps |
| CPU time | 2.7 seconds |
| Started | Sep 04 06:10:34 AM UTC 24 |
| Finished | Sep 04 06:10:38 AM UTC 24 |
| Peak memory | 217424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1661569631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_tl_errors.1661569631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_mem_rw_with_rand_reset.1174651655 |
| Short name | T3844 |
| Test name | |
| Test status | |
| Simulation time | 145013296 ps |
| CPU time | 1.66 seconds |
| Started | Sep 04 06:10:35 AM UTC 24 |
| Finished | Sep 04 06:10:37 AM UTC 24 |
| Peak memory | 226880 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1174651655 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_csr_mem_rw_with_rand_reset.1174651655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_rw.2920791268 |
| Short name | T3835 |
| Test name | |
| Test status | |
| Simulation time | 76040729 ps |
| CPU time | 0.98 seconds |
| Started | Sep 04 06:10:35 AM UTC 24 |
| Finished | Sep 04 06:10:37 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2920791268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_csr_rw.2920791268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_intr_test.1382554051 |
| Short name | T292 |
| Test name | |
| Test status | |
| Simulation time | 44881244 ps |
| CPU time | 0.63 seconds |
| Started | Sep 04 06:10:35 AM UTC 24 |
| Finished | Sep 04 06:10:37 AM UTC 24 |
| Peak memory | 216732 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1382554051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_intr_test.1382554051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_same_csr_outstanding.566765418 |
| Short name | T3840 |
| Test name | |
| Test status | |
| Simulation time | 67066322 ps |
| CPU time | 1.23 seconds |
| Started | Sep 04 06:10:35 AM UTC 24 |
| Finished | Sep 04 06:10:37 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=566765418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_same_csr_outstanding.566765418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_errors.317544923 |
| Short name | T3842 |
| Test name | |
| Test status | |
| Simulation time | 121304243 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 06:10:34 AM UTC 24 |
| Finished | Sep 04 06:10:37 AM UTC 24 |
| Peak memory | 216612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=317544923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 14.usbdev_tl_errors.317544923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_intg_err.1337568954 |
| Short name | T451 |
| Test name | |
| Test status | |
| Simulation time | 875138792 ps |
| CPU time | 4.07 seconds |
| Started | Sep 04 06:10:34 AM UTC 24 |
| Finished | Sep 04 06:10:40 AM UTC 24 |
| Peak memory | 217428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1337568954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_tl_intg_err.1337568954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_mem_rw_with_rand_reset.3633760452 |
| Short name | T3858 |
| Test name | |
| Test status | |
| Simulation time | 162667884 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 06:10:45 AM UTC 24 |
| Finished | Sep 04 06:10:48 AM UTC 24 |
| Peak memory | 226828 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3633760452 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_csr_mem_rw_with_rand_reset.3633760452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_rw.1943999154 |
| Short name | T3846 |
| Test name | |
| Test status | |
| Simulation time | 39120393 ps |
| CPU time | 0.69 seconds |
| Started | Sep 04 06:10:35 AM UTC 24 |
| Finished | Sep 04 06:10:38 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1943999154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_csr_rw.1943999154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_intr_test.162033635 |
| Short name | T3836 |
| Test name | |
| Test status | |
| Simulation time | 49286386 ps |
| CPU time | 0.91 seconds |
| Started | Sep 04 06:10:35 AM UTC 24 |
| Finished | Sep 04 06:10:37 AM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=162033635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 15.usbdev_intr_test.162033635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_same_csr_outstanding.1837747653 |
| Short name | T3849 |
| Test name | |
| Test status | |
| Simulation time | 212801058 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 06:10:35 AM UTC 24 |
| Finished | Sep 04 06:10:38 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1837747653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_same_csr_outstanding.1837747653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_errors.816561452 |
| Short name | T3852 |
| Test name | |
| Test status | |
| Simulation time | 380898217 ps |
| CPU time | 3.66 seconds |
| Started | Sep 04 06:10:35 AM UTC 24 |
| Finished | Sep 04 06:10:40 AM UTC 24 |
| Peak memory | 234532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=816561452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 15.usbdev_tl_errors.816561452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_intg_err.1696414916 |
| Short name | T3850 |
| Test name | |
| Test status | |
| Simulation time | 481772015 ps |
| CPU time | 2.87 seconds |
| Started | Sep 04 06:10:35 AM UTC 24 |
| Finished | Sep 04 06:10:39 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1696414916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_tl_intg_err.1696414916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_mem_rw_with_rand_reset.4263305247 |
| Short name | T3868 |
| Test name | |
| Test status | |
| Simulation time | 66260404 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 06:10:45 AM UTC 24 |
| Finished | Sep 04 06:10:48 AM UTC 24 |
| Peak memory | 226876 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4263305247 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_csr_mem_rw_with_rand_reset.4263305247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_rw.2593515860 |
| Short name | T3856 |
| Test name | |
| Test status | |
| Simulation time | 64446746 ps |
| CPU time | 1.09 seconds |
| Started | Sep 04 06:10:45 AM UTC 24 |
| Finished | Sep 04 06:10:48 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2593515860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_csr_rw.2593515860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_intr_test.421896886 |
| Short name | T3853 |
| Test name | |
| Test status | |
| Simulation time | 31784718 ps |
| CPU time | 0.69 seconds |
| Started | Sep 04 06:10:45 AM UTC 24 |
| Finished | Sep 04 06:10:47 AM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=421896886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 16.usbdev_intr_test.421896886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_same_csr_outstanding.2920446679 |
| Short name | T3872 |
| Test name | |
| Test status | |
| Simulation time | 156371137 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 06:10:45 AM UTC 24 |
| Finished | Sep 04 06:10:48 AM UTC 24 |
| Peak memory | 216816 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2920446679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_same_csr_outstanding.2920446679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_errors.3045959095 |
| Short name | T3883 |
| Test name | |
| Test status | |
| Simulation time | 239614974 ps |
| CPU time | 2.8 seconds |
| Started | Sep 04 06:10:45 AM UTC 24 |
| Finished | Sep 04 06:10:49 AM UTC 24 |
| Peak memory | 217424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3045959095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_tl_errors.3045959095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_intg_err.2572023627 |
| Short name | T452 |
| Test name | |
| Test status | |
| Simulation time | 1500879032 ps |
| CPU time | 4.8 seconds |
| Started | Sep 04 06:10:45 AM UTC 24 |
| Finished | Sep 04 06:10:51 AM UTC 24 |
| Peak memory | 217496 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2572023627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_tl_intg_err.2572023627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_mem_rw_with_rand_reset.2128358517 |
| Short name | T3865 |
| Test name | |
| Test status | |
| Simulation time | 82158978 ps |
| CPU time | 1.25 seconds |
| Started | Sep 04 06:10:46 AM UTC 24 |
| Finished | Sep 04 06:10:48 AM UTC 24 |
| Peak memory | 228864 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2128358517 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_csr_mem_rw_with_rand_reset.2128358517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_rw.626087338 |
| Short name | T3855 |
| Test name | |
| Test status | |
| Simulation time | 70153866 ps |
| CPU time | 0.83 seconds |
| Started | Sep 04 06:10:45 AM UTC 24 |
| Finished | Sep 04 06:10:47 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=626087338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_csr_rw.626087338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_intr_test.2688009898 |
| Short name | T3854 |
| Test name | |
| Test status | |
| Simulation time | 52405148 ps |
| CPU time | 0.63 seconds |
| Started | Sep 04 06:10:45 AM UTC 24 |
| Finished | Sep 04 06:10:47 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2688009898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_intr_test.2688009898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_same_csr_outstanding.1580248446 |
| Short name | T3860 |
| Test name | |
| Test status | |
| Simulation time | 62288133 ps |
| CPU time | 1.14 seconds |
| Started | Sep 04 06:10:46 AM UTC 24 |
| Finished | Sep 04 06:10:48 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1580248446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_same_csr_outstanding.1580248446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_errors.219800444 |
| Short name | T3885 |
| Test name | |
| Test status | |
| Simulation time | 292618579 ps |
| CPU time | 3.1 seconds |
| Started | Sep 04 06:10:45 AM UTC 24 |
| Finished | Sep 04 06:10:50 AM UTC 24 |
| Peak memory | 233792 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=219800444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 17.usbdev_tl_errors.219800444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_intg_err.2407239145 |
| Short name | T453 |
| Test name | |
| Test status | |
| Simulation time | 1362070971 ps |
| CPU time | 5.13 seconds |
| Started | Sep 04 06:10:45 AM UTC 24 |
| Finished | Sep 04 06:10:52 AM UTC 24 |
| Peak memory | 217440 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2407239145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_tl_intg_err.2407239145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_mem_rw_with_rand_reset.4093845077 |
| Short name | T3880 |
| Test name | |
| Test status | |
| Simulation time | 139642664 ps |
| CPU time | 1.72 seconds |
| Started | Sep 04 06:10:46 AM UTC 24 |
| Finished | Sep 04 06:10:49 AM UTC 24 |
| Peak memory | 226956 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4093845077 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_csr_mem_rw_with_rand_reset.4093845077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_rw.4151561336 |
| Short name | T3859 |
| Test name | |
| Test status | |
| Simulation time | 87403113 ps |
| CPU time | 1.08 seconds |
| Started | Sep 04 06:10:46 AM UTC 24 |
| Finished | Sep 04 06:10:48 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4151561336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_csr_rw.4151561336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_intr_test.2509255852 |
| Short name | T3857 |
| Test name | |
| Test status | |
| Simulation time | 60221369 ps |
| CPU time | 0.85 seconds |
| Started | Sep 04 06:10:46 AM UTC 24 |
| Finished | Sep 04 06:10:48 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2509255852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_intr_test.2509255852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_same_csr_outstanding.4040732491 |
| Short name | T3876 |
| Test name | |
| Test status | |
| Simulation time | 158336070 ps |
| CPU time | 1.25 seconds |
| Started | Sep 04 06:10:46 AM UTC 24 |
| Finished | Sep 04 06:10:48 AM UTC 24 |
| Peak memory | 216900 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4040732491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_same_csr_outstanding.4040732491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_intg_err.705946414 |
| Short name | T448 |
| Test name | |
| Test status | |
| Simulation time | 1022631534 ps |
| CPU time | 5.02 seconds |
| Started | Sep 04 06:10:46 AM UTC 24 |
| Finished | Sep 04 06:10:52 AM UTC 24 |
| Peak memory | 217476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=705946414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_tl_intg_err.705946414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_mem_rw_with_rand_reset.3252351325 |
| Short name | T3879 |
| Test name | |
| Test status | |
| Simulation time | 124183414 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 06:10:46 AM UTC 24 |
| Finished | Sep 04 06:10:48 AM UTC 24 |
| Peak memory | 226892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3252351325 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_csr_mem_rw_with_rand_reset.3252351325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_rw.3529152372 |
| Short name | T3869 |
| Test name | |
| Test status | |
| Simulation time | 50510602 ps |
| CPU time | 1 seconds |
| Started | Sep 04 06:10:46 AM UTC 24 |
| Finished | Sep 04 06:10:48 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3529152372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_csr_rw.3529152372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_intr_test.1018545087 |
| Short name | T3861 |
| Test name | |
| Test status | |
| Simulation time | 34017910 ps |
| CPU time | 0.87 seconds |
| Started | Sep 04 06:10:46 AM UTC 24 |
| Finished | Sep 04 06:10:48 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1018545087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_intr_test.1018545087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_same_csr_outstanding.175324155 |
| Short name | T3881 |
| Test name | |
| Test status | |
| Simulation time | 145255382 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 06:10:46 AM UTC 24 |
| Finished | Sep 04 06:10:49 AM UTC 24 |
| Peak memory | 216960 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=175324155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_same_csr_outstanding.175324155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_errors.2228402845 |
| Short name | T3882 |
| Test name | |
| Test status | |
| Simulation time | 136198184 ps |
| CPU time | 2.06 seconds |
| Started | Sep 04 06:10:46 AM UTC 24 |
| Finished | Sep 04 06:10:49 AM UTC 24 |
| Peak memory | 234708 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2228402845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_tl_errors.2228402845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_intg_err.2931283943 |
| Short name | T3886 |
| Test name | |
| Test status | |
| Simulation time | 1554395171 ps |
| CPU time | 5.1 seconds |
| Started | Sep 04 06:10:46 AM UTC 24 |
| Finished | Sep 04 06:10:52 AM UTC 24 |
| Peak memory | 217492 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2931283943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_tl_intg_err.2931283943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_aliasing.410823159 |
| Short name | T267 |
| Test name | |
| Test status | |
| Simulation time | 372212450 ps |
| CPU time | 3.41 seconds |
| Started | Sep 04 06:10:21 AM UTC 24 |
| Finished | Sep 04 06:10:26 AM UTC 24 |
| Peak memory | 217480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=410823159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_aliasing.410823159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_bit_bash.3829466029 |
| Short name | T268 |
| Test name | |
| Test status | |
| Simulation time | 686706900 ps |
| CPU time | 4.23 seconds |
| Started | Sep 04 06:10:21 AM UTC 24 |
| Finished | Sep 04 06:10:26 AM UTC 24 |
| Peak memory | 217552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3829466029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_bit_bash.3829466029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_hw_reset.2858579448 |
| Short name | T3792 |
| Test name | |
| Test status | |
| Simulation time | 153678230 ps |
| CPU time | 1.15 seconds |
| Started | Sep 04 06:10:21 AM UTC 24 |
| Finished | Sep 04 06:10:23 AM UTC 24 |
| Peak memory | 216820 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2858579448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_hw_reset.2858579448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_mem_rw_with_rand_reset.2246942769 |
| Short name | T246 |
| Test name | |
| Test status | |
| Simulation time | 101090239 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 06:10:21 AM UTC 24 |
| Finished | Sep 04 06:10:24 AM UTC 24 |
| Peak memory | 226828 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2246942769 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_mem_rw_with_rand_reset.2246942769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_rw.2068945206 |
| Short name | T276 |
| Test name | |
| Test status | |
| Simulation time | 51494246 ps |
| CPU time | 0.86 seconds |
| Started | Sep 04 06:10:21 AM UTC 24 |
| Finished | Sep 04 06:10:23 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2068945206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_rw.2068945206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_intr_test.3938862104 |
| Short name | T219 |
| Test name | |
| Test status | |
| Simulation time | 91311193 ps |
| CPU time | 0.67 seconds |
| Started | Sep 04 06:10:19 AM UTC 24 |
| Finished | Sep 04 06:10:22 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3938862104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_intr_test.3938862104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_partial_access.2656373024 |
| Short name | T264 |
| Test name | |
| Test status | |
| Simulation time | 113024296 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 06:10:21 AM UTC 24 |
| Finished | Sep 04 06:10:24 AM UTC 24 |
| Peak memory | 216840 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2656373024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_mem_partial_access.2656373024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_walk.1219307448 |
| Short name | T3796 |
| Test name | |
| Test status | |
| Simulation time | 370109894 ps |
| CPU time | 2.63 seconds |
| Started | Sep 04 06:10:19 AM UTC 24 |
| Finished | Sep 04 06:10:24 AM UTC 24 |
| Peak memory | 217476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1219307448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_mem_walk.1219307448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_same_csr_outstanding.2925224418 |
| Short name | T277 |
| Test name | |
| Test status | |
| Simulation time | 186457755 ps |
| CPU time | 1.98 seconds |
| Started | Sep 04 06:10:21 AM UTC 24 |
| Finished | Sep 04 06:10:24 AM UTC 24 |
| Peak memory | 216856 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2925224418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_same_csr_outstanding.2925224418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_errors.3210415200 |
| Short name | T242 |
| Test name | |
| Test status | |
| Simulation time | 122934248 ps |
| CPU time | 2.79 seconds |
| Started | Sep 04 06:10:19 AM UTC 24 |
| Finished | Sep 04 06:10:24 AM UTC 24 |
| Peak memory | 234608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3210415200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_tl_errors.3210415200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_intg_err.3100196635 |
| Short name | T234 |
| Test name | |
| Test status | |
| Simulation time | 419386051 ps |
| CPU time | 2.41 seconds |
| Started | Sep 04 06:10:19 AM UTC 24 |
| Finished | Sep 04 06:10:24 AM UTC 24 |
| Peak memory | 217408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3100196635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_tl_intg_err.3100196635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/20.usbdev_intr_test.531278144 |
| Short name | T3871 |
| Test name | |
| Test status | |
| Simulation time | 36546789 ps |
| CPU time | 0.87 seconds |
| Started | Sep 04 06:10:46 AM UTC 24 |
| Finished | Sep 04 06:10:48 AM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=531278144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 20.usbdev_intr_test.531278144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/21.usbdev_intr_test.92557147 |
| Short name | T3875 |
| Test name | |
| Test status | |
| Simulation time | 42428950 ps |
| CPU time | 0.95 seconds |
| Started | Sep 04 06:10:46 AM UTC 24 |
| Finished | Sep 04 06:10:48 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=92557147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_com mon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg _top.vdb -cm_log /dev/null -cm_name 21.usbdev_intr_test.92557147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/22.usbdev_intr_test.2909713355 |
| Short name | T3870 |
| Test name | |
| Test status | |
| Simulation time | 85734861 ps |
| CPU time | 0.88 seconds |
| Started | Sep 04 06:10:46 AM UTC 24 |
| Finished | Sep 04 06:10:48 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2909713355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 22.usbdev_intr_test.2909713355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/23.usbdev_intr_test.882372999 |
| Short name | T3866 |
| Test name | |
| Test status | |
| Simulation time | 56909711 ps |
| CPU time | 0.7 seconds |
| Started | Sep 04 06:10:46 AM UTC 24 |
| Finished | Sep 04 06:10:48 AM UTC 24 |
| Peak memory | 215148 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=882372999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 23.usbdev_intr_test.882372999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/24.usbdev_intr_test.3139488271 |
| Short name | T3862 |
| Test name | |
| Test status | |
| Simulation time | 28983296 ps |
| CPU time | 0.78 seconds |
| Started | Sep 04 06:10:46 AM UTC 24 |
| Finished | Sep 04 06:10:48 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3139488271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 24.usbdev_intr_test.3139488271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/25.usbdev_intr_test.4263901060 |
| Short name | T3863 |
| Test name | |
| Test status | |
| Simulation time | 37279692 ps |
| CPU time | 0.74 seconds |
| Started | Sep 04 06:10:46 AM UTC 24 |
| Finished | Sep 04 06:10:48 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4263901060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 25.usbdev_intr_test.4263901060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/26.usbdev_intr_test.2179898485 |
| Short name | T3873 |
| Test name | |
| Test status | |
| Simulation time | 51952403 ps |
| CPU time | 0.84 seconds |
| Started | Sep 04 06:10:46 AM UTC 24 |
| Finished | Sep 04 06:10:48 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2179898485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 26.usbdev_intr_test.2179898485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/27.usbdev_intr_test.763228697 |
| Short name | T3877 |
| Test name | |
| Test status | |
| Simulation time | 65157529 ps |
| CPU time | 0.84 seconds |
| Started | Sep 04 06:10:46 AM UTC 24 |
| Finished | Sep 04 06:10:48 AM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=763228697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 27.usbdev_intr_test.763228697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/28.usbdev_intr_test.4103818921 |
| Short name | T3864 |
| Test name | |
| Test status | |
| Simulation time | 49183685 ps |
| CPU time | 0.66 seconds |
| Started | Sep 04 06:10:46 AM UTC 24 |
| Finished | Sep 04 06:10:48 AM UTC 24 |
| Peak memory | 214924 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4103818921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 28.usbdev_intr_test.4103818921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/29.usbdev_intr_test.3789263910 |
| Short name | T3878 |
| Test name | |
| Test status | |
| Simulation time | 49042797 ps |
| CPU time | 0.79 seconds |
| Started | Sep 04 06:10:46 AM UTC 24 |
| Finished | Sep 04 06:10:48 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3789263910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 29.usbdev_intr_test.3789263910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_aliasing.242207546 |
| Short name | T3799 |
| Test name | |
| Test status | |
| Simulation time | 229273197 ps |
| CPU time | 2.11 seconds |
| Started | Sep 04 06:10:23 AM UTC 24 |
| Finished | Sep 04 06:10:26 AM UTC 24 |
| Peak memory | 217416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=242207546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_aliasing.242207546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_bit_bash.2116301221 |
| Short name | T3803 |
| Test name | |
| Test status | |
| Simulation time | 657659989 ps |
| CPU time | 4.33 seconds |
| Started | Sep 04 06:10:23 AM UTC 24 |
| Finished | Sep 04 06:10:28 AM UTC 24 |
| Peak memory | 217552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2116301221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_bit_bash.2116301221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_hw_reset.3614528757 |
| Short name | T222 |
| Test name | |
| Test status | |
| Simulation time | 88898319 ps |
| CPU time | 0.88 seconds |
| Started | Sep 04 06:10:21 AM UTC 24 |
| Finished | Sep 04 06:10:23 AM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3614528757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_hw_reset.3614528757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_mem_rw_with_rand_reset.1988069436 |
| Short name | T248 |
| Test name | |
| Test status | |
| Simulation time | 166745800 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 06:10:23 AM UTC 24 |
| Finished | Sep 04 06:10:26 AM UTC 24 |
| Peak memory | 226816 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1988069436 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_mem_rw_with_rand_reset.1988069436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_rw.1254267569 |
| Short name | T266 |
| Test name | |
| Test status | |
| Simulation time | 87575748 ps |
| CPU time | 0.95 seconds |
| Started | Sep 04 06:10:23 AM UTC 24 |
| Finished | Sep 04 06:10:25 AM UTC 24 |
| Peak memory | 216824 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1254267569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_rw.1254267569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_partial_access.2604275740 |
| Short name | T265 |
| Test name | |
| Test status | |
| Simulation time | 192138142 ps |
| CPU time | 2.28 seconds |
| Started | Sep 04 06:10:21 AM UTC 24 |
| Finished | Sep 04 06:10:25 AM UTC 24 |
| Peak memory | 227180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2604275740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_mem_partial_access.2604275740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_walk.1520229306 |
| Short name | T3797 |
| Test name | |
| Test status | |
| Simulation time | 123946474 ps |
| CPU time | 2.07 seconds |
| Started | Sep 04 06:10:21 AM UTC 24 |
| Finished | Sep 04 06:10:24 AM UTC 24 |
| Peak memory | 217488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1520229306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_mem_walk.1520229306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_same_csr_outstanding.3901847022 |
| Short name | T278 |
| Test name | |
| Test status | |
| Simulation time | 144975316 ps |
| CPU time | 1.11 seconds |
| Started | Sep 04 06:10:23 AM UTC 24 |
| Finished | Sep 04 06:10:25 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3901847022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_same_csr_outstanding.3901847022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_errors.1233153394 |
| Short name | T229 |
| Test name | |
| Test status | |
| Simulation time | 90553353 ps |
| CPU time | 1.32 seconds |
| Started | Sep 04 06:10:21 AM UTC 24 |
| Finished | Sep 04 06:10:24 AM UTC 24 |
| Peak memory | 216568 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1233153394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_tl_errors.1233153394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_intg_err.774765577 |
| Short name | T236 |
| Test name | |
| Test status | |
| Simulation time | 507178664 ps |
| CPU time | 2.62 seconds |
| Started | Sep 04 06:10:21 AM UTC 24 |
| Finished | Sep 04 06:10:25 AM UTC 24 |
| Peak memory | 217408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=774765577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_tl_intg_err.774765577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/30.usbdev_intr_test.496431865 |
| Short name | T3874 |
| Test name | |
| Test status | |
| Simulation time | 54147963 ps |
| CPU time | 0.72 seconds |
| Started | Sep 04 06:10:46 AM UTC 24 |
| Finished | Sep 04 06:10:48 AM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=496431865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 30.usbdev_intr_test.496431865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/31.usbdev_intr_test.1126222682 |
| Short name | T3867 |
| Test name | |
| Test status | |
| Simulation time | 112973898 ps |
| CPU time | 0.73 seconds |
| Started | Sep 04 06:11:01 AM UTC 24 |
| Finished | Sep 04 06:11:03 AM UTC 24 |
| Peak memory | 216640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1126222682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 31.usbdev_intr_test.1126222682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/32.usbdev_intr_test.2705292049 |
| Short name | T3887 |
| Test name | |
| Test status | |
| Simulation time | 31446117 ps |
| CPU time | 0.63 seconds |
| Started | Sep 04 06:11:01 AM UTC 24 |
| Finished | Sep 04 06:11:03 AM UTC 24 |
| Peak memory | 216532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2705292049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 32.usbdev_intr_test.2705292049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/33.usbdev_intr_test.1513075636 |
| Short name | T3889 |
| Test name | |
| Test status | |
| Simulation time | 47542476 ps |
| CPU time | 0.64 seconds |
| Started | Sep 04 06:11:01 AM UTC 24 |
| Finished | Sep 04 06:11:03 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1513075636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 33.usbdev_intr_test.1513075636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/34.usbdev_intr_test.946475667 |
| Short name | T3888 |
| Test name | |
| Test status | |
| Simulation time | 94282623 ps |
| CPU time | 0.7 seconds |
| Started | Sep 04 06:11:01 AM UTC 24 |
| Finished | Sep 04 06:11:03 AM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=946475667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 34.usbdev_intr_test.946475667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/35.usbdev_intr_test.1151343584 |
| Short name | T3841 |
| Test name | |
| Test status | |
| Simulation time | 36475938 ps |
| CPU time | 0.62 seconds |
| Started | Sep 04 06:11:01 AM UTC 24 |
| Finished | Sep 04 06:11:03 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1151343584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 35.usbdev_intr_test.1151343584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/36.usbdev_intr_test.744977882 |
| Short name | T3891 |
| Test name | |
| Test status | |
| Simulation time | 64840559 ps |
| CPU time | 0.72 seconds |
| Started | Sep 04 06:11:01 AM UTC 24 |
| Finished | Sep 04 06:11:03 AM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=744977882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 36.usbdev_intr_test.744977882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/37.usbdev_intr_test.1577378327 |
| Short name | T3890 |
| Test name | |
| Test status | |
| Simulation time | 48029207 ps |
| CPU time | 0.67 seconds |
| Started | Sep 04 06:11:02 AM UTC 24 |
| Finished | Sep 04 06:11:03 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1577378327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 37.usbdev_intr_test.1577378327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/38.usbdev_intr_test.1312379424 |
| Short name | T3892 |
| Test name | |
| Test status | |
| Simulation time | 73326346 ps |
| CPU time | 0.65 seconds |
| Started | Sep 04 06:11:02 AM UTC 24 |
| Finished | Sep 04 06:11:03 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1312379424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 38.usbdev_intr_test.1312379424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/39.usbdev_intr_test.1092891551 |
| Short name | T3894 |
| Test name | |
| Test status | |
| Simulation time | 36133627 ps |
| CPU time | 0.62 seconds |
| Started | Sep 04 06:11:02 AM UTC 24 |
| Finished | Sep 04 06:11:03 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1092891551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 39.usbdev_intr_test.1092891551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_aliasing.275810722 |
| Short name | T3812 |
| Test name | |
| Test status | |
| Simulation time | 114929542 ps |
| CPU time | 2.75 seconds |
| Started | Sep 04 06:10:25 AM UTC 24 |
| Finished | Sep 04 06:10:30 AM UTC 24 |
| Peak memory | 217612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=275810722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_aliasing.275810722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_bit_bash.2195276318 |
| Short name | T3820 |
| Test name | |
| Test status | |
| Simulation time | 349755584 ps |
| CPU time | 4.21 seconds |
| Started | Sep 04 06:10:25 AM UTC 24 |
| Finished | Sep 04 06:10:31 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2195276318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_bit_bash.2195276318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_hw_reset.2744199401 |
| Short name | T271 |
| Test name | |
| Test status | |
| Simulation time | 211614342 ps |
| CPU time | 1.15 seconds |
| Started | Sep 04 06:10:25 AM UTC 24 |
| Finished | Sep 04 06:10:28 AM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2744199401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_hw_reset.2744199401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_mem_rw_with_rand_reset.35230667 |
| Short name | T3808 |
| Test name | |
| Test status | |
| Simulation time | 86378685 ps |
| CPU time | 2.02 seconds |
| Started | Sep 04 06:10:25 AM UTC 24 |
| Finished | Sep 04 06:10:29 AM UTC 24 |
| Peak memory | 232008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=35230667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os _regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_mem_rw_with_rand_reset.35230667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_rw.798474770 |
| Short name | T3804 |
| Test name | |
| Test status | |
| Simulation time | 67927832 ps |
| CPU time | 1.29 seconds |
| Started | Sep 04 06:10:25 AM UTC 24 |
| Finished | Sep 04 06:10:28 AM UTC 24 |
| Peak memory | 216952 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=798474770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_rw.798474770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_intr_test.1090008648 |
| Short name | T284 |
| Test name | |
| Test status | |
| Simulation time | 40020217 ps |
| CPU time | 0.62 seconds |
| Started | Sep 04 06:10:23 AM UTC 24 |
| Finished | Sep 04 06:10:25 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1090008648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_intr_test.1090008648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_partial_access.2632255059 |
| Short name | T269 |
| Test name | |
| Test status | |
| Simulation time | 224234761 ps |
| CPU time | 2.39 seconds |
| Started | Sep 04 06:10:23 AM UTC 24 |
| Finished | Sep 04 06:10:27 AM UTC 24 |
| Peak memory | 227800 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2632255059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_mem_partial_access.2632255059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_walk.3088623580 |
| Short name | T3800 |
| Test name | |
| Test status | |
| Simulation time | 103446146 ps |
| CPU time | 2.02 seconds |
| Started | Sep 04 06:10:23 AM UTC 24 |
| Finished | Sep 04 06:10:26 AM UTC 24 |
| Peak memory | 217488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3088623580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_mem_walk.3088623580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_same_csr_outstanding.3960099079 |
| Short name | T3802 |
| Test name | |
| Test status | |
| Simulation time | 104566614 ps |
| CPU time | 0.95 seconds |
| Started | Sep 04 06:10:25 AM UTC 24 |
| Finished | Sep 04 06:10:28 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3960099079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_same_csr_outstanding.3960099079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_errors.693036185 |
| Short name | T247 |
| Test name | |
| Test status | |
| Simulation time | 103515386 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 06:10:23 AM UTC 24 |
| Finished | Sep 04 06:10:25 AM UTC 24 |
| Peak memory | 216740 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=693036185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 4.usbdev_tl_errors.693036185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/40.usbdev_intr_test.3287207840 |
| Short name | T3893 |
| Test name | |
| Test status | |
| Simulation time | 45443780 ps |
| CPU time | 0.65 seconds |
| Started | Sep 04 06:11:02 AM UTC 24 |
| Finished | Sep 04 06:11:03 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3287207840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 40.usbdev_intr_test.3287207840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/41.usbdev_intr_test.3063432651 |
| Short name | T3895 |
| Test name | |
| Test status | |
| Simulation time | 50125873 ps |
| CPU time | 0.7 seconds |
| Started | Sep 04 06:11:02 AM UTC 24 |
| Finished | Sep 04 06:11:10 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3063432651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 41.usbdev_intr_test.3063432651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/42.usbdev_intr_test.1777315724 |
| Short name | T3897 |
| Test name | |
| Test status | |
| Simulation time | 97771558 ps |
| CPU time | 0.74 seconds |
| Started | Sep 04 06:11:02 AM UTC 24 |
| Finished | Sep 04 06:11:11 AM UTC 24 |
| Peak memory | 216524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1777315724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 42.usbdev_intr_test.1777315724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/43.usbdev_intr_test.3215352131 |
| Short name | T3896 |
| Test name | |
| Test status | |
| Simulation time | 37206438 ps |
| CPU time | 0.66 seconds |
| Started | Sep 04 06:11:02 AM UTC 24 |
| Finished | Sep 04 06:11:11 AM UTC 24 |
| Peak memory | 216712 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3215352131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 43.usbdev_intr_test.3215352131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/44.usbdev_intr_test.1838027180 |
| Short name | T3900 |
| Test name | |
| Test status | |
| Simulation time | 51106253 ps |
| CPU time | 0.73 seconds |
| Started | Sep 04 06:11:02 AM UTC 24 |
| Finished | Sep 04 06:11:11 AM UTC 24 |
| Peak memory | 216748 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1838027180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 44.usbdev_intr_test.1838027180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/45.usbdev_intr_test.3372387120 |
| Short name | T3898 |
| Test name | |
| Test status | |
| Simulation time | 60907757 ps |
| CPU time | 0.64 seconds |
| Started | Sep 04 06:11:02 AM UTC 24 |
| Finished | Sep 04 06:11:11 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3372387120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 45.usbdev_intr_test.3372387120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/46.usbdev_intr_test.248257922 |
| Short name | T3903 |
| Test name | |
| Test status | |
| Simulation time | 82023486 ps |
| CPU time | 0.79 seconds |
| Started | Sep 04 06:11:02 AM UTC 24 |
| Finished | Sep 04 06:11:11 AM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=248257922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 46.usbdev_intr_test.248257922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/47.usbdev_intr_test.3484907204 |
| Short name | T3901 |
| Test name | |
| Test status | |
| Simulation time | 83201932 ps |
| CPU time | 0.71 seconds |
| Started | Sep 04 06:11:02 AM UTC 24 |
| Finished | Sep 04 06:11:11 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3484907204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 47.usbdev_intr_test.3484907204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/48.usbdev_intr_test.1781935976 |
| Short name | T3902 |
| Test name | |
| Test status | |
| Simulation time | 36956374 ps |
| CPU time | 0.79 seconds |
| Started | Sep 04 06:11:02 AM UTC 24 |
| Finished | Sep 04 06:11:11 AM UTC 24 |
| Peak memory | 216772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1781935976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 48.usbdev_intr_test.1781935976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/49.usbdev_intr_test.2892023596 |
| Short name | T3899 |
| Test name | |
| Test status | |
| Simulation time | 34460982 ps |
| CPU time | 0.64 seconds |
| Started | Sep 04 06:11:02 AM UTC 24 |
| Finished | Sep 04 06:11:11 AM UTC 24 |
| Peak memory | 216664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2892023596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 49.usbdev_intr_test.2892023596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_mem_rw_with_rand_reset.2402286141 |
| Short name | T3806 |
| Test name | |
| Test status | |
| Simulation time | 115675663 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 06:10:25 AM UTC 24 |
| Finished | Sep 04 06:10:29 AM UTC 24 |
| Peak memory | 226760 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2402286141 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_csr_mem_rw_with_rand_reset.2402286141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_rw.3927388366 |
| Short name | T272 |
| Test name | |
| Test status | |
| Simulation time | 117797832 ps |
| CPU time | 1.02 seconds |
| Started | Sep 04 06:10:25 AM UTC 24 |
| Finished | Sep 04 06:10:28 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3927388366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_csr_rw.3927388366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_same_csr_outstanding.2368092261 |
| Short name | T3807 |
| Test name | |
| Test status | |
| Simulation time | 211101396 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 06:10:25 AM UTC 24 |
| Finished | Sep 04 06:10:29 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2368092261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_same_csr_outstanding.2368092261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_errors.2409719136 |
| Short name | T241 |
| Test name | |
| Test status | |
| Simulation time | 150674519 ps |
| CPU time | 1.92 seconds |
| Started | Sep 04 06:10:25 AM UTC 24 |
| Finished | Sep 04 06:10:29 AM UTC 24 |
| Peak memory | 233552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2409719136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_tl_errors.2409719136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_intg_err.1657611712 |
| Short name | T450 |
| Test name | |
| Test status | |
| Simulation time | 574152109 ps |
| CPU time | 2.44 seconds |
| Started | Sep 04 06:10:25 AM UTC 24 |
| Finished | Sep 04 06:10:30 AM UTC 24 |
| Peak memory | 217400 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1657611712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_tl_intg_err.1657611712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_mem_rw_with_rand_reset.3295993300 |
| Short name | T3809 |
| Test name | |
| Test status | |
| Simulation time | 144106690 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 06:10:25 AM UTC 24 |
| Finished | Sep 04 06:10:29 AM UTC 24 |
| Peak memory | 226768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3295993300 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_csr_mem_rw_with_rand_reset.3295993300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_rw.2689083362 |
| Short name | T3805 |
| Test name | |
| Test status | |
| Simulation time | 90178460 ps |
| CPU time | 0.92 seconds |
| Started | Sep 04 06:10:25 AM UTC 24 |
| Finished | Sep 04 06:10:29 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2689083362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_csr_rw.2689083362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_intr_test.355540883 |
| Short name | T287 |
| Test name | |
| Test status | |
| Simulation time | 103761200 ps |
| CPU time | 0.81 seconds |
| Started | Sep 04 06:10:25 AM UTC 24 |
| Finished | Sep 04 06:10:28 AM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=355540883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 6.usbdev_intr_test.355540883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_same_csr_outstanding.2481322688 |
| Short name | T3810 |
| Test name | |
| Test status | |
| Simulation time | 167012467 ps |
| CPU time | 1.63 seconds |
| Started | Sep 04 06:10:25 AM UTC 24 |
| Finished | Sep 04 06:10:29 AM UTC 24 |
| Peak memory | 216956 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2481322688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_same_csr_outstanding.2481322688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_errors.2781237771 |
| Short name | T243 |
| Test name | |
| Test status | |
| Simulation time | 111244032 ps |
| CPU time | 1.79 seconds |
| Started | Sep 04 06:10:25 AM UTC 24 |
| Finished | Sep 04 06:10:29 AM UTC 24 |
| Peak memory | 226780 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2781237771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_tl_errors.2781237771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_intg_err.4268020874 |
| Short name | T3813 |
| Test name | |
| Test status | |
| Simulation time | 472737255 ps |
| CPU time | 2.41 seconds |
| Started | Sep 04 06:10:25 AM UTC 24 |
| Finished | Sep 04 06:10:30 AM UTC 24 |
| Peak memory | 217420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4268020874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_tl_intg_err.4268020874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_mem_rw_with_rand_reset.596577414 |
| Short name | T3816 |
| Test name | |
| Test status | |
| Simulation time | 181226001 ps |
| CPU time | 1.75 seconds |
| Started | Sep 04 06:10:27 AM UTC 24 |
| Finished | Sep 04 06:10:30 AM UTC 24 |
| Peak memory | 226812 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=596577414 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_csr_mem_rw_with_rand_reset.596577414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_intr_test.68816322 |
| Short name | T290 |
| Test name | |
| Test status | |
| Simulation time | 40374938 ps |
| CPU time | 0.64 seconds |
| Started | Sep 04 06:10:27 AM UTC 24 |
| Finished | Sep 04 06:10:29 AM UTC 24 |
| Peak memory | 216832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=68816322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_com mon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg _top.vdb -cm_log /dev/null -cm_name 7.usbdev_intr_test.68816322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_same_csr_outstanding.2431062979 |
| Short name | T3815 |
| Test name | |
| Test status | |
| Simulation time | 276937689 ps |
| CPU time | 1.6 seconds |
| Started | Sep 04 06:10:27 AM UTC 24 |
| Finished | Sep 04 06:10:30 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2431062979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_same_csr_outstanding.2431062979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_errors.4070612365 |
| Short name | T3811 |
| Test name | |
| Test status | |
| Simulation time | 76625232 ps |
| CPU time | 1.76 seconds |
| Started | Sep 04 06:10:25 AM UTC 24 |
| Finished | Sep 04 06:10:30 AM UTC 24 |
| Peak memory | 216776 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4070612365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_tl_errors.4070612365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_intg_err.3282529281 |
| Short name | T3819 |
| Test name | |
| Test status | |
| Simulation time | 398373683 ps |
| CPU time | 2.51 seconds |
| Started | Sep 04 06:10:27 AM UTC 24 |
| Finished | Sep 04 06:10:31 AM UTC 24 |
| Peak memory | 217420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3282529281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_tl_intg_err.3282529281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_mem_rw_with_rand_reset.600002657 |
| Short name | T3818 |
| Test name | |
| Test status | |
| Simulation time | 158639362 ps |
| CPU time | 1.94 seconds |
| Started | Sep 04 06:10:28 AM UTC 24 |
| Finished | Sep 04 06:10:31 AM UTC 24 |
| Peak memory | 230908 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=600002657 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_csr_mem_rw_with_rand_reset.600002657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_rw.3494115725 |
| Short name | T3801 |
| Test name | |
| Test status | |
| Simulation time | 62126343 ps |
| CPU time | 0.85 seconds |
| Started | Sep 04 06:10:28 AM UTC 24 |
| Finished | Sep 04 06:10:30 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3494115725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_csr_rw.3494115725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_intr_test.2891858192 |
| Short name | T285 |
| Test name | |
| Test status | |
| Simulation time | 42170814 ps |
| CPU time | 0.71 seconds |
| Started | Sep 04 06:10:28 AM UTC 24 |
| Finished | Sep 04 06:10:29 AM UTC 24 |
| Peak memory | 216768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2891858192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_intr_test.2891858192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_same_csr_outstanding.1139270858 |
| Short name | T3814 |
| Test name | |
| Test status | |
| Simulation time | 130606885 ps |
| CPU time | 1.07 seconds |
| Started | Sep 04 06:10:28 AM UTC 24 |
| Finished | Sep 04 06:10:30 AM UTC 24 |
| Peak memory | 216896 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1139270858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_same_csr_outstanding.1139270858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_errors.3070835609 |
| Short name | T244 |
| Test name | |
| Test status | |
| Simulation time | 98017213 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 06:10:27 AM UTC 24 |
| Finished | Sep 04 06:10:30 AM UTC 24 |
| Peak memory | 216776 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3070835609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_tl_errors.3070835609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_mem_rw_with_rand_reset.2463188625 |
| Short name | T3828 |
| Test name | |
| Test status | |
| Simulation time | 143808791 ps |
| CPU time | 1.6 seconds |
| Started | Sep 04 06:10:34 AM UTC 24 |
| Finished | Sep 04 06:10:37 AM UTC 24 |
| Peak memory | 230912 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2463188625 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_csr_mem_rw_with_rand_reset.2463188625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_rw.2938284179 |
| Short name | T275 |
| Test name | |
| Test status | |
| Simulation time | 66452379 ps |
| CPU time | 0.73 seconds |
| Started | Sep 04 06:10:28 AM UTC 24 |
| Finished | Sep 04 06:10:30 AM UTC 24 |
| Peak memory | 216824 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2938284179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_csr_rw.2938284179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_intr_test.1164506863 |
| Short name | T288 |
| Test name | |
| Test status | |
| Simulation time | 105441700 ps |
| CPU time | 0.83 seconds |
| Started | Sep 04 06:10:28 AM UTC 24 |
| Finished | Sep 04 06:10:30 AM UTC 24 |
| Peak memory | 216268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1164506863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_intr_test.1164506863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_same_csr_outstanding.2965291421 |
| Short name | T3817 |
| Test name | |
| Test status | |
| Simulation time | 210324156 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 06:10:28 AM UTC 24 |
| Finished | Sep 04 06:10:31 AM UTC 24 |
| Peak memory | 216856 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2965291421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_same_csr_outstanding.2965291421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_errors.3769444043 |
| Short name | T245 |
| Test name | |
| Test status | |
| Simulation time | 143689852 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 06:10:28 AM UTC 24 |
| Finished | Sep 04 06:10:30 AM UTC 24 |
| Peak memory | 216828 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3769444043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_tl_errors.3769444043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_intg_err.2288042113 |
| Short name | T3821 |
| Test name | |
| Test status | |
| Simulation time | 361379900 ps |
| CPU time | 2.44 seconds |
| Started | Sep 04 06:10:28 AM UTC 24 |
| Finished | Sep 04 06:10:31 AM UTC 24 |
| Peak memory | 217484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2288042113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_tl_intg_err.2288042113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_reset.3787105934 |
| Short name | T7 |
| Test name | |
| Test status | |
| Simulation time | 14017119578 ps |
| CPU time | 19.24 seconds |
| Started | Sep 04 05:39:00 AM UTC 24 |
| Finished | Sep 04 05:39:21 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3787105934 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_reset.3787105934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_resume.1306357294 |
| Short name | T8 |
| Test name | |
| Test status | |
| Simulation time | 24393337786 ps |
| CPU time | 73.05 seconds |
| Started | Sep 04 05:39:01 AM UTC 24 |
| Finished | Sep 04 05:40:16 AM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1306357294 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_resume.1306357294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_av_buffer.2866869188 |
| Short name | T2 |
| Test name | |
| Test status | |
| Simulation time | 155822496 ps |
| CPU time | 1.05 seconds |
| Started | Sep 04 05:39:07 AM UTC 24 |
| Finished | Sep 04 05:39:09 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2866869188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_av_buffer.2866869188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_clear.627246585 |
| Short name | T18 |
| Test name | |
| Test status | |
| Simulation time | 369851997 ps |
| CPU time | 2.44 seconds |
| Started | Sep 04 05:39:09 AM UTC 24 |
| Finished | Sep 04 05:39:13 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=627246585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_data_toggle_clear.627246585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_device_timeout.4181875496 |
| Short name | T26 |
| Test name | |
| Test status | |
| Simulation time | 890584714 ps |
| CPU time | 8.11 seconds |
| Started | Sep 04 05:39:12 AM UTC 24 |
| Finished | Sep 04 05:39:21 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4181875496 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_device_timeout.4181875496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_disable_endpoint.3519337099 |
| Short name | T22 |
| Test name | |
| Test status | |
| Simulation time | 721981358 ps |
| CPU time | 3.55 seconds |
| Started | Sep 04 05:39:12 AM UTC 24 |
| Finished | Sep 04 05:39:16 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3519337099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_disable_endpoint.3519337099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_enable.3894431442 |
| Short name | T35 |
| Test name | |
| Test status | |
| Simulation time | 39549891 ps |
| CPU time | 1.03 seconds |
| Started | Sep 04 05:39:15 AM UTC 24 |
| Finished | Sep 04 05:39:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3894431442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 0.usbdev_enable.3894431442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_access.187672835 |
| Short name | T27 |
| Test name | |
| Test status | |
| Simulation time | 961324128 ps |
| CPU time | 3.14 seconds |
| Started | Sep 04 05:39:17 AM UTC 24 |
| Finished | Sep 04 05:39:21 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=187672835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_endpoint_access.187672835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_types.2564295861 |
| Short name | T84 |
| Test name | |
| Test status | |
| Simulation time | 282894741 ps |
| CPU time | 1.69 seconds |
| Started | Sep 04 05:39:17 AM UTC 24 |
| Finished | Sep 04 05:39:20 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2564295861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_endpoint_types.2564295861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_freq_hiclk_max.2504805230 |
| Short name | T658 |
| Test name | |
| Test status | |
| Simulation time | 120340804069 ps |
| CPU time | 278.05 seconds |
| Started | Sep 04 05:39:21 AM UTC 24 |
| Finished | Sep 04 05:44:03 AM UTC 24 |
| Peak memory | 217476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=2504805230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 0.usbdev_freq_hiclk_max.2504805230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_freq_loclk.679833057 |
| Short name | T585 |
| Test name | |
| Test status | |
| Simulation time | 93122530386 ps |
| CPU time | 211.61 seconds |
| Started | Sep 04 05:39:22 AM UTC 24 |
| Finished | Sep 04 05:42:56 AM UTC 24 |
| Peak memory | 217392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=679833057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_loclk.679833057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_freq_loclk_max.647547079 |
| Short name | T584 |
| Test name | |
| Test status | |
| Simulation time | 95069876472 ps |
| CPU time | 198.57 seconds |
| Started | Sep 04 05:39:22 AM UTC 24 |
| Finished | Sep 04 05:42:43 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=647547079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 0.usbdev_freq_loclk_max.647547079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_freq_phase.3313646735 |
| Short name | T587 |
| Test name | |
| Test status | |
| Simulation time | 106133330115 ps |
| CPU time | 228.63 seconds |
| Started | Sep 04 05:39:23 AM UTC 24 |
| Finished | Sep 04 05:43:15 AM UTC 24 |
| Peak memory | 217280 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3313646735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_freq_phase.3313646735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_in_iso.3152915983 |
| Short name | T30 |
| Test name | |
| Test status | |
| Simulation time | 233868828 ps |
| CPU time | 1.69 seconds |
| Started | Sep 04 05:39:30 AM UTC 24 |
| Finished | Sep 04 05:39:33 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3152915983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_in_iso.3152915983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_in_stall.222976969 |
| Short name | T36 |
| Test name | |
| Test status | |
| Simulation time | 167760855 ps |
| CPU time | 1.03 seconds |
| Started | Sep 04 05:39:34 AM UTC 24 |
| Finished | Sep 04 05:39:37 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=222976969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_in_stall.222976969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_in_trans.1064004567 |
| Short name | T31 |
| Test name | |
| Test status | |
| Simulation time | 210056848 ps |
| CPU time | 1.55 seconds |
| Started | Sep 04 05:39:35 AM UTC 24 |
| Finished | Sep 04 05:39:38 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1064004567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_in_trans.1064004567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_sync.1389825549 |
| Short name | T5 |
| Test name | |
| Test status | |
| Simulation time | 4548991714 ps |
| CPU time | 44.12 seconds |
| Started | Sep 04 05:39:26 AM UTC 24 |
| Finished | Sep 04 05:40:12 AM UTC 24 |
| Peak memory | 234108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1389825549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 0.usbdev_invalid_sync.1389825549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_link_in_err.2500447901 |
| Short name | T32 |
| Test name | |
| Test status | |
| Simulation time | 208149290 ps |
| CPU time | 1.62 seconds |
| Started | Sep 04 05:39:40 AM UTC 24 |
| Finished | Sep 04 05:39:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2500447901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_link_in_err.2500447901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_link_out_err.3273390456 |
| Short name | T33 |
| Test name | |
| Test status | |
| Simulation time | 406920023 ps |
| CPU time | 2.3 seconds |
| Started | Sep 04 05:39:40 AM UTC 24 |
| Finished | Sep 04 05:39:43 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3273390456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_link_out_err.3273390456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_link_out_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_link_suspend.3594256099 |
| Short name | T59 |
| Test name | |
| Test status | |
| Simulation time | 5226714524 ps |
| CPU time | 14.07 seconds |
| Started | Sep 04 05:39:45 AM UTC 24 |
| Finished | Sep 04 05:40:00 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3594256099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_link_suspend.3594256099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_max_inter_pkt_delay.2085595249 |
| Short name | T464 |
| Test name | |
| Test status | |
| Simulation time | 2608780204 ps |
| CPU time | 87.58 seconds |
| Started | Sep 04 05:40:01 AM UTC 24 |
| Finished | Sep 04 05:41:31 AM UTC 24 |
| Peak memory | 227628 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2085595249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_inter_pkt_delay.2085595249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_max_length_in_transaction.3161399223 |
| Short name | T34 |
| Test name | |
| Test status | |
| Simulation time | 240074938 ps |
| CPU time | 1.75 seconds |
| Started | Sep 04 05:40:03 AM UTC 24 |
| Finished | Sep 04 05:40:05 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3161399223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 0.usbdev_max_length_in_transaction.3161399223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_max_length_out_transaction.1260998330 |
| Short name | T82 |
| Test name | |
| Test status | |
| Simulation time | 213978524 ps |
| CPU time | 1.23 seconds |
| Started | Sep 04 05:40:05 AM UTC 24 |
| Finished | Sep 04 05:40:07 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1260998330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 0.usbdev_max_length_out_transaction.1260998330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_max_non_iso_usb_traffic.1445270852 |
| Short name | T162 |
| Test name | |
| Test status | |
| Simulation time | 3078127158 ps |
| CPU time | 92.48 seconds |
| Started | Sep 04 05:40:06 AM UTC 24 |
| Finished | Sep 04 05:41:40 AM UTC 24 |
| Peak memory | 234172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1445270852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_non_iso_usb_traffic.1445270852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_max_usb_traffic.1650644548 |
| Short name | T6 |
| Test name | |
| Test status | |
| Simulation time | 2474877486 ps |
| CPU time | 24.37 seconds |
| Started | Sep 04 05:40:07 AM UTC 24 |
| Finished | Sep 04 05:40:33 AM UTC 24 |
| Peak memory | 229604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1650644548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_usb_traffic.1650644548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_min_inter_pkt_delay.1064368884 |
| Short name | T113 |
| Test name | |
| Test status | |
| Simulation time | 2744971727 ps |
| CPU time | 29.66 seconds |
| Started | Sep 04 05:40:08 AM UTC 24 |
| Finished | Sep 04 05:40:39 AM UTC 24 |
| Peak memory | 234188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1064368884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_min_inter_pkt_delay.1064368884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_min_length_in_transaction.78063143 |
| Short name | T590 |
| Test name | |
| Test status | |
| Simulation time | 151087196 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 05:40:10 AM UTC 24 |
| Finished | Sep 04 05:40:13 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=78063143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_ trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 0.usbdev_min_length_in_transaction.78063143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_min_length_out_transaction.3685410577 |
| Short name | T591 |
| Test name | |
| Test status | |
| Simulation time | 142910746 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 05:40:11 AM UTC 24 |
| Finished | Sep 04 05:40:14 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3685410577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 0.usbdev_min_length_out_transaction.3685410577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.1468145800 |
| Short name | T69 |
| Test name | |
| Test status | |
| Simulation time | 510957790 ps |
| CPU time | 2.87 seconds |
| Started | Sep 04 05:40:13 AM UTC 24 |
| Finished | Sep 04 05:40:16 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1468145800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.1468145800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_out_iso.1570961245 |
| Short name | T86 |
| Test name | |
| Test status | |
| Simulation time | 148211755 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 05:40:14 AM UTC 24 |
| Finished | Sep 04 05:40:16 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1570961245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_out_iso.1570961245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_out_trans_nak.574434919 |
| Short name | T426 |
| Test name | |
| Test status | |
| Simulation time | 208416180 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 05:40:16 AM UTC 24 |
| Finished | Sep 04 05:40:18 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=574434919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_out_trans_nak.574434919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_pending_in_trans.4235193050 |
| Short name | T87 |
| Test name | |
| Test status | |
| Simulation time | 156950726 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 05:40:16 AM UTC 24 |
| Finished | Sep 04 05:40:18 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4235193050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_pending_in_trans.4235193050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_eop_single_bit_handling.4015319328 |
| Short name | T83 |
| Test name | |
| Test status | |
| Simulation time | 173729925 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 05:40:17 AM UTC 24 |
| Finished | Sep 04 05:40:20 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4015319328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_eop_single_ bit_handling_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_eop_single_bit_handling.4015319328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_phy_config_eop_single_bit_handling/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_pinflip.3814454456 |
| Short name | T47 |
| Test name | |
| Test status | |
| Simulation time | 278959736 ps |
| CPU time | 1.9 seconds |
| Started | Sep 04 05:40:17 AM UTC 24 |
| Finished | Sep 04 05:40:20 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3814454456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_pinflip.3814454456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_rand_bus_type.4020474138 |
| Short name | T46 |
| Test name | |
| Test status | |
| Simulation time | 196234334 ps |
| CPU time | 1.73 seconds |
| Started | Sep 04 05:40:17 AM UTC 24 |
| Finished | Sep 04 05:40:20 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4020474138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 0.usbdev_phy_config_rand_bus_type.4020474138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_rx_dp_dn.117705145 |
| Short name | T45 |
| Test name | |
| Test status | |
| Simulation time | 201398970 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 05:40:17 AM UTC 24 |
| Finished | Sep 04 05:40:20 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_diff_rcvr=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=117705145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -c m_log /dev/null -cm_name 0.usbdev_phy_config_rx_dp_dn.117705145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_phy_config_rx_dp_dn/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_use_d_se0.1676562768 |
| Short name | T93 |
| Test name | |
| Test status | |
| Simulation time | 215544910 ps |
| CPU time | 1.66 seconds |
| Started | Sep 04 05:40:19 AM UTC 24 |
| Finished | Sep 04 05:40:22 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +tx_use_d_se0=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1676562768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 0.usbdev_phy_config_tx_use_d_se0.1676562768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_phy_config_tx_use_d_se0/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_phy_pins_sense.2894309430 |
| Short name | T23 |
| Test name | |
| Test status | |
| Simulation time | 33120416 ps |
| CPU time | 1.06 seconds |
| Started | Sep 04 05:40:21 AM UTC 24 |
| Finished | Sep 04 05:40:23 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2894309430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_pins_sense.2894309430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_received.2460970192 |
| Short name | T441 |
| Test name | |
| Test status | |
| Simulation time | 176959807 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 05:40:21 AM UTC 24 |
| Finished | Sep 04 05:40:23 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2460970192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_pkt_received.2460970192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_sent.2140270130 |
| Short name | T48 |
| Test name | |
| Test status | |
| Simulation time | 212675867 ps |
| CPU time | 1.65 seconds |
| Started | Sep 04 05:40:23 AM UTC 24 |
| Finished | Sep 04 05:40:25 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2140270130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_pkt_sent.2140270130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_rand_bus_resets.2200951779 |
| Short name | T153 |
| Test name | |
| Test status | |
| Simulation time | 2979535120 ps |
| CPU time | 30.64 seconds |
| Started | Sep 04 05:40:24 AM UTC 24 |
| Finished | Sep 04 05:40:56 AM UTC 24 |
| Peak memory | 234196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2200951779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_bus_resets.2200951779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_rand_suspends.3881217577 |
| Short name | T98 |
| Test name | |
| Test status | |
| Simulation time | 5637703664 ps |
| CPU time | 26.52 seconds |
| Started | Sep 04 05:40:26 AM UTC 24 |
| Finished | Sep 04 05:40:54 AM UTC 24 |
| Peak memory | 229716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3881217577 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_suspends.3881217577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_random_length_in_transaction.884180150 |
| Short name | T493 |
| Test name | |
| Test status | |
| Simulation time | 162153244 ps |
| CPU time | 1.14 seconds |
| Started | Sep 04 05:40:23 AM UTC 24 |
| Finished | Sep 04 05:40:25 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=884180150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_random_length_in_transaction.884180150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_random_length_out_transaction.1890622169 |
| Short name | T94 |
| Test name | |
| Test status | |
| Simulation time | 177244553 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 05:40:24 AM UTC 24 |
| Finished | Sep 04 05:40:27 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1890622169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 0.usbdev_random_length_out_transaction.1890622169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_resume_link_active.2106807094 |
| Short name | T95 |
| Test name | |
| Test status | |
| Simulation time | 20152448019 ps |
| CPU time | 35.09 seconds |
| Started | Sep 04 05:40:26 AM UTC 24 |
| Finished | Sep 04 05:41:03 AM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2106807094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 0.usbdev_resume_link_active.2106807094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority_over_stall_response.3674076346 |
| Short name | T106 |
| Test name | |
| Test status | |
| Simulation time | 223133881 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 05:40:31 AM UTC 24 |
| Finished | Sep 04 05:40:33 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3674076346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 0.usbdev_setup_priority_over_stall_response.3674076346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_setup_stage.2707200076 |
| Short name | T592 |
| Test name | |
| Test status | |
| Simulation time | 172990961 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 05:40:32 AM UTC 24 |
| Finished | Sep 04 05:40:34 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2707200076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_setup_stage.2707200076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_setup_trans_ignored.3767492630 |
| Short name | T187 |
| Test name | |
| Test status | |
| Simulation time | 149900171 ps |
| CPU time | 1.12 seconds |
| Started | Sep 04 05:40:33 AM UTC 24 |
| Finished | Sep 04 05:40:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3767492630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 0.usbdev_setup_trans_ignored.3767492630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_smoke.2888588058 |
| Short name | T155 |
| Test name | |
| Test status | |
| Simulation time | 195688324 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 05:40:34 AM UTC 24 |
| Finished | Sep 04 05:40:37 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2888588058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_smoke.2888588058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_stall_trans.3878366526 |
| Short name | T238 |
| Test name | |
| Test status | |
| Simulation time | 179467755 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 05:40:36 AM UTC 24 |
| Finished | Sep 04 05:40:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3878366526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_stall_trans.3878366526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_stream_len_max.5937973 |
| Short name | T227 |
| Test name | |
| Test status | |
| Simulation time | 1073321676 ps |
| CPU time | 5.42 seconds |
| Started | Sep 04 05:40:36 AM UTC 24 |
| Finished | Sep 04 05:40:42 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=5937973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_stream_len_max.5937973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_streaming_out.3410066439 |
| Short name | T177 |
| Test name | |
| Test status | |
| Simulation time | 2481946622 ps |
| CPU time | 79.8 seconds |
| Started | Sep 04 05:40:36 AM UTC 24 |
| Finished | Sep 04 05:41:57 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3410066439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_streaming_out.3410066439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/0.usbdev_timeout_missing_host_handshake.3229634889 |
| Short name | T20 |
| Test name | |
| Test status | |
| Simulation time | 172274870 ps |
| CPU time | 1.37 seconds |
| Started | Sep 04 05:39:12 AM UTC 24 |
| Finished | Sep 04 05:39:14 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3229634889 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_timeout_missing_host_handshake.3229634889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/0.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_alert_test.169455375 |
| Short name | T202 |
| Test name | |
| Test status | |
| Simulation time | 46788081 ps |
| CPU time | 1.06 seconds |
| Started | Sep 04 05:42:02 AM UTC 24 |
| Finished | Sep 04 05:42:04 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=169455375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 1.usbdev_alert_test.169455375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_disconnect.108817120 |
| Short name | T9 |
| Test name | |
| Test status | |
| Simulation time | 10674782245 ps |
| CPU time | 23.15 seconds |
| Started | Sep 04 05:40:40 AM UTC 24 |
| Finished | Sep 04 05:41:04 AM UTC 24 |
| Peak memory | 217436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=108817120 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_disconnect.108817120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_reset.1924957562 |
| Short name | T10 |
| Test name | |
| Test status | |
| Simulation time | 14743684510 ps |
| CPU time | 21.15 seconds |
| Started | Sep 04 05:40:42 AM UTC 24 |
| Finished | Sep 04 05:41:04 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1924957562 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_reset.1924957562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_resume.1547925556 |
| Short name | T11 |
| Test name | |
| Test status | |
| Simulation time | 30126535952 ps |
| CPU time | 46.04 seconds |
| Started | Sep 04 05:40:42 AM UTC 24 |
| Finished | Sep 04 05:41:29 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1547925556 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_resume.1547925556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_av_buffer.3948942556 |
| Short name | T593 |
| Test name | |
| Test status | |
| Simulation time | 189606252 ps |
| CPU time | 1.57 seconds |
| Started | Sep 04 05:40:42 AM UTC 24 |
| Finished | Sep 04 05:40:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3948942556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_av_buffer.3948942556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_av_overflow.3543171207 |
| Short name | T61 |
| Test name | |
| Test status | |
| Simulation time | 163235805 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 05:40:45 AM UTC 24 |
| Finished | Sep 04 05:40:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3543171207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_av_overflow.3543171207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_bitstuff_err.3496898463 |
| Short name | T80 |
| Test name | |
| Test status | |
| Simulation time | 176055958 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 05:40:46 AM UTC 24 |
| Finished | Sep 04 05:40:49 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3496898463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_bitstuff_err.3496898463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_clear.3678612263 |
| Short name | T225 |
| Test name | |
| Test status | |
| Simulation time | 178567321 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 05:40:46 AM UTC 24 |
| Finished | Sep 04 05:40:49 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3678612263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 1.usbdev_data_toggle_clear.3678612263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_restore.925830367 |
| Short name | T107 |
| Test name | |
| Test status | |
| Simulation time | 591051369 ps |
| CPU time | 3.27 seconds |
| Started | Sep 04 05:40:48 AM UTC 24 |
| Finished | Sep 04 05:40:53 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=925830367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_data_toggle_restore.925830367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_device_address.1429945627 |
| Short name | T111 |
| Test name | |
| Test status | |
| Simulation time | 23001741908 ps |
| CPU time | 79.06 seconds |
| Started | Sep 04 05:40:49 AM UTC 24 |
| Finished | Sep 04 05:42:10 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1429945627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_device_address.1429945627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_device_timeout.1086545750 |
| Short name | T176 |
| Test name | |
| Test status | |
| Simulation time | 318344677 ps |
| CPU time | 4.56 seconds |
| Started | Sep 04 05:40:50 AM UTC 24 |
| Finished | Sep 04 05:40:55 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1086545750 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_device_timeout.1086545750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_disable_endpoint.3509082359 |
| Short name | T226 |
| Test name | |
| Test status | |
| Simulation time | 704683632 ps |
| CPU time | 3.68 seconds |
| Started | Sep 04 05:40:54 AM UTC 24 |
| Finished | Sep 04 05:40:58 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3509082359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 1.usbdev_disable_endpoint.3509082359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_disconnected.3305147204 |
| Short name | T63 |
| Test name | |
| Test status | |
| Simulation time | 146399822 ps |
| CPU time | 1.32 seconds |
| Started | Sep 04 05:40:55 AM UTC 24 |
| Finished | Sep 04 05:40:57 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3305147204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_disconnected.3305147204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_enable.2175081637 |
| Short name | T239 |
| Test name | |
| Test status | |
| Simulation time | 36536625 ps |
| CPU time | 1.05 seconds |
| Started | Sep 04 05:40:56 AM UTC 24 |
| Finished | Sep 04 05:40:58 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2175081637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 1.usbdev_enable.2175081637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_access.3909783884 |
| Short name | T154 |
| Test name | |
| Test status | |
| Simulation time | 881001451 ps |
| CPU time | 4.45 seconds |
| Started | Sep 04 05:40:57 AM UTC 24 |
| Finished | Sep 04 05:41:03 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3909783884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_endpoint_access.3909783884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_types.2266378081 |
| Short name | T192 |
| Test name | |
| Test status | |
| Simulation time | 213934608 ps |
| CPU time | 1.61 seconds |
| Started | Sep 04 05:40:58 AM UTC 24 |
| Finished | Sep 04 05:41:01 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2266378081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_endpoint_types.2266378081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_fifo_rst.408670807 |
| Short name | T279 |
| Test name | |
| Test status | |
| Simulation time | 320251945 ps |
| CPU time | 2.46 seconds |
| Started | Sep 04 05:40:59 AM UTC 24 |
| Finished | Sep 04 05:41:03 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=408670807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_fifo_rst.408670807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_freq_hiclk_max.1070057994 |
| Short name | T642 |
| Test name | |
| Test status | |
| Simulation time | 87237649164 ps |
| CPU time | 157.73 seconds |
| Started | Sep 04 05:41:01 AM UTC 24 |
| Finished | Sep 04 05:43:41 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=1070057994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 1.usbdev_freq_hiclk_max.1070057994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_freq_loclk.1424345128 |
| Short name | T664 |
| Test name | |
| Test status | |
| Simulation time | 93151658784 ps |
| CPU time | 192.79 seconds |
| Started | Sep 04 05:41:02 AM UTC 24 |
| Finished | Sep 04 05:44:18 AM UTC 24 |
| Peak memory | 217352 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1424345128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_loclk.1424345128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_freq_loclk_max.1752931862 |
| Short name | T639 |
| Test name | |
| Test status | |
| Simulation time | 86001078684 ps |
| CPU time | 151.16 seconds |
| Started | Sep 04 05:41:02 AM UTC 24 |
| Finished | Sep 04 05:43:36 AM UTC 24 |
| Peak memory | 217348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=1752931862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 1.usbdev_freq_loclk_max.1752931862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_freq_phase.725072633 |
| Short name | T641 |
| Test name | |
| Test status | |
| Simulation time | 82241335141 ps |
| CPU time | 154.36 seconds |
| Started | Sep 04 05:41:04 AM UTC 24 |
| Finished | Sep 04 05:43:40 AM UTC 24 |
| Peak memory | 217272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=725072633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_phase.725072633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_in_iso.480944800 |
| Short name | T105 |
| Test name | |
| Test status | |
| Simulation time | 234101501 ps |
| CPU time | 2.18 seconds |
| Started | Sep 04 05:41:04 AM UTC 24 |
| Finished | Sep 04 05:41:07 AM UTC 24 |
| Peak memory | 227480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=480944800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_in_iso.480944800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_in_stall.225758359 |
| Short name | T280 |
| Test name | |
| Test status | |
| Simulation time | 194407826 ps |
| CPU time | 0.95 seconds |
| Started | Sep 04 05:41:04 AM UTC 24 |
| Finished | Sep 04 05:41:06 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=225758359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_in_stall.225758359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_in_trans.811824234 |
| Short name | T281 |
| Test name | |
| Test status | |
| Simulation time | 167286903 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 05:41:04 AM UTC 24 |
| Finished | Sep 04 05:41:06 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=811824234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_in_trans.811824234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_invalid_sync.987194134 |
| Short name | T110 |
| Test name | |
| Test status | |
| Simulation time | 5082312661 ps |
| CPU time | 55.54 seconds |
| Started | Sep 04 05:41:04 AM UTC 24 |
| Finished | Sep 04 05:42:01 AM UTC 24 |
| Peak memory | 229592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=987194134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 1.usbdev_invalid_sync.987194134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_iso_retraction.37364335 |
| Short name | T90 |
| Test name | |
| Test status | |
| Simulation time | 8863297821 ps |
| CPU time | 82.7 seconds |
| Started | Sep 04 05:41:05 AM UTC 24 |
| Finished | Sep 04 05:42:29 AM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=37364335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 1.usbdev_iso_retraction.37364335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_link_in_err.2868962685 |
| Short name | T594 |
| Test name | |
| Test status | |
| Simulation time | 151903744 ps |
| CPU time | 1.33 seconds |
| Started | Sep 04 05:41:05 AM UTC 24 |
| Finished | Sep 04 05:41:07 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2868962685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_link_in_err.2868962685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_link_resume.3907773688 |
| Short name | T67 |
| Test name | |
| Test status | |
| Simulation time | 23589280922 ps |
| CPU time | 46.8 seconds |
| Started | Sep 04 05:41:06 AM UTC 24 |
| Finished | Sep 04 05:41:54 AM UTC 24 |
| Peak memory | 227460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3907773688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_link_resume.3907773688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_link_suspend.1133564661 |
| Short name | T104 |
| Test name | |
| Test status | |
| Simulation time | 9745593467 ps |
| CPU time | 28.36 seconds |
| Started | Sep 04 05:41:07 AM UTC 24 |
| Finished | Sep 04 05:41:37 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1133564661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_link_suspend.1133564661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_low_speed_traffic.2561571123 |
| Short name | T189 |
| Test name | |
| Test status | |
| Simulation time | 4911762168 ps |
| CPU time | 64.59 seconds |
| Started | Sep 04 05:41:08 AM UTC 24 |
| Finished | Sep 04 05:42:15 AM UTC 24 |
| Peak memory | 227612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2561571123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_low_speed_traffic.2561571123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_max_inter_pkt_delay.3750921851 |
| Short name | T240 |
| Test name | |
| Test status | |
| Simulation time | 3260847289 ps |
| CPU time | 30.78 seconds |
| Started | Sep 04 05:41:08 AM UTC 24 |
| Finished | Sep 04 05:41:40 AM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3750921851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_inter_pkt_delay.3750921851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_max_length_in_transaction.3732961725 |
| Short name | T595 |
| Test name | |
| Test status | |
| Simulation time | 230396706 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 05:41:12 AM UTC 24 |
| Finished | Sep 04 05:41:15 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3732961725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_max_length_in_transaction.3732961725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_max_length_out_transaction.2266412029 |
| Short name | T596 |
| Test name | |
| Test status | |
| Simulation time | 214294995 ps |
| CPU time | 1.69 seconds |
| Started | Sep 04 05:41:17 AM UTC 24 |
| Finished | Sep 04 05:41:20 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2266412029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 1.usbdev_max_length_out_transaction.2266412029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_max_non_iso_usb_traffic.3649496131 |
| Short name | T607 |
| Test name | |
| Test status | |
| Simulation time | 2717527615 ps |
| CPU time | 37.12 seconds |
| Started | Sep 04 05:41:20 AM UTC 24 |
| Finished | Sep 04 05:41:58 AM UTC 24 |
| Peak memory | 229776 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3649496131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_non_iso_usb_traffic.3649496131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_max_usb_traffic.2004180532 |
| Short name | T159 |
| Test name | |
| Test status | |
| Simulation time | 2342933196 ps |
| CPU time | 23.73 seconds |
| Started | Sep 04 05:41:21 AM UTC 24 |
| Finished | Sep 04 05:41:46 AM UTC 24 |
| Peak memory | 229716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2004180532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_usb_traffic.2004180532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_min_inter_pkt_delay.3130220182 |
| Short name | T640 |
| Test name | |
| Test status | |
| Simulation time | 3758531938 ps |
| CPU time | 124.39 seconds |
| Started | Sep 04 05:41:30 AM UTC 24 |
| Finished | Sep 04 05:43:37 AM UTC 24 |
| Peak memory | 227688 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3130220182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_min_inter_pkt_delay.3130220182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_min_length_in_transaction.805489698 |
| Short name | T597 |
| Test name | |
| Test status | |
| Simulation time | 188730761 ps |
| CPU time | 1.06 seconds |
| Started | Sep 04 05:41:32 AM UTC 24 |
| Finished | Sep 04 05:41:34 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=805489698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 1.usbdev_min_length_in_transaction.805489698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_min_length_out_transaction.1272433789 |
| Short name | T598 |
| Test name | |
| Test status | |
| Simulation time | 151837196 ps |
| CPU time | 1.31 seconds |
| Started | Sep 04 05:41:32 AM UTC 24 |
| Finished | Sep 04 05:41:35 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1272433789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 1.usbdev_min_length_out_transaction.1272433789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_out_iso.3344910820 |
| Short name | T599 |
| Test name | |
| Test status | |
| Simulation time | 181128015 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 05:41:35 AM UTC 24 |
| Finished | Sep 04 05:41:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3344910820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_out_iso.3344910820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_out_stall.1474745047 |
| Short name | T430 |
| Test name | |
| Test status | |
| Simulation time | 159509098 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 05:41:37 AM UTC 24 |
| Finished | Sep 04 05:41:40 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1474745047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_out_stall.1474745047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_out_trans_nak.90155026 |
| Short name | T474 |
| Test name | |
| Test status | |
| Simulation time | 169274462 ps |
| CPU time | 1.36 seconds |
| Started | Sep 04 05:41:38 AM UTC 24 |
| Finished | Sep 04 05:41:41 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=90155026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_out_trans_nak.90155026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_pending_in_trans.21075777 |
| Short name | T178 |
| Test name | |
| Test status | |
| Simulation time | 155410517 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 05:41:39 AM UTC 24 |
| Finished | Sep 04 05:41:41 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=21075777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_pending_in_trans.21075777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_pinflip.2184296775 |
| Short name | T600 |
| Test name | |
| Test status | |
| Simulation time | 257015906 ps |
| CPU time | 1.84 seconds |
| Started | Sep 04 05:41:40 AM UTC 24 |
| Finished | Sep 04 05:41:43 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2184296775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_config_pinflip.2184296775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_rand_bus_type.1263791884 |
| Short name | T601 |
| Test name | |
| Test status | |
| Simulation time | 236138451 ps |
| CPU time | 1.8 seconds |
| Started | Sep 04 05:41:41 AM UTC 24 |
| Finished | Sep 04 05:41:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1263791884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 1.usbdev_phy_config_rand_bus_type.1263791884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_usb_ref_disable.477643288 |
| Short name | T205 |
| Test name | |
| Test status | |
| Simulation time | 160829048 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:41:41 AM UTC 24 |
| Finished | Sep 04 05:41:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=477643288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 1.usbdev_phy_config_usb_ref_disable.477643288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_buffer.1140431727 |
| Short name | T282 |
| Test name | |
| Test status | |
| Simulation time | 20715002434 ps |
| CPU time | 66.36 seconds |
| Started | Sep 04 05:41:42 AM UTC 24 |
| Finished | Sep 04 05:42:50 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1140431727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_pkt_buffer.1140431727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_sent.2910039187 |
| Short name | T602 |
| Test name | |
| Test status | |
| Simulation time | 247412571 ps |
| CPU time | 1.69 seconds |
| Started | Sep 04 05:41:43 AM UTC 24 |
| Finished | Sep 04 05:41:46 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2910039187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_pkt_sent.2910039187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_rand_bus_resets.3549739463 |
| Short name | T161 |
| Test name | |
| Test status | |
| Simulation time | 5480531272 ps |
| CPU time | 33.88 seconds |
| Started | Sep 04 05:41:46 AM UTC 24 |
| Finished | Sep 04 05:42:21 AM UTC 24 |
| Peak memory | 229596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3549739463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_bus_resets.3549739463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_rand_suspends.924969745 |
| Short name | T648 |
| Test name | |
| Test status | |
| Simulation time | 6935242580 ps |
| CPU time | 122.89 seconds |
| Started | Sep 04 05:41:47 AM UTC 24 |
| Finished | Sep 04 05:43:52 AM UTC 24 |
| Peak memory | 229608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=924969745 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_suspends.924969745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_random_length_in_transaction.1654971309 |
| Short name | T604 |
| Test name | |
| Test status | |
| Simulation time | 239203720 ps |
| CPU time | 1.6 seconds |
| Started | Sep 04 05:41:44 AM UTC 24 |
| Finished | Sep 04 05:41:47 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1654971309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 1.usbdev_random_length_in_transaction.1654971309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_random_length_out_transaction.3399227301 |
| Short name | T603 |
| Test name | |
| Test status | |
| Simulation time | 156037732 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 05:41:45 AM UTC 24 |
| Finished | Sep 04 05:41:47 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3399227301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 1.usbdev_random_length_out_transaction.3399227301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_resume_link_active.140927456 |
| Short name | T96 |
| Test name | |
| Test status | |
| Simulation time | 20167957365 ps |
| CPU time | 33.84 seconds |
| Started | Sep 04 05:41:47 AM UTC 24 |
| Finished | Sep 04 05:42:22 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=140927456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 1.usbdev_resume_link_active.140927456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_rx_crc_err.1026398510 |
| Short name | T72 |
| Test name | |
| Test status | |
| Simulation time | 201820229 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 05:41:48 AM UTC 24 |
| Finished | Sep 04 05:41:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1026398510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_rx_crc_err.1026398510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_rx_full.1459625638 |
| Short name | T52 |
| Test name | |
| Test status | |
| Simulation time | 365735342 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 05:41:48 AM UTC 24 |
| Finished | Sep 04 05:41:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1459625638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_rx_full.1459625638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_rx_pid_err.3178733244 |
| Short name | T75 |
| Test name | |
| Test status | |
| Simulation time | 159077724 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 05:41:51 AM UTC 24 |
| Finished | Sep 04 05:41:53 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3178733244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_rx_pid_err.3178733244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_sec_cm.4178543835 |
| Short name | T208 |
| Test name | |
| Test status | |
| Simulation time | 656257286 ps |
| CPU time | 2.85 seconds |
| Started | Sep 04 05:42:02 AM UTC 24 |
| Finished | Sep 04 05:42:06 AM UTC 24 |
| Peak memory | 251552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4178543835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 1.usbdev_sec_cm.4178543835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_setup_priority.531159155 |
| Short name | T465 |
| Test name | |
| Test status | |
| Simulation time | 440318711 ps |
| CPU time | 2.89 seconds |
| Started | Sep 04 05:41:51 AM UTC 24 |
| Finished | Sep 04 05:41:55 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=531159155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 1.usbdev_setup_priority.531159155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_setup_priority_over_stall_response.2419947032 |
| Short name | T163 |
| Test name | |
| Test status | |
| Simulation time | 203074779 ps |
| CPU time | 1.6 seconds |
| Started | Sep 04 05:41:53 AM UTC 24 |
| Finished | Sep 04 05:41:56 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2419947032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 1.usbdev_setup_priority_over_stall_response.2419947032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_setup_stage.2356130198 |
| Short name | T605 |
| Test name | |
| Test status | |
| Simulation time | 173241393 ps |
| CPU time | 1.29 seconds |
| Started | Sep 04 05:41:54 AM UTC 24 |
| Finished | Sep 04 05:41:57 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2356130198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_setup_stage.2356130198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_setup_trans_ignored.108980189 |
| Short name | T188 |
| Test name | |
| Test status | |
| Simulation time | 181328889 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 05:41:55 AM UTC 24 |
| Finished | Sep 04 05:41:58 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=108980189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 1.usbdev_setup_trans_ignored.108980189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_smoke.1074515352 |
| Short name | T606 |
| Test name | |
| Test status | |
| Simulation time | 224173112 ps |
| CPU time | 1.67 seconds |
| Started | Sep 04 05:41:56 AM UTC 24 |
| Finished | Sep 04 05:41:58 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1074515352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_smoke.1074515352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_spurious_pids_ignored.2917072695 |
| Short name | T650 |
| Test name | |
| Test status | |
| Simulation time | 3009936743 ps |
| CPU time | 114.73 seconds |
| Started | Sep 04 05:41:57 AM UTC 24 |
| Finished | Sep 04 05:43:54 AM UTC 24 |
| Peak memory | 229524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2917072695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 1.usbdev_spurious_pids_ignored.2917072695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_stall_priority_over_nak.455704132 |
| Short name | T432 |
| Test name | |
| Test status | |
| Simulation time | 150820797 ps |
| CPU time | 1.2 seconds |
| Started | Sep 04 05:41:58 AM UTC 24 |
| Finished | Sep 04 05:42:00 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=455704132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stall_priority_over_nak.455704132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_stall_trans.116743422 |
| Short name | T609 |
| Test name | |
| Test status | |
| Simulation time | 147020611 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 05:41:59 AM UTC 24 |
| Finished | Sep 04 05:42:01 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=116743422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_stall_trans.116743422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_stream_len_max.2780390257 |
| Short name | T610 |
| Test name | |
| Test status | |
| Simulation time | 629035928 ps |
| CPU time | 2.68 seconds |
| Started | Sep 04 05:41:59 AM UTC 24 |
| Finished | Sep 04 05:42:03 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2780390257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stream_len_max.2780390257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_streaming_out.1405832849 |
| Short name | T614 |
| Test name | |
| Test status | |
| Simulation time | 2291101487 ps |
| CPU time | 31.22 seconds |
| Started | Sep 04 05:41:59 AM UTC 24 |
| Finished | Sep 04 05:42:32 AM UTC 24 |
| Peak memory | 227400 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1405832849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_streaming_out.1405832849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_stress_usb_traffic.128911250 |
| Short name | T78 |
| Test name | |
| Test status | |
| Simulation time | 8341414620 ps |
| CPU time | 157.08 seconds |
| Started | Sep 04 05:42:00 AM UTC 24 |
| Finished | Sep 04 05:44:40 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=128911250 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_0 3/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stress_usb_traffic.128911250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_timeout_missing_host_handshake.4288636032 |
| Short name | T180 |
| Test name | |
| Test status | |
| Simulation time | 1700995476 ps |
| CPU time | 56.74 seconds |
| Started | Sep 04 05:40:54 AM UTC 24 |
| Finished | Sep 04 05:41:52 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4288636032 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_timeout_missing_host_handshake.4288636032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/1.usbdev_tx_rx_disruption.2824872808 |
| Short name | T160 |
| Test name | |
| Test status | |
| Simulation time | 502171494 ps |
| CPU time | 2.47 seconds |
| Started | Sep 04 05:42:02 AM UTC 24 |
| Finished | Sep 04 05:42:05 AM UTC 24 |
| Peak memory | 216400 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2824872808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_tx _rx_disruption.2824872808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/1.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_alert_test.3186059906 |
| Short name | T1082 |
| Test name | |
| Test status | |
| Simulation time | 34125330 ps |
| CPU time | 0.98 seconds |
| Started | Sep 04 05:50:25 AM UTC 24 |
| Finished | Sep 04 05:50:27 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3186059906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 10.usbdev_alert_test.3186059906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_disconnect.1035900912 |
| Short name | T1065 |
| Test name | |
| Test status | |
| Simulation time | 10360179941 ps |
| CPU time | 31.93 seconds |
| Started | Sep 04 05:49:43 AM UTC 24 |
| Finished | Sep 04 05:50:16 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1035900912 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_disconnect.1035900912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_reset.3666709933 |
| Short name | T232 |
| Test name | |
| Test status | |
| Simulation time | 20603466568 ps |
| CPU time | 24.7 seconds |
| Started | Sep 04 05:49:43 AM UTC 24 |
| Finished | Sep 04 05:50:09 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3666709933 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_reset.3666709933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_resume.4275081930 |
| Short name | T1088 |
| Test name | |
| Test status | |
| Simulation time | 25067072085 ps |
| CPU time | 44.7 seconds |
| Started | Sep 04 05:49:44 AM UTC 24 |
| Finished | Sep 04 05:50:30 AM UTC 24 |
| Peak memory | 227668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4275081930 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_resume.4275081930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_av_buffer.3122839519 |
| Short name | T1028 |
| Test name | |
| Test status | |
| Simulation time | 164568589 ps |
| CPU time | 1.36 seconds |
| Started | Sep 04 05:49:44 AM UTC 24 |
| Finished | Sep 04 05:49:47 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3122839519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_av_buffer.3122839519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_bitstuff_err.2028819386 |
| Short name | T1029 |
| Test name | |
| Test status | |
| Simulation time | 148862126 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:49:44 AM UTC 24 |
| Finished | Sep 04 05:49:47 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2028819386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_bitstuff_err.2028819386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_data_toggle_clear.362273561 |
| Short name | T1031 |
| Test name | |
| Test status | |
| Simulation time | 158817719 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 05:49:45 AM UTC 24 |
| Finished | Sep 04 05:49:48 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=362273561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 10.usbdev_data_toggle_clear.362273561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_data_toggle_restore.3263634823 |
| Short name | T488 |
| Test name | |
| Test status | |
| Simulation time | 1038228694 ps |
| CPU time | 4.97 seconds |
| Started | Sep 04 05:49:48 AM UTC 24 |
| Finished | Sep 04 05:49:54 AM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3263634823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_data_toggle_restore.3263634823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_device_address.3416800171 |
| Short name | T472 |
| Test name | |
| Test status | |
| Simulation time | 15586114028 ps |
| CPU time | 30.25 seconds |
| Started | Sep 04 05:49:48 AM UTC 24 |
| Finished | Sep 04 05:50:20 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3416800171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_device_address.3416800171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_device_timeout.2942842399 |
| Short name | T1074 |
| Test name | |
| Test status | |
| Simulation time | 1324326925 ps |
| CPU time | 31.6 seconds |
| Started | Sep 04 05:49:49 AM UTC 24 |
| Finished | Sep 04 05:50:22 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2942842399 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_device_timeout.2942842399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_disable_endpoint.474222334 |
| Short name | T1036 |
| Test name | |
| Test status | |
| Simulation time | 531775404 ps |
| CPU time | 2.7 seconds |
| Started | Sep 04 05:49:53 AM UTC 24 |
| Finished | Sep 04 05:49:58 AM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=474222334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_disable_endpoint.474222334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_disconnected.1303625009 |
| Short name | T1034 |
| Test name | |
| Test status | |
| Simulation time | 158861343 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:49:55 AM UTC 24 |
| Finished | Sep 04 05:49:57 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1303625009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_disconnected.1303625009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_enable.2108639844 |
| Short name | T1037 |
| Test name | |
| Test status | |
| Simulation time | 31609156 ps |
| CPU time | 1.11 seconds |
| Started | Sep 04 05:49:57 AM UTC 24 |
| Finished | Sep 04 05:49:59 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2108639844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 10.usbdev_enable.2108639844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_endpoint_access.1198550640 |
| Short name | T1040 |
| Test name | |
| Test status | |
| Simulation time | 761561599 ps |
| CPU time | 2.34 seconds |
| Started | Sep 04 05:49:57 AM UTC 24 |
| Finished | Sep 04 05:50:00 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1198550640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_endpoint_access.1198550640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_endpoint_types.3871507819 |
| Short name | T365 |
| Test name | |
| Test status | |
| Simulation time | 363204687 ps |
| CPU time | 2.17 seconds |
| Started | Sep 04 05:49:58 AM UTC 24 |
| Finished | Sep 04 05:50:01 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3871507819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_endpoint_types.3871507819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_fifo_levels.3818795015 |
| Short name | T1041 |
| Test name | |
| Test status | |
| Simulation time | 175023520 ps |
| CPU time | 1.55 seconds |
| Started | Sep 04 05:49:58 AM UTC 24 |
| Finished | Sep 04 05:50:01 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3818795015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_fifo_levels.3818795015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_fifo_rst.1099063931 |
| Short name | T1047 |
| Test name | |
| Test status | |
| Simulation time | 433540022 ps |
| CPU time | 4.19 seconds |
| Started | Sep 04 05:49:59 AM UTC 24 |
| Finished | Sep 04 05:50:05 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1099063931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_fifo_rst.1099063931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_in_iso.2016549920 |
| Short name | T1045 |
| Test name | |
| Test status | |
| Simulation time | 202429369 ps |
| CPU time | 1.27 seconds |
| Started | Sep 04 05:50:01 AM UTC 24 |
| Finished | Sep 04 05:50:03 AM UTC 24 |
| Peak memory | 226904 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2016549920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 10.usbdev_in_iso.2016549920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_in_stall.3222985369 |
| Short name | T1048 |
| Test name | |
| Test status | |
| Simulation time | 142086774 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 05:50:02 AM UTC 24 |
| Finished | Sep 04 05:50:05 AM UTC 24 |
| Peak memory | 216104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3222985369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_in_stall.3222985369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_in_trans.2115357853 |
| Short name | T1049 |
| Test name | |
| Test status | |
| Simulation time | 246291844 ps |
| CPU time | 1.6 seconds |
| Started | Sep 04 05:50:02 AM UTC 24 |
| Finished | Sep 04 05:50:05 AM UTC 24 |
| Peak memory | 214964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2115357853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_in_trans.2115357853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_invalid_sync.3093046348 |
| Short name | T1202 |
| Test name | |
| Test status | |
| Simulation time | 3274583948 ps |
| CPU time | 103.92 seconds |
| Started | Sep 04 05:50:01 AM UTC 24 |
| Finished | Sep 04 05:51:47 AM UTC 24 |
| Peak memory | 227216 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3093046348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 10.usbdev_invalid_sync.3093046348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_iso_retraction.366921171 |
| Short name | T1131 |
| Test name | |
| Test status | |
| Simulation time | 7924033445 ps |
| CPU time | 56.92 seconds |
| Started | Sep 04 05:50:02 AM UTC 24 |
| Finished | Sep 04 05:51:01 AM UTC 24 |
| Peak memory | 216876 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=366921171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 10.usbdev_iso_retraction.366921171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_link_in_err.3172129722 |
| Short name | T1050 |
| Test name | |
| Test status | |
| Simulation time | 196020267 ps |
| CPU time | 1.62 seconds |
| Started | Sep 04 05:50:02 AM UTC 24 |
| Finished | Sep 04 05:50:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3172129722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_link_in_err.3172129722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_link_resume.2532439177 |
| Short name | T1154 |
| Test name | |
| Test status | |
| Simulation time | 27042853074 ps |
| CPU time | 68.82 seconds |
| Started | Sep 04 05:50:02 AM UTC 24 |
| Finished | Sep 04 05:51:13 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2532439177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_link_resume.2532439177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_link_suspend.650472244 |
| Short name | T1067 |
| Test name | |
| Test status | |
| Simulation time | 6359639266 ps |
| CPU time | 12.4 seconds |
| Started | Sep 04 05:50:04 AM UTC 24 |
| Finished | Sep 04 05:50:17 AM UTC 24 |
| Peak memory | 217424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=650472244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_link_suspend.650472244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_low_speed_traffic.3217172541 |
| Short name | T1244 |
| Test name | |
| Test status | |
| Simulation time | 4424257337 ps |
| CPU time | 124.1 seconds |
| Started | Sep 04 05:50:04 AM UTC 24 |
| Finished | Sep 04 05:52:10 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3217172541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_low_speed_traffic.3217172541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_max_inter_pkt_delay.2292826970 |
| Short name | T1091 |
| Test name | |
| Test status | |
| Simulation time | 3227329129 ps |
| CPU time | 26.8 seconds |
| Started | Sep 04 05:50:04 AM UTC 24 |
| Finished | Sep 04 05:50:32 AM UTC 24 |
| Peak memory | 234100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2292826970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_inter_pkt_delay.2292826970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_max_length_in_transaction.3041934453 |
| Short name | T1051 |
| Test name | |
| Test status | |
| Simulation time | 333194481 ps |
| CPU time | 2.03 seconds |
| Started | Sep 04 05:50:05 AM UTC 24 |
| Finished | Sep 04 05:50:08 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3041934453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 10.usbdev_max_length_in_transaction.3041934453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_max_length_out_transaction.916821132 |
| Short name | T1053 |
| Test name | |
| Test status | |
| Simulation time | 193313335 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 05:50:06 AM UTC 24 |
| Finished | Sep 04 05:50:09 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=916821132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 10.usbdev_max_length_out_transaction.916821132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_max_non_iso_usb_traffic.314919882 |
| Short name | T1097 |
| Test name | |
| Test status | |
| Simulation time | 2805328432 ps |
| CPU time | 27.07 seconds |
| Started | Sep 04 05:50:06 AM UTC 24 |
| Finished | Sep 04 05:50:35 AM UTC 24 |
| Peak memory | 229452 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=314919882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_non_iso_usb_traffic.314919882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_max_usb_traffic.1649218899 |
| Short name | T1081 |
| Test name | |
| Test status | |
| Simulation time | 3548271645 ps |
| CPU time | 50.52 seconds |
| Started | Sep 04 05:50:06 AM UTC 24 |
| Finished | Sep 04 05:50:59 AM UTC 24 |
| Peak memory | 234172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1649218899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_usb_traffic.1649218899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_min_inter_pkt_delay.2249969536 |
| Short name | T1084 |
| Test name | |
| Test status | |
| Simulation time | 2712219917 ps |
| CPU time | 19.09 seconds |
| Started | Sep 04 05:50:06 AM UTC 24 |
| Finished | Sep 04 05:50:27 AM UTC 24 |
| Peak memory | 229728 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2249969536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_min_inter_pkt_delay.2249969536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_min_length_in_transaction.126788594 |
| Short name | T1056 |
| Test name | |
| Test status | |
| Simulation time | 148290712 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 05:50:10 AM UTC 24 |
| Finished | Sep 04 05:50:12 AM UTC 24 |
| Peak memory | 215564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=126788594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 10.usbdev_min_length_in_transaction.126788594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_min_length_out_transaction.3592617774 |
| Short name | T1057 |
| Test name | |
| Test status | |
| Simulation time | 158830895 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 05:50:10 AM UTC 24 |
| Finished | Sep 04 05:50:12 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3592617774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 10.usbdev_min_length_out_transaction.3592617774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_out_iso.791383586 |
| Short name | T1058 |
| Test name | |
| Test status | |
| Simulation time | 253378304 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 05:50:10 AM UTC 24 |
| Finished | Sep 04 05:50:12 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=791383586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 10.usbdev_out_iso.791383586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_out_stall.692088247 |
| Short name | T1059 |
| Test name | |
| Test status | |
| Simulation time | 186652377 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:50:11 AM UTC 24 |
| Finished | Sep 04 05:50:14 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=692088247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_out_stall.692088247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_out_trans_nak.4090932911 |
| Short name | T1061 |
| Test name | |
| Test status | |
| Simulation time | 196973010 ps |
| CPU time | 1.32 seconds |
| Started | Sep 04 05:50:13 AM UTC 24 |
| Finished | Sep 04 05:50:16 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4090932911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 10.usbdev_out_trans_nak.4090932911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_pending_in_trans.1981732184 |
| Short name | T1062 |
| Test name | |
| Test status | |
| Simulation time | 174225377 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 05:50:13 AM UTC 24 |
| Finished | Sep 04 05:50:16 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1981732184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 10.usbdev_pending_in_trans.1981732184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_phy_config_pinflip.2826869202 |
| Short name | T1064 |
| Test name | |
| Test status | |
| Simulation time | 199389244 ps |
| CPU time | 1.63 seconds |
| Started | Sep 04 05:50:13 AM UTC 24 |
| Finished | Sep 04 05:50:16 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2826869202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 10.usbdev_phy_config_pinflip.2826869202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_phy_config_usb_ref_disable.1211880153 |
| Short name | T1063 |
| Test name | |
| Test status | |
| Simulation time | 145313797 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:50:13 AM UTC 24 |
| Finished | Sep 04 05:50:16 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1211880153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 10.usbdev_phy_config_usb_ref_disable.1211880153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_phy_pins_sense.1293533387 |
| Short name | T1066 |
| Test name | |
| Test status | |
| Simulation time | 40268311 ps |
| CPU time | 1.09 seconds |
| Started | Sep 04 05:50:15 AM UTC 24 |
| Finished | Sep 04 05:50:17 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1293533387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_phy_pins_sense.1293533387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_buffer.3906111600 |
| Short name | T256 |
| Test name | |
| Test status | |
| Simulation time | 15796915799 ps |
| CPU time | 54.59 seconds |
| Started | Sep 04 05:50:16 AM UTC 24 |
| Finished | Sep 04 05:51:12 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3906111600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 10.usbdev_pkt_buffer.3906111600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_received.924181572 |
| Short name | T1070 |
| Test name | |
| Test status | |
| Simulation time | 224274039 ps |
| CPU time | 1.68 seconds |
| Started | Sep 04 05:50:17 AM UTC 24 |
| Finished | Sep 04 05:50:20 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=924181572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_pkt_received.924181572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_sent.3740306427 |
| Short name | T1068 |
| Test name | |
| Test status | |
| Simulation time | 169703469 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 05:50:17 AM UTC 24 |
| Finished | Sep 04 05:50:20 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3740306427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_pkt_sent.3740306427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_random_length_in_transaction.3705694646 |
| Short name | T1071 |
| Test name | |
| Test status | |
| Simulation time | 167430471 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 05:50:17 AM UTC 24 |
| Finished | Sep 04 05:50:20 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3705694646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 10.usbdev_random_length_in_transaction.3705694646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_random_length_out_transaction.2118885754 |
| Short name | T1072 |
| Test name | |
| Test status | |
| Simulation time | 172589752 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 05:50:17 AM UTC 24 |
| Finished | Sep 04 05:50:20 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2118885754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 10.usbdev_random_length_out_transaction.2118885754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_resume_link_active.2875842959 |
| Short name | T1123 |
| Test name | |
| Test status | |
| Simulation time | 20165488188 ps |
| CPU time | 37.2 seconds |
| Started | Sep 04 05:50:17 AM UTC 24 |
| Finished | Sep 04 05:50:56 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2875842959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 10.usbdev_resume_link_active.2875842959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_rx_crc_err.2132873576 |
| Short name | T1069 |
| Test name | |
| Test status | |
| Simulation time | 151297927 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 05:50:17 AM UTC 24 |
| Finished | Sep 04 05:50:20 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2132873576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 10.usbdev_rx_crc_err.2132873576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_rx_full.3738298641 |
| Short name | T1075 |
| Test name | |
| Test status | |
| Simulation time | 329851055 ps |
| CPU time | 2.26 seconds |
| Started | Sep 04 05:50:19 AM UTC 24 |
| Finished | Sep 04 05:50:22 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3738298641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 10.usbdev_rx_full.3738298641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_setup_stage.2999631497 |
| Short name | T1076 |
| Test name | |
| Test status | |
| Simulation time | 167965404 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 05:50:21 AM UTC 24 |
| Finished | Sep 04 05:50:24 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2999631497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_setup_stage.2999631497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_setup_trans_ignored.1625066700 |
| Short name | T1077 |
| Test name | |
| Test status | |
| Simulation time | 161722425 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 05:50:21 AM UTC 24 |
| Finished | Sep 04 05:50:24 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1625066700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 10.usbdev_setup_trans_ignored.1625066700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_smoke.2549975295 |
| Short name | T1080 |
| Test name | |
| Test status | |
| Simulation time | 292971472 ps |
| CPU time | 1.99 seconds |
| Started | Sep 04 05:50:21 AM UTC 24 |
| Finished | Sep 04 05:50:24 AM UTC 24 |
| Peak memory | 214932 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2549975295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_smoke.2549975295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_spurious_pids_ignored.2997528767 |
| Short name | T1129 |
| Test name | |
| Test status | |
| Simulation time | 3122123501 ps |
| CPU time | 37.31 seconds |
| Started | Sep 04 05:50:21 AM UTC 24 |
| Finished | Sep 04 05:51:00 AM UTC 24 |
| Peak memory | 229524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2997528767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 10.usbdev_spurious_pids_ignored.2997528767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_stall_priority_over_nak.494115077 |
| Short name | T1078 |
| Test name | |
| Test status | |
| Simulation time | 172657652 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 05:50:21 AM UTC 24 |
| Finished | Sep 04 05:50:24 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=494115077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_stall_priority_over_nak.494115077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_stall_trans.42188086 |
| Short name | T1079 |
| Test name | |
| Test status | |
| Simulation time | 166084567 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 05:50:21 AM UTC 24 |
| Finished | Sep 04 05:50:24 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=42188086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_stall_trans.42188086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_stream_len_max.876976846 |
| Short name | T1085 |
| Test name | |
| Test status | |
| Simulation time | 1280517058 ps |
| CPU time | 3.25 seconds |
| Started | Sep 04 05:50:23 AM UTC 24 |
| Finished | Sep 04 05:50:27 AM UTC 24 |
| Peak memory | 217252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=876976846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 10.usbdev_stream_len_max.876976846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_streaming_out.3605326788 |
| Short name | T1189 |
| Test name | |
| Test status | |
| Simulation time | 3005517641 ps |
| CPU time | 78.41 seconds |
| Started | Sep 04 05:50:23 AM UTC 24 |
| Finished | Sep 04 05:51:43 AM UTC 24 |
| Peak memory | 227624 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3605326788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_streaming_out.3605326788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_timeout_missing_host_handshake.1520636302 |
| Short name | T1046 |
| Test name | |
| Test status | |
| Simulation time | 727405328 ps |
| CPU time | 13.37 seconds |
| Started | Sep 04 05:49:49 AM UTC 24 |
| Finished | Sep 04 05:50:03 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1520636302 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_timeout_missing_host_handshake.1520636302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/10.usbdev_tx_rx_disruption.4289631313 |
| Short name | T1083 |
| Test name | |
| Test status | |
| Simulation time | 551849151 ps |
| CPU time | 2.88 seconds |
| Started | Sep 04 05:50:23 AM UTC 24 |
| Finished | Sep 04 05:50:27 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4289631313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_t x_rx_disruption.4289631313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/10.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/100.usbdev_endpoint_types.899677711 |
| Short name | T395 |
| Test name | |
| Test status | |
| Simulation time | 641798264 ps |
| CPU time | 1.95 seconds |
| Started | Sep 04 06:08:04 AM UTC 24 |
| Finished | Sep 04 06:08:07 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=899677711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 100.usbdev_endpoint_types.899677711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/100.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/100.usbdev_tx_rx_disruption.2445263741 |
| Short name | T117 |
| Test name | |
| Test status | |
| Simulation time | 576154058 ps |
| CPU time | 2.01 seconds |
| Started | Sep 04 06:08:05 AM UTC 24 |
| Finished | Sep 04 06:08:08 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2445263741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 100.usbdev_ tx_rx_disruption.2445263741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/100.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/101.usbdev_endpoint_types.1330899096 |
| Short name | T428 |
| Test name | |
| Test status | |
| Simulation time | 519920813 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 06:08:05 AM UTC 24 |
| Finished | Sep 04 06:08:08 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1330899096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 101.usbdev_endpoint_types.1330899096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/101.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/101.usbdev_fifo_levels.3466222377 |
| Short name | T3300 |
| Test name | |
| Test status | |
| Simulation time | 251896252 ps |
| CPU time | 1.19 seconds |
| Started | Sep 04 06:08:05 AM UTC 24 |
| Finished | Sep 04 06:08:08 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3466222377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 101.usbdev_fifo_levels.3466222377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/101.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/101.usbdev_tx_rx_disruption.1801987817 |
| Short name | T3302 |
| Test name | |
| Test status | |
| Simulation time | 479096575 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 06:08:05 AM UTC 24 |
| Finished | Sep 04 06:08:08 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1801987817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 101.usbdev_ tx_rx_disruption.1801987817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/101.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/102.usbdev_endpoint_types.235672138 |
| Short name | T3301 |
| Test name | |
| Test status | |
| Simulation time | 291992648 ps |
| CPU time | 1.16 seconds |
| Started | Sep 04 06:08:05 AM UTC 24 |
| Finished | Sep 04 06:08:08 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=235672138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 102.usbdev_endpoint_types.235672138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/102.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/102.usbdev_tx_rx_disruption.1341962227 |
| Short name | T3311 |
| Test name | |
| Test status | |
| Simulation time | 619706104 ps |
| CPU time | 1.96 seconds |
| Started | Sep 04 06:08:07 AM UTC 24 |
| Finished | Sep 04 06:08:10 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1341962227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 102.usbdev_ tx_rx_disruption.1341962227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/102.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/103.usbdev_endpoint_types.2121151779 |
| Short name | T425 |
| Test name | |
| Test status | |
| Simulation time | 234886957 ps |
| CPU time | 1.32 seconds |
| Started | Sep 04 06:08:07 AM UTC 24 |
| Finished | Sep 04 06:08:10 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2121151779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 103.usbdev_endpoint_types.2121151779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/103.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/103.usbdev_fifo_levels.1245392640 |
| Short name | T3304 |
| Test name | |
| Test status | |
| Simulation time | 252816123 ps |
| CPU time | 1.07 seconds |
| Started | Sep 04 06:08:07 AM UTC 24 |
| Finished | Sep 04 06:08:10 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1245392640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 103.usbdev_fifo_levels.1245392640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/103.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/103.usbdev_tx_rx_disruption.1366830003 |
| Short name | T3309 |
| Test name | |
| Test status | |
| Simulation time | 619164036 ps |
| CPU time | 1.65 seconds |
| Started | Sep 04 06:08:07 AM UTC 24 |
| Finished | Sep 04 06:08:10 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1366830003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 103.usbdev_ tx_rx_disruption.1366830003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/103.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/104.usbdev_endpoint_types.3043965000 |
| Short name | T429 |
| Test name | |
| Test status | |
| Simulation time | 282173129 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 06:08:07 AM UTC 24 |
| Finished | Sep 04 06:08:10 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3043965000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 104.usbdev_endpoint_types.3043965000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/104.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/104.usbdev_tx_rx_disruption.677317630 |
| Short name | T3308 |
| Test name | |
| Test status | |
| Simulation time | 493051619 ps |
| CPU time | 1.62 seconds |
| Started | Sep 04 06:08:07 AM UTC 24 |
| Finished | Sep 04 06:08:10 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=677317630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 104.usbdev_t x_rx_disruption.677317630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/104.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/105.usbdev_endpoint_types.1544672351 |
| Short name | T3307 |
| Test name | |
| Test status | |
| Simulation time | 502957153 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 06:08:07 AM UTC 24 |
| Finished | Sep 04 06:08:10 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1544672351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 105.usbdev_endpoint_types.1544672351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/105.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/105.usbdev_tx_rx_disruption.677082807 |
| Short name | T3315 |
| Test name | |
| Test status | |
| Simulation time | 531576803 ps |
| CPU time | 1.89 seconds |
| Started | Sep 04 06:08:08 AM UTC 24 |
| Finished | Sep 04 06:08:11 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=677082807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 105.usbdev_t x_rx_disruption.677082807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/105.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/106.usbdev_endpoint_types.1720067573 |
| Short name | T3312 |
| Test name | |
| Test status | |
| Simulation time | 277617144 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 06:08:08 AM UTC 24 |
| Finished | Sep 04 06:08:10 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1720067573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 106.usbdev_endpoint_types.1720067573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/106.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/106.usbdev_tx_rx_disruption.214210410 |
| Short name | T3317 |
| Test name | |
| Test status | |
| Simulation time | 486790127 ps |
| CPU time | 1.81 seconds |
| Started | Sep 04 06:08:08 AM UTC 24 |
| Finished | Sep 04 06:08:11 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=214210410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 106.usbdev_t x_rx_disruption.214210410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/106.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/107.usbdev_tx_rx_disruption.3136400968 |
| Short name | T3314 |
| Test name | |
| Test status | |
| Simulation time | 639327461 ps |
| CPU time | 1.66 seconds |
| Started | Sep 04 06:08:08 AM UTC 24 |
| Finished | Sep 04 06:08:11 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3136400968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 107.usbdev_ tx_rx_disruption.3136400968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/107.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/108.usbdev_endpoint_types.3420526199 |
| Short name | T3318 |
| Test name | |
| Test status | |
| Simulation time | 239270165 ps |
| CPU time | 1.08 seconds |
| Started | Sep 04 06:08:09 AM UTC 24 |
| Finished | Sep 04 06:08:11 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3420526199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 108.usbdev_endpoint_types.3420526199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/108.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/108.usbdev_tx_rx_disruption.2378973619 |
| Short name | T3320 |
| Test name | |
| Test status | |
| Simulation time | 710889463 ps |
| CPU time | 1.77 seconds |
| Started | Sep 04 06:08:09 AM UTC 24 |
| Finished | Sep 04 06:08:12 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2378973619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 108.usbdev_ tx_rx_disruption.2378973619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/108.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/109.usbdev_endpoint_types.614265344 |
| Short name | T437 |
| Test name | |
| Test status | |
| Simulation time | 175935621 ps |
| CPU time | 1.02 seconds |
| Started | Sep 04 06:08:09 AM UTC 24 |
| Finished | Sep 04 06:08:11 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=614265344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 109.usbdev_endpoint_types.614265344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/109.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/109.usbdev_tx_rx_disruption.1723430731 |
| Short name | T3322 |
| Test name | |
| Test status | |
| Simulation time | 654042299 ps |
| CPU time | 1.86 seconds |
| Started | Sep 04 06:08:09 AM UTC 24 |
| Finished | Sep 04 06:08:12 AM UTC 24 |
| Peak memory | 214960 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1723430731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 109.usbdev_ tx_rx_disruption.1723430731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/109.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_alert_test.2935245510 |
| Short name | T1137 |
| Test name | |
| Test status | |
| Simulation time | 59656329 ps |
| CPU time | 1.02 seconds |
| Started | Sep 04 05:51:02 AM UTC 24 |
| Finished | Sep 04 05:51:04 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2935245510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 11.usbdev_alert_test.2935245510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_disconnect.3586499900 |
| Short name | T1122 |
| Test name | |
| Test status | |
| Simulation time | 11720095630 ps |
| CPU time | 29.92 seconds |
| Started | Sep 04 05:50:25 AM UTC 24 |
| Finished | Sep 04 05:50:56 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3586499900 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_disconnect.3586499900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_reset.4123316228 |
| Short name | T1138 |
| Test name | |
| Test status | |
| Simulation time | 15249672228 ps |
| CPU time | 37.92 seconds |
| Started | Sep 04 05:50:25 AM UTC 24 |
| Finished | Sep 04 05:51:04 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4123316228 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_reset.4123316228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_resume.1533029087 |
| Short name | T1144 |
| Test name | |
| Test status | |
| Simulation time | 30178118902 ps |
| CPU time | 40.95 seconds |
| Started | Sep 04 05:50:25 AM UTC 24 |
| Finished | Sep 04 05:51:07 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1533029087 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_resume.1533029087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_av_buffer.3723135719 |
| Short name | T1086 |
| Test name | |
| Test status | |
| Simulation time | 190965505 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 05:50:26 AM UTC 24 |
| Finished | Sep 04 05:50:28 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3723135719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_av_buffer.3723135719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_bitstuff_err.4020367882 |
| Short name | T1087 |
| Test name | |
| Test status | |
| Simulation time | 162206861 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 05:50:27 AM UTC 24 |
| Finished | Sep 04 05:50:29 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4020367882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_bitstuff_err.4020367882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_data_toggle_clear.4003624521 |
| Short name | T1090 |
| Test name | |
| Test status | |
| Simulation time | 542927684 ps |
| CPU time | 3.01 seconds |
| Started | Sep 04 05:50:27 AM UTC 24 |
| Finished | Sep 04 05:50:31 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4003624521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 11.usbdev_data_toggle_clear.4003624521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_data_toggle_restore.1100866448 |
| Short name | T481 |
| Test name | |
| Test status | |
| Simulation time | 587056896 ps |
| CPU time | 2.16 seconds |
| Started | Sep 04 05:50:28 AM UTC 24 |
| Finished | Sep 04 05:50:32 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1100866448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_data_toggle_restore.1100866448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_device_address.1842031478 |
| Short name | T471 |
| Test name | |
| Test status | |
| Simulation time | 15577674547 ps |
| CPU time | 26.5 seconds |
| Started | Sep 04 05:50:28 AM UTC 24 |
| Finished | Sep 04 05:50:56 AM UTC 24 |
| Peak memory | 217212 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1842031478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_device_address.1842031478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_device_timeout.2046044806 |
| Short name | T1089 |
| Test name | |
| Test status | |
| Simulation time | 175591228 ps |
| CPU time | 1.13 seconds |
| Started | Sep 04 05:50:28 AM UTC 24 |
| Finished | Sep 04 05:50:31 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2046044806 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_device_timeout.2046044806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_disable_endpoint.2471827656 |
| Short name | T1094 |
| Test name | |
| Test status | |
| Simulation time | 573282042 ps |
| CPU time | 2.61 seconds |
| Started | Sep 04 05:50:31 AM UTC 24 |
| Finished | Sep 04 05:50:34 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2471827656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 11.usbdev_disable_endpoint.2471827656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_disconnected.308398162 |
| Short name | T1092 |
| Test name | |
| Test status | |
| Simulation time | 151665777 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 05:50:31 AM UTC 24 |
| Finished | Sep 04 05:50:33 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=308398162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_disconnected.308398162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_enable.2380246125 |
| Short name | T1093 |
| Test name | |
| Test status | |
| Simulation time | 33050778 ps |
| CPU time | 0.98 seconds |
| Started | Sep 04 05:50:32 AM UTC 24 |
| Finished | Sep 04 05:50:34 AM UTC 24 |
| Peak memory | 215028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2380246125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 11.usbdev_enable.2380246125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_endpoint_access.959688588 |
| Short name | T1101 |
| Test name | |
| Test status | |
| Simulation time | 726708664 ps |
| CPU time | 3.47 seconds |
| Started | Sep 04 05:50:32 AM UTC 24 |
| Finished | Sep 04 05:50:37 AM UTC 24 |
| Peak memory | 217152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=959688588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_endpoint_access.959688588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_endpoint_types.2439156039 |
| Short name | T336 |
| Test name | |
| Test status | |
| Simulation time | 418629722 ps |
| CPU time | 2.36 seconds |
| Started | Sep 04 05:50:32 AM UTC 24 |
| Finished | Sep 04 05:50:36 AM UTC 24 |
| Peak memory | 217040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2439156039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_endpoint_types.2439156039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_fifo_levels.3076334514 |
| Short name | T1099 |
| Test name | |
| Test status | |
| Simulation time | 176069574 ps |
| CPU time | 1.61 seconds |
| Started | Sep 04 05:50:34 AM UTC 24 |
| Finished | Sep 04 05:50:36 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3076334514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_fifo_levels.3076334514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_fifo_rst.2078245118 |
| Short name | T1103 |
| Test name | |
| Test status | |
| Simulation time | 398999101 ps |
| CPU time | 2.81 seconds |
| Started | Sep 04 05:50:34 AM UTC 24 |
| Finished | Sep 04 05:50:37 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2078245118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_fifo_rst.2078245118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_in_iso.3597376451 |
| Short name | T1107 |
| Test name | |
| Test status | |
| Simulation time | 240229057 ps |
| CPU time | 2.12 seconds |
| Started | Sep 04 05:50:37 AM UTC 24 |
| Finished | Sep 04 05:50:40 AM UTC 24 |
| Peak memory | 227484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3597376451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 11.usbdev_in_iso.3597376451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_in_stall.1698229812 |
| Short name | T1104 |
| Test name | |
| Test status | |
| Simulation time | 149784109 ps |
| CPU time | 1.2 seconds |
| Started | Sep 04 05:50:37 AM UTC 24 |
| Finished | Sep 04 05:50:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1698229812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_in_stall.1698229812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_in_trans.2556238665 |
| Short name | T1105 |
| Test name | |
| Test status | |
| Simulation time | 240074925 ps |
| CPU time | 1.64 seconds |
| Started | Sep 04 05:50:37 AM UTC 24 |
| Finished | Sep 04 05:50:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2556238665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_in_trans.2556238665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_invalid_sync.2988010936 |
| Short name | T1161 |
| Test name | |
| Test status | |
| Simulation time | 3942382051 ps |
| CPU time | 41.12 seconds |
| Started | Sep 04 05:50:35 AM UTC 24 |
| Finished | Sep 04 05:51:17 AM UTC 24 |
| Peak memory | 229724 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2988010936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 11.usbdev_invalid_sync.2988010936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_iso_retraction.3855492065 |
| Short name | T1177 |
| Test name | |
| Test status | |
| Simulation time | 4049321231 ps |
| CPU time | 53.12 seconds |
| Started | Sep 04 05:50:37 AM UTC 24 |
| Finished | Sep 04 05:51:31 AM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3855492065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_iso_retraction.3855492065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_link_in_err.3218154671 |
| Short name | T1106 |
| Test name | |
| Test status | |
| Simulation time | 210777409 ps |
| CPU time | 1.57 seconds |
| Started | Sep 04 05:50:37 AM UTC 24 |
| Finished | Sep 04 05:50:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3218154671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_link_in_err.3218154671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_link_resume.3866911848 |
| Short name | T1136 |
| Test name | |
| Test status | |
| Simulation time | 8597670741 ps |
| CPU time | 25.59 seconds |
| Started | Sep 04 05:50:37 AM UTC 24 |
| Finished | Sep 04 05:51:04 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3866911848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_link_resume.3866911848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_link_suspend.3696796490 |
| Short name | T1126 |
| Test name | |
| Test status | |
| Simulation time | 10819573130 ps |
| CPU time | 21.27 seconds |
| Started | Sep 04 05:50:37 AM UTC 24 |
| Finished | Sep 04 05:50:59 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3696796490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_link_suspend.3696796490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_low_speed_traffic.1022568018 |
| Short name | T1265 |
| Test name | |
| Test status | |
| Simulation time | 2822662098 ps |
| CPU time | 99.45 seconds |
| Started | Sep 04 05:50:38 AM UTC 24 |
| Finished | Sep 04 05:52:20 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1022568018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_low_speed_traffic.1022568018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_max_inter_pkt_delay.1012268001 |
| Short name | T1211 |
| Test name | |
| Test status | |
| Simulation time | 2379038650 ps |
| CPU time | 71.01 seconds |
| Started | Sep 04 05:50:38 AM UTC 24 |
| Finished | Sep 04 05:51:51 AM UTC 24 |
| Peak memory | 234364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1012268001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_inter_pkt_delay.1012268001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_max_length_in_transaction.3204912853 |
| Short name | T1108 |
| Test name | |
| Test status | |
| Simulation time | 247541053 ps |
| CPU time | 1.19 seconds |
| Started | Sep 04 05:50:38 AM UTC 24 |
| Finished | Sep 04 05:50:41 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3204912853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 11.usbdev_max_length_in_transaction.3204912853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_max_length_out_transaction.2934281841 |
| Short name | T1109 |
| Test name | |
| Test status | |
| Simulation time | 211619230 ps |
| CPU time | 1.68 seconds |
| Started | Sep 04 05:50:38 AM UTC 24 |
| Finished | Sep 04 05:50:41 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2934281841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 11.usbdev_max_length_out_transaction.2934281841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_max_non_iso_usb_traffic.180729633 |
| Short name | T1055 |
| Test name | |
| Test status | |
| Simulation time | 1435315851 ps |
| CPU time | 17.68 seconds |
| Started | Sep 04 05:50:40 AM UTC 24 |
| Finished | Sep 04 05:50:58 AM UTC 24 |
| Peak memory | 227396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=180729633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_non_iso_usb_traffic.180729633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_max_usb_traffic.570358338 |
| Short name | T1130 |
| Test name | |
| Test status | |
| Simulation time | 1749187660 ps |
| CPU time | 19.59 seconds |
| Started | Sep 04 05:50:40 AM UTC 24 |
| Finished | Sep 04 05:51:00 AM UTC 24 |
| Peak memory | 234116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=570358338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_usb_traffic.570358338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_min_inter_pkt_delay.1473974359 |
| Short name | T1145 |
| Test name | |
| Test status | |
| Simulation time | 3299463720 ps |
| CPU time | 25.21 seconds |
| Started | Sep 04 05:50:41 AM UTC 24 |
| Finished | Sep 04 05:51:07 AM UTC 24 |
| Peak memory | 234160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1473974359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_min_inter_pkt_delay.1473974359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_min_length_in_transaction.1181678071 |
| Short name | T1110 |
| Test name | |
| Test status | |
| Simulation time | 146336587 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 05:50:41 AM UTC 24 |
| Finished | Sep 04 05:50:43 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1181678071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 11.usbdev_min_length_in_transaction.1181678071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_min_length_out_transaction.1029277945 |
| Short name | T1111 |
| Test name | |
| Test status | |
| Simulation time | 152836191 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 05:50:42 AM UTC 24 |
| Finished | Sep 04 05:50:44 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1029277945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 11.usbdev_min_length_out_transaction.1029277945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_nak_trans.3541084731 |
| Short name | T148 |
| Test name | |
| Test status | |
| Simulation time | 200830949 ps |
| CPU time | 1.55 seconds |
| Started | Sep 04 05:50:42 AM UTC 24 |
| Finished | Sep 04 05:50:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3541084731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_nak_trans.3541084731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_out_iso.952949434 |
| Short name | T1113 |
| Test name | |
| Test status | |
| Simulation time | 176996340 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 05:50:44 AM UTC 24 |
| Finished | Sep 04 05:50:47 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=952949434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 11.usbdev_out_iso.952949434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_out_stall.2082775549 |
| Short name | T1115 |
| Test name | |
| Test status | |
| Simulation time | 176468487 ps |
| CPU time | 1.37 seconds |
| Started | Sep 04 05:50:45 AM UTC 24 |
| Finished | Sep 04 05:50:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2082775549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_out_stall.2082775549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_out_trans_nak.676349643 |
| Short name | T1114 |
| Test name | |
| Test status | |
| Simulation time | 191177183 ps |
| CPU time | 1.06 seconds |
| Started | Sep 04 05:50:45 AM UTC 24 |
| Finished | Sep 04 05:50:47 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=676349643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_out_trans_nak.676349643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_pending_in_trans.2119158444 |
| Short name | T1116 |
| Test name | |
| Test status | |
| Simulation time | 162556019 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 05:50:47 AM UTC 24 |
| Finished | Sep 04 05:50:49 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2119158444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 11.usbdev_pending_in_trans.2119158444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_phy_config_pinflip.1340906080 |
| Short name | T1117 |
| Test name | |
| Test status | |
| Simulation time | 215856736 ps |
| CPU time | 1.75 seconds |
| Started | Sep 04 05:50:48 AM UTC 24 |
| Finished | Sep 04 05:50:50 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1340906080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 11.usbdev_phy_config_pinflip.1340906080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_phy_config_usb_ref_disable.2663080687 |
| Short name | T1118 |
| Test name | |
| Test status | |
| Simulation time | 143077092 ps |
| CPU time | 1.36 seconds |
| Started | Sep 04 05:50:49 AM UTC 24 |
| Finished | Sep 04 05:50:51 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2663080687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 11.usbdev_phy_config_usb_ref_disable.2663080687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_phy_pins_sense.1401527797 |
| Short name | T41 |
| Test name | |
| Test status | |
| Simulation time | 34239165 ps |
| CPU time | 1.12 seconds |
| Started | Sep 04 05:50:49 AM UTC 24 |
| Finished | Sep 04 05:50:51 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1401527797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_phy_pins_sense.1401527797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_buffer.308519083 |
| Short name | T257 |
| Test name | |
| Test status | |
| Simulation time | 17509528023 ps |
| CPU time | 53.27 seconds |
| Started | Sep 04 05:50:50 AM UTC 24 |
| Finished | Sep 04 05:51:45 AM UTC 24 |
| Peak memory | 231632 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=308519083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_pkt_buffer.308519083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_received.711504895 |
| Short name | T1119 |
| Test name | |
| Test status | |
| Simulation time | 192440855 ps |
| CPU time | 1.67 seconds |
| Started | Sep 04 05:50:51 AM UTC 24 |
| Finished | Sep 04 05:50:54 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=711504895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_pkt_received.711504895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_sent.146485769 |
| Short name | T1120 |
| Test name | |
| Test status | |
| Simulation time | 183566423 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 05:50:52 AM UTC 24 |
| Finished | Sep 04 05:50:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=146485769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 11.usbdev_pkt_sent.146485769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_random_length_in_transaction.2791004393 |
| Short name | T1121 |
| Test name | |
| Test status | |
| Simulation time | 209948142 ps |
| CPU time | 1.63 seconds |
| Started | Sep 04 05:50:52 AM UTC 24 |
| Finished | Sep 04 05:50:55 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2791004393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 11.usbdev_random_length_in_transaction.2791004393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_random_length_out_transaction.1026783895 |
| Short name | T1124 |
| Test name | |
| Test status | |
| Simulation time | 183860003 ps |
| CPU time | 1.67 seconds |
| Started | Sep 04 05:50:55 AM UTC 24 |
| Finished | Sep 04 05:50:57 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1026783895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 11.usbdev_random_length_out_transaction.1026783895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_resume_link_active.100837704 |
| Short name | T1171 |
| Test name | |
| Test status | |
| Simulation time | 20174182355 ps |
| CPU time | 30.78 seconds |
| Started | Sep 04 05:50:56 AM UTC 24 |
| Finished | Sep 04 05:51:28 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=100837704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 11.usbdev_resume_link_active.100837704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_rx_crc_err.3959690727 |
| Short name | T1125 |
| Test name | |
| Test status | |
| Simulation time | 180092615 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 05:50:56 AM UTC 24 |
| Finished | Sep 04 05:50:58 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3959690727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_rx_crc_err.3959690727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_rx_full.3672489173 |
| Short name | T55 |
| Test name | |
| Test status | |
| Simulation time | 261361979 ps |
| CPU time | 1.9 seconds |
| Started | Sep 04 05:50:57 AM UTC 24 |
| Finished | Sep 04 05:51:00 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3672489173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 11.usbdev_rx_full.3672489173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_setup_stage.2958824085 |
| Short name | T1128 |
| Test name | |
| Test status | |
| Simulation time | 168939253 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 05:50:57 AM UTC 24 |
| Finished | Sep 04 05:51:00 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2958824085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_setup_stage.2958824085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_setup_trans_ignored.892415965 |
| Short name | T1127 |
| Test name | |
| Test status | |
| Simulation time | 157174695 ps |
| CPU time | 1.33 seconds |
| Started | Sep 04 05:50:57 AM UTC 24 |
| Finished | Sep 04 05:51:00 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=892415965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 11.usbdev_setup_trans_ignored.892415965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_smoke.4130923949 |
| Short name | T1132 |
| Test name | |
| Test status | |
| Simulation time | 263983380 ps |
| CPU time | 2.04 seconds |
| Started | Sep 04 05:50:58 AM UTC 24 |
| Finished | Sep 04 05:51:02 AM UTC 24 |
| Peak memory | 217088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4130923949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_smoke.4130923949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_spurious_pids_ignored.501021784 |
| Short name | T1197 |
| Test name | |
| Test status | |
| Simulation time | 3559143323 ps |
| CPU time | 40.9 seconds |
| Started | Sep 04 05:51:00 AM UTC 24 |
| Finished | Sep 04 05:51:42 AM UTC 24 |
| Peak memory | 229808 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=501021784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 11.usbdev_spurious_pids_ignored.501021784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_stall_priority_over_nak.1066757775 |
| Short name | T1133 |
| Test name | |
| Test status | |
| Simulation time | 146141545 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 05:51:00 AM UTC 24 |
| Finished | Sep 04 05:51:02 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1066757775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_stall_priority_over_nak.1066757775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_stall_trans.2217567381 |
| Short name | T1134 |
| Test name | |
| Test status | |
| Simulation time | 178324749 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:51:00 AM UTC 24 |
| Finished | Sep 04 05:51:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2217567381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_stall_trans.2217567381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_stream_len_max.145426348 |
| Short name | T1139 |
| Test name | |
| Test status | |
| Simulation time | 500010325 ps |
| CPU time | 2.05 seconds |
| Started | Sep 04 05:51:02 AM UTC 24 |
| Finished | Sep 04 05:51:05 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=145426348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 11.usbdev_stream_len_max.145426348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_streaming_out.2837847888 |
| Short name | T1271 |
| Test name | |
| Test status | |
| Simulation time | 2949000134 ps |
| CPU time | 82.13 seconds |
| Started | Sep 04 05:51:00 AM UTC 24 |
| Finished | Sep 04 05:52:24 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2837847888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_streaming_out.2837847888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_timeout_missing_host_handshake.2550139899 |
| Short name | T1143 |
| Test name | |
| Test status | |
| Simulation time | 1124047604 ps |
| CPU time | 34.86 seconds |
| Started | Sep 04 05:50:30 AM UTC 24 |
| Finished | Sep 04 05:51:06 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2550139899 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_timeout_missing_host_handshake.2550139899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/11.usbdev_tx_rx_disruption.3140103971 |
| Short name | T1142 |
| Test name | |
| Test status | |
| Simulation time | 588794473 ps |
| CPU time | 2.85 seconds |
| Started | Sep 04 05:51:02 AM UTC 24 |
| Finished | Sep 04 05:51:06 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3140103971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_t x_rx_disruption.3140103971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/11.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/110.usbdev_endpoint_types.240900544 |
| Short name | T3319 |
| Test name | |
| Test status | |
| Simulation time | 162324852 ps |
| CPU time | 1.01 seconds |
| Started | Sep 04 06:08:09 AM UTC 24 |
| Finished | Sep 04 06:08:11 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=240900544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 110.usbdev_endpoint_types.240900544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/110.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/110.usbdev_fifo_levels.2349342761 |
| Short name | T563 |
| Test name | |
| Test status | |
| Simulation time | 146868921 ps |
| CPU time | 0.95 seconds |
| Started | Sep 04 06:08:10 AM UTC 24 |
| Finished | Sep 04 06:08:11 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2349342761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 110.usbdev_fifo_levels.2349342761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/110.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/110.usbdev_tx_rx_disruption.2320558908 |
| Short name | T3321 |
| Test name | |
| Test status | |
| Simulation time | 575538838 ps |
| CPU time | 1.79 seconds |
| Started | Sep 04 06:08:10 AM UTC 24 |
| Finished | Sep 04 06:08:12 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2320558908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 110.usbdev_ tx_rx_disruption.2320558908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/110.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/111.usbdev_fifo_levels.502987055 |
| Short name | T569 |
| Test name | |
| Test status | |
| Simulation time | 263464102 ps |
| CPU time | 1.12 seconds |
| Started | Sep 04 06:08:12 AM UTC 24 |
| Finished | Sep 04 06:08:14 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=502987055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 111.usbdev_fifo_levels.502987055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/111.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/111.usbdev_tx_rx_disruption.2786263664 |
| Short name | T3326 |
| Test name | |
| Test status | |
| Simulation time | 618497624 ps |
| CPU time | 1.72 seconds |
| Started | Sep 04 06:08:12 AM UTC 24 |
| Finished | Sep 04 06:08:15 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2786263664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 111.usbdev_ tx_rx_disruption.2786263664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/111.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/112.usbdev_tx_rx_disruption.3919442345 |
| Short name | T3331 |
| Test name | |
| Test status | |
| Simulation time | 575354892 ps |
| CPU time | 2.05 seconds |
| Started | Sep 04 06:08:12 AM UTC 24 |
| Finished | Sep 04 06:08:15 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3919442345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 112.usbdev_ tx_rx_disruption.3919442345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/112.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/113.usbdev_endpoint_types.340242828 |
| Short name | T379 |
| Test name | |
| Test status | |
| Simulation time | 274678935 ps |
| CPU time | 1.8 seconds |
| Started | Sep 04 06:08:12 AM UTC 24 |
| Finished | Sep 04 06:08:15 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=340242828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 113.usbdev_endpoint_types.340242828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/113.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/113.usbdev_tx_rx_disruption.4004684934 |
| Short name | T3333 |
| Test name | |
| Test status | |
| Simulation time | 668557260 ps |
| CPU time | 2.15 seconds |
| Started | Sep 04 06:08:12 AM UTC 24 |
| Finished | Sep 04 06:08:16 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4004684934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 113.usbdev_ tx_rx_disruption.4004684934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/113.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/114.usbdev_endpoint_types.1622629449 |
| Short name | T3324 |
| Test name | |
| Test status | |
| Simulation time | 258716311 ps |
| CPU time | 1.22 seconds |
| Started | Sep 04 06:08:12 AM UTC 24 |
| Finished | Sep 04 06:08:15 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1622629449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 114.usbdev_endpoint_types.1622629449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/114.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/114.usbdev_fifo_levels.3372444991 |
| Short name | T3325 |
| Test name | |
| Test status | |
| Simulation time | 257666544 ps |
| CPU time | 1.28 seconds |
| Started | Sep 04 06:08:12 AM UTC 24 |
| Finished | Sep 04 06:08:15 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3372444991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 114.usbdev_fifo_levels.3372444991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/114.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/114.usbdev_tx_rx_disruption.2645154410 |
| Short name | T3336 |
| Test name | |
| Test status | |
| Simulation time | 651538103 ps |
| CPU time | 2.2 seconds |
| Started | Sep 04 06:08:12 AM UTC 24 |
| Finished | Sep 04 06:08:16 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2645154410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 114.usbdev_ tx_rx_disruption.2645154410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/114.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/115.usbdev_endpoint_types.4070627436 |
| Short name | T380 |
| Test name | |
| Test status | |
| Simulation time | 424534099 ps |
| CPU time | 1.68 seconds |
| Started | Sep 04 06:08:12 AM UTC 24 |
| Finished | Sep 04 06:08:15 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4070627436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 115.usbdev_endpoint_types.4070627436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/115.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/115.usbdev_fifo_levels.3156511659 |
| Short name | T3327 |
| Test name | |
| Test status | |
| Simulation time | 270775033 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 06:08:12 AM UTC 24 |
| Finished | Sep 04 06:08:15 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3156511659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 115.usbdev_fifo_levels.3156511659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/115.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/115.usbdev_tx_rx_disruption.9644868 |
| Short name | T3332 |
| Test name | |
| Test status | |
| Simulation time | 514153989 ps |
| CPU time | 1.91 seconds |
| Started | Sep 04 06:08:12 AM UTC 24 |
| Finished | Sep 04 06:08:15 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=9644868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 115.usbdev_tx_ rx_disruption.9644868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/115.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/116.usbdev_endpoint_types.2126730065 |
| Short name | T440 |
| Test name | |
| Test status | |
| Simulation time | 536486117 ps |
| CPU time | 1.69 seconds |
| Started | Sep 04 06:08:12 AM UTC 24 |
| Finished | Sep 04 06:08:15 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2126730065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 116.usbdev_endpoint_types.2126730065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/116.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/116.usbdev_tx_rx_disruption.2413206065 |
| Short name | T3335 |
| Test name | |
| Test status | |
| Simulation time | 515101566 ps |
| CPU time | 1.97 seconds |
| Started | Sep 04 06:08:13 AM UTC 24 |
| Finished | Sep 04 06:08:16 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2413206065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 116.usbdev_ tx_rx_disruption.2413206065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/116.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/117.usbdev_fifo_levels.369407964 |
| Short name | T3329 |
| Test name | |
| Test status | |
| Simulation time | 192382938 ps |
| CPU time | 1.37 seconds |
| Started | Sep 04 06:08:13 AM UTC 24 |
| Finished | Sep 04 06:08:15 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=369407964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 117.usbdev_fifo_levels.369407964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/117.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/117.usbdev_tx_rx_disruption.4188065600 |
| Short name | T3337 |
| Test name | |
| Test status | |
| Simulation time | 484798856 ps |
| CPU time | 2.34 seconds |
| Started | Sep 04 06:08:13 AM UTC 24 |
| Finished | Sep 04 06:08:16 AM UTC 24 |
| Peak memory | 217012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4188065600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 117.usbdev_ tx_rx_disruption.4188065600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/117.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/118.usbdev_endpoint_types.860198018 |
| Short name | T374 |
| Test name | |
| Test status | |
| Simulation time | 516929741 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 06:08:13 AM UTC 24 |
| Finished | Sep 04 06:08:15 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=860198018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 118.usbdev_endpoint_types.860198018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/118.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/118.usbdev_tx_rx_disruption.1098276167 |
| Short name | T3334 |
| Test name | |
| Test status | |
| Simulation time | 566251111 ps |
| CPU time | 1.63 seconds |
| Started | Sep 04 06:08:13 AM UTC 24 |
| Finished | Sep 04 06:08:16 AM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1098276167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 118.usbdev_ tx_rx_disruption.1098276167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/118.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/119.usbdev_endpoint_types.4245237232 |
| Short name | T388 |
| Test name | |
| Test status | |
| Simulation time | 187342328 ps |
| CPU time | 1.3 seconds |
| Started | Sep 04 06:08:13 AM UTC 24 |
| Finished | Sep 04 06:08:15 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4245237232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 119.usbdev_endpoint_types.4245237232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/119.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/119.usbdev_tx_rx_disruption.2008038746 |
| Short name | T3340 |
| Test name | |
| Test status | |
| Simulation time | 480979645 ps |
| CPU time | 1.89 seconds |
| Started | Sep 04 06:08:14 AM UTC 24 |
| Finished | Sep 04 06:08:17 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2008038746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 119.usbdev_ tx_rx_disruption.2008038746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/119.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_alert_test.1724528746 |
| Short name | T1190 |
| Test name | |
| Test status | |
| Simulation time | 66074098 ps |
| CPU time | 1.09 seconds |
| Started | Sep 04 05:51:35 AM UTC 24 |
| Finished | Sep 04 05:51:38 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1724528746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 12.usbdev_alert_test.1724528746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_disconnect.2540874930 |
| Short name | T1156 |
| Test name | |
| Test status | |
| Simulation time | 6662437447 ps |
| CPU time | 12.6 seconds |
| Started | Sep 04 05:51:02 AM UTC 24 |
| Finished | Sep 04 05:51:16 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2540874930 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_disconnect.2540874930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_reset.359706013 |
| Short name | T1172 |
| Test name | |
| Test status | |
| Simulation time | 15512869198 ps |
| CPU time | 24.57 seconds |
| Started | Sep 04 05:51:02 AM UTC 24 |
| Finished | Sep 04 05:51:28 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=359706013 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_reset.359706013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_resume.51968422 |
| Short name | T1135 |
| Test name | |
| Test status | |
| Simulation time | 25214978002 ps |
| CPU time | 38.45 seconds |
| Started | Sep 04 05:51:03 AM UTC 24 |
| Finished | Sep 04 05:51:43 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=51968422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_resume.51968422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_av_buffer.1034877000 |
| Short name | T1140 |
| Test name | |
| Test status | |
| Simulation time | 167411707 ps |
| CPU time | 1.06 seconds |
| Started | Sep 04 05:51:03 AM UTC 24 |
| Finished | Sep 04 05:51:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1034877000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_av_buffer.1034877000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_bitstuff_err.3094623202 |
| Short name | T1141 |
| Test name | |
| Test status | |
| Simulation time | 202335179 ps |
| CPU time | 1.16 seconds |
| Started | Sep 04 05:51:03 AM UTC 24 |
| Finished | Sep 04 05:51:05 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3094623202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_bitstuff_err.3094623202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_data_toggle_clear.1009128458 |
| Short name | T1146 |
| Test name | |
| Test status | |
| Simulation time | 580775060 ps |
| CPU time | 2.32 seconds |
| Started | Sep 04 05:51:05 AM UTC 24 |
| Finished | Sep 04 05:51:08 AM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1009128458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 12.usbdev_data_toggle_clear.1009128458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_device_address.4256844531 |
| Short name | T407 |
| Test name | |
| Test status | |
| Simulation time | 24128672979 ps |
| CPU time | 50.48 seconds |
| Started | Sep 04 05:51:05 AM UTC 24 |
| Finished | Sep 04 05:51:57 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4256844531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_device_address.4256844531 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_device_timeout.1485189541 |
| Short name | T1175 |
| Test name | |
| Test status | |
| Simulation time | 1199125717 ps |
| CPU time | 23.8 seconds |
| Started | Sep 04 05:51:05 AM UTC 24 |
| Finished | Sep 04 05:51:30 AM UTC 24 |
| Peak memory | 217392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1485189541 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_device_timeout.1485189541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_disable_endpoint.2742097857 |
| Short name | T1149 |
| Test name | |
| Test status | |
| Simulation time | 866124753 ps |
| CPU time | 3.07 seconds |
| Started | Sep 04 05:51:06 AM UTC 24 |
| Finished | Sep 04 05:51:10 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2742097857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 12.usbdev_disable_endpoint.2742097857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_disconnected.655017232 |
| Short name | T1147 |
| Test name | |
| Test status | |
| Simulation time | 143839443 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 05:51:06 AM UTC 24 |
| Finished | Sep 04 05:51:08 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=655017232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_disconnected.655017232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_enable.623668306 |
| Short name | T1148 |
| Test name | |
| Test status | |
| Simulation time | 32714820 ps |
| CPU time | 0.95 seconds |
| Started | Sep 04 05:51:07 AM UTC 24 |
| Finished | Sep 04 05:51:09 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=623668306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_enable.623668306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_endpoint_access.1242167065 |
| Short name | T1150 |
| Test name | |
| Test status | |
| Simulation time | 903154953 ps |
| CPU time | 2.94 seconds |
| Started | Sep 04 05:51:07 AM UTC 24 |
| Finished | Sep 04 05:51:11 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1242167065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_endpoint_access.1242167065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_endpoint_types.7621292 |
| Short name | T330 |
| Test name | |
| Test status | |
| Simulation time | 511083841 ps |
| CPU time | 2.16 seconds |
| Started | Sep 04 05:51:09 AM UTC 24 |
| Finished | Sep 04 05:51:12 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=7621292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverag e/default.vdb -cm_log /dev/null -cm_name 12.usbdev_endpoint_types.7621292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_fifo_rst.1883146664 |
| Short name | T1152 |
| Test name | |
| Test status | |
| Simulation time | 284495218 ps |
| CPU time | 2.59 seconds |
| Started | Sep 04 05:51:09 AM UTC 24 |
| Finished | Sep 04 05:51:12 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1883146664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_fifo_rst.1883146664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_in_iso.371240206 |
| Short name | T1153 |
| Test name | |
| Test status | |
| Simulation time | 174549836 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 05:51:10 AM UTC 24 |
| Finished | Sep 04 05:51:12 AM UTC 24 |
| Peak memory | 227412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=371240206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 12.usbdev_in_iso.371240206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_in_stall.1556273871 |
| Short name | T1155 |
| Test name | |
| Test status | |
| Simulation time | 196109645 ps |
| CPU time | 1.3 seconds |
| Started | Sep 04 05:51:11 AM UTC 24 |
| Finished | Sep 04 05:51:13 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1556273871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_in_stall.1556273871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_in_trans.3498496771 |
| Short name | T1157 |
| Test name | |
| Test status | |
| Simulation time | 216346492 ps |
| CPU time | 1.55 seconds |
| Started | Sep 04 05:51:13 AM UTC 24 |
| Finished | Sep 04 05:51:16 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3498496771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_in_trans.3498496771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_invalid_sync.903764331 |
| Short name | T1181 |
| Test name | |
| Test status | |
| Simulation time | 2891024135 ps |
| CPU time | 20.5 seconds |
| Started | Sep 04 05:51:10 AM UTC 24 |
| Finished | Sep 04 05:51:32 AM UTC 24 |
| Peak memory | 234328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=903764331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 12.usbdev_invalid_sync.903764331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_iso_retraction.3700387219 |
| Short name | T1232 |
| Test name | |
| Test status | |
| Simulation time | 5910441369 ps |
| CPU time | 48.72 seconds |
| Started | Sep 04 05:51:13 AM UTC 24 |
| Finished | Sep 04 05:52:04 AM UTC 24 |
| Peak memory | 217384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3700387219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_iso_retraction.3700387219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_link_in_err.1400766072 |
| Short name | T1158 |
| Test name | |
| Test status | |
| Simulation time | 194571550 ps |
| CPU time | 1.55 seconds |
| Started | Sep 04 05:51:13 AM UTC 24 |
| Finished | Sep 04 05:51:16 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1400766072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_link_in_err.1400766072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_link_resume.464659115 |
| Short name | T1280 |
| Test name | |
| Test status | |
| Simulation time | 26883232464 ps |
| CPU time | 71.61 seconds |
| Started | Sep 04 05:51:13 AM UTC 24 |
| Finished | Sep 04 05:52:27 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=464659115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 12.usbdev_link_resume.464659115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_link_suspend.159965382 |
| Short name | T1178 |
| Test name | |
| Test status | |
| Simulation time | 5278017954 ps |
| CPU time | 16.79 seconds |
| Started | Sep 04 05:51:13 AM UTC 24 |
| Finished | Sep 04 05:51:31 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=159965382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_link_suspend.159965382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_low_speed_traffic.2739525192 |
| Short name | T1184 |
| Test name | |
| Test status | |
| Simulation time | 2730236421 ps |
| CPU time | 19.03 seconds |
| Started | Sep 04 05:51:13 AM UTC 24 |
| Finished | Sep 04 05:51:34 AM UTC 24 |
| Peak memory | 229684 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2739525192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_low_speed_traffic.2739525192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_max_inter_pkt_delay.395561717 |
| Short name | T1159 |
| Test name | |
| Test status | |
| Simulation time | 2498697765 ps |
| CPU time | 27.66 seconds |
| Started | Sep 04 05:51:13 AM UTC 24 |
| Finished | Sep 04 05:51:43 AM UTC 24 |
| Peak memory | 234176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=395561717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_inter_pkt_delay.395561717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_max_length_in_transaction.3015735495 |
| Short name | T1160 |
| Test name | |
| Test status | |
| Simulation time | 253441435 ps |
| CPU time | 1.75 seconds |
| Started | Sep 04 05:51:13 AM UTC 24 |
| Finished | Sep 04 05:51:16 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3015735495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 12.usbdev_max_length_in_transaction.3015735495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_max_length_out_transaction.1224399019 |
| Short name | T1162 |
| Test name | |
| Test status | |
| Simulation time | 189802026 ps |
| CPU time | 1.61 seconds |
| Started | Sep 04 05:51:15 AM UTC 24 |
| Finished | Sep 04 05:51:17 AM UTC 24 |
| Peak memory | 214984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1224399019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 12.usbdev_max_length_out_transaction.1224399019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_max_non_iso_usb_traffic.3232307840 |
| Short name | T1217 |
| Test name | |
| Test status | |
| Simulation time | 3087034158 ps |
| CPU time | 40.56 seconds |
| Started | Sep 04 05:51:15 AM UTC 24 |
| Finished | Sep 04 05:51:57 AM UTC 24 |
| Peak memory | 234104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3232307840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_non_iso_usb_traffic.3232307840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_max_usb_traffic.2730884861 |
| Short name | T1207 |
| Test name | |
| Test status | |
| Simulation time | 2525706412 ps |
| CPU time | 30.64 seconds |
| Started | Sep 04 05:51:17 AM UTC 24 |
| Finished | Sep 04 05:51:49 AM UTC 24 |
| Peak memory | 234244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2730884861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_usb_traffic.2730884861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_min_inter_pkt_delay.1606065449 |
| Short name | T1276 |
| Test name | |
| Test status | |
| Simulation time | 2312373753 ps |
| CPU time | 67.7 seconds |
| Started | Sep 04 05:51:17 AM UTC 24 |
| Finished | Sep 04 05:52:27 AM UTC 24 |
| Peak memory | 227684 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1606065449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_min_inter_pkt_delay.1606065449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_min_length_in_transaction.2324008890 |
| Short name | T1164 |
| Test name | |
| Test status | |
| Simulation time | 230516430 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 05:51:17 AM UTC 24 |
| Finished | Sep 04 05:51:20 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2324008890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 12.usbdev_min_length_in_transaction.2324008890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_min_length_out_transaction.1520544767 |
| Short name | T1163 |
| Test name | |
| Test status | |
| Simulation time | 147860129 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 05:51:17 AM UTC 24 |
| Finished | Sep 04 05:51:20 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1520544767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 12.usbdev_min_length_out_transaction.1520544767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_nak_trans.2327237208 |
| Short name | T129 |
| Test name | |
| Test status | |
| Simulation time | 227011265 ps |
| CPU time | 1.68 seconds |
| Started | Sep 04 05:51:18 AM UTC 24 |
| Finished | Sep 04 05:51:21 AM UTC 24 |
| Peak memory | 214692 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2327237208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_nak_trans.2327237208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_out_iso.487484948 |
| Short name | T1165 |
| Test name | |
| Test status | |
| Simulation time | 212400452 ps |
| CPU time | 1.63 seconds |
| Started | Sep 04 05:51:18 AM UTC 24 |
| Finished | Sep 04 05:51:21 AM UTC 24 |
| Peak memory | 214784 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=487484948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 12.usbdev_out_iso.487484948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_out_stall.2016640882 |
| Short name | T1166 |
| Test name | |
| Test status | |
| Simulation time | 158895793 ps |
| CPU time | 1.33 seconds |
| Started | Sep 04 05:51:21 AM UTC 24 |
| Finished | Sep 04 05:51:23 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2016640882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_out_stall.2016640882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_out_trans_nak.1332915574 |
| Short name | T1167 |
| Test name | |
| Test status | |
| Simulation time | 155698067 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 05:51:21 AM UTC 24 |
| Finished | Sep 04 05:51:23 AM UTC 24 |
| Peak memory | 215884 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1332915574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 12.usbdev_out_trans_nak.1332915574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_pending_in_trans.2785763287 |
| Short name | T1168 |
| Test name | |
| Test status | |
| Simulation time | 146385670 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 05:51:22 AM UTC 24 |
| Finished | Sep 04 05:51:24 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2785763287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 12.usbdev_pending_in_trans.2785763287 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_phy_config_pinflip.3643924139 |
| Short name | T1169 |
| Test name | |
| Test status | |
| Simulation time | 210618112 ps |
| CPU time | 1.71 seconds |
| Started | Sep 04 05:51:22 AM UTC 24 |
| Finished | Sep 04 05:51:25 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3643924139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 12.usbdev_phy_config_pinflip.3643924139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_phy_config_usb_ref_disable.790388298 |
| Short name | T1170 |
| Test name | |
| Test status | |
| Simulation time | 158375468 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 05:51:24 AM UTC 24 |
| Finished | Sep 04 05:51:26 AM UTC 24 |
| Peak memory | 216660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=790388298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 12.usbdev_phy_config_usb_ref_disable.790388298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_phy_pins_sense.952876454 |
| Short name | T42 |
| Test name | |
| Test status | |
| Simulation time | 42544549 ps |
| CPU time | 1.01 seconds |
| Started | Sep 04 05:51:24 AM UTC 24 |
| Finished | Sep 04 05:51:26 AM UTC 24 |
| Peak memory | 216680 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=952876454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 12.usbdev_phy_pins_sense.952876454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_buffer.3135783199 |
| Short name | T258 |
| Test name | |
| Test status | |
| Simulation time | 6998495500 ps |
| CPU time | 23.66 seconds |
| Started | Sep 04 05:51:25 AM UTC 24 |
| Finished | Sep 04 05:51:50 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3135783199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 12.usbdev_pkt_buffer.3135783199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_received.2074453472 |
| Short name | T1173 |
| Test name | |
| Test status | |
| Simulation time | 174041607 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 05:51:25 AM UTC 24 |
| Finished | Sep 04 05:51:28 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2074453472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_pkt_received.2074453472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_sent.4285183589 |
| Short name | T1174 |
| Test name | |
| Test status | |
| Simulation time | 208061244 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 05:51:26 AM UTC 24 |
| Finished | Sep 04 05:51:29 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4285183589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_pkt_sent.4285183589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_random_length_in_transaction.2871234578 |
| Short name | T1176 |
| Test name | |
| Test status | |
| Simulation time | 197601230 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 05:51:28 AM UTC 24 |
| Finished | Sep 04 05:51:30 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2871234578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 12.usbdev_random_length_in_transaction.2871234578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_random_length_out_transaction.3140607401 |
| Short name | T1180 |
| Test name | |
| Test status | |
| Simulation time | 171753407 ps |
| CPU time | 1.68 seconds |
| Started | Sep 04 05:51:29 AM UTC 24 |
| Finished | Sep 04 05:51:32 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3140607401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 12.usbdev_random_length_out_transaction.3140607401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_resume_link_active.2016530468 |
| Short name | T1231 |
| Test name | |
| Test status | |
| Simulation time | 20168222761 ps |
| CPU time | 33.06 seconds |
| Started | Sep 04 05:51:29 AM UTC 24 |
| Finished | Sep 04 05:52:03 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2016530468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 12.usbdev_resume_link_active.2016530468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_rx_crc_err.1845239874 |
| Short name | T1179 |
| Test name | |
| Test status | |
| Simulation time | 198298907 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:51:29 AM UTC 24 |
| Finished | Sep 04 05:51:31 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1845239874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 12.usbdev_rx_crc_err.1845239874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_rx_full.1302707041 |
| Short name | T1183 |
| Test name | |
| Test status | |
| Simulation time | 349303921 ps |
| CPU time | 1.78 seconds |
| Started | Sep 04 05:51:30 AM UTC 24 |
| Finished | Sep 04 05:51:33 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1302707041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_rx_full.1302707041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_setup_stage.2514474013 |
| Short name | T1182 |
| Test name | |
| Test status | |
| Simulation time | 171652108 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 05:51:30 AM UTC 24 |
| Finished | Sep 04 05:51:33 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2514474013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_setup_stage.2514474013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_setup_trans_ignored.2861011562 |
| Short name | T1185 |
| Test name | |
| Test status | |
| Simulation time | 155765712 ps |
| CPU time | 1.36 seconds |
| Started | Sep 04 05:51:31 AM UTC 24 |
| Finished | Sep 04 05:51:34 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2861011562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 12.usbdev_setup_trans_ignored.2861011562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_smoke.2900192054 |
| Short name | T1188 |
| Test name | |
| Test status | |
| Simulation time | 235674983 ps |
| CPU time | 1.74 seconds |
| Started | Sep 04 05:51:33 AM UTC 24 |
| Finished | Sep 04 05:51:36 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2900192054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_smoke.2900192054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_spurious_pids_ignored.801158215 |
| Short name | T1223 |
| Test name | |
| Test status | |
| Simulation time | 3185974719 ps |
| CPU time | 25.97 seconds |
| Started | Sep 04 05:51:33 AM UTC 24 |
| Finished | Sep 04 05:52:00 AM UTC 24 |
| Peak memory | 229524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=801158215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 12.usbdev_spurious_pids_ignored.801158215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_stall_priority_over_nak.321003935 |
| Short name | T1186 |
| Test name | |
| Test status | |
| Simulation time | 151877199 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 05:51:33 AM UTC 24 |
| Finished | Sep 04 05:51:36 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=321003935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_stall_priority_over_nak.321003935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_stall_trans.805336915 |
| Short name | T1187 |
| Test name | |
| Test status | |
| Simulation time | 154099889 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 05:51:33 AM UTC 24 |
| Finished | Sep 04 05:51:36 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=805336915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 12.usbdev_stall_trans.805336915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_stream_len_max.452889332 |
| Short name | T1193 |
| Test name | |
| Test status | |
| Simulation time | 850854202 ps |
| CPU time | 4.52 seconds |
| Started | Sep 04 05:51:35 AM UTC 24 |
| Finished | Sep 04 05:51:41 AM UTC 24 |
| Peak memory | 217268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=452889332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 12.usbdev_stream_len_max.452889332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_streaming_out.487153052 |
| Short name | T1328 |
| Test name | |
| Test status | |
| Simulation time | 3017111443 ps |
| CPU time | 83.2 seconds |
| Started | Sep 04 05:51:33 AM UTC 24 |
| Finished | Sep 04 05:52:58 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=487153052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_streaming_out.487153052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_timeout_missing_host_handshake.1248350685 |
| Short name | T1194 |
| Test name | |
| Test status | |
| Simulation time | 1162108556 ps |
| CPU time | 32.92 seconds |
| Started | Sep 04 05:51:06 AM UTC 24 |
| Finished | Sep 04 05:51:41 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1248350685 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_timeout_missing_host_handshake.1248350685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/12.usbdev_tx_rx_disruption.868268544 |
| Short name | T1191 |
| Test name | |
| Test status | |
| Simulation time | 500134131 ps |
| CPU time | 2.36 seconds |
| Started | Sep 04 05:51:35 AM UTC 24 |
| Finished | Sep 04 05:51:39 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=868268544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_tx _rx_disruption.868268544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/12.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/120.usbdev_endpoint_types.2243976423 |
| Short name | T3338 |
| Test name | |
| Test status | |
| Simulation time | 221096333 ps |
| CPU time | 1.16 seconds |
| Started | Sep 04 06:08:14 AM UTC 24 |
| Finished | Sep 04 06:08:16 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2243976423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 120.usbdev_endpoint_types.2243976423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/120.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/120.usbdev_tx_rx_disruption.1032700015 |
| Short name | T118 |
| Test name | |
| Test status | |
| Simulation time | 543975118 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 06:08:14 AM UTC 24 |
| Finished | Sep 04 06:08:17 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1032700015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 120.usbdev_ tx_rx_disruption.1032700015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/120.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/121.usbdev_tx_rx_disruption.605144325 |
| Short name | T3346 |
| Test name | |
| Test status | |
| Simulation time | 500508465 ps |
| CPU time | 1.63 seconds |
| Started | Sep 04 06:08:16 AM UTC 24 |
| Finished | Sep 04 06:08:18 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=605144325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 121.usbdev_t x_rx_disruption.605144325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/121.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/122.usbdev_endpoint_types.32790228 |
| Short name | T355 |
| Test name | |
| Test status | |
| Simulation time | 355096337 ps |
| CPU time | 1.18 seconds |
| Started | Sep 04 06:08:16 AM UTC 24 |
| Finished | Sep 04 06:08:18 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=32790228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 122.usbdev_endpoint_types.32790228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/122.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/122.usbdev_fifo_levels.1764876398 |
| Short name | T3343 |
| Test name | |
| Test status | |
| Simulation time | 160564021 ps |
| CPU time | 1.12 seconds |
| Started | Sep 04 06:08:16 AM UTC 24 |
| Finished | Sep 04 06:08:18 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1764876398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 122.usbdev_fifo_levels.1764876398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/122.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/122.usbdev_tx_rx_disruption.3302510159 |
| Short name | T3349 |
| Test name | |
| Test status | |
| Simulation time | 535903313 ps |
| CPU time | 1.7 seconds |
| Started | Sep 04 06:08:16 AM UTC 24 |
| Finished | Sep 04 06:08:19 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3302510159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 122.usbdev_ tx_rx_disruption.3302510159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/122.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/123.usbdev_endpoint_types.1152696277 |
| Short name | T3348 |
| Test name | |
| Test status | |
| Simulation time | 280919682 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 06:08:16 AM UTC 24 |
| Finished | Sep 04 06:08:18 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1152696277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 123.usbdev_endpoint_types.1152696277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/123.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/123.usbdev_fifo_levels.794024686 |
| Short name | T3305 |
| Test name | |
| Test status | |
| Simulation time | 168340636 ps |
| CPU time | 0.89 seconds |
| Started | Sep 04 06:08:16 AM UTC 24 |
| Finished | Sep 04 06:08:18 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=794024686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 123.usbdev_fifo_levels.794024686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/123.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/123.usbdev_tx_rx_disruption.3921779948 |
| Short name | T3350 |
| Test name | |
| Test status | |
| Simulation time | 530191389 ps |
| CPU time | 1.77 seconds |
| Started | Sep 04 06:08:16 AM UTC 24 |
| Finished | Sep 04 06:08:19 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3921779948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 123.usbdev_ tx_rx_disruption.3921779948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/123.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/124.usbdev_endpoint_types.3769114721 |
| Short name | T3344 |
| Test name | |
| Test status | |
| Simulation time | 188807317 ps |
| CPU time | 0.97 seconds |
| Started | Sep 04 06:08:16 AM UTC 24 |
| Finished | Sep 04 06:08:18 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3769114721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 124.usbdev_endpoint_types.3769114721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/124.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/124.usbdev_fifo_levels.2815633755 |
| Short name | T3347 |
| Test name | |
| Test status | |
| Simulation time | 267866793 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 06:08:16 AM UTC 24 |
| Finished | Sep 04 06:08:18 AM UTC 24 |
| Peak memory | 215004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2815633755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 124.usbdev_fifo_levels.2815633755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/124.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/124.usbdev_tx_rx_disruption.3317237879 |
| Short name | T3354 |
| Test name | |
| Test status | |
| Simulation time | 621678934 ps |
| CPU time | 1.99 seconds |
| Started | Sep 04 06:08:16 AM UTC 24 |
| Finished | Sep 04 06:08:19 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3317237879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 124.usbdev_ tx_rx_disruption.3317237879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/124.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/125.usbdev_endpoint_types.3781262672 |
| Short name | T322 |
| Test name | |
| Test status | |
| Simulation time | 278076930 ps |
| CPU time | 1.24 seconds |
| Started | Sep 04 06:08:16 AM UTC 24 |
| Finished | Sep 04 06:08:18 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3781262672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 125.usbdev_endpoint_types.3781262672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/125.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/125.usbdev_fifo_levels.1244613415 |
| Short name | T3352 |
| Test name | |
| Test status | |
| Simulation time | 280353735 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 06:08:16 AM UTC 24 |
| Finished | Sep 04 06:08:19 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1244613415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 125.usbdev_fifo_levels.1244613415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/125.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/125.usbdev_tx_rx_disruption.599779827 |
| Short name | T3351 |
| Test name | |
| Test status | |
| Simulation time | 510231271 ps |
| CPU time | 1.62 seconds |
| Started | Sep 04 06:08:16 AM UTC 24 |
| Finished | Sep 04 06:08:19 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=599779827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 125.usbdev_t x_rx_disruption.599779827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/125.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/126.usbdev_endpoint_types.2600210695 |
| Short name | T3345 |
| Test name | |
| Test status | |
| Simulation time | 182116881 ps |
| CPU time | 1.05 seconds |
| Started | Sep 04 06:08:16 AM UTC 24 |
| Finished | Sep 04 06:08:18 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2600210695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 126.usbdev_endpoint_types.2600210695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/126.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/126.usbdev_fifo_levels.117234415 |
| Short name | T570 |
| Test name | |
| Test status | |
| Simulation time | 300403384 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 06:08:16 AM UTC 24 |
| Finished | Sep 04 06:08:19 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=117234415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 126.usbdev_fifo_levels.117234415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/126.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/126.usbdev_tx_rx_disruption.3932757252 |
| Short name | T3353 |
| Test name | |
| Test status | |
| Simulation time | 553132925 ps |
| CPU time | 1.75 seconds |
| Started | Sep 04 06:08:16 AM UTC 24 |
| Finished | Sep 04 06:08:19 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3932757252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 126.usbdev_ tx_rx_disruption.3932757252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/126.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/127.usbdev_tx_rx_disruption.147870013 |
| Short name | T3357 |
| Test name | |
| Test status | |
| Simulation time | 540941500 ps |
| CPU time | 1.6 seconds |
| Started | Sep 04 06:08:18 AM UTC 24 |
| Finished | Sep 04 06:08:21 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=147870013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 127.usbdev_t x_rx_disruption.147870013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/127.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/128.usbdev_fifo_levels.875385799 |
| Short name | T556 |
| Test name | |
| Test status | |
| Simulation time | 266530159 ps |
| CPU time | 1.08 seconds |
| Started | Sep 04 06:08:18 AM UTC 24 |
| Finished | Sep 04 06:08:20 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=875385799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 128.usbdev_fifo_levels.875385799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/128.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/128.usbdev_tx_rx_disruption.1370414592 |
| Short name | T3359 |
| Test name | |
| Test status | |
| Simulation time | 497248694 ps |
| CPU time | 1.65 seconds |
| Started | Sep 04 06:08:18 AM UTC 24 |
| Finished | Sep 04 06:08:21 AM UTC 24 |
| Peak memory | 214596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1370414592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 128.usbdev_ tx_rx_disruption.1370414592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/128.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/129.usbdev_tx_rx_disruption.2015995693 |
| Short name | T3358 |
| Test name | |
| Test status | |
| Simulation time | 446582971 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 06:08:18 AM UTC 24 |
| Finished | Sep 04 06:08:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2015995693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 129.usbdev_ tx_rx_disruption.2015995693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/129.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_alert_test.1417068542 |
| Short name | T1241 |
| Test name | |
| Test status | |
| Simulation time | 36901278 ps |
| CPU time | 0.99 seconds |
| Started | Sep 04 05:52:06 AM UTC 24 |
| Finished | Sep 04 05:52:08 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1417068542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 13.usbdev_alert_test.1417068542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_disconnect.3735256176 |
| Short name | T1210 |
| Test name | |
| Test status | |
| Simulation time | 4686250011 ps |
| CPU time | 14.13 seconds |
| Started | Sep 04 05:51:35 AM UTC 24 |
| Finished | Sep 04 05:51:51 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3735256176 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_disconnect.3735256176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_reset.3047030541 |
| Short name | T1259 |
| Test name | |
| Test status | |
| Simulation time | 20994943502 ps |
| CPU time | 38.97 seconds |
| Started | Sep 04 05:51:37 AM UTC 24 |
| Finished | Sep 04 05:52:18 AM UTC 24 |
| Peak memory | 217072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3047030541 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_reset.3047030541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_resume.1045508824 |
| Short name | T1250 |
| Test name | |
| Test status | |
| Simulation time | 23811628633 ps |
| CPU time | 34.62 seconds |
| Started | Sep 04 05:51:37 AM UTC 24 |
| Finished | Sep 04 05:52:13 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1045508824 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_resume.1045508824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_av_buffer.3946399446 |
| Short name | T1192 |
| Test name | |
| Test status | |
| Simulation time | 187412858 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 05:51:37 AM UTC 24 |
| Finished | Sep 04 05:51:40 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3946399446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_av_buffer.3946399446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_bitstuff_err.1383317642 |
| Short name | T1195 |
| Test name | |
| Test status | |
| Simulation time | 160781106 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 05:51:39 AM UTC 24 |
| Finished | Sep 04 05:51:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1383317642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_bitstuff_err.1383317642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_data_toggle_clear.3450899911 |
| Short name | T1196 |
| Test name | |
| Test status | |
| Simulation time | 262292936 ps |
| CPU time | 1.86 seconds |
| Started | Sep 04 05:51:39 AM UTC 24 |
| Finished | Sep 04 05:51:42 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3450899911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 13.usbdev_data_toggle_clear.3450899911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_data_toggle_restore.1836352790 |
| Short name | T489 |
| Test name | |
| Test status | |
| Simulation time | 1427401856 ps |
| CPU time | 6.09 seconds |
| Started | Sep 04 05:51:40 AM UTC 24 |
| Finished | Sep 04 05:51:48 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1836352790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_data_toggle_restore.1836352790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_device_address.3630626849 |
| Short name | T1308 |
| Test name | |
| Test status | |
| Simulation time | 32200082569 ps |
| CPU time | 62.01 seconds |
| Started | Sep 04 05:51:40 AM UTC 24 |
| Finished | Sep 04 05:52:44 AM UTC 24 |
| Peak memory | 217384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3630626849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_device_address.3630626849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_device_timeout.3197550692 |
| Short name | T1266 |
| Test name | |
| Test status | |
| Simulation time | 1537018338 ps |
| CPU time | 36.36 seconds |
| Started | Sep 04 05:51:43 AM UTC 24 |
| Finished | Sep 04 05:52:20 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3197550692 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_device_timeout.3197550692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_disable_endpoint.2312305695 |
| Short name | T1199 |
| Test name | |
| Test status | |
| Simulation time | 424164472 ps |
| CPU time | 1.88 seconds |
| Started | Sep 04 05:51:43 AM UTC 24 |
| Finished | Sep 04 05:51:45 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2312305695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 13.usbdev_disable_endpoint.2312305695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_disconnected.149969614 |
| Short name | T1198 |
| Test name | |
| Test status | |
| Simulation time | 170944165 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 05:51:43 AM UTC 24 |
| Finished | Sep 04 05:51:45 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=149969614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_disconnected.149969614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_enable.1491415085 |
| Short name | T1200 |
| Test name | |
| Test status | |
| Simulation time | 47262050 ps |
| CPU time | 1.11 seconds |
| Started | Sep 04 05:51:44 AM UTC 24 |
| Finished | Sep 04 05:51:47 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1491415085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 13.usbdev_enable.1491415085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_endpoint_access.2399062598 |
| Short name | T1205 |
| Test name | |
| Test status | |
| Simulation time | 753370303 ps |
| CPU time | 3.14 seconds |
| Started | Sep 04 05:51:44 AM UTC 24 |
| Finished | Sep 04 05:51:49 AM UTC 24 |
| Peak memory | 217188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2399062598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_endpoint_access.2399062598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_endpoint_types.4082069108 |
| Short name | T1203 |
| Test name | |
| Test status | |
| Simulation time | 229674667 ps |
| CPU time | 1.65 seconds |
| Started | Sep 04 05:51:44 AM UTC 24 |
| Finished | Sep 04 05:51:47 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4082069108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_endpoint_types.4082069108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_fifo_levels.2641419602 |
| Short name | T1201 |
| Test name | |
| Test status | |
| Simulation time | 147337335 ps |
| CPU time | 1 seconds |
| Started | Sep 04 05:51:44 AM UTC 24 |
| Finished | Sep 04 05:51:47 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2641419602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_fifo_levels.2641419602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_fifo_rst.383411353 |
| Short name | T1212 |
| Test name | |
| Test status | |
| Simulation time | 493889521 ps |
| CPU time | 4.65 seconds |
| Started | Sep 04 05:51:46 AM UTC 24 |
| Finished | Sep 04 05:51:52 AM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=383411353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 13.usbdev_fifo_rst.383411353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_in_iso.1513706454 |
| Short name | T1204 |
| Test name | |
| Test status | |
| Simulation time | 199308618 ps |
| CPU time | 1.22 seconds |
| Started | Sep 04 05:51:46 AM UTC 24 |
| Finished | Sep 04 05:51:49 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1513706454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 13.usbdev_in_iso.1513706454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_in_stall.1881896588 |
| Short name | T1206 |
| Test name | |
| Test status | |
| Simulation time | 155319191 ps |
| CPU time | 1.28 seconds |
| Started | Sep 04 05:51:46 AM UTC 24 |
| Finished | Sep 04 05:51:49 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1881896588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_in_stall.1881896588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_in_trans.3049189239 |
| Short name | T1208 |
| Test name | |
| Test status | |
| Simulation time | 202812878 ps |
| CPU time | 1.57 seconds |
| Started | Sep 04 05:51:48 AM UTC 24 |
| Finished | Sep 04 05:51:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3049189239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_in_trans.3049189239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_invalid_sync.177338742 |
| Short name | T1405 |
| Test name | |
| Test status | |
| Simulation time | 3634474570 ps |
| CPU time | 104.51 seconds |
| Started | Sep 04 05:51:46 AM UTC 24 |
| Finished | Sep 04 05:53:33 AM UTC 24 |
| Peak memory | 229592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=177338742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_invalid_sync.177338742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_iso_retraction.1258683181 |
| Short name | T1356 |
| Test name | |
| Test status | |
| Simulation time | 6405558910 ps |
| CPU time | 78.9 seconds |
| Started | Sep 04 05:51:48 AM UTC 24 |
| Finished | Sep 04 05:53:08 AM UTC 24 |
| Peak memory | 217208 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1258683181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_iso_retraction.1258683181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_link_in_err.191641518 |
| Short name | T1209 |
| Test name | |
| Test status | |
| Simulation time | 218415444 ps |
| CPU time | 1.63 seconds |
| Started | Sep 04 05:51:48 AM UTC 24 |
| Finished | Sep 04 05:51:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=191641518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_link_in_err.191641518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_link_resume.1355702187 |
| Short name | T1251 |
| Test name | |
| Test status | |
| Simulation time | 11595085139 ps |
| CPU time | 24.4 seconds |
| Started | Sep 04 05:51:48 AM UTC 24 |
| Finished | Sep 04 05:52:13 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1355702187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_link_resume.1355702187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_link_suspend.402887660 |
| Short name | T1253 |
| Test name | |
| Test status | |
| Simulation time | 10965763869 ps |
| CPU time | 24.28 seconds |
| Started | Sep 04 05:51:49 AM UTC 24 |
| Finished | Sep 04 05:52:15 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=402887660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_link_suspend.402887660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_low_speed_traffic.3295806915 |
| Short name | T1380 |
| Test name | |
| Test status | |
| Simulation time | 2864336581 ps |
| CPU time | 89.54 seconds |
| Started | Sep 04 05:51:50 AM UTC 24 |
| Finished | Sep 04 05:53:22 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3295806915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_low_speed_traffic.3295806915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_max_inter_pkt_delay.2871073660 |
| Short name | T1325 |
| Test name | |
| Test status | |
| Simulation time | 2236039822 ps |
| CPU time | 63.91 seconds |
| Started | Sep 04 05:51:50 AM UTC 24 |
| Finished | Sep 04 05:52:56 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2871073660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_inter_pkt_delay.2871073660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_max_length_in_transaction.4087489645 |
| Short name | T1214 |
| Test name | |
| Test status | |
| Simulation time | 241334782 ps |
| CPU time | 1.8 seconds |
| Started | Sep 04 05:51:50 AM UTC 24 |
| Finished | Sep 04 05:51:53 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4087489645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 13.usbdev_max_length_in_transaction.4087489645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_max_length_out_transaction.2457518331 |
| Short name | T1213 |
| Test name | |
| Test status | |
| Simulation time | 199914822 ps |
| CPU time | 1.72 seconds |
| Started | Sep 04 05:51:50 AM UTC 24 |
| Finished | Sep 04 05:51:53 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2457518331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_max_length_out_transaction.2457518331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_max_non_iso_usb_traffic.1984544957 |
| Short name | T1248 |
| Test name | |
| Test status | |
| Simulation time | 2260883561 ps |
| CPU time | 18.33 seconds |
| Started | Sep 04 05:51:52 AM UTC 24 |
| Finished | Sep 04 05:52:12 AM UTC 24 |
| Peak memory | 229540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1984544957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_non_iso_usb_traffic.1984544957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_max_usb_traffic.1376402852 |
| Short name | T1256 |
| Test name | |
| Test status | |
| Simulation time | 2324960258 ps |
| CPU time | 21.72 seconds |
| Started | Sep 04 05:51:52 AM UTC 24 |
| Finished | Sep 04 05:52:15 AM UTC 24 |
| Peak memory | 229724 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1376402852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_usb_traffic.1376402852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_min_inter_pkt_delay.2233251665 |
| Short name | T1252 |
| Test name | |
| Test status | |
| Simulation time | 2045786374 ps |
| CPU time | 20.78 seconds |
| Started | Sep 04 05:51:52 AM UTC 24 |
| Finished | Sep 04 05:52:14 AM UTC 24 |
| Peak memory | 233976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2233251665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_min_inter_pkt_delay.2233251665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_min_length_in_transaction.2415778964 |
| Short name | T1215 |
| Test name | |
| Test status | |
| Simulation time | 155650723 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 05:51:52 AM UTC 24 |
| Finished | Sep 04 05:51:55 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2415778964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 13.usbdev_min_length_in_transaction.2415778964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_min_length_out_transaction.798703685 |
| Short name | T1216 |
| Test name | |
| Test status | |
| Simulation time | 150846631 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 05:51:52 AM UTC 24 |
| Finished | Sep 04 05:51:55 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=798703685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 13.usbdev_min_length_out_transaction.798703685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_nak_trans.3566816362 |
| Short name | T151 |
| Test name | |
| Test status | |
| Simulation time | 260548144 ps |
| CPU time | 1.84 seconds |
| Started | Sep 04 05:51:53 AM UTC 24 |
| Finished | Sep 04 05:51:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3566816362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_nak_trans.3566816362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_out_iso.104747286 |
| Short name | T1218 |
| Test name | |
| Test status | |
| Simulation time | 167693355 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 05:51:54 AM UTC 24 |
| Finished | Sep 04 05:51:57 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=104747286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 13.usbdev_out_iso.104747286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_out_stall.894529905 |
| Short name | T1219 |
| Test name | |
| Test status | |
| Simulation time | 206456817 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 05:51:54 AM UTC 24 |
| Finished | Sep 04 05:51:57 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=894529905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_out_stall.894529905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_out_trans_nak.1967447814 |
| Short name | T1221 |
| Test name | |
| Test status | |
| Simulation time | 190459360 ps |
| CPU time | 1.55 seconds |
| Started | Sep 04 05:51:56 AM UTC 24 |
| Finished | Sep 04 05:51:58 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1967447814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_out_trans_nak.1967447814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_pending_in_trans.4097746941 |
| Short name | T1220 |
| Test name | |
| Test status | |
| Simulation time | 159198658 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 05:51:56 AM UTC 24 |
| Finished | Sep 04 05:51:58 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4097746941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 13.usbdev_pending_in_trans.4097746941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_phy_config_pinflip.3911862193 |
| Short name | T1222 |
| Test name | |
| Test status | |
| Simulation time | 234448476 ps |
| CPU time | 1.78 seconds |
| Started | Sep 04 05:51:57 AM UTC 24 |
| Finished | Sep 04 05:52:00 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3911862193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 13.usbdev_phy_config_pinflip.3911862193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_phy_config_usb_ref_disable.2677737363 |
| Short name | T1225 |
| Test name | |
| Test status | |
| Simulation time | 166267306 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 05:51:59 AM UTC 24 |
| Finished | Sep 04 05:52:01 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2677737363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_phy_config_usb_ref_disable.2677737363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_phy_pins_sense.645408526 |
| Short name | T1224 |
| Test name | |
| Test status | |
| Simulation time | 33297759 ps |
| CPU time | 1.07 seconds |
| Started | Sep 04 05:51:59 AM UTC 24 |
| Finished | Sep 04 05:52:01 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=645408526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_phy_pins_sense.645408526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_buffer.2192707158 |
| Short name | T259 |
| Test name | |
| Test status | |
| Simulation time | 18824194972 ps |
| CPU time | 47.44 seconds |
| Started | Sep 04 05:51:59 AM UTC 24 |
| Finished | Sep 04 05:52:48 AM UTC 24 |
| Peak memory | 231760 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2192707158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_pkt_buffer.2192707158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_received.4157606772 |
| Short name | T1226 |
| Test name | |
| Test status | |
| Simulation time | 211343884 ps |
| CPU time | 1.69 seconds |
| Started | Sep 04 05:51:59 AM UTC 24 |
| Finished | Sep 04 05:52:01 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4157606772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_pkt_received.4157606772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_sent.3279354594 |
| Short name | T1229 |
| Test name | |
| Test status | |
| Simulation time | 249442234 ps |
| CPU time | 1.79 seconds |
| Started | Sep 04 05:52:00 AM UTC 24 |
| Finished | Sep 04 05:52:03 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3279354594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_pkt_sent.3279354594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_random_length_in_transaction.2375660795 |
| Short name | T1227 |
| Test name | |
| Test status | |
| Simulation time | 180847424 ps |
| CPU time | 1.61 seconds |
| Started | Sep 04 05:52:00 AM UTC 24 |
| Finished | Sep 04 05:52:03 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2375660795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_random_length_in_transaction.2375660795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_random_length_out_transaction.1382237895 |
| Short name | T1228 |
| Test name | |
| Test status | |
| Simulation time | 199921939 ps |
| CPU time | 1.6 seconds |
| Started | Sep 04 05:52:00 AM UTC 24 |
| Finished | Sep 04 05:52:03 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1382237895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 13.usbdev_random_length_out_transaction.1382237895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_resume_link_active.184989460 |
| Short name | T1295 |
| Test name | |
| Test status | |
| Simulation time | 20172089482 ps |
| CPU time | 31.73 seconds |
| Started | Sep 04 05:52:01 AM UTC 24 |
| Finished | Sep 04 05:52:34 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=184989460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 13.usbdev_resume_link_active.184989460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_rx_crc_err.1775396125 |
| Short name | T1233 |
| Test name | |
| Test status | |
| Simulation time | 154930070 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 05:52:01 AM UTC 24 |
| Finished | Sep 04 05:52:04 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1775396125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_rx_crc_err.1775396125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_rx_full.3902425146 |
| Short name | T1234 |
| Test name | |
| Test status | |
| Simulation time | 403052167 ps |
| CPU time | 2.61 seconds |
| Started | Sep 04 05:52:02 AM UTC 24 |
| Finished | Sep 04 05:52:05 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3902425146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 13.usbdev_rx_full.3902425146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_setup_stage.2335040471 |
| Short name | T1235 |
| Test name | |
| Test status | |
| Simulation time | 156024868 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 05:52:03 AM UTC 24 |
| Finished | Sep 04 05:52:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2335040471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_setup_stage.2335040471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_setup_trans_ignored.3543914971 |
| Short name | T1238 |
| Test name | |
| Test status | |
| Simulation time | 155263096 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 05:52:04 AM UTC 24 |
| Finished | Sep 04 05:52:07 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3543914971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 13.usbdev_setup_trans_ignored.3543914971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_smoke.1998720703 |
| Short name | T1237 |
| Test name | |
| Test status | |
| Simulation time | 204233867 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 05:52:04 AM UTC 24 |
| Finished | Sep 04 05:52:07 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1998720703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_smoke.1998720703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_spurious_pids_ignored.1915034618 |
| Short name | T1416 |
| Test name | |
| Test status | |
| Simulation time | 3346474756 ps |
| CPU time | 97.66 seconds |
| Started | Sep 04 05:52:04 AM UTC 24 |
| Finished | Sep 04 05:53:44 AM UTC 24 |
| Peak memory | 234332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1915034618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 13.usbdev_spurious_pids_ignored.1915034618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_stall_priority_over_nak.962759094 |
| Short name | T1239 |
| Test name | |
| Test status | |
| Simulation time | 190193833 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 05:52:04 AM UTC 24 |
| Finished | Sep 04 05:52:07 AM UTC 24 |
| Peak memory | 215012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=962759094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_stall_priority_over_nak.962759094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_stall_trans.913574281 |
| Short name | T1240 |
| Test name | |
| Test status | |
| Simulation time | 215352590 ps |
| CPU time | 1.61 seconds |
| Started | Sep 04 05:52:04 AM UTC 24 |
| Finished | Sep 04 05:52:07 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=913574281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_stall_trans.913574281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_stream_len_max.1217553053 |
| Short name | T1242 |
| Test name | |
| Test status | |
| Simulation time | 500612538 ps |
| CPU time | 2.58 seconds |
| Started | Sep 04 05:52:06 AM UTC 24 |
| Finished | Sep 04 05:52:09 AM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1217553053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_stream_len_max.1217553053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_streaming_out.3922581207 |
| Short name | T1374 |
| Test name | |
| Test status | |
| Simulation time | 2474593872 ps |
| CPU time | 71.11 seconds |
| Started | Sep 04 05:52:06 AM UTC 24 |
| Finished | Sep 04 05:53:19 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3922581207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_streaming_out.3922581207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_timeout_missing_host_handshake.3314365801 |
| Short name | T1236 |
| Test name | |
| Test status | |
| Simulation time | 1042815025 ps |
| CPU time | 21.35 seconds |
| Started | Sep 04 05:51:43 AM UTC 24 |
| Finished | Sep 04 05:52:05 AM UTC 24 |
| Peak memory | 217324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3314365801 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_timeout_missing_host_handshake.3314365801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/13.usbdev_tx_rx_disruption.1471918814 |
| Short name | T1243 |
| Test name | |
| Test status | |
| Simulation time | 534043798 ps |
| CPU time | 3.03 seconds |
| Started | Sep 04 05:52:06 AM UTC 24 |
| Finished | Sep 04 05:52:10 AM UTC 24 |
| Peak memory | 217040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1471918814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_t x_rx_disruption.1471918814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/13.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/130.usbdev_endpoint_types.2159886731 |
| Short name | T3355 |
| Test name | |
| Test status | |
| Simulation time | 269328797 ps |
| CPU time | 1.02 seconds |
| Started | Sep 04 06:08:18 AM UTC 24 |
| Finished | Sep 04 06:08:20 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2159886731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 130.usbdev_endpoint_types.2159886731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/130.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/130.usbdev_tx_rx_disruption.3048351226 |
| Short name | T3360 |
| Test name | |
| Test status | |
| Simulation time | 607557157 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 06:08:18 AM UTC 24 |
| Finished | Sep 04 06:08:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3048351226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 130.usbdev_ tx_rx_disruption.3048351226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/130.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/131.usbdev_endpoint_types.1907836060 |
| Short name | T418 |
| Test name | |
| Test status | |
| Simulation time | 190781422 ps |
| CPU time | 0.9 seconds |
| Started | Sep 04 06:08:18 AM UTC 24 |
| Finished | Sep 04 06:08:20 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1907836060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 131.usbdev_endpoint_types.1907836060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/131.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/131.usbdev_fifo_levels.4097561447 |
| Short name | T3356 |
| Test name | |
| Test status | |
| Simulation time | 172621818 ps |
| CPU time | 1.17 seconds |
| Started | Sep 04 06:08:18 AM UTC 24 |
| Finished | Sep 04 06:08:20 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4097561447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 131.usbdev_fifo_levels.4097561447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/131.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/131.usbdev_tx_rx_disruption.272355706 |
| Short name | T3367 |
| Test name | |
| Test status | |
| Simulation time | 543594199 ps |
| CPU time | 1.9 seconds |
| Started | Sep 04 06:08:20 AM UTC 24 |
| Finished | Sep 04 06:08:23 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=272355706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 131.usbdev_t x_rx_disruption.272355706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/131.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/132.usbdev_endpoint_types.33861497 |
| Short name | T405 |
| Test name | |
| Test status | |
| Simulation time | 489084230 ps |
| CPU time | 1.55 seconds |
| Started | Sep 04 06:08:20 AM UTC 24 |
| Finished | Sep 04 06:08:23 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=33861497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 132.usbdev_endpoint_types.33861497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/132.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/132.usbdev_tx_rx_disruption.3890995993 |
| Short name | T3366 |
| Test name | |
| Test status | |
| Simulation time | 587656707 ps |
| CPU time | 1.7 seconds |
| Started | Sep 04 06:08:20 AM UTC 24 |
| Finished | Sep 04 06:08:23 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3890995993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 132.usbdev_ tx_rx_disruption.3890995993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/132.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/133.usbdev_endpoint_types.11620011 |
| Short name | T375 |
| Test name | |
| Test status | |
| Simulation time | 835732921 ps |
| CPU time | 2.04 seconds |
| Started | Sep 04 06:08:20 AM UTC 24 |
| Finished | Sep 04 06:08:23 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=11620011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 133.usbdev_endpoint_types.11620011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/133.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/133.usbdev_fifo_levels.2234741911 |
| Short name | T3361 |
| Test name | |
| Test status | |
| Simulation time | 282948796 ps |
| CPU time | 1.13 seconds |
| Started | Sep 04 06:08:20 AM UTC 24 |
| Finished | Sep 04 06:08:23 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2234741911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 133.usbdev_fifo_levels.2234741911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/133.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/133.usbdev_tx_rx_disruption.3053172190 |
| Short name | T3364 |
| Test name | |
| Test status | |
| Simulation time | 436498596 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 06:08:20 AM UTC 24 |
| Finished | Sep 04 06:08:23 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3053172190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 133.usbdev_ tx_rx_disruption.3053172190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/133.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/134.usbdev_endpoint_types.904994144 |
| Short name | T417 |
| Test name | |
| Test status | |
| Simulation time | 596126494 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 06:08:20 AM UTC 24 |
| Finished | Sep 04 06:08:23 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=904994144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 134.usbdev_endpoint_types.904994144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/134.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/134.usbdev_fifo_levels.3237315609 |
| Short name | T3362 |
| Test name | |
| Test status | |
| Simulation time | 262014698 ps |
| CPU time | 1.1 seconds |
| Started | Sep 04 06:08:20 AM UTC 24 |
| Finished | Sep 04 06:08:23 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3237315609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 134.usbdev_fifo_levels.3237315609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/134.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/134.usbdev_tx_rx_disruption.2179335144 |
| Short name | T3371 |
| Test name | |
| Test status | |
| Simulation time | 498720564 ps |
| CPU time | 1.93 seconds |
| Started | Sep 04 06:08:21 AM UTC 24 |
| Finished | Sep 04 06:08:24 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2179335144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 134.usbdev_ tx_rx_disruption.2179335144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/134.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/135.usbdev_fifo_levels.2069500234 |
| Short name | T3365 |
| Test name | |
| Test status | |
| Simulation time | 267681588 ps |
| CPU time | 1.29 seconds |
| Started | Sep 04 06:08:21 AM UTC 24 |
| Finished | Sep 04 06:08:23 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2069500234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 135.usbdev_fifo_levels.2069500234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/135.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/135.usbdev_tx_rx_disruption.59966390 |
| Short name | T3369 |
| Test name | |
| Test status | |
| Simulation time | 529437622 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 06:08:21 AM UTC 24 |
| Finished | Sep 04 06:08:23 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=59966390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 135.usbdev_tx _rx_disruption.59966390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/135.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/136.usbdev_endpoint_types.2911764897 |
| Short name | T3368 |
| Test name | |
| Test status | |
| Simulation time | 265681879 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 06:08:21 AM UTC 24 |
| Finished | Sep 04 06:08:23 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2911764897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 136.usbdev_endpoint_types.2911764897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/136.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/136.usbdev_fifo_levels.1021393324 |
| Short name | T506 |
| Test name | |
| Test status | |
| Simulation time | 249058329 ps |
| CPU time | 1.64 seconds |
| Started | Sep 04 06:08:21 AM UTC 24 |
| Finished | Sep 04 06:08:23 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1021393324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 136.usbdev_fifo_levels.1021393324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/136.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/136.usbdev_tx_rx_disruption.3681622456 |
| Short name | T3373 |
| Test name | |
| Test status | |
| Simulation time | 649982760 ps |
| CPU time | 2.18 seconds |
| Started | Sep 04 06:08:21 AM UTC 24 |
| Finished | Sep 04 06:08:24 AM UTC 24 |
| Peak memory | 217140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3681622456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 136.usbdev_ tx_rx_disruption.3681622456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/136.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/137.usbdev_fifo_levels.3803589957 |
| Short name | T3363 |
| Test name | |
| Test status | |
| Simulation time | 202065014 ps |
| CPU time | 0.95 seconds |
| Started | Sep 04 06:08:21 AM UTC 24 |
| Finished | Sep 04 06:08:23 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3803589957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 137.usbdev_fifo_levels.3803589957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/137.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/137.usbdev_tx_rx_disruption.3890468469 |
| Short name | T3370 |
| Test name | |
| Test status | |
| Simulation time | 533182596 ps |
| CPU time | 1.57 seconds |
| Started | Sep 04 06:08:21 AM UTC 24 |
| Finished | Sep 04 06:08:23 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3890468469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 137.usbdev_ tx_rx_disruption.3890468469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/137.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/138.usbdev_tx_rx_disruption.2969747522 |
| Short name | T3381 |
| Test name | |
| Test status | |
| Simulation time | 604164435 ps |
| CPU time | 1.68 seconds |
| Started | Sep 04 06:08:23 AM UTC 24 |
| Finished | Sep 04 06:08:25 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2969747522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 138.usbdev_ tx_rx_disruption.2969747522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/138.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/139.usbdev_endpoint_types.1042523977 |
| Short name | T320 |
| Test name | |
| Test status | |
| Simulation time | 375997100 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 06:08:23 AM UTC 24 |
| Finished | Sep 04 06:08:25 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1042523977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 139.usbdev_endpoint_types.1042523977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/139.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/139.usbdev_fifo_levels.2318499282 |
| Short name | T3375 |
| Test name | |
| Test status | |
| Simulation time | 281260693 ps |
| CPU time | 1.16 seconds |
| Started | Sep 04 06:08:23 AM UTC 24 |
| Finished | Sep 04 06:08:25 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2318499282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 139.usbdev_fifo_levels.2318499282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/139.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/139.usbdev_tx_rx_disruption.2746094874 |
| Short name | T3383 |
| Test name | |
| Test status | |
| Simulation time | 529604958 ps |
| CPU time | 1.71 seconds |
| Started | Sep 04 06:08:23 AM UTC 24 |
| Finished | Sep 04 06:08:25 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2746094874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 139.usbdev_ tx_rx_disruption.2746094874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/139.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_alert_test.2145005428 |
| Short name | T1297 |
| Test name | |
| Test status | |
| Simulation time | 36999675 ps |
| CPU time | 0.99 seconds |
| Started | Sep 04 05:52:34 AM UTC 24 |
| Finished | Sep 04 05:52:36 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2145005428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 14.usbdev_alert_test.2145005428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_disconnect.3046170011 |
| Short name | T1268 |
| Test name | |
| Test status | |
| Simulation time | 5478768070 ps |
| CPU time | 12.34 seconds |
| Started | Sep 04 05:52:07 AM UTC 24 |
| Finished | Sep 04 05:52:21 AM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3046170011 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_disconnect.3046170011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_reset.2278084863 |
| Short name | T1304 |
| Test name | |
| Test status | |
| Simulation time | 15900774018 ps |
| CPU time | 32.12 seconds |
| Started | Sep 04 05:52:07 AM UTC 24 |
| Finished | Sep 04 05:52:41 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2278084863 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_reset.2278084863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_av_buffer.1848633708 |
| Short name | T1247 |
| Test name | |
| Test status | |
| Simulation time | 186210771 ps |
| CPU time | 1.63 seconds |
| Started | Sep 04 05:52:08 AM UTC 24 |
| Finished | Sep 04 05:52:11 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1848633708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_av_buffer.1848633708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_bitstuff_err.2660568306 |
| Short name | T1246 |
| Test name | |
| Test status | |
| Simulation time | 171067879 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 05:52:09 AM UTC 24 |
| Finished | Sep 04 05:52:11 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2660568306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_bitstuff_err.2660568306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_data_toggle_clear.358278525 |
| Short name | T1245 |
| Test name | |
| Test status | |
| Simulation time | 211155026 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 05:52:09 AM UTC 24 |
| Finished | Sep 04 05:52:11 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=358278525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 14.usbdev_data_toggle_clear.358278525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_data_toggle_restore.342558764 |
| Short name | T487 |
| Test name | |
| Test status | |
| Simulation time | 488393173 ps |
| CPU time | 2.69 seconds |
| Started | Sep 04 05:52:11 AM UTC 24 |
| Finished | Sep 04 05:52:15 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=342558764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_data_toggle_restore.342558764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_device_address.3037310936 |
| Short name | T473 |
| Test name | |
| Test status | |
| Simulation time | 14339688106 ps |
| CPU time | 27.11 seconds |
| Started | Sep 04 05:52:11 AM UTC 24 |
| Finished | Sep 04 05:52:39 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3037310936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_device_address.3037310936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_device_timeout.1126018732 |
| Short name | T1249 |
| Test name | |
| Test status | |
| Simulation time | 150667038 ps |
| CPU time | 0.95 seconds |
| Started | Sep 04 05:52:11 AM UTC 24 |
| Finished | Sep 04 05:52:13 AM UTC 24 |
| Peak memory | 214892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1126018732 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_device_timeout.1126018732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_disable_endpoint.2074838946 |
| Short name | T1257 |
| Test name | |
| Test status | |
| Simulation time | 973478765 ps |
| CPU time | 3.38 seconds |
| Started | Sep 04 05:52:12 AM UTC 24 |
| Finished | Sep 04 05:52:17 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2074838946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 14.usbdev_disable_endpoint.2074838946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_disconnected.3502131340 |
| Short name | T1255 |
| Test name | |
| Test status | |
| Simulation time | 151508199 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:52:12 AM UTC 24 |
| Finished | Sep 04 05:52:15 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3502131340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_disconnected.3502131340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_enable.3463347388 |
| Short name | T1254 |
| Test name | |
| Test status | |
| Simulation time | 55832047 ps |
| CPU time | 1.14 seconds |
| Started | Sep 04 05:52:12 AM UTC 24 |
| Finished | Sep 04 05:52:15 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3463347388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 14.usbdev_enable.3463347388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_endpoint_access.3859495243 |
| Short name | T1264 |
| Test name | |
| Test status | |
| Simulation time | 980811349 ps |
| CPU time | 4.69 seconds |
| Started | Sep 04 05:52:14 AM UTC 24 |
| Finished | Sep 04 05:52:19 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3859495243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_endpoint_access.3859495243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_endpoint_types.3752922607 |
| Short name | T366 |
| Test name | |
| Test status | |
| Simulation time | 649601521 ps |
| CPU time | 2.63 seconds |
| Started | Sep 04 05:52:14 AM UTC 24 |
| Finished | Sep 04 05:52:17 AM UTC 24 |
| Peak memory | 217040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3752922607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_endpoint_types.3752922607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_fifo_levels.1505362044 |
| Short name | T1258 |
| Test name | |
| Test status | |
| Simulation time | 191578626 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 05:52:15 AM UTC 24 |
| Finished | Sep 04 05:52:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1505362044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_fifo_levels.1505362044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_fifo_rst.1269588519 |
| Short name | T1261 |
| Test name | |
| Test status | |
| Simulation time | 383024252 ps |
| CPU time | 2.96 seconds |
| Started | Sep 04 05:52:15 AM UTC 24 |
| Finished | Sep 04 05:52:19 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1269588519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_fifo_rst.1269588519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_in_iso.2708020401 |
| Short name | T1263 |
| Test name | |
| Test status | |
| Simulation time | 191242395 ps |
| CPU time | 1.81 seconds |
| Started | Sep 04 05:52:16 AM UTC 24 |
| Finished | Sep 04 05:52:19 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2708020401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 14.usbdev_in_iso.2708020401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_in_stall.183432726 |
| Short name | T1260 |
| Test name | |
| Test status | |
| Simulation time | 147582516 ps |
| CPU time | 1.37 seconds |
| Started | Sep 04 05:52:16 AM UTC 24 |
| Finished | Sep 04 05:52:19 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=183432726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 14.usbdev_in_stall.183432726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_in_trans.42306749 |
| Short name | T1262 |
| Test name | |
| Test status | |
| Simulation time | 191614665 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 05:52:16 AM UTC 24 |
| Finished | Sep 04 05:52:19 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=42306749 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 14.usbdev_in_trans.42306749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_invalid_sync.3087677980 |
| Short name | T1317 |
| Test name | |
| Test status | |
| Simulation time | 3585644656 ps |
| CPU time | 35.33 seconds |
| Started | Sep 04 05:52:15 AM UTC 24 |
| Finished | Sep 04 05:52:52 AM UTC 24 |
| Peak memory | 227556 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3087677980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 14.usbdev_invalid_sync.3087677980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_iso_retraction.64303387 |
| Short name | T1397 |
| Test name | |
| Test status | |
| Simulation time | 11144458908 ps |
| CPU time | 71.72 seconds |
| Started | Sep 04 05:52:17 AM UTC 24 |
| Finished | Sep 04 05:53:30 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=64303387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 14.usbdev_iso_retraction.64303387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_link_in_err.758077605 |
| Short name | T1267 |
| Test name | |
| Test status | |
| Simulation time | 253326102 ps |
| CPU time | 1.8 seconds |
| Started | Sep 04 05:52:18 AM UTC 24 |
| Finished | Sep 04 05:52:20 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=758077605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 14.usbdev_link_in_err.758077605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_link_resume.2691839463 |
| Short name | T1384 |
| Test name | |
| Test status | |
| Simulation time | 23393706286 ps |
| CPU time | 64 seconds |
| Started | Sep 04 05:52:18 AM UTC 24 |
| Finished | Sep 04 05:53:23 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2691839463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_link_resume.2691839463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_link_suspend.4208337914 |
| Short name | T1299 |
| Test name | |
| Test status | |
| Simulation time | 5457562770 ps |
| CPU time | 17.48 seconds |
| Started | Sep 04 05:52:19 AM UTC 24 |
| Finished | Sep 04 05:52:38 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4208337914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_link_suspend.4208337914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_low_speed_traffic.2119680330 |
| Short name | T1336 |
| Test name | |
| Test status | |
| Simulation time | 4241322167 ps |
| CPU time | 41.79 seconds |
| Started | Sep 04 05:52:19 AM UTC 24 |
| Finished | Sep 04 05:53:02 AM UTC 24 |
| Peak memory | 229588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2119680330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_low_speed_traffic.2119680330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_max_inter_pkt_delay.2668141292 |
| Short name | T1316 |
| Test name | |
| Test status | |
| Simulation time | 3678812687 ps |
| CPU time | 29.33 seconds |
| Started | Sep 04 05:52:20 AM UTC 24 |
| Finished | Sep 04 05:52:51 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2668141292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_inter_pkt_delay.2668141292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_max_length_in_transaction.2232955569 |
| Short name | T1270 |
| Test name | |
| Test status | |
| Simulation time | 251961458 ps |
| CPU time | 1.63 seconds |
| Started | Sep 04 05:52:20 AM UTC 24 |
| Finished | Sep 04 05:52:23 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2232955569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 14.usbdev_max_length_in_transaction.2232955569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_max_length_out_transaction.1651923367 |
| Short name | T1269 |
| Test name | |
| Test status | |
| Simulation time | 211670111 ps |
| CPU time | 1.6 seconds |
| Started | Sep 04 05:52:20 AM UTC 24 |
| Finished | Sep 04 05:52:23 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1651923367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 14.usbdev_max_length_out_transaction.1651923367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_max_non_iso_usb_traffic.3262853456 |
| Short name | T1388 |
| Test name | |
| Test status | |
| Simulation time | 2481780190 ps |
| CPU time | 63.56 seconds |
| Started | Sep 04 05:52:20 AM UTC 24 |
| Finished | Sep 04 05:53:26 AM UTC 24 |
| Peak memory | 227628 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3262853456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_non_iso_usb_traffic.3262853456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_max_usb_traffic.193869423 |
| Short name | T1343 |
| Test name | |
| Test status | |
| Simulation time | 2850073845 ps |
| CPU time | 41.9 seconds |
| Started | Sep 04 05:52:20 AM UTC 24 |
| Finished | Sep 04 05:53:04 AM UTC 24 |
| Peak memory | 229588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=193869423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_usb_traffic.193869423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_min_inter_pkt_delay.2548235740 |
| Short name | T1313 |
| Test name | |
| Test status | |
| Simulation time | 2827338514 ps |
| CPU time | 25.07 seconds |
| Started | Sep 04 05:52:22 AM UTC 24 |
| Finished | Sep 04 05:52:48 AM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2548235740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_min_inter_pkt_delay.2548235740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_min_length_in_transaction.2372140347 |
| Short name | T1273 |
| Test name | |
| Test status | |
| Simulation time | 148332165 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 05:52:22 AM UTC 24 |
| Finished | Sep 04 05:52:24 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2372140347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 14.usbdev_min_length_in_transaction.2372140347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_min_length_out_transaction.1297996062 |
| Short name | T1274 |
| Test name | |
| Test status | |
| Simulation time | 149077444 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:52:22 AM UTC 24 |
| Finished | Sep 04 05:52:24 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1297996062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 14.usbdev_min_length_out_transaction.1297996062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_out_iso.2989565828 |
| Short name | T1272 |
| Test name | |
| Test status | |
| Simulation time | 177799742 ps |
| CPU time | 1.25 seconds |
| Started | Sep 04 05:52:22 AM UTC 24 |
| Finished | Sep 04 05:52:24 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2989565828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 14.usbdev_out_iso.2989565828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_out_stall.1168740879 |
| Short name | T1279 |
| Test name | |
| Test status | |
| Simulation time | 149374746 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:52:24 AM UTC 24 |
| Finished | Sep 04 05:52:27 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1168740879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_out_stall.1168740879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_out_trans_nak.2024472500 |
| Short name | T1277 |
| Test name | |
| Test status | |
| Simulation time | 147936806 ps |
| CPU time | 1.19 seconds |
| Started | Sep 04 05:52:24 AM UTC 24 |
| Finished | Sep 04 05:52:27 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2024472500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 14.usbdev_out_trans_nak.2024472500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_pending_in_trans.496290588 |
| Short name | T1282 |
| Test name | |
| Test status | |
| Simulation time | 150189167 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 05:52:26 AM UTC 24 |
| Finished | Sep 04 05:52:28 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=496290588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_pending_in_trans.496290588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_phy_config_pinflip.922152530 |
| Short name | T1284 |
| Test name | |
| Test status | |
| Simulation time | 231142269 ps |
| CPU time | 1.79 seconds |
| Started | Sep 04 05:52:26 AM UTC 24 |
| Finished | Sep 04 05:52:29 AM UTC 24 |
| Peak memory | 214944 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=922152530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 14.usbdev_phy_config_pinflip.922152530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_phy_config_usb_ref_disable.767471053 |
| Short name | T1283 |
| Test name | |
| Test status | |
| Simulation time | 146529723 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 05:52:26 AM UTC 24 |
| Finished | Sep 04 05:52:28 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=767471053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 14.usbdev_phy_config_usb_ref_disable.767471053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_phy_pins_sense.2180272940 |
| Short name | T1281 |
| Test name | |
| Test status | |
| Simulation time | 31474580 ps |
| CPU time | 1.06 seconds |
| Started | Sep 04 05:52:26 AM UTC 24 |
| Finished | Sep 04 05:52:28 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2180272940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_phy_pins_sense.2180272940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_buffer.1843073675 |
| Short name | T1351 |
| Test name | |
| Test status | |
| Simulation time | 11425825080 ps |
| CPU time | 39.72 seconds |
| Started | Sep 04 05:52:26 AM UTC 24 |
| Finished | Sep 04 05:53:07 AM UTC 24 |
| Peak memory | 231564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1843073675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 14.usbdev_pkt_buffer.1843073675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_received.2384458633 |
| Short name | T1285 |
| Test name | |
| Test status | |
| Simulation time | 152578915 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 05:52:27 AM UTC 24 |
| Finished | Sep 04 05:52:30 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2384458633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_pkt_received.2384458633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_sent.841998725 |
| Short name | T1286 |
| Test name | |
| Test status | |
| Simulation time | 182722417 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 05:52:27 AM UTC 24 |
| Finished | Sep 04 05:52:30 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=841998725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 14.usbdev_pkt_sent.841998725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_random_length_in_transaction.2521106511 |
| Short name | T1288 |
| Test name | |
| Test status | |
| Simulation time | 250060032 ps |
| CPU time | 1.72 seconds |
| Started | Sep 04 05:52:27 AM UTC 24 |
| Finished | Sep 04 05:52:30 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2521106511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 14.usbdev_random_length_in_transaction.2521106511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_random_length_out_transaction.1523758369 |
| Short name | T1287 |
| Test name | |
| Test status | |
| Simulation time | 187651367 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 05:52:28 AM UTC 24 |
| Finished | Sep 04 05:52:30 AM UTC 24 |
| Peak memory | 214928 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1523758369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 14.usbdev_random_length_out_transaction.1523758369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_resume_link_active.378950034 |
| Short name | T1372 |
| Test name | |
| Test status | |
| Simulation time | 20172113123 ps |
| CPU time | 46.55 seconds |
| Started | Sep 04 05:52:28 AM UTC 24 |
| Finished | Sep 04 05:53:16 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=378950034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 14.usbdev_resume_link_active.378950034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_rx_crc_err.1944208334 |
| Short name | T1289 |
| Test name | |
| Test status | |
| Simulation time | 143635284 ps |
| CPU time | 1.3 seconds |
| Started | Sep 04 05:52:29 AM UTC 24 |
| Finished | Sep 04 05:52:31 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1944208334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 14.usbdev_rx_crc_err.1944208334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_setup_stage.3952923929 |
| Short name | T1291 |
| Test name | |
| Test status | |
| Simulation time | 148817044 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:52:29 AM UTC 24 |
| Finished | Sep 04 05:52:31 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3952923929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_setup_stage.3952923929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_setup_trans_ignored.2274334076 |
| Short name | T1290 |
| Test name | |
| Test status | |
| Simulation time | 149434936 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 05:52:29 AM UTC 24 |
| Finished | Sep 04 05:52:31 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2274334076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 14.usbdev_setup_trans_ignored.2274334076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_smoke.4174501863 |
| Short name | T1292 |
| Test name | |
| Test status | |
| Simulation time | 234784584 ps |
| CPU time | 1.75 seconds |
| Started | Sep 04 05:52:30 AM UTC 24 |
| Finished | Sep 04 05:52:33 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4174501863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_smoke.4174501863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_spurious_pids_ignored.925732475 |
| Short name | T1330 |
| Test name | |
| Test status | |
| Simulation time | 2660447995 ps |
| CPU time | 26.48 seconds |
| Started | Sep 04 05:52:31 AM UTC 24 |
| Finished | Sep 04 05:52:59 AM UTC 24 |
| Peak memory | 229680 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=925732475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 14.usbdev_spurious_pids_ignored.925732475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_stall_priority_over_nak.1728229611 |
| Short name | T1293 |
| Test name | |
| Test status | |
| Simulation time | 217583442 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 05:52:31 AM UTC 24 |
| Finished | Sep 04 05:52:34 AM UTC 24 |
| Peak memory | 217056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1728229611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_stall_priority_over_nak.1728229611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_stall_trans.2330580593 |
| Short name | T1294 |
| Test name | |
| Test status | |
| Simulation time | 170600775 ps |
| CPU time | 1.55 seconds |
| Started | Sep 04 05:52:32 AM UTC 24 |
| Finished | Sep 04 05:52:34 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2330580593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_stall_trans.2330580593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_stream_len_max.807519441 |
| Short name | T1296 |
| Test name | |
| Test status | |
| Simulation time | 260146893 ps |
| CPU time | 1.64 seconds |
| Started | Sep 04 05:52:33 AM UTC 24 |
| Finished | Sep 04 05:52:36 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=807519441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 14.usbdev_stream_len_max.807519441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_streaming_out.822876944 |
| Short name | T1320 |
| Test name | |
| Test status | |
| Simulation time | 2108896635 ps |
| CPU time | 21.07 seconds |
| Started | Sep 04 05:52:32 AM UTC 24 |
| Finished | Sep 04 05:52:54 AM UTC 24 |
| Peak memory | 234032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=822876944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_streaming_out.822876944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_timeout_missing_host_handshake.2419039099 |
| Short name | T1278 |
| Test name | |
| Test status | |
| Simulation time | 1157419135 ps |
| CPU time | 13.28 seconds |
| Started | Sep 04 05:52:12 AM UTC 24 |
| Finished | Sep 04 05:52:27 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2419039099 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_timeout_missing_host_handshake.2419039099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/14.usbdev_tx_rx_disruption.4098848470 |
| Short name | T1298 |
| Test name | |
| Test status | |
| Simulation time | 581355118 ps |
| CPU time | 3.07 seconds |
| Started | Sep 04 05:52:33 AM UTC 24 |
| Finished | Sep 04 05:52:37 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4098848470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_t x_rx_disruption.4098848470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/14.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/140.usbdev_endpoint_types.3344849782 |
| Short name | T3378 |
| Test name | |
| Test status | |
| Simulation time | 334815519 ps |
| CPU time | 1.25 seconds |
| Started | Sep 04 06:08:23 AM UTC 24 |
| Finished | Sep 04 06:08:25 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3344849782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 140.usbdev_endpoint_types.3344849782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/140.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/140.usbdev_fifo_levels.1837440756 |
| Short name | T3380 |
| Test name | |
| Test status | |
| Simulation time | 165433006 ps |
| CPU time | 1.27 seconds |
| Started | Sep 04 06:08:23 AM UTC 24 |
| Finished | Sep 04 06:08:25 AM UTC 24 |
| Peak memory | 216884 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1837440756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 140.usbdev_fifo_levels.1837440756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/140.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/140.usbdev_tx_rx_disruption.3346461974 |
| Short name | T3384 |
| Test name | |
| Test status | |
| Simulation time | 520553711 ps |
| CPU time | 1.67 seconds |
| Started | Sep 04 06:08:23 AM UTC 24 |
| Finished | Sep 04 06:08:25 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3346461974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 140.usbdev_ tx_rx_disruption.3346461974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/140.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/141.usbdev_fifo_levels.1930671400 |
| Short name | T3376 |
| Test name | |
| Test status | |
| Simulation time | 175136223 ps |
| CPU time | 0.93 seconds |
| Started | Sep 04 06:08:23 AM UTC 24 |
| Finished | Sep 04 06:08:25 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1930671400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 141.usbdev_fifo_levels.1930671400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/141.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/141.usbdev_tx_rx_disruption.779027627 |
| Short name | T3382 |
| Test name | |
| Test status | |
| Simulation time | 562066859 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 06:08:23 AM UTC 24 |
| Finished | Sep 04 06:08:25 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=779027627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 141.usbdev_t x_rx_disruption.779027627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/141.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/142.usbdev_endpoint_types.3851483116 |
| Short name | T3377 |
| Test name | |
| Test status | |
| Simulation time | 210729709 ps |
| CPU time | 0.98 seconds |
| Started | Sep 04 06:08:23 AM UTC 24 |
| Finished | Sep 04 06:08:25 AM UTC 24 |
| Peak memory | 216968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3851483116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 142.usbdev_endpoint_types.3851483116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/142.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/142.usbdev_fifo_levels.1905266180 |
| Short name | T3379 |
| Test name | |
| Test status | |
| Simulation time | 177163942 ps |
| CPU time | 1.07 seconds |
| Started | Sep 04 06:08:23 AM UTC 24 |
| Finished | Sep 04 06:08:25 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1905266180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 142.usbdev_fifo_levels.1905266180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/142.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/142.usbdev_tx_rx_disruption.575171828 |
| Short name | T3395 |
| Test name | |
| Test status | |
| Simulation time | 484658108 ps |
| CPU time | 1.92 seconds |
| Started | Sep 04 06:08:25 AM UTC 24 |
| Finished | Sep 04 06:08:28 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=575171828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 142.usbdev_t x_rx_disruption.575171828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/142.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/143.usbdev_endpoint_types.2889898830 |
| Short name | T402 |
| Test name | |
| Test status | |
| Simulation time | 299349399 ps |
| CPU time | 1.15 seconds |
| Started | Sep 04 06:08:25 AM UTC 24 |
| Finished | Sep 04 06:08:27 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2889898830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 143.usbdev_endpoint_types.2889898830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/143.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/143.usbdev_fifo_levels.699824420 |
| Short name | T503 |
| Test name | |
| Test status | |
| Simulation time | 258949032 ps |
| CPU time | 1.23 seconds |
| Started | Sep 04 06:08:25 AM UTC 24 |
| Finished | Sep 04 06:08:27 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=699824420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 143.usbdev_fifo_levels.699824420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/143.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/143.usbdev_tx_rx_disruption.2169606876 |
| Short name | T3396 |
| Test name | |
| Test status | |
| Simulation time | 508041507 ps |
| CPU time | 1.89 seconds |
| Started | Sep 04 06:08:25 AM UTC 24 |
| Finished | Sep 04 06:08:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2169606876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 143.usbdev_ tx_rx_disruption.2169606876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/143.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/144.usbdev_endpoint_types.3851979876 |
| Short name | T397 |
| Test name | |
| Test status | |
| Simulation time | 302310991 ps |
| CPU time | 1.09 seconds |
| Started | Sep 04 06:08:25 AM UTC 24 |
| Finished | Sep 04 06:08:27 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3851979876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 144.usbdev_endpoint_types.3851979876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/144.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/144.usbdev_fifo_levels.2400586547 |
| Short name | T3388 |
| Test name | |
| Test status | |
| Simulation time | 248757524 ps |
| CPU time | 1.19 seconds |
| Started | Sep 04 06:08:25 AM UTC 24 |
| Finished | Sep 04 06:08:27 AM UTC 24 |
| Peak memory | 214528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2400586547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 144.usbdev_fifo_levels.2400586547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/144.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/144.usbdev_tx_rx_disruption.966104107 |
| Short name | T3394 |
| Test name | |
| Test status | |
| Simulation time | 503647681 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 06:08:25 AM UTC 24 |
| Finished | Sep 04 06:08:27 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=966104107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 144.usbdev_t x_rx_disruption.966104107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/144.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/145.usbdev_endpoint_types.3157822482 |
| Short name | T3387 |
| Test name | |
| Test status | |
| Simulation time | 271591021 ps |
| CPU time | 1.03 seconds |
| Started | Sep 04 06:08:25 AM UTC 24 |
| Finished | Sep 04 06:08:27 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3157822482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 145.usbdev_endpoint_types.3157822482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/145.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/145.usbdev_fifo_levels.1660120332 |
| Short name | T3385 |
| Test name | |
| Test status | |
| Simulation time | 168429494 ps |
| CPU time | 0.87 seconds |
| Started | Sep 04 06:08:25 AM UTC 24 |
| Finished | Sep 04 06:08:27 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1660120332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 145.usbdev_fifo_levels.1660120332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/145.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/145.usbdev_tx_rx_disruption.3968117070 |
| Short name | T3398 |
| Test name | |
| Test status | |
| Simulation time | 542185049 ps |
| CPU time | 1.82 seconds |
| Started | Sep 04 06:08:25 AM UTC 24 |
| Finished | Sep 04 06:08:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3968117070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 145.usbdev_ tx_rx_disruption.3968117070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/145.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/146.usbdev_endpoint_types.4054824686 |
| Short name | T3390 |
| Test name | |
| Test status | |
| Simulation time | 171414536 ps |
| CPU time | 1.3 seconds |
| Started | Sep 04 06:08:25 AM UTC 24 |
| Finished | Sep 04 06:08:27 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4054824686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 146.usbdev_endpoint_types.4054824686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/146.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/146.usbdev_fifo_levels.3100920211 |
| Short name | T3386 |
| Test name | |
| Test status | |
| Simulation time | 154562855 ps |
| CPU time | 0.82 seconds |
| Started | Sep 04 06:08:25 AM UTC 24 |
| Finished | Sep 04 06:08:27 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3100920211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 146.usbdev_fifo_levels.3100920211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/146.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/146.usbdev_tx_rx_disruption.2888778154 |
| Short name | T3397 |
| Test name | |
| Test status | |
| Simulation time | 569552525 ps |
| CPU time | 1.57 seconds |
| Started | Sep 04 06:08:25 AM UTC 24 |
| Finished | Sep 04 06:08:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2888778154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 146.usbdev_ tx_rx_disruption.2888778154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/146.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/147.usbdev_endpoint_types.613360900 |
| Short name | T3391 |
| Test name | |
| Test status | |
| Simulation time | 343891758 ps |
| CPU time | 1.14 seconds |
| Started | Sep 04 06:08:25 AM UTC 24 |
| Finished | Sep 04 06:08:27 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=613360900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 147.usbdev_endpoint_types.613360900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/147.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/147.usbdev_fifo_levels.1974299940 |
| Short name | T3389 |
| Test name | |
| Test status | |
| Simulation time | 249334238 ps |
| CPU time | 1.05 seconds |
| Started | Sep 04 06:08:25 AM UTC 24 |
| Finished | Sep 04 06:08:27 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1974299940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 147.usbdev_fifo_levels.1974299940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/147.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/147.usbdev_tx_rx_disruption.3125916245 |
| Short name | T3400 |
| Test name | |
| Test status | |
| Simulation time | 614940251 ps |
| CPU time | 1.94 seconds |
| Started | Sep 04 06:08:25 AM UTC 24 |
| Finished | Sep 04 06:08:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3125916245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 147.usbdev_ tx_rx_disruption.3125916245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/147.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/148.usbdev_endpoint_types.686885595 |
| Short name | T3392 |
| Test name | |
| Test status | |
| Simulation time | 290531715 ps |
| CPU time | 1.08 seconds |
| Started | Sep 04 06:08:25 AM UTC 24 |
| Finished | Sep 04 06:08:27 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=686885595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 148.usbdev_endpoint_types.686885595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/148.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/148.usbdev_fifo_levels.3681540930 |
| Short name | T3316 |
| Test name | |
| Test status | |
| Simulation time | 257407592 ps |
| CPU time | 1.26 seconds |
| Started | Sep 04 06:08:25 AM UTC 24 |
| Finished | Sep 04 06:08:28 AM UTC 24 |
| Peak memory | 215008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3681540930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 148.usbdev_fifo_levels.3681540930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/148.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/148.usbdev_tx_rx_disruption.1482879892 |
| Short name | T3399 |
| Test name | |
| Test status | |
| Simulation time | 582549731 ps |
| CPU time | 1.61 seconds |
| Started | Sep 04 06:08:25 AM UTC 24 |
| Finished | Sep 04 06:08:28 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1482879892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 148.usbdev_ tx_rx_disruption.1482879892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/148.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/149.usbdev_endpoint_types.3348723798 |
| Short name | T3393 |
| Test name | |
| Test status | |
| Simulation time | 152416215 ps |
| CPU time | 0.95 seconds |
| Started | Sep 04 06:08:25 AM UTC 24 |
| Finished | Sep 04 06:08:27 AM UTC 24 |
| Peak memory | 215020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3348723798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 149.usbdev_endpoint_types.3348723798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/149.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/149.usbdev_fifo_levels.1601027438 |
| Short name | T3401 |
| Test name | |
| Test status | |
| Simulation time | 143162269 ps |
| CPU time | 0.95 seconds |
| Started | Sep 04 06:08:27 AM UTC 24 |
| Finished | Sep 04 06:08:29 AM UTC 24 |
| Peak memory | 214336 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1601027438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 149.usbdev_fifo_levels.1601027438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/149.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/149.usbdev_tx_rx_disruption.847464923 |
| Short name | T3404 |
| Test name | |
| Test status | |
| Simulation time | 462867761 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 06:08:27 AM UTC 24 |
| Finished | Sep 04 06:08:30 AM UTC 24 |
| Peak memory | 214240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=847464923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 149.usbdev_t x_rx_disruption.847464923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/149.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_alert_test.1829058586 |
| Short name | T1350 |
| Test name | |
| Test status | |
| Simulation time | 33961190 ps |
| CPU time | 1.04 seconds |
| Started | Sep 04 05:53:05 AM UTC 24 |
| Finished | Sep 04 05:53:07 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1829058586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 15.usbdev_alert_test.1829058586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_disconnect.3865997996 |
| Short name | T1334 |
| Test name | |
| Test status | |
| Simulation time | 9767776428 ps |
| CPU time | 24.49 seconds |
| Started | Sep 04 05:52:34 AM UTC 24 |
| Finished | Sep 04 05:53:00 AM UTC 24 |
| Peak memory | 217376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3865997996 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_disconnect.3865997996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_reset.658129114 |
| Short name | T1358 |
| Test name | |
| Test status | |
| Simulation time | 19080849099 ps |
| CPU time | 32.94 seconds |
| Started | Sep 04 05:52:35 AM UTC 24 |
| Finished | Sep 04 05:53:10 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=658129114 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_reset.658129114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_resume.2774882480 |
| Short name | T233 |
| Test name | |
| Test status | |
| Simulation time | 30386577580 ps |
| CPU time | 60.81 seconds |
| Started | Sep 04 05:52:35 AM UTC 24 |
| Finished | Sep 04 05:53:38 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2774882480 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_resume.2774882480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_av_buffer.2511900263 |
| Short name | T1300 |
| Test name | |
| Test status | |
| Simulation time | 146154552 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 05:52:36 AM UTC 24 |
| Finished | Sep 04 05:52:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2511900263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_av_buffer.2511900263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_bitstuff_err.1306619051 |
| Short name | T1301 |
| Test name | |
| Test status | |
| Simulation time | 176517603 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 05:52:36 AM UTC 24 |
| Finished | Sep 04 05:52:38 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1306619051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_bitstuff_err.1306619051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_data_toggle_clear.1046921428 |
| Short name | T1302 |
| Test name | |
| Test status | |
| Simulation time | 311303388 ps |
| CPU time | 2.11 seconds |
| Started | Sep 04 05:52:37 AM UTC 24 |
| Finished | Sep 04 05:52:40 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1046921428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 15.usbdev_data_toggle_clear.1046921428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_data_toggle_restore.1411898643 |
| Short name | T491 |
| Test name | |
| Test status | |
| Simulation time | 727362991 ps |
| CPU time | 3.21 seconds |
| Started | Sep 04 05:52:37 AM UTC 24 |
| Finished | Sep 04 05:52:41 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1411898643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_data_toggle_restore.1411898643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_device_address.3651136038 |
| Short name | T1407 |
| Test name | |
| Test status | |
| Simulation time | 26500417231 ps |
| CPU time | 55.26 seconds |
| Started | Sep 04 05:52:38 AM UTC 24 |
| Finished | Sep 04 05:53:35 AM UTC 24 |
| Peak memory | 217448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3651136038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_device_address.3651136038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_device_timeout.1416957650 |
| Short name | T1303 |
| Test name | |
| Test status | |
| Simulation time | 188851778 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 05:52:38 AM UTC 24 |
| Finished | Sep 04 05:52:41 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1416957650 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_device_timeout.1416957650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_disable_endpoint.2085275002 |
| Short name | T1307 |
| Test name | |
| Test status | |
| Simulation time | 597447643 ps |
| CPU time | 2.94 seconds |
| Started | Sep 04 05:52:39 AM UTC 24 |
| Finished | Sep 04 05:52:43 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2085275002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 15.usbdev_disable_endpoint.2085275002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_disconnected.1498302009 |
| Short name | T1306 |
| Test name | |
| Test status | |
| Simulation time | 139410795 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 05:52:41 AM UTC 24 |
| Finished | Sep 04 05:52:43 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1498302009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_disconnected.1498302009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_enable.647518565 |
| Short name | T1305 |
| Test name | |
| Test status | |
| Simulation time | 37545302 ps |
| CPU time | 1.09 seconds |
| Started | Sep 04 05:52:41 AM UTC 24 |
| Finished | Sep 04 05:52:43 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=647518565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_enable.647518565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_endpoint_access.3284755077 |
| Short name | T1309 |
| Test name | |
| Test status | |
| Simulation time | 859668298 ps |
| CPU time | 3.22 seconds |
| Started | Sep 04 05:52:41 AM UTC 24 |
| Finished | Sep 04 05:52:45 AM UTC 24 |
| Peak memory | 217200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3284755077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_endpoint_access.3284755077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_endpoint_types.2134558134 |
| Short name | T342 |
| Test name | |
| Test status | |
| Simulation time | 510202279 ps |
| CPU time | 2.85 seconds |
| Started | Sep 04 05:52:42 AM UTC 24 |
| Finished | Sep 04 05:52:46 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2134558134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_endpoint_types.2134558134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_fifo_levels.3217877996 |
| Short name | T184 |
| Test name | |
| Test status | |
| Simulation time | 284044780 ps |
| CPU time | 1.98 seconds |
| Started | Sep 04 05:52:42 AM UTC 24 |
| Finished | Sep 04 05:52:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3217877996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_fifo_levels.3217877996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_fifo_rst.1050263513 |
| Short name | T1310 |
| Test name | |
| Test status | |
| Simulation time | 313937100 ps |
| CPU time | 2.57 seconds |
| Started | Sep 04 05:52:42 AM UTC 24 |
| Finished | Sep 04 05:52:46 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1050263513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_fifo_rst.1050263513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_in_iso.830691003 |
| Short name | T1312 |
| Test name | |
| Test status | |
| Simulation time | 235249331 ps |
| CPU time | 1.86 seconds |
| Started | Sep 04 05:52:44 AM UTC 24 |
| Finished | Sep 04 05:52:47 AM UTC 24 |
| Peak memory | 227412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=830691003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 15.usbdev_in_iso.830691003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_in_stall.3690483780 |
| Short name | T1311 |
| Test name | |
| Test status | |
| Simulation time | 138339679 ps |
| CPU time | 1.37 seconds |
| Started | Sep 04 05:52:45 AM UTC 24 |
| Finished | Sep 04 05:52:47 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3690483780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_in_stall.3690483780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_in_trans.299518779 |
| Short name | T1315 |
| Test name | |
| Test status | |
| Simulation time | 223948892 ps |
| CPU time | 1.72 seconds |
| Started | Sep 04 05:52:46 AM UTC 24 |
| Finished | Sep 04 05:52:49 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=299518779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_in_trans.299518779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_invalid_sync.2059148555 |
| Short name | T1574 |
| Test name | |
| Test status | |
| Simulation time | 4535100883 ps |
| CPU time | 144.46 seconds |
| Started | Sep 04 05:52:43 AM UTC 24 |
| Finished | Sep 04 05:55:10 AM UTC 24 |
| Peak memory | 230388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2059148555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 15.usbdev_invalid_sync.2059148555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_iso_retraction.1160928990 |
| Short name | T1497 |
| Test name | |
| Test status | |
| Simulation time | 15321277765 ps |
| CPU time | 100.07 seconds |
| Started | Sep 04 05:52:46 AM UTC 24 |
| Finished | Sep 04 05:54:28 AM UTC 24 |
| Peak memory | 217448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1160928990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_iso_retraction.1160928990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_link_in_err.3653532671 |
| Short name | T1314 |
| Test name | |
| Test status | |
| Simulation time | 153185519 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 05:52:46 AM UTC 24 |
| Finished | Sep 04 05:52:49 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3653532671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_link_in_err.3653532671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_link_resume.282928172 |
| Short name | T1361 |
| Test name | |
| Test status | |
| Simulation time | 12537659842 ps |
| CPU time | 22.84 seconds |
| Started | Sep 04 05:52:46 AM UTC 24 |
| Finished | Sep 04 05:53:11 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=282928172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_link_resume.282928172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_link_suspend.3237209590 |
| Short name | T1353 |
| Test name | |
| Test status | |
| Simulation time | 10610432349 ps |
| CPU time | 19.25 seconds |
| Started | Sep 04 05:52:48 AM UTC 24 |
| Finished | Sep 04 05:53:08 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3237209590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_link_suspend.3237209590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_low_speed_traffic.2716955355 |
| Short name | T1487 |
| Test name | |
| Test status | |
| Simulation time | 3507311271 ps |
| CPU time | 94.09 seconds |
| Started | Sep 04 05:52:48 AM UTC 24 |
| Finished | Sep 04 05:54:24 AM UTC 24 |
| Peak memory | 229592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2716955355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_low_speed_traffic.2716955355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_max_inter_pkt_delay.1688172873 |
| Short name | T1359 |
| Test name | |
| Test status | |
| Simulation time | 2026014284 ps |
| CPU time | 19.19 seconds |
| Started | Sep 04 05:52:50 AM UTC 24 |
| Finished | Sep 04 05:53:10 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1688172873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_inter_pkt_delay.1688172873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_max_length_in_transaction.3533044317 |
| Short name | T1319 |
| Test name | |
| Test status | |
| Simulation time | 236559434 ps |
| CPU time | 1.81 seconds |
| Started | Sep 04 05:52:50 AM UTC 24 |
| Finished | Sep 04 05:52:52 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3533044317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 15.usbdev_max_length_in_transaction.3533044317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_max_length_out_transaction.1182172108 |
| Short name | T1318 |
| Test name | |
| Test status | |
| Simulation time | 224535729 ps |
| CPU time | 1.69 seconds |
| Started | Sep 04 05:52:50 AM UTC 24 |
| Finished | Sep 04 05:52:52 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1182172108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 15.usbdev_max_length_out_transaction.1182172108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_max_non_iso_usb_traffic.3564783443 |
| Short name | T1485 |
| Test name | |
| Test status | |
| Simulation time | 3230894350 ps |
| CPU time | 90.31 seconds |
| Started | Sep 04 05:52:50 AM UTC 24 |
| Finished | Sep 04 05:54:22 AM UTC 24 |
| Peak memory | 234300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3564783443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_non_iso_usb_traffic.3564783443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_min_inter_pkt_delay.2508529112 |
| Short name | T1428 |
| Test name | |
| Test status | |
| Simulation time | 2176273357 ps |
| CPU time | 62.65 seconds |
| Started | Sep 04 05:52:50 AM UTC 24 |
| Finished | Sep 04 05:53:54 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2508529112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_min_inter_pkt_delay.2508529112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_min_length_in_transaction.42625370 |
| Short name | T1322 |
| Test name | |
| Test status | |
| Simulation time | 200907621 ps |
| CPU time | 1.64 seconds |
| Started | Sep 04 05:52:52 AM UTC 24 |
| Finished | Sep 04 05:52:55 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=42625370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_ trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 15.usbdev_min_length_in_transaction.42625370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_min_length_out_transaction.1629988360 |
| Short name | T1321 |
| Test name | |
| Test status | |
| Simulation time | 194960042 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 05:52:52 AM UTC 24 |
| Finished | Sep 04 05:52:54 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1629988360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 15.usbdev_min_length_out_transaction.1629988360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_out_iso.1870234625 |
| Short name | T1324 |
| Test name | |
| Test status | |
| Simulation time | 177852806 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 05:52:53 AM UTC 24 |
| Finished | Sep 04 05:52:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1870234625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_out_iso.1870234625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_out_stall.3754731685 |
| Short name | T1323 |
| Test name | |
| Test status | |
| Simulation time | 153242065 ps |
| CPU time | 1.3 seconds |
| Started | Sep 04 05:52:53 AM UTC 24 |
| Finished | Sep 04 05:52:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3754731685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_out_stall.3754731685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_out_trans_nak.3871024071 |
| Short name | T1326 |
| Test name | |
| Test status | |
| Simulation time | 151067126 ps |
| CPU time | 0.98 seconds |
| Started | Sep 04 05:52:55 AM UTC 24 |
| Finished | Sep 04 05:52:57 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3871024071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 15.usbdev_out_trans_nak.3871024071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_pending_in_trans.2122113630 |
| Short name | T1327 |
| Test name | |
| Test status | |
| Simulation time | 169883910 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 05:52:56 AM UTC 24 |
| Finished | Sep 04 05:52:58 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2122113630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 15.usbdev_pending_in_trans.2122113630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_phy_config_pinflip.3795953571 |
| Short name | T1329 |
| Test name | |
| Test status | |
| Simulation time | 213014122 ps |
| CPU time | 1.83 seconds |
| Started | Sep 04 05:52:56 AM UTC 24 |
| Finished | Sep 04 05:52:59 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3795953571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 15.usbdev_phy_config_pinflip.3795953571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_phy_config_usb_ref_disable.3788777101 |
| Short name | T1332 |
| Test name | |
| Test status | |
| Simulation time | 143568657 ps |
| CPU time | 1.37 seconds |
| Started | Sep 04 05:52:57 AM UTC 24 |
| Finished | Sep 04 05:53:00 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3788777101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 15.usbdev_phy_config_usb_ref_disable.3788777101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_phy_pins_sense.4149664991 |
| Short name | T1331 |
| Test name | |
| Test status | |
| Simulation time | 71654228 ps |
| CPU time | 1.17 seconds |
| Started | Sep 04 05:52:57 AM UTC 24 |
| Finished | Sep 04 05:52:59 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4149664991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_phy_pins_sense.4149664991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_buffer.3752286470 |
| Short name | T1463 |
| Test name | |
| Test status | |
| Simulation time | 18509369652 ps |
| CPU time | 71.62 seconds |
| Started | Sep 04 05:52:57 AM UTC 24 |
| Finished | Sep 04 05:54:11 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3752286470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_pkt_buffer.3752286470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_received.1545723947 |
| Short name | T1335 |
| Test name | |
| Test status | |
| Simulation time | 195047665 ps |
| CPU time | 1.66 seconds |
| Started | Sep 04 05:52:57 AM UTC 24 |
| Finished | Sep 04 05:53:00 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1545723947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_pkt_received.1545723947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_sent.3257606452 |
| Short name | T1333 |
| Test name | |
| Test status | |
| Simulation time | 180335168 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 05:52:57 AM UTC 24 |
| Finished | Sep 04 05:53:00 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3257606452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_pkt_sent.3257606452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_random_length_in_transaction.3978589112 |
| Short name | T1337 |
| Test name | |
| Test status | |
| Simulation time | 154076192 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 05:53:00 AM UTC 24 |
| Finished | Sep 04 05:53:02 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3978589112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 15.usbdev_random_length_in_transaction.3978589112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_random_length_out_transaction.2199422354 |
| Short name | T1339 |
| Test name | |
| Test status | |
| Simulation time | 170638962 ps |
| CPU time | 1.57 seconds |
| Started | Sep 04 05:53:00 AM UTC 24 |
| Finished | Sep 04 05:53:02 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2199422354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 15.usbdev_random_length_out_transaction.2199422354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_resume_link_active.1076155908 |
| Short name | T1422 |
| Test name | |
| Test status | |
| Simulation time | 20172355142 ps |
| CPU time | 46.1 seconds |
| Started | Sep 04 05:53:00 AM UTC 24 |
| Finished | Sep 04 05:53:48 AM UTC 24 |
| Peak memory | 217148 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1076155908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 15.usbdev_resume_link_active.1076155908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_rx_crc_err.1074315726 |
| Short name | T1338 |
| Test name | |
| Test status | |
| Simulation time | 141255628 ps |
| CPU time | 1.3 seconds |
| Started | Sep 04 05:53:00 AM UTC 24 |
| Finished | Sep 04 05:53:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1074315726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_rx_crc_err.1074315726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_rx_full.399912690 |
| Short name | T1342 |
| Test name | |
| Test status | |
| Simulation time | 385300216 ps |
| CPU time | 2.59 seconds |
| Started | Sep 04 05:53:00 AM UTC 24 |
| Finished | Sep 04 05:53:04 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=399912690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 15.usbdev_rx_full.399912690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_setup_stage.201637351 |
| Short name | T1344 |
| Test name | |
| Test status | |
| Simulation time | 163162487 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 05:53:01 AM UTC 24 |
| Finished | Sep 04 05:53:04 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=201637351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_setup_stage.201637351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_setup_trans_ignored.1883314028 |
| Short name | T1341 |
| Test name | |
| Test status | |
| Simulation time | 165242714 ps |
| CPU time | 1.26 seconds |
| Started | Sep 04 05:53:01 AM UTC 24 |
| Finished | Sep 04 05:53:04 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1883314028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 15.usbdev_setup_trans_ignored.1883314028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_smoke.3994723454 |
| Short name | T1345 |
| Test name | |
| Test status | |
| Simulation time | 282043935 ps |
| CPU time | 1.64 seconds |
| Started | Sep 04 05:53:02 AM UTC 24 |
| Finished | Sep 04 05:53:04 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3994723454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_smoke.3994723454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_spurious_pids_ignored.1871584083 |
| Short name | T1453 |
| Test name | |
| Test status | |
| Simulation time | 2085697581 ps |
| CPU time | 62.88 seconds |
| Started | Sep 04 05:53:02 AM UTC 24 |
| Finished | Sep 04 05:54:06 AM UTC 24 |
| Peak memory | 234140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1871584083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 15.usbdev_spurious_pids_ignored.1871584083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_stall_priority_over_nak.1471480176 |
| Short name | T1347 |
| Test name | |
| Test status | |
| Simulation time | 197507265 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 05:53:03 AM UTC 24 |
| Finished | Sep 04 05:53:05 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1471480176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_stall_priority_over_nak.1471480176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_stall_trans.640537840 |
| Short name | T1346 |
| Test name | |
| Test status | |
| Simulation time | 164452993 ps |
| CPU time | 1.24 seconds |
| Started | Sep 04 05:53:03 AM UTC 24 |
| Finished | Sep 04 05:53:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=640537840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_stall_trans.640537840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_stream_len_max.1218483926 |
| Short name | T1348 |
| Test name | |
| Test status | |
| Simulation time | 677404113 ps |
| CPU time | 2.16 seconds |
| Started | Sep 04 05:53:03 AM UTC 24 |
| Finished | Sep 04 05:53:06 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1218483926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_stream_len_max.1218483926 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_streaming_out.52983851 |
| Short name | T1435 |
| Test name | |
| Test status | |
| Simulation time | 1860911795 ps |
| CPU time | 54.15 seconds |
| Started | Sep 04 05:53:03 AM UTC 24 |
| Finished | Sep 04 05:53:59 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=52983851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_streaming_out.52983851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_timeout_missing_host_handshake.2652344465 |
| Short name | T1357 |
| Test name | |
| Test status | |
| Simulation time | 2467541160 ps |
| CPU time | 28.05 seconds |
| Started | Sep 04 05:52:39 AM UTC 24 |
| Finished | Sep 04 05:53:09 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2652344465 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_timeout_missing_host_handshake.2652344465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/15.usbdev_tx_rx_disruption.1475636878 |
| Short name | T1352 |
| Test name | |
| Test status | |
| Simulation time | 590260228 ps |
| CPU time | 2.28 seconds |
| Started | Sep 04 05:53:05 AM UTC 24 |
| Finished | Sep 04 05:53:08 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1475636878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_t x_rx_disruption.1475636878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/15.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/150.usbdev_endpoint_types.3555674144 |
| Short name | T415 |
| Test name | |
| Test status | |
| Simulation time | 286597214 ps |
| CPU time | 1.05 seconds |
| Started | Sep 04 06:08:27 AM UTC 24 |
| Finished | Sep 04 06:08:29 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3555674144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 150.usbdev_endpoint_types.3555674144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/150.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/150.usbdev_tx_rx_disruption.1099770701 |
| Short name | T3405 |
| Test name | |
| Test status | |
| Simulation time | 649627065 ps |
| CPU time | 1.71 seconds |
| Started | Sep 04 06:08:27 AM UTC 24 |
| Finished | Sep 04 06:08:30 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1099770701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 150.usbdev_ tx_rx_disruption.1099770701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/150.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/151.usbdev_fifo_levels.2807498436 |
| Short name | T3402 |
| Test name | |
| Test status | |
| Simulation time | 275040981 ps |
| CPU time | 1.14 seconds |
| Started | Sep 04 06:08:27 AM UTC 24 |
| Finished | Sep 04 06:08:29 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2807498436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 151.usbdev_fifo_levels.2807498436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/151.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/151.usbdev_tx_rx_disruption.2903933698 |
| Short name | T3406 |
| Test name | |
| Test status | |
| Simulation time | 645666917 ps |
| CPU time | 1.85 seconds |
| Started | Sep 04 06:08:27 AM UTC 24 |
| Finished | Sep 04 06:08:30 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2903933698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 151.usbdev_ tx_rx_disruption.2903933698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/151.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/152.usbdev_endpoint_types.1786734292 |
| Short name | T3403 |
| Test name | |
| Test status | |
| Simulation time | 227007310 ps |
| CPU time | 1.07 seconds |
| Started | Sep 04 06:08:27 AM UTC 24 |
| Finished | Sep 04 06:08:29 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1786734292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 152.usbdev_endpoint_types.1786734292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/152.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/152.usbdev_fifo_levels.784906391 |
| Short name | T531 |
| Test name | |
| Test status | |
| Simulation time | 263008890 ps |
| CPU time | 1.06 seconds |
| Started | Sep 04 06:08:27 AM UTC 24 |
| Finished | Sep 04 06:08:29 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=784906391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 152.usbdev_fifo_levels.784906391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/152.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/152.usbdev_tx_rx_disruption.2881686245 |
| Short name | T3408 |
| Test name | |
| Test status | |
| Simulation time | 721394392 ps |
| CPU time | 2.12 seconds |
| Started | Sep 04 06:08:27 AM UTC 24 |
| Finished | Sep 04 06:08:30 AM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2881686245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 152.usbdev_ tx_rx_disruption.2881686245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/152.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/153.usbdev_endpoint_types.3762092196 |
| Short name | T431 |
| Test name | |
| Test status | |
| Simulation time | 222904834 ps |
| CPU time | 1.1 seconds |
| Started | Sep 04 06:08:27 AM UTC 24 |
| Finished | Sep 04 06:08:29 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3762092196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 153.usbdev_endpoint_types.3762092196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/153.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/153.usbdev_tx_rx_disruption.4126921428 |
| Short name | T3407 |
| Test name | |
| Test status | |
| Simulation time | 669560130 ps |
| CPU time | 1.68 seconds |
| Started | Sep 04 06:08:27 AM UTC 24 |
| Finished | Sep 04 06:08:30 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4126921428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 153.usbdev_ tx_rx_disruption.4126921428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/153.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/154.usbdev_endpoint_types.103895728 |
| Short name | T3410 |
| Test name | |
| Test status | |
| Simulation time | 205908427 ps |
| CPU time | 1.05 seconds |
| Started | Sep 04 06:08:29 AM UTC 24 |
| Finished | Sep 04 06:08:31 AM UTC 24 |
| Peak memory | 214876 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=103895728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 154.usbdev_endpoint_types.103895728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/154.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/154.usbdev_fifo_levels.1088757029 |
| Short name | T3409 |
| Test name | |
| Test status | |
| Simulation time | 156351858 ps |
| CPU time | 0.99 seconds |
| Started | Sep 04 06:08:29 AM UTC 24 |
| Finished | Sep 04 06:08:31 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1088757029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 154.usbdev_fifo_levels.1088757029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/154.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/154.usbdev_tx_rx_disruption.789847587 |
| Short name | T3416 |
| Test name | |
| Test status | |
| Simulation time | 506223735 ps |
| CPU time | 1.55 seconds |
| Started | Sep 04 06:08:29 AM UTC 24 |
| Finished | Sep 04 06:08:32 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=789847587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 154.usbdev_t x_rx_disruption.789847587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/154.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/155.usbdev_fifo_levels.3187023313 |
| Short name | T3423 |
| Test name | |
| Test status | |
| Simulation time | 173035852 ps |
| CPU time | 1.11 seconds |
| Started | Sep 04 06:08:29 AM UTC 24 |
| Finished | Sep 04 06:08:32 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3187023313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 155.usbdev_fifo_levels.3187023313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/155.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/155.usbdev_tx_rx_disruption.3510288635 |
| Short name | T3418 |
| Test name | |
| Test status | |
| Simulation time | 474492621 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 06:08:29 AM UTC 24 |
| Finished | Sep 04 06:08:32 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3510288635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 155.usbdev_ tx_rx_disruption.3510288635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/155.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/156.usbdev_endpoint_types.561694377 |
| Short name | T3412 |
| Test name | |
| Test status | |
| Simulation time | 381197068 ps |
| CPU time | 1.23 seconds |
| Started | Sep 04 06:08:29 AM UTC 24 |
| Finished | Sep 04 06:08:32 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=561694377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 156.usbdev_endpoint_types.561694377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/156.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/156.usbdev_fifo_levels.2965250997 |
| Short name | T3411 |
| Test name | |
| Test status | |
| Simulation time | 247277262 ps |
| CPU time | 1.07 seconds |
| Started | Sep 04 06:08:29 AM UTC 24 |
| Finished | Sep 04 06:08:32 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2965250997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 156.usbdev_fifo_levels.2965250997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/156.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/156.usbdev_tx_rx_disruption.2577174569 |
| Short name | T3422 |
| Test name | |
| Test status | |
| Simulation time | 504422296 ps |
| CPU time | 1.9 seconds |
| Started | Sep 04 06:08:29 AM UTC 24 |
| Finished | Sep 04 06:08:32 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2577174569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 156.usbdev_ tx_rx_disruption.2577174569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/156.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/157.usbdev_endpoint_types.3328127087 |
| Short name | T422 |
| Test name | |
| Test status | |
| Simulation time | 382244173 ps |
| CPU time | 1.23 seconds |
| Started | Sep 04 06:08:29 AM UTC 24 |
| Finished | Sep 04 06:08:32 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3328127087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 157.usbdev_endpoint_types.3328127087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/157.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/157.usbdev_fifo_levels.2481050497 |
| Short name | T3414 |
| Test name | |
| Test status | |
| Simulation time | 243524985 ps |
| CPU time | 1.09 seconds |
| Started | Sep 04 06:08:30 AM UTC 24 |
| Finished | Sep 04 06:08:32 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2481050497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 157.usbdev_fifo_levels.2481050497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/157.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/157.usbdev_tx_rx_disruption.714431229 |
| Short name | T3426 |
| Test name | |
| Test status | |
| Simulation time | 607598409 ps |
| CPU time | 1.94 seconds |
| Started | Sep 04 06:08:30 AM UTC 24 |
| Finished | Sep 04 06:08:33 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=714431229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 157.usbdev_t x_rx_disruption.714431229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/157.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/158.usbdev_endpoint_types.3823025832 |
| Short name | T373 |
| Test name | |
| Test status | |
| Simulation time | 682815486 ps |
| CPU time | 1.97 seconds |
| Started | Sep 04 06:08:30 AM UTC 24 |
| Finished | Sep 04 06:08:33 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3823025832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 158.usbdev_endpoint_types.3823025832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/158.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/158.usbdev_fifo_levels.1277127767 |
| Short name | T3419 |
| Test name | |
| Test status | |
| Simulation time | 269607287 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 06:08:30 AM UTC 24 |
| Finished | Sep 04 06:08:32 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1277127767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 158.usbdev_fifo_levels.1277127767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/158.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/158.usbdev_tx_rx_disruption.142671669 |
| Short name | T3424 |
| Test name | |
| Test status | |
| Simulation time | 621335421 ps |
| CPU time | 1.76 seconds |
| Started | Sep 04 06:08:30 AM UTC 24 |
| Finished | Sep 04 06:08:33 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=142671669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 158.usbdev_t x_rx_disruption.142671669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/158.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/159.usbdev_endpoint_types.4217776269 |
| Short name | T3417 |
| Test name | |
| Test status | |
| Simulation time | 163524391 ps |
| CPU time | 1.03 seconds |
| Started | Sep 04 06:08:30 AM UTC 24 |
| Finished | Sep 04 06:08:32 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4217776269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 159.usbdev_endpoint_types.4217776269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/159.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/159.usbdev_fifo_levels.574398099 |
| Short name | T3420 |
| Test name | |
| Test status | |
| Simulation time | 285092868 ps |
| CPU time | 1.16 seconds |
| Started | Sep 04 06:08:30 AM UTC 24 |
| Finished | Sep 04 06:08:32 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=574398099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 159.usbdev_fifo_levels.574398099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/159.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/159.usbdev_tx_rx_disruption.2642269227 |
| Short name | T3428 |
| Test name | |
| Test status | |
| Simulation time | 707766700 ps |
| CPU time | 1.86 seconds |
| Started | Sep 04 06:08:30 AM UTC 24 |
| Finished | Sep 04 06:08:33 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2642269227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 159.usbdev_ tx_rx_disruption.2642269227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/159.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_alert_test.3874736656 |
| Short name | T1409 |
| Test name | |
| Test status | |
| Simulation time | 46873866 ps |
| CPU time | 1.04 seconds |
| Started | Sep 04 05:53:33 AM UTC 24 |
| Finished | Sep 04 05:53:35 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3874736656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 16.usbdev_alert_test.3874736656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_disconnect.3543388581 |
| Short name | T1377 |
| Test name | |
| Test status | |
| Simulation time | 8729364449 ps |
| CPU time | 13.29 seconds |
| Started | Sep 04 05:53:05 AM UTC 24 |
| Finished | Sep 04 05:53:19 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3543388581 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_disconnect.3543388581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_reset.1569047433 |
| Short name | T1417 |
| Test name | |
| Test status | |
| Simulation time | 14821268347 ps |
| CPU time | 37.69 seconds |
| Started | Sep 04 05:53:05 AM UTC 24 |
| Finished | Sep 04 05:53:44 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1569047433 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_reset.1569047433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_resume.1072940620 |
| Short name | T1450 |
| Test name | |
| Test status | |
| Simulation time | 29685822008 ps |
| CPU time | 59.15 seconds |
| Started | Sep 04 05:53:05 AM UTC 24 |
| Finished | Sep 04 05:54:06 AM UTC 24 |
| Peak memory | 217432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1072940620 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_resume.1072940620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_av_buffer.3595230283 |
| Short name | T1354 |
| Test name | |
| Test status | |
| Simulation time | 203150632 ps |
| CPU time | 1.26 seconds |
| Started | Sep 04 05:53:06 AM UTC 24 |
| Finished | Sep 04 05:53:08 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3595230283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_av_buffer.3595230283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_bitstuff_err.443252185 |
| Short name | T1355 |
| Test name | |
| Test status | |
| Simulation time | 145955531 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 05:53:06 AM UTC 24 |
| Finished | Sep 04 05:53:08 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=443252185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_bitstuff_err.443252185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_data_toggle_clear.4131419850 |
| Short name | T1360 |
| Test name | |
| Test status | |
| Simulation time | 238902751 ps |
| CPU time | 1.8 seconds |
| Started | Sep 04 05:53:07 AM UTC 24 |
| Finished | Sep 04 05:53:10 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4131419850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 16.usbdev_data_toggle_clear.4131419850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_data_toggle_restore.1539820893 |
| Short name | T1362 |
| Test name | |
| Test status | |
| Simulation time | 758436853 ps |
| CPU time | 2.14 seconds |
| Started | Sep 04 05:53:07 AM UTC 24 |
| Finished | Sep 04 05:53:11 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1539820893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_data_toggle_restore.1539820893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_device_address.3783529618 |
| Short name | T1533 |
| Test name | |
| Test status | |
| Simulation time | 50734976597 ps |
| CPU time | 97.39 seconds |
| Started | Sep 04 05:53:07 AM UTC 24 |
| Finished | Sep 04 05:54:47 AM UTC 24 |
| Peak memory | 217464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3783529618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_device_address.3783529618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_device_timeout.2865625355 |
| Short name | T1402 |
| Test name | |
| Test status | |
| Simulation time | 2879227705 ps |
| CPU time | 21.92 seconds |
| Started | Sep 04 05:53:09 AM UTC 24 |
| Finished | Sep 04 05:53:32 AM UTC 24 |
| Peak memory | 217456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2865625355 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_device_timeout.2865625355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_disable_endpoint.3511601730 |
| Short name | T1366 |
| Test name | |
| Test status | |
| Simulation time | 731472095 ps |
| CPU time | 3.5 seconds |
| Started | Sep 04 05:53:09 AM UTC 24 |
| Finished | Sep 04 05:53:14 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3511601730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 16.usbdev_disable_endpoint.3511601730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_disconnected.832044847 |
| Short name | T1364 |
| Test name | |
| Test status | |
| Simulation time | 147807362 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 05:53:09 AM UTC 24 |
| Finished | Sep 04 05:53:12 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=832044847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_disconnected.832044847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_enable.1543016982 |
| Short name | T1363 |
| Test name | |
| Test status | |
| Simulation time | 45245075 ps |
| CPU time | 1.11 seconds |
| Started | Sep 04 05:53:09 AM UTC 24 |
| Finished | Sep 04 05:53:11 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1543016982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 16.usbdev_enable.1543016982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_endpoint_access.3351213770 |
| Short name | T1368 |
| Test name | |
| Test status | |
| Simulation time | 907268934 ps |
| CPU time | 4.65 seconds |
| Started | Sep 04 05:53:09 AM UTC 24 |
| Finished | Sep 04 05:53:15 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3351213770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_endpoint_access.3351213770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_endpoint_types.1170252969 |
| Short name | T353 |
| Test name | |
| Test status | |
| Simulation time | 304158630 ps |
| CPU time | 1.98 seconds |
| Started | Sep 04 05:53:11 AM UTC 24 |
| Finished | Sep 04 05:53:14 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1170252969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_endpoint_types.1170252969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_fifo_levels.3051156621 |
| Short name | T1365 |
| Test name | |
| Test status | |
| Simulation time | 155935354 ps |
| CPU time | 1.27 seconds |
| Started | Sep 04 05:53:11 AM UTC 24 |
| Finished | Sep 04 05:53:13 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3051156621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_fifo_levels.3051156621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_fifo_rst.2015586995 |
| Short name | T1370 |
| Test name | |
| Test status | |
| Simulation time | 194527735 ps |
| CPU time | 3.35 seconds |
| Started | Sep 04 05:53:11 AM UTC 24 |
| Finished | Sep 04 05:53:15 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2015586995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_fifo_rst.2015586995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_in_iso.1859648718 |
| Short name | T1369 |
| Test name | |
| Test status | |
| Simulation time | 229424706 ps |
| CPU time | 1.84 seconds |
| Started | Sep 04 05:53:12 AM UTC 24 |
| Finished | Sep 04 05:53:15 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1859648718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 16.usbdev_in_iso.1859648718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_in_stall.1302248583 |
| Short name | T1367 |
| Test name | |
| Test status | |
| Simulation time | 147450372 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 05:53:12 AM UTC 24 |
| Finished | Sep 04 05:53:15 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1302248583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_in_stall.1302248583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_in_trans.1374006865 |
| Short name | T1371 |
| Test name | |
| Test status | |
| Simulation time | 283273030 ps |
| CPU time | 1.81 seconds |
| Started | Sep 04 05:53:12 AM UTC 24 |
| Finished | Sep 04 05:53:15 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1374006865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_in_trans.1374006865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_invalid_sync.3638768097 |
| Short name | T1432 |
| Test name | |
| Test status | |
| Simulation time | 5168834950 ps |
| CPU time | 44.24 seconds |
| Started | Sep 04 05:53:11 AM UTC 24 |
| Finished | Sep 04 05:53:57 AM UTC 24 |
| Peak memory | 227612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3638768097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 16.usbdev_invalid_sync.3638768097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_iso_retraction.3750715073 |
| Short name | T1583 |
| Test name | |
| Test status | |
| Simulation time | 9815688195 ps |
| CPU time | 122.59 seconds |
| Started | Sep 04 05:53:12 AM UTC 24 |
| Finished | Sep 04 05:55:17 AM UTC 24 |
| Peak memory | 217392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3750715073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_iso_retraction.3750715073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_link_in_err.1341135725 |
| Short name | T1373 |
| Test name | |
| Test status | |
| Simulation time | 209977447 ps |
| CPU time | 1.61 seconds |
| Started | Sep 04 05:53:13 AM UTC 24 |
| Finished | Sep 04 05:53:16 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1341135725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_link_in_err.1341135725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_link_resume.176665309 |
| Short name | T1469 |
| Test name | |
| Test status | |
| Simulation time | 27168108805 ps |
| CPU time | 57.74 seconds |
| Started | Sep 04 05:53:15 AM UTC 24 |
| Finished | Sep 04 05:54:14 AM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=176665309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_link_resume.176665309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_link_suspend.218562384 |
| Short name | T1401 |
| Test name | |
| Test status | |
| Simulation time | 4976275830 ps |
| CPU time | 15.87 seconds |
| Started | Sep 04 05:53:15 AM UTC 24 |
| Finished | Sep 04 05:53:32 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=218562384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_link_suspend.218562384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_low_speed_traffic.4102153682 |
| Short name | T1647 |
| Test name | |
| Test status | |
| Simulation time | 4229325680 ps |
| CPU time | 153.53 seconds |
| Started | Sep 04 05:53:16 AM UTC 24 |
| Finished | Sep 04 05:55:53 AM UTC 24 |
| Peak memory | 227724 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4102153682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_low_speed_traffic.4102153682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_max_inter_pkt_delay.579525736 |
| Short name | T1564 |
| Test name | |
| Test status | |
| Simulation time | 3823752916 ps |
| CPU time | 107.49 seconds |
| Started | Sep 04 05:53:16 AM UTC 24 |
| Finished | Sep 04 05:55:06 AM UTC 24 |
| Peak memory | 227628 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=579525736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_inter_pkt_delay.579525736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_max_length_in_transaction.1442724563 |
| Short name | T1376 |
| Test name | |
| Test status | |
| Simulation time | 284760461 ps |
| CPU time | 1.95 seconds |
| Started | Sep 04 05:53:16 AM UTC 24 |
| Finished | Sep 04 05:53:19 AM UTC 24 |
| Peak memory | 215008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1442724563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 16.usbdev_max_length_in_transaction.1442724563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_max_length_out_transaction.3461756541 |
| Short name | T1375 |
| Test name | |
| Test status | |
| Simulation time | 245211339 ps |
| CPU time | 1.68 seconds |
| Started | Sep 04 05:53:16 AM UTC 24 |
| Finished | Sep 04 05:53:19 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3461756541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 16.usbdev_max_length_out_transaction.3461756541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_max_non_iso_usb_traffic.3988603840 |
| Short name | T1459 |
| Test name | |
| Test status | |
| Simulation time | 2028806470 ps |
| CPU time | 51.05 seconds |
| Started | Sep 04 05:53:16 AM UTC 24 |
| Finished | Sep 04 05:54:09 AM UTC 24 |
| Peak memory | 234040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3988603840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_non_iso_usb_traffic.3988603840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_min_inter_pkt_delay.853599510 |
| Short name | T1512 |
| Test name | |
| Test status | |
| Simulation time | 2701471951 ps |
| CPU time | 75.47 seconds |
| Started | Sep 04 05:53:18 AM UTC 24 |
| Finished | Sep 04 05:54:35 AM UTC 24 |
| Peak memory | 229588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=853599510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_min_inter_pkt_delay.853599510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_min_length_in_transaction.355689062 |
| Short name | T1378 |
| Test name | |
| Test status | |
| Simulation time | 167287010 ps |
| CPU time | 1.27 seconds |
| Started | Sep 04 05:53:18 AM UTC 24 |
| Finished | Sep 04 05:53:20 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=355689062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 16.usbdev_min_length_in_transaction.355689062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_min_length_out_transaction.3668354888 |
| Short name | T1382 |
| Test name | |
| Test status | |
| Simulation time | 171622435 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:53:20 AM UTC 24 |
| Finished | Sep 04 05:53:23 AM UTC 24 |
| Peak memory | 214780 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3668354888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 16.usbdev_min_length_out_transaction.3668354888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_out_iso.1775957495 |
| Short name | T1383 |
| Test name | |
| Test status | |
| Simulation time | 179893745 ps |
| CPU time | 1.65 seconds |
| Started | Sep 04 05:53:20 AM UTC 24 |
| Finished | Sep 04 05:53:23 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1775957495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 16.usbdev_out_iso.1775957495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_out_stall.3428450431 |
| Short name | T1381 |
| Test name | |
| Test status | |
| Simulation time | 159280704 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 05:53:20 AM UTC 24 |
| Finished | Sep 04 05:53:23 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3428450431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_out_stall.3428450431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_out_trans_nak.2131947606 |
| Short name | T1385 |
| Test name | |
| Test status | |
| Simulation time | 154266300 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 05:53:21 AM UTC 24 |
| Finished | Sep 04 05:53:24 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2131947606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 16.usbdev_out_trans_nak.2131947606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_pending_in_trans.3371004700 |
| Short name | T1386 |
| Test name | |
| Test status | |
| Simulation time | 176481482 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 05:53:22 AM UTC 24 |
| Finished | Sep 04 05:53:25 AM UTC 24 |
| Peak memory | 214948 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3371004700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 16.usbdev_pending_in_trans.3371004700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_phy_config_pinflip.2125233969 |
| Short name | T1387 |
| Test name | |
| Test status | |
| Simulation time | 230251553 ps |
| CPU time | 1.72 seconds |
| Started | Sep 04 05:53:23 AM UTC 24 |
| Finished | Sep 04 05:53:26 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2125233969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 16.usbdev_phy_config_pinflip.2125233969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_phy_config_usb_ref_disable.593063299 |
| Short name | T1391 |
| Test name | |
| Test status | |
| Simulation time | 145254522 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 05:53:24 AM UTC 24 |
| Finished | Sep 04 05:53:26 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=593063299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 16.usbdev_phy_config_usb_ref_disable.593063299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_phy_pins_sense.1803450799 |
| Short name | T1389 |
| Test name | |
| Test status | |
| Simulation time | 44785160 ps |
| CPU time | 0.98 seconds |
| Started | Sep 04 05:53:24 AM UTC 24 |
| Finished | Sep 04 05:53:26 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1803450799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_phy_pins_sense.1803450799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_buffer.1624880486 |
| Short name | T1458 |
| Test name | |
| Test status | |
| Simulation time | 15239713512 ps |
| CPU time | 43.42 seconds |
| Started | Sep 04 05:53:24 AM UTC 24 |
| Finished | Sep 04 05:54:09 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1624880486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_pkt_buffer.1624880486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_received.4156612869 |
| Short name | T1390 |
| Test name | |
| Test status | |
| Simulation time | 167151940 ps |
| CPU time | 1.14 seconds |
| Started | Sep 04 05:53:24 AM UTC 24 |
| Finished | Sep 04 05:53:26 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4156612869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_pkt_received.4156612869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_sent.2204156663 |
| Short name | T1392 |
| Test name | |
| Test status | |
| Simulation time | 188952415 ps |
| CPU time | 1.61 seconds |
| Started | Sep 04 05:53:25 AM UTC 24 |
| Finished | Sep 04 05:53:28 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2204156663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_pkt_sent.2204156663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_random_length_in_transaction.211382209 |
| Short name | T1393 |
| Test name | |
| Test status | |
| Simulation time | 215557615 ps |
| CPU time | 1.65 seconds |
| Started | Sep 04 05:53:25 AM UTC 24 |
| Finished | Sep 04 05:53:28 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=211382209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_random_length_in_transaction.211382209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_random_length_out_transaction.104844346 |
| Short name | T1395 |
| Test name | |
| Test status | |
| Simulation time | 151906754 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:53:26 AM UTC 24 |
| Finished | Sep 04 05:53:29 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=104844346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 16.usbdev_random_length_out_transaction.104844346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_resume_link_active.1718095529 |
| Short name | T1431 |
| Test name | |
| Test status | |
| Simulation time | 20156627806 ps |
| CPU time | 28.34 seconds |
| Started | Sep 04 05:53:27 AM UTC 24 |
| Finished | Sep 04 05:53:56 AM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1718095529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 16.usbdev_resume_link_active.1718095529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_rx_crc_err.2730705499 |
| Short name | T1394 |
| Test name | |
| Test status | |
| Simulation time | 154001139 ps |
| CPU time | 1.3 seconds |
| Started | Sep 04 05:53:27 AM UTC 24 |
| Finished | Sep 04 05:53:29 AM UTC 24 |
| Peak memory | 213504 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2730705499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_rx_crc_err.2730705499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_rx_full.3816754822 |
| Short name | T1396 |
| Test name | |
| Test status | |
| Simulation time | 261492095 ps |
| CPU time | 1.94 seconds |
| Started | Sep 04 05:53:27 AM UTC 24 |
| Finished | Sep 04 05:53:30 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3816754822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 16.usbdev_rx_full.3816754822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_setup_stage.637851676 |
| Short name | T1399 |
| Test name | |
| Test status | |
| Simulation time | 188164503 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 05:53:28 AM UTC 24 |
| Finished | Sep 04 05:53:30 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=637851676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_setup_stage.637851676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_setup_trans_ignored.1475319561 |
| Short name | T1398 |
| Test name | |
| Test status | |
| Simulation time | 151121817 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 05:53:28 AM UTC 24 |
| Finished | Sep 04 05:53:30 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1475319561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 16.usbdev_setup_trans_ignored.1475319561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_smoke.1153014646 |
| Short name | T1400 |
| Test name | |
| Test status | |
| Simulation time | 224684711 ps |
| CPU time | 1.63 seconds |
| Started | Sep 04 05:53:29 AM UTC 24 |
| Finished | Sep 04 05:53:32 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1153014646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_smoke.1153014646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_spurious_pids_ignored.483761395 |
| Short name | T1413 |
| Test name | |
| Test status | |
| Simulation time | 1346429160 ps |
| CPU time | 10.97 seconds |
| Started | Sep 04 05:53:29 AM UTC 24 |
| Finished | Sep 04 05:53:41 AM UTC 24 |
| Peak memory | 229468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=483761395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 16.usbdev_spurious_pids_ignored.483761395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_stall_priority_over_nak.2051176663 |
| Short name | T1404 |
| Test name | |
| Test status | |
| Simulation time | 174629043 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 05:53:30 AM UTC 24 |
| Finished | Sep 04 05:53:33 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2051176663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_stall_priority_over_nak.2051176663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_stall_trans.348248338 |
| Short name | T1403 |
| Test name | |
| Test status | |
| Simulation time | 176260369 ps |
| CPU time | 1.28 seconds |
| Started | Sep 04 05:53:30 AM UTC 24 |
| Finished | Sep 04 05:53:33 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=348248338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_stall_trans.348248338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_stream_len_max.3802142819 |
| Short name | T1408 |
| Test name | |
| Test status | |
| Simulation time | 371276014 ps |
| CPU time | 2.18 seconds |
| Started | Sep 04 05:53:32 AM UTC 24 |
| Finished | Sep 04 05:53:35 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3802142819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_stream_len_max.3802142819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_streaming_out.502041622 |
| Short name | T1523 |
| Test name | |
| Test status | |
| Simulation time | 2509733543 ps |
| CPU time | 68.51 seconds |
| Started | Sep 04 05:53:30 AM UTC 24 |
| Finished | Sep 04 05:54:41 AM UTC 24 |
| Peak memory | 234100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=502041622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_streaming_out.502041622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_timeout_missing_host_handshake.718464336 |
| Short name | T1379 |
| Test name | |
| Test status | |
| Simulation time | 1565500925 ps |
| CPU time | 11.23 seconds |
| Started | Sep 04 05:53:09 AM UTC 24 |
| Finished | Sep 04 05:53:21 AM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=718464336 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_timeout_missing_host_handshake.718464336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/16.usbdev_tx_rx_disruption.1191097789 |
| Short name | T1410 |
| Test name | |
| Test status | |
| Simulation time | 529669221 ps |
| CPU time | 2.73 seconds |
| Started | Sep 04 05:53:32 AM UTC 24 |
| Finished | Sep 04 05:53:36 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1191097789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_t x_rx_disruption.1191097789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/16.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/160.usbdev_endpoint_types.453893443 |
| Short name | T3415 |
| Test name | |
| Test status | |
| Simulation time | 297199949 ps |
| CPU time | 0.97 seconds |
| Started | Sep 04 06:08:30 AM UTC 24 |
| Finished | Sep 04 06:08:32 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=453893443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 160.usbdev_endpoint_types.453893443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/160.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/160.usbdev_tx_rx_disruption.4182588008 |
| Short name | T3425 |
| Test name | |
| Test status | |
| Simulation time | 639824457 ps |
| CPU time | 1.65 seconds |
| Started | Sep 04 06:08:30 AM UTC 24 |
| Finished | Sep 04 06:08:33 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4182588008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 160.usbdev_ tx_rx_disruption.4182588008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/160.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/161.usbdev_endpoint_types.1157798688 |
| Short name | T3421 |
| Test name | |
| Test status | |
| Simulation time | 158821342 ps |
| CPU time | 1.15 seconds |
| Started | Sep 04 06:08:30 AM UTC 24 |
| Finished | Sep 04 06:08:32 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1157798688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 161.usbdev_endpoint_types.1157798688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/161.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/161.usbdev_tx_rx_disruption.801344434 |
| Short name | T3427 |
| Test name | |
| Test status | |
| Simulation time | 547453047 ps |
| CPU time | 1.67 seconds |
| Started | Sep 04 06:08:30 AM UTC 24 |
| Finished | Sep 04 06:08:33 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=801344434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 161.usbdev_t x_rx_disruption.801344434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/161.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/162.usbdev_endpoint_types.3677191806 |
| Short name | T3429 |
| Test name | |
| Test status | |
| Simulation time | 154116857 ps |
| CPU time | 0.87 seconds |
| Started | Sep 04 06:08:32 AM UTC 24 |
| Finished | Sep 04 06:08:33 AM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3677191806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 162.usbdev_endpoint_types.3677191806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/162.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/162.usbdev_tx_rx_disruption.3183791796 |
| Short name | T3430 |
| Test name | |
| Test status | |
| Simulation time | 593396866 ps |
| CPU time | 1.8 seconds |
| Started | Sep 04 06:08:32 AM UTC 24 |
| Finished | Sep 04 06:08:34 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3183791796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 162.usbdev_ tx_rx_disruption.3183791796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/162.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/163.usbdev_endpoint_types.4294545391 |
| Short name | T381 |
| Test name | |
| Test status | |
| Simulation time | 557595892 ps |
| CPU time | 1.65 seconds |
| Started | Sep 04 06:08:32 AM UTC 24 |
| Finished | Sep 04 06:08:34 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4294545391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 163.usbdev_endpoint_types.4294545391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/163.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/163.usbdev_tx_rx_disruption.3960413671 |
| Short name | T3433 |
| Test name | |
| Test status | |
| Simulation time | 596459172 ps |
| CPU time | 1.74 seconds |
| Started | Sep 04 06:08:32 AM UTC 24 |
| Finished | Sep 04 06:08:34 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3960413671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 163.usbdev_ tx_rx_disruption.3960413671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/163.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/164.usbdev_tx_rx_disruption.406503987 |
| Short name | T3431 |
| Test name | |
| Test status | |
| Simulation time | 472986139 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 06:08:32 AM UTC 24 |
| Finished | Sep 04 06:08:34 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=406503987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 164.usbdev_t x_rx_disruption.406503987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/164.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/165.usbdev_endpoint_types.1167362739 |
| Short name | T317 |
| Test name | |
| Test status | |
| Simulation time | 666917095 ps |
| CPU time | 1.6 seconds |
| Started | Sep 04 06:08:32 AM UTC 24 |
| Finished | Sep 04 06:08:34 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1167362739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 165.usbdev_endpoint_types.1167362739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/165.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/165.usbdev_tx_rx_disruption.1119331878 |
| Short name | T3434 |
| Test name | |
| Test status | |
| Simulation time | 603370243 ps |
| CPU time | 1.72 seconds |
| Started | Sep 04 06:08:32 AM UTC 24 |
| Finished | Sep 04 06:08:35 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1119331878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 165.usbdev_ tx_rx_disruption.1119331878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/165.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/166.usbdev_endpoint_types.3029091469 |
| Short name | T423 |
| Test name | |
| Test status | |
| Simulation time | 529653230 ps |
| CPU time | 1.64 seconds |
| Started | Sep 04 06:08:32 AM UTC 24 |
| Finished | Sep 04 06:08:35 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3029091469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 166.usbdev_endpoint_types.3029091469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/166.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/166.usbdev_tx_rx_disruption.3269060654 |
| Short name | T3435 |
| Test name | |
| Test status | |
| Simulation time | 613387425 ps |
| CPU time | 1.7 seconds |
| Started | Sep 04 06:08:32 AM UTC 24 |
| Finished | Sep 04 06:08:35 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3269060654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 166.usbdev_ tx_rx_disruption.3269060654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/166.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/167.usbdev_endpoint_types.546025237 |
| Short name | T3432 |
| Test name | |
| Test status | |
| Simulation time | 348372706 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 06:08:32 AM UTC 24 |
| Finished | Sep 04 06:08:34 AM UTC 24 |
| Peak memory | 214820 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=546025237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 167.usbdev_endpoint_types.546025237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/167.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/167.usbdev_tx_rx_disruption.797055250 |
| Short name | T3436 |
| Test name | |
| Test status | |
| Simulation time | 559136249 ps |
| CPU time | 1.7 seconds |
| Started | Sep 04 06:08:32 AM UTC 24 |
| Finished | Sep 04 06:08:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=797055250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 167.usbdev_t x_rx_disruption.797055250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/167.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/168.usbdev_tx_rx_disruption.95721515 |
| Short name | T3461 |
| Test name | |
| Test status | |
| Simulation time | 486883396 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 06:08:34 AM UTC 24 |
| Finished | Sep 04 06:08:49 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=95721515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 168.usbdev_tx _rx_disruption.95721515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/168.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/169.usbdev_endpoint_types.3153231752 |
| Short name | T3459 |
| Test name | |
| Test status | |
| Simulation time | 479261361 ps |
| CPU time | 1.3 seconds |
| Started | Sep 04 06:08:34 AM UTC 24 |
| Finished | Sep 04 06:08:49 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3153231752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 169.usbdev_endpoint_types.3153231752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/169.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/169.usbdev_tx_rx_disruption.1020829899 |
| Short name | T3460 |
| Test name | |
| Test status | |
| Simulation time | 468092775 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 06:08:34 AM UTC 24 |
| Finished | Sep 04 06:08:49 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1020829899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 169.usbdev_ tx_rx_disruption.1020829899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/169.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_alert_test.3808701887 |
| Short name | T1457 |
| Test name | |
| Test status | |
| Simulation time | 78334389 ps |
| CPU time | 1.11 seconds |
| Started | Sep 04 05:54:07 AM UTC 24 |
| Finished | Sep 04 05:54:09 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3808701887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 17.usbdev_alert_test.3808701887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_disconnect.2599663258 |
| Short name | T1445 |
| Test name | |
| Test status | |
| Simulation time | 9344903432 ps |
| CPU time | 28.29 seconds |
| Started | Sep 04 05:53:33 AM UTC 24 |
| Finished | Sep 04 05:54:03 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2599663258 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_disconnect.2599663258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_reset.711804752 |
| Short name | T1480 |
| Test name | |
| Test status | |
| Simulation time | 15807411461 ps |
| CPU time | 44.79 seconds |
| Started | Sep 04 05:53:33 AM UTC 24 |
| Finished | Sep 04 05:54:19 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=711804752 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_reset.711804752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_resume.3157351113 |
| Short name | T1465 |
| Test name | |
| Test status | |
| Simulation time | 28711302944 ps |
| CPU time | 37.68 seconds |
| Started | Sep 04 05:53:33 AM UTC 24 |
| Finished | Sep 04 05:54:12 AM UTC 24 |
| Peak memory | 217436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3157351113 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_resume.3157351113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_av_buffer.3151203869 |
| Short name | T1411 |
| Test name | |
| Test status | |
| Simulation time | 181036620 ps |
| CPU time | 1.3 seconds |
| Started | Sep 04 05:53:35 AM UTC 24 |
| Finished | Sep 04 05:53:37 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3151203869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_av_buffer.3151203869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_bitstuff_err.3696898777 |
| Short name | T1406 |
| Test name | |
| Test status | |
| Simulation time | 160869741 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 05:53:35 AM UTC 24 |
| Finished | Sep 04 05:53:37 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3696898777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_bitstuff_err.3696898777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_data_toggle_clear.3489763566 |
| Short name | T1412 |
| Test name | |
| Test status | |
| Simulation time | 307307143 ps |
| CPU time | 2.13 seconds |
| Started | Sep 04 05:53:35 AM UTC 24 |
| Finished | Sep 04 05:53:38 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3489763566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 17.usbdev_data_toggle_clear.3489763566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_data_toggle_restore.28652018 |
| Short name | T490 |
| Test name | |
| Test status | |
| Simulation time | 917146442 ps |
| CPU time | 4.54 seconds |
| Started | Sep 04 05:53:36 AM UTC 24 |
| Finished | Sep 04 05:53:42 AM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=28652018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_data_toggle_restore.28652018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_device_address.2265609398 |
| Short name | T372 |
| Test name | |
| Test status | |
| Simulation time | 12529065581 ps |
| CPU time | 34.84 seconds |
| Started | Sep 04 05:53:36 AM UTC 24 |
| Finished | Sep 04 05:54:13 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2265609398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_device_address.2265609398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_device_timeout.910603219 |
| Short name | T1429 |
| Test name | |
| Test status | |
| Simulation time | 2554340067 ps |
| CPU time | 17.45 seconds |
| Started | Sep 04 05:53:36 AM UTC 24 |
| Finished | Sep 04 05:53:55 AM UTC 24 |
| Peak memory | 217404 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=910603219 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_device_timeout.910603219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_disable_endpoint.3399164244 |
| Short name | T1414 |
| Test name | |
| Test status | |
| Simulation time | 623149925 ps |
| CPU time | 2.6 seconds |
| Started | Sep 04 05:53:38 AM UTC 24 |
| Finished | Sep 04 05:53:42 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3399164244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 17.usbdev_disable_endpoint.3399164244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_disconnected.3023619555 |
| Short name | T1349 |
| Test name | |
| Test status | |
| Simulation time | 147056036 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 05:53:38 AM UTC 24 |
| Finished | Sep 04 05:53:40 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3023619555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_disconnected.3023619555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_enable.1370820545 |
| Short name | T984 |
| Test name | |
| Test status | |
| Simulation time | 47793928 ps |
| CPU time | 0.9 seconds |
| Started | Sep 04 05:53:39 AM UTC 24 |
| Finished | Sep 04 05:53:41 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1370820545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 17.usbdev_enable.1370820545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_endpoint_access.3974156657 |
| Short name | T1415 |
| Test name | |
| Test status | |
| Simulation time | 855959480 ps |
| CPU time | 2.64 seconds |
| Started | Sep 04 05:53:39 AM UTC 24 |
| Finished | Sep 04 05:53:43 AM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3974156657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_endpoint_access.3974156657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_fifo_levels.4146009258 |
| Short name | T557 |
| Test name | |
| Test status | |
| Simulation time | 288838505 ps |
| CPU time | 1.89 seconds |
| Started | Sep 04 05:53:42 AM UTC 24 |
| Finished | Sep 04 05:53:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4146009258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_fifo_levels.4146009258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_fifo_rst.2235634718 |
| Short name | T1418 |
| Test name | |
| Test status | |
| Simulation time | 270220467 ps |
| CPU time | 2.55 seconds |
| Started | Sep 04 05:53:42 AM UTC 24 |
| Finished | Sep 04 05:53:46 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2235634718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_fifo_rst.2235634718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_in_iso.590250766 |
| Short name | T1420 |
| Test name | |
| Test status | |
| Simulation time | 219008424 ps |
| CPU time | 1.75 seconds |
| Started | Sep 04 05:53:44 AM UTC 24 |
| Finished | Sep 04 05:53:46 AM UTC 24 |
| Peak memory | 227412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=590250766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 17.usbdev_in_iso.590250766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_in_stall.1636498304 |
| Short name | T1419 |
| Test name | |
| Test status | |
| Simulation time | 183052528 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 05:53:44 AM UTC 24 |
| Finished | Sep 04 05:53:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1636498304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_in_stall.1636498304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_in_trans.1379610154 |
| Short name | T1421 |
| Test name | |
| Test status | |
| Simulation time | 211535217 ps |
| CPU time | 1.65 seconds |
| Started | Sep 04 05:53:45 AM UTC 24 |
| Finished | Sep 04 05:53:47 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1379610154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_in_trans.1379610154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_invalid_sync.1411376362 |
| Short name | T1473 |
| Test name | |
| Test status | |
| Simulation time | 2983642628 ps |
| CPU time | 32.12 seconds |
| Started | Sep 04 05:53:42 AM UTC 24 |
| Finished | Sep 04 05:54:16 AM UTC 24 |
| Peak memory | 229728 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1411376362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 17.usbdev_invalid_sync.1411376362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_iso_retraction.2393022428 |
| Short name | T1600 |
| Test name | |
| Test status | |
| Simulation time | 11398635185 ps |
| CPU time | 101 seconds |
| Started | Sep 04 05:53:45 AM UTC 24 |
| Finished | Sep 04 05:55:28 AM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2393022428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_iso_retraction.2393022428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_link_in_err.548599481 |
| Short name | T1423 |
| Test name | |
| Test status | |
| Simulation time | 198145381 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 05:53:46 AM UTC 24 |
| Finished | Sep 04 05:53:49 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=548599481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_link_in_err.548599481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_link_resume.2227455810 |
| Short name | T1446 |
| Test name | |
| Test status | |
| Simulation time | 6374496023 ps |
| CPU time | 15.39 seconds |
| Started | Sep 04 05:53:46 AM UTC 24 |
| Finished | Sep 04 05:54:03 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2227455810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_link_resume.2227455810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_link_suspend.3694752397 |
| Short name | T1433 |
| Test name | |
| Test status | |
| Simulation time | 4526508789 ps |
| CPU time | 8.63 seconds |
| Started | Sep 04 05:53:47 AM UTC 24 |
| Finished | Sep 04 05:53:57 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3694752397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_link_suspend.3694752397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_low_speed_traffic.881888187 |
| Short name | T1482 |
| Test name | |
| Test status | |
| Simulation time | 3828541485 ps |
| CPU time | 31.77 seconds |
| Started | Sep 04 05:53:47 AM UTC 24 |
| Finished | Sep 04 05:54:20 AM UTC 24 |
| Peak memory | 229684 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=881888187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_low_speed_traffic.881888187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_max_inter_pkt_delay.3302530757 |
| Short name | T1587 |
| Test name | |
| Test status | |
| Simulation time | 3056688969 ps |
| CPU time | 90.44 seconds |
| Started | Sep 04 05:53:47 AM UTC 24 |
| Finished | Sep 04 05:55:20 AM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3302530757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_inter_pkt_delay.3302530757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_max_length_in_transaction.71002416 |
| Short name | T1425 |
| Test name | |
| Test status | |
| Simulation time | 258921185 ps |
| CPU time | 1.81 seconds |
| Started | Sep 04 05:53:49 AM UTC 24 |
| Finished | Sep 04 05:53:51 AM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=71002416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 17.usbdev_max_length_in_transaction.71002416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_max_length_out_transaction.2919908515 |
| Short name | T1424 |
| Test name | |
| Test status | |
| Simulation time | 216934201 ps |
| CPU time | 1.7 seconds |
| Started | Sep 04 05:53:49 AM UTC 24 |
| Finished | Sep 04 05:53:51 AM UTC 24 |
| Peak memory | 216460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2919908515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 17.usbdev_max_length_out_transaction.2919908515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_max_non_iso_usb_traffic.1915244297 |
| Short name | T1474 |
| Test name | |
| Test status | |
| Simulation time | 2720529636 ps |
| CPU time | 25.24 seconds |
| Started | Sep 04 05:53:50 AM UTC 24 |
| Finished | Sep 04 05:54:16 AM UTC 24 |
| Peak memory | 229604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1915244297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_non_iso_usb_traffic.1915244297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_min_inter_pkt_delay.395508966 |
| Short name | T1546 |
| Test name | |
| Test status | |
| Simulation time | 2460478761 ps |
| CPU time | 62.66 seconds |
| Started | Sep 04 05:53:52 AM UTC 24 |
| Finished | Sep 04 05:54:56 AM UTC 24 |
| Peak memory | 229524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=395508966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_min_inter_pkt_delay.395508966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_min_length_in_transaction.3079071047 |
| Short name | T1427 |
| Test name | |
| Test status | |
| Simulation time | 155805435 ps |
| CPU time | 1.17 seconds |
| Started | Sep 04 05:53:52 AM UTC 24 |
| Finished | Sep 04 05:53:54 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3079071047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 17.usbdev_min_length_in_transaction.3079071047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_min_length_out_transaction.4122181850 |
| Short name | T1430 |
| Test name | |
| Test status | |
| Simulation time | 184827097 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 05:53:53 AM UTC 24 |
| Finished | Sep 04 05:53:56 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4122181850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 17.usbdev_min_length_out_transaction.4122181850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_out_iso.3586081086 |
| Short name | T1434 |
| Test name | |
| Test status | |
| Simulation time | 179119577 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 05:53:55 AM UTC 24 |
| Finished | Sep 04 05:53:58 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3586081086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 17.usbdev_out_iso.3586081086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_out_stall.962999132 |
| Short name | T1436 |
| Test name | |
| Test status | |
| Simulation time | 152631322 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 05:53:57 AM UTC 24 |
| Finished | Sep 04 05:53:59 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=962999132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_out_stall.962999132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_out_trans_nak.1094863939 |
| Short name | T1437 |
| Test name | |
| Test status | |
| Simulation time | 188969789 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 05:53:57 AM UTC 24 |
| Finished | Sep 04 05:53:59 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1094863939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 17.usbdev_out_trans_nak.1094863939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_pending_in_trans.3314676055 |
| Short name | T1438 |
| Test name | |
| Test status | |
| Simulation time | 159740138 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 05:53:58 AM UTC 24 |
| Finished | Sep 04 05:54:00 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3314676055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 17.usbdev_pending_in_trans.3314676055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_phy_config_pinflip.706830312 |
| Short name | T1440 |
| Test name | |
| Test status | |
| Simulation time | 219157404 ps |
| CPU time | 1.65 seconds |
| Started | Sep 04 05:53:58 AM UTC 24 |
| Finished | Sep 04 05:54:01 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=706830312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 17.usbdev_phy_config_pinflip.706830312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_phy_config_usb_ref_disable.458909085 |
| Short name | T1439 |
| Test name | |
| Test status | |
| Simulation time | 200169672 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 05:53:58 AM UTC 24 |
| Finished | Sep 04 05:54:00 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=458909085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 17.usbdev_phy_config_usb_ref_disable.458909085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_phy_pins_sense.2999538359 |
| Short name | T1441 |
| Test name | |
| Test status | |
| Simulation time | 50415593 ps |
| CPU time | 1.09 seconds |
| Started | Sep 04 05:53:59 AM UTC 24 |
| Finished | Sep 04 05:54:01 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2999538359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_phy_pins_sense.2999538359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_buffer.3233790312 |
| Short name | T1550 |
| Test name | |
| Test status | |
| Simulation time | 15069319522 ps |
| CPU time | 57.04 seconds |
| Started | Sep 04 05:53:59 AM UTC 24 |
| Finished | Sep 04 05:54:58 AM UTC 24 |
| Peak memory | 227396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3233790312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_pkt_buffer.3233790312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_received.1139198695 |
| Short name | T1443 |
| Test name | |
| Test status | |
| Simulation time | 197335570 ps |
| CPU time | 1.61 seconds |
| Started | Sep 04 05:54:00 AM UTC 24 |
| Finished | Sep 04 05:54:02 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1139198695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_pkt_received.1139198695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_sent.169810860 |
| Short name | T1442 |
| Test name | |
| Test status | |
| Simulation time | 166298286 ps |
| CPU time | 1.29 seconds |
| Started | Sep 04 05:54:00 AM UTC 24 |
| Finished | Sep 04 05:54:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=169810860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 17.usbdev_pkt_sent.169810860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_random_length_in_transaction.294984423 |
| Short name | T1444 |
| Test name | |
| Test status | |
| Simulation time | 231809587 ps |
| CPU time | 1.74 seconds |
| Started | Sep 04 05:54:00 AM UTC 24 |
| Finished | Sep 04 05:54:02 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=294984423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_random_length_in_transaction.294984423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_random_length_out_transaction.3817549173 |
| Short name | T1447 |
| Test name | |
| Test status | |
| Simulation time | 217726309 ps |
| CPU time | 1.64 seconds |
| Started | Sep 04 05:54:02 AM UTC 24 |
| Finished | Sep 04 05:54:05 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3817549173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 17.usbdev_random_length_out_transaction.3817549173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_resume_link_active.2068279381 |
| Short name | T1513 |
| Test name | |
| Test status | |
| Simulation time | 20158328190 ps |
| CPU time | 31.99 seconds |
| Started | Sep 04 05:54:02 AM UTC 24 |
| Finished | Sep 04 05:54:35 AM UTC 24 |
| Peak memory | 217148 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2068279381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 17.usbdev_resume_link_active.2068279381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_rx_crc_err.1069958421 |
| Short name | T1448 |
| Test name | |
| Test status | |
| Simulation time | 197209818 ps |
| CPU time | 1.64 seconds |
| Started | Sep 04 05:54:02 AM UTC 24 |
| Finished | Sep 04 05:54:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1069958421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_rx_crc_err.1069958421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_rx_full.2409289779 |
| Short name | T1449 |
| Test name | |
| Test status | |
| Simulation time | 388949332 ps |
| CPU time | 2.16 seconds |
| Started | Sep 04 05:54:02 AM UTC 24 |
| Finished | Sep 04 05:54:05 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2409289779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 17.usbdev_rx_full.2409289779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_setup_stage.4005280087 |
| Short name | T1451 |
| Test name | |
| Test status | |
| Simulation time | 163526558 ps |
| CPU time | 1.36 seconds |
| Started | Sep 04 05:54:04 AM UTC 24 |
| Finished | Sep 04 05:54:06 AM UTC 24 |
| Peak memory | 214912 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4005280087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_setup_stage.4005280087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_setup_trans_ignored.361354491 |
| Short name | T1454 |
| Test name | |
| Test status | |
| Simulation time | 165485547 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 05:54:04 AM UTC 24 |
| Finished | Sep 04 05:54:06 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=361354491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 17.usbdev_setup_trans_ignored.361354491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_smoke.760613951 |
| Short name | T1456 |
| Test name | |
| Test status | |
| Simulation time | 241941756 ps |
| CPU time | 1.92 seconds |
| Started | Sep 04 05:54:04 AM UTC 24 |
| Finished | Sep 04 05:54:07 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=760613951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_smoke.760613951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_spurious_pids_ignored.2482545894 |
| Short name | T1511 |
| Test name | |
| Test status | |
| Simulation time | 3732305580 ps |
| CPU time | 29.75 seconds |
| Started | Sep 04 05:54:04 AM UTC 24 |
| Finished | Sep 04 05:54:35 AM UTC 24 |
| Peak memory | 229640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2482545894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 17.usbdev_spurious_pids_ignored.2482545894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_stall_priority_over_nak.2476187797 |
| Short name | T1452 |
| Test name | |
| Test status | |
| Simulation time | 197877836 ps |
| CPU time | 1.14 seconds |
| Started | Sep 04 05:54:04 AM UTC 24 |
| Finished | Sep 04 05:54:06 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2476187797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_stall_priority_over_nak.2476187797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_stall_trans.1427373978 |
| Short name | T1455 |
| Test name | |
| Test status | |
| Simulation time | 156455731 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 05:54:04 AM UTC 24 |
| Finished | Sep 04 05:54:06 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1427373978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_stall_trans.1427373978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_stream_len_max.3291004337 |
| Short name | T1464 |
| Test name | |
| Test status | |
| Simulation time | 1070110675 ps |
| CPU time | 4.76 seconds |
| Started | Sep 04 05:54:05 AM UTC 24 |
| Finished | Sep 04 05:54:11 AM UTC 24 |
| Peak memory | 217256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3291004337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_stream_len_max.3291004337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_streaming_out.1188570762 |
| Short name | T1602 |
| Test name | |
| Test status | |
| Simulation time | 2861842970 ps |
| CPU time | 81.53 seconds |
| Started | Sep 04 05:54:05 AM UTC 24 |
| Finished | Sep 04 05:55:29 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1188570762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_streaming_out.1188570762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_timeout_missing_host_handshake.4027022227 |
| Short name | T1426 |
| Test name | |
| Test status | |
| Simulation time | 633805228 ps |
| CPU time | 14.18 seconds |
| Started | Sep 04 05:53:37 AM UTC 24 |
| Finished | Sep 04 05:53:52 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4027022227 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_timeout_missing_host_handshake.4027022227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/17.usbdev_tx_rx_disruption.2186995779 |
| Short name | T1460 |
| Test name | |
| Test status | |
| Simulation time | 658191733 ps |
| CPU time | 2.02 seconds |
| Started | Sep 04 05:54:07 AM UTC 24 |
| Finished | Sep 04 05:54:10 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2186995779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_t x_rx_disruption.2186995779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/17.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/170.usbdev_endpoint_types.2645427203 |
| Short name | T3482 |
| Test name | |
| Test status | |
| Simulation time | 423445326 ps |
| CPU time | 1.64 seconds |
| Started | Sep 04 06:08:34 AM UTC 24 |
| Finished | Sep 04 06:09:04 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2645427203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 170.usbdev_endpoint_types.2645427203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/170.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/170.usbdev_tx_rx_disruption.2394392456 |
| Short name | T3487 |
| Test name | |
| Test status | |
| Simulation time | 595684406 ps |
| CPU time | 1.88 seconds |
| Started | Sep 04 06:08:34 AM UTC 24 |
| Finished | Sep 04 06:09:04 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2394392456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 170.usbdev_ tx_rx_disruption.2394392456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/170.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/171.usbdev_endpoint_types.2508522246 |
| Short name | T3458 |
| Test name | |
| Test status | |
| Simulation time | 181507943 ps |
| CPU time | 0.86 seconds |
| Started | Sep 04 06:08:34 AM UTC 24 |
| Finished | Sep 04 06:08:49 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2508522246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 171.usbdev_endpoint_types.2508522246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/171.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/171.usbdev_tx_rx_disruption.272911741 |
| Short name | T3488 |
| Test name | |
| Test status | |
| Simulation time | 556193268 ps |
| CPU time | 1.87 seconds |
| Started | Sep 04 06:08:34 AM UTC 24 |
| Finished | Sep 04 06:09:04 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=272911741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 171.usbdev_t x_rx_disruption.272911741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/171.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/172.usbdev_endpoint_types.883960067 |
| Short name | T371 |
| Test name | |
| Test status | |
| Simulation time | 361944633 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 06:08:34 AM UTC 24 |
| Finished | Sep 04 06:09:04 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=883960067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 172.usbdev_endpoint_types.883960067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/172.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/172.usbdev_tx_rx_disruption.1826595740 |
| Short name | T3489 |
| Test name | |
| Test status | |
| Simulation time | 544691095 ps |
| CPU time | 1.71 seconds |
| Started | Sep 04 06:08:34 AM UTC 24 |
| Finished | Sep 04 06:09:04 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1826595740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 172.usbdev_ tx_rx_disruption.1826595740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/172.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/173.usbdev_tx_rx_disruption.349397778 |
| Short name | T3485 |
| Test name | |
| Test status | |
| Simulation time | 481715884 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 06:08:34 AM UTC 24 |
| Finished | Sep 04 06:09:04 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=349397778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 173.usbdev_t x_rx_disruption.349397778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/173.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/174.usbdev_endpoint_types.2174865000 |
| Short name | T3464 |
| Test name | |
| Test status | |
| Simulation time | 381280753 ps |
| CPU time | 1.16 seconds |
| Started | Sep 04 06:08:34 AM UTC 24 |
| Finished | Sep 04 06:08:52 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2174865000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 174.usbdev_endpoint_types.2174865000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/174.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/174.usbdev_tx_rx_disruption.2234273905 |
| Short name | T3466 |
| Test name | |
| Test status | |
| Simulation time | 474721722 ps |
| CPU time | 1.35 seconds |
| Started | Sep 04 06:08:34 AM UTC 24 |
| Finished | Sep 04 06:08:53 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2234273905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 174.usbdev_ tx_rx_disruption.2234273905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/174.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/175.usbdev_endpoint_types.3745524080 |
| Short name | T376 |
| Test name | |
| Test status | |
| Simulation time | 511962842 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 06:08:34 AM UTC 24 |
| Finished | Sep 04 06:08:53 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3745524080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 175.usbdev_endpoint_types.3745524080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/175.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/175.usbdev_tx_rx_disruption.2571944851 |
| Short name | T3468 |
| Test name | |
| Test status | |
| Simulation time | 488436305 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 06:08:34 AM UTC 24 |
| Finished | Sep 04 06:08:53 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2571944851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 175.usbdev_ tx_rx_disruption.2571944851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/175.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/176.usbdev_endpoint_types.2110043846 |
| Short name | T3463 |
| Test name | |
| Test status | |
| Simulation time | 257459699 ps |
| CPU time | 0.97 seconds |
| Started | Sep 04 06:08:34 AM UTC 24 |
| Finished | Sep 04 06:08:52 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2110043846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 176.usbdev_endpoint_types.2110043846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/176.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/176.usbdev_tx_rx_disruption.2998810086 |
| Short name | T3467 |
| Test name | |
| Test status | |
| Simulation time | 428457610 ps |
| CPU time | 1.26 seconds |
| Started | Sep 04 06:08:34 AM UTC 24 |
| Finished | Sep 04 06:08:53 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2998810086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 176.usbdev_ tx_rx_disruption.2998810086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/176.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/177.usbdev_endpoint_types.3738099411 |
| Short name | T3472 |
| Test name | |
| Test status | |
| Simulation time | 331626970 ps |
| CPU time | 1.12 seconds |
| Started | Sep 04 06:08:34 AM UTC 24 |
| Finished | Sep 04 06:09:03 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3738099411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 177.usbdev_endpoint_types.3738099411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/177.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/177.usbdev_tx_rx_disruption.2031059921 |
| Short name | T3492 |
| Test name | |
| Test status | |
| Simulation time | 647443015 ps |
| CPU time | 1.98 seconds |
| Started | Sep 04 06:08:34 AM UTC 24 |
| Finished | Sep 04 06:09:05 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2031059921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 177.usbdev_ tx_rx_disruption.2031059921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/177.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/178.usbdev_endpoint_types.2360258920 |
| Short name | T3491 |
| Test name | |
| Test status | |
| Simulation time | 404591263 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 06:08:34 AM UTC 24 |
| Finished | Sep 04 06:09:04 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2360258920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 178.usbdev_endpoint_types.2360258920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/178.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/178.usbdev_tx_rx_disruption.885507829 |
| Short name | T3490 |
| Test name | |
| Test status | |
| Simulation time | 470825353 ps |
| CPU time | 1.57 seconds |
| Started | Sep 04 06:08:35 AM UTC 24 |
| Finished | Sep 04 06:09:04 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=885507829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 178.usbdev_t x_rx_disruption.885507829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/178.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/179.usbdev_endpoint_types.1973785196 |
| Short name | T3538 |
| Test name | |
| Test status | |
| Simulation time | 170983856 ps |
| CPU time | 0.86 seconds |
| Started | Sep 04 06:08:35 AM UTC 24 |
| Finished | Sep 04 06:09:34 AM UTC 24 |
| Peak memory | 218364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1973785196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 179.usbdev_endpoint_types.1973785196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/179.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/179.usbdev_tx_rx_disruption.1720840182 |
| Short name | T3441 |
| Test name | |
| Test status | |
| Simulation time | 515652930 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 06:08:36 AM UTC 24 |
| Finished | Sep 04 06:08:39 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1720840182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 179.usbdev_ tx_rx_disruption.1720840182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/179.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_alert_test.2256962082 |
| Short name | T1515 |
| Test name | |
| Test status | |
| Simulation time | 49465495 ps |
| CPU time | 1.09 seconds |
| Started | Sep 04 05:54:34 AM UTC 24 |
| Finished | Sep 04 05:54:36 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2256962082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 18.usbdev_alert_test.2256962082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_disconnect.2374088310 |
| Short name | T1522 |
| Test name | |
| Test status | |
| Simulation time | 12042496306 ps |
| CPU time | 32.1 seconds |
| Started | Sep 04 05:54:07 AM UTC 24 |
| Finished | Sep 04 05:54:40 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2374088310 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_disconnect.2374088310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_reset.3816403976 |
| Short name | T1501 |
| Test name | |
| Test status | |
| Simulation time | 15714903684 ps |
| CPU time | 20.55 seconds |
| Started | Sep 04 05:54:08 AM UTC 24 |
| Finished | Sep 04 05:54:30 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3816403976 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_reset.3816403976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_resume.3900280089 |
| Short name | T1517 |
| Test name | |
| Test status | |
| Simulation time | 23713743929 ps |
| CPU time | 28.87 seconds |
| Started | Sep 04 05:54:08 AM UTC 24 |
| Finished | Sep 04 05:54:38 AM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3900280089 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_resume.3900280089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_av_buffer.3742010763 |
| Short name | T1461 |
| Test name | |
| Test status | |
| Simulation time | 174994449 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 05:54:08 AM UTC 24 |
| Finished | Sep 04 05:54:10 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3742010763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_av_buffer.3742010763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_bitstuff_err.2281140760 |
| Short name | T1462 |
| Test name | |
| Test status | |
| Simulation time | 189655759 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 05:54:08 AM UTC 24 |
| Finished | Sep 04 05:54:11 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2281140760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_bitstuff_err.2281140760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_data_toggle_clear.1095098625 |
| Short name | T1467 |
| Test name | |
| Test status | |
| Simulation time | 360407959 ps |
| CPU time | 2.41 seconds |
| Started | Sep 04 05:54:09 AM UTC 24 |
| Finished | Sep 04 05:54:13 AM UTC 24 |
| Peak memory | 217036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1095098625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 18.usbdev_data_toggle_clear.1095098625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_data_toggle_restore.1808825291 |
| Short name | T1466 |
| Test name | |
| Test status | |
| Simulation time | 343860540 ps |
| CPU time | 2.05 seconds |
| Started | Sep 04 05:54:09 AM UTC 24 |
| Finished | Sep 04 05:54:12 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1808825291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_data_toggle_restore.1808825291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_device_timeout.4002221189 |
| Short name | T1529 |
| Test name | |
| Test status | |
| Simulation time | 5668276862 ps |
| CPU time | 32.72 seconds |
| Started | Sep 04 05:54:11 AM UTC 24 |
| Finished | Sep 04 05:54:45 AM UTC 24 |
| Peak memory | 217432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4002221189 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_device_timeout.4002221189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_disable_endpoint.3014608183 |
| Short name | T1471 |
| Test name | |
| Test status | |
| Simulation time | 810420147 ps |
| CPU time | 3.52 seconds |
| Started | Sep 04 05:54:11 AM UTC 24 |
| Finished | Sep 04 05:54:16 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3014608183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 18.usbdev_disable_endpoint.3014608183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_disconnected.2222470944 |
| Short name | T1468 |
| Test name | |
| Test status | |
| Simulation time | 137585097 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 05:54:11 AM UTC 24 |
| Finished | Sep 04 05:54:14 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2222470944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_disconnected.2222470944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_enable.867466801 |
| Short name | T1470 |
| Test name | |
| Test status | |
| Simulation time | 49730661 ps |
| CPU time | 1.12 seconds |
| Started | Sep 04 05:54:13 AM UTC 24 |
| Finished | Sep 04 05:54:15 AM UTC 24 |
| Peak memory | 214840 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=867466801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_enable.867466801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_endpoint_access.3097479241 |
| Short name | T1479 |
| Test name | |
| Test status | |
| Simulation time | 998150573 ps |
| CPU time | 4.22 seconds |
| Started | Sep 04 05:54:13 AM UTC 24 |
| Finished | Sep 04 05:54:18 AM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3097479241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_endpoint_access.3097479241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_endpoint_types.1489792337 |
| Short name | T403 |
| Test name | |
| Test status | |
| Simulation time | 418262550 ps |
| CPU time | 2.02 seconds |
| Started | Sep 04 05:54:13 AM UTC 24 |
| Finished | Sep 04 05:54:16 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1489792337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_endpoint_types.1489792337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_fifo_levels.3667984 |
| Short name | T1472 |
| Test name | |
| Test status | |
| Simulation time | 167406472 ps |
| CPU time | 1.55 seconds |
| Started | Sep 04 05:54:13 AM UTC 24 |
| Finished | Sep 04 05:54:16 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3667984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_fifo_levels.3667984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_fifo_rst.4248763352 |
| Short name | T1476 |
| Test name | |
| Test status | |
| Simulation time | 352884372 ps |
| CPU time | 2.52 seconds |
| Started | Sep 04 05:54:15 AM UTC 24 |
| Finished | Sep 04 05:54:18 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4248763352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_fifo_rst.4248763352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_in_iso.387540324 |
| Short name | T1475 |
| Test name | |
| Test status | |
| Simulation time | 256823451 ps |
| CPU time | 2.05 seconds |
| Started | Sep 04 05:54:15 AM UTC 24 |
| Finished | Sep 04 05:54:18 AM UTC 24 |
| Peak memory | 227412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=387540324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 18.usbdev_in_iso.387540324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_in_stall.3871528821 |
| Short name | T1478 |
| Test name | |
| Test status | |
| Simulation time | 160777340 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 05:54:16 AM UTC 24 |
| Finished | Sep 04 05:54:18 AM UTC 24 |
| Peak memory | 216160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3871528821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_in_stall.3871528821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_in_trans.2165427303 |
| Short name | T1477 |
| Test name | |
| Test status | |
| Simulation time | 272232542 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 05:54:16 AM UTC 24 |
| Finished | Sep 04 05:54:18 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2165427303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_in_trans.2165427303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_invalid_sync.1537176976 |
| Short name | T1518 |
| Test name | |
| Test status | |
| Simulation time | 2393299158 ps |
| CPU time | 22.61 seconds |
| Started | Sep 04 05:54:15 AM UTC 24 |
| Finished | Sep 04 05:54:38 AM UTC 24 |
| Peak memory | 234196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1537176976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 18.usbdev_invalid_sync.1537176976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_iso_retraction.1596746493 |
| Short name | T1601 |
| Test name | |
| Test status | |
| Simulation time | 10037104190 ps |
| CPU time | 69.37 seconds |
| Started | Sep 04 05:54:17 AM UTC 24 |
| Finished | Sep 04 05:55:28 AM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1596746493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_iso_retraction.1596746493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_link_in_err.71873664 |
| Short name | T1481 |
| Test name | |
| Test status | |
| Simulation time | 215291811 ps |
| CPU time | 1.7 seconds |
| Started | Sep 04 05:54:17 AM UTC 24 |
| Finished | Sep 04 05:54:20 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=71873664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_link_in_err.71873664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_link_resume.1844888379 |
| Short name | T1560 |
| Test name | |
| Test status | |
| Simulation time | 22069201752 ps |
| CPU time | 44.13 seconds |
| Started | Sep 04 05:54:17 AM UTC 24 |
| Finished | Sep 04 05:55:03 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1844888379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_link_resume.1844888379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_link_suspend.3416943584 |
| Short name | T1505 |
| Test name | |
| Test status | |
| Simulation time | 8385499101 ps |
| CPU time | 12.86 seconds |
| Started | Sep 04 05:54:17 AM UTC 24 |
| Finished | Sep 04 05:54:31 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3416943584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_link_suspend.3416943584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_low_speed_traffic.3443010499 |
| Short name | T1651 |
| Test name | |
| Test status | |
| Simulation time | 3656844981 ps |
| CPU time | 95.07 seconds |
| Started | Sep 04 05:54:18 AM UTC 24 |
| Finished | Sep 04 05:55:55 AM UTC 24 |
| Peak memory | 229612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3443010499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_low_speed_traffic.3443010499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_max_inter_pkt_delay.973674780 |
| Short name | T1642 |
| Test name | |
| Test status | |
| Simulation time | 3495246114 ps |
| CPU time | 90.18 seconds |
| Started | Sep 04 05:54:19 AM UTC 24 |
| Finished | Sep 04 05:55:51 AM UTC 24 |
| Peak memory | 227312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=973674780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_inter_pkt_delay.973674780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_max_length_in_transaction.4281477426 |
| Short name | T1484 |
| Test name | |
| Test status | |
| Simulation time | 249457976 ps |
| CPU time | 1.76 seconds |
| Started | Sep 04 05:54:19 AM UTC 24 |
| Finished | Sep 04 05:54:22 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4281477426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 18.usbdev_max_length_in_transaction.4281477426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_max_length_out_transaction.2442024319 |
| Short name | T1483 |
| Test name | |
| Test status | |
| Simulation time | 198390733 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 05:54:19 AM UTC 24 |
| Finished | Sep 04 05:54:21 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2442024319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 18.usbdev_max_length_out_transaction.2442024319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_max_non_iso_usb_traffic.690052024 |
| Short name | T1608 |
| Test name | |
| Test status | |
| Simulation time | 2694465339 ps |
| CPU time | 70.87 seconds |
| Started | Sep 04 05:54:19 AM UTC 24 |
| Finished | Sep 04 05:55:32 AM UTC 24 |
| Peak memory | 234252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=690052024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_non_iso_usb_traffic.690052024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_min_inter_pkt_delay.970270789 |
| Short name | T1531 |
| Test name | |
| Test status | |
| Simulation time | 2642317317 ps |
| CPU time | 24.74 seconds |
| Started | Sep 04 05:54:20 AM UTC 24 |
| Finished | Sep 04 05:54:46 AM UTC 24 |
| Peak memory | 229524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=970270789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_min_inter_pkt_delay.970270789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_min_length_in_transaction.1271154448 |
| Short name | T1486 |
| Test name | |
| Test status | |
| Simulation time | 149058506 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:54:20 AM UTC 24 |
| Finished | Sep 04 05:54:23 AM UTC 24 |
| Peak memory | 214972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1271154448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 18.usbdev_min_length_in_transaction.1271154448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_min_length_out_transaction.2768850009 |
| Short name | T1488 |
| Test name | |
| Test status | |
| Simulation time | 192727072 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 05:54:21 AM UTC 24 |
| Finished | Sep 04 05:54:24 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2768850009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 18.usbdev_min_length_out_transaction.2768850009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_nak_trans.3525207090 |
| Short name | T128 |
| Test name | |
| Test status | |
| Simulation time | 213641119 ps |
| CPU time | 1.66 seconds |
| Started | Sep 04 05:54:21 AM UTC 24 |
| Finished | Sep 04 05:54:24 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3525207090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_nak_trans.3525207090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_out_iso.2546730762 |
| Short name | T1491 |
| Test name | |
| Test status | |
| Simulation time | 174294670 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 05:54:23 AM UTC 24 |
| Finished | Sep 04 05:54:25 AM UTC 24 |
| Peak memory | 214992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2546730762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 18.usbdev_out_iso.2546730762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_out_stall.4173222411 |
| Short name | T1489 |
| Test name | |
| Test status | |
| Simulation time | 191062694 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 05:54:23 AM UTC 24 |
| Finished | Sep 04 05:54:25 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4173222411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_out_stall.4173222411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_out_trans_nak.446499473 |
| Short name | T1492 |
| Test name | |
| Test status | |
| Simulation time | 197532292 ps |
| CPU time | 1.57 seconds |
| Started | Sep 04 05:54:23 AM UTC 24 |
| Finished | Sep 04 05:54:26 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=446499473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_out_trans_nak.446499473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_pending_in_trans.1128623654 |
| Short name | T1490 |
| Test name | |
| Test status | |
| Simulation time | 149028471 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:54:23 AM UTC 24 |
| Finished | Sep 04 05:54:25 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1128623654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 18.usbdev_pending_in_trans.1128623654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_phy_config_pinflip.1379513250 |
| Short name | T1495 |
| Test name | |
| Test status | |
| Simulation time | 247226758 ps |
| CPU time | 1.94 seconds |
| Started | Sep 04 05:54:24 AM UTC 24 |
| Finished | Sep 04 05:54:27 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1379513250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 18.usbdev_phy_config_pinflip.1379513250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_phy_config_usb_ref_disable.1330068477 |
| Short name | T1493 |
| Test name | |
| Test status | |
| Simulation time | 156809418 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 05:54:24 AM UTC 24 |
| Finished | Sep 04 05:54:27 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1330068477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 18.usbdev_phy_config_usb_ref_disable.1330068477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_phy_pins_sense.439136239 |
| Short name | T1496 |
| Test name | |
| Test status | |
| Simulation time | 110712452 ps |
| CPU time | 1.19 seconds |
| Started | Sep 04 05:54:25 AM UTC 24 |
| Finished | Sep 04 05:54:28 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=439136239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 18.usbdev_phy_pins_sense.439136239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_buffer.2962771652 |
| Short name | T1558 |
| Test name | |
| Test status | |
| Simulation time | 14673977755 ps |
| CPU time | 34.13 seconds |
| Started | Sep 04 05:54:27 AM UTC 24 |
| Finished | Sep 04 05:55:02 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2962771652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_pkt_buffer.2962771652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_received.187029282 |
| Short name | T1499 |
| Test name | |
| Test status | |
| Simulation time | 164959993 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 05:54:27 AM UTC 24 |
| Finished | Sep 04 05:54:29 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=187029282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_pkt_received.187029282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_sent.3131463033 |
| Short name | T1498 |
| Test name | |
| Test status | |
| Simulation time | 167895402 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:54:27 AM UTC 24 |
| Finished | Sep 04 05:54:29 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3131463033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_pkt_sent.3131463033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_random_length_in_transaction.3173125003 |
| Short name | T1500 |
| Test name | |
| Test status | |
| Simulation time | 203462328 ps |
| CPU time | 1.55 seconds |
| Started | Sep 04 05:54:27 AM UTC 24 |
| Finished | Sep 04 05:54:29 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3173125003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 18.usbdev_random_length_in_transaction.3173125003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_random_length_out_transaction.19275339 |
| Short name | T1503 |
| Test name | |
| Test status | |
| Simulation time | 155696480 ps |
| CPU time | 1.37 seconds |
| Started | Sep 04 05:54:28 AM UTC 24 |
| Finished | Sep 04 05:54:30 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=19275339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transa ction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 18.usbdev_random_length_out_transaction.19275339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_resume_link_active.2622315081 |
| Short name | T1551 |
| Test name | |
| Test status | |
| Simulation time | 20158292023 ps |
| CPU time | 29.02 seconds |
| Started | Sep 04 05:54:28 AM UTC 24 |
| Finished | Sep 04 05:54:58 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2622315081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 18.usbdev_resume_link_active.2622315081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_rx_crc_err.501222969 |
| Short name | T1502 |
| Test name | |
| Test status | |
| Simulation time | 140383611 ps |
| CPU time | 1.22 seconds |
| Started | Sep 04 05:54:28 AM UTC 24 |
| Finished | Sep 04 05:54:30 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=501222969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_rx_crc_err.501222969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_rx_full.3647674424 |
| Short name | T1504 |
| Test name | |
| Test status | |
| Simulation time | 350955755 ps |
| CPU time | 2.17 seconds |
| Started | Sep 04 05:54:28 AM UTC 24 |
| Finished | Sep 04 05:54:31 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3647674424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 18.usbdev_rx_full.3647674424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_setup_stage.3171130301 |
| Short name | T1506 |
| Test name | |
| Test status | |
| Simulation time | 149556559 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 05:54:30 AM UTC 24 |
| Finished | Sep 04 05:54:32 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3171130301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_setup_stage.3171130301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_setup_trans_ignored.1686628750 |
| Short name | T1507 |
| Test name | |
| Test status | |
| Simulation time | 148382433 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:54:30 AM UTC 24 |
| Finished | Sep 04 05:54:32 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1686628750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 18.usbdev_setup_trans_ignored.1686628750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_smoke.2129524216 |
| Short name | T1508 |
| Test name | |
| Test status | |
| Simulation time | 226607926 ps |
| CPU time | 1.74 seconds |
| Started | Sep 04 05:54:30 AM UTC 24 |
| Finished | Sep 04 05:54:33 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2129524216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_smoke.2129524216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_spurious_pids_ignored.2745549823 |
| Short name | T1539 |
| Test name | |
| Test status | |
| Simulation time | 2203350188 ps |
| CPU time | 19.42 seconds |
| Started | Sep 04 05:54:30 AM UTC 24 |
| Finished | Sep 04 05:54:51 AM UTC 24 |
| Peak memory | 229656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2745549823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 18.usbdev_spurious_pids_ignored.2745549823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_stall_priority_over_nak.1873599650 |
| Short name | T1510 |
| Test name | |
| Test status | |
| Simulation time | 200647400 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 05:54:31 AM UTC 24 |
| Finished | Sep 04 05:54:34 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1873599650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_stall_priority_over_nak.1873599650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_stall_trans.1173259341 |
| Short name | T1509 |
| Test name | |
| Test status | |
| Simulation time | 154448290 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:54:31 AM UTC 24 |
| Finished | Sep 04 05:54:34 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1173259341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_stall_trans.1173259341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_stream_len_max.333238757 |
| Short name | T1516 |
| Test name | |
| Test status | |
| Simulation time | 1091729912 ps |
| CPU time | 3.3 seconds |
| Started | Sep 04 05:54:32 AM UTC 24 |
| Finished | Sep 04 05:54:37 AM UTC 24 |
| Peak memory | 217268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=333238757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 18.usbdev_stream_len_max.333238757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_streaming_out.3255073911 |
| Short name | T1636 |
| Test name | |
| Test status | |
| Simulation time | 2661595727 ps |
| CPU time | 72.72 seconds |
| Started | Sep 04 05:54:31 AM UTC 24 |
| Finished | Sep 04 05:55:46 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3255073911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_streaming_out.3255073911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_timeout_missing_host_handshake.1694775238 |
| Short name | T1494 |
| Test name | |
| Test status | |
| Simulation time | 765887281 ps |
| CPU time | 14.58 seconds |
| Started | Sep 04 05:54:11 AM UTC 24 |
| Finished | Sep 04 05:54:27 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1694775238 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_timeout_missing_host_handshake.1694775238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/18.usbdev_tx_rx_disruption.1609576131 |
| Short name | T215 |
| Test name | |
| Test status | |
| Simulation time | 537438822 ps |
| CPU time | 2.09 seconds |
| Started | Sep 04 05:54:32 AM UTC 24 |
| Finished | Sep 04 05:54:36 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1609576131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_t x_rx_disruption.1609576131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/18.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/180.usbdev_endpoint_types.3461275382 |
| Short name | T3439 |
| Test name | |
| Test status | |
| Simulation time | 376700733 ps |
| CPU time | 1.19 seconds |
| Started | Sep 04 06:08:36 AM UTC 24 |
| Finished | Sep 04 06:08:38 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3461275382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 180.usbdev_endpoint_types.3461275382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/180.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/180.usbdev_tx_rx_disruption.17539321 |
| Short name | T3442 |
| Test name | |
| Test status | |
| Simulation time | 478080737 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 06:08:36 AM UTC 24 |
| Finished | Sep 04 06:08:39 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=17539321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 180.usbdev_tx _rx_disruption.17539321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/180.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/181.usbdev_endpoint_types.4191009465 |
| Short name | T3444 |
| Test name | |
| Test status | |
| Simulation time | 583800728 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 06:08:36 AM UTC 24 |
| Finished | Sep 04 06:08:39 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4191009465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 181.usbdev_endpoint_types.4191009465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/181.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/181.usbdev_tx_rx_disruption.3431127111 |
| Short name | T3440 |
| Test name | |
| Test status | |
| Simulation time | 450287102 ps |
| CPU time | 1.28 seconds |
| Started | Sep 04 06:08:36 AM UTC 24 |
| Finished | Sep 04 06:08:39 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3431127111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 181.usbdev_ tx_rx_disruption.3431127111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/181.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/182.usbdev_endpoint_types.3348825475 |
| Short name | T3437 |
| Test name | |
| Test status | |
| Simulation time | 159527749 ps |
| CPU time | 0.78 seconds |
| Started | Sep 04 06:08:36 AM UTC 24 |
| Finished | Sep 04 06:08:38 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3348825475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 182.usbdev_endpoint_types.3348825475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/182.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/182.usbdev_tx_rx_disruption.1389336672 |
| Short name | T3446 |
| Test name | |
| Test status | |
| Simulation time | 587883274 ps |
| CPU time | 1.61 seconds |
| Started | Sep 04 06:08:36 AM UTC 24 |
| Finished | Sep 04 06:08:39 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1389336672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 182.usbdev_ tx_rx_disruption.1389336672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/182.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/183.usbdev_endpoint_types.181340121 |
| Short name | T3438 |
| Test name | |
| Test status | |
| Simulation time | 223034506 ps |
| CPU time | 0.93 seconds |
| Started | Sep 04 06:08:36 AM UTC 24 |
| Finished | Sep 04 06:08:38 AM UTC 24 |
| Peak memory | 214888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=181340121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 183.usbdev_endpoint_types.181340121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/183.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/184.usbdev_endpoint_types.2978804526 |
| Short name | T3443 |
| Test name | |
| Test status | |
| Simulation time | 433767506 ps |
| CPU time | 1.18 seconds |
| Started | Sep 04 06:08:36 AM UTC 24 |
| Finished | Sep 04 06:08:39 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2978804526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 184.usbdev_endpoint_types.2978804526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/184.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/184.usbdev_tx_rx_disruption.1300447701 |
| Short name | T3448 |
| Test name | |
| Test status | |
| Simulation time | 598912213 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 06:08:36 AM UTC 24 |
| Finished | Sep 04 06:08:39 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1300447701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 184.usbdev_ tx_rx_disruption.1300447701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/184.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/185.usbdev_endpoint_types.2923437015 |
| Short name | T3445 |
| Test name | |
| Test status | |
| Simulation time | 516084963 ps |
| CPU time | 1.29 seconds |
| Started | Sep 04 06:08:36 AM UTC 24 |
| Finished | Sep 04 06:08:39 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2923437015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 185.usbdev_endpoint_types.2923437015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/185.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/185.usbdev_tx_rx_disruption.3195722344 |
| Short name | T3450 |
| Test name | |
| Test status | |
| Simulation time | 660063002 ps |
| CPU time | 1.69 seconds |
| Started | Sep 04 06:08:40 AM UTC 24 |
| Finished | Sep 04 06:08:42 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3195722344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 185.usbdev_ tx_rx_disruption.3195722344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/185.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/186.usbdev_endpoint_types.1606662281 |
| Short name | T3452 |
| Test name | |
| Test status | |
| Simulation time | 379379189 ps |
| CPU time | 1.18 seconds |
| Started | Sep 04 06:08:40 AM UTC 24 |
| Finished | Sep 04 06:08:43 AM UTC 24 |
| Peak memory | 214696 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1606662281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 186.usbdev_endpoint_types.1606662281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/186.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/186.usbdev_tx_rx_disruption.463291675 |
| Short name | T3474 |
| Test name | |
| Test status | |
| Simulation time | 559187485 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 06:08:40 AM UTC 24 |
| Finished | Sep 04 06:09:03 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=463291675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 186.usbdev_t x_rx_disruption.463291675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/186.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/187.usbdev_endpoint_types.3222443892 |
| Short name | T3449 |
| Test name | |
| Test status | |
| Simulation time | 303288309 ps |
| CPU time | 0.94 seconds |
| Started | Sep 04 06:08:40 AM UTC 24 |
| Finished | Sep 04 06:08:42 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3222443892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 187.usbdev_endpoint_types.3222443892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/187.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/187.usbdev_tx_rx_disruption.4201997593 |
| Short name | T3477 |
| Test name | |
| Test status | |
| Simulation time | 630487814 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 06:08:40 AM UTC 24 |
| Finished | Sep 04 06:09:03 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4201997593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 187.usbdev_ tx_rx_disruption.4201997593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/187.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/188.usbdev_endpoint_types.27936308 |
| Short name | T3451 |
| Test name | |
| Test status | |
| Simulation time | 391462002 ps |
| CPU time | 1.07 seconds |
| Started | Sep 04 06:08:40 AM UTC 24 |
| Finished | Sep 04 06:08:43 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=27936308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 188.usbdev_endpoint_types.27936308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/188.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/188.usbdev_tx_rx_disruption.2601749276 |
| Short name | T3480 |
| Test name | |
| Test status | |
| Simulation time | 465905962 ps |
| CPU time | 1.69 seconds |
| Started | Sep 04 06:08:40 AM UTC 24 |
| Finished | Sep 04 06:09:04 AM UTC 24 |
| Peak memory | 215640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2601749276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 188.usbdev_ tx_rx_disruption.2601749276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/188.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/189.usbdev_endpoint_types.3138537754 |
| Short name | T399 |
| Test name | |
| Test status | |
| Simulation time | 453966652 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 06:08:40 AM UTC 24 |
| Finished | Sep 04 06:08:49 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3138537754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 189.usbdev_endpoint_types.3138537754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/189.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/189.usbdev_tx_rx_disruption.4244313372 |
| Short name | T3462 |
| Test name | |
| Test status | |
| Simulation time | 545751201 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 06:08:40 AM UTC 24 |
| Finished | Sep 04 06:08:50 AM UTC 24 |
| Peak memory | 214872 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4244313372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 189.usbdev_ tx_rx_disruption.4244313372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/189.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_alert_test.954469592 |
| Short name | T1565 |
| Test name | |
| Test status | |
| Simulation time | 45324565 ps |
| CPU time | 1.07 seconds |
| Started | Sep 04 05:55:04 AM UTC 24 |
| Finished | Sep 04 05:55:06 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=954469592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 19.usbdev_alert_test.954469592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_disconnect.2634935040 |
| Short name | T1528 |
| Test name | |
| Test status | |
| Simulation time | 4696901151 ps |
| CPU time | 10.15 seconds |
| Started | Sep 04 05:54:34 AM UTC 24 |
| Finished | Sep 04 05:54:45 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2634935040 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_disconnect.2634935040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_reset.1204727276 |
| Short name | T1555 |
| Test name | |
| Test status | |
| Simulation time | 15129226372 ps |
| CPU time | 25.64 seconds |
| Started | Sep 04 05:54:35 AM UTC 24 |
| Finished | Sep 04 05:55:02 AM UTC 24 |
| Peak memory | 226680 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1204727276 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_reset.1204727276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_resume.694825727 |
| Short name | T1591 |
| Test name | |
| Test status | |
| Simulation time | 24663742271 ps |
| CPU time | 46.77 seconds |
| Started | Sep 04 05:54:35 AM UTC 24 |
| Finished | Sep 04 05:55:23 AM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=694825727 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_resume.694825727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_av_buffer.2896061004 |
| Short name | T1520 |
| Test name | |
| Test status | |
| Simulation time | 227916451 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 05:54:37 AM UTC 24 |
| Finished | Sep 04 05:54:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2896061004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_av_buffer.2896061004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_bitstuff_err.2668061323 |
| Short name | T1519 |
| Test name | |
| Test status | |
| Simulation time | 156144634 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:54:37 AM UTC 24 |
| Finished | Sep 04 05:54:39 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2668061323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_bitstuff_err.2668061323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_data_toggle_clear.590415959 |
| Short name | T1521 |
| Test name | |
| Test status | |
| Simulation time | 296170517 ps |
| CPU time | 2.03 seconds |
| Started | Sep 04 05:54:37 AM UTC 24 |
| Finished | Sep 04 05:54:40 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=590415959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 19.usbdev_data_toggle_clear.590415959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_data_toggle_restore.2510294436 |
| Short name | T483 |
| Test name | |
| Test status | |
| Simulation time | 1070602485 ps |
| CPU time | 5.56 seconds |
| Started | Sep 04 05:54:37 AM UTC 24 |
| Finished | Sep 04 05:54:43 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2510294436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_data_toggle_restore.2510294436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_device_address.2689189488 |
| Short name | T1597 |
| Test name | |
| Test status | |
| Simulation time | 25651701393 ps |
| CPU time | 48.48 seconds |
| Started | Sep 04 05:54:37 AM UTC 24 |
| Finished | Sep 04 05:55:27 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2689189488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_device_address.2689189488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_device_timeout.2359837227 |
| Short name | T1568 |
| Test name | |
| Test status | |
| Simulation time | 4295838399 ps |
| CPU time | 28.81 seconds |
| Started | Sep 04 05:54:37 AM UTC 24 |
| Finished | Sep 04 05:55:07 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2359837227 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_device_timeout.2359837227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_disable_endpoint.386227604 |
| Short name | T1526 |
| Test name | |
| Test status | |
| Simulation time | 870092246 ps |
| CPU time | 4.18 seconds |
| Started | Sep 04 05:54:39 AM UTC 24 |
| Finished | Sep 04 05:54:44 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=386227604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_disable_endpoint.386227604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_disconnected.2758633821 |
| Short name | T1524 |
| Test name | |
| Test status | |
| Simulation time | 141155279 ps |
| CPU time | 1.36 seconds |
| Started | Sep 04 05:54:39 AM UTC 24 |
| Finished | Sep 04 05:54:41 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2758633821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_disconnected.2758633821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_enable.1463314777 |
| Short name | T1525 |
| Test name | |
| Test status | |
| Simulation time | 90737051 ps |
| CPU time | 1.17 seconds |
| Started | Sep 04 05:54:40 AM UTC 24 |
| Finished | Sep 04 05:54:42 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1463314777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 19.usbdev_enable.1463314777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_endpoint_access.4063288347 |
| Short name | T1527 |
| Test name | |
| Test status | |
| Simulation time | 916112473 ps |
| CPU time | 3.18 seconds |
| Started | Sep 04 05:54:40 AM UTC 24 |
| Finished | Sep 04 05:54:45 AM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4063288347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_endpoint_access.4063288347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_fifo_levels.3227787994 |
| Short name | T555 |
| Test name | |
| Test status | |
| Simulation time | 261326081 ps |
| CPU time | 1.8 seconds |
| Started | Sep 04 05:54:42 AM UTC 24 |
| Finished | Sep 04 05:54:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3227787994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_fifo_levels.3227787994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_fifo_rst.1281772338 |
| Short name | T1534 |
| Test name | |
| Test status | |
| Simulation time | 551513280 ps |
| CPU time | 4.07 seconds |
| Started | Sep 04 05:54:42 AM UTC 24 |
| Finished | Sep 04 05:54:47 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1281772338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_fifo_rst.1281772338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_in_iso.1572919622 |
| Short name | T1530 |
| Test name | |
| Test status | |
| Simulation time | 252201197 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 05:54:43 AM UTC 24 |
| Finished | Sep 04 05:54:45 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1572919622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 19.usbdev_in_iso.1572919622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_in_stall.1503589327 |
| Short name | T1532 |
| Test name | |
| Test status | |
| Simulation time | 152837908 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 05:54:44 AM UTC 24 |
| Finished | Sep 04 05:54:47 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1503589327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_in_stall.1503589327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_in_trans.2599692124 |
| Short name | T1536 |
| Test name | |
| Test status | |
| Simulation time | 188518026 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 05:54:45 AM UTC 24 |
| Finished | Sep 04 05:54:48 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2599692124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_in_trans.2599692124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_invalid_sync.4188707288 |
| Short name | T1701 |
| Test name | |
| Test status | |
| Simulation time | 3222781454 ps |
| CPU time | 92.88 seconds |
| Started | Sep 04 05:54:42 AM UTC 24 |
| Finished | Sep 04 05:56:17 AM UTC 24 |
| Peak memory | 229736 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4188707288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 19.usbdev_invalid_sync.4188707288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_iso_retraction.4161796295 |
| Short name | T1648 |
| Test name | |
| Test status | |
| Simulation time | 7566692092 ps |
| CPU time | 66.03 seconds |
| Started | Sep 04 05:54:45 AM UTC 24 |
| Finished | Sep 04 05:55:53 AM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4161796295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_iso_retraction.4161796295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_link_in_err.934066598 |
| Short name | T1535 |
| Test name | |
| Test status | |
| Simulation time | 259237990 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 05:54:46 AM UTC 24 |
| Finished | Sep 04 05:54:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=934066598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_link_in_err.934066598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_link_resume.2083211512 |
| Short name | T1652 |
| Test name | |
| Test status | |
| Simulation time | 25497253384 ps |
| CPU time | 67.41 seconds |
| Started | Sep 04 05:54:46 AM UTC 24 |
| Finished | Sep 04 05:55:55 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2083211512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_link_resume.2083211512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_link_suspend.833029167 |
| Short name | T1586 |
| Test name | |
| Test status | |
| Simulation time | 10004812697 ps |
| CPU time | 31.08 seconds |
| Started | Sep 04 05:54:47 AM UTC 24 |
| Finished | Sep 04 05:55:19 AM UTC 24 |
| Peak memory | 217008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=833029167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_link_suspend.833029167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_low_speed_traffic.335799898 |
| Short name | T1740 |
| Test name | |
| Test status | |
| Simulation time | 3660991710 ps |
| CPU time | 102.58 seconds |
| Started | Sep 04 05:54:47 AM UTC 24 |
| Finished | Sep 04 05:56:32 AM UTC 24 |
| Peak memory | 229424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=335799898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_low_speed_traffic.335799898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_max_inter_pkt_delay.593970078 |
| Short name | T1570 |
| Test name | |
| Test status | |
| Simulation time | 2620616976 ps |
| CPU time | 19.65 seconds |
| Started | Sep 04 05:54:47 AM UTC 24 |
| Finished | Sep 04 05:55:08 AM UTC 24 |
| Peak memory | 227672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=593970078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_inter_pkt_delay.593970078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_max_length_in_transaction.1043629846 |
| Short name | T1538 |
| Test name | |
| Test status | |
| Simulation time | 251272359 ps |
| CPU time | 1.69 seconds |
| Started | Sep 04 05:54:47 AM UTC 24 |
| Finished | Sep 04 05:54:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1043629846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 19.usbdev_max_length_in_transaction.1043629846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_max_length_out_transaction.3208581330 |
| Short name | T1537 |
| Test name | |
| Test status | |
| Simulation time | 191861110 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 05:54:47 AM UTC 24 |
| Finished | Sep 04 05:54:50 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3208581330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 19.usbdev_max_length_out_transaction.3208581330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_max_non_iso_usb_traffic.92602124 |
| Short name | T1625 |
| Test name | |
| Test status | |
| Simulation time | 1575555596 ps |
| CPU time | 49.91 seconds |
| Started | Sep 04 05:54:49 AM UTC 24 |
| Finished | Sep 04 05:55:41 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=92602124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 19.usbdev_max_non_iso_usb_traffic.92602124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_min_inter_pkt_delay.3251190186 |
| Short name | T1594 |
| Test name | |
| Test status | |
| Simulation time | 3121322274 ps |
| CPU time | 34.85 seconds |
| Started | Sep 04 05:54:49 AM UTC 24 |
| Finished | Sep 04 05:55:26 AM UTC 24 |
| Peak memory | 229668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3251190186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_min_inter_pkt_delay.3251190186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_min_length_in_transaction.2335115714 |
| Short name | T1541 |
| Test name | |
| Test status | |
| Simulation time | 165091825 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 05:54:49 AM UTC 24 |
| Finished | Sep 04 05:54:52 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2335115714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 19.usbdev_min_length_in_transaction.2335115714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_min_length_out_transaction.3012040842 |
| Short name | T1540 |
| Test name | |
| Test status | |
| Simulation time | 139933754 ps |
| CPU time | 1.27 seconds |
| Started | Sep 04 05:54:49 AM UTC 24 |
| Finished | Sep 04 05:54:52 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3012040842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 19.usbdev_min_length_out_transaction.3012040842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_out_iso.2953035338 |
| Short name | T1542 |
| Test name | |
| Test status | |
| Simulation time | 207400844 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 05:54:51 AM UTC 24 |
| Finished | Sep 04 05:54:53 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2953035338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 19.usbdev_out_iso.2953035338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_out_stall.1727110332 |
| Short name | T1543 |
| Test name | |
| Test status | |
| Simulation time | 177331193 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 05:54:52 AM UTC 24 |
| Finished | Sep 04 05:54:54 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1727110332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_out_stall.1727110332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_out_trans_nak.3601107989 |
| Short name | T1545 |
| Test name | |
| Test status | |
| Simulation time | 178490178 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 05:54:53 AM UTC 24 |
| Finished | Sep 04 05:54:55 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3601107989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 19.usbdev_out_trans_nak.3601107989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_pending_in_trans.2049133821 |
| Short name | T1544 |
| Test name | |
| Test status | |
| Simulation time | 152997109 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 05:54:53 AM UTC 24 |
| Finished | Sep 04 05:54:55 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2049133821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 19.usbdev_pending_in_trans.2049133821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_phy_config_pinflip.2884026559 |
| Short name | T1548 |
| Test name | |
| Test status | |
| Simulation time | 199217649 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 05:54:54 AM UTC 24 |
| Finished | Sep 04 05:54:57 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2884026559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 19.usbdev_phy_config_pinflip.2884026559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_phy_config_usb_ref_disable.3627222637 |
| Short name | T1547 |
| Test name | |
| Test status | |
| Simulation time | 152346863 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:54:54 AM UTC 24 |
| Finished | Sep 04 05:54:56 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3627222637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 19.usbdev_phy_config_usb_ref_disable.3627222637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_phy_pins_sense.2819341169 |
| Short name | T1549 |
| Test name | |
| Test status | |
| Simulation time | 34080071 ps |
| CPU time | 1.05 seconds |
| Started | Sep 04 05:54:55 AM UTC 24 |
| Finished | Sep 04 05:54:57 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2819341169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_phy_pins_sense.2819341169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_buffer.704762247 |
| Short name | T1695 |
| Test name | |
| Test status | |
| Simulation time | 22142789875 ps |
| CPU time | 76 seconds |
| Started | Sep 04 05:54:56 AM UTC 24 |
| Finished | Sep 04 05:56:14 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=704762247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_pkt_buffer.704762247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_received.1835323610 |
| Short name | T1552 |
| Test name | |
| Test status | |
| Simulation time | 164241632 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 05:54:56 AM UTC 24 |
| Finished | Sep 04 05:54:59 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1835323610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_pkt_received.1835323610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_sent.2175998780 |
| Short name | T1514 |
| Test name | |
| Test status | |
| Simulation time | 280867358 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 05:54:58 AM UTC 24 |
| Finished | Sep 04 05:55:00 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2175998780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_pkt_sent.2175998780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_random_length_in_transaction.555708363 |
| Short name | T1554 |
| Test name | |
| Test status | |
| Simulation time | 221657320 ps |
| CPU time | 1.64 seconds |
| Started | Sep 04 05:54:58 AM UTC 24 |
| Finished | Sep 04 05:55:00 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=555708363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_random_length_in_transaction.555708363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_random_length_out_transaction.847536641 |
| Short name | T1553 |
| Test name | |
| Test status | |
| Simulation time | 183035541 ps |
| CPU time | 1.15 seconds |
| Started | Sep 04 05:54:58 AM UTC 24 |
| Finished | Sep 04 05:55:00 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=847536641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 19.usbdev_random_length_out_transaction.847536641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_resume_link_active.1732711507 |
| Short name | T1616 |
| Test name | |
| Test status | |
| Simulation time | 20162129055 ps |
| CPU time | 35.07 seconds |
| Started | Sep 04 05:54:58 AM UTC 24 |
| Finished | Sep 04 05:55:34 AM UTC 24 |
| Peak memory | 217148 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1732711507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 19.usbdev_resume_link_active.1732711507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_rx_crc_err.3760650951 |
| Short name | T1556 |
| Test name | |
| Test status | |
| Simulation time | 144302023 ps |
| CPU time | 1.33 seconds |
| Started | Sep 04 05:55:00 AM UTC 24 |
| Finished | Sep 04 05:55:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3760650951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_rx_crc_err.3760650951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_rx_full.1720688319 |
| Short name | T1559 |
| Test name | |
| Test status | |
| Simulation time | 263618426 ps |
| CPU time | 1.87 seconds |
| Started | Sep 04 05:55:00 AM UTC 24 |
| Finished | Sep 04 05:55:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1720688319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 19.usbdev_rx_full.1720688319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_setup_stage.1445660177 |
| Short name | T1557 |
| Test name | |
| Test status | |
| Simulation time | 159599492 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 05:55:00 AM UTC 24 |
| Finished | Sep 04 05:55:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1445660177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_setup_stage.1445660177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_setup_trans_ignored.22435021 |
| Short name | T1561 |
| Test name | |
| Test status | |
| Simulation time | 149725325 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 05:55:01 AM UTC 24 |
| Finished | Sep 04 05:55:03 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=22435021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 19.usbdev_setup_trans_ignored.22435021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_smoke.1948148340 |
| Short name | T1562 |
| Test name | |
| Test status | |
| Simulation time | 207218617 ps |
| CPU time | 1.66 seconds |
| Started | Sep 04 05:55:01 AM UTC 24 |
| Finished | Sep 04 05:55:03 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1948148340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_smoke.1948148340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_spurious_pids_ignored.3557287295 |
| Short name | T1627 |
| Test name | |
| Test status | |
| Simulation time | 3327680499 ps |
| CPU time | 37.52 seconds |
| Started | Sep 04 05:55:02 AM UTC 24 |
| Finished | Sep 04 05:55:41 AM UTC 24 |
| Peak memory | 229608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3557287295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 19.usbdev_spurious_pids_ignored.3557287295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_stall_priority_over_nak.768944570 |
| Short name | T1566 |
| Test name | |
| Test status | |
| Simulation time | 157442062 ps |
| CPU time | 1.35 seconds |
| Started | Sep 04 05:55:04 AM UTC 24 |
| Finished | Sep 04 05:55:06 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=768944570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_stall_priority_over_nak.768944570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_stall_trans.165635048 |
| Short name | T1567 |
| Test name | |
| Test status | |
| Simulation time | 189032978 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 05:55:04 AM UTC 24 |
| Finished | Sep 04 05:55:06 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=165635048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_stall_trans.165635048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_stream_len_max.2958681284 |
| Short name | T1569 |
| Test name | |
| Test status | |
| Simulation time | 703268188 ps |
| CPU time | 2.86 seconds |
| Started | Sep 04 05:55:04 AM UTC 24 |
| Finished | Sep 04 05:55:08 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2958681284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_stream_len_max.2958681284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_streaming_out.3467050451 |
| Short name | T1646 |
| Test name | |
| Test status | |
| Simulation time | 1896088917 ps |
| CPU time | 47.29 seconds |
| Started | Sep 04 05:55:04 AM UTC 24 |
| Finished | Sep 04 05:55:53 AM UTC 24 |
| Peak memory | 234104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3467050451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_streaming_out.3467050451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_timeout_missing_host_handshake.2711302738 |
| Short name | T1598 |
| Test name | |
| Test status | |
| Simulation time | 7699949301 ps |
| CPU time | 48.16 seconds |
| Started | Sep 04 05:54:38 AM UTC 24 |
| Finished | Sep 04 05:55:28 AM UTC 24 |
| Peak memory | 217452 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2711302738 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_timeout_missing_host_handshake.2711302738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/19.usbdev_tx_rx_disruption.1620787954 |
| Short name | T1571 |
| Test name | |
| Test status | |
| Simulation time | 652957992 ps |
| CPU time | 3.34 seconds |
| Started | Sep 04 05:55:04 AM UTC 24 |
| Finished | Sep 04 05:55:08 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1620787954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_t x_rx_disruption.1620787954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/19.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/190.usbdev_endpoint_types.3306151717 |
| Short name | T3473 |
| Test name | |
| Test status | |
| Simulation time | 153546233 ps |
| CPU time | 0.75 seconds |
| Started | Sep 04 06:08:40 AM UTC 24 |
| Finished | Sep 04 06:09:03 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3306151717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 190.usbdev_endpoint_types.3306151717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/190.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/190.usbdev_tx_rx_disruption.2787189407 |
| Short name | T3476 |
| Test name | |
| Test status | |
| Simulation time | 444211235 ps |
| CPU time | 1.32 seconds |
| Started | Sep 04 06:08:40 AM UTC 24 |
| Finished | Sep 04 06:09:03 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2787189407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 190.usbdev_ tx_rx_disruption.2787189407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/190.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/191.usbdev_endpoint_types.2238565730 |
| Short name | T410 |
| Test name | |
| Test status | |
| Simulation time | 223712481 ps |
| CPU time | 0.94 seconds |
| Started | Sep 04 06:08:40 AM UTC 24 |
| Finished | Sep 04 06:09:03 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2238565730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 191.usbdev_endpoint_types.2238565730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/191.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/192.usbdev_endpoint_types.3332749111 |
| Short name | T3455 |
| Test name | |
| Test status | |
| Simulation time | 261034531 ps |
| CPU time | 0.91 seconds |
| Started | Sep 04 06:08:43 AM UTC 24 |
| Finished | Sep 04 06:08:48 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3332749111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 192.usbdev_endpoint_types.3332749111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/192.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/192.usbdev_tx_rx_disruption.3940823526 |
| Short name | T3456 |
| Test name | |
| Test status | |
| Simulation time | 568643624 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 06:08:43 AM UTC 24 |
| Finished | Sep 04 06:08:49 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3940823526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 192.usbdev_ tx_rx_disruption.3940823526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/192.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/193.usbdev_endpoint_types.1980462721 |
| Short name | T3465 |
| Test name | |
| Test status | |
| Simulation time | 337737739 ps |
| CPU time | 1.03 seconds |
| Started | Sep 04 06:08:44 AM UTC 24 |
| Finished | Sep 04 06:08:53 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1980462721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 193.usbdev_endpoint_types.1980462721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/193.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/193.usbdev_tx_rx_disruption.371368036 |
| Short name | T3457 |
| Test name | |
| Test status | |
| Simulation time | 489634655 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 06:08:46 AM UTC 24 |
| Finished | Sep 04 06:08:49 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=371368036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 193.usbdev_t x_rx_disruption.371368036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/193.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/194.usbdev_endpoint_types.3339115417 |
| Short name | T3524 |
| Test name | |
| Test status | |
| Simulation time | 504488539 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 06:08:48 AM UTC 24 |
| Finished | Sep 04 06:09:30 AM UTC 24 |
| Peak memory | 215084 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3339115417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 194.usbdev_endpoint_types.3339115417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/194.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/194.usbdev_tx_rx_disruption.864273292 |
| Short name | T3551 |
| Test name | |
| Test status | |
| Simulation time | 530578174 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 06:08:49 AM UTC 24 |
| Finished | Sep 04 06:09:35 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=864273292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 194.usbdev_t x_rx_disruption.864273292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/194.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/195.usbdev_endpoint_types.1501452648 |
| Short name | T312 |
| Test name | |
| Test status | |
| Simulation time | 470967657 ps |
| CPU time | 1.31 seconds |
| Started | Sep 04 06:08:50 AM UTC 24 |
| Finished | Sep 04 06:09:03 AM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1501452648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 195.usbdev_endpoint_types.1501452648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/195.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/195.usbdev_tx_rx_disruption.4165468800 |
| Short name | T3484 |
| Test name | |
| Test status | |
| Simulation time | 488659691 ps |
| CPU time | 1.66 seconds |
| Started | Sep 04 06:08:50 AM UTC 24 |
| Finished | Sep 04 06:09:04 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4165468800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 195.usbdev_ tx_rx_disruption.4165468800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/195.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/196.usbdev_tx_rx_disruption.2184421440 |
| Short name | T3483 |
| Test name | |
| Test status | |
| Simulation time | 611429349 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 06:08:50 AM UTC 24 |
| Finished | Sep 04 06:09:04 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2184421440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 196.usbdev_ tx_rx_disruption.2184421440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/196.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/197.usbdev_endpoint_types.2444352514 |
| Short name | T3479 |
| Test name | |
| Test status | |
| Simulation time | 337970985 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 06:08:50 AM UTC 24 |
| Finished | Sep 04 06:09:04 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2444352514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 197.usbdev_endpoint_types.2444352514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/197.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/197.usbdev_tx_rx_disruption.3651947078 |
| Short name | T3486 |
| Test name | |
| Test status | |
| Simulation time | 596544246 ps |
| CPU time | 1.74 seconds |
| Started | Sep 04 06:08:50 AM UTC 24 |
| Finished | Sep 04 06:09:04 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3651947078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 197.usbdev_ tx_rx_disruption.3651947078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/197.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/198.usbdev_tx_rx_disruption.1663894181 |
| Short name | T3481 |
| Test name | |
| Test status | |
| Simulation time | 517230470 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 06:08:50 AM UTC 24 |
| Finished | Sep 04 06:09:04 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1663894181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 198.usbdev_ tx_rx_disruption.1663894181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/198.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/199.usbdev_endpoint_types.3175689317 |
| Short name | T3469 |
| Test name | |
| Test status | |
| Simulation time | 210257572 ps |
| CPU time | 0.86 seconds |
| Started | Sep 04 06:08:53 AM UTC 24 |
| Finished | Sep 04 06:08:58 AM UTC 24 |
| Peak memory | 214848 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3175689317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 199.usbdev_endpoint_types.3175689317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/199.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/199.usbdev_tx_rx_disruption.2353548155 |
| Short name | T3471 |
| Test name | |
| Test status | |
| Simulation time | 483460139 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 06:08:53 AM UTC 24 |
| Finished | Sep 04 06:08:59 AM UTC 24 |
| Peak memory | 214904 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2353548155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 199.usbdev_ tx_rx_disruption.2353548155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/199.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_alert_test.3489980199 |
| Short name | T203 |
| Test name | |
| Test status | |
| Simulation time | 43562200 ps |
| CPU time | 0.99 seconds |
| Started | Sep 04 05:43:38 AM UTC 24 |
| Finished | Sep 04 05:43:40 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3489980199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 2.usbdev_alert_test.3489980199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_disconnect.3072419829 |
| Short name | T12 |
| Test name | |
| Test status | |
| Simulation time | 10154899030 ps |
| CPU time | 25.43 seconds |
| Started | Sep 04 05:42:04 AM UTC 24 |
| Finished | Sep 04 05:42:31 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3072419829 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_disconnect.3072419829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_reset.891343241 |
| Short name | T13 |
| Test name | |
| Test status | |
| Simulation time | 16116274232 ps |
| CPU time | 39.29 seconds |
| Started | Sep 04 05:42:04 AM UTC 24 |
| Finished | Sep 04 05:42:45 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=891343241 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_reset.891343241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_resume.2065169300 |
| Short name | T14 |
| Test name | |
| Test status | |
| Simulation time | 30499279074 ps |
| CPU time | 81.26 seconds |
| Started | Sep 04 05:42:05 AM UTC 24 |
| Finished | Sep 04 05:43:28 AM UTC 24 |
| Peak memory | 217376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2065169300 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_resume.2065169300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_av_buffer.1135010423 |
| Short name | T611 |
| Test name | |
| Test status | |
| Simulation time | 156495494 ps |
| CPU time | 1.37 seconds |
| Started | Sep 04 05:42:06 AM UTC 24 |
| Finished | Sep 04 05:42:08 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1135010423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_av_buffer.1135010423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_av_empty.591302751 |
| Short name | T57 |
| Test name | |
| Test status | |
| Simulation time | 146013692 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 05:42:06 AM UTC 24 |
| Finished | Sep 04 05:42:08 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=591302751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 2.usbdev_av_empty.591302751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_bitstuff_err.3563779481 |
| Short name | T81 |
| Test name | |
| Test status | |
| Simulation time | 151025229 ps |
| CPU time | 1.35 seconds |
| Started | Sep 04 05:42:09 AM UTC 24 |
| Finished | Sep 04 05:42:12 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3563779481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_bitstuff_err.3563779481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_data_toggle_clear.3597271245 |
| Short name | T249 |
| Test name | |
| Test status | |
| Simulation time | 199252998 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 05:42:12 AM UTC 24 |
| Finished | Sep 04 05:42:14 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3597271245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 2.usbdev_data_toggle_clear.3597271245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_data_toggle_restore.1537156547 |
| Short name | T109 |
| Test name | |
| Test status | |
| Simulation time | 267781220 ps |
| CPU time | 1.76 seconds |
| Started | Sep 04 05:42:13 AM UTC 24 |
| Finished | Sep 04 05:42:15 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1537156547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_data_toggle_restore.1537156547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_device_address.2515689193 |
| Short name | T112 |
| Test name | |
| Test status | |
| Simulation time | 28408059288 ps |
| CPU time | 43.7 seconds |
| Started | Sep 04 05:42:13 AM UTC 24 |
| Finished | Sep 04 05:42:58 AM UTC 24 |
| Peak memory | 217356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2515689193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_device_address.2515689193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_device_timeout.3535725975 |
| Short name | T624 |
| Test name | |
| Test status | |
| Simulation time | 3865772646 ps |
| CPU time | 44.95 seconds |
| Started | Sep 04 05:42:15 AM UTC 24 |
| Finished | Sep 04 05:43:02 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3535725975 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_device_timeout.3535725975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_disable_endpoint.1449963432 |
| Short name | T251 |
| Test name | |
| Test status | |
| Simulation time | 795447049 ps |
| CPU time | 3.48 seconds |
| Started | Sep 04 05:42:15 AM UTC 24 |
| Finished | Sep 04 05:42:20 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1449963432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 2.usbdev_disable_endpoint.1449963432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_disconnected.2095122617 |
| Short name | T64 |
| Test name | |
| Test status | |
| Simulation time | 141039960 ps |
| CPU time | 1.32 seconds |
| Started | Sep 04 05:42:16 AM UTC 24 |
| Finished | Sep 04 05:42:19 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2095122617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_disconnected.2095122617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_enable.1622622085 |
| Short name | T250 |
| Test name | |
| Test status | |
| Simulation time | 62316701 ps |
| CPU time | 1.09 seconds |
| Started | Sep 04 05:42:18 AM UTC 24 |
| Finished | Sep 04 05:42:20 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1622622085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 2.usbdev_enable.1622622085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_endpoint_access.3584217000 |
| Short name | T613 |
| Test name | |
| Test status | |
| Simulation time | 855038250 ps |
| CPU time | 3.89 seconds |
| Started | Sep 04 05:42:20 AM UTC 24 |
| Finished | Sep 04 05:42:24 AM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3584217000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_endpoint_access.3584217000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_endpoint_types.4182391846 |
| Short name | T361 |
| Test name | |
| Test status | |
| Simulation time | 252305470 ps |
| CPU time | 1.77 seconds |
| Started | Sep 04 05:42:21 AM UTC 24 |
| Finished | Sep 04 05:42:23 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4182391846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_endpoint_types.4182391846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_fifo_levels.2391187937 |
| Short name | T612 |
| Test name | |
| Test status | |
| Simulation time | 247929942 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 05:42:21 AM UTC 24 |
| Finished | Sep 04 05:42:23 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2391187937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_fifo_levels.2391187937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_fifo_rst.4169945088 |
| Short name | T608 |
| Test name | |
| Test status | |
| Simulation time | 280578452 ps |
| CPU time | 2.78 seconds |
| Started | Sep 04 05:42:22 AM UTC 24 |
| Finished | Sep 04 05:42:26 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4169945088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_fifo_rst.4169945088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_freq_hiclk.1861137003 |
| Short name | T709 |
| Test name | |
| Test status | |
| Simulation time | 101220362084 ps |
| CPU time | 156.68 seconds |
| Started | Sep 04 05:42:23 AM UTC 24 |
| Finished | Sep 04 05:45:03 AM UTC 24 |
| Peak memory | 217448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1861137003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_hiclk.1861137003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_freq_hiclk_max.368472439 |
| Short name | T718 |
| Test name | |
| Test status | |
| Simulation time | 84137944365 ps |
| CPU time | 168.1 seconds |
| Started | Sep 04 05:42:24 AM UTC 24 |
| Finished | Sep 04 05:45:15 AM UTC 24 |
| Peak memory | 217452 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=368472439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 2.usbdev_freq_hiclk_max.368472439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_freq_loclk.2762163298 |
| Short name | T765 |
| Test name | |
| Test status | |
| Simulation time | 100174383999 ps |
| CPU time | 229.46 seconds |
| Started | Sep 04 05:42:24 AM UTC 24 |
| Finished | Sep 04 05:46:17 AM UTC 24 |
| Peak memory | 220152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2762163298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_loclk.2762163298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_freq_loclk_max.579375027 |
| Short name | T833 |
| Test name | |
| Test status | |
| Simulation time | 120972338495 ps |
| CPU time | 285.52 seconds |
| Started | Sep 04 05:42:25 AM UTC 24 |
| Finished | Sep 04 05:47:15 AM UTC 24 |
| Peak memory | 220136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=579375027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 2.usbdev_freq_loclk_max.579375027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_freq_phase.4081024337 |
| Short name | T785 |
| Test name | |
| Test status | |
| Simulation time | 100175509357 ps |
| CPU time | 244.7 seconds |
| Started | Sep 04 05:42:26 AM UTC 24 |
| Finished | Sep 04 05:46:35 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4081024337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 2.usbdev_freq_phase.4081024337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_in_iso.3217953035 |
| Short name | T616 |
| Test name | |
| Test status | |
| Simulation time | 211518685 ps |
| CPU time | 1.93 seconds |
| Started | Sep 04 05:42:32 AM UTC 24 |
| Finished | Sep 04 05:42:35 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3217953035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_in_iso.3217953035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_in_stall.4104192935 |
| Short name | T615 |
| Test name | |
| Test status | |
| Simulation time | 183178744 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 05:42:32 AM UTC 24 |
| Finished | Sep 04 05:42:34 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4104192935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_in_stall.4104192935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_in_trans.1657024684 |
| Short name | T617 |
| Test name | |
| Test status | |
| Simulation time | 238403813 ps |
| CPU time | 1.79 seconds |
| Started | Sep 04 05:42:33 AM UTC 24 |
| Finished | Sep 04 05:42:36 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1657024684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_in_trans.1657024684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_invalid_sync.1012926875 |
| Short name | T454 |
| Test name | |
| Test status | |
| Simulation time | 5354665141 ps |
| CPU time | 169.29 seconds |
| Started | Sep 04 05:42:31 AM UTC 24 |
| Finished | Sep 04 05:45:23 AM UTC 24 |
| Peak memory | 229584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1012926875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 2.usbdev_invalid_sync.1012926875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_iso_retraction.2533963473 |
| Short name | T662 |
| Test name | |
| Test status | |
| Simulation time | 8974691189 ps |
| CPU time | 97.71 seconds |
| Started | Sep 04 05:42:35 AM UTC 24 |
| Finished | Sep 04 05:44:15 AM UTC 24 |
| Peak memory | 217384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2533963473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_iso_retraction.2533963473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_link_in_err.1075663492 |
| Short name | T618 |
| Test name | |
| Test status | |
| Simulation time | 201809309 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 05:42:36 AM UTC 24 |
| Finished | Sep 04 05:42:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1075663492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_link_in_err.1075663492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_link_resume.3615064896 |
| Short name | T68 |
| Test name | |
| Test status | |
| Simulation time | 30467476826 ps |
| CPU time | 82.69 seconds |
| Started | Sep 04 05:42:37 AM UTC 24 |
| Finished | Sep 04 05:44:02 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3615064896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_link_resume.3615064896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_link_suspend.3997422020 |
| Short name | T102 |
| Test name | |
| Test status | |
| Simulation time | 3838998733 ps |
| CPU time | 10.91 seconds |
| Started | Sep 04 05:42:39 AM UTC 24 |
| Finished | Sep 04 05:42:51 AM UTC 24 |
| Peak memory | 227476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3997422020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_link_suspend.3997422020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_low_speed_traffic.4211357451 |
| Short name | T295 |
| Test name | |
| Test status | |
| Simulation time | 4937513596 ps |
| CPU time | 72.12 seconds |
| Started | Sep 04 05:42:45 AM UTC 24 |
| Finished | Sep 04 05:43:59 AM UTC 24 |
| Peak memory | 229808 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4211357451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_low_speed_traffic.4211357451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_max_inter_pkt_delay.4045117114 |
| Short name | T630 |
| Test name | |
| Test status | |
| Simulation time | 2513246296 ps |
| CPU time | 23.25 seconds |
| Started | Sep 04 05:42:45 AM UTC 24 |
| Finished | Sep 04 05:43:09 AM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4045117114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_inter_pkt_delay.4045117114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_max_length_in_transaction.682521049 |
| Short name | T619 |
| Test name | |
| Test status | |
| Simulation time | 234991942 ps |
| CPU time | 1.7 seconds |
| Started | Sep 04 05:42:45 AM UTC 24 |
| Finished | Sep 04 05:42:48 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=682521049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 2.usbdev_max_length_in_transaction.682521049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_max_length_out_transaction.3468767971 |
| Short name | T620 |
| Test name | |
| Test status | |
| Simulation time | 188009147 ps |
| CPU time | 1.09 seconds |
| Started | Sep 04 05:42:48 AM UTC 24 |
| Finished | Sep 04 05:42:50 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3468767971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 2.usbdev_max_length_out_transaction.3468767971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_max_non_iso_usb_traffic.2448605952 |
| Short name | T661 |
| Test name | |
| Test status | |
| Simulation time | 2160282693 ps |
| CPU time | 76.92 seconds |
| Started | Sep 04 05:42:52 AM UTC 24 |
| Finished | Sep 04 05:44:11 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2448605952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_non_iso_usb_traffic.2448605952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_max_usb_traffic.170322462 |
| Short name | T683 |
| Test name | |
| Test status | |
| Simulation time | 2732197788 ps |
| CPU time | 102.79 seconds |
| Started | Sep 04 05:42:52 AM UTC 24 |
| Finished | Sep 04 05:44:37 AM UTC 24 |
| Peak memory | 229672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=170322462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_usb_traffic.170322462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_min_inter_pkt_delay.304692056 |
| Short name | T701 |
| Test name | |
| Test status | |
| Simulation time | 4202177504 ps |
| CPU time | 117.77 seconds |
| Started | Sep 04 05:42:53 AM UTC 24 |
| Finished | Sep 04 05:44:53 AM UTC 24 |
| Peak memory | 229800 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=304692056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_min_inter_pkt_delay.304692056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_min_length_in_transaction.2660827125 |
| Short name | T622 |
| Test name | |
| Test status | |
| Simulation time | 166351973 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 05:42:57 AM UTC 24 |
| Finished | Sep 04 05:43:00 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2660827125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 2.usbdev_min_length_in_transaction.2660827125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_min_length_out_transaction.2167530127 |
| Short name | T623 |
| Test name | |
| Test status | |
| Simulation time | 200991746 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 05:42:57 AM UTC 24 |
| Finished | Sep 04 05:43:00 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2167530127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 2.usbdev_min_length_out_transaction.2167530127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_out_iso.2365332426 |
| Short name | T625 |
| Test name | |
| Test status | |
| Simulation time | 156481402 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 05:43:00 AM UTC 24 |
| Finished | Sep 04 05:43:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2365332426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 2.usbdev_out_iso.2365332426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_out_stall.180789201 |
| Short name | T626 |
| Test name | |
| Test status | |
| Simulation time | 216514526 ps |
| CPU time | 1.68 seconds |
| Started | Sep 04 05:43:01 AM UTC 24 |
| Finished | Sep 04 05:43:04 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=180789201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_out_stall.180789201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_out_trans_nak.2947954200 |
| Short name | T467 |
| Test name | |
| Test status | |
| Simulation time | 171249804 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 05:43:01 AM UTC 24 |
| Finished | Sep 04 05:43:04 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2947954200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 2.usbdev_out_trans_nak.2947954200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_pending_in_trans.2390743122 |
| Short name | T627 |
| Test name | |
| Test status | |
| Simulation time | 152613393 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:43:02 AM UTC 24 |
| Finished | Sep 04 05:43:04 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2390743122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 2.usbdev_pending_in_trans.2390743122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_pinflip.1345080608 |
| Short name | T628 |
| Test name | |
| Test status | |
| Simulation time | 320106220 ps |
| CPU time | 1.22 seconds |
| Started | Sep 04 05:43:03 AM UTC 24 |
| Finished | Sep 04 05:43:05 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1345080608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_pinflip.1345080608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_rand_bus_type.1285998419 |
| Short name | T629 |
| Test name | |
| Test status | |
| Simulation time | 228347394 ps |
| CPU time | 1.8 seconds |
| Started | Sep 04 05:43:03 AM UTC 24 |
| Finished | Sep 04 05:43:06 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1285998419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 2.usbdev_phy_config_rand_bus_type.1285998419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_usb_ref_disable.3239027031 |
| Short name | T206 |
| Test name | |
| Test status | |
| Simulation time | 142188961 ps |
| CPU time | 1.35 seconds |
| Started | Sep 04 05:43:04 AM UTC 24 |
| Finished | Sep 04 05:43:07 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3239027031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_usb_ref_disable.3239027031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_phy_pins_sense.4116341209 |
| Short name | T25 |
| Test name | |
| Test status | |
| Simulation time | 72331864 ps |
| CPU time | 1.12 seconds |
| Started | Sep 04 05:43:04 AM UTC 24 |
| Finished | Sep 04 05:43:07 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4116341209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_pins_sense.4116341209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_buffer.4081678330 |
| Short name | T92 |
| Test name | |
| Test status | |
| Simulation time | 19826153130 ps |
| CPU time | 51.04 seconds |
| Started | Sep 04 05:43:06 AM UTC 24 |
| Finished | Sep 04 05:43:58 AM UTC 24 |
| Peak memory | 231564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4081678330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_pkt_buffer.4081678330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_received.1005934245 |
| Short name | T443 |
| Test name | |
| Test status | |
| Simulation time | 188076148 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 05:43:06 AM UTC 24 |
| Finished | Sep 04 05:43:08 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1005934245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_pkt_received.1005934245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_sent.3434648345 |
| Short name | T632 |
| Test name | |
| Test status | |
| Simulation time | 306517630 ps |
| CPU time | 1.91 seconds |
| Started | Sep 04 05:43:07 AM UTC 24 |
| Finished | Sep 04 05:43:10 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3434648345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_pkt_sent.3434648345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_rand_bus_disconnects.747137716 |
| Short name | T685 |
| Test name | |
| Test status | |
| Simulation time | 6927322144 ps |
| CPU time | 89.6 seconds |
| Started | Sep 04 05:43:08 AM UTC 24 |
| Finished | Sep 04 05:44:40 AM UTC 24 |
| Peak memory | 229716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=747137716 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_bus_disconnects.747137716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_rand_bus_resets.688773154 |
| Short name | T643 |
| Test name | |
| Test status | |
| Simulation time | 5855111171 ps |
| CPU time | 32.07 seconds |
| Started | Sep 04 05:43:09 AM UTC 24 |
| Finished | Sep 04 05:43:43 AM UTC 24 |
| Peak memory | 231704 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=688773154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_b us_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_bus_resets.688773154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_rand_suspends.2856465669 |
| Short name | T651 |
| Test name | |
| Test status | |
| Simulation time | 7045436203 ps |
| CPU time | 43.04 seconds |
| Started | Sep 04 05:43:10 AM UTC 24 |
| Finished | Sep 04 05:43:55 AM UTC 24 |
| Peak memory | 231720 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2856465669 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_suspends.2856465669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_random_length_in_transaction.2030469162 |
| Short name | T631 |
| Test name | |
| Test status | |
| Simulation time | 221761208 ps |
| CPU time | 1.61 seconds |
| Started | Sep 04 05:43:07 AM UTC 24 |
| Finished | Sep 04 05:43:09 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2030469162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 2.usbdev_random_length_in_transaction.2030469162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_random_length_out_transaction.3345475632 |
| Short name | T633 |
| Test name | |
| Test status | |
| Simulation time | 191371965 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 05:43:08 AM UTC 24 |
| Finished | Sep 04 05:43:11 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3345475632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 2.usbdev_random_length_out_transaction.3345475632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_resume_link_active.1245385771 |
| Short name | T97 |
| Test name | |
| Test status | |
| Simulation time | 20161742608 ps |
| CPU time | 26.29 seconds |
| Started | Sep 04 05:43:10 AM UTC 24 |
| Finished | Sep 04 05:43:38 AM UTC 24 |
| Peak memory | 217212 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1245385771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 2.usbdev_resume_link_active.1245385771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_rx_crc_err.3732900517 |
| Short name | T73 |
| Test name | |
| Test status | |
| Simulation time | 153690275 ps |
| CPU time | 1.32 seconds |
| Started | Sep 04 05:43:10 AM UTC 24 |
| Finished | Sep 04 05:43:13 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3732900517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_rx_crc_err.3732900517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_rx_full.3571834885 |
| Short name | T53 |
| Test name | |
| Test status | |
| Simulation time | 250434529 ps |
| CPU time | 1.9 seconds |
| Started | Sep 04 05:43:11 AM UTC 24 |
| Finished | Sep 04 05:43:14 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3571834885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 2.usbdev_rx_full.3571834885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_rx_pid_err.3133450808 |
| Short name | T77 |
| Test name | |
| Test status | |
| Simulation time | 171125586 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 05:43:13 AM UTC 24 |
| Finished | Sep 04 05:43:16 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3133450808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_rx_pid_err.3133450808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_sec_cm.3988311447 |
| Short name | T209 |
| Test name | |
| Test status | |
| Simulation time | 541968059 ps |
| CPU time | 2.5 seconds |
| Started | Sep 04 05:43:37 AM UTC 24 |
| Finished | Sep 04 05:43:40 AM UTC 24 |
| Peak memory | 251468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3988311447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_sec_cm.3988311447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_setup_priority.1327687380 |
| Short name | T466 |
| Test name | |
| Test status | |
| Simulation time | 471625963 ps |
| CPU time | 2.8 seconds |
| Started | Sep 04 05:43:16 AM UTC 24 |
| Finished | Sep 04 05:43:20 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1327687380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_priority.1327687380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_setup_priority_over_stall_response.1782207923 |
| Short name | T634 |
| Test name | |
| Test status | |
| Simulation time | 211576528 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 05:43:16 AM UTC 24 |
| Finished | Sep 04 05:43:19 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1782207923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_priority_over_stall_response.1782207923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_setup_stage.2065176610 |
| Short name | T635 |
| Test name | |
| Test status | |
| Simulation time | 191350891 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 05:43:16 AM UTC 24 |
| Finished | Sep 04 05:43:19 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2065176610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_setup_stage.2065176610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_setup_trans_ignored.1900343641 |
| Short name | T582 |
| Test name | |
| Test status | |
| Simulation time | 154369076 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 05:43:19 AM UTC 24 |
| Finished | Sep 04 05:43:22 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1900343641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 2.usbdev_setup_trans_ignored.1900343641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_smoke.2742367339 |
| Short name | T636 |
| Test name | |
| Test status | |
| Simulation time | 226063245 ps |
| CPU time | 1.7 seconds |
| Started | Sep 04 05:43:19 AM UTC 24 |
| Finished | Sep 04 05:43:22 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2742367339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_smoke.2742367339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_spurious_pids_ignored.2694703123 |
| Short name | T647 |
| Test name | |
| Test status | |
| Simulation time | 2143857645 ps |
| CPU time | 27.2 seconds |
| Started | Sep 04 05:43:21 AM UTC 24 |
| Finished | Sep 04 05:43:49 AM UTC 24 |
| Peak memory | 234200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2694703123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_spurious_pids_ignored.2694703123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_stall_priority_over_nak.444755634 |
| Short name | T433 |
| Test name | |
| Test status | |
| Simulation time | 163132647 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 05:43:23 AM UTC 24 |
| Finished | Sep 04 05:43:25 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=444755634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stall_priority_over_nak.444755634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_stall_trans.1671398370 |
| Short name | T637 |
| Test name | |
| Test status | |
| Simulation time | 200895191 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 05:43:23 AM UTC 24 |
| Finished | Sep 04 05:43:25 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1671398370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_stall_trans.1671398370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_stream_len_max.2071659110 |
| Short name | T638 |
| Test name | |
| Test status | |
| Simulation time | 504895565 ps |
| CPU time | 2.74 seconds |
| Started | Sep 04 05:43:26 AM UTC 24 |
| Finished | Sep 04 05:43:30 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2071659110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stream_len_max.2071659110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_streaming_out.4078823858 |
| Short name | T714 |
| Test name | |
| Test status | |
| Simulation time | 3846427033 ps |
| CPU time | 101.05 seconds |
| Started | Sep 04 05:43:26 AM UTC 24 |
| Finished | Sep 04 05:45:09 AM UTC 24 |
| Peak memory | 227616 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4078823858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_streaming_out.4078823858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_stress_usb_traffic.3488140475 |
| Short name | T79 |
| Test name | |
| Test status | |
| Simulation time | 3872179766 ps |
| CPU time | 83.33 seconds |
| Started | Sep 04 05:43:31 AM UTC 24 |
| Finished | Sep 04 05:44:56 AM UTC 24 |
| Peak memory | 234248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3488140475 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_ 03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stress_usb_traffic.3488140475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_timeout_missing_host_handshake.3194665714 |
| Short name | T621 |
| Test name | |
| Test status | |
| Simulation time | 3372044246 ps |
| CPU time | 39.37 seconds |
| Started | Sep 04 05:42:15 AM UTC 24 |
| Finished | Sep 04 05:42:56 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3194665714 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_timeout_missing_host_handshake.3194665714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/2.usbdev_tx_rx_disruption.1692493337 |
| Short name | T170 |
| Test name | |
| Test status | |
| Simulation time | 473451902 ps |
| CPU time | 2.2 seconds |
| Started | Sep 04 05:43:32 AM UTC 24 |
| Finished | Sep 04 05:43:35 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1692493337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_tx _rx_disruption.1692493337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/2.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_alert_test.1174882256 |
| Short name | T1623 |
| Test name | |
| Test status | |
| Simulation time | 59545808 ps |
| CPU time | 1.1 seconds |
| Started | Sep 04 05:55:36 AM UTC 24 |
| Finished | Sep 04 05:55:38 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1174882256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 20.usbdev_alert_test.1174882256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_disconnect.1088630356 |
| Short name | T1579 |
| Test name | |
| Test status | |
| Simulation time | 4990864963 ps |
| CPU time | 7.97 seconds |
| Started | Sep 04 05:55:05 AM UTC 24 |
| Finished | Sep 04 05:55:14 AM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1088630356 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_disconnect.1088630356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_reset.2761430100 |
| Short name | T1622 |
| Test name | |
| Test status | |
| Simulation time | 14999248766 ps |
| CPU time | 29.94 seconds |
| Started | Sep 04 05:55:07 AM UTC 24 |
| Finished | Sep 04 05:55:38 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2761430100 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_reset.2761430100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_resume.2414611118 |
| Short name | T1650 |
| Test name | |
| Test status | |
| Simulation time | 31356893379 ps |
| CPU time | 46.46 seconds |
| Started | Sep 04 05:55:07 AM UTC 24 |
| Finished | Sep 04 05:55:54 AM UTC 24 |
| Peak memory | 217432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2414611118 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_resume.2414611118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_av_buffer.3693795537 |
| Short name | T1572 |
| Test name | |
| Test status | |
| Simulation time | 185597826 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 05:55:07 AM UTC 24 |
| Finished | Sep 04 05:55:09 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3693795537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_av_buffer.3693795537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_bitstuff_err.3185300184 |
| Short name | T1573 |
| Test name | |
| Test status | |
| Simulation time | 142897087 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 05:55:08 AM UTC 24 |
| Finished | Sep 04 05:55:10 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3185300184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_bitstuff_err.3185300184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_data_toggle_clear.4141208383 |
| Short name | T1575 |
| Test name | |
| Test status | |
| Simulation time | 305351229 ps |
| CPU time | 2.06 seconds |
| Started | Sep 04 05:55:08 AM UTC 24 |
| Finished | Sep 04 05:55:11 AM UTC 24 |
| Peak memory | 217088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4141208383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 20.usbdev_data_toggle_clear.4141208383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_data_toggle_restore.1567258942 |
| Short name | T1576 |
| Test name | |
| Test status | |
| Simulation time | 1186320593 ps |
| CPU time | 3.84 seconds |
| Started | Sep 04 05:55:08 AM UTC 24 |
| Finished | Sep 04 05:55:13 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1567258942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_data_toggle_restore.1567258942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_device_address.3976402205 |
| Short name | T1694 |
| Test name | |
| Test status | |
| Simulation time | 28156686484 ps |
| CPU time | 62.82 seconds |
| Started | Sep 04 05:55:09 AM UTC 24 |
| Finished | Sep 04 05:56:14 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3976402205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_device_address.3976402205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_device_timeout.3964948505 |
| Short name | T1581 |
| Test name | |
| Test status | |
| Simulation time | 273322944 ps |
| CPU time | 4.87 seconds |
| Started | Sep 04 05:55:09 AM UTC 24 |
| Finished | Sep 04 05:55:15 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3964948505 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_device_timeout.3964948505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_disable_endpoint.298631012 |
| Short name | T1580 |
| Test name | |
| Test status | |
| Simulation time | 706308565 ps |
| CPU time | 3.35 seconds |
| Started | Sep 04 05:55:10 AM UTC 24 |
| Finished | Sep 04 05:55:15 AM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=298631012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_disable_endpoint.298631012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_disconnected.1086749703 |
| Short name | T1578 |
| Test name | |
| Test status | |
| Simulation time | 140426076 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 05:55:12 AM UTC 24 |
| Finished | Sep 04 05:55:14 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1086749703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_disconnected.1086749703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_enable.2319239006 |
| Short name | T1577 |
| Test name | |
| Test status | |
| Simulation time | 73082674 ps |
| CPU time | 1.23 seconds |
| Started | Sep 04 05:55:12 AM UTC 24 |
| Finished | Sep 04 05:55:14 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2319239006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 20.usbdev_enable.2319239006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_endpoint_access.135267050 |
| Short name | T1582 |
| Test name | |
| Test status | |
| Simulation time | 861143984 ps |
| CPU time | 3.58 seconds |
| Started | Sep 04 05:55:12 AM UTC 24 |
| Finished | Sep 04 05:55:16 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=135267050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_endpoint_access.135267050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_endpoint_types.1026220831 |
| Short name | T401 |
| Test name | |
| Test status | |
| Simulation time | 497349873 ps |
| CPU time | 2.48 seconds |
| Started | Sep 04 05:55:14 AM UTC 24 |
| Finished | Sep 04 05:55:17 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1026220831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_endpoint_types.1026220831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_fifo_levels.791737696 |
| Short name | T519 |
| Test name | |
| Test status | |
| Simulation time | 250526572 ps |
| CPU time | 1.92 seconds |
| Started | Sep 04 05:55:15 AM UTC 24 |
| Finished | Sep 04 05:55:18 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=791737696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 20.usbdev_fifo_levels.791737696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_fifo_rst.3224864634 |
| Short name | T1588 |
| Test name | |
| Test status | |
| Simulation time | 294644327 ps |
| CPU time | 3.93 seconds |
| Started | Sep 04 05:55:15 AM UTC 24 |
| Finished | Sep 04 05:55:20 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3224864634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_fifo_rst.3224864634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_in_iso.2456651090 |
| Short name | T1584 |
| Test name | |
| Test status | |
| Simulation time | 261089718 ps |
| CPU time | 2.07 seconds |
| Started | Sep 04 05:55:15 AM UTC 24 |
| Finished | Sep 04 05:55:18 AM UTC 24 |
| Peak memory | 227420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2456651090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 20.usbdev_in_iso.2456651090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_in_stall.2447083942 |
| Short name | T1585 |
| Test name | |
| Test status | |
| Simulation time | 164387633 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 05:55:16 AM UTC 24 |
| Finished | Sep 04 05:55:19 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2447083942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_in_stall.2447083942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_in_trans.3022016486 |
| Short name | T1589 |
| Test name | |
| Test status | |
| Simulation time | 280616510 ps |
| CPU time | 1.84 seconds |
| Started | Sep 04 05:55:18 AM UTC 24 |
| Finished | Sep 04 05:55:20 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3022016486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_in_trans.3022016486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_invalid_sync.3910542197 |
| Short name | T1741 |
| Test name | |
| Test status | |
| Simulation time | 2972413284 ps |
| CPU time | 76.03 seconds |
| Started | Sep 04 05:55:15 AM UTC 24 |
| Finished | Sep 04 05:56:34 AM UTC 24 |
| Peak memory | 229808 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3910542197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 20.usbdev_invalid_sync.3910542197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_iso_retraction.3587526510 |
| Short name | T1721 |
| Test name | |
| Test status | |
| Simulation time | 7872399708 ps |
| CPU time | 64.44 seconds |
| Started | Sep 04 05:55:19 AM UTC 24 |
| Finished | Sep 04 05:56:25 AM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3587526510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_iso_retraction.3587526510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_link_in_err.2390680246 |
| Short name | T1590 |
| Test name | |
| Test status | |
| Simulation time | 189797937 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 05:55:19 AM UTC 24 |
| Finished | Sep 04 05:55:22 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2390680246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_link_in_err.2390680246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_link_resume.4267657789 |
| Short name | T1685 |
| Test name | |
| Test status | |
| Simulation time | 28463013146 ps |
| CPU time | 47.84 seconds |
| Started | Sep 04 05:55:19 AM UTC 24 |
| Finished | Sep 04 05:56:09 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4267657789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_link_resume.4267657789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_link_suspend.581026362 |
| Short name | T1633 |
| Test name | |
| Test status | |
| Simulation time | 8796446118 ps |
| CPU time | 23.2 seconds |
| Started | Sep 04 05:55:19 AM UTC 24 |
| Finished | Sep 04 05:55:44 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=581026362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_link_suspend.581026362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_low_speed_traffic.4040292489 |
| Short name | T1858 |
| Test name | |
| Test status | |
| Simulation time | 4813598364 ps |
| CPU time | 135.13 seconds |
| Started | Sep 04 05:55:20 AM UTC 24 |
| Finished | Sep 04 05:57:38 AM UTC 24 |
| Peak memory | 237052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4040292489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_low_speed_traffic.4040292489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_max_inter_pkt_delay.3830351304 |
| Short name | T1629 |
| Test name | |
| Test status | |
| Simulation time | 2250219548 ps |
| CPU time | 19.16 seconds |
| Started | Sep 04 05:55:21 AM UTC 24 |
| Finished | Sep 04 05:55:41 AM UTC 24 |
| Peak memory | 227436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3830351304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_inter_pkt_delay.3830351304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_max_length_in_transaction.1192533269 |
| Short name | T1592 |
| Test name | |
| Test status | |
| Simulation time | 253783406 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 05:55:21 AM UTC 24 |
| Finished | Sep 04 05:55:23 AM UTC 24 |
| Peak memory | 215032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1192533269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 20.usbdev_max_length_in_transaction.1192533269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_max_length_out_transaction.657774797 |
| Short name | T1593 |
| Test name | |
| Test status | |
| Simulation time | 200262029 ps |
| CPU time | 1.65 seconds |
| Started | Sep 04 05:55:22 AM UTC 24 |
| Finished | Sep 04 05:55:24 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=657774797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 20.usbdev_max_length_out_transaction.657774797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_max_non_iso_usb_traffic.2687484312 |
| Short name | T1716 |
| Test name | |
| Test status | |
| Simulation time | 2068363795 ps |
| CPU time | 60.27 seconds |
| Started | Sep 04 05:55:22 AM UTC 24 |
| Finished | Sep 04 05:56:24 AM UTC 24 |
| Peak memory | 227500 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2687484312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_non_iso_usb_traffic.2687484312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_min_inter_pkt_delay.4283716912 |
| Short name | T1807 |
| Test name | |
| Test status | |
| Simulation time | 3839568829 ps |
| CPU time | 104.3 seconds |
| Started | Sep 04 05:55:23 AM UTC 24 |
| Finished | Sep 04 05:57:09 AM UTC 24 |
| Peak memory | 227724 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4283716912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_min_inter_pkt_delay.4283716912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_min_length_in_transaction.1751303188 |
| Short name | T1595 |
| Test name | |
| Test status | |
| Simulation time | 154292951 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 05:55:24 AM UTC 24 |
| Finished | Sep 04 05:55:27 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1751303188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 20.usbdev_min_length_in_transaction.1751303188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_min_length_out_transaction.556645950 |
| Short name | T1596 |
| Test name | |
| Test status | |
| Simulation time | 185594774 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 05:55:24 AM UTC 24 |
| Finished | Sep 04 05:55:27 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=556645950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 20.usbdev_min_length_out_transaction.556645950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_nak_trans.782870289 |
| Short name | T1599 |
| Test name | |
| Test status | |
| Simulation time | 191395575 ps |
| CPU time | 1.57 seconds |
| Started | Sep 04 05:55:25 AM UTC 24 |
| Finished | Sep 04 05:55:28 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=782870289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_nak_trans.782870289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_out_iso.799926172 |
| Short name | T1603 |
| Test name | |
| Test status | |
| Simulation time | 234781538 ps |
| CPU time | 1.7 seconds |
| Started | Sep 04 05:55:26 AM UTC 24 |
| Finished | Sep 04 05:55:29 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=799926172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 20.usbdev_out_iso.799926172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_out_stall.4186385322 |
| Short name | T1606 |
| Test name | |
| Test status | |
| Simulation time | 197165734 ps |
| CPU time | 1.55 seconds |
| Started | Sep 04 05:55:28 AM UTC 24 |
| Finished | Sep 04 05:55:31 AM UTC 24 |
| Peak memory | 214916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4186385322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_out_stall.4186385322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_out_trans_nak.4101791098 |
| Short name | T1604 |
| Test name | |
| Test status | |
| Simulation time | 177766971 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 05:55:28 AM UTC 24 |
| Finished | Sep 04 05:55:31 AM UTC 24 |
| Peak memory | 214856 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4101791098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 20.usbdev_out_trans_nak.4101791098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_pending_in_trans.3071811718 |
| Short name | T1605 |
| Test name | |
| Test status | |
| Simulation time | 190384694 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 05:55:28 AM UTC 24 |
| Finished | Sep 04 05:55:31 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3071811718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 20.usbdev_pending_in_trans.3071811718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_phy_config_pinflip.2470435610 |
| Short name | T1607 |
| Test name | |
| Test status | |
| Simulation time | 179156411 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 05:55:28 AM UTC 24 |
| Finished | Sep 04 05:55:31 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2470435610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 20.usbdev_phy_config_pinflip.2470435610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_phy_config_usb_ref_disable.3908186312 |
| Short name | T1610 |
| Test name | |
| Test status | |
| Simulation time | 143479854 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 05:55:30 AM UTC 24 |
| Finished | Sep 04 05:55:32 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3908186312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 20.usbdev_phy_config_usb_ref_disable.3908186312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_phy_pins_sense.3604521939 |
| Short name | T1609 |
| Test name | |
| Test status | |
| Simulation time | 49519588 ps |
| CPU time | 1.05 seconds |
| Started | Sep 04 05:55:30 AM UTC 24 |
| Finished | Sep 04 05:55:32 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3604521939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_phy_pins_sense.3604521939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_buffer.2647887471 |
| Short name | T1724 |
| Test name | |
| Test status | |
| Simulation time | 14875667250 ps |
| CPU time | 54.55 seconds |
| Started | Sep 04 05:55:30 AM UTC 24 |
| Finished | Sep 04 05:56:26 AM UTC 24 |
| Peak memory | 231696 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2647887471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 20.usbdev_pkt_buffer.2647887471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_received.301256057 |
| Short name | T1611 |
| Test name | |
| Test status | |
| Simulation time | 160871192 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 05:55:30 AM UTC 24 |
| Finished | Sep 04 05:55:33 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=301256057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_pkt_received.301256057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_sent.1396428264 |
| Short name | T1612 |
| Test name | |
| Test status | |
| Simulation time | 206422530 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 05:55:30 AM UTC 24 |
| Finished | Sep 04 05:55:33 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1396428264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_pkt_sent.1396428264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_random_length_in_transaction.3055059233 |
| Short name | T1613 |
| Test name | |
| Test status | |
| Simulation time | 203126160 ps |
| CPU time | 1.15 seconds |
| Started | Sep 04 05:55:31 AM UTC 24 |
| Finished | Sep 04 05:55:34 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3055059233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 20.usbdev_random_length_in_transaction.3055059233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_random_length_out_transaction.1711795284 |
| Short name | T1615 |
| Test name | |
| Test status | |
| Simulation time | 190360777 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 05:55:31 AM UTC 24 |
| Finished | Sep 04 05:55:34 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1711795284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 20.usbdev_random_length_out_transaction.1711795284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_rx_crc_err.1984942518 |
| Short name | T1614 |
| Test name | |
| Test status | |
| Simulation time | 136654037 ps |
| CPU time | 1.2 seconds |
| Started | Sep 04 05:55:32 AM UTC 24 |
| Finished | Sep 04 05:55:34 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1984942518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 20.usbdev_rx_crc_err.1984942518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_rx_full.1213164137 |
| Short name | T561 |
| Test name | |
| Test status | |
| Simulation time | 443050598 ps |
| CPU time | 2.48 seconds |
| Started | Sep 04 05:55:32 AM UTC 24 |
| Finished | Sep 04 05:55:35 AM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1213164137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 20.usbdev_rx_full.1213164137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_setup_stage.2732148931 |
| Short name | T1618 |
| Test name | |
| Test status | |
| Simulation time | 190224796 ps |
| CPU time | 1.55 seconds |
| Started | Sep 04 05:55:33 AM UTC 24 |
| Finished | Sep 04 05:55:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2732148931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_setup_stage.2732148931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_setup_trans_ignored.3237555447 |
| Short name | T1617 |
| Test name | |
| Test status | |
| Simulation time | 150182251 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 05:55:33 AM UTC 24 |
| Finished | Sep 04 05:55:35 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3237555447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 20.usbdev_setup_trans_ignored.3237555447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_smoke.3990795659 |
| Short name | T1619 |
| Test name | |
| Test status | |
| Simulation time | 206353002 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 05:55:33 AM UTC 24 |
| Finished | Sep 04 05:55:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3990795659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_smoke.3990795659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_spurious_pids_ignored.1873960916 |
| Short name | T1726 |
| Test name | |
| Test status | |
| Simulation time | 1886325279 ps |
| CPU time | 50.96 seconds |
| Started | Sep 04 05:55:34 AM UTC 24 |
| Finished | Sep 04 05:56:27 AM UTC 24 |
| Peak memory | 229456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1873960916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 20.usbdev_spurious_pids_ignored.1873960916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_stall_priority_over_nak.1194675775 |
| Short name | T1621 |
| Test name | |
| Test status | |
| Simulation time | 265216176 ps |
| CPU time | 1.69 seconds |
| Started | Sep 04 05:55:34 AM UTC 24 |
| Finished | Sep 04 05:55:37 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1194675775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_stall_priority_over_nak.1194675775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_stall_trans.2249938581 |
| Short name | T1620 |
| Test name | |
| Test status | |
| Simulation time | 178052462 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 05:55:34 AM UTC 24 |
| Finished | Sep 04 05:55:37 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2249938581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_stall_trans.2249938581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_stream_len_max.4012811497 |
| Short name | T1630 |
| Test name | |
| Test status | |
| Simulation time | 1199215656 ps |
| CPU time | 5.58 seconds |
| Started | Sep 04 05:55:34 AM UTC 24 |
| Finished | Sep 04 05:55:41 AM UTC 24 |
| Peak memory | 217384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4012811497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_stream_len_max.4012811497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_streaming_out.3413106599 |
| Short name | T1679 |
| Test name | |
| Test status | |
| Simulation time | 2960203901 ps |
| CPU time | 29.89 seconds |
| Started | Sep 04 05:55:34 AM UTC 24 |
| Finished | Sep 04 05:56:06 AM UTC 24 |
| Peak memory | 229712 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3413106599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_streaming_out.3413106599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_timeout_missing_host_handshake.289759727 |
| Short name | T1645 |
| Test name | |
| Test status | |
| Simulation time | 1818945309 ps |
| CPU time | 41.37 seconds |
| Started | Sep 04 05:55:09 AM UTC 24 |
| Finished | Sep 04 05:55:52 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=289759727 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_timeout_missing_host_handshake.289759727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/20.usbdev_tx_rx_disruption.2921127122 |
| Short name | T1624 |
| Test name | |
| Test status | |
| Simulation time | 640454389 ps |
| CPU time | 2.93 seconds |
| Started | Sep 04 05:55:36 AM UTC 24 |
| Finished | Sep 04 05:55:40 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2921127122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_t x_rx_disruption.2921127122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/20.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/201.usbdev_tx_rx_disruption.3300176636 |
| Short name | T3512 |
| Test name | |
| Test status | |
| Simulation time | 548783287 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 06:08:54 AM UTC 24 |
| Finished | Sep 04 06:09:19 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3300176636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 201.usbdev_ tx_rx_disruption.3300176636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/201.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/202.usbdev_tx_rx_disruption.1381729475 |
| Short name | T3511 |
| Test name | |
| Test status | |
| Simulation time | 418179931 ps |
| CPU time | 1.23 seconds |
| Started | Sep 04 06:08:54 AM UTC 24 |
| Finished | Sep 04 06:09:19 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1381729475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 202.usbdev_ tx_rx_disruption.1381729475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/202.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/203.usbdev_tx_rx_disruption.2351879066 |
| Short name | T3515 |
| Test name | |
| Test status | |
| Simulation time | 438697094 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 06:08:54 AM UTC 24 |
| Finished | Sep 04 06:09:19 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2351879066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 203.usbdev_ tx_rx_disruption.2351879066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/203.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/204.usbdev_tx_rx_disruption.1088606410 |
| Short name | T3519 |
| Test name | |
| Test status | |
| Simulation time | 627033000 ps |
| CPU time | 1.72 seconds |
| Started | Sep 04 06:08:54 AM UTC 24 |
| Finished | Sep 04 06:09:19 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1088606410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 204.usbdev_ tx_rx_disruption.1088606410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/204.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/205.usbdev_tx_rx_disruption.1159036099 |
| Short name | T3520 |
| Test name | |
| Test status | |
| Simulation time | 590863250 ps |
| CPU time | 1.83 seconds |
| Started | Sep 04 06:08:54 AM UTC 24 |
| Finished | Sep 04 06:09:20 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1159036099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 205.usbdev_ tx_rx_disruption.1159036099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/205.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/206.usbdev_tx_rx_disruption.1768693041 |
| Short name | T3556 |
| Test name | |
| Test status | |
| Simulation time | 577442361 ps |
| CPU time | 1.63 seconds |
| Started | Sep 04 06:08:59 AM UTC 24 |
| Finished | Sep 04 06:09:35 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1768693041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 206.usbdev_ tx_rx_disruption.1768693041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/206.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/207.usbdev_tx_rx_disruption.3175982004 |
| Short name | T3475 |
| Test name | |
| Test status | |
| Simulation time | 622719924 ps |
| CPU time | 1.55 seconds |
| Started | Sep 04 06:09:00 AM UTC 24 |
| Finished | Sep 04 06:09:03 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3175982004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 207.usbdev_ tx_rx_disruption.3175982004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/207.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/208.usbdev_tx_rx_disruption.3206694199 |
| Short name | T3478 |
| Test name | |
| Test status | |
| Simulation time | 559985737 ps |
| CPU time | 1.69 seconds |
| Started | Sep 04 06:09:00 AM UTC 24 |
| Finished | Sep 04 06:09:04 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3206694199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 208.usbdev_ tx_rx_disruption.3206694199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/208.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/209.usbdev_tx_rx_disruption.3672524278 |
| Short name | T3534 |
| Test name | |
| Test status | |
| Simulation time | 634352015 ps |
| CPU time | 1.65 seconds |
| Started | Sep 04 06:09:04 AM UTC 24 |
| Finished | Sep 04 06:09:32 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3672524278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 209.usbdev_ tx_rx_disruption.3672524278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/209.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_alert_test.2765834068 |
| Short name | T1678 |
| Test name | |
| Test status | |
| Simulation time | 72492657 ps |
| CPU time | 1.14 seconds |
| Started | Sep 04 05:56:04 AM UTC 24 |
| Finished | Sep 04 05:56:06 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2765834068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 21.usbdev_alert_test.2765834068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_disconnect.389173408 |
| Short name | T1660 |
| Test name | |
| Test status | |
| Simulation time | 9301204601 ps |
| CPU time | 20.82 seconds |
| Started | Sep 04 05:55:36 AM UTC 24 |
| Finished | Sep 04 05:55:58 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=389173408 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_disconnect.389173408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_reset.3646407598 |
| Short name | T1696 |
| Test name | |
| Test status | |
| Simulation time | 14605388834 ps |
| CPU time | 36.65 seconds |
| Started | Sep 04 05:55:37 AM UTC 24 |
| Finished | Sep 04 05:56:15 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3646407598 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_reset.3646407598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_resume.3740192674 |
| Short name | T1713 |
| Test name | |
| Test status | |
| Simulation time | 24482676037 ps |
| CPU time | 42.72 seconds |
| Started | Sep 04 05:55:38 AM UTC 24 |
| Finished | Sep 04 05:56:22 AM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3740192674 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_resume.3740192674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_av_buffer.1239226785 |
| Short name | T1626 |
| Test name | |
| Test status | |
| Simulation time | 157045045 ps |
| CPU time | 1.33 seconds |
| Started | Sep 04 05:55:38 AM UTC 24 |
| Finished | Sep 04 05:55:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1239226785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_av_buffer.1239226785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_bitstuff_err.2964573848 |
| Short name | T1631 |
| Test name | |
| Test status | |
| Simulation time | 144990742 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 05:55:39 AM UTC 24 |
| Finished | Sep 04 05:55:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2964573848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_bitstuff_err.2964573848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_data_toggle_clear.807500857 |
| Short name | T1632 |
| Test name | |
| Test status | |
| Simulation time | 204787737 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 05:55:40 AM UTC 24 |
| Finished | Sep 04 05:55:42 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=807500857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 21.usbdev_data_toggle_clear.807500857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_data_toggle_restore.1747509284 |
| Short name | T484 |
| Test name | |
| Test status | |
| Simulation time | 1068765738 ps |
| CPU time | 5.06 seconds |
| Started | Sep 04 05:55:40 AM UTC 24 |
| Finished | Sep 04 05:55:46 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1747509284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_data_toggle_restore.1747509284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_device_address.3736676890 |
| Short name | T1779 |
| Test name | |
| Test status | |
| Simulation time | 29431783797 ps |
| CPU time | 70.8 seconds |
| Started | Sep 04 05:55:41 AM UTC 24 |
| Finished | Sep 04 05:56:54 AM UTC 24 |
| Peak memory | 217384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3736676890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_device_address.3736676890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_device_timeout.2128205890 |
| Short name | T1733 |
| Test name | |
| Test status | |
| Simulation time | 5233509565 ps |
| CPU time | 44.76 seconds |
| Started | Sep 04 05:55:42 AM UTC 24 |
| Finished | Sep 04 05:56:29 AM UTC 24 |
| Peak memory | 217044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2128205890 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_device_timeout.2128205890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_disable_endpoint.3725656331 |
| Short name | T1637 |
| Test name | |
| Test status | |
| Simulation time | 845269558 ps |
| CPU time | 3.73 seconds |
| Started | Sep 04 05:55:42 AM UTC 24 |
| Finished | Sep 04 05:55:47 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3725656331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 21.usbdev_disable_endpoint.3725656331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_disconnected.3829294421 |
| Short name | T1635 |
| Test name | |
| Test status | |
| Simulation time | 162541955 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 05:55:42 AM UTC 24 |
| Finished | Sep 04 05:55:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3829294421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_disconnected.3829294421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_enable.3715002951 |
| Short name | T1634 |
| Test name | |
| Test status | |
| Simulation time | 65529210 ps |
| CPU time | 1.15 seconds |
| Started | Sep 04 05:55:42 AM UTC 24 |
| Finished | Sep 04 05:55:45 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3715002951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 21.usbdev_enable.3715002951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_endpoint_access.702882933 |
| Short name | T1638 |
| Test name | |
| Test status | |
| Simulation time | 866547102 ps |
| CPU time | 4.71 seconds |
| Started | Sep 04 05:55:44 AM UTC 24 |
| Finished | Sep 04 05:55:49 AM UTC 24 |
| Peak memory | 217192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=702882933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_endpoint_access.702882933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_endpoint_types.3323083583 |
| Short name | T409 |
| Test name | |
| Test status | |
| Simulation time | 610128099 ps |
| CPU time | 2.56 seconds |
| Started | Sep 04 05:55:44 AM UTC 24 |
| Finished | Sep 04 05:55:47 AM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3323083583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_endpoint_types.3323083583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_fifo_rst.158277284 |
| Short name | T1640 |
| Test name | |
| Test status | |
| Simulation time | 296790238 ps |
| CPU time | 2.72 seconds |
| Started | Sep 04 05:55:46 AM UTC 24 |
| Finished | Sep 04 05:55:50 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=158277284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_fifo_rst.158277284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_in_iso.1725448631 |
| Short name | T1641 |
| Test name | |
| Test status | |
| Simulation time | 177280034 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 05:55:47 AM UTC 24 |
| Finished | Sep 04 05:55:50 AM UTC 24 |
| Peak memory | 215628 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1725448631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 21.usbdev_in_iso.1725448631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_in_stall.2709772830 |
| Short name | T1639 |
| Test name | |
| Test status | |
| Simulation time | 150205916 ps |
| CPU time | 1.35 seconds |
| Started | Sep 04 05:55:47 AM UTC 24 |
| Finished | Sep 04 05:55:50 AM UTC 24 |
| Peak memory | 215272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2709772830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_in_stall.2709772830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_in_trans.2059161096 |
| Short name | T1643 |
| Test name | |
| Test status | |
| Simulation time | 227864053 ps |
| CPU time | 1.69 seconds |
| Started | Sep 04 05:55:49 AM UTC 24 |
| Finished | Sep 04 05:55:51 AM UTC 24 |
| Peak memory | 214888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2059161096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_in_trans.2059161096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_invalid_sync.1977908223 |
| Short name | T1681 |
| Test name | |
| Test status | |
| Simulation time | 2329496496 ps |
| CPU time | 19.35 seconds |
| Started | Sep 04 05:55:46 AM UTC 24 |
| Finished | Sep 04 05:56:06 AM UTC 24 |
| Peak memory | 229660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1977908223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 21.usbdev_invalid_sync.1977908223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_iso_retraction.3988762377 |
| Short name | T1812 |
| Test name | |
| Test status | |
| Simulation time | 12635290039 ps |
| CPU time | 81.2 seconds |
| Started | Sep 04 05:55:49 AM UTC 24 |
| Finished | Sep 04 05:57:12 AM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3988762377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_iso_retraction.3988762377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_link_in_err.4061418388 |
| Short name | T1644 |
| Test name | |
| Test status | |
| Simulation time | 184255599 ps |
| CPU time | 1.6 seconds |
| Started | Sep 04 05:55:49 AM UTC 24 |
| Finished | Sep 04 05:55:51 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4061418388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_link_in_err.4061418388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_link_resume.3947995851 |
| Short name | T1761 |
| Test name | |
| Test status | |
| Simulation time | 31184260091 ps |
| CPU time | 56.44 seconds |
| Started | Sep 04 05:55:49 AM UTC 24 |
| Finished | Sep 04 05:56:47 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3947995851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_link_resume.3947995851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_link_suspend.296491954 |
| Short name | T1676 |
| Test name | |
| Test status | |
| Simulation time | 3876528625 ps |
| CPU time | 13.55 seconds |
| Started | Sep 04 05:55:50 AM UTC 24 |
| Finished | Sep 04 05:56:05 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=296491954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_link_suspend.296491954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_low_speed_traffic.1267847105 |
| Short name | T1874 |
| Test name | |
| Test status | |
| Simulation time | 4158646550 ps |
| CPU time | 114.13 seconds |
| Started | Sep 04 05:55:50 AM UTC 24 |
| Finished | Sep 04 05:57:46 AM UTC 24 |
| Peak memory | 234500 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1267847105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_low_speed_traffic.1267847105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_max_inter_pkt_delay.2278963553 |
| Short name | T1703 |
| Test name | |
| Test status | |
| Simulation time | 2131300161 ps |
| CPU time | 25.43 seconds |
| Started | Sep 04 05:55:51 AM UTC 24 |
| Finished | Sep 04 05:56:18 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2278963553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_inter_pkt_delay.2278963553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_max_length_in_transaction.2826845620 |
| Short name | T1649 |
| Test name | |
| Test status | |
| Simulation time | 240357239 ps |
| CPU time | 1.7 seconds |
| Started | Sep 04 05:55:51 AM UTC 24 |
| Finished | Sep 04 05:55:54 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2826845620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 21.usbdev_max_length_in_transaction.2826845620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_max_length_out_transaction.2971057606 |
| Short name | T1655 |
| Test name | |
| Test status | |
| Simulation time | 189659847 ps |
| CPU time | 1.57 seconds |
| Started | Sep 04 05:55:53 AM UTC 24 |
| Finished | Sep 04 05:55:55 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2971057606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 21.usbdev_max_length_out_transaction.2971057606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_max_non_iso_usb_traffic.2820125980 |
| Short name | T1704 |
| Test name | |
| Test status | |
| Simulation time | 2363867197 ps |
| CPU time | 23.67 seconds |
| Started | Sep 04 05:55:53 AM UTC 24 |
| Finished | Sep 04 05:56:18 AM UTC 24 |
| Peak memory | 229604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2820125980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_non_iso_usb_traffic.2820125980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_min_inter_pkt_delay.601431338 |
| Short name | T1898 |
| Test name | |
| Test status | |
| Simulation time | 4428872124 ps |
| CPU time | 120.14 seconds |
| Started | Sep 04 05:55:53 AM UTC 24 |
| Finished | Sep 04 05:57:55 AM UTC 24 |
| Peak memory | 227760 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=601431338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_min_inter_pkt_delay.601431338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_min_length_in_transaction.2172019455 |
| Short name | T1654 |
| Test name | |
| Test status | |
| Simulation time | 158901995 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 05:55:53 AM UTC 24 |
| Finished | Sep 04 05:55:55 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2172019455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 21.usbdev_min_length_in_transaction.2172019455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_min_length_out_transaction.2920104010 |
| Short name | T1656 |
| Test name | |
| Test status | |
| Simulation time | 138011901 ps |
| CPU time | 1.36 seconds |
| Started | Sep 04 05:55:54 AM UTC 24 |
| Finished | Sep 04 05:55:57 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2920104010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 21.usbdev_min_length_out_transaction.2920104010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_nak_trans.3947300776 |
| Short name | T140 |
| Test name | |
| Test status | |
| Simulation time | 191289074 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 05:55:54 AM UTC 24 |
| Finished | Sep 04 05:55:57 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3947300776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_nak_trans.3947300776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_out_iso.1648182959 |
| Short name | T1658 |
| Test name | |
| Test status | |
| Simulation time | 154701729 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 05:55:54 AM UTC 24 |
| Finished | Sep 04 05:55:57 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1648182959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_out_iso.1648182959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_out_stall.3200522190 |
| Short name | T1657 |
| Test name | |
| Test status | |
| Simulation time | 149701275 ps |
| CPU time | 1.37 seconds |
| Started | Sep 04 05:55:54 AM UTC 24 |
| Finished | Sep 04 05:55:57 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3200522190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_out_stall.3200522190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_out_trans_nak.1455099152 |
| Short name | T1661 |
| Test name | |
| Test status | |
| Simulation time | 166001264 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 05:55:56 AM UTC 24 |
| Finished | Sep 04 05:55:58 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1455099152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 21.usbdev_out_trans_nak.1455099152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_pending_in_trans.2635041957 |
| Short name | T1659 |
| Test name | |
| Test status | |
| Simulation time | 163778087 ps |
| CPU time | 1.06 seconds |
| Started | Sep 04 05:55:56 AM UTC 24 |
| Finished | Sep 04 05:55:58 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2635041957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 21.usbdev_pending_in_trans.2635041957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_phy_config_pinflip.454449820 |
| Short name | T1662 |
| Test name | |
| Test status | |
| Simulation time | 263381627 ps |
| CPU time | 1.87 seconds |
| Started | Sep 04 05:55:56 AM UTC 24 |
| Finished | Sep 04 05:55:59 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=454449820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 21.usbdev_phy_config_pinflip.454449820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_phy_config_usb_ref_disable.2455550122 |
| Short name | T1664 |
| Test name | |
| Test status | |
| Simulation time | 145614040 ps |
| CPU time | 1.03 seconds |
| Started | Sep 04 05:55:58 AM UTC 24 |
| Finished | Sep 04 05:56:00 AM UTC 24 |
| Peak memory | 216224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2455550122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 21.usbdev_phy_config_usb_ref_disable.2455550122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_phy_pins_sense.3227895988 |
| Short name | T1663 |
| Test name | |
| Test status | |
| Simulation time | 35957838 ps |
| CPU time | 1.07 seconds |
| Started | Sep 04 05:55:58 AM UTC 24 |
| Finished | Sep 04 05:56:00 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3227895988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_phy_pins_sense.3227895988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_buffer.2094251476 |
| Short name | T1745 |
| Test name | |
| Test status | |
| Simulation time | 10454344760 ps |
| CPU time | 35.46 seconds |
| Started | Sep 04 05:55:58 AM UTC 24 |
| Finished | Sep 04 05:56:35 AM UTC 24 |
| Peak memory | 226824 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2094251476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_pkt_buffer.2094251476 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_received.2764357923 |
| Short name | T1665 |
| Test name | |
| Test status | |
| Simulation time | 166712230 ps |
| CPU time | 1.35 seconds |
| Started | Sep 04 05:55:58 AM UTC 24 |
| Finished | Sep 04 05:56:00 AM UTC 24 |
| Peak memory | 214916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2764357923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_pkt_received.2764357923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_sent.21790299 |
| Short name | T1666 |
| Test name | |
| Test status | |
| Simulation time | 230115336 ps |
| CPU time | 1.68 seconds |
| Started | Sep 04 05:55:58 AM UTC 24 |
| Finished | Sep 04 05:56:01 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=21790299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 21.usbdev_pkt_sent.21790299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_random_length_in_transaction.263848105 |
| Short name | T1667 |
| Test name | |
| Test status | |
| Simulation time | 200368824 ps |
| CPU time | 1.62 seconds |
| Started | Sep 04 05:55:58 AM UTC 24 |
| Finished | Sep 04 05:56:01 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=263848105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_random_length_in_transaction.263848105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_random_length_out_transaction.2086234833 |
| Short name | T1668 |
| Test name | |
| Test status | |
| Simulation time | 237042300 ps |
| CPU time | 1.67 seconds |
| Started | Sep 04 05:55:58 AM UTC 24 |
| Finished | Sep 04 05:56:01 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2086234833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 21.usbdev_random_length_out_transaction.2086234833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_rx_crc_err.8602262 |
| Short name | T1670 |
| Test name | |
| Test status | |
| Simulation time | 166224571 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 05:55:59 AM UTC 24 |
| Finished | Sep 04 05:56:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=8602262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_rx_crc_err.8602262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_rx_full.1756293190 |
| Short name | T1672 |
| Test name | |
| Test status | |
| Simulation time | 344861534 ps |
| CPU time | 1.68 seconds |
| Started | Sep 04 05:55:59 AM UTC 24 |
| Finished | Sep 04 05:56:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1756293190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_rx_full.1756293190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_setup_stage.627239166 |
| Short name | T1669 |
| Test name | |
| Test status | |
| Simulation time | 160998451 ps |
| CPU time | 1.11 seconds |
| Started | Sep 04 05:55:59 AM UTC 24 |
| Finished | Sep 04 05:56:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=627239166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_setup_stage.627239166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_setup_trans_ignored.2718847842 |
| Short name | T1671 |
| Test name | |
| Test status | |
| Simulation time | 233039428 ps |
| CPU time | 1.57 seconds |
| Started | Sep 04 05:56:00 AM UTC 24 |
| Finished | Sep 04 05:56:02 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2718847842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 21.usbdev_setup_trans_ignored.2718847842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_smoke.3538389983 |
| Short name | T1673 |
| Test name | |
| Test status | |
| Simulation time | 202700191 ps |
| CPU time | 1.64 seconds |
| Started | Sep 04 05:56:01 AM UTC 24 |
| Finished | Sep 04 05:56:03 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3538389983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_smoke.3538389983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_spurious_pids_ignored.3838242959 |
| Short name | T1732 |
| Test name | |
| Test status | |
| Simulation time | 2720482755 ps |
| CPU time | 26.33 seconds |
| Started | Sep 04 05:56:01 AM UTC 24 |
| Finished | Sep 04 05:56:28 AM UTC 24 |
| Peak memory | 234328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3838242959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 21.usbdev_spurious_pids_ignored.3838242959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_stall_priority_over_nak.2804405366 |
| Short name | T1674 |
| Test name | |
| Test status | |
| Simulation time | 211634912 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 05:56:02 AM UTC 24 |
| Finished | Sep 04 05:56:05 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2804405366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_stall_priority_over_nak.2804405366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_stall_trans.3379603844 |
| Short name | T1675 |
| Test name | |
| Test status | |
| Simulation time | 183146534 ps |
| CPU time | 1.6 seconds |
| Started | Sep 04 05:56:02 AM UTC 24 |
| Finished | Sep 04 05:56:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3379603844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_stall_trans.3379603844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_stream_len_max.3684145230 |
| Short name | T1682 |
| Test name | |
| Test status | |
| Simulation time | 720608791 ps |
| CPU time | 4.05 seconds |
| Started | Sep 04 05:56:02 AM UTC 24 |
| Finished | Sep 04 05:56:07 AM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3684145230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_stream_len_max.3684145230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_streaming_out.321183491 |
| Short name | T1563 |
| Test name | |
| Test status | |
| Simulation time | 1850938814 ps |
| CPU time | 13.98 seconds |
| Started | Sep 04 05:56:02 AM UTC 24 |
| Finished | Sep 04 05:56:17 AM UTC 24 |
| Peak memory | 227476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=321183491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_streaming_out.321183491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_timeout_missing_host_handshake.3702529118 |
| Short name | T1683 |
| Test name | |
| Test status | |
| Simulation time | 1248270666 ps |
| CPU time | 24.23 seconds |
| Started | Sep 04 05:55:42 AM UTC 24 |
| Finished | Sep 04 05:56:08 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3702529118 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_timeout_missing_host_handshake.3702529118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/21.usbdev_tx_rx_disruption.1428631122 |
| Short name | T1680 |
| Test name | |
| Test status | |
| Simulation time | 613344072 ps |
| CPU time | 2.81 seconds |
| Started | Sep 04 05:56:02 AM UTC 24 |
| Finished | Sep 04 05:56:06 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1428631122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_t x_rx_disruption.1428631122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/21.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/210.usbdev_tx_rx_disruption.3420617353 |
| Short name | T3527 |
| Test name | |
| Test status | |
| Simulation time | 604255522 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 06:09:04 AM UTC 24 |
| Finished | Sep 04 06:09:32 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3420617353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 210.usbdev_ tx_rx_disruption.3420617353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/210.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/211.usbdev_tx_rx_disruption.2970808704 |
| Short name | T3533 |
| Test name | |
| Test status | |
| Simulation time | 514057836 ps |
| CPU time | 1.61 seconds |
| Started | Sep 04 06:09:05 AM UTC 24 |
| Finished | Sep 04 06:09:32 AM UTC 24 |
| Peak memory | 216428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2970808704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 211.usbdev_ tx_rx_disruption.2970808704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/211.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/212.usbdev_tx_rx_disruption.2147454716 |
| Short name | T3526 |
| Test name | |
| Test status | |
| Simulation time | 442217864 ps |
| CPU time | 1.37 seconds |
| Started | Sep 04 06:09:05 AM UTC 24 |
| Finished | Sep 04 06:09:32 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2147454716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 212.usbdev_ tx_rx_disruption.2147454716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/212.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/213.usbdev_tx_rx_disruption.4025753294 |
| Short name | T3531 |
| Test name | |
| Test status | |
| Simulation time | 584886630 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 06:09:05 AM UTC 24 |
| Finished | Sep 04 06:09:32 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4025753294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 213.usbdev_ tx_rx_disruption.4025753294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/213.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/214.usbdev_tx_rx_disruption.2520538157 |
| Short name | T3546 |
| Test name | |
| Test status | |
| Simulation time | 468690114 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 06:09:05 AM UTC 24 |
| Finished | Sep 04 06:09:35 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2520538157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 214.usbdev_ tx_rx_disruption.2520538157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/214.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/215.usbdev_tx_rx_disruption.637174180 |
| Short name | T3541 |
| Test name | |
| Test status | |
| Simulation time | 487246235 ps |
| CPU time | 1.32 seconds |
| Started | Sep 04 06:09:05 AM UTC 24 |
| Finished | Sep 04 06:09:34 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=637174180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 215.usbdev_t x_rx_disruption.637174180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/215.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/216.usbdev_tx_rx_disruption.2658179034 |
| Short name | T3532 |
| Test name | |
| Test status | |
| Simulation time | 551932805 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 06:09:05 AM UTC 24 |
| Finished | Sep 04 06:09:32 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2658179034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 216.usbdev_ tx_rx_disruption.2658179034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/216.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/217.usbdev_tx_rx_disruption.3117006616 |
| Short name | T3547 |
| Test name | |
| Test status | |
| Simulation time | 503157082 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 06:09:05 AM UTC 24 |
| Finished | Sep 04 06:09:35 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3117006616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 217.usbdev_ tx_rx_disruption.3117006616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/217.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/218.usbdev_tx_rx_disruption.4098112061 |
| Short name | T3549 |
| Test name | |
| Test status | |
| Simulation time | 508866786 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 06:09:05 AM UTC 24 |
| Finished | Sep 04 06:09:35 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4098112061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 218.usbdev_ tx_rx_disruption.4098112061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/218.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/219.usbdev_tx_rx_disruption.460199678 |
| Short name | T3552 |
| Test name | |
| Test status | |
| Simulation time | 495917485 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 06:09:05 AM UTC 24 |
| Finished | Sep 04 06:09:35 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=460199678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 219.usbdev_t x_rx_disruption.460199678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/219.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_alert_test.1664350799 |
| Short name | T1734 |
| Test name | |
| Test status | |
| Simulation time | 48681892 ps |
| CPU time | 1.03 seconds |
| Started | Sep 04 05:56:28 AM UTC 24 |
| Finished | Sep 04 05:56:30 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1664350799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 22.usbdev_alert_test.1664350799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_disconnect.2446346184 |
| Short name | T1707 |
| Test name | |
| Test status | |
| Simulation time | 4723610071 ps |
| CPU time | 15.17 seconds |
| Started | Sep 04 05:56:04 AM UTC 24 |
| Finished | Sep 04 05:56:20 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2446346184 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_disconnect.2446346184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_reset.1074479543 |
| Short name | T1766 |
| Test name | |
| Test status | |
| Simulation time | 20994165845 ps |
| CPU time | 41.39 seconds |
| Started | Sep 04 05:56:05 AM UTC 24 |
| Finished | Sep 04 05:56:48 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1074479543 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_reset.1074479543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_resume.702490821 |
| Short name | T1758 |
| Test name | |
| Test status | |
| Simulation time | 26186100407 ps |
| CPU time | 37.99 seconds |
| Started | Sep 04 05:56:06 AM UTC 24 |
| Finished | Sep 04 05:56:46 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=702490821 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_resume.702490821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_av_buffer.3701953669 |
| Short name | T1684 |
| Test name | |
| Test status | |
| Simulation time | 220397952 ps |
| CPU time | 1.3 seconds |
| Started | Sep 04 05:56:06 AM UTC 24 |
| Finished | Sep 04 05:56:08 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3701953669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_av_buffer.3701953669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_bitstuff_err.1096542199 |
| Short name | T1686 |
| Test name | |
| Test status | |
| Simulation time | 157648324 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 05:56:06 AM UTC 24 |
| Finished | Sep 04 05:56:09 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1096542199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_bitstuff_err.1096542199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_data_toggle_clear.4159162950 |
| Short name | T1687 |
| Test name | |
| Test status | |
| Simulation time | 409005168 ps |
| CPU time | 2.37 seconds |
| Started | Sep 04 05:56:06 AM UTC 24 |
| Finished | Sep 04 05:56:10 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4159162950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 22.usbdev_data_toggle_clear.4159162950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_device_address.1884993748 |
| Short name | T1817 |
| Test name | |
| Test status | |
| Simulation time | 35171441152 ps |
| CPU time | 65.04 seconds |
| Started | Sep 04 05:56:08 AM UTC 24 |
| Finished | Sep 04 05:57:14 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1884993748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_device_address.1884993748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_device_timeout.1355181789 |
| Short name | T1760 |
| Test name | |
| Test status | |
| Simulation time | 1441222730 ps |
| CPU time | 36.98 seconds |
| Started | Sep 04 05:56:08 AM UTC 24 |
| Finished | Sep 04 05:56:46 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1355181789 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_device_timeout.1355181789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_disable_endpoint.1636454992 |
| Short name | T1689 |
| Test name | |
| Test status | |
| Simulation time | 542827132 ps |
| CPU time | 2.44 seconds |
| Started | Sep 04 05:56:08 AM UTC 24 |
| Finished | Sep 04 05:56:11 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1636454992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 22.usbdev_disable_endpoint.1636454992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_disconnected.2733405589 |
| Short name | T1691 |
| Test name | |
| Test status | |
| Simulation time | 147028872 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 05:56:09 AM UTC 24 |
| Finished | Sep 04 05:56:12 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2733405589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_disconnected.2733405589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_enable.2518511708 |
| Short name | T1690 |
| Test name | |
| Test status | |
| Simulation time | 52603364 ps |
| CPU time | 1.12 seconds |
| Started | Sep 04 05:56:09 AM UTC 24 |
| Finished | Sep 04 05:56:11 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2518511708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 22.usbdev_enable.2518511708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_endpoint_access.47891806 |
| Short name | T1700 |
| Test name | |
| Test status | |
| Simulation time | 951356068 ps |
| CPU time | 5.32 seconds |
| Started | Sep 04 05:56:09 AM UTC 24 |
| Finished | Sep 04 05:56:16 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=47891806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 22.usbdev_endpoint_access.47891806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_fifo_levels.51706169 |
| Short name | T1692 |
| Test name | |
| Test status | |
| Simulation time | 168489057 ps |
| CPU time | 1.26 seconds |
| Started | Sep 04 05:56:10 AM UTC 24 |
| Finished | Sep 04 05:56:13 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=51706169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_fifo_levels.51706169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_fifo_rst.57518208 |
| Short name | T1702 |
| Test name | |
| Test status | |
| Simulation time | 474133713 ps |
| CPU time | 4.91 seconds |
| Started | Sep 04 05:56:12 AM UTC 24 |
| Finished | Sep 04 05:56:18 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=57518208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 22.usbdev_fifo_rst.57518208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_in_iso.4170139409 |
| Short name | T1698 |
| Test name | |
| Test status | |
| Simulation time | 241842641 ps |
| CPU time | 1.66 seconds |
| Started | Sep 04 05:56:13 AM UTC 24 |
| Finished | Sep 04 05:56:16 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4170139409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 22.usbdev_in_iso.4170139409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_in_stall.3569345456 |
| Short name | T1697 |
| Test name | |
| Test status | |
| Simulation time | 143763567 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 05:56:13 AM UTC 24 |
| Finished | Sep 04 05:56:15 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3569345456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_in_stall.3569345456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_in_trans.377812172 |
| Short name | T1699 |
| Test name | |
| Test status | |
| Simulation time | 208136652 ps |
| CPU time | 1.62 seconds |
| Started | Sep 04 05:56:13 AM UTC 24 |
| Finished | Sep 04 05:56:16 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=377812172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 22.usbdev_in_trans.377812172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_invalid_sync.883829943 |
| Short name | T1856 |
| Test name | |
| Test status | |
| Simulation time | 3078965226 ps |
| CPU time | 82.19 seconds |
| Started | Sep 04 05:56:13 AM UTC 24 |
| Finished | Sep 04 05:57:37 AM UTC 24 |
| Peak memory | 229584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=883829943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 22.usbdev_invalid_sync.883829943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_iso_retraction.670672751 |
| Short name | T1852 |
| Test name | |
| Test status | |
| Simulation time | 12028942094 ps |
| CPU time | 77.48 seconds |
| Started | Sep 04 05:56:15 AM UTC 24 |
| Finished | Sep 04 05:57:34 AM UTC 24 |
| Peak memory | 217380 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=670672751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 22.usbdev_iso_retraction.670672751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_link_in_err.1128836847 |
| Short name | T1677 |
| Test name | |
| Test status | |
| Simulation time | 164427712 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 05:56:15 AM UTC 24 |
| Finished | Sep 04 05:56:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1128836847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_link_in_err.1128836847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_link_resume.1195861964 |
| Short name | T1822 |
| Test name | |
| Test status | |
| Simulation time | 25284760231 ps |
| CPU time | 61.15 seconds |
| Started | Sep 04 05:56:15 AM UTC 24 |
| Finished | Sep 04 05:57:18 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1195861964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_link_resume.1195861964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_link_suspend.918170411 |
| Short name | T1753 |
| Test name | |
| Test status | |
| Simulation time | 11345277743 ps |
| CPU time | 21.75 seconds |
| Started | Sep 04 05:56:17 AM UTC 24 |
| Finished | Sep 04 05:56:40 AM UTC 24 |
| Peak memory | 217432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=918170411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_link_suspend.918170411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_low_speed_traffic.2984788631 |
| Short name | T1757 |
| Test name | |
| Test status | |
| Simulation time | 3082384342 ps |
| CPU time | 27.2 seconds |
| Started | Sep 04 05:56:17 AM UTC 24 |
| Finished | Sep 04 05:56:45 AM UTC 24 |
| Peak memory | 229668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2984788631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_low_speed_traffic.2984788631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_max_inter_pkt_delay.4054475157 |
| Short name | T1884 |
| Test name | |
| Test status | |
| Simulation time | 3137144625 ps |
| CPU time | 91.76 seconds |
| Started | Sep 04 05:56:17 AM UTC 24 |
| Finished | Sep 04 05:57:50 AM UTC 24 |
| Peak memory | 227548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4054475157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_inter_pkt_delay.4054475157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_max_length_in_transaction.3641050975 |
| Short name | T1706 |
| Test name | |
| Test status | |
| Simulation time | 306035672 ps |
| CPU time | 1.83 seconds |
| Started | Sep 04 05:56:17 AM UTC 24 |
| Finished | Sep 04 05:56:20 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3641050975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 22.usbdev_max_length_in_transaction.3641050975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_max_length_out_transaction.2231147692 |
| Short name | T1705 |
| Test name | |
| Test status | |
| Simulation time | 190516297 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 05:56:17 AM UTC 24 |
| Finished | Sep 04 05:56:19 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2231147692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 22.usbdev_max_length_out_transaction.2231147692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_max_non_iso_usb_traffic.1509873 |
| Short name | T1901 |
| Test name | |
| Test status | |
| Simulation time | 3297632066 ps |
| CPU time | 97.54 seconds |
| Started | Sep 04 05:56:17 AM UTC 24 |
| Finished | Sep 04 05:57:56 AM UTC 24 |
| Peak memory | 229668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1509873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -c m_log /dev/null -cm_name 22.usbdev_max_non_iso_usb_traffic.1509873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_min_inter_pkt_delay.897051875 |
| Short name | T1811 |
| Test name | |
| Test status | |
| Simulation time | 2070264333 ps |
| CPU time | 51.64 seconds |
| Started | Sep 04 05:56:18 AM UTC 24 |
| Finished | Sep 04 05:57:12 AM UTC 24 |
| Peak memory | 227560 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=897051875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_min_inter_pkt_delay.897051875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_min_length_in_transaction.84331605 |
| Short name | T1710 |
| Test name | |
| Test status | |
| Simulation time | 246088660 ps |
| CPU time | 1.68 seconds |
| Started | Sep 04 05:56:19 AM UTC 24 |
| Finished | Sep 04 05:56:21 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=84331605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_ trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 22.usbdev_min_length_in_transaction.84331605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_min_length_out_transaction.1528406589 |
| Short name | T1708 |
| Test name | |
| Test status | |
| Simulation time | 152672935 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 05:56:19 AM UTC 24 |
| Finished | Sep 04 05:56:21 AM UTC 24 |
| Peak memory | 214924 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1528406589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 22.usbdev_min_length_out_transaction.1528406589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_nak_trans.3469957835 |
| Short name | T149 |
| Test name | |
| Test status | |
| Simulation time | 175730347 ps |
| CPU time | 1.27 seconds |
| Started | Sep 04 05:56:19 AM UTC 24 |
| Finished | Sep 04 05:56:21 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3469957835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_nak_trans.3469957835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_out_iso.1524327865 |
| Short name | T1709 |
| Test name | |
| Test status | |
| Simulation time | 173541161 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 05:56:19 AM UTC 24 |
| Finished | Sep 04 05:56:21 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1524327865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 22.usbdev_out_iso.1524327865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_out_stall.2982901651 |
| Short name | T1711 |
| Test name | |
| Test status | |
| Simulation time | 191688829 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 05:56:19 AM UTC 24 |
| Finished | Sep 04 05:56:21 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2982901651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_out_stall.2982901651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_out_trans_nak.3219608946 |
| Short name | T1712 |
| Test name | |
| Test status | |
| Simulation time | 165157766 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 05:56:20 AM UTC 24 |
| Finished | Sep 04 05:56:22 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3219608946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 22.usbdev_out_trans_nak.3219608946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_pending_in_trans.2751587746 |
| Short name | T1715 |
| Test name | |
| Test status | |
| Simulation time | 146425867 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 05:56:21 AM UTC 24 |
| Finished | Sep 04 05:56:23 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2751587746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 22.usbdev_pending_in_trans.2751587746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_phy_config_pinflip.3670113770 |
| Short name | T1714 |
| Test name | |
| Test status | |
| Simulation time | 277218490 ps |
| CPU time | 1.31 seconds |
| Started | Sep 04 05:56:21 AM UTC 24 |
| Finished | Sep 04 05:56:23 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3670113770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 22.usbdev_phy_config_pinflip.3670113770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_phy_config_usb_ref_disable.3844978481 |
| Short name | T1719 |
| Test name | |
| Test status | |
| Simulation time | 146493696 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 05:56:22 AM UTC 24 |
| Finished | Sep 04 05:56:25 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3844978481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 22.usbdev_phy_config_usb_ref_disable.3844978481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_phy_pins_sense.3612458567 |
| Short name | T1717 |
| Test name | |
| Test status | |
| Simulation time | 49193985 ps |
| CPU time | 1.1 seconds |
| Started | Sep 04 05:56:22 AM UTC 24 |
| Finished | Sep 04 05:56:25 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3612458567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_phy_pins_sense.3612458567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_buffer.662142559 |
| Short name | T1831 |
| Test name | |
| Test status | |
| Simulation time | 15450345869 ps |
| CPU time | 57.31 seconds |
| Started | Sep 04 05:56:23 AM UTC 24 |
| Finished | Sep 04 05:57:21 AM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=662142559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_pkt_buffer.662142559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_received.120078154 |
| Short name | T1720 |
| Test name | |
| Test status | |
| Simulation time | 183487442 ps |
| CPU time | 1.35 seconds |
| Started | Sep 04 05:56:23 AM UTC 24 |
| Finished | Sep 04 05:56:25 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=120078154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_pkt_received.120078154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_sent.3761072088 |
| Short name | T1718 |
| Test name | |
| Test status | |
| Simulation time | 176992974 ps |
| CPU time | 1.06 seconds |
| Started | Sep 04 05:56:23 AM UTC 24 |
| Finished | Sep 04 05:56:25 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3761072088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_pkt_sent.3761072088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_random_length_in_transaction.3196451372 |
| Short name | T1723 |
| Test name | |
| Test status | |
| Simulation time | 227495466 ps |
| CPU time | 1.03 seconds |
| Started | Sep 04 05:56:24 AM UTC 24 |
| Finished | Sep 04 05:56:26 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3196451372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 22.usbdev_random_length_in_transaction.3196451372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_random_length_out_transaction.3023247564 |
| Short name | T1722 |
| Test name | |
| Test status | |
| Simulation time | 176864174 ps |
| CPU time | 1 seconds |
| Started | Sep 04 05:56:24 AM UTC 24 |
| Finished | Sep 04 05:56:26 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3023247564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 22.usbdev_random_length_out_transaction.3023247564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_rx_crc_err.2613490157 |
| Short name | T1725 |
| Test name | |
| Test status | |
| Simulation time | 165569889 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 05:56:24 AM UTC 24 |
| Finished | Sep 04 05:56:26 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2613490157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 22.usbdev_rx_crc_err.2613490157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_rx_full.1532643061 |
| Short name | T1727 |
| Test name | |
| Test status | |
| Simulation time | 380794646 ps |
| CPU time | 2.41 seconds |
| Started | Sep 04 05:56:24 AM UTC 24 |
| Finished | Sep 04 05:56:27 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1532643061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 22.usbdev_rx_full.1532643061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_setup_stage.341862422 |
| Short name | T1730 |
| Test name | |
| Test status | |
| Simulation time | 151877099 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 05:56:25 AM UTC 24 |
| Finished | Sep 04 05:56:28 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=341862422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 22.usbdev_setup_stage.341862422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_setup_trans_ignored.4189468505 |
| Short name | T1728 |
| Test name | |
| Test status | |
| Simulation time | 156997430 ps |
| CPU time | 1.04 seconds |
| Started | Sep 04 05:56:26 AM UTC 24 |
| Finished | Sep 04 05:56:27 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4189468505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 22.usbdev_setup_trans_ignored.4189468505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_smoke.1969750526 |
| Short name | T1729 |
| Test name | |
| Test status | |
| Simulation time | 238045334 ps |
| CPU time | 1.29 seconds |
| Started | Sep 04 05:56:26 AM UTC 24 |
| Finished | Sep 04 05:56:28 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1969750526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_smoke.1969750526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_spurious_pids_ignored.3971164897 |
| Short name | T1763 |
| Test name | |
| Test status | |
| Simulation time | 2787205889 ps |
| CPU time | 20.41 seconds |
| Started | Sep 04 05:56:26 AM UTC 24 |
| Finished | Sep 04 05:56:47 AM UTC 24 |
| Peak memory | 229524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3971164897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 22.usbdev_spurious_pids_ignored.3971164897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_stall_priority_over_nak.1777737069 |
| Short name | T1731 |
| Test name | |
| Test status | |
| Simulation time | 181330073 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 05:56:26 AM UTC 24 |
| Finished | Sep 04 05:56:28 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1777737069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_stall_priority_over_nak.1777737069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_stall_trans.2315868691 |
| Short name | T1735 |
| Test name | |
| Test status | |
| Simulation time | 211051165 ps |
| CPU time | 1.66 seconds |
| Started | Sep 04 05:56:27 AM UTC 24 |
| Finished | Sep 04 05:56:30 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2315868691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_stall_trans.2315868691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_stream_len_max.3885405271 |
| Short name | T1737 |
| Test name | |
| Test status | |
| Simulation time | 338287441 ps |
| CPU time | 2.04 seconds |
| Started | Sep 04 05:56:27 AM UTC 24 |
| Finished | Sep 04 05:56:30 AM UTC 24 |
| Peak memory | 216516 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3885405271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_stream_len_max.3885405271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_streaming_out.3937476996 |
| Short name | T1943 |
| Test name | |
| Test status | |
| Simulation time | 4142110972 ps |
| CPU time | 107.67 seconds |
| Started | Sep 04 05:56:27 AM UTC 24 |
| Finished | Sep 04 05:58:17 AM UTC 24 |
| Peak memory | 227072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3937476996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_streaming_out.3937476996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_timeout_missing_host_handshake.688770540 |
| Short name | T1688 |
| Test name | |
| Test status | |
| Simulation time | 150556977 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 05:56:08 AM UTC 24 |
| Finished | Sep 04 05:56:10 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=688770540 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_timeout_missing_host_handshake.688770540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/22.usbdev_tx_rx_disruption.467094251 |
| Short name | T1736 |
| Test name | |
| Test status | |
| Simulation time | 559359985 ps |
| CPU time | 1.77 seconds |
| Started | Sep 04 05:56:27 AM UTC 24 |
| Finished | Sep 04 05:56:30 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=467094251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_tx _rx_disruption.467094251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/22.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/220.usbdev_tx_rx_disruption.3082442670 |
| Short name | T3555 |
| Test name | |
| Test status | |
| Simulation time | 463460907 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 06:09:05 AM UTC 24 |
| Finished | Sep 04 06:09:35 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3082442670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 220.usbdev_ tx_rx_disruption.3082442670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/220.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/221.usbdev_tx_rx_disruption.280046924 |
| Short name | T3559 |
| Test name | |
| Test status | |
| Simulation time | 502049822 ps |
| CPU time | 1.62 seconds |
| Started | Sep 04 06:09:05 AM UTC 24 |
| Finished | Sep 04 06:09:35 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=280046924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 221.usbdev_t x_rx_disruption.280046924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/221.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/222.usbdev_tx_rx_disruption.1583190513 |
| Short name | T3494 |
| Test name | |
| Test status | |
| Simulation time | 498150698 ps |
| CPU time | 1.33 seconds |
| Started | Sep 04 06:09:05 AM UTC 24 |
| Finished | Sep 04 06:09:08 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1583190513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 222.usbdev_ tx_rx_disruption.1583190513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/222.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/223.usbdev_tx_rx_disruption.2968954504 |
| Short name | T3496 |
| Test name | |
| Test status | |
| Simulation time | 516246427 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 06:09:05 AM UTC 24 |
| Finished | Sep 04 06:09:08 AM UTC 24 |
| Peak memory | 217016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2968954504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 223.usbdev_ tx_rx_disruption.2968954504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/223.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/224.usbdev_tx_rx_disruption.1417880790 |
| Short name | T3495 |
| Test name | |
| Test status | |
| Simulation time | 488466193 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 06:09:05 AM UTC 24 |
| Finished | Sep 04 06:09:08 AM UTC 24 |
| Peak memory | 214920 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1417880790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 224.usbdev_ tx_rx_disruption.1417880790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/224.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/225.usbdev_tx_rx_disruption.2389989418 |
| Short name | T3497 |
| Test name | |
| Test status | |
| Simulation time | 574910732 ps |
| CPU time | 1.62 seconds |
| Started | Sep 04 06:09:05 AM UTC 24 |
| Finished | Sep 04 06:09:08 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2389989418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 225.usbdev_ tx_rx_disruption.2389989418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/225.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/226.usbdev_tx_rx_disruption.2303838001 |
| Short name | T3500 |
| Test name | |
| Test status | |
| Simulation time | 538014328 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 06:09:06 AM UTC 24 |
| Finished | Sep 04 06:09:09 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2303838001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 226.usbdev_ tx_rx_disruption.2303838001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/226.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/227.usbdev_tx_rx_disruption.3581072578 |
| Short name | T3498 |
| Test name | |
| Test status | |
| Simulation time | 456945695 ps |
| CPU time | 1.29 seconds |
| Started | Sep 04 06:09:06 AM UTC 24 |
| Finished | Sep 04 06:09:09 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3581072578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 227.usbdev_ tx_rx_disruption.3581072578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/227.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/228.usbdev_tx_rx_disruption.905299992 |
| Short name | T3501 |
| Test name | |
| Test status | |
| Simulation time | 504717126 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 06:09:06 AM UTC 24 |
| Finished | Sep 04 06:09:09 AM UTC 24 |
| Peak memory | 216684 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=905299992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 228.usbdev_t x_rx_disruption.905299992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/228.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/229.usbdev_tx_rx_disruption.1039765519 |
| Short name | T3510 |
| Test name | |
| Test status | |
| Simulation time | 538483770 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 06:09:06 AM UTC 24 |
| Finished | Sep 04 06:09:19 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1039765519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 229.usbdev_ tx_rx_disruption.1039765519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/229.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_alert_test.1474155531 |
| Short name | T1790 |
| Test name | |
| Test status | |
| Simulation time | 44717573 ps |
| CPU time | 1.04 seconds |
| Started | Sep 04 05:56:56 AM UTC 24 |
| Finished | Sep 04 05:56:58 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1474155531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 23.usbdev_alert_test.1474155531 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_disconnect.1104034818 |
| Short name | T1764 |
| Test name | |
| Test status | |
| Simulation time | 6663857962 ps |
| CPU time | 17.45 seconds |
| Started | Sep 04 05:56:29 AM UTC 24 |
| Finished | Sep 04 05:56:47 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1104034818 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_disconnect.1104034818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_reset.2600528928 |
| Short name | T1782 |
| Test name | |
| Test status | |
| Simulation time | 18674521988 ps |
| CPU time | 24.87 seconds |
| Started | Sep 04 05:56:29 AM UTC 24 |
| Finished | Sep 04 05:56:55 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2600528928 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_reset.2600528928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_resume.574540497 |
| Short name | T1841 |
| Test name | |
| Test status | |
| Simulation time | 26047954029 ps |
| CPU time | 55.15 seconds |
| Started | Sep 04 05:56:29 AM UTC 24 |
| Finished | Sep 04 05:57:25 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=574540497 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_resume.574540497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_av_buffer.3908469789 |
| Short name | T1739 |
| Test name | |
| Test status | |
| Simulation time | 183877202 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 05:56:29 AM UTC 24 |
| Finished | Sep 04 05:56:31 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3908469789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_av_buffer.3908469789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_bitstuff_err.4013173939 |
| Short name | T1738 |
| Test name | |
| Test status | |
| Simulation time | 141803485 ps |
| CPU time | 1.09 seconds |
| Started | Sep 04 05:56:29 AM UTC 24 |
| Finished | Sep 04 05:56:31 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4013173939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_bitstuff_err.4013173939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_data_toggle_clear.3611710704 |
| Short name | T1744 |
| Test name | |
| Test status | |
| Simulation time | 662602706 ps |
| CPU time | 3.56 seconds |
| Started | Sep 04 05:56:30 AM UTC 24 |
| Finished | Sep 04 05:56:35 AM UTC 24 |
| Peak memory | 217044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3611710704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 23.usbdev_data_toggle_clear.3611710704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_data_toggle_restore.4149693508 |
| Short name | T1746 |
| Test name | |
| Test status | |
| Simulation time | 831653310 ps |
| CPU time | 4.23 seconds |
| Started | Sep 04 05:56:30 AM UTC 24 |
| Finished | Sep 04 05:56:36 AM UTC 24 |
| Peak memory | 217148 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4149693508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_data_toggle_restore.4149693508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_device_address.4230424465 |
| Short name | T363 |
| Test name | |
| Test status | |
| Simulation time | 29647979142 ps |
| CPU time | 57.47 seconds |
| Started | Sep 04 05:56:30 AM UTC 24 |
| Finished | Sep 04 05:57:29 AM UTC 24 |
| Peak memory | 217472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4230424465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_device_address.4230424465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_device_timeout.1530906676 |
| Short name | T1765 |
| Test name | |
| Test status | |
| Simulation time | 602723762 ps |
| CPU time | 15.81 seconds |
| Started | Sep 04 05:56:30 AM UTC 24 |
| Finished | Sep 04 05:56:47 AM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1530906676 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_device_timeout.1530906676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_disable_endpoint.560553007 |
| Short name | T1748 |
| Test name | |
| Test status | |
| Simulation time | 1041804688 ps |
| CPU time | 4.51 seconds |
| Started | Sep 04 05:56:32 AM UTC 24 |
| Finished | Sep 04 05:56:37 AM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=560553007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_disable_endpoint.560553007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_disconnected.4284543367 |
| Short name | T1743 |
| Test name | |
| Test status | |
| Simulation time | 139486213 ps |
| CPU time | 1.24 seconds |
| Started | Sep 04 05:56:32 AM UTC 24 |
| Finished | Sep 04 05:56:34 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4284543367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_disconnected.4284543367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_enable.470001335 |
| Short name | T1742 |
| Test name | |
| Test status | |
| Simulation time | 37965494 ps |
| CPU time | 1.06 seconds |
| Started | Sep 04 05:56:32 AM UTC 24 |
| Finished | Sep 04 05:56:34 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=470001335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_enable.470001335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_endpoint_access.2279822237 |
| Short name | T1747 |
| Test name | |
| Test status | |
| Simulation time | 853778401 ps |
| CPU time | 4.13 seconds |
| Started | Sep 04 05:56:32 AM UTC 24 |
| Finished | Sep 04 05:56:37 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2279822237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_endpoint_access.2279822237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_endpoint_types.1140478109 |
| Short name | T413 |
| Test name | |
| Test status | |
| Simulation time | 300025048 ps |
| CPU time | 2.13 seconds |
| Started | Sep 04 05:56:33 AM UTC 24 |
| Finished | Sep 04 05:56:36 AM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1140478109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_endpoint_types.1140478109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_fifo_levels.2921987612 |
| Short name | T526 |
| Test name | |
| Test status | |
| Simulation time | 151292078 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 05:56:34 AM UTC 24 |
| Finished | Sep 04 05:56:37 AM UTC 24 |
| Peak memory | 214840 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2921987612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_fifo_levels.2921987612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_fifo_rst.297747448 |
| Short name | T1749 |
| Test name | |
| Test status | |
| Simulation time | 226959293 ps |
| CPU time | 2.55 seconds |
| Started | Sep 04 05:56:34 AM UTC 24 |
| Finished | Sep 04 05:56:38 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=297747448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 23.usbdev_fifo_rst.297747448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_in_iso.1954695395 |
| Short name | T1751 |
| Test name | |
| Test status | |
| Simulation time | 169219666 ps |
| CPU time | 1.63 seconds |
| Started | Sep 04 05:56:36 AM UTC 24 |
| Finished | Sep 04 05:56:39 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1954695395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 23.usbdev_in_iso.1954695395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_in_stall.862559051 |
| Short name | T1750 |
| Test name | |
| Test status | |
| Simulation time | 136605188 ps |
| CPU time | 1.36 seconds |
| Started | Sep 04 05:56:36 AM UTC 24 |
| Finished | Sep 04 05:56:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=862559051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 23.usbdev_in_stall.862559051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_in_trans.3421958562 |
| Short name | T1752 |
| Test name | |
| Test status | |
| Simulation time | 254094163 ps |
| CPU time | 1.85 seconds |
| Started | Sep 04 05:56:36 AM UTC 24 |
| Finished | Sep 04 05:56:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3421958562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_in_trans.3421958562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_invalid_sync.2131893081 |
| Short name | T1942 |
| Test name | |
| Test status | |
| Simulation time | 3801713435 ps |
| CPU time | 99.9 seconds |
| Started | Sep 04 05:56:35 AM UTC 24 |
| Finished | Sep 04 05:58:16 AM UTC 24 |
| Peak memory | 234168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2131893081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 23.usbdev_invalid_sync.2131893081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_iso_retraction.3353379250 |
| Short name | T1932 |
| Test name | |
| Test status | |
| Simulation time | 10889159183 ps |
| CPU time | 92.64 seconds |
| Started | Sep 04 05:56:37 AM UTC 24 |
| Finished | Sep 04 05:58:12 AM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3353379250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_iso_retraction.3353379250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_link_in_err.1626471892 |
| Short name | T1754 |
| Test name | |
| Test status | |
| Simulation time | 187413291 ps |
| CPU time | 1.62 seconds |
| Started | Sep 04 05:56:37 AM UTC 24 |
| Finished | Sep 04 05:56:40 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1626471892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_link_in_err.1626471892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_link_resume.1932035075 |
| Short name | T1789 |
| Test name | |
| Test status | |
| Simulation time | 30298922014 ps |
| CPU time | 52.35 seconds |
| Started | Sep 04 05:56:39 AM UTC 24 |
| Finished | Sep 04 05:57:33 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1932035075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_link_resume.1932035075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_link_suspend.256976734 |
| Short name | T1778 |
| Test name | |
| Test status | |
| Simulation time | 8347491312 ps |
| CPU time | 13.66 seconds |
| Started | Sep 04 05:56:39 AM UTC 24 |
| Finished | Sep 04 05:56:54 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=256976734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_link_suspend.256976734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_low_speed_traffic.2073606274 |
| Short name | T2028 |
| Test name | |
| Test status | |
| Simulation time | 4497551792 ps |
| CPU time | 136.76 seconds |
| Started | Sep 04 05:56:39 AM UTC 24 |
| Finished | Sep 04 05:58:58 AM UTC 24 |
| Peak memory | 229752 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2073606274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_low_speed_traffic.2073606274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_max_inter_pkt_delay.4275621296 |
| Short name | T1970 |
| Test name | |
| Test status | |
| Simulation time | 3865987267 ps |
| CPU time | 108.88 seconds |
| Started | Sep 04 05:56:40 AM UTC 24 |
| Finished | Sep 04 05:58:31 AM UTC 24 |
| Peak memory | 227548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4275621296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_inter_pkt_delay.4275621296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_max_length_in_transaction.1201875422 |
| Short name | T1756 |
| Test name | |
| Test status | |
| Simulation time | 341710273 ps |
| CPU time | 2.09 seconds |
| Started | Sep 04 05:56:40 AM UTC 24 |
| Finished | Sep 04 05:56:43 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1201875422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 23.usbdev_max_length_in_transaction.1201875422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_max_length_out_transaction.3488576443 |
| Short name | T1755 |
| Test name | |
| Test status | |
| Simulation time | 216417671 ps |
| CPU time | 1.66 seconds |
| Started | Sep 04 05:56:40 AM UTC 24 |
| Finished | Sep 04 05:56:43 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3488576443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 23.usbdev_max_length_out_transaction.3488576443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_max_non_iso_usb_traffic.2882210685 |
| Short name | T1801 |
| Test name | |
| Test status | |
| Simulation time | 2325695783 ps |
| CPU time | 22.99 seconds |
| Started | Sep 04 05:56:41 AM UTC 24 |
| Finished | Sep 04 05:57:06 AM UTC 24 |
| Peak memory | 229652 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2882210685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_non_iso_usb_traffic.2882210685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_min_inter_pkt_delay.2518712384 |
| Short name | T1825 |
| Test name | |
| Test status | |
| Simulation time | 3929511185 ps |
| CPU time | 36.28 seconds |
| Started | Sep 04 05:56:41 AM UTC 24 |
| Finished | Sep 04 05:57:19 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2518712384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_min_inter_pkt_delay.2518712384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_min_length_in_transaction.4202702571 |
| Short name | T1759 |
| Test name | |
| Test status | |
| Simulation time | 159981254 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 05:56:44 AM UTC 24 |
| Finished | Sep 04 05:56:46 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4202702571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_min_length_in_transaction.4202702571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_min_length_out_transaction.4079554106 |
| Short name | T1762 |
| Test name | |
| Test status | |
| Simulation time | 154864313 ps |
| CPU time | 1.31 seconds |
| Started | Sep 04 05:56:45 AM UTC 24 |
| Finished | Sep 04 05:56:47 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4079554106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 23.usbdev_min_length_out_transaction.4079554106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_nak_trans.2917911984 |
| Short name | T135 |
| Test name | |
| Test status | |
| Simulation time | 218274861 ps |
| CPU time | 1.67 seconds |
| Started | Sep 04 05:56:46 AM UTC 24 |
| Finished | Sep 04 05:56:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2917911984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_nak_trans.2917911984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_out_iso.2674732944 |
| Short name | T1769 |
| Test name | |
| Test status | |
| Simulation time | 202614092 ps |
| CPU time | 1.68 seconds |
| Started | Sep 04 05:56:47 AM UTC 24 |
| Finished | Sep 04 05:56:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2674732944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 23.usbdev_out_iso.2674732944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_out_stall.1287791768 |
| Short name | T1767 |
| Test name | |
| Test status | |
| Simulation time | 169187204 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 05:56:47 AM UTC 24 |
| Finished | Sep 04 05:56:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1287791768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_out_stall.1287791768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_out_trans_nak.2832216185 |
| Short name | T1768 |
| Test name | |
| Test status | |
| Simulation time | 172880429 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 05:56:47 AM UTC 24 |
| Finished | Sep 04 05:56:50 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2832216185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 23.usbdev_out_trans_nak.2832216185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_pending_in_trans.1193858938 |
| Short name | T1771 |
| Test name | |
| Test status | |
| Simulation time | 157606617 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 05:56:49 AM UTC 24 |
| Finished | Sep 04 05:56:51 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1193858938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 23.usbdev_pending_in_trans.1193858938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_phy_config_pinflip.99208107 |
| Short name | T1774 |
| Test name | |
| Test status | |
| Simulation time | 264769039 ps |
| CPU time | 1.89 seconds |
| Started | Sep 04 05:56:49 AM UTC 24 |
| Finished | Sep 04 05:56:51 AM UTC 24 |
| Peak memory | 214536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=99208107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_p inflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 23.usbdev_phy_config_pinflip.99208107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_phy_config_usb_ref_disable.1355475079 |
| Short name | T1773 |
| Test name | |
| Test status | |
| Simulation time | 193293899 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 05:56:49 AM UTC 24 |
| Finished | Sep 04 05:56:51 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1355475079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 23.usbdev_phy_config_usb_ref_disable.1355475079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_phy_pins_sense.2554731452 |
| Short name | T1770 |
| Test name | |
| Test status | |
| Simulation time | 41277467 ps |
| CPU time | 1.08 seconds |
| Started | Sep 04 05:56:49 AM UTC 24 |
| Finished | Sep 04 05:56:51 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2554731452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_phy_pins_sense.2554731452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_buffer.1142696222 |
| Short name | T1828 |
| Test name | |
| Test status | |
| Simulation time | 6717565453 ps |
| CPU time | 30.53 seconds |
| Started | Sep 04 05:56:49 AM UTC 24 |
| Finished | Sep 04 05:57:21 AM UTC 24 |
| Peak memory | 231760 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1142696222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 23.usbdev_pkt_buffer.1142696222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_received.3062280654 |
| Short name | T1772 |
| Test name | |
| Test status | |
| Simulation time | 194610759 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:56:49 AM UTC 24 |
| Finished | Sep 04 05:56:51 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3062280654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_pkt_received.3062280654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_sent.2171972135 |
| Short name | T1777 |
| Test name | |
| Test status | |
| Simulation time | 226684776 ps |
| CPU time | 1.7 seconds |
| Started | Sep 04 05:56:50 AM UTC 24 |
| Finished | Sep 04 05:56:53 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2171972135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_pkt_sent.2171972135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_random_length_in_transaction.1729623446 |
| Short name | T1776 |
| Test name | |
| Test status | |
| Simulation time | 221894375 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 05:56:50 AM UTC 24 |
| Finished | Sep 04 05:56:53 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1729623446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 23.usbdev_random_length_in_transaction.1729623446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_random_length_out_transaction.2194076316 |
| Short name | T1775 |
| Test name | |
| Test status | |
| Simulation time | 175885719 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 05:56:50 AM UTC 24 |
| Finished | Sep 04 05:56:52 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2194076316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_random_length_out_transaction.2194076316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_rx_crc_err.2826253743 |
| Short name | T1780 |
| Test name | |
| Test status | |
| Simulation time | 182250824 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:56:51 AM UTC 24 |
| Finished | Sep 04 05:56:54 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2826253743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 23.usbdev_rx_crc_err.2826253743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_rx_full.1949539608 |
| Short name | T523 |
| Test name | |
| Test status | |
| Simulation time | 326472092 ps |
| CPU time | 2.19 seconds |
| Started | Sep 04 05:56:51 AM UTC 24 |
| Finished | Sep 04 05:56:55 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1949539608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 23.usbdev_rx_full.1949539608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_setup_stage.2706872687 |
| Short name | T1783 |
| Test name | |
| Test status | |
| Simulation time | 152672102 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 05:56:53 AM UTC 24 |
| Finished | Sep 04 05:56:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2706872687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_setup_stage.2706872687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_setup_trans_ignored.1739080791 |
| Short name | T1784 |
| Test name | |
| Test status | |
| Simulation time | 156818052 ps |
| CPU time | 1.36 seconds |
| Started | Sep 04 05:56:53 AM UTC 24 |
| Finished | Sep 04 05:56:55 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1739080791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 23.usbdev_setup_trans_ignored.1739080791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_smoke.658298777 |
| Short name | T1781 |
| Test name | |
| Test status | |
| Simulation time | 190098164 ps |
| CPU time | 1.2 seconds |
| Started | Sep 04 05:56:53 AM UTC 24 |
| Finished | Sep 04 05:56:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=658298777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_smoke.658298777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_spurious_pids_ignored.1061431636 |
| Short name | T1816 |
| Test name | |
| Test status | |
| Simulation time | 2948725134 ps |
| CPU time | 19.91 seconds |
| Started | Sep 04 05:56:53 AM UTC 24 |
| Finished | Sep 04 05:57:14 AM UTC 24 |
| Peak memory | 227760 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1061431636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 23.usbdev_spurious_pids_ignored.1061431636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_stall_priority_over_nak.1885510058 |
| Short name | T1786 |
| Test name | |
| Test status | |
| Simulation time | 188392257 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 05:56:54 AM UTC 24 |
| Finished | Sep 04 05:56:57 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1885510058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_stall_priority_over_nak.1885510058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_stall_trans.4284486912 |
| Short name | T1785 |
| Test name | |
| Test status | |
| Simulation time | 175794660 ps |
| CPU time | 1.32 seconds |
| Started | Sep 04 05:56:54 AM UTC 24 |
| Finished | Sep 04 05:56:57 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4284486912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_stall_trans.4284486912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_stream_len_max.1097874671 |
| Short name | T1792 |
| Test name | |
| Test status | |
| Simulation time | 1052137744 ps |
| CPU time | 4.72 seconds |
| Started | Sep 04 05:56:54 AM UTC 24 |
| Finished | Sep 04 05:57:00 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1097874671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_stream_len_max.1097874671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_streaming_out.1378068784 |
| Short name | T1863 |
| Test name | |
| Test status | |
| Simulation time | 3990333042 ps |
| CPU time | 44.95 seconds |
| Started | Sep 04 05:56:54 AM UTC 24 |
| Finished | Sep 04 05:57:41 AM UTC 24 |
| Peak memory | 228328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1378068784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_streaming_out.1378068784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_timeout_missing_host_handshake.3264887828 |
| Short name | T1795 |
| Test name | |
| Test status | |
| Simulation time | 2974814940 ps |
| CPU time | 27.83 seconds |
| Started | Sep 04 05:56:32 AM UTC 24 |
| Finished | Sep 04 05:57:01 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3264887828 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_timeout_missing_host_handshake.3264887828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/23.usbdev_tx_rx_disruption.908551607 |
| Short name | T1787 |
| Test name | |
| Test status | |
| Simulation time | 508738982 ps |
| CPU time | 1.83 seconds |
| Started | Sep 04 05:56:54 AM UTC 24 |
| Finished | Sep 04 05:56:57 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=908551607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_tx _rx_disruption.908551607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/23.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/230.usbdev_tx_rx_disruption.1465663978 |
| Short name | T3502 |
| Test name | |
| Test status | |
| Simulation time | 557280947 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 06:09:06 AM UTC 24 |
| Finished | Sep 04 06:09:09 AM UTC 24 |
| Peak memory | 216448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1465663978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 230.usbdev_ tx_rx_disruption.1465663978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/230.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/231.usbdev_tx_rx_disruption.204913566 |
| Short name | T3517 |
| Test name | |
| Test status | |
| Simulation time | 663631138 ps |
| CPU time | 1.77 seconds |
| Started | Sep 04 06:09:06 AM UTC 24 |
| Finished | Sep 04 06:09:19 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=204913566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 231.usbdev_t x_rx_disruption.204913566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/231.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/232.usbdev_tx_rx_disruption.615346446 |
| Short name | T3516 |
| Test name | |
| Test status | |
| Simulation time | 608022326 ps |
| CPU time | 1.67 seconds |
| Started | Sep 04 06:09:07 AM UTC 24 |
| Finished | Sep 04 06:09:19 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=615346446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 232.usbdev_t x_rx_disruption.615346446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/232.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/233.usbdev_tx_rx_disruption.2494703269 |
| Short name | T3514 |
| Test name | |
| Test status | |
| Simulation time | 577811215 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 06:09:07 AM UTC 24 |
| Finished | Sep 04 06:09:19 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2494703269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 233.usbdev_ tx_rx_disruption.2494703269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/233.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/234.usbdev_tx_rx_disruption.1370271182 |
| Short name | T3513 |
| Test name | |
| Test status | |
| Simulation time | 559895232 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 06:09:07 AM UTC 24 |
| Finished | Sep 04 06:09:19 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1370271182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 234.usbdev_ tx_rx_disruption.1370271182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/234.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/235.usbdev_tx_rx_disruption.810865576 |
| Short name | T3518 |
| Test name | |
| Test status | |
| Simulation time | 639867635 ps |
| CPU time | 1.64 seconds |
| Started | Sep 04 06:09:07 AM UTC 24 |
| Finished | Sep 04 06:09:19 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=810865576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 235.usbdev_t x_rx_disruption.810865576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/235.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/236.usbdev_tx_rx_disruption.498886616 |
| Short name | T3508 |
| Test name | |
| Test status | |
| Simulation time | 570919646 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 06:09:09 AM UTC 24 |
| Finished | Sep 04 06:09:18 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=498886616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 236.usbdev_t x_rx_disruption.498886616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/236.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/237.usbdev_tx_rx_disruption.836951221 |
| Short name | T3558 |
| Test name | |
| Test status | |
| Simulation time | 469875195 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 06:09:09 AM UTC 24 |
| Finished | Sep 04 06:09:35 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=836951221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 237.usbdev_t x_rx_disruption.836951221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/237.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/238.usbdev_tx_rx_disruption.4220639313 |
| Short name | T3509 |
| Test name | |
| Test status | |
| Simulation time | 616268875 ps |
| CPU time | 1.63 seconds |
| Started | Sep 04 06:09:09 AM UTC 24 |
| Finished | Sep 04 06:09:19 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4220639313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 238.usbdev_ tx_rx_disruption.4220639313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/238.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/239.usbdev_tx_rx_disruption.2192962017 |
| Short name | T3557 |
| Test name | |
| Test status | |
| Simulation time | 455217432 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 06:09:09 AM UTC 24 |
| Finished | Sep 04 06:09:35 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2192962017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 239.usbdev_ tx_rx_disruption.2192962017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/239.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_alert_test.4144772252 |
| Short name | T1846 |
| Test name | |
| Test status | |
| Simulation time | 42113254 ps |
| CPU time | 0.94 seconds |
| Started | Sep 04 05:57:25 AM UTC 24 |
| Finished | Sep 04 05:57:27 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4144772252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 24.usbdev_alert_test.4144772252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_disconnect.3392938527 |
| Short name | T1808 |
| Test name | |
| Test status | |
| Simulation time | 4336715548 ps |
| CPU time | 12.19 seconds |
| Started | Sep 04 05:56:56 AM UTC 24 |
| Finished | Sep 04 05:57:10 AM UTC 24 |
| Peak memory | 227500 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3392938527 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_disconnect.3392938527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_reset.1591046186 |
| Short name | T1845 |
| Test name | |
| Test status | |
| Simulation time | 19187085063 ps |
| CPU time | 35.93 seconds |
| Started | Sep 04 05:56:56 AM UTC 24 |
| Finished | Sep 04 05:57:34 AM UTC 24 |
| Peak memory | 217188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1591046186 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_reset.1591046186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_resume.529985175 |
| Short name | T1867 |
| Test name | |
| Test status | |
| Simulation time | 25214179036 ps |
| CPU time | 44.21 seconds |
| Started | Sep 04 05:56:56 AM UTC 24 |
| Finished | Sep 04 05:57:42 AM UTC 24 |
| Peak memory | 227476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=529985175 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_resume.529985175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_av_buffer.3217176818 |
| Short name | T1791 |
| Test name | |
| Test status | |
| Simulation time | 165409347 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 05:56:56 AM UTC 24 |
| Finished | Sep 04 05:56:59 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3217176818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_av_buffer.3217176818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_bitstuff_err.3140078067 |
| Short name | T1793 |
| Test name | |
| Test status | |
| Simulation time | 165496428 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 05:56:58 AM UTC 24 |
| Finished | Sep 04 05:57:00 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3140078067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_bitstuff_err.3140078067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_data_toggle_clear.1989793166 |
| Short name | T1794 |
| Test name | |
| Test status | |
| Simulation time | 398731224 ps |
| CPU time | 1.68 seconds |
| Started | Sep 04 05:56:58 AM UTC 24 |
| Finished | Sep 04 05:57:00 AM UTC 24 |
| Peak memory | 214924 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1989793166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 24.usbdev_data_toggle_clear.1989793166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_data_toggle_restore.3946399581 |
| Short name | T1796 |
| Test name | |
| Test status | |
| Simulation time | 382753433 ps |
| CPU time | 2.23 seconds |
| Started | Sep 04 05:56:58 AM UTC 24 |
| Finished | Sep 04 05:57:01 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3946399581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_data_toggle_restore.3946399581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_device_address.3707381715 |
| Short name | T2019 |
| Test name | |
| Test status | |
| Simulation time | 44710126419 ps |
| CPU time | 111.38 seconds |
| Started | Sep 04 05:56:59 AM UTC 24 |
| Finished | Sep 04 05:58:53 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3707381715 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_device_address.3707381715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_device_timeout.1161136487 |
| Short name | T1815 |
| Test name | |
| Test status | |
| Simulation time | 741341603 ps |
| CPU time | 13.34 seconds |
| Started | Sep 04 05:56:59 AM UTC 24 |
| Finished | Sep 04 05:57:14 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1161136487 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_device_timeout.1161136487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_disable_endpoint.3198117301 |
| Short name | T1802 |
| Test name | |
| Test status | |
| Simulation time | 855422327 ps |
| CPU time | 3.92 seconds |
| Started | Sep 04 05:57:02 AM UTC 24 |
| Finished | Sep 04 05:57:07 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3198117301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 24.usbdev_disable_endpoint.3198117301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_disconnected.1953258019 |
| Short name | T1799 |
| Test name | |
| Test status | |
| Simulation time | 145103698 ps |
| CPU time | 1.17 seconds |
| Started | Sep 04 05:57:02 AM UTC 24 |
| Finished | Sep 04 05:57:04 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1953258019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_disconnected.1953258019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_enable.1185172623 |
| Short name | T1798 |
| Test name | |
| Test status | |
| Simulation time | 37296860 ps |
| CPU time | 0.94 seconds |
| Started | Sep 04 05:57:02 AM UTC 24 |
| Finished | Sep 04 05:57:04 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1185172623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 24.usbdev_enable.1185172623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_endpoint_access.883792819 |
| Short name | T1803 |
| Test name | |
| Test status | |
| Simulation time | 936269243 ps |
| CPU time | 4.35 seconds |
| Started | Sep 04 05:57:02 AM UTC 24 |
| Finished | Sep 04 05:57:07 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=883792819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_endpoint_access.883792819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_endpoint_types.1285004963 |
| Short name | T435 |
| Test name | |
| Test status | |
| Simulation time | 187091140 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 05:57:02 AM UTC 24 |
| Finished | Sep 04 05:57:04 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1285004963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_endpoint_types.1285004963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_fifo_levels.1449966817 |
| Short name | T1800 |
| Test name | |
| Test status | |
| Simulation time | 152978790 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 05:57:03 AM UTC 24 |
| Finished | Sep 04 05:57:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1449966817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_fifo_levels.1449966817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_fifo_rst.2238809570 |
| Short name | T1809 |
| Test name | |
| Test status | |
| Simulation time | 471084535 ps |
| CPU time | 4.76 seconds |
| Started | Sep 04 05:57:04 AM UTC 24 |
| Finished | Sep 04 05:57:10 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2238809570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_fifo_rst.2238809570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_in_iso.1429047758 |
| Short name | T1804 |
| Test name | |
| Test status | |
| Simulation time | 177677529 ps |
| CPU time | 1.3 seconds |
| Started | Sep 04 05:57:05 AM UTC 24 |
| Finished | Sep 04 05:57:08 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1429047758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 24.usbdev_in_iso.1429047758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_in_stall.2007109565 |
| Short name | T1805 |
| Test name | |
| Test status | |
| Simulation time | 151539021 ps |
| CPU time | 1.3 seconds |
| Started | Sep 04 05:57:07 AM UTC 24 |
| Finished | Sep 04 05:57:09 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2007109565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_in_stall.2007109565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_in_trans.4273045606 |
| Short name | T1806 |
| Test name | |
| Test status | |
| Simulation time | 250920659 ps |
| CPU time | 1.69 seconds |
| Started | Sep 04 05:57:07 AM UTC 24 |
| Finished | Sep 04 05:57:09 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4273045606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_in_trans.4273045606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_invalid_sync.3856641095 |
| Short name | T1877 |
| Test name | |
| Test status | |
| Simulation time | 3845870269 ps |
| CPU time | 41.73 seconds |
| Started | Sep 04 05:57:04 AM UTC 24 |
| Finished | Sep 04 05:57:47 AM UTC 24 |
| Peak memory | 227612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3856641095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 24.usbdev_invalid_sync.3856641095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_iso_retraction.4175447294 |
| Short name | T2023 |
| Test name | |
| Test status | |
| Simulation time | 14082979832 ps |
| CPU time | 106.68 seconds |
| Started | Sep 04 05:57:08 AM UTC 24 |
| Finished | Sep 04 05:58:57 AM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4175447294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_iso_retraction.4175447294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_link_in_err.861220641 |
| Short name | T1810 |
| Test name | |
| Test status | |
| Simulation time | 182950940 ps |
| CPU time | 1.63 seconds |
| Started | Sep 04 05:57:08 AM UTC 24 |
| Finished | Sep 04 05:57:10 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=861220641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_link_in_err.861220641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_link_resume.942718772 |
| Short name | T1962 |
| Test name | |
| Test status | |
| Simulation time | 33217940661 ps |
| CPU time | 75.77 seconds |
| Started | Sep 04 05:57:09 AM UTC 24 |
| Finished | Sep 04 05:58:26 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=942718772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_link_resume.942718772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_link_suspend.2479834975 |
| Short name | T1835 |
| Test name | |
| Test status | |
| Simulation time | 4209792836 ps |
| CPU time | 12.18 seconds |
| Started | Sep 04 05:57:10 AM UTC 24 |
| Finished | Sep 04 05:57:24 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2479834975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_link_suspend.2479834975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_low_speed_traffic.270753068 |
| Short name | T1968 |
| Test name | |
| Test status | |
| Simulation time | 3031301046 ps |
| CPU time | 78.17 seconds |
| Started | Sep 04 05:57:10 AM UTC 24 |
| Finished | Sep 04 05:58:30 AM UTC 24 |
| Peak memory | 229588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=270753068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_low_speed_traffic.270753068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_max_inter_pkt_delay.787603795 |
| Short name | T1882 |
| Test name | |
| Test status | |
| Simulation time | 4056149841 ps |
| CPU time | 37.37 seconds |
| Started | Sep 04 05:57:11 AM UTC 24 |
| Finished | Sep 04 05:57:49 AM UTC 24 |
| Peak memory | 229652 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=787603795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_inter_pkt_delay.787603795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_max_length_in_transaction.2230631053 |
| Short name | T1814 |
| Test name | |
| Test status | |
| Simulation time | 254884117 ps |
| CPU time | 1.84 seconds |
| Started | Sep 04 05:57:11 AM UTC 24 |
| Finished | Sep 04 05:57:13 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2230631053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 24.usbdev_max_length_in_transaction.2230631053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_max_length_out_transaction.3217734809 |
| Short name | T1813 |
| Test name | |
| Test status | |
| Simulation time | 207429672 ps |
| CPU time | 1.55 seconds |
| Started | Sep 04 05:57:11 AM UTC 24 |
| Finished | Sep 04 05:57:13 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3217734809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_max_length_out_transaction.3217734809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_max_non_iso_usb_traffic.809365470 |
| Short name | T1927 |
| Test name | |
| Test status | |
| Simulation time | 1996498836 ps |
| CPU time | 56.62 seconds |
| Started | Sep 04 05:57:12 AM UTC 24 |
| Finished | Sep 04 05:58:10 AM UTC 24 |
| Peak memory | 227420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=809365470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_non_iso_usb_traffic.809365470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_min_inter_pkt_delay.1890650708 |
| Short name | T1857 |
| Test name | |
| Test status | |
| Simulation time | 2636076329 ps |
| CPU time | 22.8 seconds |
| Started | Sep 04 05:57:13 AM UTC 24 |
| Finished | Sep 04 05:57:38 AM UTC 24 |
| Peak memory | 227724 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1890650708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_min_inter_pkt_delay.1890650708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_min_length_in_transaction.2556667828 |
| Short name | T1818 |
| Test name | |
| Test status | |
| Simulation time | 162870810 ps |
| CPU time | 1.37 seconds |
| Started | Sep 04 05:57:13 AM UTC 24 |
| Finished | Sep 04 05:57:16 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2556667828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 24.usbdev_min_length_in_transaction.2556667828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_min_length_out_transaction.1531013062 |
| Short name | T1819 |
| Test name | |
| Test status | |
| Simulation time | 159026154 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 05:57:14 AM UTC 24 |
| Finished | Sep 04 05:57:17 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1531013062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_min_length_out_transaction.1531013062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_nak_trans.2048949838 |
| Short name | T1820 |
| Test name | |
| Test status | |
| Simulation time | 177259805 ps |
| CPU time | 1.61 seconds |
| Started | Sep 04 05:57:14 AM UTC 24 |
| Finished | Sep 04 05:57:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2048949838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_nak_trans.2048949838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_out_iso.135719389 |
| Short name | T1821 |
| Test name | |
| Test status | |
| Simulation time | 195797853 ps |
| CPU time | 1.57 seconds |
| Started | Sep 04 05:57:14 AM UTC 24 |
| Finished | Sep 04 05:57:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=135719389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 24.usbdev_out_iso.135719389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_out_stall.2511445945 |
| Short name | T1824 |
| Test name | |
| Test status | |
| Simulation time | 164844888 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 05:57:16 AM UTC 24 |
| Finished | Sep 04 05:57:19 AM UTC 24 |
| Peak memory | 214980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2511445945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_out_stall.2511445945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_out_trans_nak.1684660070 |
| Short name | T1823 |
| Test name | |
| Test status | |
| Simulation time | 151767703 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 05:57:16 AM UTC 24 |
| Finished | Sep 04 05:57:19 AM UTC 24 |
| Peak memory | 214996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1684660070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 24.usbdev_out_trans_nak.1684660070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_pending_in_trans.466646912 |
| Short name | T1829 |
| Test name | |
| Test status | |
| Simulation time | 175579171 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 05:57:18 AM UTC 24 |
| Finished | Sep 04 05:57:21 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=466646912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_pending_in_trans.466646912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_phy_config_pinflip.3846055084 |
| Short name | T1830 |
| Test name | |
| Test status | |
| Simulation time | 224937162 ps |
| CPU time | 1.77 seconds |
| Started | Sep 04 05:57:18 AM UTC 24 |
| Finished | Sep 04 05:57:21 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3846055084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 24.usbdev_phy_config_pinflip.3846055084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_phy_config_usb_ref_disable.4246954789 |
| Short name | T1827 |
| Test name | |
| Test status | |
| Simulation time | 147361706 ps |
| CPU time | 1.31 seconds |
| Started | Sep 04 05:57:18 AM UTC 24 |
| Finished | Sep 04 05:57:21 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4246954789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_phy_config_usb_ref_disable.4246954789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_phy_pins_sense.2827156769 |
| Short name | T1826 |
| Test name | |
| Test status | |
| Simulation time | 45896284 ps |
| CPU time | 1.09 seconds |
| Started | Sep 04 05:57:18 AM UTC 24 |
| Finished | Sep 04 05:57:20 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2827156769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_phy_pins_sense.2827156769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_buffer.1858639417 |
| Short name | T1876 |
| Test name | |
| Test status | |
| Simulation time | 9019030341 ps |
| CPU time | 26.87 seconds |
| Started | Sep 04 05:57:19 AM UTC 24 |
| Finished | Sep 04 05:57:47 AM UTC 24 |
| Peak memory | 234264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1858639417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_pkt_buffer.1858639417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_received.731018377 |
| Short name | T1833 |
| Test name | |
| Test status | |
| Simulation time | 161696032 ps |
| CPU time | 1.36 seconds |
| Started | Sep 04 05:57:20 AM UTC 24 |
| Finished | Sep 04 05:57:23 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=731018377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_pkt_received.731018377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_sent.1993616998 |
| Short name | T1832 |
| Test name | |
| Test status | |
| Simulation time | 219741000 ps |
| CPU time | 1.22 seconds |
| Started | Sep 04 05:57:20 AM UTC 24 |
| Finished | Sep 04 05:57:23 AM UTC 24 |
| Peak memory | 215032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1993616998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_pkt_sent.1993616998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_random_length_in_transaction.2640051781 |
| Short name | T1834 |
| Test name | |
| Test status | |
| Simulation time | 172643074 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 05:57:20 AM UTC 24 |
| Finished | Sep 04 05:57:23 AM UTC 24 |
| Peak memory | 215016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2640051781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 24.usbdev_random_length_in_transaction.2640051781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_random_length_out_transaction.856960513 |
| Short name | T1837 |
| Test name | |
| Test status | |
| Simulation time | 163854923 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 05:57:22 AM UTC 24 |
| Finished | Sep 04 05:57:25 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=856960513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 24.usbdev_random_length_out_transaction.856960513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_rx_crc_err.2512706113 |
| Short name | T1836 |
| Test name | |
| Test status | |
| Simulation time | 143985527 ps |
| CPU time | 1.35 seconds |
| Started | Sep 04 05:57:22 AM UTC 24 |
| Finished | Sep 04 05:57:24 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2512706113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_rx_crc_err.2512706113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_rx_full.622054128 |
| Short name | T1840 |
| Test name | |
| Test status | |
| Simulation time | 349019366 ps |
| CPU time | 2.01 seconds |
| Started | Sep 04 05:57:22 AM UTC 24 |
| Finished | Sep 04 05:57:25 AM UTC 24 |
| Peak memory | 217152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=622054128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 24.usbdev_rx_full.622054128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_setup_stage.2372333356 |
| Short name | T1838 |
| Test name | |
| Test status | |
| Simulation time | 161791444 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 05:57:22 AM UTC 24 |
| Finished | Sep 04 05:57:25 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2372333356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_setup_stage.2372333356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_setup_trans_ignored.3980274495 |
| Short name | T1839 |
| Test name | |
| Test status | |
| Simulation time | 198108989 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 05:57:22 AM UTC 24 |
| Finished | Sep 04 05:57:25 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3980274495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 24.usbdev_setup_trans_ignored.3980274495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_smoke.1303939005 |
| Short name | T1844 |
| Test name | |
| Test status | |
| Simulation time | 214039364 ps |
| CPU time | 1.7 seconds |
| Started | Sep 04 05:57:24 AM UTC 24 |
| Finished | Sep 04 05:57:26 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1303939005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_smoke.1303939005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_spurious_pids_ignored.2477138566 |
| Short name | T1866 |
| Test name | |
| Test status | |
| Simulation time | 1983046428 ps |
| CPU time | 17.23 seconds |
| Started | Sep 04 05:57:24 AM UTC 24 |
| Finished | Sep 04 05:57:42 AM UTC 24 |
| Peak memory | 234176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2477138566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 24.usbdev_spurious_pids_ignored.2477138566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_stall_priority_over_nak.1562693827 |
| Short name | T1842 |
| Test name | |
| Test status | |
| Simulation time | 171660054 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 05:57:24 AM UTC 24 |
| Finished | Sep 04 05:57:26 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1562693827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_stall_priority_over_nak.1562693827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_stall_trans.3872918651 |
| Short name | T1843 |
| Test name | |
| Test status | |
| Simulation time | 158204095 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 05:57:24 AM UTC 24 |
| Finished | Sep 04 05:57:26 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3872918651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_stall_trans.3872918651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_stream_len_max.4163019680 |
| Short name | T1849 |
| Test name | |
| Test status | |
| Simulation time | 756232548 ps |
| CPU time | 4.15 seconds |
| Started | Sep 04 05:57:25 AM UTC 24 |
| Finished | Sep 04 05:57:30 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4163019680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_stream_len_max.4163019680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_streaming_out.873297950 |
| Short name | T1967 |
| Test name | |
| Test status | |
| Simulation time | 2285606553 ps |
| CPU time | 61.81 seconds |
| Started | Sep 04 05:57:25 AM UTC 24 |
| Finished | Sep 04 05:58:29 AM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=873297950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_streaming_out.873297950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_timeout_missing_host_handshake.3006877456 |
| Short name | T1797 |
| Test name | |
| Test status | |
| Simulation time | 148764672 ps |
| CPU time | 1.36 seconds |
| Started | Sep 04 05:57:00 AM UTC 24 |
| Finished | Sep 04 05:57:03 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3006877456 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_timeout_missing_host_handshake.3006877456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/24.usbdev_tx_rx_disruption.3153826666 |
| Short name | T1847 |
| Test name | |
| Test status | |
| Simulation time | 601654177 ps |
| CPU time | 2.74 seconds |
| Started | Sep 04 05:57:25 AM UTC 24 |
| Finished | Sep 04 05:57:29 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3153826666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_t x_rx_disruption.3153826666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/24.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/240.usbdev_tx_rx_disruption.1127704635 |
| Short name | T3505 |
| Test name | |
| Test status | |
| Simulation time | 623211138 ps |
| CPU time | 1.55 seconds |
| Started | Sep 04 06:09:10 AM UTC 24 |
| Finished | Sep 04 06:09:14 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1127704635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 240.usbdev_ tx_rx_disruption.1127704635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/240.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/241.usbdev_tx_rx_disruption.1104938696 |
| Short name | T3504 |
| Test name | |
| Test status | |
| Simulation time | 673054127 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 06:09:10 AM UTC 24 |
| Finished | Sep 04 06:09:14 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1104938696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 241.usbdev_ tx_rx_disruption.1104938696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/241.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/242.usbdev_tx_rx_disruption.2987383643 |
| Short name | T3503 |
| Test name | |
| Test status | |
| Simulation time | 481555369 ps |
| CPU time | 1.37 seconds |
| Started | Sep 04 06:09:10 AM UTC 24 |
| Finished | Sep 04 06:09:14 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2987383643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 242.usbdev_ tx_rx_disruption.2987383643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/242.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/243.usbdev_tx_rx_disruption.320871534 |
| Short name | T3506 |
| Test name | |
| Test status | |
| Simulation time | 603417526 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 06:09:10 AM UTC 24 |
| Finished | Sep 04 06:09:14 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=320871534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 243.usbdev_t x_rx_disruption.320871534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/243.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/244.usbdev_tx_rx_disruption.1997968646 |
| Short name | T3507 |
| Test name | |
| Test status | |
| Simulation time | 601633268 ps |
| CPU time | 1.6 seconds |
| Started | Sep 04 06:09:10 AM UTC 24 |
| Finished | Sep 04 06:09:14 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1997968646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 244.usbdev_ tx_rx_disruption.1997968646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/244.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/245.usbdev_tx_rx_disruption.3000818477 |
| Short name | T3521 |
| Test name | |
| Test status | |
| Simulation time | 445358965 ps |
| CPU time | 1.28 seconds |
| Started | Sep 04 06:09:14 AM UTC 24 |
| Finished | Sep 04 06:09:23 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3000818477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 245.usbdev_ tx_rx_disruption.3000818477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/245.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/246.usbdev_tx_rx_disruption.3263512982 |
| Short name | T3553 |
| Test name | |
| Test status | |
| Simulation time | 608962382 ps |
| CPU time | 1.73 seconds |
| Started | Sep 04 06:09:15 AM UTC 24 |
| Finished | Sep 04 06:09:35 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3263512982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 246.usbdev_ tx_rx_disruption.3263512982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/246.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/247.usbdev_tx_rx_disruption.3357142902 |
| Short name | T3548 |
| Test name | |
| Test status | |
| Simulation time | 458163112 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 06:09:15 AM UTC 24 |
| Finished | Sep 04 06:09:35 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3357142902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 247.usbdev_ tx_rx_disruption.3357142902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/247.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/248.usbdev_tx_rx_disruption.1945412274 |
| Short name | T3545 |
| Test name | |
| Test status | |
| Simulation time | 638624990 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 06:09:15 AM UTC 24 |
| Finished | Sep 04 06:09:35 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1945412274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 248.usbdev_ tx_rx_disruption.1945412274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/248.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/249.usbdev_tx_rx_disruption.1270985485 |
| Short name | T3542 |
| Test name | |
| Test status | |
| Simulation time | 470245141 ps |
| CPU time | 1.37 seconds |
| Started | Sep 04 06:09:15 AM UTC 24 |
| Finished | Sep 04 06:09:34 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1270985485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 249.usbdev_ tx_rx_disruption.1270985485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/249.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_alert_test.1507696794 |
| Short name | T1899 |
| Test name | |
| Test status | |
| Simulation time | 55345974 ps |
| CPU time | 1.05 seconds |
| Started | Sep 04 05:57:54 AM UTC 24 |
| Finished | Sep 04 05:57:56 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1507696794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 25.usbdev_alert_test.1507696794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_disconnect.2632625246 |
| Short name | T1878 |
| Test name | |
| Test status | |
| Simulation time | 10366298504 ps |
| CPU time | 20.94 seconds |
| Started | Sep 04 05:57:27 AM UTC 24 |
| Finished | Sep 04 05:57:49 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2632625246 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_disconnect.2632625246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_reset.2065941035 |
| Short name | T1908 |
| Test name | |
| Test status | |
| Simulation time | 14290935218 ps |
| CPU time | 32.46 seconds |
| Started | Sep 04 05:57:27 AM UTC 24 |
| Finished | Sep 04 05:58:00 AM UTC 24 |
| Peak memory | 227368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2065941035 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_reset.2065941035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_resume.579234501 |
| Short name | T1948 |
| Test name | |
| Test status | |
| Simulation time | 25685590121 ps |
| CPU time | 49.61 seconds |
| Started | Sep 04 05:57:27 AM UTC 24 |
| Finished | Sep 04 05:58:18 AM UTC 24 |
| Peak memory | 227476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=579234501 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_resume.579234501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_av_buffer.2467584491 |
| Short name | T1848 |
| Test name | |
| Test status | |
| Simulation time | 162674200 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 05:57:27 AM UTC 24 |
| Finished | Sep 04 05:57:29 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2467584491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_av_buffer.2467584491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_bitstuff_err.2173127203 |
| Short name | T1788 |
| Test name | |
| Test status | |
| Simulation time | 145295538 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 05:57:28 AM UTC 24 |
| Finished | Sep 04 05:57:30 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2173127203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_bitstuff_err.2173127203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_data_toggle_clear.3712913202 |
| Short name | T1850 |
| Test name | |
| Test status | |
| Simulation time | 264685111 ps |
| CPU time | 1.96 seconds |
| Started | Sep 04 05:57:28 AM UTC 24 |
| Finished | Sep 04 05:57:31 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3712913202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 25.usbdev_data_toggle_clear.3712913202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_data_toggle_restore.3710066077 |
| Short name | T1851 |
| Test name | |
| Test status | |
| Simulation time | 931031563 ps |
| CPU time | 4.6 seconds |
| Started | Sep 04 05:57:28 AM UTC 24 |
| Finished | Sep 04 05:57:34 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3710066077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_data_toggle_restore.3710066077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_device_address.932841581 |
| Short name | T2016 |
| Test name | |
| Test status | |
| Simulation time | 50903123040 ps |
| CPU time | 78.74 seconds |
| Started | Sep 04 05:57:31 AM UTC 24 |
| Finished | Sep 04 05:58:52 AM UTC 24 |
| Peak memory | 217192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=932841581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 25.usbdev_device_address.932841581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_device_timeout.18830263 |
| Short name | T1904 |
| Test name | |
| Test status | |
| Simulation time | 1008495649 ps |
| CPU time | 24.99 seconds |
| Started | Sep 04 05:57:31 AM UTC 24 |
| Finished | Sep 04 05:57:58 AM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=18830263 -assert nopostproc +UVM_TESTNAME=usbdev_ba se_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_device_timeout.18830263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_disable_endpoint.4113050666 |
| Short name | T1855 |
| Test name | |
| Test status | |
| Simulation time | 554193948 ps |
| CPU time | 2.83 seconds |
| Started | Sep 04 05:57:31 AM UTC 24 |
| Finished | Sep 04 05:57:35 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4113050666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 25.usbdev_disable_endpoint.4113050666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_disconnected.780442587 |
| Short name | T1853 |
| Test name | |
| Test status | |
| Simulation time | 153598606 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:57:31 AM UTC 24 |
| Finished | Sep 04 05:57:34 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=780442587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_disconnected.780442587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_enable.1276188945 |
| Short name | T1854 |
| Test name | |
| Test status | |
| Simulation time | 38386801 ps |
| CPU time | 1.09 seconds |
| Started | Sep 04 05:57:32 AM UTC 24 |
| Finished | Sep 04 05:57:35 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1276188945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 25.usbdev_enable.1276188945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_endpoint_access.2393797006 |
| Short name | T1859 |
| Test name | |
| Test status | |
| Simulation time | 708707530 ps |
| CPU time | 3.92 seconds |
| Started | Sep 04 05:57:33 AM UTC 24 |
| Finished | Sep 04 05:57:38 AM UTC 24 |
| Peak memory | 217116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2393797006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_endpoint_access.2393797006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_fifo_rst.4153022905 |
| Short name | T1862 |
| Test name | |
| Test status | |
| Simulation time | 530082588 ps |
| CPU time | 3.93 seconds |
| Started | Sep 04 05:57:35 AM UTC 24 |
| Finished | Sep 04 05:57:41 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4153022905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_fifo_rst.4153022905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_in_iso.3440692672 |
| Short name | T1860 |
| Test name | |
| Test status | |
| Simulation time | 230107708 ps |
| CPU time | 1.28 seconds |
| Started | Sep 04 05:57:36 AM UTC 24 |
| Finished | Sep 04 05:57:39 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3440692672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 25.usbdev_in_iso.3440692672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_in_stall.1671627163 |
| Short name | T1861 |
| Test name | |
| Test status | |
| Simulation time | 154681919 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 05:57:36 AM UTC 24 |
| Finished | Sep 04 05:57:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1671627163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_in_stall.1671627163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_in_trans.3713192799 |
| Short name | T1864 |
| Test name | |
| Test status | |
| Simulation time | 249153421 ps |
| CPU time | 1.72 seconds |
| Started | Sep 04 05:57:39 AM UTC 24 |
| Finished | Sep 04 05:57:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3713192799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_in_trans.3713192799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_invalid_sync.904179006 |
| Short name | T1915 |
| Test name | |
| Test status | |
| Simulation time | 2838125574 ps |
| CPU time | 28.01 seconds |
| Started | Sep 04 05:57:35 AM UTC 24 |
| Finished | Sep 04 05:58:05 AM UTC 24 |
| Peak memory | 227676 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=904179006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 25.usbdev_invalid_sync.904179006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_iso_retraction.3197520734 |
| Short name | T2049 |
| Test name | |
| Test status | |
| Simulation time | 6019817757 ps |
| CPU time | 83.61 seconds |
| Started | Sep 04 05:57:39 AM UTC 24 |
| Finished | Sep 04 05:59:04 AM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3197520734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_iso_retraction.3197520734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_link_in_err.2179805386 |
| Short name | T1865 |
| Test name | |
| Test status | |
| Simulation time | 217604245 ps |
| CPU time | 1.69 seconds |
| Started | Sep 04 05:57:39 AM UTC 24 |
| Finished | Sep 04 05:57:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2179805386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_link_in_err.2179805386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_link_resume.3333057457 |
| Short name | T1928 |
| Test name | |
| Test status | |
| Simulation time | 14860801309 ps |
| CPU time | 29.04 seconds |
| Started | Sep 04 05:57:40 AM UTC 24 |
| Finished | Sep 04 05:58:10 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3333057457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_link_resume.3333057457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_link_suspend.2805867550 |
| Short name | T1885 |
| Test name | |
| Test status | |
| Simulation time | 6081058687 ps |
| CPU time | 9.51 seconds |
| Started | Sep 04 05:57:40 AM UTC 24 |
| Finished | Sep 04 05:57:51 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2805867550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_link_suspend.2805867550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_low_speed_traffic.3576137009 |
| Short name | T2181 |
| Test name | |
| Test status | |
| Simulation time | 5252516261 ps |
| CPU time | 138.14 seconds |
| Started | Sep 04 05:57:40 AM UTC 24 |
| Finished | Sep 04 06:00:01 AM UTC 24 |
| Peak memory | 232252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3576137009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_low_speed_traffic.3576137009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_max_inter_pkt_delay.3899532977 |
| Short name | T1978 |
| Test name | |
| Test status | |
| Simulation time | 2079584796 ps |
| CPU time | 52.57 seconds |
| Started | Sep 04 05:57:40 AM UTC 24 |
| Finished | Sep 04 05:58:34 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3899532977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_max_inter_pkt_delay.3899532977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_max_length_in_transaction.1954632742 |
| Short name | T1868 |
| Test name | |
| Test status | |
| Simulation time | 238924037 ps |
| CPU time | 1.22 seconds |
| Started | Sep 04 05:57:40 AM UTC 24 |
| Finished | Sep 04 05:57:43 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1954632742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 25.usbdev_max_length_in_transaction.1954632742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_max_length_out_transaction.68318014 |
| Short name | T1869 |
| Test name | |
| Test status | |
| Simulation time | 184832799 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 05:57:42 AM UTC 24 |
| Finished | Sep 04 05:57:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=68318014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transacti on_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 25.usbdev_max_length_out_transaction.68318014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_min_inter_pkt_delay.1387004504 |
| Short name | T1916 |
| Test name | |
| Test status | |
| Simulation time | 3007836976 ps |
| CPU time | 22.29 seconds |
| Started | Sep 04 05:57:42 AM UTC 24 |
| Finished | Sep 04 05:58:05 AM UTC 24 |
| Peak memory | 229716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1387004504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_min_inter_pkt_delay.1387004504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_min_length_in_transaction.780764359 |
| Short name | T1871 |
| Test name | |
| Test status | |
| Simulation time | 207260854 ps |
| CPU time | 1.6 seconds |
| Started | Sep 04 05:57:43 AM UTC 24 |
| Finished | Sep 04 05:57:46 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=780764359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 25.usbdev_min_length_in_transaction.780764359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_min_length_out_transaction.3524813220 |
| Short name | T1870 |
| Test name | |
| Test status | |
| Simulation time | 150398704 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 05:57:43 AM UTC 24 |
| Finished | Sep 04 05:57:45 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3524813220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 25.usbdev_min_length_out_transaction.3524813220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_nak_trans.2902438842 |
| Short name | T126 |
| Test name | |
| Test status | |
| Simulation time | 233303252 ps |
| CPU time | 1.73 seconds |
| Started | Sep 04 05:57:43 AM UTC 24 |
| Finished | Sep 04 05:57:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2902438842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_nak_trans.2902438842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_out_iso.1763584945 |
| Short name | T1873 |
| Test name | |
| Test status | |
| Simulation time | 190825471 ps |
| CPU time | 1.72 seconds |
| Started | Sep 04 05:57:43 AM UTC 24 |
| Finished | Sep 04 05:57:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1763584945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 25.usbdev_out_iso.1763584945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_out_stall.2664215044 |
| Short name | T1872 |
| Test name | |
| Test status | |
| Simulation time | 156437096 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 05:57:43 AM UTC 24 |
| Finished | Sep 04 05:57:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2664215044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_out_stall.2664215044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_out_trans_nak.3808949023 |
| Short name | T1875 |
| Test name | |
| Test status | |
| Simulation time | 188245909 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 05:57:44 AM UTC 24 |
| Finished | Sep 04 05:57:47 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3808949023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 25.usbdev_out_trans_nak.3808949023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_pending_in_trans.2949638152 |
| Short name | T1881 |
| Test name | |
| Test status | |
| Simulation time | 185272513 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 05:57:47 AM UTC 24 |
| Finished | Sep 04 05:57:49 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2949638152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 25.usbdev_pending_in_trans.2949638152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_phy_config_pinflip.462857592 |
| Short name | T1883 |
| Test name | |
| Test status | |
| Simulation time | 248826888 ps |
| CPU time | 1.77 seconds |
| Started | Sep 04 05:57:47 AM UTC 24 |
| Finished | Sep 04 05:57:50 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=462857592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 25.usbdev_phy_config_pinflip.462857592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_phy_config_usb_ref_disable.1618278772 |
| Short name | T1880 |
| Test name | |
| Test status | |
| Simulation time | 137800152 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 05:57:47 AM UTC 24 |
| Finished | Sep 04 05:57:49 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1618278772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 25.usbdev_phy_config_usb_ref_disable.1618278772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_phy_pins_sense.3077392928 |
| Short name | T1879 |
| Test name | |
| Test status | |
| Simulation time | 32641399 ps |
| CPU time | 1.06 seconds |
| Started | Sep 04 05:57:47 AM UTC 24 |
| Finished | Sep 04 05:57:49 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3077392928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_phy_pins_sense.3077392928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_buffer.3339820562 |
| Short name | T1922 |
| Test name | |
| Test status | |
| Simulation time | 6405941978 ps |
| CPU time | 20.46 seconds |
| Started | Sep 04 05:57:47 AM UTC 24 |
| Finished | Sep 04 05:58:09 AM UTC 24 |
| Peak memory | 227592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3339820562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 25.usbdev_pkt_buffer.3339820562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_received.3262430635 |
| Short name | T1886 |
| Test name | |
| Test status | |
| Simulation time | 203517470 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 05:57:49 AM UTC 24 |
| Finished | Sep 04 05:57:51 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3262430635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_pkt_received.3262430635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_sent.1457109848 |
| Short name | T1887 |
| Test name | |
| Test status | |
| Simulation time | 182048882 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 05:57:49 AM UTC 24 |
| Finished | Sep 04 05:57:51 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1457109848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_pkt_sent.1457109848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_random_length_in_transaction.3939370556 |
| Short name | T1888 |
| Test name | |
| Test status | |
| Simulation time | 206012954 ps |
| CPU time | 1.66 seconds |
| Started | Sep 04 05:57:49 AM UTC 24 |
| Finished | Sep 04 05:57:51 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3939370556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 25.usbdev_random_length_in_transaction.3939370556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_random_length_out_transaction.4086264147 |
| Short name | T1889 |
| Test name | |
| Test status | |
| Simulation time | 175551817 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 05:57:49 AM UTC 24 |
| Finished | Sep 04 05:57:51 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4086264147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 25.usbdev_random_length_out_transaction.4086264147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_rx_crc_err.2530886674 |
| Short name | T1890 |
| Test name | |
| Test status | |
| Simulation time | 166202493 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 05:57:50 AM UTC 24 |
| Finished | Sep 04 05:57:53 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2530886674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 25.usbdev_rx_crc_err.2530886674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_rx_full.3933541249 |
| Short name | T524 |
| Test name | |
| Test status | |
| Simulation time | 310376548 ps |
| CPU time | 2.01 seconds |
| Started | Sep 04 05:57:50 AM UTC 24 |
| Finished | Sep 04 05:57:53 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3933541249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 25.usbdev_rx_full.3933541249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_setup_stage.4173395807 |
| Short name | T1892 |
| Test name | |
| Test status | |
| Simulation time | 185572077 ps |
| CPU time | 1.55 seconds |
| Started | Sep 04 05:57:50 AM UTC 24 |
| Finished | Sep 04 05:57:53 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4173395807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_setup_stage.4173395807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_setup_trans_ignored.4233542075 |
| Short name | T1891 |
| Test name | |
| Test status | |
| Simulation time | 145726229 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 05:57:50 AM UTC 24 |
| Finished | Sep 04 05:57:53 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4233542075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 25.usbdev_setup_trans_ignored.4233542075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_smoke.1710146202 |
| Short name | T1893 |
| Test name | |
| Test status | |
| Simulation time | 195862408 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 05:57:50 AM UTC 24 |
| Finished | Sep 04 05:57:53 AM UTC 24 |
| Peak memory | 214892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1710146202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_smoke.1710146202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_spurious_pids_ignored.1219994182 |
| Short name | T2003 |
| Test name | |
| Test status | |
| Simulation time | 1657997871 ps |
| CPU time | 53.4 seconds |
| Started | Sep 04 05:57:51 AM UTC 24 |
| Finished | Sep 04 05:58:45 AM UTC 24 |
| Peak memory | 227480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1219994182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 25.usbdev_spurious_pids_ignored.1219994182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_stall_priority_over_nak.618778887 |
| Short name | T1896 |
| Test name | |
| Test status | |
| Simulation time | 214273089 ps |
| CPU time | 1.63 seconds |
| Started | Sep 04 05:57:52 AM UTC 24 |
| Finished | Sep 04 05:57:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=618778887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_stall_priority_over_nak.618778887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_stall_trans.3149371990 |
| Short name | T1895 |
| Test name | |
| Test status | |
| Simulation time | 180709194 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 05:57:52 AM UTC 24 |
| Finished | Sep 04 05:57:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3149371990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_stall_trans.3149371990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_stream_len_max.2891023168 |
| Short name | T1897 |
| Test name | |
| Test status | |
| Simulation time | 318794890 ps |
| CPU time | 2.04 seconds |
| Started | Sep 04 05:57:52 AM UTC 24 |
| Finished | Sep 04 05:57:55 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2891023168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_stream_len_max.2891023168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_streaming_out.1496178479 |
| Short name | T2053 |
| Test name | |
| Test status | |
| Simulation time | 2797635110 ps |
| CPU time | 72.65 seconds |
| Started | Sep 04 05:57:52 AM UTC 24 |
| Finished | Sep 04 05:59:07 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1496178479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_streaming_out.1496178479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_timeout_missing_host_handshake.1621180115 |
| Short name | T1925 |
| Test name | |
| Test status | |
| Simulation time | 4282274296 ps |
| CPU time | 36.02 seconds |
| Started | Sep 04 05:57:31 AM UTC 24 |
| Finished | Sep 04 05:58:09 AM UTC 24 |
| Peak memory | 217388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1621180115 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_timeout_missing_host_handshake.1621180115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/25.usbdev_tx_rx_disruption.1987852286 |
| Short name | T1900 |
| Test name | |
| Test status | |
| Simulation time | 566467782 ps |
| CPU time | 2.95 seconds |
| Started | Sep 04 05:57:52 AM UTC 24 |
| Finished | Sep 04 05:57:56 AM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1987852286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_t x_rx_disruption.1987852286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/25.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/250.usbdev_tx_rx_disruption.633587707 |
| Short name | T3522 |
| Test name | |
| Test status | |
| Simulation time | 463435161 ps |
| CPU time | 1.32 seconds |
| Started | Sep 04 06:09:19 AM UTC 24 |
| Finished | Sep 04 06:09:28 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=633587707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 250.usbdev_t x_rx_disruption.633587707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/250.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/252.usbdev_tx_rx_disruption.1112498761 |
| Short name | T3535 |
| Test name | |
| Test status | |
| Simulation time | 627217946 ps |
| CPU time | 1.64 seconds |
| Started | Sep 04 06:09:20 AM UTC 24 |
| Finished | Sep 04 06:09:32 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1112498761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 252.usbdev_ tx_rx_disruption.1112498761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/252.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/253.usbdev_tx_rx_disruption.1317279074 |
| Short name | T3525 |
| Test name | |
| Test status | |
| Simulation time | 499103052 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 06:09:20 AM UTC 24 |
| Finished | Sep 04 06:09:31 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1317279074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 253.usbdev_ tx_rx_disruption.1317279074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/253.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/254.usbdev_tx_rx_disruption.212257592 |
| Short name | T3530 |
| Test name | |
| Test status | |
| Simulation time | 583055617 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 06:09:20 AM UTC 24 |
| Finished | Sep 04 06:09:32 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=212257592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 254.usbdev_t x_rx_disruption.212257592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/254.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/255.usbdev_tx_rx_disruption.750203595 |
| Short name | T3470 |
| Test name | |
| Test status | |
| Simulation time | 514629764 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 06:09:20 AM UTC 24 |
| Finished | Sep 04 06:09:32 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=750203595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 255.usbdev_t x_rx_disruption.750203595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/255.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/256.usbdev_tx_rx_disruption.1747627010 |
| Short name | T3536 |
| Test name | |
| Test status | |
| Simulation time | 680360246 ps |
| CPU time | 1.65 seconds |
| Started | Sep 04 06:09:21 AM UTC 24 |
| Finished | Sep 04 06:09:32 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1747627010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 256.usbdev_ tx_rx_disruption.1747627010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/256.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/257.usbdev_tx_rx_disruption.677571183 |
| Short name | T3550 |
| Test name | |
| Test status | |
| Simulation time | 572598767 ps |
| CPU time | 1.73 seconds |
| Started | Sep 04 06:09:21 AM UTC 24 |
| Finished | Sep 04 06:09:35 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=677571183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 257.usbdev_t x_rx_disruption.677571183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/257.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/258.usbdev_tx_rx_disruption.1182499071 |
| Short name | T3529 |
| Test name | |
| Test status | |
| Simulation time | 505174362 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 06:09:21 AM UTC 24 |
| Finished | Sep 04 06:09:32 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1182499071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 258.usbdev_ tx_rx_disruption.1182499071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/258.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/259.usbdev_tx_rx_disruption.4164306324 |
| Short name | T3543 |
| Test name | |
| Test status | |
| Simulation time | 499372565 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 06:09:21 AM UTC 24 |
| Finished | Sep 04 06:09:34 AM UTC 24 |
| Peak memory | 215556 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4164306324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 259.usbdev_ tx_rx_disruption.4164306324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/259.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_alert_test.4055528751 |
| Short name | T1955 |
| Test name | |
| Test status | |
| Simulation time | 43924976 ps |
| CPU time | 0.97 seconds |
| Started | Sep 04 05:58:20 AM UTC 24 |
| Finished | Sep 04 05:58:22 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4055528751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 26.usbdev_alert_test.4055528751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_disconnect.3756633240 |
| Short name | T1920 |
| Test name | |
| Test status | |
| Simulation time | 4450893233 ps |
| CPU time | 13.19 seconds |
| Started | Sep 04 05:57:54 AM UTC 24 |
| Finished | Sep 04 05:58:08 AM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3756633240 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_disconnect.3756633240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_reset.977877913 |
| Short name | T200 |
| Test name | |
| Test status | |
| Simulation time | 15041223522 ps |
| CPU time | 24.49 seconds |
| Started | Sep 04 05:57:54 AM UTC 24 |
| Finished | Sep 04 05:58:19 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=977877913 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_reset.977877913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_resume.2302685351 |
| Short name | T2030 |
| Test name | |
| Test status | |
| Simulation time | 26379074125 ps |
| CPU time | 62.8 seconds |
| Started | Sep 04 05:57:54 AM UTC 24 |
| Finished | Sep 04 05:58:58 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2302685351 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_resume.2302685351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_av_buffer.2431182199 |
| Short name | T1903 |
| Test name | |
| Test status | |
| Simulation time | 174061850 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 05:57:55 AM UTC 24 |
| Finished | Sep 04 05:57:57 AM UTC 24 |
| Peak memory | 216540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2431182199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_av_buffer.2431182199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_bitstuff_err.965314515 |
| Short name | T1902 |
| Test name | |
| Test status | |
| Simulation time | 174343763 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 05:57:55 AM UTC 24 |
| Finished | Sep 04 05:57:57 AM UTC 24 |
| Peak memory | 216488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=965314515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_bitstuff_err.965314515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_data_toggle_clear.50284555 |
| Short name | T1905 |
| Test name | |
| Test status | |
| Simulation time | 301210580 ps |
| CPU time | 2.12 seconds |
| Started | Sep 04 05:57:56 AM UTC 24 |
| Finished | Sep 04 05:58:00 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=50284555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_data_toggle_clear.50284555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_data_toggle_restore.1436525363 |
| Short name | T1912 |
| Test name | |
| Test status | |
| Simulation time | 1097793879 ps |
| CPU time | 5.42 seconds |
| Started | Sep 04 05:57:56 AM UTC 24 |
| Finished | Sep 04 05:58:03 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1436525363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_data_toggle_restore.1436525363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_device_address.1136661470 |
| Short name | T1975 |
| Test name | |
| Test status | |
| Simulation time | 19385972270 ps |
| CPU time | 35.36 seconds |
| Started | Sep 04 05:57:56 AM UTC 24 |
| Finished | Sep 04 05:58:33 AM UTC 24 |
| Peak memory | 217448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1136661470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_device_address.1136661470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_device_timeout.2741376749 |
| Short name | T1963 |
| Test name | |
| Test status | |
| Simulation time | 3346614272 ps |
| CPU time | 28.9 seconds |
| Started | Sep 04 05:57:57 AM UTC 24 |
| Finished | Sep 04 05:58:27 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2741376749 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_device_timeout.2741376749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_disable_endpoint.570097053 |
| Short name | T1911 |
| Test name | |
| Test status | |
| Simulation time | 686356447 ps |
| CPU time | 3.6 seconds |
| Started | Sep 04 05:57:58 AM UTC 24 |
| Finished | Sep 04 05:58:03 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=570097053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_disable_endpoint.570097053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_disconnected.4265718670 |
| Short name | T1907 |
| Test name | |
| Test status | |
| Simulation time | 143125844 ps |
| CPU time | 1.23 seconds |
| Started | Sep 04 05:57:58 AM UTC 24 |
| Finished | Sep 04 05:58:00 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4265718670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_disconnected.4265718670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_enable.1372675326 |
| Short name | T1906 |
| Test name | |
| Test status | |
| Simulation time | 40923958 ps |
| CPU time | 1.05 seconds |
| Started | Sep 04 05:57:58 AM UTC 24 |
| Finished | Sep 04 05:58:00 AM UTC 24 |
| Peak memory | 214908 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1372675326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 26.usbdev_enable.1372675326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_endpoint_access.1217863689 |
| Short name | T1909 |
| Test name | |
| Test status | |
| Simulation time | 847337048 ps |
| CPU time | 2.5 seconds |
| Started | Sep 04 05:57:58 AM UTC 24 |
| Finished | Sep 04 05:58:02 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1217863689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_endpoint_access.1217863689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_endpoint_types.1904743490 |
| Short name | T1910 |
| Test name | |
| Test status | |
| Simulation time | 189856165 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 05:57:59 AM UTC 24 |
| Finished | Sep 04 05:58:02 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1904743490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_endpoint_types.1904743490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_fifo_levels.975412409 |
| Short name | T541 |
| Test name | |
| Test status | |
| Simulation time | 282529009 ps |
| CPU time | 1.95 seconds |
| Started | Sep 04 05:58:00 AM UTC 24 |
| Finished | Sep 04 05:58:03 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=975412409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_fifo_levels.975412409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_fifo_rst.3754851497 |
| Short name | T1914 |
| Test name | |
| Test status | |
| Simulation time | 299364141 ps |
| CPU time | 3.37 seconds |
| Started | Sep 04 05:58:00 AM UTC 24 |
| Finished | Sep 04 05:58:05 AM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3754851497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_fifo_rst.3754851497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_in_iso.538681409 |
| Short name | T1913 |
| Test name | |
| Test status | |
| Simulation time | 199150324 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 05:58:02 AM UTC 24 |
| Finished | Sep 04 05:58:04 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=538681409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 26.usbdev_in_iso.538681409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_in_stall.3577253781 |
| Short name | T1917 |
| Test name | |
| Test status | |
| Simulation time | 139876479 ps |
| CPU time | 1.32 seconds |
| Started | Sep 04 05:58:03 AM UTC 24 |
| Finished | Sep 04 05:58:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3577253781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_in_stall.3577253781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_in_trans.2594898440 |
| Short name | T1918 |
| Test name | |
| Test status | |
| Simulation time | 225187619 ps |
| CPU time | 1.71 seconds |
| Started | Sep 04 05:58:03 AM UTC 24 |
| Finished | Sep 04 05:58:06 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2594898440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_in_trans.2594898440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_invalid_sync.4154199754 |
| Short name | T2042 |
| Test name | |
| Test status | |
| Simulation time | 4919980864 ps |
| CPU time | 59.51 seconds |
| Started | Sep 04 05:58:02 AM UTC 24 |
| Finished | Sep 04 05:59:03 AM UTC 24 |
| Peak memory | 229636 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4154199754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 26.usbdev_invalid_sync.4154199754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_iso_retraction.2116604522 |
| Short name | T1994 |
| Test name | |
| Test status | |
| Simulation time | 5381782037 ps |
| CPU time | 37.26 seconds |
| Started | Sep 04 05:58:04 AM UTC 24 |
| Finished | Sep 04 05:58:43 AM UTC 24 |
| Peak memory | 217384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2116604522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_iso_retraction.2116604522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_link_in_err.3703656739 |
| Short name | T1919 |
| Test name | |
| Test status | |
| Simulation time | 197150784 ps |
| CPU time | 1.02 seconds |
| Started | Sep 04 05:58:04 AM UTC 24 |
| Finished | Sep 04 05:58:06 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3703656739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_link_in_err.3703656739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_link_resume.1058262672 |
| Short name | T2046 |
| Test name | |
| Test status | |
| Simulation time | 26492421709 ps |
| CPU time | 57.72 seconds |
| Started | Sep 04 05:58:04 AM UTC 24 |
| Finished | Sep 04 05:59:04 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1058262672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_link_resume.1058262672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_link_suspend.650391720 |
| Short name | T1950 |
| Test name | |
| Test status | |
| Simulation time | 5169253686 ps |
| CPU time | 13.28 seconds |
| Started | Sep 04 05:58:06 AM UTC 24 |
| Finished | Sep 04 05:58:20 AM UTC 24 |
| Peak memory | 227364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=650391720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_link_suspend.650391720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_low_speed_traffic.3580937005 |
| Short name | T2110 |
| Test name | |
| Test status | |
| Simulation time | 2882823295 ps |
| CPU time | 84.19 seconds |
| Started | Sep 04 05:58:06 AM UTC 24 |
| Finished | Sep 04 05:59:32 AM UTC 24 |
| Peak memory | 234136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3580937005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_low_speed_traffic.3580937005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_max_inter_pkt_delay.3885548691 |
| Short name | T1980 |
| Test name | |
| Test status | |
| Simulation time | 2924748674 ps |
| CPU time | 29.59 seconds |
| Started | Sep 04 05:58:06 AM UTC 24 |
| Finished | Sep 04 05:58:37 AM UTC 24 |
| Peak memory | 229732 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3885548691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_max_inter_pkt_delay.3885548691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_max_length_in_transaction.607927649 |
| Short name | T1923 |
| Test name | |
| Test status | |
| Simulation time | 305477331 ps |
| CPU time | 1.92 seconds |
| Started | Sep 04 05:58:06 AM UTC 24 |
| Finished | Sep 04 05:58:09 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=607927649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 26.usbdev_max_length_in_transaction.607927649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_max_length_out_transaction.2613937563 |
| Short name | T1921 |
| Test name | |
| Test status | |
| Simulation time | 191053018 ps |
| CPU time | 1.65 seconds |
| Started | Sep 04 05:58:06 AM UTC 24 |
| Finished | Sep 04 05:58:08 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2613937563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 26.usbdev_max_length_out_transaction.2613937563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_min_inter_pkt_delay.824405659 |
| Short name | T2002 |
| Test name | |
| Test status | |
| Simulation time | 1529187948 ps |
| CPU time | 36.74 seconds |
| Started | Sep 04 05:58:07 AM UTC 24 |
| Finished | Sep 04 05:58:45 AM UTC 24 |
| Peak memory | 227560 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=824405659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_min_inter_pkt_delay.824405659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_min_length_in_transaction.223217533 |
| Short name | T1926 |
| Test name | |
| Test status | |
| Simulation time | 166500379 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 05:58:07 AM UTC 24 |
| Finished | Sep 04 05:58:09 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=223217533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 26.usbdev_min_length_in_transaction.223217533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_min_length_out_transaction.4235279004 |
| Short name | T1931 |
| Test name | |
| Test status | |
| Simulation time | 154650078 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 05:58:09 AM UTC 24 |
| Finished | Sep 04 05:58:12 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4235279004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 26.usbdev_min_length_out_transaction.4235279004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_nak_trans.24127896 |
| Short name | T1930 |
| Test name | |
| Test status | |
| Simulation time | 172396877 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 05:58:09 AM UTC 24 |
| Finished | Sep 04 05:58:12 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=24127896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 26.usbdev_nak_trans.24127896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_out_iso.1801771421 |
| Short name | T1933 |
| Test name | |
| Test status | |
| Simulation time | 178235865 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 05:58:10 AM UTC 24 |
| Finished | Sep 04 05:58:12 AM UTC 24 |
| Peak memory | 214920 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1801771421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 26.usbdev_out_iso.1801771421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_out_stall.3068583630 |
| Short name | T1929 |
| Test name | |
| Test status | |
| Simulation time | 156332962 ps |
| CPU time | 0.96 seconds |
| Started | Sep 04 05:58:10 AM UTC 24 |
| Finished | Sep 04 05:58:12 AM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3068583630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_out_stall.3068583630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_out_trans_nak.3521138913 |
| Short name | T1936 |
| Test name | |
| Test status | |
| Simulation time | 190000853 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 05:58:11 AM UTC 24 |
| Finished | Sep 04 05:58:13 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3521138913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 26.usbdev_out_trans_nak.3521138913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_pending_in_trans.354324497 |
| Short name | T1934 |
| Test name | |
| Test status | |
| Simulation time | 157396905 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 05:58:11 AM UTC 24 |
| Finished | Sep 04 05:58:13 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=354324497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_pending_in_trans.354324497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_phy_config_pinflip.3613367877 |
| Short name | T1937 |
| Test name | |
| Test status | |
| Simulation time | 218759608 ps |
| CPU time | 1.75 seconds |
| Started | Sep 04 05:58:11 AM UTC 24 |
| Finished | Sep 04 05:58:14 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3613367877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 26.usbdev_phy_config_pinflip.3613367877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_phy_config_usb_ref_disable.162809597 |
| Short name | T1935 |
| Test name | |
| Test status | |
| Simulation time | 149145716 ps |
| CPU time | 1.33 seconds |
| Started | Sep 04 05:58:11 AM UTC 24 |
| Finished | Sep 04 05:58:13 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=162809597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 26.usbdev_phy_config_usb_ref_disable.162809597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_phy_pins_sense.1536189146 |
| Short name | T1938 |
| Test name | |
| Test status | |
| Simulation time | 46794951 ps |
| CPU time | 1.09 seconds |
| Started | Sep 04 05:58:12 AM UTC 24 |
| Finished | Sep 04 05:58:14 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1536189146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_phy_pins_sense.1536189146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_buffer.1653787159 |
| Short name | T2034 |
| Test name | |
| Test status | |
| Simulation time | 18117482522 ps |
| CPU time | 45.41 seconds |
| Started | Sep 04 05:58:12 AM UTC 24 |
| Finished | Sep 04 05:58:59 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1653787159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_pkt_buffer.1653787159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_received.3223289738 |
| Short name | T1939 |
| Test name | |
| Test status | |
| Simulation time | 156850506 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 05:58:14 AM UTC 24 |
| Finished | Sep 04 05:58:16 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3223289738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_pkt_received.3223289738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_sent.2940735034 |
| Short name | T1940 |
| Test name | |
| Test status | |
| Simulation time | 228290682 ps |
| CPU time | 1.62 seconds |
| Started | Sep 04 05:58:14 AM UTC 24 |
| Finished | Sep 04 05:58:16 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2940735034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_pkt_sent.2940735034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_random_length_in_transaction.3619729656 |
| Short name | T1941 |
| Test name | |
| Test status | |
| Simulation time | 182646942 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 05:58:14 AM UTC 24 |
| Finished | Sep 04 05:58:16 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3619729656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 26.usbdev_random_length_in_transaction.3619729656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_random_length_out_transaction.2687970125 |
| Short name | T1946 |
| Test name | |
| Test status | |
| Simulation time | 171104604 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 05:58:15 AM UTC 24 |
| Finished | Sep 04 05:58:18 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2687970125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 26.usbdev_random_length_out_transaction.2687970125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_rx_crc_err.1558400319 |
| Short name | T1944 |
| Test name | |
| Test status | |
| Simulation time | 172236090 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 05:58:15 AM UTC 24 |
| Finished | Sep 04 05:58:18 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1558400319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_rx_crc_err.1558400319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_rx_full.3590031454 |
| Short name | T1949 |
| Test name | |
| Test status | |
| Simulation time | 317458362 ps |
| CPU time | 2.13 seconds |
| Started | Sep 04 05:58:15 AM UTC 24 |
| Finished | Sep 04 05:58:18 AM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3590031454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 26.usbdev_rx_full.3590031454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_setup_stage.4087099381 |
| Short name | T1945 |
| Test name | |
| Test status | |
| Simulation time | 146887768 ps |
| CPU time | 1.35 seconds |
| Started | Sep 04 05:58:15 AM UTC 24 |
| Finished | Sep 04 05:58:18 AM UTC 24 |
| Peak memory | 214976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4087099381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_setup_stage.4087099381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_setup_trans_ignored.3003804229 |
| Short name | T1947 |
| Test name | |
| Test status | |
| Simulation time | 155257195 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:58:15 AM UTC 24 |
| Finished | Sep 04 05:58:18 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3003804229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 26.usbdev_setup_trans_ignored.3003804229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_smoke.221919424 |
| Short name | T1952 |
| Test name | |
| Test status | |
| Simulation time | 273949507 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 05:58:18 AM UTC 24 |
| Finished | Sep 04 05:58:20 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=221919424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_smoke.221919424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_spurious_pids_ignored.720046294 |
| Short name | T1993 |
| Test name | |
| Test status | |
| Simulation time | 2178471247 ps |
| CPU time | 23.39 seconds |
| Started | Sep 04 05:58:18 AM UTC 24 |
| Finished | Sep 04 05:58:42 AM UTC 24 |
| Peak memory | 227552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=720046294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 26.usbdev_spurious_pids_ignored.720046294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_stall_priority_over_nak.880873826 |
| Short name | T1951 |
| Test name | |
| Test status | |
| Simulation time | 152482829 ps |
| CPU time | 1.33 seconds |
| Started | Sep 04 05:58:18 AM UTC 24 |
| Finished | Sep 04 05:58:20 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=880873826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_stall_priority_over_nak.880873826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_stall_trans.2365636691 |
| Short name | T1953 |
| Test name | |
| Test status | |
| Simulation time | 172669952 ps |
| CPU time | 1.37 seconds |
| Started | Sep 04 05:58:18 AM UTC 24 |
| Finished | Sep 04 05:58:20 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2365636691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_stall_trans.2365636691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_stream_len_max.143155265 |
| Short name | T1960 |
| Test name | |
| Test status | |
| Simulation time | 1231015307 ps |
| CPU time | 4.5 seconds |
| Started | Sep 04 05:58:19 AM UTC 24 |
| Finished | Sep 04 05:58:25 AM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=143155265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 26.usbdev_stream_len_max.143155265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_streaming_out.3581502975 |
| Short name | T1977 |
| Test name | |
| Test status | |
| Simulation time | 1861336510 ps |
| CPU time | 13.62 seconds |
| Started | Sep 04 05:58:19 AM UTC 24 |
| Finished | Sep 04 05:58:34 AM UTC 24 |
| Peak memory | 227404 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3581502975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_streaming_out.3581502975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_timeout_missing_host_handshake.4006865049 |
| Short name | T1986 |
| Test name | |
| Test status | |
| Simulation time | 3903332859 ps |
| CPU time | 42.28 seconds |
| Started | Sep 04 05:57:57 AM UTC 24 |
| Finished | Sep 04 05:58:40 AM UTC 24 |
| Peak memory | 217316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4006865049 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_timeout_missing_host_handshake.4006865049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/26.usbdev_tx_rx_disruption.3413870225 |
| Short name | T1956 |
| Test name | |
| Test status | |
| Simulation time | 492047342 ps |
| CPU time | 2.68 seconds |
| Started | Sep 04 05:58:19 AM UTC 24 |
| Finished | Sep 04 05:58:23 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3413870225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_t x_rx_disruption.3413870225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/26.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/260.usbdev_tx_rx_disruption.1856504601 |
| Short name | T3561 |
| Test name | |
| Test status | |
| Simulation time | 652326124 ps |
| CPU time | 2.02 seconds |
| Started | Sep 04 06:09:21 AM UTC 24 |
| Finished | Sep 04 06:09:35 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1856504601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 260.usbdev_ tx_rx_disruption.1856504601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/260.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/261.usbdev_tx_rx_disruption.3917763249 |
| Short name | T3544 |
| Test name | |
| Test status | |
| Simulation time | 512653129 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 06:09:21 AM UTC 24 |
| Finished | Sep 04 06:09:34 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3917763249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 261.usbdev_ tx_rx_disruption.3917763249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/261.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/262.usbdev_tx_rx_disruption.2254251609 |
| Short name | T3528 |
| Test name | |
| Test status | |
| Simulation time | 514201865 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 06:09:21 AM UTC 24 |
| Finished | Sep 04 06:09:32 AM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2254251609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 262.usbdev_ tx_rx_disruption.2254251609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/262.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/263.usbdev_tx_rx_disruption.355953622 |
| Short name | T3554 |
| Test name | |
| Test status | |
| Simulation time | 524102377 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 06:09:21 AM UTC 24 |
| Finished | Sep 04 06:09:35 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=355953622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 263.usbdev_t x_rx_disruption.355953622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/263.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/264.usbdev_tx_rx_disruption.2906409953 |
| Short name | T3523 |
| Test name | |
| Test status | |
| Simulation time | 563105289 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 06:09:24 AM UTC 24 |
| Finished | Sep 04 06:09:29 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2906409953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 264.usbdev_ tx_rx_disruption.2906409953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/264.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/265.usbdev_tx_rx_disruption.3675353064 |
| Short name | T3560 |
| Test name | |
| Test status | |
| Simulation time | 455446722 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 06:09:29 AM UTC 24 |
| Finished | Sep 04 06:09:35 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3675353064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 265.usbdev_ tx_rx_disruption.3675353064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/265.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/266.usbdev_tx_rx_disruption.4220398380 |
| Short name | T3539 |
| Test name | |
| Test status | |
| Simulation time | 620007138 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 06:09:30 AM UTC 24 |
| Finished | Sep 04 06:09:34 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4220398380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 266.usbdev_ tx_rx_disruption.4220398380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/266.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/267.usbdev_tx_rx_disruption.740590680 |
| Short name | T3540 |
| Test name | |
| Test status | |
| Simulation time | 566276562 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 06:09:31 AM UTC 24 |
| Finished | Sep 04 06:09:34 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=740590680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 267.usbdev_t x_rx_disruption.740590680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/267.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/268.usbdev_tx_rx_disruption.452911553 |
| Short name | T3565 |
| Test name | |
| Test status | |
| Simulation time | 620780737 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 06:09:33 AM UTC 24 |
| Finished | Sep 04 06:09:39 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=452911553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 268.usbdev_t x_rx_disruption.452911553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/268.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/269.usbdev_tx_rx_disruption.3057156372 |
| Short name | T3695 |
| Test name | |
| Test status | |
| Simulation time | 537032477 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 06:09:33 AM UTC 24 |
| Finished | Sep 04 06:10:08 AM UTC 24 |
| Peak memory | 217756 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3057156372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 269.usbdev_ tx_rx_disruption.3057156372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/269.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_alert_test.3072654047 |
| Short name | T2010 |
| Test name | |
| Test status | |
| Simulation time | 59732766 ps |
| CPU time | 1.09 seconds |
| Started | Sep 04 05:58:45 AM UTC 24 |
| Finished | Sep 04 05:58:48 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3072654047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 27.usbdev_alert_test.3072654047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_disconnect.3397333167 |
| Short name | T1992 |
| Test name | |
| Test status | |
| Simulation time | 10585508899 ps |
| CPU time | 21.11 seconds |
| Started | Sep 04 05:58:20 AM UTC 24 |
| Finished | Sep 04 05:58:42 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3397333167 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_disconnect.3397333167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_reset.3096583684 |
| Short name | T2025 |
| Test name | |
| Test status | |
| Simulation time | 20992158795 ps |
| CPU time | 36.78 seconds |
| Started | Sep 04 05:58:20 AM UTC 24 |
| Finished | Sep 04 05:58:58 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3096583684 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_reset.3096583684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_resume.443356858 |
| Short name | T2029 |
| Test name | |
| Test status | |
| Simulation time | 24480375143 ps |
| CPU time | 35.95 seconds |
| Started | Sep 04 05:58:21 AM UTC 24 |
| Finished | Sep 04 05:58:58 AM UTC 24 |
| Peak memory | 227672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=443356858 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_resume.443356858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_av_buffer.3447464757 |
| Short name | T1958 |
| Test name | |
| Test status | |
| Simulation time | 182945850 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 05:58:21 AM UTC 24 |
| Finished | Sep 04 05:58:23 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3447464757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_av_buffer.3447464757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_bitstuff_err.2704370513 |
| Short name | T1957 |
| Test name | |
| Test status | |
| Simulation time | 174374842 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 05:58:21 AM UTC 24 |
| Finished | Sep 04 05:58:23 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2704370513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_bitstuff_err.2704370513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_data_toggle_clear.2131202302 |
| Short name | T1959 |
| Test name | |
| Test status | |
| Simulation time | 343738465 ps |
| CPU time | 2.32 seconds |
| Started | Sep 04 05:58:21 AM UTC 24 |
| Finished | Sep 04 05:58:24 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2131202302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 27.usbdev_data_toggle_clear.2131202302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_data_toggle_restore.2282237660 |
| Short name | T1961 |
| Test name | |
| Test status | |
| Simulation time | 532579492 ps |
| CPU time | 2.94 seconds |
| Started | Sep 04 05:58:21 AM UTC 24 |
| Finished | Sep 04 05:58:25 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2282237660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_data_toggle_restore.2282237660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_device_address.2867231795 |
| Short name | T2136 |
| Test name | |
| Test status | |
| Simulation time | 30053853592 ps |
| CPU time | 75.52 seconds |
| Started | Sep 04 05:58:22 AM UTC 24 |
| Finished | Sep 04 05:59:40 AM UTC 24 |
| Peak memory | 217424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2867231795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_device_address.2867231795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_device_timeout.3740061038 |
| Short name | T2009 |
| Test name | |
| Test status | |
| Simulation time | 3718465933 ps |
| CPU time | 23.92 seconds |
| Started | Sep 04 05:58:22 AM UTC 24 |
| Finished | Sep 04 05:58:47 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3740061038 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_device_timeout.3740061038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_disable_endpoint.4224034083 |
| Short name | T1965 |
| Test name | |
| Test status | |
| Simulation time | 490633528 ps |
| CPU time | 1.76 seconds |
| Started | Sep 04 05:58:25 AM UTC 24 |
| Finished | Sep 04 05:58:27 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4224034083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 27.usbdev_disable_endpoint.4224034083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_disconnected.3177869778 |
| Short name | T1964 |
| Test name | |
| Test status | |
| Simulation time | 141134546 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 05:58:25 AM UTC 24 |
| Finished | Sep 04 05:58:27 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3177869778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_disconnected.3177869778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_enable.669159323 |
| Short name | T1966 |
| Test name | |
| Test status | |
| Simulation time | 58285455 ps |
| CPU time | 1.14 seconds |
| Started | Sep 04 05:58:26 AM UTC 24 |
| Finished | Sep 04 05:58:28 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=669159323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_enable.669159323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_endpoint_access.2783884168 |
| Short name | T1973 |
| Test name | |
| Test status | |
| Simulation time | 1005421453 ps |
| CPU time | 5.01 seconds |
| Started | Sep 04 05:58:26 AM UTC 24 |
| Finished | Sep 04 05:58:32 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2783884168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_endpoint_access.2783884168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_endpoint_types.723158254 |
| Short name | T300 |
| Test name | |
| Test status | |
| Simulation time | 616311362 ps |
| CPU time | 2.87 seconds |
| Started | Sep 04 05:58:26 AM UTC 24 |
| Finished | Sep 04 05:58:30 AM UTC 24 |
| Peak memory | 217036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=723158254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 27.usbdev_endpoint_types.723158254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_fifo_levels.67532032 |
| Short name | T512 |
| Test name | |
| Test status | |
| Simulation time | 193902377 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 05:58:27 AM UTC 24 |
| Finished | Sep 04 05:58:30 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=67532032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_fifo_levels.67532032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_fifo_rst.2130777091 |
| Short name | T1972 |
| Test name | |
| Test status | |
| Simulation time | 384542101 ps |
| CPU time | 3.14 seconds |
| Started | Sep 04 05:58:27 AM UTC 24 |
| Finished | Sep 04 05:58:31 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2130777091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_fifo_rst.2130777091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_in_iso.523077426 |
| Short name | T1969 |
| Test name | |
| Test status | |
| Simulation time | 177180379 ps |
| CPU time | 1.14 seconds |
| Started | Sep 04 05:58:29 AM UTC 24 |
| Finished | Sep 04 05:58:31 AM UTC 24 |
| Peak memory | 227412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=523077426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 27.usbdev_in_iso.523077426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_in_stall.4182415199 |
| Short name | T1971 |
| Test name | |
| Test status | |
| Simulation time | 171128018 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 05:58:29 AM UTC 24 |
| Finished | Sep 04 05:58:31 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4182415199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_in_stall.4182415199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_in_trans.397728078 |
| Short name | T1974 |
| Test name | |
| Test status | |
| Simulation time | 203422810 ps |
| CPU time | 1.76 seconds |
| Started | Sep 04 05:58:30 AM UTC 24 |
| Finished | Sep 04 05:58:33 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=397728078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_in_trans.397728078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_invalid_sync.447461607 |
| Short name | T2153 |
| Test name | |
| Test status | |
| Simulation time | 2985789947 ps |
| CPU time | 77.07 seconds |
| Started | Sep 04 05:58:28 AM UTC 24 |
| Finished | Sep 04 05:59:47 AM UTC 24 |
| Peak memory | 234104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=447461607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 27.usbdev_invalid_sync.447461607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_iso_retraction.2550994750 |
| Short name | T2239 |
| Test name | |
| Test status | |
| Simulation time | 9998635540 ps |
| CPU time | 115.89 seconds |
| Started | Sep 04 05:58:31 AM UTC 24 |
| Finished | Sep 04 06:00:29 AM UTC 24 |
| Peak memory | 217628 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2550994750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_iso_retraction.2550994750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_link_in_err.2866523518 |
| Short name | T1976 |
| Test name | |
| Test status | |
| Simulation time | 211921963 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 05:58:31 AM UTC 24 |
| Finished | Sep 04 05:58:34 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2866523518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_link_in_err.2866523518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_link_resume.4008813944 |
| Short name | T2095 |
| Test name | |
| Test status | |
| Simulation time | 28118193090 ps |
| CPU time | 52.72 seconds |
| Started | Sep 04 05:58:32 AM UTC 24 |
| Finished | Sep 04 05:59:27 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4008813944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_link_resume.4008813944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_link_suspend.2553308624 |
| Short name | T2011 |
| Test name | |
| Test status | |
| Simulation time | 5472171916 ps |
| CPU time | 14.32 seconds |
| Started | Sep 04 05:58:32 AM UTC 24 |
| Finished | Sep 04 05:58:48 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2553308624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_link_suspend.2553308624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_low_speed_traffic.869027615 |
| Short name | T2243 |
| Test name | |
| Test status | |
| Simulation time | 3934352904 ps |
| CPU time | 115.33 seconds |
| Started | Sep 04 05:58:33 AM UTC 24 |
| Finished | Sep 04 06:00:30 AM UTC 24 |
| Peak memory | 227480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=869027615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_low_speed_traffic.869027615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_max_inter_pkt_delay.2099809647 |
| Short name | T2033 |
| Test name | |
| Test status | |
| Simulation time | 2396239323 ps |
| CPU time | 24.83 seconds |
| Started | Sep 04 05:58:33 AM UTC 24 |
| Finished | Sep 04 05:58:59 AM UTC 24 |
| Peak memory | 229708 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2099809647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_max_inter_pkt_delay.2099809647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_max_length_in_transaction.3393692992 |
| Short name | T1979 |
| Test name | |
| Test status | |
| Simulation time | 237765632 ps |
| CPU time | 1.77 seconds |
| Started | Sep 04 05:58:33 AM UTC 24 |
| Finished | Sep 04 05:58:36 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3393692992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 27.usbdev_max_length_in_transaction.3393692992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_max_length_out_transaction.961752983 |
| Short name | T1983 |
| Test name | |
| Test status | |
| Simulation time | 218561719 ps |
| CPU time | 1.7 seconds |
| Started | Sep 04 05:58:34 AM UTC 24 |
| Finished | Sep 04 05:58:37 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=961752983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 27.usbdev_max_length_out_transaction.961752983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_min_inter_pkt_delay.4107433590 |
| Short name | T2070 |
| Test name | |
| Test status | |
| Simulation time | 3386152275 ps |
| CPU time | 35.7 seconds |
| Started | Sep 04 05:58:34 AM UTC 24 |
| Finished | Sep 04 05:59:11 AM UTC 24 |
| Peak memory | 229584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4107433590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_min_inter_pkt_delay.4107433590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_min_length_in_transaction.1367199368 |
| Short name | T1982 |
| Test name | |
| Test status | |
| Simulation time | 163244119 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 05:58:34 AM UTC 24 |
| Finished | Sep 04 05:58:37 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1367199368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 27.usbdev_min_length_in_transaction.1367199368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_min_length_out_transaction.4021512584 |
| Short name | T1981 |
| Test name | |
| Test status | |
| Simulation time | 146656679 ps |
| CPU time | 1.32 seconds |
| Started | Sep 04 05:58:34 AM UTC 24 |
| Finished | Sep 04 05:58:37 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4021512584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 27.usbdev_min_length_out_transaction.4021512584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_nak_trans.3635934689 |
| Short name | T123 |
| Test name | |
| Test status | |
| Simulation time | 217655885 ps |
| CPU time | 1.61 seconds |
| Started | Sep 04 05:58:36 AM UTC 24 |
| Finished | Sep 04 05:58:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3635934689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_nak_trans.3635934689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_out_iso.1681666373 |
| Short name | T1984 |
| Test name | |
| Test status | |
| Simulation time | 170080367 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 05:58:36 AM UTC 24 |
| Finished | Sep 04 05:58:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1681666373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_out_iso.1681666373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_out_stall.2060464072 |
| Short name | T1985 |
| Test name | |
| Test status | |
| Simulation time | 174161582 ps |
| CPU time | 1.55 seconds |
| Started | Sep 04 05:58:37 AM UTC 24 |
| Finished | Sep 04 05:58:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2060464072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_out_stall.2060464072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_out_trans_nak.1999485075 |
| Short name | T1987 |
| Test name | |
| Test status | |
| Simulation time | 149962226 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 05:58:38 AM UTC 24 |
| Finished | Sep 04 05:58:41 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1999485075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 27.usbdev_out_trans_nak.1999485075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_pending_in_trans.1012617940 |
| Short name | T1988 |
| Test name | |
| Test status | |
| Simulation time | 158697986 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 05:58:38 AM UTC 24 |
| Finished | Sep 04 05:58:41 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1012617940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 27.usbdev_pending_in_trans.1012617940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_phy_config_pinflip.3990966699 |
| Short name | T1990 |
| Test name | |
| Test status | |
| Simulation time | 261655562 ps |
| CPU time | 1.76 seconds |
| Started | Sep 04 05:58:38 AM UTC 24 |
| Finished | Sep 04 05:58:41 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3990966699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 27.usbdev_phy_config_pinflip.3990966699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_phy_config_usb_ref_disable.3652158705 |
| Short name | T1989 |
| Test name | |
| Test status | |
| Simulation time | 159652199 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 05:58:38 AM UTC 24 |
| Finished | Sep 04 05:58:41 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3652158705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 27.usbdev_phy_config_usb_ref_disable.3652158705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_phy_pins_sense.1558088331 |
| Short name | T1991 |
| Test name | |
| Test status | |
| Simulation time | 38172317 ps |
| CPU time | 1.07 seconds |
| Started | Sep 04 05:58:40 AM UTC 24 |
| Finished | Sep 04 05:58:42 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1558088331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_phy_pins_sense.1558088331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_buffer.1641885651 |
| Short name | T2077 |
| Test name | |
| Test status | |
| Simulation time | 11856097262 ps |
| CPU time | 34.02 seconds |
| Started | Sep 04 05:58:40 AM UTC 24 |
| Finished | Sep 04 05:59:15 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1641885651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_pkt_buffer.1641885651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_received.204855214 |
| Short name | T1996 |
| Test name | |
| Test status | |
| Simulation time | 162930525 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 05:58:41 AM UTC 24 |
| Finished | Sep 04 05:58:43 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=204855214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_pkt_received.204855214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_sent.260006811 |
| Short name | T1997 |
| Test name | |
| Test status | |
| Simulation time | 247556119 ps |
| CPU time | 1.78 seconds |
| Started | Sep 04 05:58:41 AM UTC 24 |
| Finished | Sep 04 05:58:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=260006811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_pkt_sent.260006811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_random_length_in_transaction.4260158388 |
| Short name | T1995 |
| Test name | |
| Test status | |
| Simulation time | 195978515 ps |
| CPU time | 1.12 seconds |
| Started | Sep 04 05:58:41 AM UTC 24 |
| Finished | Sep 04 05:58:43 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4260158388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 27.usbdev_random_length_in_transaction.4260158388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_random_length_out_transaction.3025412230 |
| Short name | T1999 |
| Test name | |
| Test status | |
| Simulation time | 154845450 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:58:42 AM UTC 24 |
| Finished | Sep 04 05:58:45 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3025412230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 27.usbdev_random_length_out_transaction.3025412230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_rx_crc_err.2831799023 |
| Short name | T1998 |
| Test name | |
| Test status | |
| Simulation time | 138800042 ps |
| CPU time | 1.36 seconds |
| Started | Sep 04 05:58:42 AM UTC 24 |
| Finished | Sep 04 05:58:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2831799023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_rx_crc_err.2831799023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_rx_full.3207528119 |
| Short name | T2001 |
| Test name | |
| Test status | |
| Simulation time | 240286633 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 05:58:42 AM UTC 24 |
| Finished | Sep 04 05:58:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3207528119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_rx_full.3207528119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_setup_stage.2437223900 |
| Short name | T2000 |
| Test name | |
| Test status | |
| Simulation time | 164998622 ps |
| CPU time | 1.36 seconds |
| Started | Sep 04 05:58:42 AM UTC 24 |
| Finished | Sep 04 05:58:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2437223900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_setup_stage.2437223900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_setup_trans_ignored.1264571899 |
| Short name | T2004 |
| Test name | |
| Test status | |
| Simulation time | 185152624 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:58:44 AM UTC 24 |
| Finished | Sep 04 05:58:46 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1264571899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 27.usbdev_setup_trans_ignored.1264571899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_smoke.3455618437 |
| Short name | T2007 |
| Test name | |
| Test status | |
| Simulation time | 250019966 ps |
| CPU time | 1.83 seconds |
| Started | Sep 04 05:58:44 AM UTC 24 |
| Finished | Sep 04 05:58:47 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3455618437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_smoke.3455618437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_spurious_pids_ignored.4153154932 |
| Short name | T2199 |
| Test name | |
| Test status | |
| Simulation time | 3042123569 ps |
| CPU time | 83.22 seconds |
| Started | Sep 04 05:58:44 AM UTC 24 |
| Finished | Sep 04 06:00:10 AM UTC 24 |
| Peak memory | 234244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4153154932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 27.usbdev_spurious_pids_ignored.4153154932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_stall_priority_over_nak.202577089 |
| Short name | T2005 |
| Test name | |
| Test status | |
| Simulation time | 196821687 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 05:58:44 AM UTC 24 |
| Finished | Sep 04 05:58:47 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=202577089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_stall_priority_over_nak.202577089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_stall_trans.601088370 |
| Short name | T2006 |
| Test name | |
| Test status | |
| Simulation time | 219142680 ps |
| CPU time | 1.69 seconds |
| Started | Sep 04 05:58:44 AM UTC 24 |
| Finished | Sep 04 05:58:47 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=601088370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_stall_trans.601088370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_stream_len_max.2058487902 |
| Short name | T2012 |
| Test name | |
| Test status | |
| Simulation time | 600445333 ps |
| CPU time | 2.45 seconds |
| Started | Sep 04 05:58:45 AM UTC 24 |
| Finished | Sep 04 05:58:49 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2058487902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_stream_len_max.2058487902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_streaming_out.2066788703 |
| Short name | T2122 |
| Test name | |
| Test status | |
| Simulation time | 1619886216 ps |
| CPU time | 47.93 seconds |
| Started | Sep 04 05:58:45 AM UTC 24 |
| Finished | Sep 04 05:59:35 AM UTC 24 |
| Peak memory | 227476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2066788703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_streaming_out.2066788703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_timeout_missing_host_handshake.4249534299 |
| Short name | T2024 |
| Test name | |
| Test status | |
| Simulation time | 3914901013 ps |
| CPU time | 31.61 seconds |
| Started | Sep 04 05:58:25 AM UTC 24 |
| Finished | Sep 04 05:58:58 AM UTC 24 |
| Peak memory | 217492 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4249534299 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_timeout_missing_host_handshake.4249534299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/27.usbdev_tx_rx_disruption.3083639790 |
| Short name | T2013 |
| Test name | |
| Test status | |
| Simulation time | 534186988 ps |
| CPU time | 2.85 seconds |
| Started | Sep 04 05:58:45 AM UTC 24 |
| Finished | Sep 04 05:58:49 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3083639790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_t x_rx_disruption.3083639790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/27.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/270.usbdev_tx_rx_disruption.1289211710 |
| Short name | T3578 |
| Test name | |
| Test status | |
| Simulation time | 602887329 ps |
| CPU time | 1.99 seconds |
| Started | Sep 04 06:09:33 AM UTC 24 |
| Finished | Sep 04 06:09:39 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1289211710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 270.usbdev_ tx_rx_disruption.1289211710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/270.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/271.usbdev_tx_rx_disruption.3586317612 |
| Short name | T3563 |
| Test name | |
| Test status | |
| Simulation time | 682051296 ps |
| CPU time | 1.55 seconds |
| Started | Sep 04 06:09:33 AM UTC 24 |
| Finished | Sep 04 06:09:39 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3586317612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 271.usbdev_ tx_rx_disruption.3586317612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/271.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/272.usbdev_tx_rx_disruption.1295861457 |
| Short name | T3572 |
| Test name | |
| Test status | |
| Simulation time | 584275822 ps |
| CPU time | 1.69 seconds |
| Started | Sep 04 06:09:33 AM UTC 24 |
| Finished | Sep 04 06:09:39 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1295861457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 272.usbdev_ tx_rx_disruption.1295861457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/272.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/273.usbdev_tx_rx_disruption.2122545556 |
| Short name | T3567 |
| Test name | |
| Test status | |
| Simulation time | 536281791 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 06:09:33 AM UTC 24 |
| Finished | Sep 04 06:09:39 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2122545556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 273.usbdev_ tx_rx_disruption.2122545556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/273.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/274.usbdev_tx_rx_disruption.3733917385 |
| Short name | T3564 |
| Test name | |
| Test status | |
| Simulation time | 561525207 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 06:09:33 AM UTC 24 |
| Finished | Sep 04 06:09:39 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3733917385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 274.usbdev_ tx_rx_disruption.3733917385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/274.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/275.usbdev_tx_rx_disruption.2717438661 |
| Short name | T3566 |
| Test name | |
| Test status | |
| Simulation time | 513728617 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 06:09:33 AM UTC 24 |
| Finished | Sep 04 06:09:39 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2717438661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 275.usbdev_ tx_rx_disruption.2717438661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/275.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/276.usbdev_tx_rx_disruption.3726833288 |
| Short name | T3580 |
| Test name | |
| Test status | |
| Simulation time | 525274814 ps |
| CPU time | 1.84 seconds |
| Started | Sep 04 06:09:33 AM UTC 24 |
| Finished | Sep 04 06:09:39 AM UTC 24 |
| Peak memory | 217144 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3726833288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 276.usbdev_ tx_rx_disruption.3726833288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/276.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/277.usbdev_tx_rx_disruption.3408235716 |
| Short name | T3571 |
| Test name | |
| Test status | |
| Simulation time | 442923150 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 06:09:33 AM UTC 24 |
| Finished | Sep 04 06:09:39 AM UTC 24 |
| Peak memory | 214928 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3408235716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 277.usbdev_ tx_rx_disruption.3408235716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/277.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/278.usbdev_tx_rx_disruption.480749665 |
| Short name | T3568 |
| Test name | |
| Test status | |
| Simulation time | 443902751 ps |
| CPU time | 1.37 seconds |
| Started | Sep 04 06:09:33 AM UTC 24 |
| Finished | Sep 04 06:09:39 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=480749665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 278.usbdev_t x_rx_disruption.480749665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/278.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/279.usbdev_tx_rx_disruption.88972510 |
| Short name | T3581 |
| Test name | |
| Test status | |
| Simulation time | 553439735 ps |
| CPU time | 1.86 seconds |
| Started | Sep 04 06:09:33 AM UTC 24 |
| Finished | Sep 04 06:09:39 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=88972510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 279.usbdev_tx _rx_disruption.88972510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/279.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_alert_test.651153140 |
| Short name | T2067 |
| Test name | |
| Test status | |
| Simulation time | 44580266 ps |
| CPU time | 1.01 seconds |
| Started | Sep 04 05:59:09 AM UTC 24 |
| Finished | Sep 04 05:59:11 AM UTC 24 |
| Peak memory | 214820 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=651153140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 28.usbdev_alert_test.651153140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_disconnect.3580533873 |
| Short name | T2036 |
| Test name | |
| Test status | |
| Simulation time | 9704930814 ps |
| CPU time | 12.4 seconds |
| Started | Sep 04 05:58:47 AM UTC 24 |
| Finished | Sep 04 05:59:00 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3580533873 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_disconnect.3580533873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_reset.1043904394 |
| Short name | T2074 |
| Test name | |
| Test status | |
| Simulation time | 14241845401 ps |
| CPU time | 24.6 seconds |
| Started | Sep 04 05:58:47 AM UTC 24 |
| Finished | Sep 04 05:59:13 AM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1043904394 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_reset.1043904394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_resume.3386908764 |
| Short name | T2100 |
| Test name | |
| Test status | |
| Simulation time | 25919298214 ps |
| CPU time | 40.87 seconds |
| Started | Sep 04 05:58:47 AM UTC 24 |
| Finished | Sep 04 05:59:29 AM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3386908764 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_resume.3386908764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_av_buffer.1863371077 |
| Short name | T2015 |
| Test name | |
| Test status | |
| Simulation time | 266733118 ps |
| CPU time | 1.9 seconds |
| Started | Sep 04 05:58:48 AM UTC 24 |
| Finished | Sep 04 05:58:51 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1863371077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_av_buffer.1863371077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_bitstuff_err.3117557491 |
| Short name | T2014 |
| Test name | |
| Test status | |
| Simulation time | 152209162 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 05:58:48 AM UTC 24 |
| Finished | Sep 04 05:58:51 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3117557491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_bitstuff_err.3117557491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_data_toggle_clear.2050765442 |
| Short name | T2018 |
| Test name | |
| Test status | |
| Simulation time | 563742964 ps |
| CPU time | 3.24 seconds |
| Started | Sep 04 05:58:48 AM UTC 24 |
| Finished | Sep 04 05:58:53 AM UTC 24 |
| Peak memory | 216892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2050765442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 28.usbdev_data_toggle_clear.2050765442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_data_toggle_restore.1500882575 |
| Short name | T2020 |
| Test name | |
| Test status | |
| Simulation time | 699172845 ps |
| CPU time | 3.72 seconds |
| Started | Sep 04 05:58:48 AM UTC 24 |
| Finished | Sep 04 05:58:53 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1500882575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_data_toggle_restore.1500882575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_device_address.3788595811 |
| Short name | T2131 |
| Test name | |
| Test status | |
| Simulation time | 23721148275 ps |
| CPU time | 47.58 seconds |
| Started | Sep 04 05:58:48 AM UTC 24 |
| Finished | Sep 04 05:59:38 AM UTC 24 |
| Peak memory | 217488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3788595811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_device_address.3788595811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_device_timeout.748737634 |
| Short name | T2138 |
| Test name | |
| Test status | |
| Simulation time | 5242669488 ps |
| CPU time | 51.14 seconds |
| Started | Sep 04 05:58:49 AM UTC 24 |
| Finished | Sep 04 05:59:41 AM UTC 24 |
| Peak memory | 217504 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=748737634 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_device_timeout.748737634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_disable_endpoint.3710190437 |
| Short name | T2022 |
| Test name | |
| Test status | |
| Simulation time | 722825687 ps |
| CPU time | 3.34 seconds |
| Started | Sep 04 05:58:50 AM UTC 24 |
| Finished | Sep 04 05:58:54 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3710190437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 28.usbdev_disable_endpoint.3710190437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_disconnected.4039913157 |
| Short name | T2017 |
| Test name | |
| Test status | |
| Simulation time | 139293161 ps |
| CPU time | 1.28 seconds |
| Started | Sep 04 05:58:50 AM UTC 24 |
| Finished | Sep 04 05:58:52 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4039913157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_disconnected.4039913157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_enable.383667670 |
| Short name | T2021 |
| Test name | |
| Test status | |
| Simulation time | 32464405 ps |
| CPU time | 1.1 seconds |
| Started | Sep 04 05:58:52 AM UTC 24 |
| Finished | Sep 04 05:58:54 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=383667670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_enable.383667670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_endpoint_access.521053241 |
| Short name | T2031 |
| Test name | |
| Test status | |
| Simulation time | 918841994 ps |
| CPU time | 5.07 seconds |
| Started | Sep 04 05:58:52 AM UTC 24 |
| Finished | Sep 04 05:58:58 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=521053241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_endpoint_access.521053241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_endpoint_types.1344594784 |
| Short name | T341 |
| Test name | |
| Test status | |
| Simulation time | 511396273 ps |
| CPU time | 2.83 seconds |
| Started | Sep 04 05:58:55 AM UTC 24 |
| Finished | Sep 04 05:58:59 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1344594784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_endpoint_types.1344594784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_fifo_levels.1765448557 |
| Short name | T575 |
| Test name | |
| Test status | |
| Simulation time | 270365322 ps |
| CPU time | 1.84 seconds |
| Started | Sep 04 05:58:55 AM UTC 24 |
| Finished | Sep 04 05:58:58 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1765448557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_fifo_levels.1765448557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_fifo_rst.3557663164 |
| Short name | T2035 |
| Test name | |
| Test status | |
| Simulation time | 293497538 ps |
| CPU time | 3.27 seconds |
| Started | Sep 04 05:58:55 AM UTC 24 |
| Finished | Sep 04 05:59:00 AM UTC 24 |
| Peak memory | 217088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3557663164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_fifo_rst.3557663164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_in_iso.1175591632 |
| Short name | T2026 |
| Test name | |
| Test status | |
| Simulation time | 169357025 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:58:55 AM UTC 24 |
| Finished | Sep 04 05:58:58 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1175591632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 28.usbdev_in_iso.1175591632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_in_stall.1081304277 |
| Short name | T2027 |
| Test name | |
| Test status | |
| Simulation time | 144300745 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:58:55 AM UTC 24 |
| Finished | Sep 04 05:58:58 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1081304277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_in_stall.1081304277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_in_trans.1177994787 |
| Short name | T2032 |
| Test name | |
| Test status | |
| Simulation time | 210391396 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 05:58:55 AM UTC 24 |
| Finished | Sep 04 05:58:58 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1177994787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_in_trans.1177994787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_invalid_sync.964540539 |
| Short name | T2117 |
| Test name | |
| Test status | |
| Simulation time | 2812212527 ps |
| CPU time | 36.46 seconds |
| Started | Sep 04 05:58:55 AM UTC 24 |
| Finished | Sep 04 05:59:33 AM UTC 24 |
| Peak memory | 234252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=964540539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 28.usbdev_invalid_sync.964540539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_iso_retraction.3414034396 |
| Short name | T2093 |
| Test name | |
| Test status | |
| Simulation time | 4002606481 ps |
| CPU time | 27.49 seconds |
| Started | Sep 04 05:58:58 AM UTC 24 |
| Finished | Sep 04 05:59:26 AM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3414034396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_iso_retraction.3414034396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_link_in_err.2354175524 |
| Short name | T2037 |
| Test name | |
| Test status | |
| Simulation time | 159154544 ps |
| CPU time | 1.19 seconds |
| Started | Sep 04 05:58:59 AM UTC 24 |
| Finished | Sep 04 05:59:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2354175524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_link_in_err.2354175524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_link_resume.3176375247 |
| Short name | T2089 |
| Test name | |
| Test status | |
| Simulation time | 13658024875 ps |
| CPU time | 22.21 seconds |
| Started | Sep 04 05:58:59 AM UTC 24 |
| Finished | Sep 04 05:59:23 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3176375247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_link_resume.3176375247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_link_suspend.3524364588 |
| Short name | T2068 |
| Test name | |
| Test status | |
| Simulation time | 5690002560 ps |
| CPU time | 10.57 seconds |
| Started | Sep 04 05:58:59 AM UTC 24 |
| Finished | Sep 04 05:59:11 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3524364588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_link_suspend.3524364588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_low_speed_traffic.2009747317 |
| Short name | T2121 |
| Test name | |
| Test status | |
| Simulation time | 4628877405 ps |
| CPU time | 33.49 seconds |
| Started | Sep 04 05:58:59 AM UTC 24 |
| Finished | Sep 04 05:59:34 AM UTC 24 |
| Peak memory | 231648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2009747317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_low_speed_traffic.2009747317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_max_inter_pkt_delay.165711908 |
| Short name | T2105 |
| Test name | |
| Test status | |
| Simulation time | 3085631662 ps |
| CPU time | 29.99 seconds |
| Started | Sep 04 05:58:59 AM UTC 24 |
| Finished | Sep 04 05:59:31 AM UTC 24 |
| Peak memory | 227672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=165711908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_max_inter_pkt_delay.165711908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_max_length_in_transaction.268025611 |
| Short name | T2041 |
| Test name | |
| Test status | |
| Simulation time | 246925334 ps |
| CPU time | 1.78 seconds |
| Started | Sep 04 05:58:59 AM UTC 24 |
| Finished | Sep 04 05:59:02 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=268025611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 28.usbdev_max_length_in_transaction.268025611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_max_length_out_transaction.2530685227 |
| Short name | T2038 |
| Test name | |
| Test status | |
| Simulation time | 199136767 ps |
| CPU time | 1.2 seconds |
| Started | Sep 04 05:58:59 AM UTC 24 |
| Finished | Sep 04 05:59:02 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2530685227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 28.usbdev_max_length_out_transaction.2530685227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_min_inter_pkt_delay.1897773674 |
| Short name | T2092 |
| Test name | |
| Test status | |
| Simulation time | 3028992402 ps |
| CPU time | 23.78 seconds |
| Started | Sep 04 05:58:59 AM UTC 24 |
| Finished | Sep 04 05:59:25 AM UTC 24 |
| Peak memory | 227500 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1897773674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_min_inter_pkt_delay.1897773674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_min_length_in_transaction.951709674 |
| Short name | T2040 |
| Test name | |
| Test status | |
| Simulation time | 156990931 ps |
| CPU time | 1.55 seconds |
| Started | Sep 04 05:58:59 AM UTC 24 |
| Finished | Sep 04 05:59:02 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=951709674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 28.usbdev_min_length_in_transaction.951709674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_min_length_out_transaction.559020248 |
| Short name | T2039 |
| Test name | |
| Test status | |
| Simulation time | 143896525 ps |
| CPU time | 1.12 seconds |
| Started | Sep 04 05:58:59 AM UTC 24 |
| Finished | Sep 04 05:59:02 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=559020248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 28.usbdev_min_length_out_transaction.559020248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_nak_trans.2734693830 |
| Short name | T2044 |
| Test name | |
| Test status | |
| Simulation time | 209583730 ps |
| CPU time | 1.61 seconds |
| Started | Sep 04 05:59:01 AM UTC 24 |
| Finished | Sep 04 05:59:04 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2734693830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_nak_trans.2734693830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_out_iso.3724337196 |
| Short name | T2043 |
| Test name | |
| Test status | |
| Simulation time | 172364274 ps |
| CPU time | 1.1 seconds |
| Started | Sep 04 05:59:01 AM UTC 24 |
| Finished | Sep 04 05:59:03 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3724337196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 28.usbdev_out_iso.3724337196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_out_stall.3142718017 |
| Short name | T2045 |
| Test name | |
| Test status | |
| Simulation time | 233923144 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 05:59:01 AM UTC 24 |
| Finished | Sep 04 05:59:04 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3142718017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_out_stall.3142718017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_out_trans_nak.3162249999 |
| Short name | T2047 |
| Test name | |
| Test status | |
| Simulation time | 154373863 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 05:59:01 AM UTC 24 |
| Finished | Sep 04 05:59:04 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3162249999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 28.usbdev_out_trans_nak.3162249999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_pending_in_trans.758876783 |
| Short name | T2048 |
| Test name | |
| Test status | |
| Simulation time | 213273129 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 05:59:01 AM UTC 24 |
| Finished | Sep 04 05:59:04 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=758876783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_pending_in_trans.758876783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_phy_config_pinflip.154401543 |
| Short name | T2051 |
| Test name | |
| Test status | |
| Simulation time | 209884549 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 05:59:02 AM UTC 24 |
| Finished | Sep 04 05:59:05 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=154401543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 28.usbdev_phy_config_pinflip.154401543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_phy_config_usb_ref_disable.1716872145 |
| Short name | T2052 |
| Test name | |
| Test status | |
| Simulation time | 155300501 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 05:59:02 AM UTC 24 |
| Finished | Sep 04 05:59:05 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1716872145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 28.usbdev_phy_config_usb_ref_disable.1716872145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_phy_pins_sense.4207480638 |
| Short name | T2050 |
| Test name | |
| Test status | |
| Simulation time | 49491006 ps |
| CPU time | 0.92 seconds |
| Started | Sep 04 05:59:02 AM UTC 24 |
| Finished | Sep 04 05:59:05 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4207480638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_phy_pins_sense.4207480638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_buffer.932282245 |
| Short name | T2151 |
| Test name | |
| Test status | |
| Simulation time | 13286803554 ps |
| CPU time | 41.01 seconds |
| Started | Sep 04 05:59:04 AM UTC 24 |
| Finished | Sep 04 05:59:47 AM UTC 24 |
| Peak memory | 227660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=932282245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_pkt_buffer.932282245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_received.2968583074 |
| Short name | T2055 |
| Test name | |
| Test status | |
| Simulation time | 219215386 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 05:59:04 AM UTC 24 |
| Finished | Sep 04 05:59:07 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2968583074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_pkt_received.2968583074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_sent.1895841901 |
| Short name | T2056 |
| Test name | |
| Test status | |
| Simulation time | 229355401 ps |
| CPU time | 1.71 seconds |
| Started | Sep 04 05:59:04 AM UTC 24 |
| Finished | Sep 04 05:59:07 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1895841901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_pkt_sent.1895841901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_random_length_in_transaction.860163941 |
| Short name | T2054 |
| Test name | |
| Test status | |
| Simulation time | 214216210 ps |
| CPU time | 1.36 seconds |
| Started | Sep 04 05:59:04 AM UTC 24 |
| Finished | Sep 04 05:59:07 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=860163941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_random_length_in_transaction.860163941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_random_length_out_transaction.511531579 |
| Short name | T2060 |
| Test name | |
| Test status | |
| Simulation time | 144462156 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 05:59:06 AM UTC 24 |
| Finished | Sep 04 05:59:08 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=511531579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 28.usbdev_random_length_out_transaction.511531579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_rx_crc_err.161425557 |
| Short name | T2059 |
| Test name | |
| Test status | |
| Simulation time | 154619026 ps |
| CPU time | 1.33 seconds |
| Started | Sep 04 05:59:06 AM UTC 24 |
| Finished | Sep 04 05:59:08 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=161425557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_rx_crc_err.161425557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_rx_full.3814134414 |
| Short name | T2064 |
| Test name | |
| Test status | |
| Simulation time | 243952205 ps |
| CPU time | 1.71 seconds |
| Started | Sep 04 05:59:06 AM UTC 24 |
| Finished | Sep 04 05:59:08 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3814134414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 28.usbdev_rx_full.3814134414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_setup_stage.2063087571 |
| Short name | T2057 |
| Test name | |
| Test status | |
| Simulation time | 149058278 ps |
| CPU time | 1.18 seconds |
| Started | Sep 04 05:59:06 AM UTC 24 |
| Finished | Sep 04 05:59:08 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2063087571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_setup_stage.2063087571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_setup_trans_ignored.3724646984 |
| Short name | T2061 |
| Test name | |
| Test status | |
| Simulation time | 163354696 ps |
| CPU time | 1.36 seconds |
| Started | Sep 04 05:59:06 AM UTC 24 |
| Finished | Sep 04 05:59:08 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3724646984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 28.usbdev_setup_trans_ignored.3724646984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_smoke.3313855822 |
| Short name | T2058 |
| Test name | |
| Test status | |
| Simulation time | 243866552 ps |
| CPU time | 1.16 seconds |
| Started | Sep 04 05:59:06 AM UTC 24 |
| Finished | Sep 04 05:59:08 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3313855822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_smoke.3313855822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_spurious_pids_ignored.645878049 |
| Short name | T2102 |
| Test name | |
| Test status | |
| Simulation time | 2351183405 ps |
| CPU time | 22.12 seconds |
| Started | Sep 04 05:59:06 AM UTC 24 |
| Finished | Sep 04 05:59:29 AM UTC 24 |
| Peak memory | 229720 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=645878049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 28.usbdev_spurious_pids_ignored.645878049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_stall_priority_over_nak.2454843412 |
| Short name | T2062 |
| Test name | |
| Test status | |
| Simulation time | 190561433 ps |
| CPU time | 1.25 seconds |
| Started | Sep 04 05:59:06 AM UTC 24 |
| Finished | Sep 04 05:59:08 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2454843412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_stall_priority_over_nak.2454843412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_stall_trans.1500959164 |
| Short name | T2063 |
| Test name | |
| Test status | |
| Simulation time | 184855846 ps |
| CPU time | 1.21 seconds |
| Started | Sep 04 05:59:06 AM UTC 24 |
| Finished | Sep 04 05:59:08 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1500959164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_stall_trans.1500959164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_stream_len_max.2437330550 |
| Short name | T2065 |
| Test name | |
| Test status | |
| Simulation time | 389648325 ps |
| CPU time | 1.72 seconds |
| Started | Sep 04 05:59:07 AM UTC 24 |
| Finished | Sep 04 05:59:10 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2437330550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_stream_len_max.2437330550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_streaming_out.4109964553 |
| Short name | T2118 |
| Test name | |
| Test status | |
| Simulation time | 2788778954 ps |
| CPU time | 24.98 seconds |
| Started | Sep 04 05:59:07 AM UTC 24 |
| Finished | Sep 04 05:59:34 AM UTC 24 |
| Peak memory | 229576 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4109964553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_streaming_out.4109964553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_timeout_missing_host_handshake.4144710246 |
| Short name | T2072 |
| Test name | |
| Test status | |
| Simulation time | 2503512922 ps |
| CPU time | 20.95 seconds |
| Started | Sep 04 05:58:50 AM UTC 24 |
| Finished | Sep 04 05:59:12 AM UTC 24 |
| Peak memory | 217516 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4144710246 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_timeout_missing_host_handshake.4144710246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/28.usbdev_tx_rx_disruption.1047009785 |
| Short name | T2066 |
| Test name | |
| Test status | |
| Simulation time | 431618497 ps |
| CPU time | 1.91 seconds |
| Started | Sep 04 05:59:07 AM UTC 24 |
| Finished | Sep 04 05:59:11 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1047009785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_t x_rx_disruption.1047009785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/28.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/280.usbdev_tx_rx_disruption.2810349022 |
| Short name | T3569 |
| Test name | |
| Test status | |
| Simulation time | 565332878 ps |
| CPU time | 1.37 seconds |
| Started | Sep 04 06:09:33 AM UTC 24 |
| Finished | Sep 04 06:09:39 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2810349022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 280.usbdev_ tx_rx_disruption.2810349022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/280.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/281.usbdev_tx_rx_disruption.856565613 |
| Short name | T3570 |
| Test name | |
| Test status | |
| Simulation time | 476199050 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 06:09:33 AM UTC 24 |
| Finished | Sep 04 06:09:39 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=856565613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 281.usbdev_t x_rx_disruption.856565613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/281.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/282.usbdev_tx_rx_disruption.3994443079 |
| Short name | T3574 |
| Test name | |
| Test status | |
| Simulation time | 699335519 ps |
| CPU time | 1.71 seconds |
| Started | Sep 04 06:09:36 AM UTC 24 |
| Finished | Sep 04 06:09:39 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3994443079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 282.usbdev_ tx_rx_disruption.3994443079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/282.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/283.usbdev_tx_rx_disruption.2817587939 |
| Short name | T3575 |
| Test name | |
| Test status | |
| Simulation time | 703004441 ps |
| CPU time | 1.8 seconds |
| Started | Sep 04 06:09:36 AM UTC 24 |
| Finished | Sep 04 06:09:39 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2817587939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 283.usbdev_ tx_rx_disruption.2817587939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/283.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/284.usbdev_tx_rx_disruption.569609930 |
| Short name | T3562 |
| Test name | |
| Test status | |
| Simulation time | 393556858 ps |
| CPU time | 1.24 seconds |
| Started | Sep 04 06:09:36 AM UTC 24 |
| Finished | Sep 04 06:09:39 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=569609930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 284.usbdev_t x_rx_disruption.569609930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/284.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/285.usbdev_tx_rx_disruption.904936005 |
| Short name | T3584 |
| Test name | |
| Test status | |
| Simulation time | 481773672 ps |
| CPU time | 2.01 seconds |
| Started | Sep 04 06:09:36 AM UTC 24 |
| Finished | Sep 04 06:09:40 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=904936005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 285.usbdev_t x_rx_disruption.904936005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/285.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/286.usbdev_tx_rx_disruption.104700934 |
| Short name | T3573 |
| Test name | |
| Test status | |
| Simulation time | 545630254 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 06:09:36 AM UTC 24 |
| Finished | Sep 04 06:09:39 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=104700934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 286.usbdev_t x_rx_disruption.104700934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/286.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/287.usbdev_tx_rx_disruption.2165368529 |
| Short name | T3576 |
| Test name | |
| Test status | |
| Simulation time | 560372617 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 06:09:36 AM UTC 24 |
| Finished | Sep 04 06:09:39 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2165368529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 287.usbdev_ tx_rx_disruption.2165368529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/287.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/288.usbdev_tx_rx_disruption.2252123787 |
| Short name | T3577 |
| Test name | |
| Test status | |
| Simulation time | 639641118 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 06:09:36 AM UTC 24 |
| Finished | Sep 04 06:09:39 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2252123787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 288.usbdev_ tx_rx_disruption.2252123787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/288.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/289.usbdev_tx_rx_disruption.329100108 |
| Short name | T3583 |
| Test name | |
| Test status | |
| Simulation time | 472449683 ps |
| CPU time | 1.78 seconds |
| Started | Sep 04 06:09:36 AM UTC 24 |
| Finished | Sep 04 06:09:40 AM UTC 24 |
| Peak memory | 214972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=329100108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 289.usbdev_t x_rx_disruption.329100108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/289.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_alert_test.679852450 |
| Short name | T2124 |
| Test name | |
| Test status | |
| Simulation time | 51533013 ps |
| CPU time | 0.92 seconds |
| Started | Sep 04 05:59:33 AM UTC 24 |
| Finished | Sep 04 05:59:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=679852450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 29.usbdev_alert_test.679852450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_disconnect.3147357034 |
| Short name | T2097 |
| Test name | |
| Test status | |
| Simulation time | 11022642363 ps |
| CPU time | 17.48 seconds |
| Started | Sep 04 05:59:09 AM UTC 24 |
| Finished | Sep 04 05:59:28 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3147357034 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_disconnect.3147357034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_reset.694527509 |
| Short name | T2130 |
| Test name | |
| Test status | |
| Simulation time | 18633829848 ps |
| CPU time | 27.23 seconds |
| Started | Sep 04 05:59:09 AM UTC 24 |
| Finished | Sep 04 05:59:37 AM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=694527509 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_reset.694527509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_resume.3968301418 |
| Short name | T2185 |
| Test name | |
| Test status | |
| Simulation time | 29800025677 ps |
| CPU time | 52.79 seconds |
| Started | Sep 04 05:59:09 AM UTC 24 |
| Finished | Sep 04 06:00:03 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3968301418 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_resume.3968301418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_av_buffer.2437985014 |
| Short name | T2069 |
| Test name | |
| Test status | |
| Simulation time | 208364815 ps |
| CPU time | 1.08 seconds |
| Started | Sep 04 05:59:09 AM UTC 24 |
| Finished | Sep 04 05:59:11 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2437985014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_av_buffer.2437985014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_bitstuff_err.1487367115 |
| Short name | T2071 |
| Test name | |
| Test status | |
| Simulation time | 164627410 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 05:59:09 AM UTC 24 |
| Finished | Sep 04 05:59:12 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1487367115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_bitstuff_err.1487367115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_data_toggle_clear.1799571753 |
| Short name | T2073 |
| Test name | |
| Test status | |
| Simulation time | 253515219 ps |
| CPU time | 1.92 seconds |
| Started | Sep 04 05:59:09 AM UTC 24 |
| Finished | Sep 04 05:59:12 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1799571753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 29.usbdev_data_toggle_clear.1799571753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_data_toggle_restore.93312794 |
| Short name | T2076 |
| Test name | |
| Test status | |
| Simulation time | 1191798662 ps |
| CPU time | 3.2 seconds |
| Started | Sep 04 05:59:10 AM UTC 24 |
| Finished | Sep 04 05:59:15 AM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=93312794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_data_toggle_restore.93312794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_device_address.4258349669 |
| Short name | T2289 |
| Test name | |
| Test status | |
| Simulation time | 41802070543 ps |
| CPU time | 97.29 seconds |
| Started | Sep 04 05:59:10 AM UTC 24 |
| Finished | Sep 04 06:00:50 AM UTC 24 |
| Peak memory | 217452 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4258349669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_device_address.4258349669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_device_timeout.2746481458 |
| Short name | T2129 |
| Test name | |
| Test status | |
| Simulation time | 3545205210 ps |
| CPU time | 24.44 seconds |
| Started | Sep 04 05:59:12 AM UTC 24 |
| Finished | Sep 04 05:59:37 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2746481458 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_device_timeout.2746481458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_disable_endpoint.204506886 |
| Short name | T2080 |
| Test name | |
| Test status | |
| Simulation time | 762231976 ps |
| CPU time | 3.2 seconds |
| Started | Sep 04 05:59:12 AM UTC 24 |
| Finished | Sep 04 05:59:16 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=204506886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_disable_endpoint.204506886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_disconnected.3440988044 |
| Short name | T2079 |
| Test name | |
| Test status | |
| Simulation time | 142402560 ps |
| CPU time | 1.36 seconds |
| Started | Sep 04 05:59:13 AM UTC 24 |
| Finished | Sep 04 05:59:15 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3440988044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_disconnected.3440988044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_enable.1387134990 |
| Short name | T2078 |
| Test name | |
| Test status | |
| Simulation time | 69281391 ps |
| CPU time | 1.15 seconds |
| Started | Sep 04 05:59:13 AM UTC 24 |
| Finished | Sep 04 05:59:15 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1387134990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 29.usbdev_enable.1387134990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_endpoint_access.1266752315 |
| Short name | T2081 |
| Test name | |
| Test status | |
| Simulation time | 917233428 ps |
| CPU time | 2.49 seconds |
| Started | Sep 04 05:59:13 AM UTC 24 |
| Finished | Sep 04 05:59:17 AM UTC 24 |
| Peak memory | 217116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1266752315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_endpoint_access.1266752315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_endpoint_types.391769978 |
| Short name | T419 |
| Test name | |
| Test status | |
| Simulation time | 421473987 ps |
| CPU time | 1.6 seconds |
| Started | Sep 04 05:59:13 AM UTC 24 |
| Finished | Sep 04 05:59:16 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=391769978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 29.usbdev_endpoint_types.391769978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_fifo_levels.3464384158 |
| Short name | T534 |
| Test name | |
| Test status | |
| Simulation time | 165868699 ps |
| CPU time | 1.57 seconds |
| Started | Sep 04 05:59:13 AM UTC 24 |
| Finished | Sep 04 05:59:16 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3464384158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_fifo_levels.3464384158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_fifo_rst.2239559701 |
| Short name | T2082 |
| Test name | |
| Test status | |
| Simulation time | 255516693 ps |
| CPU time | 2.99 seconds |
| Started | Sep 04 05:59:13 AM UTC 24 |
| Finished | Sep 04 05:59:17 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2239559701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_fifo_rst.2239559701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_in_iso.433910959 |
| Short name | T2083 |
| Test name | |
| Test status | |
| Simulation time | 165394421 ps |
| CPU time | 1.09 seconds |
| Started | Sep 04 05:59:16 AM UTC 24 |
| Finished | Sep 04 05:59:18 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=433910959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 29.usbdev_in_iso.433910959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_in_stall.158459836 |
| Short name | T2084 |
| Test name | |
| Test status | |
| Simulation time | 157058386 ps |
| CPU time | 1.36 seconds |
| Started | Sep 04 05:59:16 AM UTC 24 |
| Finished | Sep 04 05:59:18 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=158459836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 29.usbdev_in_stall.158459836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_in_trans.2181134080 |
| Short name | T2085 |
| Test name | |
| Test status | |
| Simulation time | 253761949 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 05:59:16 AM UTC 24 |
| Finished | Sep 04 05:59:19 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2181134080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_in_trans.2181134080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_invalid_sync.2144070658 |
| Short name | T2349 |
| Test name | |
| Test status | |
| Simulation time | 4450243101 ps |
| CPU time | 122.19 seconds |
| Started | Sep 04 05:59:14 AM UTC 24 |
| Finished | Sep 04 06:01:19 AM UTC 24 |
| Peak memory | 229960 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2144070658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 29.usbdev_invalid_sync.2144070658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_iso_retraction.3757858218 |
| Short name | T2232 |
| Test name | |
| Test status | |
| Simulation time | 9297075729 ps |
| CPU time | 66.71 seconds |
| Started | Sep 04 05:59:16 AM UTC 24 |
| Finished | Sep 04 06:00:25 AM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3757858218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_iso_retraction.3757858218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_link_in_err.3847459472 |
| Short name | T2086 |
| Test name | |
| Test status | |
| Simulation time | 198039375 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 05:59:17 AM UTC 24 |
| Finished | Sep 04 05:59:20 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3847459472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_link_in_err.3847459472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_link_resume.3814815717 |
| Short name | T2254 |
| Test name | |
| Test status | |
| Simulation time | 32225978847 ps |
| CPU time | 75.56 seconds |
| Started | Sep 04 05:59:17 AM UTC 24 |
| Finished | Sep 04 06:00:35 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3814815717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_link_resume.3814815717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_link_suspend.821020057 |
| Short name | T2116 |
| Test name | |
| Test status | |
| Simulation time | 5838081056 ps |
| CPU time | 14.6 seconds |
| Started | Sep 04 05:59:17 AM UTC 24 |
| Finished | Sep 04 05:59:33 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=821020057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_link_suspend.821020057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_low_speed_traffic.3651920142 |
| Short name | T2156 |
| Test name | |
| Test status | |
| Simulation time | 3528857269 ps |
| CPU time | 29 seconds |
| Started | Sep 04 05:59:17 AM UTC 24 |
| Finished | Sep 04 05:59:48 AM UTC 24 |
| Peak memory | 231660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3651920142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_low_speed_traffic.3651920142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_max_inter_pkt_delay.3637001984 |
| Short name | T2179 |
| Test name | |
| Test status | |
| Simulation time | 4227327230 ps |
| CPU time | 40.04 seconds |
| Started | Sep 04 05:59:19 AM UTC 24 |
| Finished | Sep 04 06:00:00 AM UTC 24 |
| Peak memory | 229584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3637001984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_max_inter_pkt_delay.3637001984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_max_length_in_transaction.1853106980 |
| Short name | T2087 |
| Test name | |
| Test status | |
| Simulation time | 258516485 ps |
| CPU time | 1.76 seconds |
| Started | Sep 04 05:59:19 AM UTC 24 |
| Finished | Sep 04 05:59:22 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1853106980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 29.usbdev_max_length_in_transaction.1853106980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_max_length_out_transaction.3788473109 |
| Short name | T2088 |
| Test name | |
| Test status | |
| Simulation time | 192722358 ps |
| CPU time | 1.12 seconds |
| Started | Sep 04 05:59:20 AM UTC 24 |
| Finished | Sep 04 05:59:22 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3788473109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 29.usbdev_max_length_out_transaction.3788473109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_min_inter_pkt_delay.1273566436 |
| Short name | T2236 |
| Test name | |
| Test status | |
| Simulation time | 2562246095 ps |
| CPU time | 65.16 seconds |
| Started | Sep 04 05:59:20 AM UTC 24 |
| Finished | Sep 04 06:00:27 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1273566436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_min_inter_pkt_delay.1273566436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_min_length_in_transaction.289138562 |
| Short name | T2090 |
| Test name | |
| Test status | |
| Simulation time | 154317266 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 05:59:21 AM UTC 24 |
| Finished | Sep 04 05:59:23 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=289138562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 29.usbdev_min_length_in_transaction.289138562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_min_length_out_transaction.2961591539 |
| Short name | T2091 |
| Test name | |
| Test status | |
| Simulation time | 156279802 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 05:59:22 AM UTC 24 |
| Finished | Sep 04 05:59:24 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2961591539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 29.usbdev_min_length_out_transaction.2961591539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_out_iso.1741379283 |
| Short name | T2094 |
| Test name | |
| Test status | |
| Simulation time | 190191711 ps |
| CPU time | 1.25 seconds |
| Started | Sep 04 05:59:24 AM UTC 24 |
| Finished | Sep 04 05:59:27 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1741379283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 29.usbdev_out_iso.1741379283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_out_stall.2418055849 |
| Short name | T2096 |
| Test name | |
| Test status | |
| Simulation time | 178355541 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:59:24 AM UTC 24 |
| Finished | Sep 04 05:59:27 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2418055849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_out_stall.2418055849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_out_trans_nak.1712563910 |
| Short name | T2099 |
| Test name | |
| Test status | |
| Simulation time | 155605822 ps |
| CPU time | 1.37 seconds |
| Started | Sep 04 05:59:26 AM UTC 24 |
| Finished | Sep 04 05:59:28 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1712563910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 29.usbdev_out_trans_nak.1712563910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_pending_in_trans.2465202741 |
| Short name | T2098 |
| Test name | |
| Test status | |
| Simulation time | 158444204 ps |
| CPU time | 1.18 seconds |
| Started | Sep 04 05:59:26 AM UTC 24 |
| Finished | Sep 04 05:59:28 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2465202741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 29.usbdev_pending_in_trans.2465202741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_phy_config_pinflip.1283002859 |
| Short name | T2104 |
| Test name | |
| Test status | |
| Simulation time | 248310948 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 05:59:27 AM UTC 24 |
| Finished | Sep 04 05:59:29 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1283002859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 29.usbdev_phy_config_pinflip.1283002859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_phy_config_usb_ref_disable.382487194 |
| Short name | T2103 |
| Test name | |
| Test status | |
| Simulation time | 147125703 ps |
| CPU time | 1.29 seconds |
| Started | Sep 04 05:59:27 AM UTC 24 |
| Finished | Sep 04 05:59:29 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=382487194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 29.usbdev_phy_config_usb_ref_disable.382487194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_phy_pins_sense.3504533490 |
| Short name | T2101 |
| Test name | |
| Test status | |
| Simulation time | 68076271 ps |
| CPU time | 1.01 seconds |
| Started | Sep 04 05:59:27 AM UTC 24 |
| Finished | Sep 04 05:59:29 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3504533490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_phy_pins_sense.3504533490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_buffer.3528299038 |
| Short name | T2257 |
| Test name | |
| Test status | |
| Simulation time | 19539343865 ps |
| CPU time | 66.58 seconds |
| Started | Sep 04 05:59:28 AM UTC 24 |
| Finished | Sep 04 06:00:37 AM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3528299038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_pkt_buffer.3528299038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_received.1358207332 |
| Short name | T2107 |
| Test name | |
| Test status | |
| Simulation time | 191712105 ps |
| CPU time | 1.61 seconds |
| Started | Sep 04 05:59:29 AM UTC 24 |
| Finished | Sep 04 05:59:31 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1358207332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_pkt_received.1358207332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_sent.557408922 |
| Short name | T2108 |
| Test name | |
| Test status | |
| Simulation time | 199028598 ps |
| CPU time | 1.69 seconds |
| Started | Sep 04 05:59:29 AM UTC 24 |
| Finished | Sep 04 05:59:31 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=557408922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 29.usbdev_pkt_sent.557408922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_random_length_in_transaction.252410991 |
| Short name | T2109 |
| Test name | |
| Test status | |
| Simulation time | 229378218 ps |
| CPU time | 1.7 seconds |
| Started | Sep 04 05:59:29 AM UTC 24 |
| Finished | Sep 04 05:59:31 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=252410991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_random_length_in_transaction.252410991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_random_length_out_transaction.296252699 |
| Short name | T2106 |
| Test name | |
| Test status | |
| Simulation time | 156417430 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 05:59:29 AM UTC 24 |
| Finished | Sep 04 05:59:31 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=296252699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 29.usbdev_random_length_out_transaction.296252699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_rx_crc_err.2918310139 |
| Short name | T2113 |
| Test name | |
| Test status | |
| Simulation time | 186409656 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 05:59:30 AM UTC 24 |
| Finished | Sep 04 05:59:33 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2918310139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_rx_crc_err.2918310139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_rx_full.463957410 |
| Short name | T2114 |
| Test name | |
| Test status | |
| Simulation time | 414750967 ps |
| CPU time | 1.78 seconds |
| Started | Sep 04 05:59:30 AM UTC 24 |
| Finished | Sep 04 05:59:33 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=463957410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 29.usbdev_rx_full.463957410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_setup_stage.2577108998 |
| Short name | T2112 |
| Test name | |
| Test status | |
| Simulation time | 157736554 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 05:59:30 AM UTC 24 |
| Finished | Sep 04 05:59:33 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2577108998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_setup_stage.2577108998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_setup_trans_ignored.532434888 |
| Short name | T2111 |
| Test name | |
| Test status | |
| Simulation time | 149984533 ps |
| CPU time | 1.15 seconds |
| Started | Sep 04 05:59:30 AM UTC 24 |
| Finished | Sep 04 05:59:32 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=532434888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 29.usbdev_setup_trans_ignored.532434888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_smoke.1174941975 |
| Short name | T2115 |
| Test name | |
| Test status | |
| Simulation time | 255534119 ps |
| CPU time | 1.72 seconds |
| Started | Sep 04 05:59:30 AM UTC 24 |
| Finished | Sep 04 05:59:33 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1174941975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_smoke.1174941975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_spurious_pids_ignored.3718150645 |
| Short name | T2180 |
| Test name | |
| Test status | |
| Simulation time | 2962666260 ps |
| CPU time | 27.37 seconds |
| Started | Sep 04 05:59:32 AM UTC 24 |
| Finished | Sep 04 06:00:00 AM UTC 24 |
| Peak memory | 234240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3718150645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 29.usbdev_spurious_pids_ignored.3718150645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_stall_priority_over_nak.1135686406 |
| Short name | T2120 |
| Test name | |
| Test status | |
| Simulation time | 232677876 ps |
| CPU time | 1.63 seconds |
| Started | Sep 04 05:59:32 AM UTC 24 |
| Finished | Sep 04 05:59:34 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1135686406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_stall_priority_over_nak.1135686406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_stall_trans.2774655778 |
| Short name | T2119 |
| Test name | |
| Test status | |
| Simulation time | 171527432 ps |
| CPU time | 1.28 seconds |
| Started | Sep 04 05:59:32 AM UTC 24 |
| Finished | Sep 04 05:59:34 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2774655778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_stall_trans.2774655778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_stream_len_max.4213914569 |
| Short name | T2126 |
| Test name | |
| Test status | |
| Simulation time | 795881243 ps |
| CPU time | 2.81 seconds |
| Started | Sep 04 05:59:33 AM UTC 24 |
| Finished | Sep 04 05:59:37 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4213914569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_stream_len_max.4213914569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_streaming_out.2213056753 |
| Short name | T2283 |
| Test name | |
| Test status | |
| Simulation time | 2631136808 ps |
| CPU time | 71.56 seconds |
| Started | Sep 04 05:59:33 AM UTC 24 |
| Finished | Sep 04 06:00:46 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2213056753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_streaming_out.2213056753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_timeout_missing_host_handshake.748352138 |
| Short name | T2125 |
| Test name | |
| Test status | |
| Simulation time | 2943016659 ps |
| CPU time | 23.09 seconds |
| Started | Sep 04 05:59:12 AM UTC 24 |
| Finished | Sep 04 05:59:36 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=748352138 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_timeout_missing_host_handshake.748352138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/29.usbdev_tx_rx_disruption.3443711051 |
| Short name | T195 |
| Test name | |
| Test status | |
| Simulation time | 554003986 ps |
| CPU time | 2.16 seconds |
| Started | Sep 04 05:59:33 AM UTC 24 |
| Finished | Sep 04 05:59:36 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3443711051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_t x_rx_disruption.3443711051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/29.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/290.usbdev_tx_rx_disruption.1283085079 |
| Short name | T3579 |
| Test name | |
| Test status | |
| Simulation time | 518445231 ps |
| CPU time | 1.65 seconds |
| Started | Sep 04 06:09:36 AM UTC 24 |
| Finished | Sep 04 06:09:39 AM UTC 24 |
| Peak memory | 216868 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1283085079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 290.usbdev_ tx_rx_disruption.1283085079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/290.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/291.usbdev_tx_rx_disruption.3045440536 |
| Short name | T3585 |
| Test name | |
| Test status | |
| Simulation time | 527269739 ps |
| CPU time | 2.11 seconds |
| Started | Sep 04 06:09:36 AM UTC 24 |
| Finished | Sep 04 06:09:40 AM UTC 24 |
| Peak memory | 216828 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3045440536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 291.usbdev_ tx_rx_disruption.3045440536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/291.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/292.usbdev_tx_rx_disruption.3747494859 |
| Short name | T3602 |
| Test name | |
| Test status | |
| Simulation time | 458905521 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 06:09:36 AM UTC 24 |
| Finished | Sep 04 06:09:49 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3747494859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 292.usbdev_ tx_rx_disruption.3747494859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/292.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/293.usbdev_tx_rx_disruption.132504535 |
| Short name | T3582 |
| Test name | |
| Test status | |
| Simulation time | 584536916 ps |
| CPU time | 1.66 seconds |
| Started | Sep 04 06:09:36 AM UTC 24 |
| Finished | Sep 04 06:09:39 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=132504535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 293.usbdev_t x_rx_disruption.132504535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/293.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/294.usbdev_tx_rx_disruption.3649161099 |
| Short name | T3611 |
| Test name | |
| Test status | |
| Simulation time | 568251237 ps |
| CPU time | 1.6 seconds |
| Started | Sep 04 06:09:36 AM UTC 24 |
| Finished | Sep 04 06:09:49 AM UTC 24 |
| Peak memory | 215016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3649161099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 294.usbdev_ tx_rx_disruption.3649161099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/294.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/295.usbdev_tx_rx_disruption.2468202209 |
| Short name | T3614 |
| Test name | |
| Test status | |
| Simulation time | 608525775 ps |
| CPU time | 1.74 seconds |
| Started | Sep 04 06:09:36 AM UTC 24 |
| Finished | Sep 04 06:09:50 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2468202209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 295.usbdev_ tx_rx_disruption.2468202209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/295.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/296.usbdev_tx_rx_disruption.323633358 |
| Short name | T3606 |
| Test name | |
| Test status | |
| Simulation time | 527468474 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 06:09:36 AM UTC 24 |
| Finished | Sep 04 06:09:49 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=323633358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 296.usbdev_t x_rx_disruption.323633358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/296.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/297.usbdev_tx_rx_disruption.900043678 |
| Short name | T3612 |
| Test name | |
| Test status | |
| Simulation time | 628292765 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 06:09:36 AM UTC 24 |
| Finished | Sep 04 06:09:50 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=900043678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 297.usbdev_t x_rx_disruption.900043678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/297.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/298.usbdev_tx_rx_disruption.4250211768 |
| Short name | T3607 |
| Test name | |
| Test status | |
| Simulation time | 466664107 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 06:09:36 AM UTC 24 |
| Finished | Sep 04 06:09:49 AM UTC 24 |
| Peak memory | 215008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4250211768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 298.usbdev_ tx_rx_disruption.4250211768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/298.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/299.usbdev_tx_rx_disruption.1399107641 |
| Short name | T3603 |
| Test name | |
| Test status | |
| Simulation time | 480681724 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 06:09:36 AM UTC 24 |
| Finished | Sep 04 06:09:49 AM UTC 24 |
| Peak memory | 217004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1399107641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 299.usbdev_ tx_rx_disruption.1399107641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/299.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_alert_test.3684185666 |
| Short name | T703 |
| Test name | |
| Test status | |
| Simulation time | 39793297 ps |
| CPU time | 1 seconds |
| Started | Sep 04 05:44:52 AM UTC 24 |
| Finished | Sep 04 05:44:54 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3684185666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 3.usbdev_alert_test.3684185666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_disconnect.3349665862 |
| Short name | T15 |
| Test name | |
| Test status | |
| Simulation time | 5167840177 ps |
| CPU time | 9.77 seconds |
| Started | Sep 04 05:43:39 AM UTC 24 |
| Finished | Sep 04 05:43:50 AM UTC 24 |
| Peak memory | 227384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3349665862 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_disconnect.3349665862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_resume.1962857933 |
| Short name | T677 |
| Test name | |
| Test status | |
| Simulation time | 25061475866 ps |
| CPU time | 50.34 seconds |
| Started | Sep 04 05:43:42 AM UTC 24 |
| Finished | Sep 04 05:44:33 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1962857933 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_resume.1962857933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_av_buffer.2842281744 |
| Short name | T644 |
| Test name | |
| Test status | |
| Simulation time | 151795121 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 05:43:42 AM UTC 24 |
| Finished | Sep 04 05:43:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2842281744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_av_buffer.2842281744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_av_empty.1369779431 |
| Short name | T49 |
| Test name | |
| Test status | |
| Simulation time | 242928432 ps |
| CPU time | 1.68 seconds |
| Started | Sep 04 05:43:42 AM UTC 24 |
| Finished | Sep 04 05:43:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1369779431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_av_empty.1369779431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_av_overflow.4248310458 |
| Short name | T89 |
| Test name | |
| Test status | |
| Simulation time | 182135582 ps |
| CPU time | 0.95 seconds |
| Started | Sep 04 05:43:43 AM UTC 24 |
| Finished | Sep 04 05:43:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4248310458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_av_overflow.4248310458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_bitstuff_err.1114107988 |
| Short name | T645 |
| Test name | |
| Test status | |
| Simulation time | 155306229 ps |
| CPU time | 1.37 seconds |
| Started | Sep 04 05:43:43 AM UTC 24 |
| Finished | Sep 04 05:43:46 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1114107988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_bitstuff_err.1114107988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_data_toggle_clear.3943987229 |
| Short name | T646 |
| Test name | |
| Test status | |
| Simulation time | 521852818 ps |
| CPU time | 3.04 seconds |
| Started | Sep 04 05:43:44 AM UTC 24 |
| Finished | Sep 04 05:43:48 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3943987229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 3.usbdev_data_toggle_clear.3943987229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_data_toggle_restore.3486027402 |
| Short name | T480 |
| Test name | |
| Test status | |
| Simulation time | 1147423210 ps |
| CPU time | 5.35 seconds |
| Started | Sep 04 05:43:45 AM UTC 24 |
| Finished | Sep 04 05:43:52 AM UTC 24 |
| Peak memory | 217196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3486027402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_data_toggle_restore.3486027402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_device_address.892972540 |
| Short name | T175 |
| Test name | |
| Test status | |
| Simulation time | 39494485485 ps |
| CPU time | 76.05 seconds |
| Started | Sep 04 05:43:47 AM UTC 24 |
| Finished | Sep 04 05:45:04 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=892972540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 3.usbdev_device_address.892972540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_device_timeout.3749053200 |
| Short name | T688 |
| Test name | |
| Test status | |
| Simulation time | 1836201010 ps |
| CPU time | 54.48 seconds |
| Started | Sep 04 05:43:47 AM UTC 24 |
| Finished | Sep 04 05:44:43 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3749053200 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_device_timeout.3749053200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_disable_endpoint.921658591 |
| Short name | T334 |
| Test name | |
| Test status | |
| Simulation time | 721914274 ps |
| CPU time | 2.46 seconds |
| Started | Sep 04 05:43:50 AM UTC 24 |
| Finished | Sep 04 05:43:53 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=921658591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_disable_endpoint.921658591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_disconnected.2026226463 |
| Short name | T649 |
| Test name | |
| Test status | |
| Simulation time | 167432801 ps |
| CPU time | 1.35 seconds |
| Started | Sep 04 05:43:51 AM UTC 24 |
| Finished | Sep 04 05:43:53 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2026226463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_disconnected.2026226463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_enable.1852970893 |
| Short name | T652 |
| Test name | |
| Test status | |
| Simulation time | 57745108 ps |
| CPU time | 1.12 seconds |
| Started | Sep 04 05:43:53 AM UTC 24 |
| Finished | Sep 04 05:43:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1852970893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 3.usbdev_enable.1852970893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_endpoint_access.1304361350 |
| Short name | T654 |
| Test name | |
| Test status | |
| Simulation time | 796250411 ps |
| CPU time | 4.01 seconds |
| Started | Sep 04 05:43:53 AM UTC 24 |
| Finished | Sep 04 05:43:58 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1304361350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_endpoint_access.1304361350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_endpoint_types.2537076037 |
| Short name | T416 |
| Test name | |
| Test status | |
| Simulation time | 242838442 ps |
| CPU time | 1.8 seconds |
| Started | Sep 04 05:43:54 AM UTC 24 |
| Finished | Sep 04 05:43:57 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2537076037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_endpoint_types.2537076037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_fifo_levels.976647942 |
| Short name | T653 |
| Test name | |
| Test status | |
| Simulation time | 169058239 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 05:43:54 AM UTC 24 |
| Finished | Sep 04 05:43:57 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=976647942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_fifo_levels.976647942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_fifo_rst.3452402976 |
| Short name | T655 |
| Test name | |
| Test status | |
| Simulation time | 349762071 ps |
| CPU time | 3.29 seconds |
| Started | Sep 04 05:43:54 AM UTC 24 |
| Finished | Sep 04 05:43:59 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3452402976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_fifo_rst.3452402976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_freq_hiclk.3564769997 |
| Short name | T828 |
| Test name | |
| Test status | |
| Simulation time | 92189848510 ps |
| CPU time | 193.77 seconds |
| Started | Sep 04 05:43:56 AM UTC 24 |
| Finished | Sep 04 05:47:12 AM UTC 24 |
| Peak memory | 217428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3564769997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_hiclk.3564769997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_freq_hiclk_max.2302104402 |
| Short name | T836 |
| Test name | |
| Test status | |
| Simulation time | 81299846708 ps |
| CPU time | 198.58 seconds |
| Started | Sep 04 05:43:56 AM UTC 24 |
| Finished | Sep 04 05:47:17 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=2302104402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 3.usbdev_freq_hiclk_max.2302104402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_freq_loclk.1292752624 |
| Short name | T784 |
| Test name | |
| Test status | |
| Simulation time | 96156883640 ps |
| CPU time | 153.6 seconds |
| Started | Sep 04 05:43:58 AM UTC 24 |
| Finished | Sep 04 05:46:34 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1292752624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_loclk.1292752624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_freq_loclk_max.3677069609 |
| Short name | T873 |
| Test name | |
| Test status | |
| Simulation time | 108939091003 ps |
| CPU time | 231.86 seconds |
| Started | Sep 04 05:43:58 AM UTC 24 |
| Finished | Sep 04 05:47:53 AM UTC 24 |
| Peak memory | 218868 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=3677069609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 3.usbdev_freq_loclk_max.3677069609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_freq_phase.1749222831 |
| Short name | T842 |
| Test name | |
| Test status | |
| Simulation time | 95195255954 ps |
| CPU time | 200.83 seconds |
| Started | Sep 04 05:43:59 AM UTC 24 |
| Finished | Sep 04 05:47:23 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1749222831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 3.usbdev_freq_phase.1749222831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_in_iso.3373210141 |
| Short name | T656 |
| Test name | |
| Test status | |
| Simulation time | 186791901 ps |
| CPU time | 1.7 seconds |
| Started | Sep 04 05:44:00 AM UTC 24 |
| Finished | Sep 04 05:44:02 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3373210141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_in_iso.3373210141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_in_stall.356349709 |
| Short name | T657 |
| Test name | |
| Test status | |
| Simulation time | 157186539 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 05:44:01 AM UTC 24 |
| Finished | Sep 04 05:44:03 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=356349709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_in_stall.356349709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_in_trans.2331572336 |
| Short name | T659 |
| Test name | |
| Test status | |
| Simulation time | 211449876 ps |
| CPU time | 1.61 seconds |
| Started | Sep 04 05:44:03 AM UTC 24 |
| Finished | Sep 04 05:44:05 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2331572336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_in_trans.2331572336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_invalid_sync.458912021 |
| Short name | T739 |
| Test name | |
| Test status | |
| Simulation time | 3694357976 ps |
| CPU time | 108.23 seconds |
| Started | Sep 04 05:43:59 AM UTC 24 |
| Finished | Sep 04 05:45:50 AM UTC 24 |
| Peak memory | 229520 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=458912021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 3.usbdev_invalid_sync.458912021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_iso_retraction.3265660110 |
| Short name | T722 |
| Test name | |
| Test status | |
| Simulation time | 11189619920 ps |
| CPU time | 82.84 seconds |
| Started | Sep 04 05:44:03 AM UTC 24 |
| Finished | Sep 04 05:45:28 AM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3265660110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_iso_retraction.3265660110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_link_in_err.1032597564 |
| Short name | T660 |
| Test name | |
| Test status | |
| Simulation time | 192479362 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 05:44:05 AM UTC 24 |
| Finished | Sep 04 05:44:07 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1032597564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_link_in_err.1032597564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_link_resume.1703461530 |
| Short name | T672 |
| Test name | |
| Test status | |
| Simulation time | 6014801241 ps |
| CPU time | 22.96 seconds |
| Started | Sep 04 05:44:05 AM UTC 24 |
| Finished | Sep 04 05:44:29 AM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1703461530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_link_resume.1703461530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_link_suspend.2282988869 |
| Short name | T666 |
| Test name | |
| Test status | |
| Simulation time | 4105916423 ps |
| CPU time | 12.23 seconds |
| Started | Sep 04 05:44:06 AM UTC 24 |
| Finished | Sep 04 05:44:19 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2282988869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_link_suspend.2282988869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_low_speed_traffic.3262121510 |
| Short name | T682 |
| Test name | |
| Test status | |
| Simulation time | 2627338706 ps |
| CPU time | 26.89 seconds |
| Started | Sep 04 05:44:08 AM UTC 24 |
| Finished | Sep 04 05:44:36 AM UTC 24 |
| Peak memory | 234168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3262121510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_low_speed_traffic.3262121510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_max_inter_pkt_delay.2447217766 |
| Short name | T743 |
| Test name | |
| Test status | |
| Simulation time | 2984411764 ps |
| CPU time | 102.26 seconds |
| Started | Sep 04 05:44:11 AM UTC 24 |
| Finished | Sep 04 05:45:56 AM UTC 24 |
| Peak memory | 229604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2447217766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_inter_pkt_delay.2447217766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_max_length_in_transaction.3535372572 |
| Short name | T665 |
| Test name | |
| Test status | |
| Simulation time | 260564798 ps |
| CPU time | 1.33 seconds |
| Started | Sep 04 05:44:16 AM UTC 24 |
| Finished | Sep 04 05:44:18 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3535372572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_max_length_in_transaction.3535372572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_max_length_out_transaction.589797018 |
| Short name | T667 |
| Test name | |
| Test status | |
| Simulation time | 194352337 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 05:44:17 AM UTC 24 |
| Finished | Sep 04 05:44:19 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=589797018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 3.usbdev_max_length_out_transaction.589797018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_max_non_iso_usb_traffic.2414473864 |
| Short name | T696 |
| Test name | |
| Test status | |
| Simulation time | 3571108250 ps |
| CPU time | 32.31 seconds |
| Started | Sep 04 05:44:17 AM UTC 24 |
| Finished | Sep 04 05:44:51 AM UTC 24 |
| Peak memory | 229656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2414473864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_non_iso_usb_traffic.2414473864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_max_usb_traffic.2575671515 |
| Short name | T702 |
| Test name | |
| Test status | |
| Simulation time | 3537390758 ps |
| CPU time | 32.37 seconds |
| Started | Sep 04 05:44:20 AM UTC 24 |
| Finished | Sep 04 05:44:54 AM UTC 24 |
| Peak memory | 229592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2575671515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_usb_traffic.2575671515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_min_inter_pkt_delay.2603669567 |
| Short name | T697 |
| Test name | |
| Test status | |
| Simulation time | 2537937858 ps |
| CPU time | 29.43 seconds |
| Started | Sep 04 05:44:20 AM UTC 24 |
| Finished | Sep 04 05:44:51 AM UTC 24 |
| Peak memory | 227688 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2603669567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_min_inter_pkt_delay.2603669567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_min_length_in_transaction.623150121 |
| Short name | T669 |
| Test name | |
| Test status | |
| Simulation time | 164088354 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 05:44:20 AM UTC 24 |
| Finished | Sep 04 05:44:22 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=623150121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 3.usbdev_min_length_in_transaction.623150121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_min_length_out_transaction.2468607656 |
| Short name | T668 |
| Test name | |
| Test status | |
| Simulation time | 201562245 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 05:44:20 AM UTC 24 |
| Finished | Sep 04 05:44:22 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2468607656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 3.usbdev_min_length_out_transaction.2468607656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_nak_trans.4280075377 |
| Short name | T120 |
| Test name | |
| Test status | |
| Simulation time | 240826903 ps |
| CPU time | 1.67 seconds |
| Started | Sep 04 05:44:20 AM UTC 24 |
| Finished | Sep 04 05:44:23 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4280075377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_nak_trans.4280075377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_out_iso.2999814672 |
| Short name | T671 |
| Test name | |
| Test status | |
| Simulation time | 182432851 ps |
| CPU time | 1.63 seconds |
| Started | Sep 04 05:44:24 AM UTC 24 |
| Finished | Sep 04 05:44:27 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2999814672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_out_iso.2999814672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_out_stall.2731402948 |
| Short name | T670 |
| Test name | |
| Test status | |
| Simulation time | 154569071 ps |
| CPU time | 1.32 seconds |
| Started | Sep 04 05:44:25 AM UTC 24 |
| Finished | Sep 04 05:44:27 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2731402948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_out_stall.2731402948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_out_trans_nak.73092008 |
| Short name | T469 |
| Test name | |
| Test status | |
| Simulation time | 211532612 ps |
| CPU time | 1.57 seconds |
| Started | Sep 04 05:44:25 AM UTC 24 |
| Finished | Sep 04 05:44:27 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=73092008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_out_trans_nak.73092008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_pending_in_trans.431583843 |
| Short name | T674 |
| Test name | |
| Test status | |
| Simulation time | 149251797 ps |
| CPU time | 1.35 seconds |
| Started | Sep 04 05:44:28 AM UTC 24 |
| Finished | Sep 04 05:44:30 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=431583843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_pending_in_trans.431583843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_pinflip.3333475295 |
| Short name | T673 |
| Test name | |
| Test status | |
| Simulation time | 193918974 ps |
| CPU time | 1.08 seconds |
| Started | Sep 04 05:44:28 AM UTC 24 |
| Finished | Sep 04 05:44:30 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3333475295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_config_pinflip.3333475295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_rand_bus_type.2245225499 |
| Short name | T675 |
| Test name | |
| Test status | |
| Simulation time | 227411454 ps |
| CPU time | 1.76 seconds |
| Started | Sep 04 05:44:28 AM UTC 24 |
| Finished | Sep 04 05:44:31 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2245225499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 3.usbdev_phy_config_rand_bus_type.2245225499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_usb_ref_disable.2165998067 |
| Short name | T676 |
| Test name | |
| Test status | |
| Simulation time | 153224183 ps |
| CPU time | 1.36 seconds |
| Started | Sep 04 05:44:29 AM UTC 24 |
| Finished | Sep 04 05:44:31 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2165998067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 3.usbdev_phy_config_usb_ref_disable.2165998067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_buffer.1112126284 |
| Short name | T283 |
| Test name | |
| Test status | |
| Simulation time | 17465287576 ps |
| CPU time | 58.77 seconds |
| Started | Sep 04 05:44:30 AM UTC 24 |
| Finished | Sep 04 05:45:31 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1112126284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_pkt_buffer.1112126284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_received.4071784211 |
| Short name | T678 |
| Test name | |
| Test status | |
| Simulation time | 187341572 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 05:44:31 AM UTC 24 |
| Finished | Sep 04 05:44:34 AM UTC 24 |
| Peak memory | 214964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4071784211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_pkt_received.4071784211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_sent.1740611958 |
| Short name | T679 |
| Test name | |
| Test status | |
| Simulation time | 241877435 ps |
| CPU time | 1.61 seconds |
| Started | Sep 04 05:44:31 AM UTC 24 |
| Finished | Sep 04 05:44:34 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1740611958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_pkt_sent.1740611958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_rand_bus_disconnects.241889447 |
| Short name | T713 |
| Test name | |
| Test status | |
| Simulation time | 6338544921 ps |
| CPU time | 31.12 seconds |
| Started | Sep 04 05:44:35 AM UTC 24 |
| Finished | Sep 04 05:45:08 AM UTC 24 |
| Peak memory | 234264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=241889447 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_bus_disconnects.241889447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_rand_bus_resets.4168103226 |
| Short name | T168 |
| Test name | |
| Test status | |
| Simulation time | 6602179488 ps |
| CPU time | 110.85 seconds |
| Started | Sep 04 05:44:35 AM UTC 24 |
| Finished | Sep 04 05:46:29 AM UTC 24 |
| Peak memory | 229680 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4168103226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_bus_resets.4168103226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_rand_suspends.969564217 |
| Short name | T764 |
| Test name | |
| Test status | |
| Simulation time | 6374990863 ps |
| CPU time | 97.72 seconds |
| Started | Sep 04 05:44:35 AM UTC 24 |
| Finished | Sep 04 05:46:15 AM UTC 24 |
| Peak memory | 234264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=969564217 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_suspends.969564217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_random_length_in_transaction.3384416632 |
| Short name | T681 |
| Test name | |
| Test status | |
| Simulation time | 234504369 ps |
| CPU time | 1.75 seconds |
| Started | Sep 04 05:44:33 AM UTC 24 |
| Finished | Sep 04 05:44:35 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3384416632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 3.usbdev_random_length_in_transaction.3384416632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_random_length_out_transaction.4213488739 |
| Short name | T680 |
| Test name | |
| Test status | |
| Simulation time | 215460730 ps |
| CPU time | 1.08 seconds |
| Started | Sep 04 05:44:33 AM UTC 24 |
| Finished | Sep 04 05:44:35 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4213488739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 3.usbdev_random_length_out_transaction.4213488739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_resume_link_active.3141576377 |
| Short name | T724 |
| Test name | |
| Test status | |
| Simulation time | 20215768671 ps |
| CPU time | 53.72 seconds |
| Started | Sep 04 05:44:36 AM UTC 24 |
| Finished | Sep 04 05:45:32 AM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3141576377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 3.usbdev_resume_link_active.3141576377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_rx_crc_err.3116248065 |
| Short name | T684 |
| Test name | |
| Test status | |
| Simulation time | 188703293 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 05:44:36 AM UTC 24 |
| Finished | Sep 04 05:44:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3116248065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_rx_crc_err.3116248065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_rx_full.3415223555 |
| Short name | T687 |
| Test name | |
| Test status | |
| Simulation time | 403563348 ps |
| CPU time | 2.42 seconds |
| Started | Sep 04 05:44:38 AM UTC 24 |
| Finished | Sep 04 05:44:41 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3415223555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_rx_full.3415223555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_rx_pid_err.1115942644 |
| Short name | T686 |
| Test name | |
| Test status | |
| Simulation time | 179191617 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 05:44:38 AM UTC 24 |
| Finished | Sep 04 05:44:40 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1115942644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_rx_pid_err.1115942644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_sec_cm.2008966272 |
| Short name | T223 |
| Test name | |
| Test status | |
| Simulation time | 315464242 ps |
| CPU time | 1.6 seconds |
| Started | Sep 04 05:44:50 AM UTC 24 |
| Finished | Sep 04 05:44:53 AM UTC 24 |
| Peak memory | 249172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2008966272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_sec_cm.2008966272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_setup_priority.2459051660 |
| Short name | T689 |
| Test name | |
| Test status | |
| Simulation time | 372978605 ps |
| CPU time | 2.2 seconds |
| Started | Sep 04 05:44:40 AM UTC 24 |
| Finished | Sep 04 05:44:43 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2459051660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_priority.2459051660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_setup_priority_over_stall_response.1022782801 |
| Short name | T692 |
| Test name | |
| Test status | |
| Simulation time | 319167453 ps |
| CPU time | 1.9 seconds |
| Started | Sep 04 05:44:41 AM UTC 24 |
| Finished | Sep 04 05:44:44 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1022782801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_priority_over_stall_response.1022782801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_setup_stage.2038959262 |
| Short name | T690 |
| Test name | |
| Test status | |
| Simulation time | 173545771 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:44:41 AM UTC 24 |
| Finished | Sep 04 05:44:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2038959262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_setup_stage.2038959262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_setup_trans_ignored.2733816641 |
| Short name | T691 |
| Test name | |
| Test status | |
| Simulation time | 151931245 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 05:44:41 AM UTC 24 |
| Finished | Sep 04 05:44:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2733816641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 3.usbdev_setup_trans_ignored.2733816641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_smoke.2796027530 |
| Short name | T693 |
| Test name | |
| Test status | |
| Simulation time | 333029695 ps |
| CPU time | 2.21 seconds |
| Started | Sep 04 05:44:42 AM UTC 24 |
| Finished | Sep 04 05:44:46 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2796027530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_smoke.2796027530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_spurious_pids_ignored.3383362837 |
| Short name | T762 |
| Test name | |
| Test status | |
| Simulation time | 3233002275 ps |
| CPU time | 87.48 seconds |
| Started | Sep 04 05:44:44 AM UTC 24 |
| Finished | Sep 04 05:46:13 AM UTC 24 |
| Peak memory | 229616 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3383362837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_spurious_pids_ignored.3383362837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_stall_priority_over_nak.1706785690 |
| Short name | T694 |
| Test name | |
| Test status | |
| Simulation time | 245641053 ps |
| CPU time | 1.81 seconds |
| Started | Sep 04 05:44:44 AM UTC 24 |
| Finished | Sep 04 05:44:47 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1706785690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stall_priority_over_nak.1706785690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_stall_trans.2663687368 |
| Short name | T695 |
| Test name | |
| Test status | |
| Simulation time | 195961359 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 05:44:45 AM UTC 24 |
| Finished | Sep 04 05:44:47 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2663687368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_stall_trans.2663687368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_stream_len_max.567914019 |
| Short name | T698 |
| Test name | |
| Test status | |
| Simulation time | 1132522653 ps |
| CPU time | 5.16 seconds |
| Started | Sep 04 05:44:45 AM UTC 24 |
| Finished | Sep 04 05:44:51 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=567914019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 3.usbdev_stream_len_max.567914019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_streaming_out.1027194150 |
| Short name | T721 |
| Test name | |
| Test status | |
| Simulation time | 4026347435 ps |
| CPU time | 34.89 seconds |
| Started | Sep 04 05:44:45 AM UTC 24 |
| Finished | Sep 04 05:45:21 AM UTC 24 |
| Peak memory | 227660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1027194150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_streaming_out.1027194150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_timeout_missing_host_handshake.253901118 |
| Short name | T663 |
| Test name | |
| Test status | |
| Simulation time | 3754827321 ps |
| CPU time | 26.89 seconds |
| Started | Sep 04 05:43:50 AM UTC 24 |
| Finished | Sep 04 05:44:18 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=253901118 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_timeout_missing_host_handshake.253901118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/3.usbdev_tx_rx_disruption.1248327165 |
| Short name | T700 |
| Test name | |
| Test status | |
| Simulation time | 496781900 ps |
| CPU time | 2.96 seconds |
| Started | Sep 04 05:44:48 AM UTC 24 |
| Finished | Sep 04 05:44:52 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1248327165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_tx _rx_disruption.1248327165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/3.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_alert_test.2912267764 |
| Short name | T2172 |
| Test name | |
| Test status | |
| Simulation time | 52442914 ps |
| CPU time | 1.06 seconds |
| Started | Sep 04 05:59:53 AM UTC 24 |
| Finished | Sep 04 05:59:55 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2912267764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 30.usbdev_alert_test.2912267764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_disconnect.234624375 |
| Short name | T2145 |
| Test name | |
| Test status | |
| Simulation time | 4175065954 ps |
| CPU time | 9.89 seconds |
| Started | Sep 04 05:59:33 AM UTC 24 |
| Finished | Sep 04 05:59:44 AM UTC 24 |
| Peak memory | 227408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=234624375 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_disconnect.234624375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_reset.3469346396 |
| Short name | T2192 |
| Test name | |
| Test status | |
| Simulation time | 20343654111 ps |
| CPU time | 31.2 seconds |
| Started | Sep 04 05:59:35 AM UTC 24 |
| Finished | Sep 04 06:00:07 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3469346396 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_reset.3469346396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_resume.3999831643 |
| Short name | T2197 |
| Test name | |
| Test status | |
| Simulation time | 24358659729 ps |
| CPU time | 32.32 seconds |
| Started | Sep 04 05:59:35 AM UTC 24 |
| Finished | Sep 04 06:00:09 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3999831643 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_resume.3999831643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_av_buffer.1858495759 |
| Short name | T2128 |
| Test name | |
| Test status | |
| Simulation time | 167455901 ps |
| CPU time | 1.33 seconds |
| Started | Sep 04 05:59:35 AM UTC 24 |
| Finished | Sep 04 05:59:37 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1858495759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_av_buffer.1858495759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_bitstuff_err.119930157 |
| Short name | T2127 |
| Test name | |
| Test status | |
| Simulation time | 193388753 ps |
| CPU time | 1.22 seconds |
| Started | Sep 04 05:59:35 AM UTC 24 |
| Finished | Sep 04 05:59:37 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=119930157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_bitstuff_err.119930157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_data_toggle_clear.1767597027 |
| Short name | T2133 |
| Test name | |
| Test status | |
| Simulation time | 256161269 ps |
| CPU time | 1.83 seconds |
| Started | Sep 04 05:59:35 AM UTC 24 |
| Finished | Sep 04 05:59:38 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1767597027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 30.usbdev_data_toggle_clear.1767597027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_data_toggle_restore.454269164 |
| Short name | T2132 |
| Test name | |
| Test status | |
| Simulation time | 374160730 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 05:59:35 AM UTC 24 |
| Finished | Sep 04 05:59:38 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=454269164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_data_toggle_restore.454269164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_device_address.734878766 |
| Short name | T2244 |
| Test name | |
| Test status | |
| Simulation time | 32292255432 ps |
| CPU time | 54.06 seconds |
| Started | Sep 04 05:59:35 AM UTC 24 |
| Finished | Sep 04 06:00:31 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=734878766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 30.usbdev_device_address.734878766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_device_timeout.2924444674 |
| Short name | T2223 |
| Test name | |
| Test status | |
| Simulation time | 4761460573 ps |
| CPU time | 40.81 seconds |
| Started | Sep 04 05:59:37 AM UTC 24 |
| Finished | Sep 04 06:00:19 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2924444674 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_device_timeout.2924444674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_disable_endpoint.2194449105 |
| Short name | T2137 |
| Test name | |
| Test status | |
| Simulation time | 557470525 ps |
| CPU time | 2.23 seconds |
| Started | Sep 04 05:59:37 AM UTC 24 |
| Finished | Sep 04 05:59:40 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2194449105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 30.usbdev_disable_endpoint.2194449105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_disconnected.1609119123 |
| Short name | T2135 |
| Test name | |
| Test status | |
| Simulation time | 140127875 ps |
| CPU time | 1.31 seconds |
| Started | Sep 04 05:59:37 AM UTC 24 |
| Finished | Sep 04 05:59:39 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1609119123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_disconnected.1609119123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_enable.3912196491 |
| Short name | T2134 |
| Test name | |
| Test status | |
| Simulation time | 95680029 ps |
| CPU time | 1.2 seconds |
| Started | Sep 04 05:59:37 AM UTC 24 |
| Finished | Sep 04 05:59:39 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3912196491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 30.usbdev_enable.3912196491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_endpoint_access.3505195840 |
| Short name | T2142 |
| Test name | |
| Test status | |
| Simulation time | 940884347 ps |
| CPU time | 2.73 seconds |
| Started | Sep 04 05:59:39 AM UTC 24 |
| Finished | Sep 04 05:59:42 AM UTC 24 |
| Peak memory | 217192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3505195840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_endpoint_access.3505195840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_endpoint_types.2558240472 |
| Short name | T424 |
| Test name | |
| Test status | |
| Simulation time | 215420169 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 05:59:39 AM UTC 24 |
| Finished | Sep 04 05:59:41 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2558240472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_endpoint_types.2558240472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_fifo_rst.3298775369 |
| Short name | T2144 |
| Test name | |
| Test status | |
| Simulation time | 469280976 ps |
| CPU time | 3.97 seconds |
| Started | Sep 04 05:59:39 AM UTC 24 |
| Finished | Sep 04 05:59:44 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3298775369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_fifo_rst.3298775369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_in_iso.460492366 |
| Short name | T2140 |
| Test name | |
| Test status | |
| Simulation time | 170259307 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 05:59:39 AM UTC 24 |
| Finished | Sep 04 05:59:41 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=460492366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 30.usbdev_in_iso.460492366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_in_stall.714284104 |
| Short name | T2139 |
| Test name | |
| Test status | |
| Simulation time | 154782040 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 05:59:39 AM UTC 24 |
| Finished | Sep 04 05:59:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=714284104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_in_stall.714284104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_in_trans.1427446170 |
| Short name | T2141 |
| Test name | |
| Test status | |
| Simulation time | 282795808 ps |
| CPU time | 1.79 seconds |
| Started | Sep 04 05:59:39 AM UTC 24 |
| Finished | Sep 04 05:59:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1427446170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_in_trans.1427446170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_invalid_sync.652356092 |
| Short name | T2189 |
| Test name | |
| Test status | |
| Simulation time | 3434193994 ps |
| CPU time | 25.77 seconds |
| Started | Sep 04 05:59:39 AM UTC 24 |
| Finished | Sep 04 06:00:06 AM UTC 24 |
| Peak memory | 227632 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=652356092 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 30.usbdev_invalid_sync.652356092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_iso_retraction.2608930031 |
| Short name | T2419 |
| Test name | |
| Test status | |
| Simulation time | 11636235786 ps |
| CPU time | 137.08 seconds |
| Started | Sep 04 05:59:39 AM UTC 24 |
| Finished | Sep 04 06:01:59 AM UTC 24 |
| Peak memory | 217464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2608930031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_iso_retraction.2608930031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_link_in_err.2145028517 |
| Short name | T2143 |
| Test name | |
| Test status | |
| Simulation time | 250707475 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:59:41 AM UTC 24 |
| Finished | Sep 04 05:59:43 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2145028517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_link_in_err.2145028517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_link_resume.2765812874 |
| Short name | T2184 |
| Test name | |
| Test status | |
| Simulation time | 12810831172 ps |
| CPU time | 20.29 seconds |
| Started | Sep 04 05:59:41 AM UTC 24 |
| Finished | Sep 04 06:00:02 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2765812874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_link_resume.2765812874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_link_suspend.1907126466 |
| Short name | T2191 |
| Test name | |
| Test status | |
| Simulation time | 10727694005 ps |
| CPU time | 24.8 seconds |
| Started | Sep 04 05:59:41 AM UTC 24 |
| Finished | Sep 04 06:00:07 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1907126466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_link_suspend.1907126466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_low_speed_traffic.39640116 |
| Short name | T2356 |
| Test name | |
| Test status | |
| Simulation time | 3640417359 ps |
| CPU time | 98.1 seconds |
| Started | Sep 04 05:59:41 AM UTC 24 |
| Finished | Sep 04 06:01:21 AM UTC 24 |
| Peak memory | 234180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=39640116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_low_speed_traffic.39640116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_max_inter_pkt_delay.1990759776 |
| Short name | T2387 |
| Test name | |
| Test status | |
| Simulation time | 4130352849 ps |
| CPU time | 111.8 seconds |
| Started | Sep 04 05:59:42 AM UTC 24 |
| Finished | Sep 04 06:01:37 AM UTC 24 |
| Peak memory | 229708 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1990759776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_max_inter_pkt_delay.1990759776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_max_length_in_transaction.422495486 |
| Short name | T2149 |
| Test name | |
| Test status | |
| Simulation time | 252788214 ps |
| CPU time | 1.83 seconds |
| Started | Sep 04 05:59:42 AM UTC 24 |
| Finished | Sep 04 05:59:45 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=422495486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 30.usbdev_max_length_in_transaction.422495486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_max_length_out_transaction.474998932 |
| Short name | T2147 |
| Test name | |
| Test status | |
| Simulation time | 192735901 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 05:59:42 AM UTC 24 |
| Finished | Sep 04 05:59:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=474998932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 30.usbdev_max_length_out_transaction.474998932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_min_inter_pkt_delay.1624310805 |
| Short name | T2208 |
| Test name | |
| Test status | |
| Simulation time | 3768200575 ps |
| CPU time | 29.08 seconds |
| Started | Sep 04 05:59:42 AM UTC 24 |
| Finished | Sep 04 06:00:13 AM UTC 24 |
| Peak memory | 227524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1624310805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_min_inter_pkt_delay.1624310805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_min_length_in_transaction.3664862827 |
| Short name | T2148 |
| Test name | |
| Test status | |
| Simulation time | 171026594 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 05:59:43 AM UTC 24 |
| Finished | Sep 04 05:59:45 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3664862827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 30.usbdev_min_length_in_transaction.3664862827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_min_length_out_transaction.3072456286 |
| Short name | T2146 |
| Test name | |
| Test status | |
| Simulation time | 164540475 ps |
| CPU time | 0.98 seconds |
| Started | Sep 04 05:59:43 AM UTC 24 |
| Finished | Sep 04 05:59:44 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3072456286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 30.usbdev_min_length_out_transaction.3072456286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_nak_trans.1873545416 |
| Short name | T137 |
| Test name | |
| Test status | |
| Simulation time | 203630649 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 05:59:44 AM UTC 24 |
| Finished | Sep 04 05:59:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1873545416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_nak_trans.1873545416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_out_iso.4088535058 |
| Short name | T2150 |
| Test name | |
| Test status | |
| Simulation time | 181387778 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 05:59:44 AM UTC 24 |
| Finished | Sep 04 05:59:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4088535058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_out_iso.4088535058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_out_stall.3822935191 |
| Short name | T2152 |
| Test name | |
| Test status | |
| Simulation time | 199020312 ps |
| CPU time | 1.27 seconds |
| Started | Sep 04 05:59:45 AM UTC 24 |
| Finished | Sep 04 05:59:47 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3822935191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_out_stall.3822935191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_out_trans_nak.4150964821 |
| Short name | T2155 |
| Test name | |
| Test status | |
| Simulation time | 210648135 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 05:59:45 AM UTC 24 |
| Finished | Sep 04 05:59:48 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4150964821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 30.usbdev_out_trans_nak.4150964821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_pending_in_trans.3932964297 |
| Short name | T2154 |
| Test name | |
| Test status | |
| Simulation time | 146174413 ps |
| CPU time | 1.35 seconds |
| Started | Sep 04 05:59:45 AM UTC 24 |
| Finished | Sep 04 05:59:47 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3932964297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 30.usbdev_pending_in_trans.3932964297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_phy_config_pinflip.657515610 |
| Short name | T2159 |
| Test name | |
| Test status | |
| Simulation time | 221470760 ps |
| CPU time | 1.81 seconds |
| Started | Sep 04 05:59:46 AM UTC 24 |
| Finished | Sep 04 05:59:49 AM UTC 24 |
| Peak memory | 214812 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=657515610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 30.usbdev_phy_config_pinflip.657515610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_phy_config_usb_ref_disable.681602656 |
| Short name | T2158 |
| Test name | |
| Test status | |
| Simulation time | 143305787 ps |
| CPU time | 1.36 seconds |
| Started | Sep 04 05:59:46 AM UTC 24 |
| Finished | Sep 04 05:59:49 AM UTC 24 |
| Peak memory | 214840 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=681602656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 30.usbdev_phy_config_usb_ref_disable.681602656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_phy_pins_sense.3493505968 |
| Short name | T2157 |
| Test name | |
| Test status | |
| Simulation time | 48648817 ps |
| CPU time | 1.13 seconds |
| Started | Sep 04 05:59:46 AM UTC 24 |
| Finished | Sep 04 05:59:48 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3493505968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_phy_pins_sense.3493505968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_buffer.2896011128 |
| Short name | T2075 |
| Test name | |
| Test status | |
| Simulation time | 8634984965 ps |
| CPU time | 29.17 seconds |
| Started | Sep 04 05:59:48 AM UTC 24 |
| Finished | Sep 04 06:00:19 AM UTC 24 |
| Peak memory | 227584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2896011128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 30.usbdev_pkt_buffer.2896011128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_received.2421390409 |
| Short name | T2160 |
| Test name | |
| Test status | |
| Simulation time | 180670342 ps |
| CPU time | 1.55 seconds |
| Started | Sep 04 05:59:48 AM UTC 24 |
| Finished | Sep 04 05:59:51 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2421390409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_pkt_received.2421390409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_sent.3685721363 |
| Short name | T2161 |
| Test name | |
| Test status | |
| Simulation time | 193633675 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 05:59:48 AM UTC 24 |
| Finished | Sep 04 05:59:51 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3685721363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_pkt_sent.3685721363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_random_length_in_transaction.3102435846 |
| Short name | T2164 |
| Test name | |
| Test status | |
| Simulation time | 217611191 ps |
| CPU time | 1.69 seconds |
| Started | Sep 04 05:59:48 AM UTC 24 |
| Finished | Sep 04 05:59:51 AM UTC 24 |
| Peak memory | 214984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3102435846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 30.usbdev_random_length_in_transaction.3102435846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_random_length_out_transaction.699594280 |
| Short name | T2162 |
| Test name | |
| Test status | |
| Simulation time | 151132677 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:59:48 AM UTC 24 |
| Finished | Sep 04 05:59:51 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=699594280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 30.usbdev_random_length_out_transaction.699594280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_rx_crc_err.340969557 |
| Short name | T2163 |
| Test name | |
| Test status | |
| Simulation time | 196781106 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 05:59:48 AM UTC 24 |
| Finished | Sep 04 05:59:51 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=340969557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_rx_crc_err.340969557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_rx_full.2835874171 |
| Short name | T2168 |
| Test name | |
| Test status | |
| Simulation time | 395265951 ps |
| CPU time | 2.31 seconds |
| Started | Sep 04 05:59:50 AM UTC 24 |
| Finished | Sep 04 05:59:53 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2835874171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_rx_full.2835874171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_setup_stage.1810413084 |
| Short name | T2165 |
| Test name | |
| Test status | |
| Simulation time | 149963490 ps |
| CPU time | 1.37 seconds |
| Started | Sep 04 05:59:50 AM UTC 24 |
| Finished | Sep 04 05:59:52 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1810413084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_setup_stage.1810413084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_setup_trans_ignored.2544843371 |
| Short name | T2166 |
| Test name | |
| Test status | |
| Simulation time | 149927452 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 05:59:50 AM UTC 24 |
| Finished | Sep 04 05:59:52 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2544843371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 30.usbdev_setup_trans_ignored.2544843371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_smoke.3532111354 |
| Short name | T2167 |
| Test name | |
| Test status | |
| Simulation time | 244975612 ps |
| CPU time | 1.81 seconds |
| Started | Sep 04 05:59:50 AM UTC 24 |
| Finished | Sep 04 05:59:53 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3532111354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_smoke.3532111354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_spurious_pids_ignored.46730394 |
| Short name | T2188 |
| Test name | |
| Test status | |
| Simulation time | 1835328971 ps |
| CPU time | 14.43 seconds |
| Started | Sep 04 05:59:50 AM UTC 24 |
| Finished | Sep 04 06:00:06 AM UTC 24 |
| Peak memory | 234052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=46730394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_ traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 30.usbdev_spurious_pids_ignored.46730394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_stall_priority_over_nak.2380517797 |
| Short name | T2169 |
| Test name | |
| Test status | |
| Simulation time | 157182195 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:59:52 AM UTC 24 |
| Finished | Sep 04 05:59:54 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2380517797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_stall_priority_over_nak.2380517797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_stall_trans.1091031139 |
| Short name | T2170 |
| Test name | |
| Test status | |
| Simulation time | 177169962 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:59:52 AM UTC 24 |
| Finished | Sep 04 05:59:54 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1091031139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_stall_trans.1091031139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_stream_len_max.4037878007 |
| Short name | T2173 |
| Test name | |
| Test status | |
| Simulation time | 492989224 ps |
| CPU time | 2.3 seconds |
| Started | Sep 04 05:59:52 AM UTC 24 |
| Finished | Sep 04 05:59:55 AM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4037878007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_stream_len_max.4037878007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_streaming_out.2060445424 |
| Short name | T2226 |
| Test name | |
| Test status | |
| Simulation time | 3318512239 ps |
| CPU time | 28.27 seconds |
| Started | Sep 04 05:59:52 AM UTC 24 |
| Finished | Sep 04 06:00:21 AM UTC 24 |
| Peak memory | 229508 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2060445424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_streaming_out.2060445424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_timeout_missing_host_handshake.267525234 |
| Short name | T2178 |
| Test name | |
| Test status | |
| Simulation time | 2268146747 ps |
| CPU time | 20.3 seconds |
| Started | Sep 04 05:59:37 AM UTC 24 |
| Finished | Sep 04 05:59:58 AM UTC 24 |
| Peak memory | 217384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=267525234 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_timeout_missing_host_handshake.267525234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/30.usbdev_tx_rx_disruption.3553204138 |
| Short name | T2174 |
| Test name | |
| Test status | |
| Simulation time | 572372680 ps |
| CPU time | 3.07 seconds |
| Started | Sep 04 05:59:52 AM UTC 24 |
| Finished | Sep 04 05:59:56 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3553204138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_t x_rx_disruption.3553204138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/30.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/300.usbdev_tx_rx_disruption.2028865948 |
| Short name | T3613 |
| Test name | |
| Test status | |
| Simulation time | 555958174 ps |
| CPU time | 1.76 seconds |
| Started | Sep 04 06:09:36 AM UTC 24 |
| Finished | Sep 04 06:09:50 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2028865948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 300.usbdev_ tx_rx_disruption.2028865948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/300.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/301.usbdev_tx_rx_disruption.1474971716 |
| Short name | T3608 |
| Test name | |
| Test status | |
| Simulation time | 519299611 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 06:09:36 AM UTC 24 |
| Finished | Sep 04 06:09:49 AM UTC 24 |
| Peak memory | 214864 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1474971716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 301.usbdev_ tx_rx_disruption.1474971716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/301.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/302.usbdev_tx_rx_disruption.714055751 |
| Short name | T3604 |
| Test name | |
| Test status | |
| Simulation time | 483995420 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 06:09:36 AM UTC 24 |
| Finished | Sep 04 06:09:49 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=714055751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 302.usbdev_t x_rx_disruption.714055751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/302.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/303.usbdev_tx_rx_disruption.1766745334 |
| Short name | T3605 |
| Test name | |
| Test status | |
| Simulation time | 510133025 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 06:09:36 AM UTC 24 |
| Finished | Sep 04 06:09:49 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1766745334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 303.usbdev_ tx_rx_disruption.1766745334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/303.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/304.usbdev_tx_rx_disruption.1256778593 |
| Short name | T3610 |
| Test name | |
| Test status | |
| Simulation time | 474072580 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 06:09:36 AM UTC 24 |
| Finished | Sep 04 06:09:49 AM UTC 24 |
| Peak memory | 214504 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1256778593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 304.usbdev_ tx_rx_disruption.1256778593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/304.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/305.usbdev_tx_rx_disruption.2319336066 |
| Short name | T3609 |
| Test name | |
| Test status | |
| Simulation time | 432826530 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 06:09:37 AM UTC 24 |
| Finished | Sep 04 06:09:49 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2319336066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 305.usbdev_ tx_rx_disruption.2319336066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/305.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/306.usbdev_tx_rx_disruption.3697177585 |
| Short name | T3595 |
| Test name | |
| Test status | |
| Simulation time | 471141169 ps |
| CPU time | 1.26 seconds |
| Started | Sep 04 06:09:40 AM UTC 24 |
| Finished | Sep 04 06:09:44 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3697177585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 306.usbdev_ tx_rx_disruption.3697177585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/306.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/307.usbdev_tx_rx_disruption.1090106123 |
| Short name | T3622 |
| Test name | |
| Test status | |
| Simulation time | 517324863 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 06:09:40 AM UTC 24 |
| Finished | Sep 04 06:09:51 AM UTC 24 |
| Peak memory | 215220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1090106123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 307.usbdev_ tx_rx_disruption.1090106123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/307.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/308.usbdev_tx_rx_disruption.396646258 |
| Short name | T3643 |
| Test name | |
| Test status | |
| Simulation time | 506549129 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 06:09:41 AM UTC 24 |
| Finished | Sep 04 06:09:54 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=396646258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 308.usbdev_t x_rx_disruption.396646258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/308.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/309.usbdev_tx_rx_disruption.3977514295 |
| Short name | T3623 |
| Test name | |
| Test status | |
| Simulation time | 538262619 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 06:09:41 AM UTC 24 |
| Finished | Sep 04 06:09:51 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3977514295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 309.usbdev_ tx_rx_disruption.3977514295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/309.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_alert_test.3235169094 |
| Short name | T2224 |
| Test name | |
| Test status | |
| Simulation time | 50117974 ps |
| CPU time | 0.97 seconds |
| Started | Sep 04 06:00:19 AM UTC 24 |
| Finished | Sep 04 06:00:21 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3235169094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 31.usbdev_alert_test.3235169094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_disconnect.446247426 |
| Short name | T2196 |
| Test name | |
| Test status | |
| Simulation time | 4373891624 ps |
| CPU time | 13.1 seconds |
| Started | Sep 04 05:59:54 AM UTC 24 |
| Finished | Sep 04 06:00:08 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=446247426 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_disconnect.446247426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_reset.3661947879 |
| Short name | T2222 |
| Test name | |
| Test status | |
| Simulation time | 13337867690 ps |
| CPU time | 23.31 seconds |
| Started | Sep 04 05:59:54 AM UTC 24 |
| Finished | Sep 04 06:00:19 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3661947879 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_reset.3661947879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_resume.3886539393 |
| Short name | T2286 |
| Test name | |
| Test status | |
| Simulation time | 24614565341 ps |
| CPU time | 50.6 seconds |
| Started | Sep 04 05:59:55 AM UTC 24 |
| Finished | Sep 04 06:00:48 AM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3886539393 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_resume.3886539393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_av_buffer.1831699076 |
| Short name | T2177 |
| Test name | |
| Test status | |
| Simulation time | 191584297 ps |
| CPU time | 1.62 seconds |
| Started | Sep 04 05:59:56 AM UTC 24 |
| Finished | Sep 04 05:59:58 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1831699076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_av_buffer.1831699076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_bitstuff_err.771611559 |
| Short name | T2176 |
| Test name | |
| Test status | |
| Simulation time | 158997786 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 05:59:56 AM UTC 24 |
| Finished | Sep 04 05:59:58 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=771611559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_bitstuff_err.771611559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_data_toggle_clear.957053071 |
| Short name | T2175 |
| Test name | |
| Test status | |
| Simulation time | 168961410 ps |
| CPU time | 1.19 seconds |
| Started | Sep 04 05:59:56 AM UTC 24 |
| Finished | Sep 04 05:59:58 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=957053071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 31.usbdev_data_toggle_clear.957053071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_data_toggle_restore.677878385 |
| Short name | T485 |
| Test name | |
| Test status | |
| Simulation time | 1209062989 ps |
| CPU time | 6.2 seconds |
| Started | Sep 04 05:59:56 AM UTC 24 |
| Finished | Sep 04 06:00:03 AM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=677878385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_data_toggle_restore.677878385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_device_address.3453116054 |
| Short name | T2367 |
| Test name | |
| Test status | |
| Simulation time | 47641358158 ps |
| CPU time | 88.4 seconds |
| Started | Sep 04 05:59:57 AM UTC 24 |
| Finished | Sep 04 06:01:27 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3453116054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_device_address.3453116054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_device_timeout.757960277 |
| Short name | T2183 |
| Test name | |
| Test status | |
| Simulation time | 170124785 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 05:59:59 AM UTC 24 |
| Finished | Sep 04 06:00:02 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=757960277 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_device_timeout.757960277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_disable_endpoint.707801391 |
| Short name | T2186 |
| Test name | |
| Test status | |
| Simulation time | 806308748 ps |
| CPU time | 3.58 seconds |
| Started | Sep 04 05:59:59 AM UTC 24 |
| Finished | Sep 04 06:00:04 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=707801391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_disable_endpoint.707801391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_disconnected.2719463943 |
| Short name | T2182 |
| Test name | |
| Test status | |
| Simulation time | 155642736 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 05:59:59 AM UTC 24 |
| Finished | Sep 04 06:00:02 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2719463943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_disconnected.2719463943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_enable.3230437619 |
| Short name | T2190 |
| Test name | |
| Test status | |
| Simulation time | 55118244 ps |
| CPU time | 1.13 seconds |
| Started | Sep 04 06:00:02 AM UTC 24 |
| Finished | Sep 04 06:00:06 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3230437619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 31.usbdev_enable.3230437619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_endpoint_access.219872402 |
| Short name | T2198 |
| Test name | |
| Test status | |
| Simulation time | 865029972 ps |
| CPU time | 3.54 seconds |
| Started | Sep 04 06:00:02 AM UTC 24 |
| Finished | Sep 04 06:00:09 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=219872402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_endpoint_access.219872402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_endpoint_types.393154158 |
| Short name | T301 |
| Test name | |
| Test status | |
| Simulation time | 281625855 ps |
| CPU time | 1.57 seconds |
| Started | Sep 04 06:00:02 AM UTC 24 |
| Finished | Sep 04 06:00:07 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=393154158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 31.usbdev_endpoint_types.393154158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_fifo_levels.4275288248 |
| Short name | T572 |
| Test name | |
| Test status | |
| Simulation time | 240215090 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 06:00:05 AM UTC 24 |
| Finished | Sep 04 06:00:08 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4275288248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_fifo_levels.4275288248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_fifo_rst.2785077373 |
| Short name | T2201 |
| Test name | |
| Test status | |
| Simulation time | 450685772 ps |
| CPU time | 3.66 seconds |
| Started | Sep 04 06:00:05 AM UTC 24 |
| Finished | Sep 04 06:00:10 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2785077373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_fifo_rst.2785077373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_in_iso.3260477250 |
| Short name | T2195 |
| Test name | |
| Test status | |
| Simulation time | 244896645 ps |
| CPU time | 1.77 seconds |
| Started | Sep 04 06:00:05 AM UTC 24 |
| Finished | Sep 04 06:00:08 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3260477250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 31.usbdev_in_iso.3260477250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_in_stall.2321628316 |
| Short name | T2193 |
| Test name | |
| Test status | |
| Simulation time | 139626162 ps |
| CPU time | 1.25 seconds |
| Started | Sep 04 06:00:05 AM UTC 24 |
| Finished | Sep 04 06:00:08 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2321628316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_in_stall.2321628316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_in_trans.4261688365 |
| Short name | T2194 |
| Test name | |
| Test status | |
| Simulation time | 241929840 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 06:00:06 AM UTC 24 |
| Finished | Sep 04 06:00:08 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4261688365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_in_trans.4261688365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_invalid_sync.3069220706 |
| Short name | T2413 |
| Test name | |
| Test status | |
| Simulation time | 4108216319 ps |
| CPU time | 109.6 seconds |
| Started | Sep 04 06:00:05 AM UTC 24 |
| Finished | Sep 04 06:01:57 AM UTC 24 |
| Peak memory | 229660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3069220706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 31.usbdev_invalid_sync.3069220706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_iso_retraction.3167319520 |
| Short name | T2464 |
| Test name | |
| Test status | |
| Simulation time | 10657123280 ps |
| CPU time | 128.88 seconds |
| Started | Sep 04 06:00:06 AM UTC 24 |
| Finished | Sep 04 06:02:17 AM UTC 24 |
| Peak memory | 217464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3167319520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_iso_retraction.3167319520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_link_in_err.898459730 |
| Short name | T2200 |
| Test name | |
| Test status | |
| Simulation time | 221048079 ps |
| CPU time | 1.68 seconds |
| Started | Sep 04 06:00:07 AM UTC 24 |
| Finished | Sep 04 06:00:10 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=898459730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_link_in_err.898459730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_link_resume.1992269933 |
| Short name | T2331 |
| Test name | |
| Test status | |
| Simulation time | 26397477275 ps |
| CPU time | 60.14 seconds |
| Started | Sep 04 06:00:07 AM UTC 24 |
| Finished | Sep 04 06:01:09 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1992269933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_link_resume.1992269933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_link_suspend.3994870452 |
| Short name | T2246 |
| Test name | |
| Test status | |
| Simulation time | 10905157273 ps |
| CPU time | 23.91 seconds |
| Started | Sep 04 06:00:07 AM UTC 24 |
| Finished | Sep 04 06:00:32 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3994870452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_link_suspend.3994870452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_low_speed_traffic.3739028860 |
| Short name | T2249 |
| Test name | |
| Test status | |
| Simulation time | 2674716435 ps |
| CPU time | 24.46 seconds |
| Started | Sep 04 06:00:08 AM UTC 24 |
| Finished | Sep 04 06:00:34 AM UTC 24 |
| Peak memory | 233968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3739028860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_low_speed_traffic.3739028860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_max_inter_pkt_delay.769586661 |
| Short name | T2359 |
| Test name | |
| Test status | |
| Simulation time | 2703714092 ps |
| CPU time | 72.97 seconds |
| Started | Sep 04 06:00:08 AM UTC 24 |
| Finished | Sep 04 06:01:23 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=769586661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_max_inter_pkt_delay.769586661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_max_length_in_transaction.2838221674 |
| Short name | T2204 |
| Test name | |
| Test status | |
| Simulation time | 266735538 ps |
| CPU time | 1.81 seconds |
| Started | Sep 04 06:00:08 AM UTC 24 |
| Finished | Sep 04 06:00:11 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2838221674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 31.usbdev_max_length_in_transaction.2838221674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_max_length_out_transaction.895005180 |
| Short name | T2202 |
| Test name | |
| Test status | |
| Simulation time | 215680959 ps |
| CPU time | 1.21 seconds |
| Started | Sep 04 06:00:09 AM UTC 24 |
| Finished | Sep 04 06:00:11 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=895005180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 31.usbdev_max_length_out_transaction.895005180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_min_inter_pkt_delay.3757486885 |
| Short name | T2248 |
| Test name | |
| Test status | |
| Simulation time | 2531872130 ps |
| CPU time | 24.17 seconds |
| Started | Sep 04 06:00:09 AM UTC 24 |
| Finished | Sep 04 06:00:34 AM UTC 24 |
| Peak memory | 229512 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3757486885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_min_inter_pkt_delay.3757486885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_min_length_in_transaction.127318741 |
| Short name | T2203 |
| Test name | |
| Test status | |
| Simulation time | 152641668 ps |
| CPU time | 1.22 seconds |
| Started | Sep 04 06:00:09 AM UTC 24 |
| Finished | Sep 04 06:00:11 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=127318741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 31.usbdev_min_length_in_transaction.127318741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_min_length_out_transaction.1655384220 |
| Short name | T2205 |
| Test name | |
| Test status | |
| Simulation time | 145347833 ps |
| CPU time | 1.24 seconds |
| Started | Sep 04 06:00:10 AM UTC 24 |
| Finished | Sep 04 06:00:12 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1655384220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_min_length_out_transaction.1655384220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_nak_trans.3480564783 |
| Short name | T146 |
| Test name | |
| Test status | |
| Simulation time | 181653187 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 06:00:10 AM UTC 24 |
| Finished | Sep 04 06:00:12 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3480564783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_nak_trans.3480564783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_out_iso.1491577824 |
| Short name | T2206 |
| Test name | |
| Test status | |
| Simulation time | 180079700 ps |
| CPU time | 1.37 seconds |
| Started | Sep 04 06:00:10 AM UTC 24 |
| Finished | Sep 04 06:00:12 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1491577824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 31.usbdev_out_iso.1491577824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_out_stall.4294041782 |
| Short name | T2207 |
| Test name | |
| Test status | |
| Simulation time | 185734793 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 06:00:10 AM UTC 24 |
| Finished | Sep 04 06:00:12 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4294041782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_out_stall.4294041782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_out_trans_nak.1058290866 |
| Short name | T2209 |
| Test name | |
| Test status | |
| Simulation time | 160281197 ps |
| CPU time | 1.06 seconds |
| Started | Sep 04 06:00:11 AM UTC 24 |
| Finished | Sep 04 06:00:13 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1058290866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 31.usbdev_out_trans_nak.1058290866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_pending_in_trans.1919543462 |
| Short name | T2212 |
| Test name | |
| Test status | |
| Simulation time | 174901380 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 06:00:11 AM UTC 24 |
| Finished | Sep 04 06:00:14 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1919543462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 31.usbdev_pending_in_trans.1919543462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_phy_config_pinflip.2097351158 |
| Short name | T2213 |
| Test name | |
| Test status | |
| Simulation time | 311239277 ps |
| CPU time | 2.18 seconds |
| Started | Sep 04 06:00:11 AM UTC 24 |
| Finished | Sep 04 06:00:15 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2097351158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 31.usbdev_phy_config_pinflip.2097351158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_phy_config_usb_ref_disable.3274833219 |
| Short name | T2211 |
| Test name | |
| Test status | |
| Simulation time | 150543884 ps |
| CPU time | 1.15 seconds |
| Started | Sep 04 06:00:12 AM UTC 24 |
| Finished | Sep 04 06:00:14 AM UTC 24 |
| Peak memory | 214708 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3274833219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_phy_config_usb_ref_disable.3274833219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_phy_pins_sense.21276173 |
| Short name | T2210 |
| Test name | |
| Test status | |
| Simulation time | 88818761 ps |
| CPU time | 1.16 seconds |
| Started | Sep 04 06:00:12 AM UTC 24 |
| Finished | Sep 04 06:00:14 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=21276173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_phy_pins_sense.21276173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_buffer.3182694593 |
| Short name | T2302 |
| Test name | |
| Test status | |
| Simulation time | 15025112071 ps |
| CPU time | 40.95 seconds |
| Started | Sep 04 06:00:13 AM UTC 24 |
| Finished | Sep 04 06:00:55 AM UTC 24 |
| Peak memory | 227584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3182694593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_pkt_buffer.3182694593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_received.2692779499 |
| Short name | T2216 |
| Test name | |
| Test status | |
| Simulation time | 169381014 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 06:00:13 AM UTC 24 |
| Finished | Sep 04 06:00:15 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2692779499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_pkt_received.2692779499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_sent.1376586971 |
| Short name | T2217 |
| Test name | |
| Test status | |
| Simulation time | 208302443 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 06:00:13 AM UTC 24 |
| Finished | Sep 04 06:00:15 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1376586971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_pkt_sent.1376586971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_random_length_in_transaction.3865365490 |
| Short name | T2214 |
| Test name | |
| Test status | |
| Simulation time | 188958086 ps |
| CPU time | 0.99 seconds |
| Started | Sep 04 06:00:13 AM UTC 24 |
| Finished | Sep 04 06:00:15 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3865365490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 31.usbdev_random_length_in_transaction.3865365490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_random_length_out_transaction.2215331380 |
| Short name | T2215 |
| Test name | |
| Test status | |
| Simulation time | 155454804 ps |
| CPU time | 1.19 seconds |
| Started | Sep 04 06:00:13 AM UTC 24 |
| Finished | Sep 04 06:00:15 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2215331380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 31.usbdev_random_length_out_transaction.2215331380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_rx_crc_err.2031755584 |
| Short name | T2219 |
| Test name | |
| Test status | |
| Simulation time | 138876730 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 06:00:15 AM UTC 24 |
| Finished | Sep 04 06:00:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2031755584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_rx_crc_err.2031755584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_rx_full.1587958211 |
| Short name | T2123 |
| Test name | |
| Test status | |
| Simulation time | 448679287 ps |
| CPU time | 2.51 seconds |
| Started | Sep 04 06:00:15 AM UTC 24 |
| Finished | Sep 04 06:00:18 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1587958211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 31.usbdev_rx_full.1587958211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_setup_stage.3670509383 |
| Short name | T2218 |
| Test name | |
| Test status | |
| Simulation time | 157295712 ps |
| CPU time | 1.05 seconds |
| Started | Sep 04 06:00:15 AM UTC 24 |
| Finished | Sep 04 06:00:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3670509383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_setup_stage.3670509383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_setup_trans_ignored.4160380144 |
| Short name | T2220 |
| Test name | |
| Test status | |
| Simulation time | 155757689 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 06:00:15 AM UTC 24 |
| Finished | Sep 04 06:00:17 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4160380144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 31.usbdev_setup_trans_ignored.4160380144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_smoke.3539050396 |
| Short name | T2171 |
| Test name | |
| Test status | |
| Simulation time | 234087283 ps |
| CPU time | 1.28 seconds |
| Started | Sep 04 06:00:15 AM UTC 24 |
| Finished | Sep 04 06:00:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3539050396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_smoke.3539050396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_spurious_pids_ignored.1294254407 |
| Short name | T2276 |
| Test name | |
| Test status | |
| Simulation time | 2368631694 ps |
| CPU time | 25.03 seconds |
| Started | Sep 04 06:00:16 AM UTC 24 |
| Finished | Sep 04 06:00:42 AM UTC 24 |
| Peak memory | 229680 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1294254407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 31.usbdev_spurious_pids_ignored.1294254407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_stall_priority_over_nak.741645901 |
| Short name | T2221 |
| Test name | |
| Test status | |
| Simulation time | 176095078 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 06:00:16 AM UTC 24 |
| Finished | Sep 04 06:00:19 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=741645901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_stall_priority_over_nak.741645901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_stall_trans.4261563412 |
| Short name | T2008 |
| Test name | |
| Test status | |
| Simulation time | 176789778 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 06:00:16 AM UTC 24 |
| Finished | Sep 04 06:00:19 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4261563412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_stall_trans.4261563412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_stream_len_max.2134992520 |
| Short name | T2225 |
| Test name | |
| Test status | |
| Simulation time | 877601496 ps |
| CPU time | 3.56 seconds |
| Started | Sep 04 06:00:16 AM UTC 24 |
| Finished | Sep 04 06:00:21 AM UTC 24 |
| Peak memory | 217256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2134992520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_stream_len_max.2134992520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_streaming_out.2324714356 |
| Short name | T2266 |
| Test name | |
| Test status | |
| Simulation time | 2035754929 ps |
| CPU time | 23.71 seconds |
| Started | Sep 04 06:00:16 AM UTC 24 |
| Finished | Sep 04 06:00:41 AM UTC 24 |
| Peak memory | 227476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2324714356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_streaming_out.2324714356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_timeout_missing_host_handshake.2967321398 |
| Short name | T2187 |
| Test name | |
| Test status | |
| Simulation time | 292117055 ps |
| CPU time | 4.51 seconds |
| Started | Sep 04 05:59:59 AM UTC 24 |
| Finished | Sep 04 06:00:05 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2967321398 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_timeout_missing_host_handshake.2967321398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/31.usbdev_tx_rx_disruption.3605604295 |
| Short name | T2227 |
| Test name | |
| Test status | |
| Simulation time | 625662531 ps |
| CPU time | 3.19 seconds |
| Started | Sep 04 06:00:17 AM UTC 24 |
| Finished | Sep 04 06:00:22 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3605604295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_t x_rx_disruption.3605604295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/31.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/310.usbdev_tx_rx_disruption.3100772794 |
| Short name | T3642 |
| Test name | |
| Test status | |
| Simulation time | 438500255 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 06:09:41 AM UTC 24 |
| Finished | Sep 04 06:09:54 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3100772794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 310.usbdev_ tx_rx_disruption.3100772794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/310.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/311.usbdev_tx_rx_disruption.650261744 |
| Short name | T3621 |
| Test name | |
| Test status | |
| Simulation time | 476322586 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 06:09:41 AM UTC 24 |
| Finished | Sep 04 06:09:51 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=650261744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 311.usbdev_t x_rx_disruption.650261744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/311.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/312.usbdev_tx_rx_disruption.1499144828 |
| Short name | T3645 |
| Test name | |
| Test status | |
| Simulation time | 592394788 ps |
| CPU time | 1.6 seconds |
| Started | Sep 04 06:09:41 AM UTC 24 |
| Finished | Sep 04 06:09:55 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1499144828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 312.usbdev_ tx_rx_disruption.1499144828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/312.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/313.usbdev_tx_rx_disruption.3035436370 |
| Short name | T3646 |
| Test name | |
| Test status | |
| Simulation time | 472551161 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 06:09:41 AM UTC 24 |
| Finished | Sep 04 06:09:55 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3035436370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 313.usbdev_ tx_rx_disruption.3035436370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/313.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/314.usbdev_tx_rx_disruption.987185490 |
| Short name | T3648 |
| Test name | |
| Test status | |
| Simulation time | 586940561 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 06:09:41 AM UTC 24 |
| Finished | Sep 04 06:09:55 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=987185490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 314.usbdev_t x_rx_disruption.987185490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/314.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/315.usbdev_tx_rx_disruption.1412188364 |
| Short name | T3644 |
| Test name | |
| Test status | |
| Simulation time | 588166069 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 06:09:41 AM UTC 24 |
| Finished | Sep 04 06:09:54 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1412188364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 315.usbdev_ tx_rx_disruption.1412188364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/315.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/316.usbdev_tx_rx_disruption.2636417700 |
| Short name | T3647 |
| Test name | |
| Test status | |
| Simulation time | 503108650 ps |
| CPU time | 1.55 seconds |
| Started | Sep 04 06:09:41 AM UTC 24 |
| Finished | Sep 04 06:09:55 AM UTC 24 |
| Peak memory | 214888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2636417700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 316.usbdev_ tx_rx_disruption.2636417700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/316.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/317.usbdev_tx_rx_disruption.313838225 |
| Short name | T3649 |
| Test name | |
| Test status | |
| Simulation time | 588997823 ps |
| CPU time | 1.72 seconds |
| Started | Sep 04 06:09:41 AM UTC 24 |
| Finished | Sep 04 06:09:55 AM UTC 24 |
| Peak memory | 214904 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=313838225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 317.usbdev_t x_rx_disruption.313838225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/317.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/318.usbdev_tx_rx_disruption.4169696189 |
| Short name | T3650 |
| Test name | |
| Test status | |
| Simulation time | 470105842 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 06:09:41 AM UTC 24 |
| Finished | Sep 04 06:09:55 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4169696189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 318.usbdev_ tx_rx_disruption.4169696189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/318.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/319.usbdev_tx_rx_disruption.3931417129 |
| Short name | T3651 |
| Test name | |
| Test status | |
| Simulation time | 572843899 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 06:09:41 AM UTC 24 |
| Finished | Sep 04 06:09:55 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3931417129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 319.usbdev_ tx_rx_disruption.3931417129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/319.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_alert_test.4146073888 |
| Short name | T2281 |
| Test name | |
| Test status | |
| Simulation time | 37247873 ps |
| CPU time | 1.02 seconds |
| Started | Sep 04 06:00:43 AM UTC 24 |
| Finished | Sep 04 06:00:46 AM UTC 24 |
| Peak memory | 215020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4146073888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 32.usbdev_alert_test.4146073888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_disconnect.3875735041 |
| Short name | T2250 |
| Test name | |
| Test status | |
| Simulation time | 5317735239 ps |
| CPU time | 14.49 seconds |
| Started | Sep 04 06:00:19 AM UTC 24 |
| Finished | Sep 04 06:00:34 AM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3875735041 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_disconnect.3875735041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_reset.3774250887 |
| Short name | T2275 |
| Test name | |
| Test status | |
| Simulation time | 14510125455 ps |
| CPU time | 22.05 seconds |
| Started | Sep 04 06:00:19 AM UTC 24 |
| Finished | Sep 04 06:00:42 AM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3774250887 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_reset.3774250887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_resume.3529940498 |
| Short name | T2341 |
| Test name | |
| Test status | |
| Simulation time | 31277619535 ps |
| CPU time | 51.93 seconds |
| Started | Sep 04 06:00:20 AM UTC 24 |
| Finished | Sep 04 06:01:14 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3529940498 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_resume.3529940498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_av_buffer.2238504848 |
| Short name | T2229 |
| Test name | |
| Test status | |
| Simulation time | 171516974 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 06:00:20 AM UTC 24 |
| Finished | Sep 04 06:00:23 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2238504848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_av_buffer.2238504848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_bitstuff_err.2192197366 |
| Short name | T2228 |
| Test name | |
| Test status | |
| Simulation time | 168365954 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 06:00:20 AM UTC 24 |
| Finished | Sep 04 06:00:23 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2192197366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_bitstuff_err.2192197366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_data_toggle_clear.1143088277 |
| Short name | T2230 |
| Test name | |
| Test status | |
| Simulation time | 344093917 ps |
| CPU time | 2.27 seconds |
| Started | Sep 04 06:00:20 AM UTC 24 |
| Finished | Sep 04 06:00:24 AM UTC 24 |
| Peak memory | 217036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1143088277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 32.usbdev_data_toggle_clear.1143088277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_device_address.758559601 |
| Short name | T2305 |
| Test name | |
| Test status | |
| Simulation time | 13829216501 ps |
| CPU time | 33.38 seconds |
| Started | Sep 04 06:00:22 AM UTC 24 |
| Finished | Sep 04 06:00:57 AM UTC 24 |
| Peak memory | 217436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=758559601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 32.usbdev_device_address.758559601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_device_timeout.61812772 |
| Short name | T2265 |
| Test name | |
| Test status | |
| Simulation time | 706394148 ps |
| CPU time | 16.62 seconds |
| Started | Sep 04 06:00:22 AM UTC 24 |
| Finished | Sep 04 06:00:40 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=61812772 -assert nopostproc +UVM_TESTNAME=usbdev_ba se_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_device_timeout.61812772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_disable_endpoint.4135507545 |
| Short name | T2235 |
| Test name | |
| Test status | |
| Simulation time | 513928273 ps |
| CPU time | 2.8 seconds |
| Started | Sep 04 06:00:22 AM UTC 24 |
| Finished | Sep 04 06:00:26 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4135507545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 32.usbdev_disable_endpoint.4135507545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_disconnected.2761832556 |
| Short name | T2234 |
| Test name | |
| Test status | |
| Simulation time | 145108898 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 06:00:23 AM UTC 24 |
| Finished | Sep 04 06:00:26 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2761832556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_disconnected.2761832556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_enable.2477789884 |
| Short name | T2233 |
| Test name | |
| Test status | |
| Simulation time | 71971058 ps |
| CPU time | 1.17 seconds |
| Started | Sep 04 06:00:23 AM UTC 24 |
| Finished | Sep 04 06:00:25 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2477789884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 32.usbdev_enable.2477789884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_endpoint_access.493917841 |
| Short name | T2238 |
| Test name | |
| Test status | |
| Simulation time | 698674515 ps |
| CPU time | 3.77 seconds |
| Started | Sep 04 06:00:24 AM UTC 24 |
| Finished | Sep 04 06:00:29 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=493917841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_endpoint_access.493917841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_fifo_levels.3998619293 |
| Short name | T579 |
| Test name | |
| Test status | |
| Simulation time | 246856073 ps |
| CPU time | 1.8 seconds |
| Started | Sep 04 06:00:26 AM UTC 24 |
| Finished | Sep 04 06:00:29 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3998619293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_fifo_levels.3998619293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_fifo_rst.486335578 |
| Short name | T2241 |
| Test name | |
| Test status | |
| Simulation time | 268979510 ps |
| CPU time | 2.92 seconds |
| Started | Sep 04 06:00:26 AM UTC 24 |
| Finished | Sep 04 06:00:30 AM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=486335578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 32.usbdev_fifo_rst.486335578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_in_iso.851045522 |
| Short name | T2242 |
| Test name | |
| Test status | |
| Simulation time | 217263704 ps |
| CPU time | 1.87 seconds |
| Started | Sep 04 06:00:27 AM UTC 24 |
| Finished | Sep 04 06:00:30 AM UTC 24 |
| Peak memory | 227412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=851045522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 32.usbdev_in_iso.851045522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_in_stall.2034726086 |
| Short name | T2240 |
| Test name | |
| Test status | |
| Simulation time | 210151837 ps |
| CPU time | 1.6 seconds |
| Started | Sep 04 06:00:27 AM UTC 24 |
| Finished | Sep 04 06:00:30 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2034726086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_in_stall.2034726086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_in_trans.725189993 |
| Short name | T2245 |
| Test name | |
| Test status | |
| Simulation time | 226160533 ps |
| CPU time | 1.72 seconds |
| Started | Sep 04 06:00:28 AM UTC 24 |
| Finished | Sep 04 06:00:31 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=725189993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 32.usbdev_in_trans.725189993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_invalid_sync.781160769 |
| Short name | T2327 |
| Test name | |
| Test status | |
| Simulation time | 4464653873 ps |
| CPU time | 40.73 seconds |
| Started | Sep 04 06:00:26 AM UTC 24 |
| Finished | Sep 04 06:01:08 AM UTC 24 |
| Peak memory | 234244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=781160769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_invalid_sync.781160769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_iso_retraction.283830179 |
| Short name | T2515 |
| Test name | |
| Test status | |
| Simulation time | 10798341632 ps |
| CPU time | 131.49 seconds |
| Started | Sep 04 06:00:28 AM UTC 24 |
| Finished | Sep 04 06:02:42 AM UTC 24 |
| Peak memory | 217392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=283830179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 32.usbdev_iso_retraction.283830179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_link_in_err.1241573572 |
| Short name | T2247 |
| Test name | |
| Test status | |
| Simulation time | 219638009 ps |
| CPU time | 1.73 seconds |
| Started | Sep 04 06:00:30 AM UTC 24 |
| Finished | Sep 04 06:00:32 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1241573572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_link_in_err.1241573572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_link_resume.509055274 |
| Short name | T2358 |
| Test name | |
| Test status | |
| Simulation time | 25438414656 ps |
| CPU time | 50.85 seconds |
| Started | Sep 04 06:00:30 AM UTC 24 |
| Finished | Sep 04 06:01:22 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=509055274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 32.usbdev_link_resume.509055274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_link_suspend.1623493760 |
| Short name | T2274 |
| Test name | |
| Test status | |
| Simulation time | 4554965581 ps |
| CPU time | 9.01 seconds |
| Started | Sep 04 06:00:32 AM UTC 24 |
| Finished | Sep 04 06:00:42 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1623493760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_link_suspend.1623493760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_low_speed_traffic.2056903411 |
| Short name | T2292 |
| Test name | |
| Test status | |
| Simulation time | 2567470825 ps |
| CPU time | 17.83 seconds |
| Started | Sep 04 06:00:32 AM UTC 24 |
| Finished | Sep 04 06:00:51 AM UTC 24 |
| Peak memory | 229520 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2056903411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_low_speed_traffic.2056903411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_max_inter_pkt_delay.115641603 |
| Short name | T2316 |
| Test name | |
| Test status | |
| Simulation time | 3259863073 ps |
| CPU time | 30.15 seconds |
| Started | Sep 04 06:00:32 AM UTC 24 |
| Finished | Sep 04 06:01:03 AM UTC 24 |
| Peak memory | 229676 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=115641603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_max_inter_pkt_delay.115641603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_max_length_in_transaction.2891002701 |
| Short name | T2253 |
| Test name | |
| Test status | |
| Simulation time | 280200596 ps |
| CPU time | 1.77 seconds |
| Started | Sep 04 06:00:32 AM UTC 24 |
| Finished | Sep 04 06:00:35 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2891002701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 32.usbdev_max_length_in_transaction.2891002701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_max_length_out_transaction.2351768497 |
| Short name | T2252 |
| Test name | |
| Test status | |
| Simulation time | 198800785 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 06:00:32 AM UTC 24 |
| Finished | Sep 04 06:00:34 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2351768497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_max_length_out_transaction.2351768497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_min_inter_pkt_delay.3842483432 |
| Short name | T2295 |
| Test name | |
| Test status | |
| Simulation time | 2745660681 ps |
| CPU time | 19.33 seconds |
| Started | Sep 04 06:00:32 AM UTC 24 |
| Finished | Sep 04 06:00:53 AM UTC 24 |
| Peak memory | 229644 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3842483432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_min_inter_pkt_delay.3842483432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_min_length_in_transaction.2262099409 |
| Short name | T2251 |
| Test name | |
| Test status | |
| Simulation time | 158368313 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 06:00:32 AM UTC 24 |
| Finished | Sep 04 06:00:34 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2262099409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 32.usbdev_min_length_in_transaction.2262099409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_min_length_out_transaction.788319619 |
| Short name | T2255 |
| Test name | |
| Test status | |
| Simulation time | 145608552 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 06:00:34 AM UTC 24 |
| Finished | Sep 04 06:00:36 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=788319619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 32.usbdev_min_length_out_transaction.788319619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_nak_trans.2431039953 |
| Short name | T147 |
| Test name | |
| Test status | |
| Simulation time | 205948753 ps |
| CPU time | 1.62 seconds |
| Started | Sep 04 06:00:34 AM UTC 24 |
| Finished | Sep 04 06:00:36 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2431039953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_nak_trans.2431039953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_out_iso.3069994069 |
| Short name | T2256 |
| Test name | |
| Test status | |
| Simulation time | 184718852 ps |
| CPU time | 1.57 seconds |
| Started | Sep 04 06:00:34 AM UTC 24 |
| Finished | Sep 04 06:00:36 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3069994069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 32.usbdev_out_iso.3069994069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_out_stall.1730850655 |
| Short name | T2261 |
| Test name | |
| Test status | |
| Simulation time | 185949056 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 06:00:35 AM UTC 24 |
| Finished | Sep 04 06:00:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1730850655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_out_stall.1730850655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_out_trans_nak.717553105 |
| Short name | T2259 |
| Test name | |
| Test status | |
| Simulation time | 167877935 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 06:00:35 AM UTC 24 |
| Finished | Sep 04 06:00:38 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=717553105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_out_trans_nak.717553105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_pending_in_trans.336777729 |
| Short name | T2260 |
| Test name | |
| Test status | |
| Simulation time | 198643084 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 06:00:35 AM UTC 24 |
| Finished | Sep 04 06:00:38 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=336777729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_pending_in_trans.336777729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_phy_config_pinflip.2375887448 |
| Short name | T2263 |
| Test name | |
| Test status | |
| Simulation time | 215904844 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 06:00:35 AM UTC 24 |
| Finished | Sep 04 06:00:38 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2375887448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 32.usbdev_phy_config_pinflip.2375887448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_phy_config_usb_ref_disable.2762105023 |
| Short name | T2262 |
| Test name | |
| Test status | |
| Simulation time | 149574900 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 06:00:35 AM UTC 24 |
| Finished | Sep 04 06:00:38 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2762105023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_phy_config_usb_ref_disable.2762105023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_phy_pins_sense.785934943 |
| Short name | T2258 |
| Test name | |
| Test status | |
| Simulation time | 40677020 ps |
| CPU time | 1.07 seconds |
| Started | Sep 04 06:00:35 AM UTC 24 |
| Finished | Sep 04 06:00:38 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=785934943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 32.usbdev_phy_pins_sense.785934943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_buffer.3844566359 |
| Short name | T2368 |
| Test name | |
| Test status | |
| Simulation time | 14827699199 ps |
| CPU time | 49.04 seconds |
| Started | Sep 04 06:00:37 AM UTC 24 |
| Finished | Sep 04 06:01:27 AM UTC 24 |
| Peak memory | 231624 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3844566359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 32.usbdev_pkt_buffer.3844566359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_received.3182239835 |
| Short name | T2264 |
| Test name | |
| Test status | |
| Simulation time | 164141068 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 06:00:37 AM UTC 24 |
| Finished | Sep 04 06:00:39 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3182239835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_pkt_received.3182239835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_sent.3988670389 |
| Short name | T2270 |
| Test name | |
| Test status | |
| Simulation time | 208946782 ps |
| CPU time | 1.61 seconds |
| Started | Sep 04 06:00:39 AM UTC 24 |
| Finished | Sep 04 06:00:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3988670389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_pkt_sent.3988670389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_random_length_in_transaction.1457940005 |
| Short name | T2273 |
| Test name | |
| Test status | |
| Simulation time | 221465886 ps |
| CPU time | 1.64 seconds |
| Started | Sep 04 06:00:39 AM UTC 24 |
| Finished | Sep 04 06:00:42 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1457940005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 32.usbdev_random_length_in_transaction.1457940005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_random_length_out_transaction.2248792815 |
| Short name | T2272 |
| Test name | |
| Test status | |
| Simulation time | 179999212 ps |
| CPU time | 1.61 seconds |
| Started | Sep 04 06:00:39 AM UTC 24 |
| Finished | Sep 04 06:00:42 AM UTC 24 |
| Peak memory | 214868 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2248792815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 32.usbdev_random_length_out_transaction.2248792815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_rx_crc_err.2533614385 |
| Short name | T2269 |
| Test name | |
| Test status | |
| Simulation time | 177673858 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 06:00:39 AM UTC 24 |
| Finished | Sep 04 06:00:41 AM UTC 24 |
| Peak memory | 214924 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2533614385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 32.usbdev_rx_crc_err.2533614385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_setup_stage.1080208818 |
| Short name | T2267 |
| Test name | |
| Test status | |
| Simulation time | 156533794 ps |
| CPU time | 1.17 seconds |
| Started | Sep 04 06:00:39 AM UTC 24 |
| Finished | Sep 04 06:00:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1080208818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_setup_stage.1080208818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_setup_trans_ignored.3986496029 |
| Short name | T2268 |
| Test name | |
| Test status | |
| Simulation time | 152987127 ps |
| CPU time | 1.29 seconds |
| Started | Sep 04 06:00:39 AM UTC 24 |
| Finished | Sep 04 06:00:41 AM UTC 24 |
| Peak memory | 215016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3986496029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 32.usbdev_setup_trans_ignored.3986496029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_smoke.2515498672 |
| Short name | T2271 |
| Test name | |
| Test status | |
| Simulation time | 208337826 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 06:00:39 AM UTC 24 |
| Finished | Sep 04 06:00:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2515498672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_smoke.2515498672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_spurious_pids_ignored.3979926242 |
| Short name | T2326 |
| Test name | |
| Test status | |
| Simulation time | 3080936368 ps |
| CPU time | 26.83 seconds |
| Started | Sep 04 06:00:39 AM UTC 24 |
| Finished | Sep 04 06:01:07 AM UTC 24 |
| Peak memory | 229596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3979926242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 32.usbdev_spurious_pids_ignored.3979926242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_stall_priority_over_nak.1573440443 |
| Short name | T2277 |
| Test name | |
| Test status | |
| Simulation time | 197103724 ps |
| CPU time | 1.28 seconds |
| Started | Sep 04 06:00:40 AM UTC 24 |
| Finished | Sep 04 06:00:43 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1573440443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_stall_priority_over_nak.1573440443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_stall_trans.3244281090 |
| Short name | T2278 |
| Test name | |
| Test status | |
| Simulation time | 163200882 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 06:00:41 AM UTC 24 |
| Finished | Sep 04 06:00:43 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3244281090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_stall_trans.3244281090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_stream_len_max.3475965772 |
| Short name | T2285 |
| Test name | |
| Test status | |
| Simulation time | 782338254 ps |
| CPU time | 4.02 seconds |
| Started | Sep 04 06:00:42 AM UTC 24 |
| Finished | Sep 04 06:00:47 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3475965772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_stream_len_max.3475965772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_streaming_out.925218621 |
| Short name | T2453 |
| Test name | |
| Test status | |
| Simulation time | 3408090817 ps |
| CPU time | 87.57 seconds |
| Started | Sep 04 06:00:42 AM UTC 24 |
| Finished | Sep 04 06:02:12 AM UTC 24 |
| Peak memory | 227672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=925218621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_streaming_out.925218621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_timeout_missing_host_handshake.3255120125 |
| Short name | T2231 |
| Test name | |
| Test status | |
| Simulation time | 167939623 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 06:00:22 AM UTC 24 |
| Finished | Sep 04 06:00:24 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3255120125 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_timeout_missing_host_handshake.3255120125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/32.usbdev_tx_rx_disruption.2682118551 |
| Short name | T2279 |
| Test name | |
| Test status | |
| Simulation time | 495217979 ps |
| CPU time | 2.6 seconds |
| Started | Sep 04 06:00:42 AM UTC 24 |
| Finished | Sep 04 06:00:46 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2682118551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_t x_rx_disruption.2682118551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/32.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/320.usbdev_tx_rx_disruption.4286117941 |
| Short name | T3588 |
| Test name | |
| Test status | |
| Simulation time | 508439134 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 06:09:41 AM UTC 24 |
| Finished | Sep 04 06:09:43 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4286117941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 320.usbdev_ tx_rx_disruption.4286117941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/320.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/321.usbdev_tx_rx_disruption.1420088609 |
| Short name | T3587 |
| Test name | |
| Test status | |
| Simulation time | 513493831 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 06:09:41 AM UTC 24 |
| Finished | Sep 04 06:09:43 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1420088609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 321.usbdev_ tx_rx_disruption.1420088609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/321.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/322.usbdev_tx_rx_disruption.1017306436 |
| Short name | T3586 |
| Test name | |
| Test status | |
| Simulation time | 477123789 ps |
| CPU time | 1.31 seconds |
| Started | Sep 04 06:09:41 AM UTC 24 |
| Finished | Sep 04 06:09:43 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1017306436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 322.usbdev_ tx_rx_disruption.1017306436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/322.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/323.usbdev_tx_rx_disruption.3117747723 |
| Short name | T3589 |
| Test name | |
| Test status | |
| Simulation time | 570791593 ps |
| CPU time | 1.57 seconds |
| Started | Sep 04 06:09:41 AM UTC 24 |
| Finished | Sep 04 06:09:43 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3117747723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 323.usbdev_ tx_rx_disruption.3117747723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/323.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/324.usbdev_tx_rx_disruption.788065040 |
| Short name | T3590 |
| Test name | |
| Test status | |
| Simulation time | 504287082 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 06:09:41 AM UTC 24 |
| Finished | Sep 04 06:09:44 AM UTC 24 |
| Peak memory | 215108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=788065040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 324.usbdev_t x_rx_disruption.788065040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/324.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/325.usbdev_tx_rx_disruption.119668008 |
| Short name | T3593 |
| Test name | |
| Test status | |
| Simulation time | 646888342 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 06:09:41 AM UTC 24 |
| Finished | Sep 04 06:09:44 AM UTC 24 |
| Peak memory | 216216 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=119668008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 325.usbdev_t x_rx_disruption.119668008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/325.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/326.usbdev_tx_rx_disruption.774520022 |
| Short name | T3591 |
| Test name | |
| Test status | |
| Simulation time | 571162971 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 06:09:41 AM UTC 24 |
| Finished | Sep 04 06:09:44 AM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=774520022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 326.usbdev_t x_rx_disruption.774520022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/326.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/327.usbdev_tx_rx_disruption.824023723 |
| Short name | T3594 |
| Test name | |
| Test status | |
| Simulation time | 653961421 ps |
| CPU time | 1.6 seconds |
| Started | Sep 04 06:09:41 AM UTC 24 |
| Finished | Sep 04 06:09:44 AM UTC 24 |
| Peak memory | 216252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=824023723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 327.usbdev_t x_rx_disruption.824023723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/327.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/328.usbdev_tx_rx_disruption.908485574 |
| Short name | T3592 |
| Test name | |
| Test status | |
| Simulation time | 545604969 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 06:09:41 AM UTC 24 |
| Finished | Sep 04 06:09:44 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=908485574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 328.usbdev_t x_rx_disruption.908485574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/328.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/329.usbdev_tx_rx_disruption.4256941376 |
| Short name | T3596 |
| Test name | |
| Test status | |
| Simulation time | 533857240 ps |
| CPU time | 1.62 seconds |
| Started | Sep 04 06:09:41 AM UTC 24 |
| Finished | Sep 04 06:09:44 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4256941376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 329.usbdev_ tx_rx_disruption.4256941376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/329.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_alert_test.2337011556 |
| Short name | T2334 |
| Test name | |
| Test status | |
| Simulation time | 39709164 ps |
| CPU time | 1.02 seconds |
| Started | Sep 04 06:01:07 AM UTC 24 |
| Finished | Sep 04 06:01:09 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2337011556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 33.usbdev_alert_test.2337011556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_disconnect.545943047 |
| Short name | T2315 |
| Test name | |
| Test status | |
| Simulation time | 11540632425 ps |
| CPU time | 17.26 seconds |
| Started | Sep 04 06:00:43 AM UTC 24 |
| Finished | Sep 04 06:01:02 AM UTC 24 |
| Peak memory | 217400 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=545943047 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_disconnect.545943047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_reset.537270016 |
| Short name | T2322 |
| Test name | |
| Test status | |
| Simulation time | 16346482764 ps |
| CPU time | 19.93 seconds |
| Started | Sep 04 06:00:43 AM UTC 24 |
| Finished | Sep 04 06:01:05 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=537270016 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_reset.537270016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_resume.332877920 |
| Short name | T2381 |
| Test name | |
| Test status | |
| Simulation time | 26285887055 ps |
| CPU time | 47.97 seconds |
| Started | Sep 04 06:00:44 AM UTC 24 |
| Finished | Sep 04 06:01:34 AM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=332877920 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_resume.332877920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_av_buffer.2552126081 |
| Short name | T2282 |
| Test name | |
| Test status | |
| Simulation time | 152946326 ps |
| CPU time | 1.32 seconds |
| Started | Sep 04 06:00:44 AM UTC 24 |
| Finished | Sep 04 06:00:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2552126081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_av_buffer.2552126081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_bitstuff_err.916350443 |
| Short name | T2284 |
| Test name | |
| Test status | |
| Simulation time | 145925865 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 06:00:44 AM UTC 24 |
| Finished | Sep 04 06:00:47 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=916350443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_bitstuff_err.916350443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_data_toggle_clear.62270325 |
| Short name | T2287 |
| Test name | |
| Test status | |
| Simulation time | 438597791 ps |
| CPU time | 2.56 seconds |
| Started | Sep 04 06:00:44 AM UTC 24 |
| Finished | Sep 04 06:00:48 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=62270325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_data_toggle_clear.62270325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_data_toggle_restore.1400491856 |
| Short name | T2288 |
| Test name | |
| Test status | |
| Simulation time | 519360002 ps |
| CPU time | 2.87 seconds |
| Started | Sep 04 06:00:44 AM UTC 24 |
| Finished | Sep 04 06:00:48 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1400491856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_data_toggle_restore.1400491856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_device_address.1924194645 |
| Short name | T2418 |
| Test name | |
| Test status | |
| Simulation time | 39439100613 ps |
| CPU time | 72.5 seconds |
| Started | Sep 04 06:00:44 AM UTC 24 |
| Finished | Sep 04 06:01:58 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1924194645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_device_address.1924194645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_device_timeout.2460200469 |
| Short name | T2391 |
| Test name | |
| Test status | |
| Simulation time | 6598727414 ps |
| CPU time | 53.51 seconds |
| Started | Sep 04 06:00:44 AM UTC 24 |
| Finished | Sep 04 06:01:39 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2460200469 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_device_timeout.2460200469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_disable_endpoint.3586514415 |
| Short name | T2296 |
| Test name | |
| Test status | |
| Simulation time | 813376267 ps |
| CPU time | 3.77 seconds |
| Started | Sep 04 06:00:47 AM UTC 24 |
| Finished | Sep 04 06:00:53 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3586514415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 33.usbdev_disable_endpoint.3586514415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_disconnected.1724273093 |
| Short name | T2291 |
| Test name | |
| Test status | |
| Simulation time | 148680665 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 06:00:47 AM UTC 24 |
| Finished | Sep 04 06:00:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1724273093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_disconnected.1724273093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_enable.957919565 |
| Short name | T2290 |
| Test name | |
| Test status | |
| Simulation time | 45326582 ps |
| CPU time | 1 seconds |
| Started | Sep 04 06:00:47 AM UTC 24 |
| Finished | Sep 04 06:00:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=957919565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_enable.957919565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_endpoint_access.1471073369 |
| Short name | T2299 |
| Test name | |
| Test status | |
| Simulation time | 854044129 ps |
| CPU time | 4.31 seconds |
| Started | Sep 04 06:00:47 AM UTC 24 |
| Finished | Sep 04 06:00:53 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1471073369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_endpoint_access.1471073369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_endpoint_types.169451679 |
| Short name | T439 |
| Test name | |
| Test status | |
| Simulation time | 186108726 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 06:00:48 AM UTC 24 |
| Finished | Sep 04 06:00:50 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=169451679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 33.usbdev_endpoint_types.169451679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_fifo_rst.1818111984 |
| Short name | T2300 |
| Test name | |
| Test status | |
| Simulation time | 429621811 ps |
| CPU time | 3.59 seconds |
| Started | Sep 04 06:00:49 AM UTC 24 |
| Finished | Sep 04 06:00:54 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1818111984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_fifo_rst.1818111984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_in_iso.1777657645 |
| Short name | T2293 |
| Test name | |
| Test status | |
| Simulation time | 222063595 ps |
| CPU time | 1.37 seconds |
| Started | Sep 04 06:00:49 AM UTC 24 |
| Finished | Sep 04 06:00:51 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1777657645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 33.usbdev_in_iso.1777657645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_in_stall.2177660133 |
| Short name | T2297 |
| Test name | |
| Test status | |
| Simulation time | 145260243 ps |
| CPU time | 1.25 seconds |
| Started | Sep 04 06:00:50 AM UTC 24 |
| Finished | Sep 04 06:00:53 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2177660133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_in_stall.2177660133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_in_trans.1316418150 |
| Short name | T2298 |
| Test name | |
| Test status | |
| Simulation time | 199565996 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 06:00:50 AM UTC 24 |
| Finished | Sep 04 06:00:53 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1316418150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_in_trans.1316418150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_invalid_sync.936640103 |
| Short name | T2489 |
| Test name | |
| Test status | |
| Simulation time | 2915279817 ps |
| CPU time | 97.74 seconds |
| Started | Sep 04 06:00:49 AM UTC 24 |
| Finished | Sep 04 06:02:29 AM UTC 24 |
| Peak memory | 229596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=936640103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 33.usbdev_invalid_sync.936640103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_iso_retraction.3736126950 |
| Short name | T2410 |
| Test name | |
| Test status | |
| Simulation time | 5193017555 ps |
| CPU time | 60.08 seconds |
| Started | Sep 04 06:00:52 AM UTC 24 |
| Finished | Sep 04 06:01:53 AM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3736126950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_iso_retraction.3736126950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_link_in_err.291549786 |
| Short name | T2301 |
| Test name | |
| Test status | |
| Simulation time | 205305893 ps |
| CPU time | 1.65 seconds |
| Started | Sep 04 06:00:52 AM UTC 24 |
| Finished | Sep 04 06:00:54 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=291549786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_link_in_err.291549786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_link_resume.547765067 |
| Short name | T2401 |
| Test name | |
| Test status | |
| Simulation time | 24626985700 ps |
| CPU time | 52.38 seconds |
| Started | Sep 04 06:00:52 AM UTC 24 |
| Finished | Sep 04 06:01:46 AM UTC 24 |
| Peak memory | 227460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=547765067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_link_resume.547765067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_link_suspend.2839035953 |
| Short name | T2362 |
| Test name | |
| Test status | |
| Simulation time | 10837928623 ps |
| CPU time | 29.59 seconds |
| Started | Sep 04 06:00:53 AM UTC 24 |
| Finished | Sep 04 06:01:24 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2839035953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_link_suspend.2839035953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_low_speed_traffic.3712403722 |
| Short name | T2474 |
| Test name | |
| Test status | |
| Simulation time | 3265539846 ps |
| CPU time | 87.95 seconds |
| Started | Sep 04 06:00:53 AM UTC 24 |
| Finished | Sep 04 06:02:23 AM UTC 24 |
| Peak memory | 229660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3712403722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_low_speed_traffic.3712403722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_max_inter_pkt_delay.424149781 |
| Short name | T2396 |
| Test name | |
| Test status | |
| Simulation time | 2021975510 ps |
| CPU time | 49.59 seconds |
| Started | Sep 04 06:00:53 AM UTC 24 |
| Finished | Sep 04 06:01:45 AM UTC 24 |
| Peak memory | 234036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=424149781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_max_inter_pkt_delay.424149781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_max_length_in_transaction.3151116335 |
| Short name | T2303 |
| Test name | |
| Test status | |
| Simulation time | 263218573 ps |
| CPU time | 1.8 seconds |
| Started | Sep 04 06:00:53 AM UTC 24 |
| Finished | Sep 04 06:00:56 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3151116335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 33.usbdev_max_length_in_transaction.3151116335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_max_length_out_transaction.3166556280 |
| Short name | T2304 |
| Test name | |
| Test status | |
| Simulation time | 226723237 ps |
| CPU time | 1.81 seconds |
| Started | Sep 04 06:00:53 AM UTC 24 |
| Finished | Sep 04 06:00:56 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3166556280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 33.usbdev_max_length_out_transaction.3166556280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_min_inter_pkt_delay.765852005 |
| Short name | T2403 |
| Test name | |
| Test status | |
| Simulation time | 1948703578 ps |
| CPU time | 52.15 seconds |
| Started | Sep 04 06:00:54 AM UTC 24 |
| Finished | Sep 04 06:01:47 AM UTC 24 |
| Peak memory | 227496 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=765852005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_min_inter_pkt_delay.765852005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_min_length_in_transaction.3268911939 |
| Short name | T2307 |
| Test name | |
| Test status | |
| Simulation time | 148891847 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 06:00:55 AM UTC 24 |
| Finished | Sep 04 06:00:57 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3268911939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 33.usbdev_min_length_in_transaction.3268911939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_min_length_out_transaction.1146751424 |
| Short name | T2306 |
| Test name | |
| Test status | |
| Simulation time | 201474076 ps |
| CPU time | 1.19 seconds |
| Started | Sep 04 06:00:55 AM UTC 24 |
| Finished | Sep 04 06:00:57 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1146751424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 33.usbdev_min_length_out_transaction.1146751424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_nak_trans.773888441 |
| Short name | T138 |
| Test name | |
| Test status | |
| Simulation time | 238255297 ps |
| CPU time | 1.61 seconds |
| Started | Sep 04 06:00:55 AM UTC 24 |
| Finished | Sep 04 06:00:58 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=773888441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_nak_trans.773888441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_out_iso.1575456481 |
| Short name | T2308 |
| Test name | |
| Test status | |
| Simulation time | 231154108 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 06:00:56 AM UTC 24 |
| Finished | Sep 04 06:00:59 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1575456481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 33.usbdev_out_iso.1575456481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_out_stall.3495585664 |
| Short name | T2309 |
| Test name | |
| Test status | |
| Simulation time | 177890284 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 06:00:58 AM UTC 24 |
| Finished | Sep 04 06:01:01 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3495585664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_out_stall.3495585664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_out_trans_nak.1036882486 |
| Short name | T2312 |
| Test name | |
| Test status | |
| Simulation time | 221242965 ps |
| CPU time | 1.68 seconds |
| Started | Sep 04 06:00:58 AM UTC 24 |
| Finished | Sep 04 06:01:01 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1036882486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 33.usbdev_out_trans_nak.1036882486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_pending_in_trans.1827111497 |
| Short name | T2311 |
| Test name | |
| Test status | |
| Simulation time | 167532660 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 06:00:58 AM UTC 24 |
| Finished | Sep 04 06:01:01 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1827111497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 33.usbdev_pending_in_trans.1827111497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_phy_config_pinflip.4021262319 |
| Short name | T2313 |
| Test name | |
| Test status | |
| Simulation time | 280338956 ps |
| CPU time | 1.85 seconds |
| Started | Sep 04 06:00:58 AM UTC 24 |
| Finished | Sep 04 06:01:01 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4021262319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 33.usbdev_phy_config_pinflip.4021262319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_phy_config_usb_ref_disable.794441515 |
| Short name | T2310 |
| Test name | |
| Test status | |
| Simulation time | 145881203 ps |
| CPU time | 1.31 seconds |
| Started | Sep 04 06:00:58 AM UTC 24 |
| Finished | Sep 04 06:01:01 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=794441515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 33.usbdev_phy_config_usb_ref_disable.794441515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_phy_pins_sense.158282532 |
| Short name | T2314 |
| Test name | |
| Test status | |
| Simulation time | 38191426 ps |
| CPU time | 1.11 seconds |
| Started | Sep 04 06:00:59 AM UTC 24 |
| Finished | Sep 04 06:01:01 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=158282532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 33.usbdev_phy_pins_sense.158282532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_buffer.1802228917 |
| Short name | T2402 |
| Test name | |
| Test status | |
| Simulation time | 13063171983 ps |
| CPU time | 44.68 seconds |
| Started | Sep 04 06:01:00 AM UTC 24 |
| Finished | Sep 04 06:01:47 AM UTC 24 |
| Peak memory | 231636 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1802228917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_pkt_buffer.1802228917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_received.2433917724 |
| Short name | T2319 |
| Test name | |
| Test status | |
| Simulation time | 179655762 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 06:01:02 AM UTC 24 |
| Finished | Sep 04 06:01:04 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2433917724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_pkt_received.2433917724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_sent.1241581805 |
| Short name | T2318 |
| Test name | |
| Test status | |
| Simulation time | 201978408 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 06:01:02 AM UTC 24 |
| Finished | Sep 04 06:01:04 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1241581805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_pkt_sent.1241581805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_random_length_in_transaction.1368151180 |
| Short name | T2317 |
| Test name | |
| Test status | |
| Simulation time | 156282392 ps |
| CPU time | 1.32 seconds |
| Started | Sep 04 06:01:02 AM UTC 24 |
| Finished | Sep 04 06:01:04 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1368151180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 33.usbdev_random_length_in_transaction.1368151180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_random_length_out_transaction.597207208 |
| Short name | T2321 |
| Test name | |
| Test status | |
| Simulation time | 208191433 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 06:01:02 AM UTC 24 |
| Finished | Sep 04 06:01:05 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=597207208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 33.usbdev_random_length_out_transaction.597207208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_rx_crc_err.532844477 |
| Short name | T2320 |
| Test name | |
| Test status | |
| Simulation time | 183983251 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 06:01:02 AM UTC 24 |
| Finished | Sep 04 06:01:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=532844477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_rx_crc_err.532844477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_rx_full.2396103556 |
| Short name | T2324 |
| Test name | |
| Test status | |
| Simulation time | 264594993 ps |
| CPU time | 1.76 seconds |
| Started | Sep 04 06:01:03 AM UTC 24 |
| Finished | Sep 04 06:01:06 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2396103556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 33.usbdev_rx_full.2396103556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_setup_stage.1231802149 |
| Short name | T2323 |
| Test name | |
| Test status | |
| Simulation time | 190268540 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 06:01:03 AM UTC 24 |
| Finished | Sep 04 06:01:06 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1231802149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_setup_stage.1231802149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_setup_trans_ignored.3439863747 |
| Short name | T2325 |
| Test name | |
| Test status | |
| Simulation time | 153106452 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 06:01:04 AM UTC 24 |
| Finished | Sep 04 06:01:07 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3439863747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 33.usbdev_setup_trans_ignored.3439863747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_smoke.1245758317 |
| Short name | T2328 |
| Test name | |
| Test status | |
| Simulation time | 199153440 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 06:01:06 AM UTC 24 |
| Finished | Sep 04 06:01:08 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1245758317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_smoke.1245758317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_spurious_pids_ignored.2808229204 |
| Short name | T2350 |
| Test name | |
| Test status | |
| Simulation time | 1934520451 ps |
| CPU time | 12.93 seconds |
| Started | Sep 04 06:01:06 AM UTC 24 |
| Finished | Sep 04 06:01:20 AM UTC 24 |
| Peak memory | 229592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2808229204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 33.usbdev_spurious_pids_ignored.2808229204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_stall_priority_over_nak.3815559372 |
| Short name | T2329 |
| Test name | |
| Test status | |
| Simulation time | 181278975 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 06:01:06 AM UTC 24 |
| Finished | Sep 04 06:01:08 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3815559372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_stall_priority_over_nak.3815559372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_stall_trans.1556018625 |
| Short name | T2330 |
| Test name | |
| Test status | |
| Simulation time | 170372169 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 06:01:06 AM UTC 24 |
| Finished | Sep 04 06:01:09 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1556018625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_stall_trans.1556018625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_stream_len_max.2475647720 |
| Short name | T2333 |
| Test name | |
| Test status | |
| Simulation time | 407080825 ps |
| CPU time | 2.04 seconds |
| Started | Sep 04 06:01:06 AM UTC 24 |
| Finished | Sep 04 06:01:09 AM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2475647720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_stream_len_max.2475647720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_streaming_out.689458431 |
| Short name | T2562 |
| Test name | |
| Test status | |
| Simulation time | 3472614268 ps |
| CPU time | 110.15 seconds |
| Started | Sep 04 06:01:06 AM UTC 24 |
| Finished | Sep 04 06:02:58 AM UTC 24 |
| Peak memory | 227408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=689458431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_streaming_out.689458431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_timeout_missing_host_handshake.3017098080 |
| Short name | T2343 |
| Test name | |
| Test status | |
| Simulation time | 1015147512 ps |
| CPU time | 26.98 seconds |
| Started | Sep 04 06:00:47 AM UTC 24 |
| Finished | Sep 04 06:01:16 AM UTC 24 |
| Peak memory | 217152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3017098080 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_timeout_missing_host_handshake.3017098080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/33.usbdev_tx_rx_disruption.2146442155 |
| Short name | T2335 |
| Test name | |
| Test status | |
| Simulation time | 603722552 ps |
| CPU time | 1.97 seconds |
| Started | Sep 04 06:01:07 AM UTC 24 |
| Finished | Sep 04 06:01:10 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2146442155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_t x_rx_disruption.2146442155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/33.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/330.usbdev_tx_rx_disruption.2141105145 |
| Short name | T3601 |
| Test name | |
| Test status | |
| Simulation time | 499875918 ps |
| CPU time | 1.31 seconds |
| Started | Sep 04 06:09:43 AM UTC 24 |
| Finished | Sep 04 06:09:49 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2141105145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 330.usbdev_ tx_rx_disruption.2141105145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/330.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/331.usbdev_tx_rx_disruption.3152432634 |
| Short name | T3618 |
| Test name | |
| Test status | |
| Simulation time | 514904875 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 06:09:45 AM UTC 24 |
| Finished | Sep 04 06:09:51 AM UTC 24 |
| Peak memory | 215008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3152432634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 331.usbdev_ tx_rx_disruption.3152432634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/331.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/332.usbdev_tx_rx_disruption.176919920 |
| Short name | T3616 |
| Test name | |
| Test status | |
| Simulation time | 464844779 ps |
| CPU time | 1.37 seconds |
| Started | Sep 04 06:09:45 AM UTC 24 |
| Finished | Sep 04 06:09:51 AM UTC 24 |
| Peak memory | 214856 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=176919920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 332.usbdev_t x_rx_disruption.176919920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/332.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/333.usbdev_tx_rx_disruption.1924786898 |
| Short name | T3615 |
| Test name | |
| Test status | |
| Simulation time | 448193522 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 06:09:45 AM UTC 24 |
| Finished | Sep 04 06:09:51 AM UTC 24 |
| Peak memory | 215028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1924786898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 333.usbdev_ tx_rx_disruption.1924786898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/333.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/334.usbdev_tx_rx_disruption.3735817685 |
| Short name | T3619 |
| Test name | |
| Test status | |
| Simulation time | 575381666 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 06:09:45 AM UTC 24 |
| Finished | Sep 04 06:09:51 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3735817685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 334.usbdev_ tx_rx_disruption.3735817685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/334.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/335.usbdev_tx_rx_disruption.3520277342 |
| Short name | T3617 |
| Test name | |
| Test status | |
| Simulation time | 510378051 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 06:09:45 AM UTC 24 |
| Finished | Sep 04 06:09:51 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3520277342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 335.usbdev_ tx_rx_disruption.3520277342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/335.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/336.usbdev_tx_rx_disruption.2298745597 |
| Short name | T3620 |
| Test name | |
| Test status | |
| Simulation time | 517016776 ps |
| CPU time | 1.6 seconds |
| Started | Sep 04 06:09:45 AM UTC 24 |
| Finished | Sep 04 06:09:51 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2298745597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 336.usbdev_ tx_rx_disruption.2298745597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/336.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/337.usbdev_tx_rx_disruption.3460630054 |
| Short name | T3599 |
| Test name | |
| Test status | |
| Simulation time | 572623826 ps |
| CPU time | 1.63 seconds |
| Started | Sep 04 06:09:45 AM UTC 24 |
| Finished | Sep 04 06:09:49 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3460630054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 337.usbdev_ tx_rx_disruption.3460630054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/337.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/338.usbdev_tx_rx_disruption.723050825 |
| Short name | T3600 |
| Test name | |
| Test status | |
| Simulation time | 622350438 ps |
| CPU time | 1.66 seconds |
| Started | Sep 04 06:09:45 AM UTC 24 |
| Finished | Sep 04 06:09:49 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=723050825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 338.usbdev_t x_rx_disruption.723050825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/338.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/339.usbdev_tx_rx_disruption.3484917755 |
| Short name | T3598 |
| Test name | |
| Test status | |
| Simulation time | 523603785 ps |
| CPU time | 1.36 seconds |
| Started | Sep 04 06:09:45 AM UTC 24 |
| Finished | Sep 04 06:09:48 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3484917755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 339.usbdev_ tx_rx_disruption.3484917755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/339.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_alert_test.1738470851 |
| Short name | T2389 |
| Test name | |
| Test status | |
| Simulation time | 71735655 ps |
| CPU time | 1.05 seconds |
| Started | Sep 04 06:01:37 AM UTC 24 |
| Finished | Sep 04 06:01:39 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1738470851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 34.usbdev_alert_test.1738470851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_disconnect.4076768941 |
| Short name | T2354 |
| Test name | |
| Test status | |
| Simulation time | 4985615911 ps |
| CPU time | 10.65 seconds |
| Started | Sep 04 06:01:09 AM UTC 24 |
| Finished | Sep 04 06:01:21 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4076768941 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_disconnect.4076768941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_reset.1661692702 |
| Short name | T2399 |
| Test name | |
| Test status | |
| Simulation time | 15899740423 ps |
| CPU time | 34.97 seconds |
| Started | Sep 04 06:01:09 AM UTC 24 |
| Finished | Sep 04 06:01:45 AM UTC 24 |
| Peak memory | 227592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1661692702 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_reset.1661692702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_resume.11258988 |
| Short name | T2434 |
| Test name | |
| Test status | |
| Simulation time | 31227490311 ps |
| CPU time | 54.42 seconds |
| Started | Sep 04 06:01:09 AM UTC 24 |
| Finished | Sep 04 06:02:05 AM UTC 24 |
| Peak memory | 217436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=11258988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_resume.11258988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_av_buffer.3850270930 |
| Short name | T2337 |
| Test name | |
| Test status | |
| Simulation time | 180212367 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 06:01:09 AM UTC 24 |
| Finished | Sep 04 06:01:12 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3850270930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_av_buffer.3850270930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_bitstuff_err.498435254 |
| Short name | T2336 |
| Test name | |
| Test status | |
| Simulation time | 161004262 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 06:01:09 AM UTC 24 |
| Finished | Sep 04 06:01:12 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=498435254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_bitstuff_err.498435254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_data_toggle_clear.1238723876 |
| Short name | T2339 |
| Test name | |
| Test status | |
| Simulation time | 265168576 ps |
| CPU time | 1.76 seconds |
| Started | Sep 04 06:01:10 AM UTC 24 |
| Finished | Sep 04 06:01:13 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1238723876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 34.usbdev_data_toggle_clear.1238723876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_data_toggle_restore.919936125 |
| Short name | T2340 |
| Test name | |
| Test status | |
| Simulation time | 635082378 ps |
| CPU time | 2.23 seconds |
| Started | Sep 04 06:01:10 AM UTC 24 |
| Finished | Sep 04 06:01:14 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=919936125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_data_toggle_restore.919936125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_device_address.1802059995 |
| Short name | T2506 |
| Test name | |
| Test status | |
| Simulation time | 39572080410 ps |
| CPU time | 86.64 seconds |
| Started | Sep 04 06:01:11 AM UTC 24 |
| Finished | Sep 04 06:02:39 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1802059995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_device_address.1802059995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_device_timeout.2653721731 |
| Short name | T2338 |
| Test name | |
| Test status | |
| Simulation time | 144378285 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 06:01:11 AM UTC 24 |
| Finished | Sep 04 06:01:13 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2653721731 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_device_timeout.2653721731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_disable_endpoint.17764429 |
| Short name | T2345 |
| Test name | |
| Test status | |
| Simulation time | 743639262 ps |
| CPU time | 2.93 seconds |
| Started | Sep 04 06:01:13 AM UTC 24 |
| Finished | Sep 04 06:01:17 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=17764429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_disable_endpoint.17764429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_disconnected.1704812961 |
| Short name | T2342 |
| Test name | |
| Test status | |
| Simulation time | 177181542 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 06:01:13 AM UTC 24 |
| Finished | Sep 04 06:01:15 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1704812961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_disconnected.1704812961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_enable.1267834921 |
| Short name | T2344 |
| Test name | |
| Test status | |
| Simulation time | 33376646 ps |
| CPU time | 1.07 seconds |
| Started | Sep 04 06:01:14 AM UTC 24 |
| Finished | Sep 04 06:01:16 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1267834921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 34.usbdev_enable.1267834921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_endpoint_access.1254638450 |
| Short name | T2346 |
| Test name | |
| Test status | |
| Simulation time | 1033235118 ps |
| CPU time | 2.76 seconds |
| Started | Sep 04 06:01:14 AM UTC 24 |
| Finished | Sep 04 06:01:18 AM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1254638450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_endpoint_access.1254638450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_endpoint_types.2502601727 |
| Short name | T369 |
| Test name | |
| Test status | |
| Simulation time | 255162145 ps |
| CPU time | 1.8 seconds |
| Started | Sep 04 06:01:14 AM UTC 24 |
| Finished | Sep 04 06:01:17 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2502601727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_endpoint_types.2502601727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_fifo_levels.3154046913 |
| Short name | T2348 |
| Test name | |
| Test status | |
| Simulation time | 244474995 ps |
| CPU time | 1.82 seconds |
| Started | Sep 04 06:01:15 AM UTC 24 |
| Finished | Sep 04 06:01:18 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3154046913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_fifo_levels.3154046913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_fifo_rst.3585193970 |
| Short name | T2351 |
| Test name | |
| Test status | |
| Simulation time | 387257890 ps |
| CPU time | 2.57 seconds |
| Started | Sep 04 06:01:17 AM UTC 24 |
| Finished | Sep 04 06:01:20 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3585193970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_fifo_rst.3585193970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_in_iso.3118482887 |
| Short name | T2355 |
| Test name | |
| Test status | |
| Simulation time | 225086438 ps |
| CPU time | 1.9 seconds |
| Started | Sep 04 06:01:18 AM UTC 24 |
| Finished | Sep 04 06:01:21 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3118482887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 34.usbdev_in_iso.3118482887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_in_stall.2701816418 |
| Short name | T2352 |
| Test name | |
| Test status | |
| Simulation time | 135835105 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 06:01:18 AM UTC 24 |
| Finished | Sep 04 06:01:20 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2701816418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_in_stall.2701816418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_in_trans.1226688056 |
| Short name | T2353 |
| Test name | |
| Test status | |
| Simulation time | 208220306 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 06:01:18 AM UTC 24 |
| Finished | Sep 04 06:01:20 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1226688056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_in_trans.1226688056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_invalid_sync.1365557667 |
| Short name | T2538 |
| Test name | |
| Test status | |
| Simulation time | 3301669832 ps |
| CPU time | 93.2 seconds |
| Started | Sep 04 06:01:17 AM UTC 24 |
| Finished | Sep 04 06:02:52 AM UTC 24 |
| Peak memory | 234360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1365557667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 34.usbdev_invalid_sync.1365557667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_iso_retraction.3824468348 |
| Short name | T2621 |
| Test name | |
| Test status | |
| Simulation time | 9934354770 ps |
| CPU time | 121.58 seconds |
| Started | Sep 04 06:01:19 AM UTC 24 |
| Finished | Sep 04 06:03:23 AM UTC 24 |
| Peak memory | 217392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3824468348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_iso_retraction.3824468348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_link_in_err.1868573368 |
| Short name | T2357 |
| Test name | |
| Test status | |
| Simulation time | 254997727 ps |
| CPU time | 1.28 seconds |
| Started | Sep 04 06:01:19 AM UTC 24 |
| Finished | Sep 04 06:01:21 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1868573368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_link_in_err.1868573368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_link_resume.247154204 |
| Short name | T2450 |
| Test name | |
| Test status | |
| Simulation time | 22746172272 ps |
| CPU time | 47.82 seconds |
| Started | Sep 04 06:01:21 AM UTC 24 |
| Finished | Sep 04 06:02:10 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=247154204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_link_resume.247154204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_link_suspend.4248551496 |
| Short name | T2393 |
| Test name | |
| Test status | |
| Simulation time | 9204478608 ps |
| CPU time | 19.6 seconds |
| Started | Sep 04 06:01:21 AM UTC 24 |
| Finished | Sep 04 06:01:42 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4248551496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_link_suspend.4248551496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_low_speed_traffic.2054323112 |
| Short name | T2587 |
| Test name | |
| Test status | |
| Simulation time | 4150779166 ps |
| CPU time | 106.42 seconds |
| Started | Sep 04 06:01:21 AM UTC 24 |
| Finished | Sep 04 06:03:09 AM UTC 24 |
| Peak memory | 234208 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2054323112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_low_speed_traffic.2054323112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_max_inter_pkt_delay.1763452703 |
| Short name | T2550 |
| Test name | |
| Test status | |
| Simulation time | 3410790636 ps |
| CPU time | 92 seconds |
| Started | Sep 04 06:01:21 AM UTC 24 |
| Finished | Sep 04 06:02:55 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1763452703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_max_inter_pkt_delay.1763452703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_max_length_in_transaction.640872340 |
| Short name | T2360 |
| Test name | |
| Test status | |
| Simulation time | 247587199 ps |
| CPU time | 1.66 seconds |
| Started | Sep 04 06:01:21 AM UTC 24 |
| Finished | Sep 04 06:01:24 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=640872340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 34.usbdev_max_length_in_transaction.640872340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_max_length_out_transaction.3259701423 |
| Short name | T2361 |
| Test name | |
| Test status | |
| Simulation time | 199760266 ps |
| CPU time | 1.01 seconds |
| Started | Sep 04 06:01:22 AM UTC 24 |
| Finished | Sep 04 06:01:24 AM UTC 24 |
| Peak memory | 214972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3259701423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 34.usbdev_max_length_out_transaction.3259701423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_min_inter_pkt_delay.1548759887 |
| Short name | T2507 |
| Test name | |
| Test status | |
| Simulation time | 2517577256 ps |
| CPU time | 75.05 seconds |
| Started | Sep 04 06:01:22 AM UTC 24 |
| Finished | Sep 04 06:02:39 AM UTC 24 |
| Peak memory | 227548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1548759887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_min_inter_pkt_delay.1548759887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_min_length_in_transaction.3219751671 |
| Short name | T2363 |
| Test name | |
| Test status | |
| Simulation time | 160320911 ps |
| CPU time | 1.17 seconds |
| Started | Sep 04 06:01:22 AM UTC 24 |
| Finished | Sep 04 06:01:24 AM UTC 24 |
| Peak memory | 214940 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3219751671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 34.usbdev_min_length_in_transaction.3219751671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_min_length_out_transaction.2594552004 |
| Short name | T2364 |
| Test name | |
| Test status | |
| Simulation time | 140707445 ps |
| CPU time | 1.32 seconds |
| Started | Sep 04 06:01:22 AM UTC 24 |
| Finished | Sep 04 06:01:25 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2594552004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 34.usbdev_min_length_out_transaction.2594552004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_nak_trans.2783519017 |
| Short name | T2366 |
| Test name | |
| Test status | |
| Simulation time | 234055865 ps |
| CPU time | 1.79 seconds |
| Started | Sep 04 06:01:24 AM UTC 24 |
| Finished | Sep 04 06:01:26 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2783519017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_nak_trans.2783519017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_out_iso.3906855262 |
| Short name | T2365 |
| Test name | |
| Test status | |
| Simulation time | 200391461 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 06:01:24 AM UTC 24 |
| Finished | Sep 04 06:01:26 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3906855262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 34.usbdev_out_iso.3906855262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_out_stall.2211078319 |
| Short name | T2332 |
| Test name | |
| Test status | |
| Simulation time | 232479958 ps |
| CPU time | 1.6 seconds |
| Started | Sep 04 06:01:25 AM UTC 24 |
| Finished | Sep 04 06:01:28 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2211078319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_out_stall.2211078319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_out_trans_nak.305858358 |
| Short name | T2369 |
| Test name | |
| Test status | |
| Simulation time | 192749709 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 06:01:25 AM UTC 24 |
| Finished | Sep 04 06:01:27 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=305858358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_out_trans_nak.305858358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_pending_in_trans.1790791341 |
| Short name | T2371 |
| Test name | |
| Test status | |
| Simulation time | 220086834 ps |
| CPU time | 1.65 seconds |
| Started | Sep 04 06:01:25 AM UTC 24 |
| Finished | Sep 04 06:01:28 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1790791341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 34.usbdev_pending_in_trans.1790791341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_phy_config_pinflip.2244505788 |
| Short name | T2372 |
| Test name | |
| Test status | |
| Simulation time | 270637073 ps |
| CPU time | 1.84 seconds |
| Started | Sep 04 06:01:25 AM UTC 24 |
| Finished | Sep 04 06:01:28 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2244505788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 34.usbdev_phy_config_pinflip.2244505788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_phy_config_usb_ref_disable.3963354137 |
| Short name | T2370 |
| Test name | |
| Test status | |
| Simulation time | 155556298 ps |
| CPU time | 1.23 seconds |
| Started | Sep 04 06:01:25 AM UTC 24 |
| Finished | Sep 04 06:01:27 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3963354137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 34.usbdev_phy_config_usb_ref_disable.3963354137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_phy_pins_sense.580963619 |
| Short name | T2373 |
| Test name | |
| Test status | |
| Simulation time | 34331681 ps |
| CPU time | 1.06 seconds |
| Started | Sep 04 06:01:29 AM UTC 24 |
| Finished | Sep 04 06:01:31 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=580963619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 34.usbdev_phy_pins_sense.580963619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_buffer.1016413616 |
| Short name | T2438 |
| Test name | |
| Test status | |
| Simulation time | 8611188021 ps |
| CPU time | 36.09 seconds |
| Started | Sep 04 06:01:29 AM UTC 24 |
| Finished | Sep 04 06:02:07 AM UTC 24 |
| Peak memory | 227552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1016413616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_pkt_buffer.1016413616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_received.441720414 |
| Short name | T2375 |
| Test name | |
| Test status | |
| Simulation time | 177415900 ps |
| CPU time | 1.55 seconds |
| Started | Sep 04 06:01:29 AM UTC 24 |
| Finished | Sep 04 06:01:32 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=441720414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_pkt_received.441720414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_sent.4228831944 |
| Short name | T2379 |
| Test name | |
| Test status | |
| Simulation time | 289051395 ps |
| CPU time | 1.88 seconds |
| Started | Sep 04 06:01:29 AM UTC 24 |
| Finished | Sep 04 06:01:32 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4228831944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_pkt_sent.4228831944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_random_length_in_transaction.2661874826 |
| Short name | T2376 |
| Test name | |
| Test status | |
| Simulation time | 181390131 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 06:01:29 AM UTC 24 |
| Finished | Sep 04 06:01:32 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2661874826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 34.usbdev_random_length_in_transaction.2661874826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_random_length_out_transaction.440610317 |
| Short name | T2374 |
| Test name | |
| Test status | |
| Simulation time | 192893900 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 06:01:29 AM UTC 24 |
| Finished | Sep 04 06:01:32 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=440610317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 34.usbdev_random_length_out_transaction.440610317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_rx_crc_err.1586085508 |
| Short name | T2377 |
| Test name | |
| Test status | |
| Simulation time | 194246009 ps |
| CPU time | 1.55 seconds |
| Started | Sep 04 06:01:29 AM UTC 24 |
| Finished | Sep 04 06:01:32 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1586085508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_rx_crc_err.1586085508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_rx_full.3241287700 |
| Short name | T2380 |
| Test name | |
| Test status | |
| Simulation time | 314640580 ps |
| CPU time | 2.05 seconds |
| Started | Sep 04 06:01:29 AM UTC 24 |
| Finished | Sep 04 06:01:32 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3241287700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 34.usbdev_rx_full.3241287700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_setup_stage.832885859 |
| Short name | T2378 |
| Test name | |
| Test status | |
| Simulation time | 161222953 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 06:01:29 AM UTC 24 |
| Finished | Sep 04 06:01:32 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=832885859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_setup_stage.832885859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_setup_trans_ignored.854880924 |
| Short name | T2382 |
| Test name | |
| Test status | |
| Simulation time | 154297763 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 06:01:33 AM UTC 24 |
| Finished | Sep 04 06:01:35 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=854880924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 34.usbdev_setup_trans_ignored.854880924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_smoke.519188540 |
| Short name | T2384 |
| Test name | |
| Test status | |
| Simulation time | 218421561 ps |
| CPU time | 1.61 seconds |
| Started | Sep 04 06:01:33 AM UTC 24 |
| Finished | Sep 04 06:01:36 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=519188540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_smoke.519188540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_spurious_pids_ignored.1698976374 |
| Short name | T2427 |
| Test name | |
| Test status | |
| Simulation time | 3193438869 ps |
| CPU time | 28.11 seconds |
| Started | Sep 04 06:01:33 AM UTC 24 |
| Finished | Sep 04 06:02:02 AM UTC 24 |
| Peak memory | 227672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1698976374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 34.usbdev_spurious_pids_ignored.1698976374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_stall_priority_over_nak.1467135970 |
| Short name | T2385 |
| Test name | |
| Test status | |
| Simulation time | 171852167 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 06:01:33 AM UTC 24 |
| Finished | Sep 04 06:01:36 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1467135970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_stall_priority_over_nak.1467135970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_stall_trans.1849802611 |
| Short name | T2383 |
| Test name | |
| Test status | |
| Simulation time | 165018617 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 06:01:33 AM UTC 24 |
| Finished | Sep 04 06:01:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1849802611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_stall_trans.1849802611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_stream_len_max.73256694 |
| Short name | T2386 |
| Test name | |
| Test status | |
| Simulation time | 428595905 ps |
| CPU time | 2.35 seconds |
| Started | Sep 04 06:01:33 AM UTC 24 |
| Finished | Sep 04 06:01:37 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=73256694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_stream_len_max.73256694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_streaming_out.1021199752 |
| Short name | T2426 |
| Test name | |
| Test status | |
| Simulation time | 2467563941 ps |
| CPU time | 27.49 seconds |
| Started | Sep 04 06:01:33 AM UTC 24 |
| Finished | Sep 04 06:02:02 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1021199752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_streaming_out.1021199752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_timeout_missing_host_handshake.1938334708 |
| Short name | T2416 |
| Test name | |
| Test status | |
| Simulation time | 1943769776 ps |
| CPU time | 45.03 seconds |
| Started | Sep 04 06:01:12 AM UTC 24 |
| Finished | Sep 04 06:01:58 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1938334708 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_timeout_missing_host_handshake.1938334708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/34.usbdev_tx_rx_disruption.3541238942 |
| Short name | T2388 |
| Test name | |
| Test status | |
| Simulation time | 558572044 ps |
| CPU time | 2.94 seconds |
| Started | Sep 04 06:01:34 AM UTC 24 |
| Finished | Sep 04 06:01:38 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3541238942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_t x_rx_disruption.3541238942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/34.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/340.usbdev_tx_rx_disruption.3252121760 |
| Short name | T3537 |
| Test name | |
| Test status | |
| Simulation time | 579731283 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 06:09:45 AM UTC 24 |
| Finished | Sep 04 06:09:49 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3252121760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 340.usbdev_ tx_rx_disruption.3252121760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/340.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/341.usbdev_tx_rx_disruption.764636869 |
| Short name | T3597 |
| Test name | |
| Test status | |
| Simulation time | 422691822 ps |
| CPU time | 1.23 seconds |
| Started | Sep 04 06:09:45 AM UTC 24 |
| Finished | Sep 04 06:09:48 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=764636869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 341.usbdev_t x_rx_disruption.764636869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/341.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/342.usbdev_tx_rx_disruption.386120470 |
| Short name | T3668 |
| Test name | |
| Test status | |
| Simulation time | 662238333 ps |
| CPU time | 1.89 seconds |
| Started | Sep 04 06:09:49 AM UTC 24 |
| Finished | Sep 04 06:09:59 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=386120470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 342.usbdev_t x_rx_disruption.386120470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/342.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/343.usbdev_tx_rx_disruption.3015526858 |
| Short name | T3667 |
| Test name | |
| Test status | |
| Simulation time | 629742294 ps |
| CPU time | 1.75 seconds |
| Started | Sep 04 06:09:49 AM UTC 24 |
| Finished | Sep 04 06:09:59 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3015526858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 343.usbdev_ tx_rx_disruption.3015526858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/343.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/344.usbdev_tx_rx_disruption.924765937 |
| Short name | T3666 |
| Test name | |
| Test status | |
| Simulation time | 579282031 ps |
| CPU time | 1.76 seconds |
| Started | Sep 04 06:09:49 AM UTC 24 |
| Finished | Sep 04 06:09:59 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=924765937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 344.usbdev_t x_rx_disruption.924765937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/344.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/345.usbdev_tx_rx_disruption.4279182577 |
| Short name | T3627 |
| Test name | |
| Test status | |
| Simulation time | 547989715 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 06:09:51 AM UTC 24 |
| Finished | Sep 04 06:09:53 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4279182577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 345.usbdev_ tx_rx_disruption.4279182577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/345.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/346.usbdev_tx_rx_disruption.2649695017 |
| Short name | T3624 |
| Test name | |
| Test status | |
| Simulation time | 455685896 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 06:09:51 AM UTC 24 |
| Finished | Sep 04 06:09:53 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2649695017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 346.usbdev_ tx_rx_disruption.2649695017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/346.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/347.usbdev_tx_rx_disruption.1732674917 |
| Short name | T3631 |
| Test name | |
| Test status | |
| Simulation time | 588720163 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 06:09:51 AM UTC 24 |
| Finished | Sep 04 06:09:54 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1732674917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 347.usbdev_ tx_rx_disruption.1732674917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/347.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/348.usbdev_tx_rx_disruption.1434421210 |
| Short name | T3628 |
| Test name | |
| Test status | |
| Simulation time | 608694185 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 06:09:51 AM UTC 24 |
| Finished | Sep 04 06:09:53 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1434421210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 348.usbdev_ tx_rx_disruption.1434421210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/348.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/349.usbdev_tx_rx_disruption.3891405058 |
| Short name | T3625 |
| Test name | |
| Test status | |
| Simulation time | 445079581 ps |
| CPU time | 1.37 seconds |
| Started | Sep 04 06:09:51 AM UTC 24 |
| Finished | Sep 04 06:09:53 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3891405058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 349.usbdev_ tx_rx_disruption.3891405058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/349.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_alert_test.2017917281 |
| Short name | T2445 |
| Test name | |
| Test status | |
| Simulation time | 98403023 ps |
| CPU time | 1.13 seconds |
| Started | Sep 04 06:02:06 AM UTC 24 |
| Finished | Sep 04 06:02:08 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2017917281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 35.usbdev_alert_test.2017917281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_disconnect.2037170422 |
| Short name | T2422 |
| Test name | |
| Test status | |
| Simulation time | 11237859331 ps |
| CPU time | 23.25 seconds |
| Started | Sep 04 06:01:37 AM UTC 24 |
| Finished | Sep 04 06:02:01 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2037170422 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_disconnect.2037170422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_reset.3039385764 |
| Short name | T2443 |
| Test name | |
| Test status | |
| Simulation time | 19919577408 ps |
| CPU time | 29.12 seconds |
| Started | Sep 04 06:01:37 AM UTC 24 |
| Finished | Sep 04 06:02:07 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3039385764 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_reset.3039385764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_resume.1602426456 |
| Short name | T2458 |
| Test name | |
| Test status | |
| Simulation time | 23764200882 ps |
| CPU time | 36.17 seconds |
| Started | Sep 04 06:01:37 AM UTC 24 |
| Finished | Sep 04 06:02:14 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1602426456 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_resume.1602426456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_av_buffer.2004707296 |
| Short name | T2390 |
| Test name | |
| Test status | |
| Simulation time | 175753913 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 06:01:37 AM UTC 24 |
| Finished | Sep 04 06:01:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2004707296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_av_buffer.2004707296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_bitstuff_err.4114337222 |
| Short name | T2392 |
| Test name | |
| Test status | |
| Simulation time | 147453676 ps |
| CPU time | 1.36 seconds |
| Started | Sep 04 06:01:38 AM UTC 24 |
| Finished | Sep 04 06:01:41 AM UTC 24 |
| Peak memory | 214684 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4114337222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_bitstuff_err.4114337222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_data_toggle_clear.3937951147 |
| Short name | T2394 |
| Test name | |
| Test status | |
| Simulation time | 509490891 ps |
| CPU time | 2.94 seconds |
| Started | Sep 04 06:01:38 AM UTC 24 |
| Finished | Sep 04 06:01:42 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3937951147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 35.usbdev_data_toggle_clear.3937951147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_data_toggle_restore.3232766016 |
| Short name | T2400 |
| Test name | |
| Test status | |
| Simulation time | 967969401 ps |
| CPU time | 5 seconds |
| Started | Sep 04 06:01:40 AM UTC 24 |
| Finished | Sep 04 06:01:45 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3232766016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_data_toggle_restore.3232766016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_device_address.576566540 |
| Short name | T2568 |
| Test name | |
| Test status | |
| Simulation time | 38127872746 ps |
| CPU time | 80.01 seconds |
| Started | Sep 04 06:01:40 AM UTC 24 |
| Finished | Sep 04 06:03:01 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=576566540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 35.usbdev_device_address.576566540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_device_timeout.4122581512 |
| Short name | T2463 |
| Test name | |
| Test status | |
| Simulation time | 4939765589 ps |
| CPU time | 33.8 seconds |
| Started | Sep 04 06:01:41 AM UTC 24 |
| Finished | Sep 04 06:02:16 AM UTC 24 |
| Peak memory | 217420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4122581512 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_device_timeout.4122581512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_disable_endpoint.3966459948 |
| Short name | T2398 |
| Test name | |
| Test status | |
| Simulation time | 382303969 ps |
| CPU time | 2.27 seconds |
| Started | Sep 04 06:01:42 AM UTC 24 |
| Finished | Sep 04 06:01:45 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3966459948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 35.usbdev_disable_endpoint.3966459948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_disconnected.656289754 |
| Short name | T2395 |
| Test name | |
| Test status | |
| Simulation time | 144221619 ps |
| CPU time | 1.31 seconds |
| Started | Sep 04 06:01:42 AM UTC 24 |
| Finished | Sep 04 06:01:44 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=656289754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_disconnected.656289754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_enable.1048699588 |
| Short name | T2397 |
| Test name | |
| Test status | |
| Simulation time | 41526685 ps |
| CPU time | 0.88 seconds |
| Started | Sep 04 06:01:43 AM UTC 24 |
| Finished | Sep 04 06:01:45 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1048699588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 35.usbdev_enable.1048699588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_endpoint_access.1862457193 |
| Short name | T2406 |
| Test name | |
| Test status | |
| Simulation time | 833624543 ps |
| CPU time | 4.2 seconds |
| Started | Sep 04 06:01:46 AM UTC 24 |
| Finished | Sep 04 06:01:51 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1862457193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_endpoint_access.1862457193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_endpoint_types.1563171042 |
| Short name | T382 |
| Test name | |
| Test status | |
| Simulation time | 324034156 ps |
| CPU time | 1.81 seconds |
| Started | Sep 04 06:01:46 AM UTC 24 |
| Finished | Sep 04 06:01:48 AM UTC 24 |
| Peak memory | 214156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1563171042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_endpoint_types.1563171042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_fifo_levels.4138566924 |
| Short name | T520 |
| Test name | |
| Test status | |
| Simulation time | 352442701 ps |
| CPU time | 1.86 seconds |
| Started | Sep 04 06:01:46 AM UTC 24 |
| Finished | Sep 04 06:01:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4138566924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_fifo_levels.4138566924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_fifo_rst.2673800195 |
| Short name | T2408 |
| Test name | |
| Test status | |
| Simulation time | 403448678 ps |
| CPU time | 3.52 seconds |
| Started | Sep 04 06:01:47 AM UTC 24 |
| Finished | Sep 04 06:01:51 AM UTC 24 |
| Peak memory | 217324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2673800195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_fifo_rst.2673800195 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_in_iso.1550267435 |
| Short name | T2405 |
| Test name | |
| Test status | |
| Simulation time | 203519726 ps |
| CPU time | 1.84 seconds |
| Started | Sep 04 06:01:47 AM UTC 24 |
| Finished | Sep 04 06:01:50 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1550267435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 35.usbdev_in_iso.1550267435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_in_stall.3178017895 |
| Short name | T2404 |
| Test name | |
| Test status | |
| Simulation time | 142437444 ps |
| CPU time | 1.3 seconds |
| Started | Sep 04 06:01:47 AM UTC 24 |
| Finished | Sep 04 06:01:49 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3178017895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_in_stall.3178017895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_in_trans.2917875445 |
| Short name | T2407 |
| Test name | |
| Test status | |
| Simulation time | 224780916 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 06:01:49 AM UTC 24 |
| Finished | Sep 04 06:01:51 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2917875445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_in_trans.2917875445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_invalid_sync.1274709560 |
| Short name | T2622 |
| Test name | |
| Test status | |
| Simulation time | 3200469844 ps |
| CPU time | 94.63 seconds |
| Started | Sep 04 06:01:47 AM UTC 24 |
| Finished | Sep 04 06:03:24 AM UTC 24 |
| Peak memory | 234172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1274709560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 35.usbdev_invalid_sync.1274709560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_iso_retraction.4223263716 |
| Short name | T2578 |
| Test name | |
| Test status | |
| Simulation time | 9716430278 ps |
| CPU time | 74.4 seconds |
| Started | Sep 04 06:01:49 AM UTC 24 |
| Finished | Sep 04 06:03:05 AM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4223263716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_iso_retraction.4223263716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_link_in_err.4227336178 |
| Short name | T2409 |
| Test name | |
| Test status | |
| Simulation time | 234084610 ps |
| CPU time | 1.76 seconds |
| Started | Sep 04 06:01:49 AM UTC 24 |
| Finished | Sep 04 06:01:52 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4227336178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_link_in_err.4227336178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_link_resume.1744536649 |
| Short name | T2531 |
| Test name | |
| Test status | |
| Simulation time | 27212706576 ps |
| CPU time | 57.48 seconds |
| Started | Sep 04 06:01:50 AM UTC 24 |
| Finished | Sep 04 06:02:49 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1744536649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_link_resume.1744536649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_link_suspend.1270064339 |
| Short name | T2439 |
| Test name | |
| Test status | |
| Simulation time | 9917392659 ps |
| CPU time | 15.54 seconds |
| Started | Sep 04 06:01:50 AM UTC 24 |
| Finished | Sep 04 06:02:07 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1270064339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_link_suspend.1270064339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_low_speed_traffic.3156433962 |
| Short name | T2597 |
| Test name | |
| Test status | |
| Simulation time | 3373225147 ps |
| CPU time | 80.62 seconds |
| Started | Sep 04 06:01:51 AM UTC 24 |
| Finished | Sep 04 06:03:14 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3156433962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_low_speed_traffic.3156433962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_max_inter_pkt_delay.2881658986 |
| Short name | T2666 |
| Test name | |
| Test status | |
| Simulation time | 3556423779 ps |
| CPU time | 106.04 seconds |
| Started | Sep 04 06:01:51 AM UTC 24 |
| Finished | Sep 04 06:03:39 AM UTC 24 |
| Peak memory | 227696 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2881658986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_max_inter_pkt_delay.2881658986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_max_length_in_transaction.1542619393 |
| Short name | T2411 |
| Test name | |
| Test status | |
| Simulation time | 240771856 ps |
| CPU time | 1.61 seconds |
| Started | Sep 04 06:01:52 AM UTC 24 |
| Finished | Sep 04 06:01:55 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1542619393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 35.usbdev_max_length_in_transaction.1542619393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_max_length_out_transaction.3490384995 |
| Short name | T2412 |
| Test name | |
| Test status | |
| Simulation time | 207502045 ps |
| CPU time | 1.7 seconds |
| Started | Sep 04 06:01:53 AM UTC 24 |
| Finished | Sep 04 06:01:55 AM UTC 24 |
| Peak memory | 214812 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3490384995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 35.usbdev_max_length_out_transaction.3490384995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_min_inter_pkt_delay.5258717 |
| Short name | T2632 |
| Test name | |
| Test status | |
| Simulation time | 3123369177 ps |
| CPU time | 93.25 seconds |
| Started | Sep 04 06:01:53 AM UTC 24 |
| Finished | Sep 04 06:03:28 AM UTC 24 |
| Peak memory | 227576 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=5258717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TES T_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs /coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_min_inter_pkt_delay.5258717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_min_length_in_transaction.1821890500 |
| Short name | T2415 |
| Test name | |
| Test status | |
| Simulation time | 199422950 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 06:01:55 AM UTC 24 |
| Finished | Sep 04 06:01:58 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1821890500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 35.usbdev_min_length_in_transaction.1821890500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_min_length_out_transaction.526846729 |
| Short name | T2414 |
| Test name | |
| Test status | |
| Simulation time | 138248280 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 06:01:55 AM UTC 24 |
| Finished | Sep 04 06:01:58 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=526846729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 35.usbdev_min_length_out_transaction.526846729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_nak_trans.2346265021 |
| Short name | T141 |
| Test name | |
| Test status | |
| Simulation time | 222117094 ps |
| CPU time | 1.72 seconds |
| Started | Sep 04 06:01:56 AM UTC 24 |
| Finished | Sep 04 06:01:59 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2346265021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_nak_trans.2346265021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_out_iso.1964657562 |
| Short name | T2417 |
| Test name | |
| Test status | |
| Simulation time | 172994602 ps |
| CPU time | 1.1 seconds |
| Started | Sep 04 06:01:56 AM UTC 24 |
| Finished | Sep 04 06:01:58 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1964657562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 35.usbdev_out_iso.1964657562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_out_stall.2276064901 |
| Short name | T2420 |
| Test name | |
| Test status | |
| Simulation time | 182660775 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 06:01:58 AM UTC 24 |
| Finished | Sep 04 06:02:00 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2276064901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_out_stall.2276064901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_out_trans_nak.679970377 |
| Short name | T2424 |
| Test name | |
| Test status | |
| Simulation time | 187534024 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 06:01:59 AM UTC 24 |
| Finished | Sep 04 06:02:01 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=679970377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_out_trans_nak.679970377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_pending_in_trans.2099675386 |
| Short name | T2423 |
| Test name | |
| Test status | |
| Simulation time | 154388523 ps |
| CPU time | 1.36 seconds |
| Started | Sep 04 06:01:59 AM UTC 24 |
| Finished | Sep 04 06:02:01 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2099675386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 35.usbdev_pending_in_trans.2099675386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_phy_config_pinflip.2780956685 |
| Short name | T2421 |
| Test name | |
| Test status | |
| Simulation time | 185472898 ps |
| CPU time | 1.06 seconds |
| Started | Sep 04 06:01:59 AM UTC 24 |
| Finished | Sep 04 06:02:01 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2780956685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 35.usbdev_phy_config_pinflip.2780956685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_phy_config_usb_ref_disable.568276836 |
| Short name | T2425 |
| Test name | |
| Test status | |
| Simulation time | 195289602 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 06:01:59 AM UTC 24 |
| Finished | Sep 04 06:02:01 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=568276836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 35.usbdev_phy_config_usb_ref_disable.568276836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_phy_pins_sense.3292749678 |
| Short name | T2428 |
| Test name | |
| Test status | |
| Simulation time | 45155624 ps |
| CPU time | 0.92 seconds |
| Started | Sep 04 06:02:01 AM UTC 24 |
| Finished | Sep 04 06:02:03 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3292749678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_phy_pins_sense.3292749678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_buffer.1818077400 |
| Short name | T2519 |
| Test name | |
| Test status | |
| Simulation time | 15273531816 ps |
| CPU time | 41.32 seconds |
| Started | Sep 04 06:02:01 AM UTC 24 |
| Finished | Sep 04 06:02:44 AM UTC 24 |
| Peak memory | 231784 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1818077400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 35.usbdev_pkt_buffer.1818077400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_received.1208462660 |
| Short name | T2429 |
| Test name | |
| Test status | |
| Simulation time | 192409415 ps |
| CPU time | 1.19 seconds |
| Started | Sep 04 06:02:01 AM UTC 24 |
| Finished | Sep 04 06:02:03 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1208462660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_pkt_received.1208462660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_sent.2764020607 |
| Short name | T2430 |
| Test name | |
| Test status | |
| Simulation time | 199908072 ps |
| CPU time | 1.55 seconds |
| Started | Sep 04 06:02:01 AM UTC 24 |
| Finished | Sep 04 06:02:04 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2764020607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_pkt_sent.2764020607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_random_length_in_transaction.3819439022 |
| Short name | T2433 |
| Test name | |
| Test status | |
| Simulation time | 168317456 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 06:02:02 AM UTC 24 |
| Finished | Sep 04 06:02:05 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3819439022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 35.usbdev_random_length_in_transaction.3819439022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_random_length_out_transaction.3140997575 |
| Short name | T2432 |
| Test name | |
| Test status | |
| Simulation time | 178651709 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 06:02:02 AM UTC 24 |
| Finished | Sep 04 06:02:05 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3140997575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 35.usbdev_random_length_out_transaction.3140997575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_rx_crc_err.529060083 |
| Short name | T2431 |
| Test name | |
| Test status | |
| Simulation time | 151107935 ps |
| CPU time | 1.31 seconds |
| Started | Sep 04 06:02:03 AM UTC 24 |
| Finished | Sep 04 06:02:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=529060083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_rx_crc_err.529060083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_rx_full.3276239649 |
| Short name | T2436 |
| Test name | |
| Test status | |
| Simulation time | 383964339 ps |
| CPU time | 1.87 seconds |
| Started | Sep 04 06:02:03 AM UTC 24 |
| Finished | Sep 04 06:02:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3276239649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 35.usbdev_rx_full.3276239649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_setup_stage.538787154 |
| Short name | T2435 |
| Test name | |
| Test status | |
| Simulation time | 180700747 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 06:02:03 AM UTC 24 |
| Finished | Sep 04 06:02:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=538787154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 35.usbdev_setup_stage.538787154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_setup_trans_ignored.2754000435 |
| Short name | T2437 |
| Test name | |
| Test status | |
| Simulation time | 147598234 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 06:02:04 AM UTC 24 |
| Finished | Sep 04 06:02:07 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2754000435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 35.usbdev_setup_trans_ignored.2754000435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_smoke.3073436375 |
| Short name | T2440 |
| Test name | |
| Test status | |
| Simulation time | 250873312 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 06:02:04 AM UTC 24 |
| Finished | Sep 04 06:02:07 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3073436375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_smoke.3073436375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_spurious_pids_ignored.1450140344 |
| Short name | T2478 |
| Test name | |
| Test status | |
| Simulation time | 2009818477 ps |
| CPU time | 19.24 seconds |
| Started | Sep 04 06:02:04 AM UTC 24 |
| Finished | Sep 04 06:02:25 AM UTC 24 |
| Peak memory | 234116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1450140344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 35.usbdev_spurious_pids_ignored.1450140344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_stall_priority_over_nak.2902352130 |
| Short name | T2442 |
| Test name | |
| Test status | |
| Simulation time | 221768001 ps |
| CPU time | 1.57 seconds |
| Started | Sep 04 06:02:04 AM UTC 24 |
| Finished | Sep 04 06:02:07 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2902352130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_stall_priority_over_nak.2902352130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_stall_trans.472084706 |
| Short name | T2441 |
| Test name | |
| Test status | |
| Simulation time | 169637131 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 06:02:04 AM UTC 24 |
| Finished | Sep 04 06:02:07 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=472084706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 35.usbdev_stall_trans.472084706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_stream_len_max.1638957189 |
| Short name | T2454 |
| Test name | |
| Test status | |
| Simulation time | 1131185070 ps |
| CPU time | 5.08 seconds |
| Started | Sep 04 06:02:06 AM UTC 24 |
| Finished | Sep 04 06:02:12 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1638957189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_stream_len_max.1638957189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_streaming_out.3067280444 |
| Short name | T2482 |
| Test name | |
| Test status | |
| Simulation time | 2375774543 ps |
| CPU time | 18.34 seconds |
| Started | Sep 04 06:02:06 AM UTC 24 |
| Finished | Sep 04 06:02:25 AM UTC 24 |
| Peak memory | 233956 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3067280444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_streaming_out.3067280444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_timeout_missing_host_handshake.3756332355 |
| Short name | T2457 |
| Test name | |
| Test status | |
| Simulation time | 3383649411 ps |
| CPU time | 31.62 seconds |
| Started | Sep 04 06:01:41 AM UTC 24 |
| Finished | Sep 04 06:02:14 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3756332355 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_timeout_missing_host_handshake.3756332355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/35.usbdev_tx_rx_disruption.3179193767 |
| Short name | T2447 |
| Test name | |
| Test status | |
| Simulation time | 627808363 ps |
| CPU time | 2.91 seconds |
| Started | Sep 04 06:02:06 AM UTC 24 |
| Finished | Sep 04 06:02:10 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3179193767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_t x_rx_disruption.3179193767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/35.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/350.usbdev_tx_rx_disruption.1074562754 |
| Short name | T3639 |
| Test name | |
| Test status | |
| Simulation time | 512352458 ps |
| CPU time | 1.75 seconds |
| Started | Sep 04 06:09:51 AM UTC 24 |
| Finished | Sep 04 06:09:54 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1074562754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 350.usbdev_ tx_rx_disruption.1074562754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/350.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/351.usbdev_tx_rx_disruption.2099052651 |
| Short name | T3633 |
| Test name | |
| Test status | |
| Simulation time | 581754206 ps |
| CPU time | 1.68 seconds |
| Started | Sep 04 06:09:51 AM UTC 24 |
| Finished | Sep 04 06:09:54 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2099052651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 351.usbdev_ tx_rx_disruption.2099052651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/351.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/352.usbdev_tx_rx_disruption.3350131491 |
| Short name | T3634 |
| Test name | |
| Test status | |
| Simulation time | 607548650 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 06:09:51 AM UTC 24 |
| Finished | Sep 04 06:09:54 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3350131491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 352.usbdev_ tx_rx_disruption.3350131491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/352.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/353.usbdev_tx_rx_disruption.1560756023 |
| Short name | T3630 |
| Test name | |
| Test status | |
| Simulation time | 449004808 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 06:09:51 AM UTC 24 |
| Finished | Sep 04 06:09:53 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1560756023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 353.usbdev_ tx_rx_disruption.1560756023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/353.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/354.usbdev_tx_rx_disruption.2184225443 |
| Short name | T3632 |
| Test name | |
| Test status | |
| Simulation time | 492940961 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 06:09:51 AM UTC 24 |
| Finished | Sep 04 06:09:54 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2184225443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 354.usbdev_ tx_rx_disruption.2184225443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/354.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/355.usbdev_tx_rx_disruption.192171294 |
| Short name | T3636 |
| Test name | |
| Test status | |
| Simulation time | 535677990 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 06:09:51 AM UTC 24 |
| Finished | Sep 04 06:09:54 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=192171294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 355.usbdev_t x_rx_disruption.192171294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/355.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/356.usbdev_tx_rx_disruption.344808187 |
| Short name | T3638 |
| Test name | |
| Test status | |
| Simulation time | 577771175 ps |
| CPU time | 1.6 seconds |
| Started | Sep 04 06:09:51 AM UTC 24 |
| Finished | Sep 04 06:09:54 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=344808187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 356.usbdev_t x_rx_disruption.344808187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/356.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/357.usbdev_tx_rx_disruption.1162032298 |
| Short name | T3640 |
| Test name | |
| Test status | |
| Simulation time | 507354055 ps |
| CPU time | 1.71 seconds |
| Started | Sep 04 06:09:51 AM UTC 24 |
| Finished | Sep 04 06:09:54 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1162032298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 357.usbdev_ tx_rx_disruption.1162032298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/357.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/358.usbdev_tx_rx_disruption.2785470473 |
| Short name | T3635 |
| Test name | |
| Test status | |
| Simulation time | 533436487 ps |
| CPU time | 1.33 seconds |
| Started | Sep 04 06:09:51 AM UTC 24 |
| Finished | Sep 04 06:09:54 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2785470473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 358.usbdev_ tx_rx_disruption.2785470473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/358.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/359.usbdev_tx_rx_disruption.3090335624 |
| Short name | T3641 |
| Test name | |
| Test status | |
| Simulation time | 489914807 ps |
| CPU time | 1.63 seconds |
| Started | Sep 04 06:09:51 AM UTC 24 |
| Finished | Sep 04 06:09:54 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3090335624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 359.usbdev_ tx_rx_disruption.3090335624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/359.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_alert_test.1566790567 |
| Short name | T2498 |
| Test name | |
| Test status | |
| Simulation time | 28768908 ps |
| CPU time | 1.01 seconds |
| Started | Sep 04 06:02:31 AM UTC 24 |
| Finished | Sep 04 06:02:33 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1566790567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 36.usbdev_alert_test.1566790567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_disconnect.2148812864 |
| Short name | T2486 |
| Test name | |
| Test status | |
| Simulation time | 9792148499 ps |
| CPU time | 19.14 seconds |
| Started | Sep 04 06:02:07 AM UTC 24 |
| Finished | Sep 04 06:02:28 AM UTC 24 |
| Peak memory | 217376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2148812864 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_disconnect.2148812864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_reset.1916700832 |
| Short name | T2516 |
| Test name | |
| Test status | |
| Simulation time | 16229116285 ps |
| CPU time | 33.84 seconds |
| Started | Sep 04 06:02:07 AM UTC 24 |
| Finished | Sep 04 06:02:43 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1916700832 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_reset.1916700832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_resume.4274743880 |
| Short name | T2534 |
| Test name | |
| Test status | |
| Simulation time | 28473637403 ps |
| CPU time | 41.99 seconds |
| Started | Sep 04 06:02:07 AM UTC 24 |
| Finished | Sep 04 06:02:51 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4274743880 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_resume.4274743880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_av_buffer.4224115435 |
| Short name | T2448 |
| Test name | |
| Test status | |
| Simulation time | 146188015 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 06:02:07 AM UTC 24 |
| Finished | Sep 04 06:02:10 AM UTC 24 |
| Peak memory | 214908 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4224115435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_av_buffer.4224115435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_bitstuff_err.3078060033 |
| Short name | T2449 |
| Test name | |
| Test status | |
| Simulation time | 162330208 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 06:02:08 AM UTC 24 |
| Finished | Sep 04 06:02:10 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3078060033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_bitstuff_err.3078060033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_data_toggle_clear.1032382444 |
| Short name | T2451 |
| Test name | |
| Test status | |
| Simulation time | 356404223 ps |
| CPU time | 2.23 seconds |
| Started | Sep 04 06:02:08 AM UTC 24 |
| Finished | Sep 04 06:02:11 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1032382444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 36.usbdev_data_toggle_clear.1032382444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_data_toggle_restore.1422351369 |
| Short name | T2452 |
| Test name | |
| Test status | |
| Simulation time | 447514933 ps |
| CPU time | 2.53 seconds |
| Started | Sep 04 06:02:08 AM UTC 24 |
| Finished | Sep 04 06:02:11 AM UTC 24 |
| Peak memory | 217088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1422351369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_data_toggle_restore.1422351369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_device_address.5971429 |
| Short name | T2510 |
| Test name | |
| Test status | |
| Simulation time | 13943020610 ps |
| CPU time | 29.94 seconds |
| Started | Sep 04 06:02:09 AM UTC 24 |
| Finished | Sep 04 06:02:40 AM UTC 24 |
| Peak memory | 217424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=5971429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_device_address.5971429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_device_timeout.2758921167 |
| Short name | T2517 |
| Test name | |
| Test status | |
| Simulation time | 3891120861 ps |
| CPU time | 32.72 seconds |
| Started | Sep 04 06:02:09 AM UTC 24 |
| Finished | Sep 04 06:02:43 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2758921167 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_device_timeout.2758921167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_disable_endpoint.4061820318 |
| Short name | T2459 |
| Test name | |
| Test status | |
| Simulation time | 901508131 ps |
| CPU time | 4 seconds |
| Started | Sep 04 06:02:10 AM UTC 24 |
| Finished | Sep 04 06:02:15 AM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4061820318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 36.usbdev_disable_endpoint.4061820318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_disconnected.864615004 |
| Short name | T2456 |
| Test name | |
| Test status | |
| Simulation time | 136004785 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 06:02:10 AM UTC 24 |
| Finished | Sep 04 06:02:13 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=864615004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_disconnected.864615004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_enable.3324450497 |
| Short name | T2455 |
| Test name | |
| Test status | |
| Simulation time | 55069717 ps |
| CPU time | 1.06 seconds |
| Started | Sep 04 06:02:10 AM UTC 24 |
| Finished | Sep 04 06:02:12 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3324450497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 36.usbdev_enable.3324450497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_endpoint_access.3706705166 |
| Short name | T2460 |
| Test name | |
| Test status | |
| Simulation time | 801477291 ps |
| CPU time | 3.07 seconds |
| Started | Sep 04 06:02:12 AM UTC 24 |
| Finished | Sep 04 06:02:16 AM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3706705166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_endpoint_access.3706705166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_endpoint_types.2669071701 |
| Short name | T296 |
| Test name | |
| Test status | |
| Simulation time | 333636091 ps |
| CPU time | 1.68 seconds |
| Started | Sep 04 06:02:12 AM UTC 24 |
| Finished | Sep 04 06:02:14 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2669071701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_endpoint_types.2669071701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_fifo_levels.347320989 |
| Short name | T497 |
| Test name | |
| Test status | |
| Simulation time | 260351480 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 06:02:12 AM UTC 24 |
| Finished | Sep 04 06:02:14 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=347320989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_fifo_levels.347320989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_fifo_rst.2409306917 |
| Short name | T2468 |
| Test name | |
| Test status | |
| Simulation time | 196780363 ps |
| CPU time | 3.79 seconds |
| Started | Sep 04 06:02:13 AM UTC 24 |
| Finished | Sep 04 06:02:18 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2409306917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_fifo_rst.2409306917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_in_iso.2638058808 |
| Short name | T2462 |
| Test name | |
| Test status | |
| Simulation time | 238900754 ps |
| CPU time | 1.66 seconds |
| Started | Sep 04 06:02:13 AM UTC 24 |
| Finished | Sep 04 06:02:16 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2638058808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 36.usbdev_in_iso.2638058808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_in_stall.1308210649 |
| Short name | T2461 |
| Test name | |
| Test status | |
| Simulation time | 141746088 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 06:02:13 AM UTC 24 |
| Finished | Sep 04 06:02:16 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1308210649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_in_stall.1308210649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_in_trans.4151252950 |
| Short name | T2465 |
| Test name | |
| Test status | |
| Simulation time | 248685070 ps |
| CPU time | 1.62 seconds |
| Started | Sep 04 06:02:14 AM UTC 24 |
| Finished | Sep 04 06:02:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4151252950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_in_trans.4151252950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_invalid_sync.2733812775 |
| Short name | T2566 |
| Test name | |
| Test status | |
| Simulation time | 5067051125 ps |
| CPU time | 46.07 seconds |
| Started | Sep 04 06:02:13 AM UTC 24 |
| Finished | Sep 04 06:03:01 AM UTC 24 |
| Peak memory | 234248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2733812775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 36.usbdev_invalid_sync.2733812775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_iso_retraction.4097571404 |
| Short name | T2583 |
| Test name | |
| Test status | |
| Simulation time | 6869685635 ps |
| CPU time | 50.44 seconds |
| Started | Sep 04 06:02:16 AM UTC 24 |
| Finished | Sep 04 06:03:08 AM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4097571404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_iso_retraction.4097571404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_link_in_err.809835603 |
| Short name | T2467 |
| Test name | |
| Test status | |
| Simulation time | 247139221 ps |
| CPU time | 1.26 seconds |
| Started | Sep 04 06:02:16 AM UTC 24 |
| Finished | Sep 04 06:02:18 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=809835603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_link_in_err.809835603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_link_resume.3992009341 |
| Short name | T2503 |
| Test name | |
| Test status | |
| Simulation time | 12880991215 ps |
| CPU time | 20.48 seconds |
| Started | Sep 04 06:02:16 AM UTC 24 |
| Finished | Sep 04 06:02:37 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3992009341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_link_resume.3992009341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_link_suspend.3607191398 |
| Short name | T2488 |
| Test name | |
| Test status | |
| Simulation time | 4902704663 ps |
| CPU time | 10.44 seconds |
| Started | Sep 04 06:02:17 AM UTC 24 |
| Finished | Sep 04 06:02:29 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3607191398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_link_suspend.3607191398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_low_speed_traffic.788191385 |
| Short name | T2523 |
| Test name | |
| Test status | |
| Simulation time | 3953755351 ps |
| CPU time | 28.75 seconds |
| Started | Sep 04 06:02:17 AM UTC 24 |
| Finished | Sep 04 06:02:47 AM UTC 24 |
| Peak memory | 234184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=788191385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_low_speed_traffic.788191385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_max_inter_pkt_delay.3533788943 |
| Short name | T2522 |
| Test name | |
| Test status | |
| Simulation time | 3412601886 ps |
| CPU time | 27.47 seconds |
| Started | Sep 04 06:02:17 AM UTC 24 |
| Finished | Sep 04 06:02:46 AM UTC 24 |
| Peak memory | 227660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3533788943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_max_inter_pkt_delay.3533788943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_max_length_in_transaction.476277298 |
| Short name | T2470 |
| Test name | |
| Test status | |
| Simulation time | 261919725 ps |
| CPU time | 1.84 seconds |
| Started | Sep 04 06:02:17 AM UTC 24 |
| Finished | Sep 04 06:02:20 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=476277298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 36.usbdev_max_length_in_transaction.476277298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_max_length_out_transaction.3520937359 |
| Short name | T2469 |
| Test name | |
| Test status | |
| Simulation time | 252669483 ps |
| CPU time | 1.68 seconds |
| Started | Sep 04 06:02:17 AM UTC 24 |
| Finished | Sep 04 06:02:20 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3520937359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 36.usbdev_max_length_out_transaction.3520937359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_min_inter_pkt_delay.2319398639 |
| Short name | T2514 |
| Test name | |
| Test status | |
| Simulation time | 3008151226 ps |
| CPU time | 20.93 seconds |
| Started | Sep 04 06:02:19 AM UTC 24 |
| Finished | Sep 04 06:02:41 AM UTC 24 |
| Peak memory | 229712 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2319398639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_min_inter_pkt_delay.2319398639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_min_length_in_transaction.3581958855 |
| Short name | T2472 |
| Test name | |
| Test status | |
| Simulation time | 174535481 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 06:02:19 AM UTC 24 |
| Finished | Sep 04 06:02:21 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3581958855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 36.usbdev_min_length_in_transaction.3581958855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_min_length_out_transaction.3562745255 |
| Short name | T2471 |
| Test name | |
| Test status | |
| Simulation time | 145620596 ps |
| CPU time | 0.97 seconds |
| Started | Sep 04 06:02:19 AM UTC 24 |
| Finished | Sep 04 06:02:21 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3562745255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 36.usbdev_min_length_out_transaction.3562745255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_out_iso.754130281 |
| Short name | T2473 |
| Test name | |
| Test status | |
| Simulation time | 221950060 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 06:02:19 AM UTC 24 |
| Finished | Sep 04 06:02:22 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=754130281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 36.usbdev_out_iso.754130281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_out_stall.3766216696 |
| Short name | T2476 |
| Test name | |
| Test status | |
| Simulation time | 166595419 ps |
| CPU time | 1.29 seconds |
| Started | Sep 04 06:02:21 AM UTC 24 |
| Finished | Sep 04 06:02:23 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3766216696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_out_stall.3766216696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_out_trans_nak.3799062811 |
| Short name | T2477 |
| Test name | |
| Test status | |
| Simulation time | 169446302 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 06:02:21 AM UTC 24 |
| Finished | Sep 04 06:02:24 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3799062811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 36.usbdev_out_trans_nak.3799062811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_pending_in_trans.324918315 |
| Short name | T2475 |
| Test name | |
| Test status | |
| Simulation time | 150294923 ps |
| CPU time | 1.27 seconds |
| Started | Sep 04 06:02:21 AM UTC 24 |
| Finished | Sep 04 06:02:23 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=324918315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_pending_in_trans.324918315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_phy_config_pinflip.2987985457 |
| Short name | T2481 |
| Test name | |
| Test status | |
| Simulation time | 192719315 ps |
| CPU time | 1.57 seconds |
| Started | Sep 04 06:02:23 AM UTC 24 |
| Finished | Sep 04 06:02:25 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2987985457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 36.usbdev_phy_config_pinflip.2987985457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_phy_config_usb_ref_disable.616201123 |
| Short name | T2479 |
| Test name | |
| Test status | |
| Simulation time | 151390592 ps |
| CPU time | 0.99 seconds |
| Started | Sep 04 06:02:23 AM UTC 24 |
| Finished | Sep 04 06:02:25 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=616201123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 36.usbdev_phy_config_usb_ref_disable.616201123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_phy_pins_sense.3086576920 |
| Short name | T2480 |
| Test name | |
| Test status | |
| Simulation time | 83650874 ps |
| CPU time | 1.22 seconds |
| Started | Sep 04 06:02:23 AM UTC 24 |
| Finished | Sep 04 06:02:25 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3086576920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_phy_pins_sense.3086576920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_buffer.3282752236 |
| Short name | T2560 |
| Test name | |
| Test status | |
| Simulation time | 10130500188 ps |
| CPU time | 31.41 seconds |
| Started | Sep 04 06:02:25 AM UTC 24 |
| Finished | Sep 04 06:02:58 AM UTC 24 |
| Peak memory | 231696 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3282752236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_pkt_buffer.3282752236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_received.2009537506 |
| Short name | T2483 |
| Test name | |
| Test status | |
| Simulation time | 171843073 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 06:02:25 AM UTC 24 |
| Finished | Sep 04 06:02:27 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2009537506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_pkt_received.2009537506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_sent.1913826304 |
| Short name | T2484 |
| Test name | |
| Test status | |
| Simulation time | 212297502 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 06:02:25 AM UTC 24 |
| Finished | Sep 04 06:02:28 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1913826304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_pkt_sent.1913826304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_random_length_in_transaction.857793340 |
| Short name | T2485 |
| Test name | |
| Test status | |
| Simulation time | 223668701 ps |
| CPU time | 1.57 seconds |
| Started | Sep 04 06:02:25 AM UTC 24 |
| Finished | Sep 04 06:02:28 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=857793340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_random_length_in_transaction.857793340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_random_length_out_transaction.332281779 |
| Short name | T2492 |
| Test name | |
| Test status | |
| Simulation time | 153584149 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 06:02:27 AM UTC 24 |
| Finished | Sep 04 06:02:29 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=332281779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 36.usbdev_random_length_out_transaction.332281779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_rx_crc_err.1687133296 |
| Short name | T2491 |
| Test name | |
| Test status | |
| Simulation time | 136355982 ps |
| CPU time | 1.35 seconds |
| Started | Sep 04 06:02:27 AM UTC 24 |
| Finished | Sep 04 06:02:29 AM UTC 24 |
| Peak memory | 214964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1687133296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_rx_crc_err.1687133296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_rx_full.4041335708 |
| Short name | T2494 |
| Test name | |
| Test status | |
| Simulation time | 246442768 ps |
| CPU time | 1.99 seconds |
| Started | Sep 04 06:02:27 AM UTC 24 |
| Finished | Sep 04 06:02:30 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4041335708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 36.usbdev_rx_full.4041335708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_setup_stage.2586133360 |
| Short name | T2490 |
| Test name | |
| Test status | |
| Simulation time | 168793006 ps |
| CPU time | 1.11 seconds |
| Started | Sep 04 06:02:27 AM UTC 24 |
| Finished | Sep 04 06:02:29 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2586133360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_setup_stage.2586133360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_setup_trans_ignored.211640516 |
| Short name | T2493 |
| Test name | |
| Test status | |
| Simulation time | 172999393 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 06:02:27 AM UTC 24 |
| Finished | Sep 04 06:02:29 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=211640516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 36.usbdev_setup_trans_ignored.211640516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_smoke.3059199277 |
| Short name | T2495 |
| Test name | |
| Test status | |
| Simulation time | 248237757 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 06:02:28 AM UTC 24 |
| Finished | Sep 04 06:02:31 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3059199277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_smoke.3059199277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_spurious_pids_ignored.1730974925 |
| Short name | T2539 |
| Test name | |
| Test status | |
| Simulation time | 2189617164 ps |
| CPU time | 22.48 seconds |
| Started | Sep 04 06:02:28 AM UTC 24 |
| Finished | Sep 04 06:02:52 AM UTC 24 |
| Peak memory | 229616 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1730974925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 36.usbdev_spurious_pids_ignored.1730974925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_stall_priority_over_nak.2603909256 |
| Short name | T2496 |
| Test name | |
| Test status | |
| Simulation time | 215769942 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 06:02:29 AM UTC 24 |
| Finished | Sep 04 06:02:32 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2603909256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_stall_priority_over_nak.2603909256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_stall_trans.2210703107 |
| Short name | T2497 |
| Test name | |
| Test status | |
| Simulation time | 214832412 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 06:02:29 AM UTC 24 |
| Finished | Sep 04 06:02:32 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2210703107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_stall_trans.2210703107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_stream_len_max.3486697096 |
| Short name | T2504 |
| Test name | |
| Test status | |
| Simulation time | 1269185672 ps |
| CPU time | 5.71 seconds |
| Started | Sep 04 06:02:31 AM UTC 24 |
| Finished | Sep 04 06:02:38 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3486697096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_stream_len_max.3486697096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_streaming_out.3301070752 |
| Short name | T2631 |
| Test name | |
| Test status | |
| Simulation time | 2085289492 ps |
| CPU time | 56.29 seconds |
| Started | Sep 04 06:02:29 AM UTC 24 |
| Finished | Sep 04 06:03:27 AM UTC 24 |
| Peak memory | 227496 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3301070752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_streaming_out.3301070752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_timeout_missing_host_handshake.1806900043 |
| Short name | T2466 |
| Test name | |
| Test status | |
| Simulation time | 613039646 ps |
| CPU time | 7.02 seconds |
| Started | Sep 04 06:02:09 AM UTC 24 |
| Finished | Sep 04 06:02:17 AM UTC 24 |
| Peak memory | 217260 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1806900043 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_timeout_missing_host_handshake.1806900043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/36.usbdev_tx_rx_disruption.3280249283 |
| Short name | T2499 |
| Test name | |
| Test status | |
| Simulation time | 516574214 ps |
| CPU time | 2.92 seconds |
| Started | Sep 04 06:02:31 AM UTC 24 |
| Finished | Sep 04 06:02:35 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3280249283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_t x_rx_disruption.3280249283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/36.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/360.usbdev_tx_rx_disruption.3610004712 |
| Short name | T3637 |
| Test name | |
| Test status | |
| Simulation time | 486124059 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 06:09:51 AM UTC 24 |
| Finished | Sep 04 06:09:54 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3610004712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 360.usbdev_ tx_rx_disruption.3610004712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/360.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/361.usbdev_tx_rx_disruption.1530578000 |
| Short name | T3727 |
| Test name | |
| Test status | |
| Simulation time | 533262352 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 06:09:53 AM UTC 24 |
| Finished | Sep 04 06:10:12 AM UTC 24 |
| Peak memory | 217756 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1530578000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 361.usbdev_ tx_rx_disruption.1530578000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/361.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/362.usbdev_tx_rx_disruption.243371086 |
| Short name | T3656 |
| Test name | |
| Test status | |
| Simulation time | 510289726 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 06:09:53 AM UTC 24 |
| Finished | Sep 04 06:09:58 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=243371086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 362.usbdev_t x_rx_disruption.243371086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/362.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/363.usbdev_tx_rx_disruption.914095085 |
| Short name | T3652 |
| Test name | |
| Test status | |
| Simulation time | 450938826 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 06:09:53 AM UTC 24 |
| Finished | Sep 04 06:09:58 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=914095085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 363.usbdev_t x_rx_disruption.914095085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/363.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/364.usbdev_tx_rx_disruption.350816612 |
| Short name | T3728 |
| Test name | |
| Test status | |
| Simulation time | 477065377 ps |
| CPU time | 1.57 seconds |
| Started | Sep 04 06:09:53 AM UTC 24 |
| Finished | Sep 04 06:10:12 AM UTC 24 |
| Peak memory | 215132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=350816612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 364.usbdev_t x_rx_disruption.350816612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/364.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/365.usbdev_tx_rx_disruption.1496546762 |
| Short name | T3655 |
| Test name | |
| Test status | |
| Simulation time | 495126907 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 06:09:53 AM UTC 24 |
| Finished | Sep 04 06:09:58 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1496546762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 365.usbdev_ tx_rx_disruption.1496546762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/365.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/366.usbdev_tx_rx_disruption.515997288 |
| Short name | T3690 |
| Test name | |
| Test status | |
| Simulation time | 469130380 ps |
| CPU time | 1.3 seconds |
| Started | Sep 04 06:09:53 AM UTC 24 |
| Finished | Sep 04 06:10:08 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=515997288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 366.usbdev_t x_rx_disruption.515997288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/366.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/367.usbdev_tx_rx_disruption.603893960 |
| Short name | T3659 |
| Test name | |
| Test status | |
| Simulation time | 604225471 ps |
| CPU time | 1.55 seconds |
| Started | Sep 04 06:09:53 AM UTC 24 |
| Finished | Sep 04 06:09:58 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=603893960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 367.usbdev_t x_rx_disruption.603893960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/367.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/368.usbdev_tx_rx_disruption.1756395397 |
| Short name | T3657 |
| Test name | |
| Test status | |
| Simulation time | 515863439 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 06:09:53 AM UTC 24 |
| Finished | Sep 04 06:09:58 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1756395397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 368.usbdev_ tx_rx_disruption.1756395397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/368.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/369.usbdev_tx_rx_disruption.1164137113 |
| Short name | T3663 |
| Test name | |
| Test status | |
| Simulation time | 617895968 ps |
| CPU time | 1.88 seconds |
| Started | Sep 04 06:09:53 AM UTC 24 |
| Finished | Sep 04 06:09:59 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1164137113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 369.usbdev_ tx_rx_disruption.1164137113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/369.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_alert_test.617381877 |
| Short name | T2554 |
| Test name | |
| Test status | |
| Simulation time | 27958747 ps |
| CPU time | 0.96 seconds |
| Started | Sep 04 06:02:54 AM UTC 24 |
| Finished | Sep 04 06:02:56 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=617381877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 37.usbdev_alert_test.617381877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_disconnect.2515395408 |
| Short name | T2524 |
| Test name | |
| Test status | |
| Simulation time | 9357375205 ps |
| CPU time | 15.59 seconds |
| Started | Sep 04 06:02:31 AM UTC 24 |
| Finished | Sep 04 06:02:48 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2515395408 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_disconnect.2515395408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_reset.253477878 |
| Short name | T2552 |
| Test name | |
| Test status | |
| Simulation time | 14445564785 ps |
| CPU time | 22.77 seconds |
| Started | Sep 04 06:02:31 AM UTC 24 |
| Finished | Sep 04 06:02:55 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=253477878 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_reset.253477878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_resume.3585297286 |
| Short name | T2639 |
| Test name | |
| Test status | |
| Simulation time | 23753825180 ps |
| CPU time | 56.89 seconds |
| Started | Sep 04 06:02:32 AM UTC 24 |
| Finished | Sep 04 06:03:31 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3585297286 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_resume.3585297286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_av_buffer.3796108623 |
| Short name | T2500 |
| Test name | |
| Test status | |
| Simulation time | 169500382 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 06:02:33 AM UTC 24 |
| Finished | Sep 04 06:02:36 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3796108623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_av_buffer.3796108623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_bitstuff_err.1425637118 |
| Short name | T2501 |
| Test name | |
| Test status | |
| Simulation time | 144206171 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 06:02:33 AM UTC 24 |
| Finished | Sep 04 06:02:36 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1425637118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_bitstuff_err.1425637118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_data_toggle_clear.3032432829 |
| Short name | T2502 |
| Test name | |
| Test status | |
| Simulation time | 468950822 ps |
| CPU time | 1.82 seconds |
| Started | Sep 04 06:02:33 AM UTC 24 |
| Finished | Sep 04 06:02:36 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3032432829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 37.usbdev_data_toggle_clear.3032432829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_data_toggle_restore.2470943671 |
| Short name | T2505 |
| Test name | |
| Test status | |
| Simulation time | 649916575 ps |
| CPU time | 3.38 seconds |
| Started | Sep 04 06:02:34 AM UTC 24 |
| Finished | Sep 04 06:02:39 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2470943671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_data_toggle_restore.2470943671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_device_address.2899781427 |
| Short name | T2650 |
| Test name | |
| Test status | |
| Simulation time | 34352001066 ps |
| CPU time | 57.57 seconds |
| Started | Sep 04 06:02:36 AM UTC 24 |
| Finished | Sep 04 06:03:35 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2899781427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_device_address.2899781427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_device_timeout.2131885185 |
| Short name | T2508 |
| Test name | |
| Test status | |
| Simulation time | 189862102 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 06:02:37 AM UTC 24 |
| Finished | Sep 04 06:02:39 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2131885185 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_device_timeout.2131885185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_disable_endpoint.1754747924 |
| Short name | T2513 |
| Test name | |
| Test status | |
| Simulation time | 780873621 ps |
| CPU time | 2.83 seconds |
| Started | Sep 04 06:02:37 AM UTC 24 |
| Finished | Sep 04 06:02:41 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1754747924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 37.usbdev_disable_endpoint.1754747924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_disconnected.3632226125 |
| Short name | T2512 |
| Test name | |
| Test status | |
| Simulation time | 149165822 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 06:02:38 AM UTC 24 |
| Finished | Sep 04 06:02:41 AM UTC 24 |
| Peak memory | 214892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3632226125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_disconnected.3632226125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_enable.1438775997 |
| Short name | T2511 |
| Test name | |
| Test status | |
| Simulation time | 31349527 ps |
| CPU time | 1.07 seconds |
| Started | Sep 04 06:02:38 AM UTC 24 |
| Finished | Sep 04 06:02:40 AM UTC 24 |
| Peak memory | 214872 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1438775997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 37.usbdev_enable.1438775997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_endpoint_access.2982769028 |
| Short name | T2347 |
| Test name | |
| Test status | |
| Simulation time | 883145744 ps |
| CPU time | 4.22 seconds |
| Started | Sep 04 06:02:40 AM UTC 24 |
| Finished | Sep 04 06:02:46 AM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2982769028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_endpoint_access.2982769028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_fifo_levels.1822846906 |
| Short name | T2518 |
| Test name | |
| Test status | |
| Simulation time | 269890298 ps |
| CPU time | 1.63 seconds |
| Started | Sep 04 06:02:41 AM UTC 24 |
| Finished | Sep 04 06:02:43 AM UTC 24 |
| Peak memory | 214912 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1822846906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_fifo_levels.1822846906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_fifo_rst.4293243555 |
| Short name | T2520 |
| Test name | |
| Test status | |
| Simulation time | 303445804 ps |
| CPU time | 2.42 seconds |
| Started | Sep 04 06:02:41 AM UTC 24 |
| Finished | Sep 04 06:02:44 AM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4293243555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_fifo_rst.4293243555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_in_iso.2700164976 |
| Short name | T2487 |
| Test name | |
| Test status | |
| Simulation time | 228023874 ps |
| CPU time | 1.31 seconds |
| Started | Sep 04 06:02:42 AM UTC 24 |
| Finished | Sep 04 06:02:45 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2700164976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 37.usbdev_in_iso.2700164976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_in_stall.829915918 |
| Short name | T2521 |
| Test name | |
| Test status | |
| Simulation time | 155848533 ps |
| CPU time | 1.3 seconds |
| Started | Sep 04 06:02:42 AM UTC 24 |
| Finished | Sep 04 06:02:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=829915918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 37.usbdev_in_stall.829915918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_in_trans.3728970638 |
| Short name | T2446 |
| Test name | |
| Test status | |
| Simulation time | 235118448 ps |
| CPU time | 1.6 seconds |
| Started | Sep 04 06:02:42 AM UTC 24 |
| Finished | Sep 04 06:02:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3728970638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_in_trans.3728970638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_invalid_sync.2556746804 |
| Short name | T2613 |
| Test name | |
| Test status | |
| Simulation time | 4103105639 ps |
| CPU time | 37.09 seconds |
| Started | Sep 04 06:02:41 AM UTC 24 |
| Finished | Sep 04 06:03:19 AM UTC 24 |
| Peak memory | 234312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2556746804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 37.usbdev_invalid_sync.2556746804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_iso_retraction.3134924167 |
| Short name | T2829 |
| Test name | |
| Test status | |
| Simulation time | 10652046577 ps |
| CPU time | 126.89 seconds |
| Started | Sep 04 06:02:42 AM UTC 24 |
| Finished | Sep 04 06:04:52 AM UTC 24 |
| Peak memory | 219964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3134924167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_iso_retraction.3134924167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_link_in_err.3739235845 |
| Short name | T2444 |
| Test name | |
| Test status | |
| Simulation time | 209865175 ps |
| CPU time | 1.65 seconds |
| Started | Sep 04 06:02:43 AM UTC 24 |
| Finished | Sep 04 06:02:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3739235845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_link_in_err.3739235845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_link_resume.513817160 |
| Short name | T2582 |
| Test name | |
| Test status | |
| Simulation time | 12482758685 ps |
| CPU time | 21.82 seconds |
| Started | Sep 04 06:02:44 AM UTC 24 |
| Finished | Sep 04 06:03:07 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=513817160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 37.usbdev_link_resume.513817160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_link_suspend.161262914 |
| Short name | T2546 |
| Test name | |
| Test status | |
| Simulation time | 4972929197 ps |
| CPU time | 8.5 seconds |
| Started | Sep 04 06:02:44 AM UTC 24 |
| Finished | Sep 04 06:02:54 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=161262914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_link_suspend.161262914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_low_speed_traffic.3975252421 |
| Short name | T2673 |
| Test name | |
| Test status | |
| Simulation time | 4657685579 ps |
| CPU time | 58.08 seconds |
| Started | Sep 04 06:02:44 AM UTC 24 |
| Finished | Sep 04 06:03:44 AM UTC 24 |
| Peak memory | 234248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3975252421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_low_speed_traffic.3975252421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_max_inter_pkt_delay.2213808931 |
| Short name | T2608 |
| Test name | |
| Test status | |
| Simulation time | 3131212319 ps |
| CPU time | 30.94 seconds |
| Started | Sep 04 06:02:44 AM UTC 24 |
| Finished | Sep 04 06:03:16 AM UTC 24 |
| Peak memory | 227524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2213808931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_max_inter_pkt_delay.2213808931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_max_length_in_transaction.2868084376 |
| Short name | T2529 |
| Test name | |
| Test status | |
| Simulation time | 240074655 ps |
| CPU time | 1.65 seconds |
| Started | Sep 04 06:02:46 AM UTC 24 |
| Finished | Sep 04 06:02:49 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2868084376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 37.usbdev_max_length_in_transaction.2868084376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_max_length_out_transaction.2275809581 |
| Short name | T2526 |
| Test name | |
| Test status | |
| Simulation time | 188212477 ps |
| CPU time | 1.55 seconds |
| Started | Sep 04 06:02:46 AM UTC 24 |
| Finished | Sep 04 06:02:49 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2275809581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 37.usbdev_max_length_out_transaction.2275809581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_min_inter_pkt_delay.3978649339 |
| Short name | T2651 |
| Test name | |
| Test status | |
| Simulation time | 1930023220 ps |
| CPU time | 47.45 seconds |
| Started | Sep 04 06:02:46 AM UTC 24 |
| Finished | Sep 04 06:03:35 AM UTC 24 |
| Peak memory | 227420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3978649339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_min_inter_pkt_delay.3978649339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_min_length_in_transaction.4015109803 |
| Short name | T2528 |
| Test name | |
| Test status | |
| Simulation time | 179342590 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 06:02:46 AM UTC 24 |
| Finished | Sep 04 06:02:49 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4015109803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 37.usbdev_min_length_in_transaction.4015109803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_min_length_out_transaction.2949825320 |
| Short name | T2525 |
| Test name | |
| Test status | |
| Simulation time | 176086713 ps |
| CPU time | 1.16 seconds |
| Started | Sep 04 06:02:46 AM UTC 24 |
| Finished | Sep 04 06:02:48 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2949825320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 37.usbdev_min_length_out_transaction.2949825320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_nak_trans.1696053505 |
| Short name | T2530 |
| Test name | |
| Test status | |
| Simulation time | 172665952 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 06:02:46 AM UTC 24 |
| Finished | Sep 04 06:02:49 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1696053505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_nak_trans.1696053505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_out_iso.4048407147 |
| Short name | T2527 |
| Test name | |
| Test status | |
| Simulation time | 178746199 ps |
| CPU time | 1.27 seconds |
| Started | Sep 04 06:02:46 AM UTC 24 |
| Finished | Sep 04 06:02:49 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4048407147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 37.usbdev_out_iso.4048407147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_out_stall.1367567982 |
| Short name | T2533 |
| Test name | |
| Test status | |
| Simulation time | 239988956 ps |
| CPU time | 1.33 seconds |
| Started | Sep 04 06:02:47 AM UTC 24 |
| Finished | Sep 04 06:02:50 AM UTC 24 |
| Peak memory | 214716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1367567982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_out_stall.1367567982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_out_trans_nak.1358307613 |
| Short name | T2532 |
| Test name | |
| Test status | |
| Simulation time | 178001408 ps |
| CPU time | 1.08 seconds |
| Started | Sep 04 06:02:48 AM UTC 24 |
| Finished | Sep 04 06:02:50 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1358307613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 37.usbdev_out_trans_nak.1358307613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_pending_in_trans.2039449695 |
| Short name | T2535 |
| Test name | |
| Test status | |
| Simulation time | 150350510 ps |
| CPU time | 1.15 seconds |
| Started | Sep 04 06:02:49 AM UTC 24 |
| Finished | Sep 04 06:02:51 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2039449695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 37.usbdev_pending_in_trans.2039449695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_phy_config_pinflip.4262503124 |
| Short name | T2537 |
| Test name | |
| Test status | |
| Simulation time | 225007163 ps |
| CPU time | 1.81 seconds |
| Started | Sep 04 06:02:49 AM UTC 24 |
| Finished | Sep 04 06:02:52 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4262503124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 37.usbdev_phy_config_pinflip.4262503124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_phy_config_usb_ref_disable.2232500888 |
| Short name | T2536 |
| Test name | |
| Test status | |
| Simulation time | 137707102 ps |
| CPU time | 1.21 seconds |
| Started | Sep 04 06:02:49 AM UTC 24 |
| Finished | Sep 04 06:02:51 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2232500888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 37.usbdev_phy_config_usb_ref_disable.2232500888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_phy_pins_sense.2652788724 |
| Short name | T2540 |
| Test name | |
| Test status | |
| Simulation time | 33170345 ps |
| CPU time | 0.9 seconds |
| Started | Sep 04 06:02:50 AM UTC 24 |
| Finished | Sep 04 06:02:52 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2652788724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_phy_pins_sense.2652788724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_buffer.2512238988 |
| Short name | T2686 |
| Test name | |
| Test status | |
| Simulation time | 21969324877 ps |
| CPU time | 57.09 seconds |
| Started | Sep 04 06:02:50 AM UTC 24 |
| Finished | Sep 04 06:03:49 AM UTC 24 |
| Peak memory | 227624 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2512238988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 37.usbdev_pkt_buffer.2512238988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_received.3012384057 |
| Short name | T2541 |
| Test name | |
| Test status | |
| Simulation time | 151169748 ps |
| CPU time | 1.06 seconds |
| Started | Sep 04 06:02:50 AM UTC 24 |
| Finished | Sep 04 06:02:52 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3012384057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_pkt_received.3012384057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_sent.2416205608 |
| Short name | T2542 |
| Test name | |
| Test status | |
| Simulation time | 197162657 ps |
| CPU time | 1.23 seconds |
| Started | Sep 04 06:02:51 AM UTC 24 |
| Finished | Sep 04 06:02:53 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2416205608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_pkt_sent.2416205608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_random_length_in_transaction.527722833 |
| Short name | T2544 |
| Test name | |
| Test status | |
| Simulation time | 288860367 ps |
| CPU time | 1.36 seconds |
| Started | Sep 04 06:02:51 AM UTC 24 |
| Finished | Sep 04 06:02:53 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=527722833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_random_length_in_transaction.527722833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_random_length_out_transaction.2350588806 |
| Short name | T2543 |
| Test name | |
| Test status | |
| Simulation time | 185337997 ps |
| CPU time | 1.22 seconds |
| Started | Sep 04 06:02:51 AM UTC 24 |
| Finished | Sep 04 06:02:53 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2350588806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 37.usbdev_random_length_out_transaction.2350588806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_rx_crc_err.2637110661 |
| Short name | T2545 |
| Test name | |
| Test status | |
| Simulation time | 184349179 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 06:02:51 AM UTC 24 |
| Finished | Sep 04 06:02:53 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2637110661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 37.usbdev_rx_crc_err.2637110661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_rx_full.2619658482 |
| Short name | T2547 |
| Test name | |
| Test status | |
| Simulation time | 254290395 ps |
| CPU time | 1.2 seconds |
| Started | Sep 04 06:02:52 AM UTC 24 |
| Finished | Sep 04 06:02:54 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2619658482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 37.usbdev_rx_full.2619658482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_setup_stage.3215123783 |
| Short name | T2549 |
| Test name | |
| Test status | |
| Simulation time | 148617032 ps |
| CPU time | 1.35 seconds |
| Started | Sep 04 06:02:52 AM UTC 24 |
| Finished | Sep 04 06:02:54 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3215123783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_setup_stage.3215123783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_setup_trans_ignored.3308079304 |
| Short name | T2548 |
| Test name | |
| Test status | |
| Simulation time | 200992132 ps |
| CPU time | 1.29 seconds |
| Started | Sep 04 06:02:52 AM UTC 24 |
| Finished | Sep 04 06:02:54 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3308079304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 37.usbdev_setup_trans_ignored.3308079304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_smoke.25705368 |
| Short name | T2551 |
| Test name | |
| Test status | |
| Simulation time | 281767683 ps |
| CPU time | 2.01 seconds |
| Started | Sep 04 06:02:52 AM UTC 24 |
| Finished | Sep 04 06:02:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=25705368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null - cm_name 37.usbdev_smoke.25705368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_spurious_pids_ignored.2123456223 |
| Short name | T2625 |
| Test name | |
| Test status | |
| Simulation time | 4221536831 ps |
| CPU time | 30.2 seconds |
| Started | Sep 04 06:02:54 AM UTC 24 |
| Finished | Sep 04 06:03:25 AM UTC 24 |
| Peak memory | 234208 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2123456223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 37.usbdev_spurious_pids_ignored.2123456223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_stall_priority_over_nak.3000337309 |
| Short name | T2556 |
| Test name | |
| Test status | |
| Simulation time | 230607485 ps |
| CPU time | 1.65 seconds |
| Started | Sep 04 06:02:54 AM UTC 24 |
| Finished | Sep 04 06:02:56 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3000337309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_stall_priority_over_nak.3000337309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_stall_trans.2894711784 |
| Short name | T2555 |
| Test name | |
| Test status | |
| Simulation time | 186404798 ps |
| CPU time | 1.31 seconds |
| Started | Sep 04 06:02:54 AM UTC 24 |
| Finished | Sep 04 06:02:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2894711784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_stall_trans.2894711784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_stream_len_max.1973390900 |
| Short name | T2561 |
| Test name | |
| Test status | |
| Simulation time | 1213408006 ps |
| CPU time | 3.13 seconds |
| Started | Sep 04 06:02:54 AM UTC 24 |
| Finished | Sep 04 06:02:58 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1973390900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_stream_len_max.1973390900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_streaming_out.1955546111 |
| Short name | T2740 |
| Test name | |
| Test status | |
| Simulation time | 2665560255 ps |
| CPU time | 74.3 seconds |
| Started | Sep 04 06:02:54 AM UTC 24 |
| Finished | Sep 04 06:04:10 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1955546111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_streaming_out.1955546111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_timeout_missing_host_handshake.2533111082 |
| Short name | T2509 |
| Test name | |
| Test status | |
| Simulation time | 155067360 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 06:02:37 AM UTC 24 |
| Finished | Sep 04 06:02:39 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2533111082 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_timeout_missing_host_handshake.2533111082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/37.usbdev_tx_rx_disruption.2453452248 |
| Short name | T2557 |
| Test name | |
| Test status | |
| Simulation time | 653979121 ps |
| CPU time | 2.09 seconds |
| Started | Sep 04 06:02:54 AM UTC 24 |
| Finished | Sep 04 06:02:57 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2453452248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_t x_rx_disruption.2453452248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/37.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/370.usbdev_tx_rx_disruption.1063218653 |
| Short name | T3681 |
| Test name | |
| Test status | |
| Simulation time | 509731485 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 06:09:54 AM UTC 24 |
| Finished | Sep 04 06:10:04 AM UTC 24 |
| Peak memory | 214576 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1063218653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 370.usbdev_ tx_rx_disruption.1063218653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/370.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/371.usbdev_tx_rx_disruption.2946146851 |
| Short name | T3682 |
| Test name | |
| Test status | |
| Simulation time | 637057460 ps |
| CPU time | 1.65 seconds |
| Started | Sep 04 06:09:54 AM UTC 24 |
| Finished | Sep 04 06:10:04 AM UTC 24 |
| Peak memory | 214584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2946146851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 371.usbdev_ tx_rx_disruption.2946146851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/371.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/372.usbdev_tx_rx_disruption.2553194377 |
| Short name | T3684 |
| Test name | |
| Test status | |
| Simulation time | 545416459 ps |
| CPU time | 1.63 seconds |
| Started | Sep 04 06:09:55 AM UTC 24 |
| Finished | Sep 04 06:10:04 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2553194377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 372.usbdev_ tx_rx_disruption.2553194377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/372.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/373.usbdev_tx_rx_disruption.3037626123 |
| Short name | T3680 |
| Test name | |
| Test status | |
| Simulation time | 519316172 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 06:09:55 AM UTC 24 |
| Finished | Sep 04 06:10:04 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3037626123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 373.usbdev_ tx_rx_disruption.3037626123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/373.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/374.usbdev_tx_rx_disruption.1579442365 |
| Short name | T3685 |
| Test name | |
| Test status | |
| Simulation time | 575372214 ps |
| CPU time | 1.61 seconds |
| Started | Sep 04 06:09:55 AM UTC 24 |
| Finished | Sep 04 06:10:04 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1579442365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 374.usbdev_ tx_rx_disruption.1579442365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/374.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/375.usbdev_tx_rx_disruption.2091411974 |
| Short name | T3679 |
| Test name | |
| Test status | |
| Simulation time | 455037896 ps |
| CPU time | 1.35 seconds |
| Started | Sep 04 06:09:55 AM UTC 24 |
| Finished | Sep 04 06:10:04 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2091411974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 375.usbdev_ tx_rx_disruption.2091411974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/375.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/376.usbdev_tx_rx_disruption.3139213271 |
| Short name | T3686 |
| Test name | |
| Test status | |
| Simulation time | 662127957 ps |
| CPU time | 1.79 seconds |
| Started | Sep 04 06:09:55 AM UTC 24 |
| Finished | Sep 04 06:10:05 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3139213271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 376.usbdev_ tx_rx_disruption.3139213271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/376.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/377.usbdev_tx_rx_disruption.1805498271 |
| Short name | T3715 |
| Test name | |
| Test status | |
| Simulation time | 487714203 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 06:09:55 AM UTC 24 |
| Finished | Sep 04 06:10:11 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1805498271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 377.usbdev_ tx_rx_disruption.1805498271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/377.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/378.usbdev_tx_rx_disruption.3706783243 |
| Short name | T3716 |
| Test name | |
| Test status | |
| Simulation time | 516599336 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 06:09:55 AM UTC 24 |
| Finished | Sep 04 06:10:11 AM UTC 24 |
| Peak memory | 214888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3706783243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 378.usbdev_ tx_rx_disruption.3706783243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/378.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/379.usbdev_tx_rx_disruption.1902752845 |
| Short name | T3718 |
| Test name | |
| Test status | |
| Simulation time | 611824452 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 06:09:55 AM UTC 24 |
| Finished | Sep 04 06:10:12 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1902752845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 379.usbdev_ tx_rx_disruption.1902752845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/379.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_alert_test.1872015998 |
| Short name | T2610 |
| Test name | |
| Test status | |
| Simulation time | 34522794 ps |
| CPU time | 1.02 seconds |
| Started | Sep 04 06:03:16 AM UTC 24 |
| Finished | Sep 04 06:03:18 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1872015998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 38.usbdev_alert_test.1872015998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_disconnect.3564137289 |
| Short name | T2596 |
| Test name | |
| Test status | |
| Simulation time | 9612302555 ps |
| CPU time | 17.84 seconds |
| Started | Sep 04 06:02:54 AM UTC 24 |
| Finished | Sep 04 06:03:13 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3564137289 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_disconnect.3564137289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_reset.2334215213 |
| Short name | T2609 |
| Test name | |
| Test status | |
| Simulation time | 13958793336 ps |
| CPU time | 19.92 seconds |
| Started | Sep 04 06:02:55 AM UTC 24 |
| Finished | Sep 04 06:03:17 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2334215213 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_reset.2334215213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_resume.2739832974 |
| Short name | T2643 |
| Test name | |
| Test status | |
| Simulation time | 25021926968 ps |
| CPU time | 35.52 seconds |
| Started | Sep 04 06:02:55 AM UTC 24 |
| Finished | Sep 04 06:03:32 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2739832974 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_resume.2739832974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_av_buffer.3073747998 |
| Short name | T2558 |
| Test name | |
| Test status | |
| Simulation time | 183847699 ps |
| CPU time | 1.16 seconds |
| Started | Sep 04 06:02:56 AM UTC 24 |
| Finished | Sep 04 06:02:58 AM UTC 24 |
| Peak memory | 214832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3073747998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_av_buffer.3073747998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_bitstuff_err.1482885601 |
| Short name | T2559 |
| Test name | |
| Test status | |
| Simulation time | 148414252 ps |
| CPU time | 1.08 seconds |
| Started | Sep 04 06:02:56 AM UTC 24 |
| Finished | Sep 04 06:02:58 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1482885601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_bitstuff_err.1482885601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_data_toggle_clear.3208108040 |
| Short name | T2563 |
| Test name | |
| Test status | |
| Simulation time | 486249842 ps |
| CPU time | 2.76 seconds |
| Started | Sep 04 06:02:56 AM UTC 24 |
| Finished | Sep 04 06:02:59 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3208108040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 38.usbdev_data_toggle_clear.3208108040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_data_toggle_restore.3786154162 |
| Short name | T2565 |
| Test name | |
| Test status | |
| Simulation time | 409096465 ps |
| CPU time | 2.38 seconds |
| Started | Sep 04 06:02:57 AM UTC 24 |
| Finished | Sep 04 06:03:00 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3786154162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_data_toggle_restore.3786154162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_device_address.227743931 |
| Short name | T2688 |
| Test name | |
| Test status | |
| Simulation time | 30169956419 ps |
| CPU time | 50.91 seconds |
| Started | Sep 04 06:02:57 AM UTC 24 |
| Finished | Sep 04 06:03:49 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=227743931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 38.usbdev_device_address.227743931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_device_timeout.37701207 |
| Short name | T2637 |
| Test name | |
| Test status | |
| Simulation time | 1562059290 ps |
| CPU time | 31.97 seconds |
| Started | Sep 04 06:02:57 AM UTC 24 |
| Finished | Sep 04 06:03:30 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=37701207 -assert nopostproc +UVM_TESTNAME=usbdev_ba se_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_device_timeout.37701207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_disable_endpoint.3283482039 |
| Short name | T2570 |
| Test name | |
| Test status | |
| Simulation time | 746818236 ps |
| CPU time | 3.52 seconds |
| Started | Sep 04 06:02:57 AM UTC 24 |
| Finished | Sep 04 06:03:02 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3283482039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 38.usbdev_disable_endpoint.3283482039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_disconnected.1524210284 |
| Short name | T2564 |
| Test name | |
| Test status | |
| Simulation time | 143896649 ps |
| CPU time | 1.37 seconds |
| Started | Sep 04 06:02:57 AM UTC 24 |
| Finished | Sep 04 06:03:00 AM UTC 24 |
| Peak memory | 214936 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1524210284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_disconnected.1524210284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_enable.3559738309 |
| Short name | T2567 |
| Test name | |
| Test status | |
| Simulation time | 39236859 ps |
| CPU time | 1.05 seconds |
| Started | Sep 04 06:02:59 AM UTC 24 |
| Finished | Sep 04 06:03:01 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3559738309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 38.usbdev_enable.3559738309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_endpoint_access.188528948 |
| Short name | T2571 |
| Test name | |
| Test status | |
| Simulation time | 739157884 ps |
| CPU time | 2.58 seconds |
| Started | Sep 04 06:02:59 AM UTC 24 |
| Finished | Sep 04 06:03:03 AM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=188528948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_endpoint_access.188528948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_endpoint_types.309765981 |
| Short name | T304 |
| Test name | |
| Test status | |
| Simulation time | 541149662 ps |
| CPU time | 2.75 seconds |
| Started | Sep 04 06:02:59 AM UTC 24 |
| Finished | Sep 04 06:03:03 AM UTC 24 |
| Peak memory | 217040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=309765981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 38.usbdev_endpoint_types.309765981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_fifo_levels.2067326506 |
| Short name | T2569 |
| Test name | |
| Test status | |
| Simulation time | 241062939 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 06:02:59 AM UTC 24 |
| Finished | Sep 04 06:03:01 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2067326506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_fifo_levels.2067326506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_fifo_rst.1090760628 |
| Short name | T2573 |
| Test name | |
| Test status | |
| Simulation time | 398938846 ps |
| CPU time | 3.17 seconds |
| Started | Sep 04 06:02:59 AM UTC 24 |
| Finished | Sep 04 06:03:03 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1090760628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_fifo_rst.1090760628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_in_iso.2100957233 |
| Short name | T2574 |
| Test name | |
| Test status | |
| Simulation time | 232205969 ps |
| CPU time | 1.93 seconds |
| Started | Sep 04 06:03:00 AM UTC 24 |
| Finished | Sep 04 06:03:03 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2100957233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 38.usbdev_in_iso.2100957233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_in_stall.3533277274 |
| Short name | T2572 |
| Test name | |
| Test status | |
| Simulation time | 193139041 ps |
| CPU time | 1.22 seconds |
| Started | Sep 04 06:03:01 AM UTC 24 |
| Finished | Sep 04 06:03:03 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3533277274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_in_stall.3533277274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_in_trans.3554556803 |
| Short name | T2577 |
| Test name | |
| Test status | |
| Simulation time | 207276614 ps |
| CPU time | 1.66 seconds |
| Started | Sep 04 06:03:02 AM UTC 24 |
| Finished | Sep 04 06:03:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3554556803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_in_trans.3554556803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_invalid_sync.4003771677 |
| Short name | T2667 |
| Test name | |
| Test status | |
| Simulation time | 4680174949 ps |
| CPU time | 37.66 seconds |
| Started | Sep 04 06:03:00 AM UTC 24 |
| Finished | Sep 04 06:03:39 AM UTC 24 |
| Peak memory | 234304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4003771677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 38.usbdev_invalid_sync.4003771677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_iso_retraction.4170922527 |
| Short name | T2690 |
| Test name | |
| Test status | |
| Simulation time | 7395649598 ps |
| CPU time | 47.08 seconds |
| Started | Sep 04 06:03:02 AM UTC 24 |
| Finished | Sep 04 06:03:50 AM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4170922527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_iso_retraction.4170922527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_link_in_err.981335861 |
| Short name | T2575 |
| Test name | |
| Test status | |
| Simulation time | 217473154 ps |
| CPU time | 1.37 seconds |
| Started | Sep 04 06:03:02 AM UTC 24 |
| Finished | Sep 04 06:03:04 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=981335861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 38.usbdev_link_in_err.981335861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_link_resume.1190035042 |
| Short name | T2605 |
| Test name | |
| Test status | |
| Simulation time | 7870287829 ps |
| CPU time | 13.02 seconds |
| Started | Sep 04 06:03:02 AM UTC 24 |
| Finished | Sep 04 06:03:16 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1190035042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_link_resume.1190035042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_link_suspend.4084237887 |
| Short name | T2624 |
| Test name | |
| Test status | |
| Simulation time | 10925606777 ps |
| CPU time | 19.73 seconds |
| Started | Sep 04 06:03:04 AM UTC 24 |
| Finished | Sep 04 06:03:25 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4084237887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_link_suspend.4084237887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_low_speed_traffic.1048006757 |
| Short name | T2633 |
| Test name | |
| Test status | |
| Simulation time | 2487880621 ps |
| CPU time | 23.46 seconds |
| Started | Sep 04 06:03:04 AM UTC 24 |
| Finished | Sep 04 06:03:29 AM UTC 24 |
| Peak memory | 229612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1048006757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_low_speed_traffic.1048006757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_max_inter_pkt_delay.2843977815 |
| Short name | T2687 |
| Test name | |
| Test status | |
| Simulation time | 1610871035 ps |
| CPU time | 43.57 seconds |
| Started | Sep 04 06:03:04 AM UTC 24 |
| Finished | Sep 04 06:03:49 AM UTC 24 |
| Peak memory | 234164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2843977815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_max_inter_pkt_delay.2843977815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_max_length_in_transaction.125785212 |
| Short name | T2581 |
| Test name | |
| Test status | |
| Simulation time | 240739772 ps |
| CPU time | 1.74 seconds |
| Started | Sep 04 06:03:04 AM UTC 24 |
| Finished | Sep 04 06:03:07 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=125785212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 38.usbdev_max_length_in_transaction.125785212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_max_length_out_transaction.1905288727 |
| Short name | T2580 |
| Test name | |
| Test status | |
| Simulation time | 192422066 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 06:03:04 AM UTC 24 |
| Finished | Sep 04 06:03:07 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1905288727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 38.usbdev_max_length_out_transaction.1905288727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_min_inter_pkt_delay.3505649097 |
| Short name | T2660 |
| Test name | |
| Test status | |
| Simulation time | 3502845498 ps |
| CPU time | 32.3 seconds |
| Started | Sep 04 06:03:04 AM UTC 24 |
| Finished | Sep 04 06:03:38 AM UTC 24 |
| Peak memory | 227440 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3505649097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_min_inter_pkt_delay.3505649097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_min_length_in_transaction.1245399621 |
| Short name | T2579 |
| Test name | |
| Test status | |
| Simulation time | 150759046 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 06:03:04 AM UTC 24 |
| Finished | Sep 04 06:03:07 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1245399621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 38.usbdev_min_length_in_transaction.1245399621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_min_length_out_transaction.4280544784 |
| Short name | T2584 |
| Test name | |
| Test status | |
| Simulation time | 206219802 ps |
| CPU time | 1.6 seconds |
| Started | Sep 04 06:03:06 AM UTC 24 |
| Finished | Sep 04 06:03:08 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4280544784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 38.usbdev_min_length_out_transaction.4280544784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_nak_trans.1523770958 |
| Short name | T152 |
| Test name | |
| Test status | |
| Simulation time | 230161784 ps |
| CPU time | 1.67 seconds |
| Started | Sep 04 06:03:06 AM UTC 24 |
| Finished | Sep 04 06:03:08 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1523770958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_nak_trans.1523770958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_out_iso.1640084202 |
| Short name | T2585 |
| Test name | |
| Test status | |
| Simulation time | 179641819 ps |
| CPU time | 1.62 seconds |
| Started | Sep 04 06:03:06 AM UTC 24 |
| Finished | Sep 04 06:03:08 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1640084202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_out_iso.1640084202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_out_stall.3609048148 |
| Short name | T2586 |
| Test name | |
| Test status | |
| Simulation time | 227337175 ps |
| CPU time | 1.74 seconds |
| Started | Sep 04 06:03:06 AM UTC 24 |
| Finished | Sep 04 06:03:08 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3609048148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_out_stall.3609048148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_out_trans_nak.304874711 |
| Short name | T2590 |
| Test name | |
| Test status | |
| Simulation time | 251151252 ps |
| CPU time | 1.77 seconds |
| Started | Sep 04 06:03:08 AM UTC 24 |
| Finished | Sep 04 06:03:11 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=304874711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_out_trans_nak.304874711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_pending_in_trans.1636795800 |
| Short name | T2588 |
| Test name | |
| Test status | |
| Simulation time | 171599646 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 06:03:08 AM UTC 24 |
| Finished | Sep 04 06:03:10 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1636795800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 38.usbdev_pending_in_trans.1636795800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_phy_config_pinflip.706452340 |
| Short name | T2591 |
| Test name | |
| Test status | |
| Simulation time | 246591338 ps |
| CPU time | 1.83 seconds |
| Started | Sep 04 06:03:08 AM UTC 24 |
| Finished | Sep 04 06:03:11 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=706452340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 38.usbdev_phy_config_pinflip.706452340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_phy_config_usb_ref_disable.1931597681 |
| Short name | T2589 |
| Test name | |
| Test status | |
| Simulation time | 150528854 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 06:03:08 AM UTC 24 |
| Finished | Sep 04 06:03:11 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1931597681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 38.usbdev_phy_config_usb_ref_disable.1931597681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_phy_pins_sense.3465428500 |
| Short name | T2592 |
| Test name | |
| Test status | |
| Simulation time | 36395165 ps |
| CPU time | 1.1 seconds |
| Started | Sep 04 06:03:10 AM UTC 24 |
| Finished | Sep 04 06:03:12 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3465428500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_phy_pins_sense.3465428500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_buffer.2051539710 |
| Short name | T2638 |
| Test name | |
| Test status | |
| Simulation time | 9474282215 ps |
| CPU time | 29.3 seconds |
| Started | Sep 04 06:03:10 AM UTC 24 |
| Finished | Sep 04 06:03:40 AM UTC 24 |
| Peak memory | 227736 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2051539710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 38.usbdev_pkt_buffer.2051539710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_received.1607777475 |
| Short name | T2594 |
| Test name | |
| Test status | |
| Simulation time | 163203150 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 06:03:10 AM UTC 24 |
| Finished | Sep 04 06:03:12 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1607777475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_pkt_received.1607777475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_sent.2255584270 |
| Short name | T2593 |
| Test name | |
| Test status | |
| Simulation time | 180817668 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 06:03:10 AM UTC 24 |
| Finished | Sep 04 06:03:12 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2255584270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_pkt_sent.2255584270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_random_length_in_transaction.3864001264 |
| Short name | T2595 |
| Test name | |
| Test status | |
| Simulation time | 219866905 ps |
| CPU time | 1.73 seconds |
| Started | Sep 04 06:03:10 AM UTC 24 |
| Finished | Sep 04 06:03:13 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3864001264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 38.usbdev_random_length_in_transaction.3864001264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_random_length_out_transaction.2917029902 |
| Short name | T2600 |
| Test name | |
| Test status | |
| Simulation time | 230420147 ps |
| CPU time | 1.7 seconds |
| Started | Sep 04 06:03:11 AM UTC 24 |
| Finished | Sep 04 06:03:14 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2917029902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 38.usbdev_random_length_out_transaction.2917029902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_rx_crc_err.622890961 |
| Short name | T2598 |
| Test name | |
| Test status | |
| Simulation time | 155710798 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 06:03:11 AM UTC 24 |
| Finished | Sep 04 06:03:14 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=622890961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_rx_crc_err.622890961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_rx_full.3468958763 |
| Short name | T2601 |
| Test name | |
| Test status | |
| Simulation time | 357899723 ps |
| CPU time | 2.3 seconds |
| Started | Sep 04 06:03:11 AM UTC 24 |
| Finished | Sep 04 06:03:15 AM UTC 24 |
| Peak memory | 216940 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3468958763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_rx_full.3468958763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_setup_stage.3119481374 |
| Short name | T2599 |
| Test name | |
| Test status | |
| Simulation time | 163444281 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 06:03:11 AM UTC 24 |
| Finished | Sep 04 06:03:14 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3119481374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_setup_stage.3119481374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_setup_trans_ignored.2859948233 |
| Short name | T2602 |
| Test name | |
| Test status | |
| Simulation time | 155088594 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 06:03:13 AM UTC 24 |
| Finished | Sep 04 06:03:15 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2859948233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 38.usbdev_setup_trans_ignored.2859948233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_smoke.4084832764 |
| Short name | T2604 |
| Test name | |
| Test status | |
| Simulation time | 254789235 ps |
| CPU time | 1.8 seconds |
| Started | Sep 04 06:03:13 AM UTC 24 |
| Finished | Sep 04 06:03:16 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4084832764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_smoke.4084832764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_spurious_pids_ignored.2709075168 |
| Short name | T2745 |
| Test name | |
| Test status | |
| Simulation time | 2311942150 ps |
| CPU time | 61.72 seconds |
| Started | Sep 04 06:03:13 AM UTC 24 |
| Finished | Sep 04 06:04:16 AM UTC 24 |
| Peak memory | 229528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2709075168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 38.usbdev_spurious_pids_ignored.2709075168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_stall_priority_over_nak.4135297855 |
| Short name | T2603 |
| Test name | |
| Test status | |
| Simulation time | 215464450 ps |
| CPU time | 1.77 seconds |
| Started | Sep 04 06:03:13 AM UTC 24 |
| Finished | Sep 04 06:03:16 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4135297855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_stall_priority_over_nak.4135297855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_stall_trans.860697526 |
| Short name | T2607 |
| Test name | |
| Test status | |
| Simulation time | 186036496 ps |
| CPU time | 1.24 seconds |
| Started | Sep 04 06:03:14 AM UTC 24 |
| Finished | Sep 04 06:03:16 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=860697526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 38.usbdev_stall_trans.860697526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_stream_len_max.1884445031 |
| Short name | T2611 |
| Test name | |
| Test status | |
| Simulation time | 1037106868 ps |
| CPU time | 2.78 seconds |
| Started | Sep 04 06:03:14 AM UTC 24 |
| Finished | Sep 04 06:03:18 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1884445031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_stream_len_max.1884445031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_streaming_out.2316449400 |
| Short name | T2763 |
| Test name | |
| Test status | |
| Simulation time | 2560543640 ps |
| CPU time | 67.2 seconds |
| Started | Sep 04 06:03:14 AM UTC 24 |
| Finished | Sep 04 06:04:23 AM UTC 24 |
| Peak memory | 234368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2316449400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_streaming_out.2316449400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_timeout_missing_host_handshake.2749514231 |
| Short name | T2576 |
| Test name | |
| Test status | |
| Simulation time | 281324543 ps |
| CPU time | 6.13 seconds |
| Started | Sep 04 06:02:57 AM UTC 24 |
| Finished | Sep 04 06:03:04 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2749514231 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_timeout_missing_host_handshake.2749514231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/38.usbdev_tx_rx_disruption.2025492579 |
| Short name | T2612 |
| Test name | |
| Test status | |
| Simulation time | 478268020 ps |
| CPU time | 2.96 seconds |
| Started | Sep 04 06:03:14 AM UTC 24 |
| Finished | Sep 04 06:03:18 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2025492579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_t x_rx_disruption.2025492579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/38.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/380.usbdev_tx_rx_disruption.702300305 |
| Short name | T3719 |
| Test name | |
| Test status | |
| Simulation time | 592003782 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 06:09:55 AM UTC 24 |
| Finished | Sep 04 06:10:12 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=702300305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 380.usbdev_t x_rx_disruption.702300305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/380.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/381.usbdev_tx_rx_disruption.3426940231 |
| Short name | T3658 |
| Test name | |
| Test status | |
| Simulation time | 609164503 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 06:09:55 AM UTC 24 |
| Finished | Sep 04 06:09:58 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3426940231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 381.usbdev_ tx_rx_disruption.3426940231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/381.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/382.usbdev_tx_rx_disruption.1929697357 |
| Short name | T3654 |
| Test name | |
| Test status | |
| Simulation time | 454127153 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 06:09:55 AM UTC 24 |
| Finished | Sep 04 06:09:58 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1929697357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 382.usbdev_ tx_rx_disruption.1929697357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/382.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/383.usbdev_tx_rx_disruption.1114331298 |
| Short name | T3660 |
| Test name | |
| Test status | |
| Simulation time | 493273030 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 06:09:55 AM UTC 24 |
| Finished | Sep 04 06:09:58 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1114331298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 383.usbdev_ tx_rx_disruption.1114331298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/383.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/384.usbdev_tx_rx_disruption.3566224775 |
| Short name | T3661 |
| Test name | |
| Test status | |
| Simulation time | 529765608 ps |
| CPU time | 1.66 seconds |
| Started | Sep 04 06:09:55 AM UTC 24 |
| Finished | Sep 04 06:09:59 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3566224775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 384.usbdev_ tx_rx_disruption.3566224775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/384.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/385.usbdev_tx_rx_disruption.3488877676 |
| Short name | T3629 |
| Test name | |
| Test status | |
| Simulation time | 579499532 ps |
| CPU time | 1.77 seconds |
| Started | Sep 04 06:09:56 AM UTC 24 |
| Finished | Sep 04 06:09:59 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3488877676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 385.usbdev_ tx_rx_disruption.3488877676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/385.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/386.usbdev_tx_rx_disruption.2506491373 |
| Short name | T3662 |
| Test name | |
| Test status | |
| Simulation time | 464189490 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 06:09:56 AM UTC 24 |
| Finished | Sep 04 06:09:59 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2506491373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 386.usbdev_ tx_rx_disruption.2506491373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/386.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/387.usbdev_tx_rx_disruption.3347672953 |
| Short name | T3664 |
| Test name | |
| Test status | |
| Simulation time | 516117727 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 06:09:56 AM UTC 24 |
| Finished | Sep 04 06:09:59 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3347672953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 387.usbdev_ tx_rx_disruption.3347672953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/387.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/388.usbdev_tx_rx_disruption.2427877416 |
| Short name | T3626 |
| Test name | |
| Test status | |
| Simulation time | 510478720 ps |
| CPU time | 1.7 seconds |
| Started | Sep 04 06:09:56 AM UTC 24 |
| Finished | Sep 04 06:09:59 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2427877416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 388.usbdev_ tx_rx_disruption.2427877416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/388.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/389.usbdev_tx_rx_disruption.392878411 |
| Short name | T3669 |
| Test name | |
| Test status | |
| Simulation time | 503325142 ps |
| CPU time | 1.63 seconds |
| Started | Sep 04 06:09:56 AM UTC 24 |
| Finished | Sep 04 06:09:59 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=392878411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 389.usbdev_t x_rx_disruption.392878411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/389.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_alert_test.2015820881 |
| Short name | T2662 |
| Test name | |
| Test status | |
| Simulation time | 40116405 ps |
| CPU time | 1.06 seconds |
| Started | Sep 04 06:03:37 AM UTC 24 |
| Finished | Sep 04 06:03:39 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2015820881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 39.usbdev_alert_test.2015820881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_disconnect.4100664255 |
| Short name | T2635 |
| Test name | |
| Test status | |
| Simulation time | 6019509319 ps |
| CPU time | 12.4 seconds |
| Started | Sep 04 06:03:16 AM UTC 24 |
| Finished | Sep 04 06:03:29 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4100664255 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_disconnect.4100664255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_reset.3789446838 |
| Short name | T2652 |
| Test name | |
| Test status | |
| Simulation time | 13614448852 ps |
| CPU time | 18.48 seconds |
| Started | Sep 04 06:03:16 AM UTC 24 |
| Finished | Sep 04 06:03:35 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3789446838 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_reset.3789446838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_resume.2466847491 |
| Short name | T2713 |
| Test name | |
| Test status | |
| Simulation time | 30003807665 ps |
| CPU time | 38.95 seconds |
| Started | Sep 04 06:03:17 AM UTC 24 |
| Finished | Sep 04 06:03:58 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2466847491 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_resume.2466847491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_av_buffer.3380472158 |
| Short name | T2614 |
| Test name | |
| Test status | |
| Simulation time | 179315849 ps |
| CPU time | 1.2 seconds |
| Started | Sep 04 06:03:17 AM UTC 24 |
| Finished | Sep 04 06:03:19 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3380472158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_av_buffer.3380472158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_bitstuff_err.2134916177 |
| Short name | T2615 |
| Test name | |
| Test status | |
| Simulation time | 179181495 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 06:03:17 AM UTC 24 |
| Finished | Sep 04 06:03:20 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2134916177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_bitstuff_err.2134916177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_data_toggle_clear.3689574599 |
| Short name | T2616 |
| Test name | |
| Test status | |
| Simulation time | 194778423 ps |
| CPU time | 1.61 seconds |
| Started | Sep 04 06:03:17 AM UTC 24 |
| Finished | Sep 04 06:03:20 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3689574599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 39.usbdev_data_toggle_clear.3689574599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_data_toggle_restore.2390211618 |
| Short name | T2617 |
| Test name | |
| Test status | |
| Simulation time | 419145714 ps |
| CPU time | 1.6 seconds |
| Started | Sep 04 06:03:17 AM UTC 24 |
| Finished | Sep 04 06:03:20 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2390211618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_data_toggle_restore.2390211618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_device_address.2154096146 |
| Short name | T2692 |
| Test name | |
| Test status | |
| Simulation time | 17260830781 ps |
| CPU time | 32.48 seconds |
| Started | Sep 04 06:03:17 AM UTC 24 |
| Finished | Sep 04 06:03:51 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2154096146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_device_address.2154096146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_device_timeout.2634747607 |
| Short name | T2683 |
| Test name | |
| Test status | |
| Simulation time | 1256815316 ps |
| CPU time | 29.58 seconds |
| Started | Sep 04 06:03:18 AM UTC 24 |
| Finished | Sep 04 06:03:48 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2634747607 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_device_timeout.2634747607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_disable_endpoint.1261459735 |
| Short name | T2620 |
| Test name | |
| Test status | |
| Simulation time | 655363386 ps |
| CPU time | 3.16 seconds |
| Started | Sep 04 06:03:19 AM UTC 24 |
| Finished | Sep 04 06:03:23 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1261459735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 39.usbdev_disable_endpoint.1261459735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_disconnected.1030324704 |
| Short name | T2618 |
| Test name | |
| Test status | |
| Simulation time | 184639114 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 06:03:19 AM UTC 24 |
| Finished | Sep 04 06:03:21 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1030324704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_disconnected.1030324704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_enable.2301322814 |
| Short name | T2619 |
| Test name | |
| Test status | |
| Simulation time | 37757002 ps |
| CPU time | 1.11 seconds |
| Started | Sep 04 06:03:20 AM UTC 24 |
| Finished | Sep 04 06:03:22 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2301322814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 39.usbdev_enable.2301322814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_endpoint_access.2366722855 |
| Short name | T2626 |
| Test name | |
| Test status | |
| Simulation time | 981258904 ps |
| CPU time | 4.13 seconds |
| Started | Sep 04 06:03:20 AM UTC 24 |
| Finished | Sep 04 06:03:26 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2366722855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_endpoint_access.2366722855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_fifo_levels.2597696128 |
| Short name | T551 |
| Test name | |
| Test status | |
| Simulation time | 339335147 ps |
| CPU time | 2.07 seconds |
| Started | Sep 04 06:03:20 AM UTC 24 |
| Finished | Sep 04 06:03:24 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2597696128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_fifo_levels.2597696128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_fifo_rst.2215980887 |
| Short name | T2623 |
| Test name | |
| Test status | |
| Simulation time | 188535888 ps |
| CPU time | 1.63 seconds |
| Started | Sep 04 06:03:22 AM UTC 24 |
| Finished | Sep 04 06:03:24 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2215980887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_fifo_rst.2215980887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_in_iso.2812854127 |
| Short name | T2628 |
| Test name | |
| Test status | |
| Simulation time | 226843216 ps |
| CPU time | 1.66 seconds |
| Started | Sep 04 06:03:24 AM UTC 24 |
| Finished | Sep 04 06:03:27 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2812854127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 39.usbdev_in_iso.2812854127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_in_stall.2970815442 |
| Short name | T2627 |
| Test name | |
| Test status | |
| Simulation time | 145532576 ps |
| CPU time | 1.36 seconds |
| Started | Sep 04 06:03:24 AM UTC 24 |
| Finished | Sep 04 06:03:27 AM UTC 24 |
| Peak memory | 214780 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2970815442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_in_stall.2970815442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_in_trans.741966611 |
| Short name | T2630 |
| Test name | |
| Test status | |
| Simulation time | 296556192 ps |
| CPU time | 1.8 seconds |
| Started | Sep 04 06:03:25 AM UTC 24 |
| Finished | Sep 04 06:03:27 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=741966611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 39.usbdev_in_trans.741966611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_invalid_sync.1477792377 |
| Short name | T2726 |
| Test name | |
| Test status | |
| Simulation time | 4109830219 ps |
| CPU time | 38.46 seconds |
| Started | Sep 04 06:03:23 AM UTC 24 |
| Finished | Sep 04 06:04:03 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1477792377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 39.usbdev_invalid_sync.1477792377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_iso_retraction.3687034420 |
| Short name | T2828 |
| Test name | |
| Test status | |
| Simulation time | 11462186826 ps |
| CPU time | 85.28 seconds |
| Started | Sep 04 06:03:25 AM UTC 24 |
| Finished | Sep 04 06:04:52 AM UTC 24 |
| Peak memory | 217448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3687034420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_iso_retraction.3687034420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_link_in_err.3366548455 |
| Short name | T2629 |
| Test name | |
| Test status | |
| Simulation time | 189968464 ps |
| CPU time | 1.55 seconds |
| Started | Sep 04 06:03:25 AM UTC 24 |
| Finished | Sep 04 06:03:27 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3366548455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_link_in_err.3366548455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_link_resume.2111495020 |
| Short name | T2771 |
| Test name | |
| Test status | |
| Simulation time | 33090964414 ps |
| CPU time | 60.78 seconds |
| Started | Sep 04 06:03:25 AM UTC 24 |
| Finished | Sep 04 06:04:27 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2111495020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_link_resume.2111495020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_link_suspend.113235534 |
| Short name | T2670 |
| Test name | |
| Test status | |
| Simulation time | 4942838335 ps |
| CPU time | 13.68 seconds |
| Started | Sep 04 06:03:26 AM UTC 24 |
| Finished | Sep 04 06:03:41 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=113235534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_link_suspend.113235534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_low_speed_traffic.3061737085 |
| Short name | T2714 |
| Test name | |
| Test status | |
| Simulation time | 4322998051 ps |
| CPU time | 30.58 seconds |
| Started | Sep 04 06:03:26 AM UTC 24 |
| Finished | Sep 04 06:03:58 AM UTC 24 |
| Peak memory | 234040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3061737085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_low_speed_traffic.3061737085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_max_inter_pkt_delay.1884379345 |
| Short name | T2694 |
| Test name | |
| Test status | |
| Simulation time | 2576462992 ps |
| CPU time | 24.43 seconds |
| Started | Sep 04 06:03:26 AM UTC 24 |
| Finished | Sep 04 06:03:52 AM UTC 24 |
| Peak memory | 227732 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1884379345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_max_inter_pkt_delay.1884379345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_max_length_in_transaction.4158903741 |
| Short name | T2634 |
| Test name | |
| Test status | |
| Simulation time | 243646571 ps |
| CPU time | 1.88 seconds |
| Started | Sep 04 06:03:26 AM UTC 24 |
| Finished | Sep 04 06:03:29 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4158903741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 39.usbdev_max_length_in_transaction.4158903741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_max_length_out_transaction.4175476399 |
| Short name | T2636 |
| Test name | |
| Test status | |
| Simulation time | 192199239 ps |
| CPU time | 1.6 seconds |
| Started | Sep 04 06:03:27 AM UTC 24 |
| Finished | Sep 04 06:03:30 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4175476399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 39.usbdev_max_length_out_transaction.4175476399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_min_inter_pkt_delay.9498228 |
| Short name | T2731 |
| Test name | |
| Test status | |
| Simulation time | 3740027278 ps |
| CPU time | 35.35 seconds |
| Started | Sep 04 06:03:29 AM UTC 24 |
| Finished | Sep 04 06:04:06 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=9498228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TES T_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs /coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_min_inter_pkt_delay.9498228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_min_length_in_transaction.3223066098 |
| Short name | T2640 |
| Test name | |
| Test status | |
| Simulation time | 217250291 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 06:03:29 AM UTC 24 |
| Finished | Sep 04 06:03:31 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3223066098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 39.usbdev_min_length_in_transaction.3223066098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_min_length_out_transaction.283440513 |
| Short name | T2641 |
| Test name | |
| Test status | |
| Simulation time | 181328259 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 06:03:29 AM UTC 24 |
| Finished | Sep 04 06:03:31 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=283440513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 39.usbdev_min_length_out_transaction.283440513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_nak_trans.3636587242 |
| Short name | T143 |
| Test name | |
| Test status | |
| Simulation time | 209424950 ps |
| CPU time | 1.63 seconds |
| Started | Sep 04 06:03:29 AM UTC 24 |
| Finished | Sep 04 06:03:32 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3636587242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_nak_trans.3636587242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_out_iso.407900127 |
| Short name | T2642 |
| Test name | |
| Test status | |
| Simulation time | 162838614 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 06:03:29 AM UTC 24 |
| Finished | Sep 04 06:03:32 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=407900127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 39.usbdev_out_iso.407900127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_out_stall.558174704 |
| Short name | T2644 |
| Test name | |
| Test status | |
| Simulation time | 164810274 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 06:03:30 AM UTC 24 |
| Finished | Sep 04 06:03:33 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=558174704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_out_stall.558174704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_out_trans_nak.935185584 |
| Short name | T2645 |
| Test name | |
| Test status | |
| Simulation time | 218500002 ps |
| CPU time | 1.62 seconds |
| Started | Sep 04 06:03:30 AM UTC 24 |
| Finished | Sep 04 06:03:33 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=935185584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_out_trans_nak.935185584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_pending_in_trans.2352709377 |
| Short name | T2646 |
| Test name | |
| Test status | |
| Simulation time | 246480903 ps |
| CPU time | 1.83 seconds |
| Started | Sep 04 06:03:30 AM UTC 24 |
| Finished | Sep 04 06:03:33 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2352709377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 39.usbdev_pending_in_trans.2352709377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_phy_config_pinflip.903032065 |
| Short name | T2649 |
| Test name | |
| Test status | |
| Simulation time | 241752698 ps |
| CPU time | 1.76 seconds |
| Started | Sep 04 06:03:32 AM UTC 24 |
| Finished | Sep 04 06:03:34 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=903032065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 39.usbdev_phy_config_pinflip.903032065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_phy_config_usb_ref_disable.435690096 |
| Short name | T2648 |
| Test name | |
| Test status | |
| Simulation time | 192603794 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 06:03:32 AM UTC 24 |
| Finished | Sep 04 06:03:34 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=435690096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 39.usbdev_phy_config_usb_ref_disable.435690096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_phy_pins_sense.576371481 |
| Short name | T2647 |
| Test name | |
| Test status | |
| Simulation time | 34662357 ps |
| CPU time | 1.05 seconds |
| Started | Sep 04 06:03:32 AM UTC 24 |
| Finished | Sep 04 06:03:34 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=576371481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 39.usbdev_phy_pins_sense.576371481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_buffer.2300028916 |
| Short name | T2794 |
| Test name | |
| Test status | |
| Simulation time | 21361929986 ps |
| CPU time | 62.25 seconds |
| Started | Sep 04 06:03:33 AM UTC 24 |
| Finished | Sep 04 06:04:37 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2300028916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_pkt_buffer.2300028916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_received.2400716324 |
| Short name | T2653 |
| Test name | |
| Test status | |
| Simulation time | 178751906 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 06:03:33 AM UTC 24 |
| Finished | Sep 04 06:03:36 AM UTC 24 |
| Peak memory | 214900 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2400716324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_pkt_received.2400716324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_sent.1686917111 |
| Short name | T2654 |
| Test name | |
| Test status | |
| Simulation time | 223473253 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 06:03:33 AM UTC 24 |
| Finished | Sep 04 06:03:36 AM UTC 24 |
| Peak memory | 217012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1686917111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_pkt_sent.1686917111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_random_length_in_transaction.2308936390 |
| Short name | T2656 |
| Test name | |
| Test status | |
| Simulation time | 246341185 ps |
| CPU time | 1.6 seconds |
| Started | Sep 04 06:03:33 AM UTC 24 |
| Finished | Sep 04 06:03:36 AM UTC 24 |
| Peak memory | 214952 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2308936390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 39.usbdev_random_length_in_transaction.2308936390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_random_length_out_transaction.925219403 |
| Short name | T2655 |
| Test name | |
| Test status | |
| Simulation time | 192515461 ps |
| CPU time | 1.35 seconds |
| Started | Sep 04 06:03:33 AM UTC 24 |
| Finished | Sep 04 06:03:36 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=925219403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 39.usbdev_random_length_out_transaction.925219403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_rx_crc_err.1361369262 |
| Short name | T2657 |
| Test name | |
| Test status | |
| Simulation time | 133804166 ps |
| CPU time | 1.04 seconds |
| Started | Sep 04 06:03:34 AM UTC 24 |
| Finished | Sep 04 06:03:37 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1361369262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_rx_crc_err.1361369262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_rx_full.3763160998 |
| Short name | T528 |
| Test name | |
| Test status | |
| Simulation time | 263220763 ps |
| CPU time | 1.33 seconds |
| Started | Sep 04 06:03:35 AM UTC 24 |
| Finished | Sep 04 06:03:37 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3763160998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 39.usbdev_rx_full.3763160998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_setup_stage.2938112121 |
| Short name | T2658 |
| Test name | |
| Test status | |
| Simulation time | 155609421 ps |
| CPU time | 1.33 seconds |
| Started | Sep 04 06:03:35 AM UTC 24 |
| Finished | Sep 04 06:03:37 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2938112121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_setup_stage.2938112121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_setup_trans_ignored.361086504 |
| Short name | T2659 |
| Test name | |
| Test status | |
| Simulation time | 151586897 ps |
| CPU time | 1.27 seconds |
| Started | Sep 04 06:03:35 AM UTC 24 |
| Finished | Sep 04 06:03:37 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=361086504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 39.usbdev_setup_trans_ignored.361086504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_smoke.2676569730 |
| Short name | T2663 |
| Test name | |
| Test status | |
| Simulation time | 222807058 ps |
| CPU time | 1.57 seconds |
| Started | Sep 04 06:03:36 AM UTC 24 |
| Finished | Sep 04 06:03:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2676569730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_smoke.2676569730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_spurious_pids_ignored.2519634501 |
| Short name | T2722 |
| Test name | |
| Test status | |
| Simulation time | 2794852970 ps |
| CPU time | 23.82 seconds |
| Started | Sep 04 06:03:36 AM UTC 24 |
| Finished | Sep 04 06:04:02 AM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2519634501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 39.usbdev_spurious_pids_ignored.2519634501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_stall_priority_over_nak.1735930659 |
| Short name | T2665 |
| Test name | |
| Test status | |
| Simulation time | 238136503 ps |
| CPU time | 1.64 seconds |
| Started | Sep 04 06:03:36 AM UTC 24 |
| Finished | Sep 04 06:03:39 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1735930659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_stall_priority_over_nak.1735930659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_stall_trans.959457618 |
| Short name | T2664 |
| Test name | |
| Test status | |
| Simulation time | 162429128 ps |
| CPU time | 1.35 seconds |
| Started | Sep 04 06:03:37 AM UTC 24 |
| Finished | Sep 04 06:03:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=959457618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_stall_trans.959457618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_stream_len_max.96086582 |
| Short name | T2668 |
| Test name | |
| Test status | |
| Simulation time | 622686998 ps |
| CPU time | 2.59 seconds |
| Started | Sep 04 06:03:37 AM UTC 24 |
| Finished | Sep 04 06:03:40 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=96086582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_stream_len_max.96086582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_streaming_out.2895683570 |
| Short name | T2942 |
| Test name | |
| Test status | |
| Simulation time | 4111005440 ps |
| CPU time | 117.46 seconds |
| Started | Sep 04 06:03:37 AM UTC 24 |
| Finished | Sep 04 06:05:36 AM UTC 24 |
| Peak memory | 229104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2895683570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_streaming_out.2895683570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_timeout_missing_host_handshake.2775594983 |
| Short name | T2680 |
| Test name | |
| Test status | |
| Simulation time | 1322688240 ps |
| CPU time | 27.32 seconds |
| Started | Sep 04 06:03:19 AM UTC 24 |
| Finished | Sep 04 06:03:47 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2775594983 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_timeout_missing_host_handshake.2775594983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/39.usbdev_tx_rx_disruption.750224918 |
| Short name | T2669 |
| Test name | |
| Test status | |
| Simulation time | 501427556 ps |
| CPU time | 2.66 seconds |
| Started | Sep 04 06:03:37 AM UTC 24 |
| Finished | Sep 04 06:03:40 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=750224918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_tx _rx_disruption.750224918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/39.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/390.usbdev_tx_rx_disruption.3358443569 |
| Short name | T3665 |
| Test name | |
| Test status | |
| Simulation time | 499855043 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 06:09:56 AM UTC 24 |
| Finished | Sep 04 06:09:59 AM UTC 24 |
| Peak memory | 215016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3358443569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 390.usbdev_ tx_rx_disruption.3358443569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/390.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/391.usbdev_tx_rx_disruption.1761841894 |
| Short name | T3670 |
| Test name | |
| Test status | |
| Simulation time | 590166223 ps |
| CPU time | 1.94 seconds |
| Started | Sep 04 06:09:56 AM UTC 24 |
| Finished | Sep 04 06:09:59 AM UTC 24 |
| Peak memory | 214992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1761841894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 391.usbdev_ tx_rx_disruption.1761841894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/391.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/392.usbdev_tx_rx_disruption.1231788141 |
| Short name | T3653 |
| Test name | |
| Test status | |
| Simulation time | 550346060 ps |
| CPU time | 1.66 seconds |
| Started | Sep 04 06:09:57 AM UTC 24 |
| Finished | Sep 04 06:09:59 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1231788141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 392.usbdev_ tx_rx_disruption.1231788141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/392.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/393.usbdev_tx_rx_disruption.3016802623 |
| Short name | T3703 |
| Test name | |
| Test status | |
| Simulation time | 611338496 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 06:09:57 AM UTC 24 |
| Finished | Sep 04 06:10:09 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3016802623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 393.usbdev_ tx_rx_disruption.3016802623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/393.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/394.usbdev_tx_rx_disruption.86512601 |
| Short name | T3702 |
| Test name | |
| Test status | |
| Simulation time | 501006517 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 06:09:57 AM UTC 24 |
| Finished | Sep 04 06:10:09 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=86512601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 394.usbdev_tx _rx_disruption.86512601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/394.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/395.usbdev_tx_rx_disruption.2196152736 |
| Short name | T3704 |
| Test name | |
| Test status | |
| Simulation time | 602157635 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 06:09:57 AM UTC 24 |
| Finished | Sep 04 06:10:09 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2196152736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 395.usbdev_ tx_rx_disruption.2196152736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/395.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/396.usbdev_tx_rx_disruption.1851046293 |
| Short name | T3724 |
| Test name | |
| Test status | |
| Simulation time | 665324263 ps |
| CPU time | 1.85 seconds |
| Started | Sep 04 06:09:59 AM UTC 24 |
| Finished | Sep 04 06:10:12 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1851046293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 396.usbdev_ tx_rx_disruption.1851046293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/396.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/397.usbdev_tx_rx_disruption.3576619849 |
| Short name | T3722 |
| Test name | |
| Test status | |
| Simulation time | 528986295 ps |
| CPU time | 1.68 seconds |
| Started | Sep 04 06:09:59 AM UTC 24 |
| Finished | Sep 04 06:10:12 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3576619849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 397.usbdev_ tx_rx_disruption.3576619849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/397.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/398.usbdev_tx_rx_disruption.454433256 |
| Short name | T3721 |
| Test name | |
| Test status | |
| Simulation time | 632472656 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 06:09:59 AM UTC 24 |
| Finished | Sep 04 06:10:12 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=454433256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 398.usbdev_t x_rx_disruption.454433256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/398.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/399.usbdev_tx_rx_disruption.168671976 |
| Short name | T3723 |
| Test name | |
| Test status | |
| Simulation time | 575989168 ps |
| CPU time | 1.64 seconds |
| Started | Sep 04 06:09:59 AM UTC 24 |
| Finished | Sep 04 06:10:12 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=168671976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 399.usbdev_t x_rx_disruption.168671976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/399.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_alert_test.2768411987 |
| Short name | T758 |
| Test name | |
| Test status | |
| Simulation time | 48728066 ps |
| CPU time | 0.98 seconds |
| Started | Sep 04 05:46:06 AM UTC 24 |
| Finished | Sep 04 05:46:08 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2768411987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 4.usbdev_alert_test.2768411987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_disconnect.4265992602 |
| Short name | T711 |
| Test name | |
| Test status | |
| Simulation time | 5760434772 ps |
| CPU time | 13.6 seconds |
| Started | Sep 04 05:44:52 AM UTC 24 |
| Finished | Sep 04 05:45:07 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4265992602 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_disconnect.4265992602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_reset.4127278875 |
| Short name | T728 |
| Test name | |
| Test status | |
| Simulation time | 21287993272 ps |
| CPU time | 42.63 seconds |
| Started | Sep 04 05:44:52 AM UTC 24 |
| Finished | Sep 04 05:45:36 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4127278875 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_reset.4127278875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_resume.400458146 |
| Short name | T746 |
| Test name | |
| Test status | |
| Simulation time | 29281577799 ps |
| CPU time | 64.34 seconds |
| Started | Sep 04 05:44:53 AM UTC 24 |
| Finished | Sep 04 05:45:59 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=400458146 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_resume.400458146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_av_buffer.2116188170 |
| Short name | T704 |
| Test name | |
| Test status | |
| Simulation time | 169489643 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 05:44:53 AM UTC 24 |
| Finished | Sep 04 05:44:55 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2116188170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_av_buffer.2116188170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_av_empty.118688422 |
| Short name | T58 |
| Test name | |
| Test status | |
| Simulation time | 203218223 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 05:44:54 AM UTC 24 |
| Finished | Sep 04 05:44:57 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=118688422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_av_empty.118688422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_av_overflow.2351152305 |
| Short name | T88 |
| Test name | |
| Test status | |
| Simulation time | 133747169 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 05:44:54 AM UTC 24 |
| Finished | Sep 04 05:44:57 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2351152305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_av_overflow.2351152305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_bitstuff_err.1402890212 |
| Short name | T706 |
| Test name | |
| Test status | |
| Simulation time | 165915978 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 05:44:54 AM UTC 24 |
| Finished | Sep 04 05:44:57 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1402890212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_bitstuff_err.1402890212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_data_toggle_clear.4228763151 |
| Short name | T707 |
| Test name | |
| Test status | |
| Simulation time | 450013399 ps |
| CPU time | 2.81 seconds |
| Started | Sep 04 05:44:54 AM UTC 24 |
| Finished | Sep 04 05:44:58 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4228763151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 4.usbdev_data_toggle_clear.4228763151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_data_toggle_restore.1057504783 |
| Short name | T492 |
| Test name | |
| Test status | |
| Simulation time | 753546994 ps |
| CPU time | 3.79 seconds |
| Started | Sep 04 05:44:57 AM UTC 24 |
| Finished | Sep 04 05:45:01 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1057504783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_data_toggle_restore.1057504783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_device_timeout.3318816431 |
| Short name | T755 |
| Test name | |
| Test status | |
| Simulation time | 9058797004 ps |
| CPU time | 65.86 seconds |
| Started | Sep 04 05:44:58 AM UTC 24 |
| Finished | Sep 04 05:46:06 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3318816431 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_device_timeout.3318816431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_disable_endpoint.4281372697 |
| Short name | T307 |
| Test name | |
| Test status | |
| Simulation time | 743728977 ps |
| CPU time | 3.25 seconds |
| Started | Sep 04 05:44:58 AM UTC 24 |
| Finished | Sep 04 05:45:02 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4281372697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_disable_endpoint.4281372697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_disconnected.1086532908 |
| Short name | T708 |
| Test name | |
| Test status | |
| Simulation time | 189135291 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 05:44:59 AM UTC 24 |
| Finished | Sep 04 05:45:02 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1086532908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_disconnected.1086532908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_enable.1969029767 |
| Short name | T710 |
| Test name | |
| Test status | |
| Simulation time | 73188917 ps |
| CPU time | 1.15 seconds |
| Started | Sep 04 05:45:02 AM UTC 24 |
| Finished | Sep 04 05:45:04 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1969029767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 4.usbdev_enable.1969029767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_endpoint_access.3114583308 |
| Short name | T712 |
| Test name | |
| Test status | |
| Simulation time | 915314291 ps |
| CPU time | 4.42 seconds |
| Started | Sep 04 05:45:02 AM UTC 24 |
| Finished | Sep 04 05:45:08 AM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3114583308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_endpoint_access.3114583308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_endpoint_types.196990697 |
| Short name | T400 |
| Test name | |
| Test status | |
| Simulation time | 223318932 ps |
| CPU time | 1.66 seconds |
| Started | Sep 04 05:45:04 AM UTC 24 |
| Finished | Sep 04 05:45:07 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=196990697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 4.usbdev_endpoint_types.196990697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_fifo_levels.2132094780 |
| Short name | T559 |
| Test name | |
| Test status | |
| Simulation time | 184815052 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 05:45:04 AM UTC 24 |
| Finished | Sep 04 05:45:07 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2132094780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_fifo_levels.2132094780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_fifo_rst.1855985431 |
| Short name | T715 |
| Test name | |
| Test status | |
| Simulation time | 522771949 ps |
| CPU time | 4.26 seconds |
| Started | Sep 04 05:45:06 AM UTC 24 |
| Finished | Sep 04 05:45:11 AM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1855985431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_fifo_rst.1855985431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_freq_hiclk.1314015740 |
| Short name | T920 |
| Test name | |
| Test status | |
| Simulation time | 84172504073 ps |
| CPU time | 201.65 seconds |
| Started | Sep 04 05:45:06 AM UTC 24 |
| Finished | Sep 04 05:48:31 AM UTC 24 |
| Peak memory | 217416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1314015740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_hiclk.1314015740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_freq_hiclk_max.2840754142 |
| Short name | T872 |
| Test name | |
| Test status | |
| Simulation time | 85151939355 ps |
| CPU time | 161.64 seconds |
| Started | Sep 04 05:45:07 AM UTC 24 |
| Finished | Sep 04 05:47:52 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=2840754142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 4.usbdev_freq_hiclk_max.2840754142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_freq_loclk.25583178 |
| Short name | T959 |
| Test name | |
| Test status | |
| Simulation time | 98109826613 ps |
| CPU time | 227.83 seconds |
| Started | Sep 04 05:45:07 AM UTC 24 |
| Finished | Sep 04 05:48:59 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=25583178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_loclk.25583178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_freq_loclk_max.3869899613 |
| Short name | T895 |
| Test name | |
| Test status | |
| Simulation time | 97933172165 ps |
| CPU time | 185.66 seconds |
| Started | Sep 04 05:45:07 AM UTC 24 |
| Finished | Sep 04 05:48:16 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=3869899613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 4.usbdev_freq_loclk_max.3869899613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_in_iso.1402660851 |
| Short name | T716 |
| Test name | |
| Test status | |
| Simulation time | 221462212 ps |
| CPU time | 1.92 seconds |
| Started | Sep 04 05:45:10 AM UTC 24 |
| Finished | Sep 04 05:45:13 AM UTC 24 |
| Peak memory | 227476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1402660851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 4.usbdev_in_iso.1402660851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_in_stall.875817756 |
| Short name | T717 |
| Test name | |
| Test status | |
| Simulation time | 136644371 ps |
| CPU time | 1.36 seconds |
| Started | Sep 04 05:45:12 AM UTC 24 |
| Finished | Sep 04 05:45:14 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=875817756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_in_stall.875817756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_in_trans.4177629534 |
| Short name | T719 |
| Test name | |
| Test status | |
| Simulation time | 160511289 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 05:45:14 AM UTC 24 |
| Finished | Sep 04 05:45:17 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4177629534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_in_trans.4177629534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_invalid_sync.898323696 |
| Short name | T186 |
| Test name | |
| Test status | |
| Simulation time | 3037615803 ps |
| CPU time | 21.71 seconds |
| Started | Sep 04 05:45:09 AM UTC 24 |
| Finished | Sep 04 05:45:32 AM UTC 24 |
| Peak memory | 229740 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=898323696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 4.usbdev_invalid_sync.898323696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_iso_retraction.2214095018 |
| Short name | T748 |
| Test name | |
| Test status | |
| Simulation time | 4090640479 ps |
| CPU time | 43.55 seconds |
| Started | Sep 04 05:45:16 AM UTC 24 |
| Finished | Sep 04 05:46:01 AM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2214095018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_iso_retraction.2214095018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_link_in_err.1602858434 |
| Short name | T720 |
| Test name | |
| Test status | |
| Simulation time | 241243823 ps |
| CPU time | 1.67 seconds |
| Started | Sep 04 05:45:16 AM UTC 24 |
| Finished | Sep 04 05:45:18 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1602858434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_link_in_err.1602858434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_link_suspend.3975198213 |
| Short name | T699 |
| Test name | |
| Test status | |
| Simulation time | 4707267570 ps |
| CPU time | 7.56 seconds |
| Started | Sep 04 05:45:19 AM UTC 24 |
| Finished | Sep 04 05:45:28 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3975198213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_link_suspend.3975198213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_low_speed_traffic.3277867589 |
| Short name | T747 |
| Test name | |
| Test status | |
| Simulation time | 5027677707 ps |
| CPU time | 35.42 seconds |
| Started | Sep 04 05:45:22 AM UTC 24 |
| Finished | Sep 04 05:45:59 AM UTC 24 |
| Peak memory | 229580 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3277867589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_low_speed_traffic.3277867589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_max_inter_pkt_delay.4188229049 |
| Short name | T838 |
| Test name | |
| Test status | |
| Simulation time | 3809247879 ps |
| CPU time | 114.85 seconds |
| Started | Sep 04 05:45:24 AM UTC 24 |
| Finished | Sep 04 05:47:21 AM UTC 24 |
| Peak memory | 227612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4188229049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_inter_pkt_delay.4188229049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_max_length_in_transaction.1671240721 |
| Short name | T725 |
| Test name | |
| Test status | |
| Simulation time | 266250747 ps |
| CPU time | 1.69 seconds |
| Started | Sep 04 05:45:30 AM UTC 24 |
| Finished | Sep 04 05:45:32 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1671240721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_max_length_in_transaction.1671240721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_max_length_out_transaction.1830987501 |
| Short name | T457 |
| Test name | |
| Test status | |
| Simulation time | 220739012 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 05:45:30 AM UTC 24 |
| Finished | Sep 04 05:45:32 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1830987501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 4.usbdev_max_length_out_transaction.1830987501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_max_non_iso_usb_traffic.2422753257 |
| Short name | T781 |
| Test name | |
| Test status | |
| Simulation time | 1864033971 ps |
| CPU time | 60.89 seconds |
| Started | Sep 04 05:45:30 AM UTC 24 |
| Finished | Sep 04 05:46:32 AM UTC 24 |
| Peak memory | 229584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2422753257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_non_iso_usb_traffic.2422753257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_max_usb_traffic.1150361629 |
| Short name | T761 |
| Test name | |
| Test status | |
| Simulation time | 1637580596 ps |
| CPU time | 39.41 seconds |
| Started | Sep 04 05:45:31 AM UTC 24 |
| Finished | Sep 04 05:46:12 AM UTC 24 |
| Peak memory | 227416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1150361629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_usb_traffic.1150361629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_min_inter_pkt_delay.1994410285 |
| Short name | T802 |
| Test name | |
| Test status | |
| Simulation time | 2353340431 ps |
| CPU time | 74.64 seconds |
| Started | Sep 04 05:45:32 AM UTC 24 |
| Finished | Sep 04 05:46:49 AM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1994410285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_min_inter_pkt_delay.1994410285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_min_length_in_transaction.4058505307 |
| Short name | T726 |
| Test name | |
| Test status | |
| Simulation time | 172680641 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 05:45:33 AM UTC 24 |
| Finished | Sep 04 05:45:35 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4058505307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_min_length_in_transaction.4058505307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_min_length_out_transaction.268192799 |
| Short name | T727 |
| Test name | |
| Test status | |
| Simulation time | 137385020 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 05:45:33 AM UTC 24 |
| Finished | Sep 04 05:45:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=268192799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 4.usbdev_min_length_out_transaction.268192799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_nak_trans.2100335403 |
| Short name | T121 |
| Test name | |
| Test status | |
| Simulation time | 224812037 ps |
| CPU time | 1.6 seconds |
| Started | Sep 04 05:45:33 AM UTC 24 |
| Finished | Sep 04 05:45:35 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2100335403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_nak_trans.2100335403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_out_iso.3672338416 |
| Short name | T705 |
| Test name | |
| Test status | |
| Simulation time | 189608198 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 05:45:34 AM UTC 24 |
| Finished | Sep 04 05:45:36 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3672338416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_out_iso.3672338416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_out_stall.1390187302 |
| Short name | T730 |
| Test name | |
| Test status | |
| Simulation time | 222098978 ps |
| CPU time | 1.66 seconds |
| Started | Sep 04 05:45:36 AM UTC 24 |
| Finished | Sep 04 05:45:39 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1390187302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_out_stall.1390187302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_out_trans_nak.1394119772 |
| Short name | T729 |
| Test name | |
| Test status | |
| Simulation time | 177018949 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 05:45:36 AM UTC 24 |
| Finished | Sep 04 05:45:39 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1394119772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 4.usbdev_out_trans_nak.1394119772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_pending_in_trans.3773255644 |
| Short name | T169 |
| Test name | |
| Test status | |
| Simulation time | 154673924 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 05:45:36 AM UTC 24 |
| Finished | Sep 04 05:45:39 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3773255644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_pending_in_trans.3773255644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_pinflip.648802099 |
| Short name | T731 |
| Test name | |
| Test status | |
| Simulation time | 255549965 ps |
| CPU time | 1.91 seconds |
| Started | Sep 04 05:45:37 AM UTC 24 |
| Finished | Sep 04 05:45:40 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=648802099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_pinflip.648802099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_rand_bus_type.4224202986 |
| Short name | T732 |
| Test name | |
| Test status | |
| Simulation time | 289428616 ps |
| CPU time | 1.98 seconds |
| Started | Sep 04 05:45:37 AM UTC 24 |
| Finished | Sep 04 05:45:40 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4224202986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 4.usbdev_phy_config_rand_bus_type.4224202986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_usb_ref_disable.1858127372 |
| Short name | T733 |
| Test name | |
| Test status | |
| Simulation time | 213559803 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 05:45:40 AM UTC 24 |
| Finished | Sep 04 05:45:42 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1858127372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_usb_ref_disable.1858127372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_phy_pins_sense.4078390994 |
| Short name | T40 |
| Test name | |
| Test status | |
| Simulation time | 45999396 ps |
| CPU time | 1.1 seconds |
| Started | Sep 04 05:45:40 AM UTC 24 |
| Finished | Sep 04 05:45:42 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4078390994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_pins_sense.4078390994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_buffer.195050036 |
| Short name | T252 |
| Test name | |
| Test status | |
| Simulation time | 7755744407 ps |
| CPU time | 24.29 seconds |
| Started | Sep 04 05:45:40 AM UTC 24 |
| Finished | Sep 04 05:46:05 AM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=195050036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_pkt_buffer.195050036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_received.281838742 |
| Short name | T735 |
| Test name | |
| Test status | |
| Simulation time | 151707524 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 05:45:41 AM UTC 24 |
| Finished | Sep 04 05:45:43 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=281838742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_pkt_received.281838742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_sent.1320851944 |
| Short name | T734 |
| Test name | |
| Test status | |
| Simulation time | 174924450 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 05:45:41 AM UTC 24 |
| Finished | Sep 04 05:45:43 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1320851944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_pkt_sent.1320851944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_rand_bus_disconnects.1561342612 |
| Short name | T812 |
| Test name | |
| Test status | |
| Simulation time | 7450927203 ps |
| CPU time | 74.29 seconds |
| Started | Sep 04 05:45:44 AM UTC 24 |
| Finished | Sep 04 05:47:00 AM UTC 24 |
| Peak memory | 234168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1561342612 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_bus_disconnects.1561342612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_rand_bus_resets.1985576405 |
| Short name | T768 |
| Test name | |
| Test status | |
| Simulation time | 5437227981 ps |
| CPU time | 32.97 seconds |
| Started | Sep 04 05:45:44 AM UTC 24 |
| Finished | Sep 04 05:46:19 AM UTC 24 |
| Peak memory | 234052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1985576405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_bus_resets.1985576405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_rand_suspends.479722726 |
| Short name | T753 |
| Test name | |
| Test status | |
| Simulation time | 4983881220 ps |
| CPU time | 17.48 seconds |
| Started | Sep 04 05:45:45 AM UTC 24 |
| Finished | Sep 04 05:46:04 AM UTC 24 |
| Peak memory | 229588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=479722726 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_suspends.479722726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_random_length_in_transaction.57077811 |
| Short name | T736 |
| Test name | |
| Test status | |
| Simulation time | 213186097 ps |
| CPU time | 1.72 seconds |
| Started | Sep 04 05:45:42 AM UTC 24 |
| Finished | Sep 04 05:45:45 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=57077811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_random_length_in_transaction.57077811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_random_length_out_transaction.173757215 |
| Short name | T737 |
| Test name | |
| Test status | |
| Simulation time | 168649418 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 05:45:43 AM UTC 24 |
| Finished | Sep 04 05:45:46 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=173757215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 4.usbdev_random_length_out_transaction.173757215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_resume_link_active.1223332167 |
| Short name | T770 |
| Test name | |
| Test status | |
| Simulation time | 20230183295 ps |
| CPU time | 34.83 seconds |
| Started | Sep 04 05:45:47 AM UTC 24 |
| Finished | Sep 04 05:46:23 AM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1223332167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 4.usbdev_resume_link_active.1223332167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_rx_crc_err.1391238464 |
| Short name | T740 |
| Test name | |
| Test status | |
| Simulation time | 182147520 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 05:45:48 AM UTC 24 |
| Finished | Sep 04 05:45:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1391238464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_rx_crc_err.1391238464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_rx_full.1264455184 |
| Short name | T742 |
| Test name | |
| Test status | |
| Simulation time | 316678973 ps |
| CPU time | 2.02 seconds |
| Started | Sep 04 05:45:51 AM UTC 24 |
| Finished | Sep 04 05:45:54 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1264455184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_rx_full.1264455184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_rx_pid_err.1474989667 |
| Short name | T741 |
| Test name | |
| Test status | |
| Simulation time | 161038427 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 05:45:51 AM UTC 24 |
| Finished | Sep 04 05:45:53 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1474989667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_rx_pid_err.1474989667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_sec_cm.1214342420 |
| Short name | T224 |
| Test name | |
| Test status | |
| Simulation time | 1189691346 ps |
| CPU time | 3.78 seconds |
| Started | Sep 04 05:46:06 AM UTC 24 |
| Finished | Sep 04 05:46:11 AM UTC 24 |
| Peak memory | 251604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1214342420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 4.usbdev_sec_cm.1214342420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_setup_priority.336734161 |
| Short name | T744 |
| Test name | |
| Test status | |
| Simulation time | 390932381 ps |
| CPU time | 2.29 seconds |
| Started | Sep 04 05:45:54 AM UTC 24 |
| Finished | Sep 04 05:45:57 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=336734161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 4.usbdev_setup_priority.336734161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_setup_priority_over_stall_response.3719052498 |
| Short name | T172 |
| Test name | |
| Test status | |
| Simulation time | 358984053 ps |
| CPU time | 2.1 seconds |
| Started | Sep 04 05:45:55 AM UTC 24 |
| Finished | Sep 04 05:45:58 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3719052498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 4.usbdev_setup_priority_over_stall_response.3719052498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_setup_stage.1209765582 |
| Short name | T745 |
| Test name | |
| Test status | |
| Simulation time | 166568058 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 05:45:56 AM UTC 24 |
| Finished | Sep 04 05:45:59 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1209765582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_setup_stage.1209765582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_setup_trans_ignored.3220328735 |
| Short name | T749 |
| Test name | |
| Test status | |
| Simulation time | 155584104 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 05:45:59 AM UTC 24 |
| Finished | Sep 04 05:46:01 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3220328735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 4.usbdev_setup_trans_ignored.3220328735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_smoke.1103882310 |
| Short name | T752 |
| Test name | |
| Test status | |
| Simulation time | 196735432 ps |
| CPU time | 1.75 seconds |
| Started | Sep 04 05:46:00 AM UTC 24 |
| Finished | Sep 04 05:46:03 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1103882310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_smoke.1103882310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_spurious_pids_ignored.1974534723 |
| Short name | T772 |
| Test name | |
| Test status | |
| Simulation time | 1756349958 ps |
| CPU time | 23.08 seconds |
| Started | Sep 04 05:46:00 AM UTC 24 |
| Finished | Sep 04 05:46:24 AM UTC 24 |
| Peak memory | 229552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1974534723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 4.usbdev_spurious_pids_ignored.1974534723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_stall_priority_over_nak.3904444552 |
| Short name | T750 |
| Test name | |
| Test status | |
| Simulation time | 177328847 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 05:46:00 AM UTC 24 |
| Finished | Sep 04 05:46:03 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3904444552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stall_priority_over_nak.3904444552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_stall_trans.1865727130 |
| Short name | T751 |
| Test name | |
| Test status | |
| Simulation time | 195448955 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 05:46:00 AM UTC 24 |
| Finished | Sep 04 05:46:03 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1865727130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_stall_trans.1865727130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_stream_len_max.3708220561 |
| Short name | T757 |
| Test name | |
| Test status | |
| Simulation time | 884531788 ps |
| CPU time | 4.63 seconds |
| Started | Sep 04 05:46:01 AM UTC 24 |
| Finished | Sep 04 05:46:07 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3708220561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stream_len_max.3708220561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_streaming_out.2824015019 |
| Short name | T782 |
| Test name | |
| Test status | |
| Simulation time | 3369741293 ps |
| CPU time | 33.26 seconds |
| Started | Sep 04 05:46:01 AM UTC 24 |
| Finished | Sep 04 05:46:36 AM UTC 24 |
| Peak memory | 229728 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2824015019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_streaming_out.2824015019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_stress_usb_traffic.4248581332 |
| Short name | T815 |
| Test name | |
| Test status | |
| Simulation time | 8407848311 ps |
| CPU time | 58.04 seconds |
| Started | Sep 04 05:46:04 AM UTC 24 |
| Finished | Sep 04 05:47:03 AM UTC 24 |
| Peak memory | 234184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4248581332 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_ 03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stress_usb_traffic.4248581332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_timeout_missing_host_handshake.2723616222 |
| Short name | T723 |
| Test name | |
| Test status | |
| Simulation time | 1093751167 ps |
| CPU time | 30.65 seconds |
| Started | Sep 04 05:44:58 AM UTC 24 |
| Finished | Sep 04 05:45:30 AM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2723616222 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_timeout_missing_host_handshake.2723616222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/4.usbdev_tx_rx_disruption.3340640492 |
| Short name | T174 |
| Test name | |
| Test status | |
| Simulation time | 509409504 ps |
| CPU time | 2.89 seconds |
| Started | Sep 04 05:46:04 AM UTC 24 |
| Finished | Sep 04 05:46:08 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3340640492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_tx _rx_disruption.3340640492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/4.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_alert_test.1225402760 |
| Short name | T2718 |
| Test name | |
| Test status | |
| Simulation time | 40941367 ps |
| CPU time | 1.02 seconds |
| Started | Sep 04 06:03:57 AM UTC 24 |
| Finished | Sep 04 06:03:59 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1225402760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 40.usbdev_alert_test.1225402760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_disconnect.701264791 |
| Short name | T2719 |
| Test name | |
| Test status | |
| Simulation time | 10409938903 ps |
| CPU time | 20.71 seconds |
| Started | Sep 04 06:03:38 AM UTC 24 |
| Finished | Sep 04 06:04:00 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=701264791 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_disconnect.701264791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_reset.4213405068 |
| Short name | T2734 |
| Test name | |
| Test status | |
| Simulation time | 18462424076 ps |
| CPU time | 27.57 seconds |
| Started | Sep 04 06:03:39 AM UTC 24 |
| Finished | Sep 04 06:04:07 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4213405068 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_reset.4213405068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_resume.473323352 |
| Short name | T2758 |
| Test name | |
| Test status | |
| Simulation time | 30393563166 ps |
| CPU time | 41.5 seconds |
| Started | Sep 04 06:03:39 AM UTC 24 |
| Finished | Sep 04 06:04:21 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=473323352 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_resume.473323352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_av_buffer.3908987591 |
| Short name | T2606 |
| Test name | |
| Test status | |
| Simulation time | 151786862 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 06:03:39 AM UTC 24 |
| Finished | Sep 04 06:03:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3908987591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_av_buffer.3908987591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_bitstuff_err.2577474255 |
| Short name | T2661 |
| Test name | |
| Test status | |
| Simulation time | 151427509 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 06:03:40 AM UTC 24 |
| Finished | Sep 04 06:03:43 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2577474255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_bitstuff_err.2577474255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_data_toggle_clear.2628343358 |
| Short name | T2671 |
| Test name | |
| Test status | |
| Simulation time | 403905220 ps |
| CPU time | 2.65 seconds |
| Started | Sep 04 06:03:40 AM UTC 24 |
| Finished | Sep 04 06:03:44 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2628343358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 40.usbdev_data_toggle_clear.2628343358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_data_toggle_restore.2141437919 |
| Short name | T2676 |
| Test name | |
| Test status | |
| Simulation time | 950173778 ps |
| CPU time | 4.72 seconds |
| Started | Sep 04 06:03:40 AM UTC 24 |
| Finished | Sep 04 06:03:46 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2141437919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_data_toggle_restore.2141437919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_device_address.989863742 |
| Short name | T2779 |
| Test name | |
| Test status | |
| Simulation time | 31136865229 ps |
| CPU time | 49.58 seconds |
| Started | Sep 04 06:03:40 AM UTC 24 |
| Finished | Sep 04 06:04:31 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=989863742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 40.usbdev_device_address.989863742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_device_timeout.815701081 |
| Short name | T2774 |
| Test name | |
| Test status | |
| Simulation time | 5009835536 ps |
| CPU time | 46.63 seconds |
| Started | Sep 04 06:03:40 AM UTC 24 |
| Finished | Sep 04 06:04:28 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=815701081 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_device_timeout.815701081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_disable_endpoint.3039729388 |
| Short name | T2675 |
| Test name | |
| Test status | |
| Simulation time | 483967768 ps |
| CPU time | 2.35 seconds |
| Started | Sep 04 06:03:42 AM UTC 24 |
| Finished | Sep 04 06:03:45 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3039729388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 40.usbdev_disable_endpoint.3039729388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_disconnected.937008431 |
| Short name | T2674 |
| Test name | |
| Test status | |
| Simulation time | 190676300 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 06:03:42 AM UTC 24 |
| Finished | Sep 04 06:03:44 AM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=937008431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_disconnected.937008431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_enable.3609567705 |
| Short name | T2672 |
| Test name | |
| Test status | |
| Simulation time | 48532957 ps |
| CPU time | 1.1 seconds |
| Started | Sep 04 06:03:42 AM UTC 24 |
| Finished | Sep 04 06:03:44 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3609567705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 40.usbdev_enable.3609567705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_endpoint_access.4011477835 |
| Short name | T2681 |
| Test name | |
| Test status | |
| Simulation time | 811345623 ps |
| CPU time | 4.48 seconds |
| Started | Sep 04 06:03:42 AM UTC 24 |
| Finished | Sep 04 06:03:48 AM UTC 24 |
| Peak memory | 217208 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4011477835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_endpoint_access.4011477835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_fifo_levels.2159476486 |
| Short name | T540 |
| Test name | |
| Test status | |
| Simulation time | 288999770 ps |
| CPU time | 1.9 seconds |
| Started | Sep 04 06:03:42 AM UTC 24 |
| Finished | Sep 04 06:03:45 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2159476486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_fifo_levels.2159476486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_fifo_rst.2733848963 |
| Short name | T2677 |
| Test name | |
| Test status | |
| Simulation time | 458158532 ps |
| CPU time | 2.96 seconds |
| Started | Sep 04 06:03:42 AM UTC 24 |
| Finished | Sep 04 06:03:46 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2733848963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_fifo_rst.2733848963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_in_iso.1051671664 |
| Short name | T2679 |
| Test name | |
| Test status | |
| Simulation time | 216238812 ps |
| CPU time | 1.63 seconds |
| Started | Sep 04 06:03:44 AM UTC 24 |
| Finished | Sep 04 06:03:47 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1051671664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 40.usbdev_in_iso.1051671664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_in_stall.3549342579 |
| Short name | T2678 |
| Test name | |
| Test status | |
| Simulation time | 199588543 ps |
| CPU time | 1.36 seconds |
| Started | Sep 04 06:03:44 AM UTC 24 |
| Finished | Sep 04 06:03:47 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3549342579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_in_stall.3549342579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_in_trans.855194118 |
| Short name | T2684 |
| Test name | |
| Test status | |
| Simulation time | 240056290 ps |
| CPU time | 1.74 seconds |
| Started | Sep 04 06:03:46 AM UTC 24 |
| Finished | Sep 04 06:03:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=855194118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_in_trans.855194118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_invalid_sync.2098156344 |
| Short name | T3008 |
| Test name | |
| Test status | |
| Simulation time | 5280573429 ps |
| CPU time | 140.35 seconds |
| Started | Sep 04 06:03:43 AM UTC 24 |
| Finished | Sep 04 06:06:06 AM UTC 24 |
| Peak memory | 229736 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2098156344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 40.usbdev_invalid_sync.2098156344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_iso_retraction.2196604102 |
| Short name | T2795 |
| Test name | |
| Test status | |
| Simulation time | 7346473794 ps |
| CPU time | 50.77 seconds |
| Started | Sep 04 06:03:46 AM UTC 24 |
| Finished | Sep 04 06:04:38 AM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2196604102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_iso_retraction.2196604102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_link_in_err.4123622326 |
| Short name | T2682 |
| Test name | |
| Test status | |
| Simulation time | 227283348 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 06:03:46 AM UTC 24 |
| Finished | Sep 04 06:03:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4123622326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_link_in_err.4123622326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_link_resume.210344697 |
| Short name | T2821 |
| Test name | |
| Test status | |
| Simulation time | 31775930819 ps |
| CPU time | 61.49 seconds |
| Started | Sep 04 06:03:46 AM UTC 24 |
| Finished | Sep 04 06:04:49 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=210344697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 40.usbdev_link_resume.210344697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_link_suspend.1555129455 |
| Short name | T2724 |
| Test name | |
| Test status | |
| Simulation time | 6026222039 ps |
| CPU time | 13.57 seconds |
| Started | Sep 04 06:03:47 AM UTC 24 |
| Finished | Sep 04 06:04:02 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1555129455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_link_suspend.1555129455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_max_inter_pkt_delay.2228158462 |
| Short name | T2739 |
| Test name | |
| Test status | |
| Simulation time | 2984161465 ps |
| CPU time | 21.09 seconds |
| Started | Sep 04 06:03:47 AM UTC 24 |
| Finished | Sep 04 06:04:10 AM UTC 24 |
| Peak memory | 229596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2228158462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_max_inter_pkt_delay.2228158462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_max_length_in_transaction.1263521841 |
| Short name | T2689 |
| Test name | |
| Test status | |
| Simulation time | 263336128 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 06:03:47 AM UTC 24 |
| Finished | Sep 04 06:03:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1263521841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 40.usbdev_max_length_in_transaction.1263521841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_max_length_out_transaction.774404927 |
| Short name | T2693 |
| Test name | |
| Test status | |
| Simulation time | 205863007 ps |
| CPU time | 1.71 seconds |
| Started | Sep 04 06:03:49 AM UTC 24 |
| Finished | Sep 04 06:03:51 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=774404927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 40.usbdev_max_length_out_transaction.774404927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_min_inter_pkt_delay.1710470222 |
| Short name | T2773 |
| Test name | |
| Test status | |
| Simulation time | 3658623747 ps |
| CPU time | 38.08 seconds |
| Started | Sep 04 06:03:49 AM UTC 24 |
| Finished | Sep 04 06:04:28 AM UTC 24 |
| Peak memory | 229708 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1710470222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_min_inter_pkt_delay.1710470222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_min_length_in_transaction.2875646156 |
| Short name | T2691 |
| Test name | |
| Test status | |
| Simulation time | 146259807 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 06:03:49 AM UTC 24 |
| Finished | Sep 04 06:03:51 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2875646156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 40.usbdev_min_length_in_transaction.2875646156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_min_length_out_transaction.4178925232 |
| Short name | T2695 |
| Test name | |
| Test status | |
| Simulation time | 162136644 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 06:03:51 AM UTC 24 |
| Finished | Sep 04 06:03:53 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4178925232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 40.usbdev_min_length_out_transaction.4178925232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_nak_trans.3768280483 |
| Short name | T2698 |
| Test name | |
| Test status | |
| Simulation time | 255476955 ps |
| CPU time | 1.55 seconds |
| Started | Sep 04 06:03:51 AM UTC 24 |
| Finished | Sep 04 06:03:53 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3768280483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_nak_trans.3768280483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_out_iso.231131694 |
| Short name | T2697 |
| Test name | |
| Test status | |
| Simulation time | 183958867 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 06:03:51 AM UTC 24 |
| Finished | Sep 04 06:03:53 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=231131694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 40.usbdev_out_iso.231131694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_out_stall.110860193 |
| Short name | T2699 |
| Test name | |
| Test status | |
| Simulation time | 208765126 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 06:03:51 AM UTC 24 |
| Finished | Sep 04 06:03:53 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=110860193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_out_stall.110860193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_out_trans_nak.2722383327 |
| Short name | T2700 |
| Test name | |
| Test status | |
| Simulation time | 184781328 ps |
| CPU time | 1.63 seconds |
| Started | Sep 04 06:03:51 AM UTC 24 |
| Finished | Sep 04 06:03:53 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2722383327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 40.usbdev_out_trans_nak.2722383327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_pending_in_trans.106211574 |
| Short name | T2696 |
| Test name | |
| Test status | |
| Simulation time | 165492011 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 06:03:51 AM UTC 24 |
| Finished | Sep 04 06:03:53 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=106211574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_pending_in_trans.106211574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_phy_config_pinflip.2444271813 |
| Short name | T2701 |
| Test name | |
| Test status | |
| Simulation time | 264158408 ps |
| CPU time | 1.64 seconds |
| Started | Sep 04 06:03:51 AM UTC 24 |
| Finished | Sep 04 06:03:53 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2444271813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 40.usbdev_phy_config_pinflip.2444271813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_phy_config_usb_ref_disable.3437393715 |
| Short name | T2703 |
| Test name | |
| Test status | |
| Simulation time | 190287730 ps |
| CPU time | 1.57 seconds |
| Started | Sep 04 06:03:53 AM UTC 24 |
| Finished | Sep 04 06:03:55 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3437393715 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 40.usbdev_phy_config_usb_ref_disable.3437393715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_phy_pins_sense.2883594995 |
| Short name | T2702 |
| Test name | |
| Test status | |
| Simulation time | 35614360 ps |
| CPU time | 1.06 seconds |
| Started | Sep 04 06:03:53 AM UTC 24 |
| Finished | Sep 04 06:03:55 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2883594995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_phy_pins_sense.2883594995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_buffer.994874635 |
| Short name | T2834 |
| Test name | |
| Test status | |
| Simulation time | 20681489375 ps |
| CPU time | 60.46 seconds |
| Started | Sep 04 06:03:53 AM UTC 24 |
| Finished | Sep 04 06:04:55 AM UTC 24 |
| Peak memory | 227684 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=994874635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_pkt_buffer.994874635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_received.3261828978 |
| Short name | T2704 |
| Test name | |
| Test status | |
| Simulation time | 171476693 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 06:03:53 AM UTC 24 |
| Finished | Sep 04 06:03:55 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3261828978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_pkt_received.3261828978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_sent.2916979654 |
| Short name | T2705 |
| Test name | |
| Test status | |
| Simulation time | 230692985 ps |
| CPU time | 1.68 seconds |
| Started | Sep 04 06:03:53 AM UTC 24 |
| Finished | Sep 04 06:03:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2916979654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_pkt_sent.2916979654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_random_length_in_transaction.3485694274 |
| Short name | T2707 |
| Test name | |
| Test status | |
| Simulation time | 242769326 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 06:03:54 AM UTC 24 |
| Finished | Sep 04 06:03:57 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3485694274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 40.usbdev_random_length_in_transaction.3485694274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_random_length_out_transaction.144886081 |
| Short name | T2710 |
| Test name | |
| Test status | |
| Simulation time | 175363372 ps |
| CPU time | 1.55 seconds |
| Started | Sep 04 06:03:54 AM UTC 24 |
| Finished | Sep 04 06:03:57 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=144886081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 40.usbdev_random_length_out_transaction.144886081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_rx_crc_err.2587232962 |
| Short name | T2706 |
| Test name | |
| Test status | |
| Simulation time | 158602760 ps |
| CPU time | 1.33 seconds |
| Started | Sep 04 06:03:54 AM UTC 24 |
| Finished | Sep 04 06:03:57 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2587232962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 40.usbdev_rx_crc_err.2587232962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_rx_full.3460724271 |
| Short name | T2712 |
| Test name | |
| Test status | |
| Simulation time | 360034364 ps |
| CPU time | 2 seconds |
| Started | Sep 04 06:03:54 AM UTC 24 |
| Finished | Sep 04 06:03:57 AM UTC 24 |
| Peak memory | 214740 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3460724271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_rx_full.3460724271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_setup_stage.146991370 |
| Short name | T2708 |
| Test name | |
| Test status | |
| Simulation time | 148941703 ps |
| CPU time | 1.35 seconds |
| Started | Sep 04 06:03:54 AM UTC 24 |
| Finished | Sep 04 06:03:57 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=146991370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 40.usbdev_setup_stage.146991370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_setup_trans_ignored.2657762909 |
| Short name | T2709 |
| Test name | |
| Test status | |
| Simulation time | 152690698 ps |
| CPU time | 1.28 seconds |
| Started | Sep 04 06:03:54 AM UTC 24 |
| Finished | Sep 04 06:03:57 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2657762909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 40.usbdev_setup_trans_ignored.2657762909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_smoke.631929446 |
| Short name | T2711 |
| Test name | |
| Test status | |
| Simulation time | 223502972 ps |
| CPU time | 1.73 seconds |
| Started | Sep 04 06:03:54 AM UTC 24 |
| Finished | Sep 04 06:03:57 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=631929446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_smoke.631929446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_spurious_pids_ignored.223574105 |
| Short name | T2752 |
| Test name | |
| Test status | |
| Simulation time | 2238220758 ps |
| CPU time | 21.16 seconds |
| Started | Sep 04 06:03:56 AM UTC 24 |
| Finished | Sep 04 06:04:18 AM UTC 24 |
| Peak memory | 234308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=223574105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 40.usbdev_spurious_pids_ignored.223574105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_stall_priority_over_nak.26710853 |
| Short name | T2716 |
| Test name | |
| Test status | |
| Simulation time | 179016149 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 06:03:56 AM UTC 24 |
| Finished | Sep 04 06:03:58 AM UTC 24 |
| Peak memory | 214600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=26710853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 40.usbdev_stall_priority_over_nak.26710853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_stall_trans.1570037726 |
| Short name | T2715 |
| Test name | |
| Test status | |
| Simulation time | 187953014 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 06:03:56 AM UTC 24 |
| Finished | Sep 04 06:03:58 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1570037726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_stall_trans.1570037726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_stream_len_max.1367708520 |
| Short name | T2728 |
| Test name | |
| Test status | |
| Simulation time | 1001365992 ps |
| CPU time | 5.27 seconds |
| Started | Sep 04 06:03:57 AM UTC 24 |
| Finished | Sep 04 06:04:03 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1367708520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_stream_len_max.1367708520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_streaming_out.76170511 |
| Short name | T2867 |
| Test name | |
| Test status | |
| Simulation time | 2714800655 ps |
| CPU time | 65.97 seconds |
| Started | Sep 04 06:03:57 AM UTC 24 |
| Finished | Sep 04 06:05:05 AM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=76170511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_streaming_out.76170511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_timeout_missing_host_handshake.2164256958 |
| Short name | T2793 |
| Test name | |
| Test status | |
| Simulation time | 5650415213 ps |
| CPU time | 55.05 seconds |
| Started | Sep 04 06:03:40 AM UTC 24 |
| Finished | Sep 04 06:04:37 AM UTC 24 |
| Peak memory | 217436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2164256958 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_timeout_missing_host_handshake.2164256958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/40.usbdev_tx_rx_disruption.3338060450 |
| Short name | T2720 |
| Test name | |
| Test status | |
| Simulation time | 516138299 ps |
| CPU time | 2.85 seconds |
| Started | Sep 04 06:03:57 AM UTC 24 |
| Finished | Sep 04 06:04:01 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3338060450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_t x_rx_disruption.3338060450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/40.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/400.usbdev_tx_rx_disruption.251485150 |
| Short name | T3689 |
| Test name | |
| Test status | |
| Simulation time | 624943706 ps |
| CPU time | 1.69 seconds |
| Started | Sep 04 06:09:59 AM UTC 24 |
| Finished | Sep 04 06:10:08 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=251485150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 400.usbdev_t x_rx_disruption.251485150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/400.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/401.usbdev_tx_rx_disruption.2982838186 |
| Short name | T3687 |
| Test name | |
| Test status | |
| Simulation time | 506159129 ps |
| CPU time | 1.32 seconds |
| Started | Sep 04 06:09:59 AM UTC 24 |
| Finished | Sep 04 06:10:08 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2982838186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 401.usbdev_ tx_rx_disruption.2982838186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/401.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/402.usbdev_tx_rx_disruption.3265814335 |
| Short name | T3700 |
| Test name | |
| Test status | |
| Simulation time | 443838028 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 06:09:59 AM UTC 24 |
| Finished | Sep 04 06:10:09 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3265814335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 402.usbdev_ tx_rx_disruption.3265814335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/402.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/403.usbdev_tx_rx_disruption.1943506545 |
| Short name | T3699 |
| Test name | |
| Test status | |
| Simulation time | 435638409 ps |
| CPU time | 1.31 seconds |
| Started | Sep 04 06:09:59 AM UTC 24 |
| Finished | Sep 04 06:10:09 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1943506545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 403.usbdev_ tx_rx_disruption.1943506545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/403.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/404.usbdev_tx_rx_disruption.662512259 |
| Short name | T3701 |
| Test name | |
| Test status | |
| Simulation time | 574744314 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 06:09:59 AM UTC 24 |
| Finished | Sep 04 06:10:09 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=662512259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 404.usbdev_t x_rx_disruption.662512259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/404.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/405.usbdev_tx_rx_disruption.1781023645 |
| Short name | T3683 |
| Test name | |
| Test status | |
| Simulation time | 546077178 ps |
| CPU time | 1.57 seconds |
| Started | Sep 04 06:10:01 AM UTC 24 |
| Finished | Sep 04 06:10:04 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1781023645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 405.usbdev_ tx_rx_disruption.1781023645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/405.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/406.usbdev_tx_rx_disruption.1516567460 |
| Short name | T3712 |
| Test name | |
| Test status | |
| Simulation time | 493958675 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 06:10:01 AM UTC 24 |
| Finished | Sep 04 06:10:11 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1516567460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 406.usbdev_ tx_rx_disruption.1516567460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/406.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/407.usbdev_tx_rx_disruption.1481408848 |
| Short name | T3717 |
| Test name | |
| Test status | |
| Simulation time | 506885080 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 06:10:01 AM UTC 24 |
| Finished | Sep 04 06:10:12 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1481408848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 407.usbdev_ tx_rx_disruption.1481408848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/407.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/408.usbdev_tx_rx_disruption.2792043709 |
| Short name | T3720 |
| Test name | |
| Test status | |
| Simulation time | 508382629 ps |
| CPU time | 1.72 seconds |
| Started | Sep 04 06:10:01 AM UTC 24 |
| Finished | Sep 04 06:10:12 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2792043709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 408.usbdev_ tx_rx_disruption.2792043709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/408.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/409.usbdev_tx_rx_disruption.4210460439 |
| Short name | T3714 |
| Test name | |
| Test status | |
| Simulation time | 555807369 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 06:10:01 AM UTC 24 |
| Finished | Sep 04 06:10:11 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4210460439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 409.usbdev_ tx_rx_disruption.4210460439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/409.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_alert_test.2980149995 |
| Short name | T2769 |
| Test name | |
| Test status | |
| Simulation time | 76690384 ps |
| CPU time | 1.06 seconds |
| Started | Sep 04 06:04:23 AM UTC 24 |
| Finished | Sep 04 06:04:26 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2980149995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 41.usbdev_alert_test.2980149995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_disconnect.1606394327 |
| Short name | T2753 |
| Test name | |
| Test status | |
| Simulation time | 9427325235 ps |
| CPU time | 20.18 seconds |
| Started | Sep 04 06:03:59 AM UTC 24 |
| Finished | Sep 04 06:04:20 AM UTC 24 |
| Peak memory | 217268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1606394327 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_disconnect.1606394327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_reset.3573735928 |
| Short name | T2780 |
| Test name | |
| Test status | |
| Simulation time | 20752349453 ps |
| CPU time | 31.15 seconds |
| Started | Sep 04 06:03:59 AM UTC 24 |
| Finished | Sep 04 06:04:31 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3573735928 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_reset.3573735928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_resume.1498994177 |
| Short name | T2802 |
| Test name | |
| Test status | |
| Simulation time | 25961406961 ps |
| CPU time | 39.45 seconds |
| Started | Sep 04 06:03:59 AM UTC 24 |
| Finished | Sep 04 06:04:40 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1498994177 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_resume.1498994177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_av_buffer.2033941949 |
| Short name | T2721 |
| Test name | |
| Test status | |
| Simulation time | 161832489 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 06:03:59 AM UTC 24 |
| Finished | Sep 04 06:04:01 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2033941949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_av_buffer.2033941949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_bitstuff_err.1104293785 |
| Short name | T2723 |
| Test name | |
| Test status | |
| Simulation time | 142624206 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 06:03:59 AM UTC 24 |
| Finished | Sep 04 06:04:02 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1104293785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_bitstuff_err.1104293785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_data_toggle_clear.1558100142 |
| Short name | T2727 |
| Test name | |
| Test status | |
| Simulation time | 360274381 ps |
| CPU time | 2.4 seconds |
| Started | Sep 04 06:03:59 AM UTC 24 |
| Finished | Sep 04 06:04:03 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1558100142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 41.usbdev_data_toggle_clear.1558100142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_data_toggle_restore.409712497 |
| Short name | T2725 |
| Test name | |
| Test status | |
| Simulation time | 433809280 ps |
| CPU time | 2.4 seconds |
| Started | Sep 04 06:03:59 AM UTC 24 |
| Finished | Sep 04 06:04:03 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=409712497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_data_toggle_restore.409712497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_device_address.343556799 |
| Short name | T2839 |
| Test name | |
| Test status | |
| Simulation time | 26834942021 ps |
| CPU time | 53.73 seconds |
| Started | Sep 04 06:04:00 AM UTC 24 |
| Finished | Sep 04 06:04:56 AM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=343556799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 41.usbdev_device_address.343556799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_device_timeout.4066157575 |
| Short name | T2751 |
| Test name | |
| Test status | |
| Simulation time | 861584254 ps |
| CPU time | 16.41 seconds |
| Started | Sep 04 06:04:00 AM UTC 24 |
| Finished | Sep 04 06:04:18 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4066157575 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_device_timeout.4066157575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_disable_endpoint.3058384804 |
| Short name | T2732 |
| Test name | |
| Test status | |
| Simulation time | 1029677328 ps |
| CPU time | 4.49 seconds |
| Started | Sep 04 06:04:02 AM UTC 24 |
| Finished | Sep 04 06:04:07 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3058384804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 41.usbdev_disable_endpoint.3058384804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_disconnected.203338142 |
| Short name | T2730 |
| Test name | |
| Test status | |
| Simulation time | 151251153 ps |
| CPU time | 1.33 seconds |
| Started | Sep 04 06:04:03 AM UTC 24 |
| Finished | Sep 04 06:04:05 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=203338142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_disconnected.203338142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_enable.3789243122 |
| Short name | T2729 |
| Test name | |
| Test status | |
| Simulation time | 67476851 ps |
| CPU time | 1.17 seconds |
| Started | Sep 04 06:04:03 AM UTC 24 |
| Finished | Sep 04 06:04:05 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3789243122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 41.usbdev_enable.3789243122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_endpoint_access.3631537422 |
| Short name | T2736 |
| Test name | |
| Test status | |
| Simulation time | 950171684 ps |
| CPU time | 4.17 seconds |
| Started | Sep 04 06:04:03 AM UTC 24 |
| Finished | Sep 04 06:04:08 AM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3631537422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_endpoint_access.3631537422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_fifo_rst.1452099936 |
| Short name | T2738 |
| Test name | |
| Test status | |
| Simulation time | 605901866 ps |
| CPU time | 4.97 seconds |
| Started | Sep 04 06:04:03 AM UTC 24 |
| Finished | Sep 04 06:04:09 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1452099936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_fifo_rst.1452099936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_in_iso.3915066567 |
| Short name | T2733 |
| Test name | |
| Test status | |
| Simulation time | 169365936 ps |
| CPU time | 1.57 seconds |
| Started | Sep 04 06:04:05 AM UTC 24 |
| Finished | Sep 04 06:04:07 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3915066567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 41.usbdev_in_iso.3915066567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_in_stall.154005186 |
| Short name | T2735 |
| Test name | |
| Test status | |
| Simulation time | 138583137 ps |
| CPU time | 1.3 seconds |
| Started | Sep 04 06:04:06 AM UTC 24 |
| Finished | Sep 04 06:04:08 AM UTC 24 |
| Peak memory | 214904 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=154005186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 41.usbdev_in_stall.154005186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_in_trans.1773729085 |
| Short name | T2737 |
| Test name | |
| Test status | |
| Simulation time | 194002300 ps |
| CPU time | 1.63 seconds |
| Started | Sep 04 06:04:06 AM UTC 24 |
| Finished | Sep 04 06:04:09 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1773729085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_in_trans.1773729085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_invalid_sync.2547763640 |
| Short name | T2830 |
| Test name | |
| Test status | |
| Simulation time | 4442851451 ps |
| CPU time | 46.28 seconds |
| Started | Sep 04 06:04:05 AM UTC 24 |
| Finished | Sep 04 06:04:52 AM UTC 24 |
| Peak memory | 229728 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2547763640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 41.usbdev_invalid_sync.2547763640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_iso_retraction.25985680 |
| Short name | T2884 |
| Test name | |
| Test status | |
| Simulation time | 8522798306 ps |
| CPU time | 64.25 seconds |
| Started | Sep 04 06:04:06 AM UTC 24 |
| Finished | Sep 04 06:05:12 AM UTC 24 |
| Peak memory | 217440 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=25985680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 41.usbdev_iso_retraction.25985680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_link_in_err.2132113546 |
| Short name | T2741 |
| Test name | |
| Test status | |
| Simulation time | 268738209 ps |
| CPU time | 1.95 seconds |
| Started | Sep 04 06:04:07 AM UTC 24 |
| Finished | Sep 04 06:04:10 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2132113546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_link_in_err.2132113546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_link_resume.3717173523 |
| Short name | T2845 |
| Test name | |
| Test status | |
| Simulation time | 29157710429 ps |
| CPU time | 49.52 seconds |
| Started | Sep 04 06:04:07 AM UTC 24 |
| Finished | Sep 04 06:04:58 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3717173523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_link_resume.3717173523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_link_suspend.3391789592 |
| Short name | T2768 |
| Test name | |
| Test status | |
| Simulation time | 5672555817 ps |
| CPU time | 15.78 seconds |
| Started | Sep 04 06:04:09 AM UTC 24 |
| Finished | Sep 04 06:04:26 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3391789592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_link_suspend.3391789592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_low_speed_traffic.4102978640 |
| Short name | T2866 |
| Test name | |
| Test status | |
| Simulation time | 5250608101 ps |
| CPU time | 54.38 seconds |
| Started | Sep 04 06:04:09 AM UTC 24 |
| Finished | Sep 04 06:05:05 AM UTC 24 |
| Peak memory | 229528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4102978640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_low_speed_traffic.4102978640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_max_inter_pkt_delay.52975863 |
| Short name | T3007 |
| Test name | |
| Test status | |
| Simulation time | 4173680468 ps |
| CPU time | 113.59 seconds |
| Started | Sep 04 06:04:09 AM UTC 24 |
| Finished | Sep 04 06:06:05 AM UTC 24 |
| Peak memory | 229600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=52975863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_max_inter_pkt_delay.52975863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_max_length_in_transaction.3776608475 |
| Short name | T2742 |
| Test name | |
| Test status | |
| Simulation time | 268166152 ps |
| CPU time | 1.55 seconds |
| Started | Sep 04 06:04:09 AM UTC 24 |
| Finished | Sep 04 06:04:11 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3776608475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 41.usbdev_max_length_in_transaction.3776608475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_max_length_out_transaction.3320793747 |
| Short name | T2743 |
| Test name | |
| Test status | |
| Simulation time | 187836512 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 06:04:10 AM UTC 24 |
| Finished | Sep 04 06:04:13 AM UTC 24 |
| Peak memory | 215004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3320793747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 41.usbdev_max_length_out_transaction.3320793747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_min_inter_pkt_delay.184711677 |
| Short name | T2782 |
| Test name | |
| Test status | |
| Simulation time | 2252565135 ps |
| CPU time | 20.26 seconds |
| Started | Sep 04 06:04:10 AM UTC 24 |
| Finished | Sep 04 06:04:32 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=184711677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_min_inter_pkt_delay.184711677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_min_length_in_transaction.1151060060 |
| Short name | T2744 |
| Test name | |
| Test status | |
| Simulation time | 162159694 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 06:04:10 AM UTC 24 |
| Finished | Sep 04 06:04:13 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1151060060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 41.usbdev_min_length_in_transaction.1151060060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_min_length_out_transaction.1749713111 |
| Short name | T2685 |
| Test name | |
| Test status | |
| Simulation time | 179413389 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 06:04:10 AM UTC 24 |
| Finished | Sep 04 06:04:13 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1749713111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 41.usbdev_min_length_out_transaction.1749713111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_nak_trans.444152181 |
| Short name | T2553 |
| Test name | |
| Test status | |
| Simulation time | 186922561 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 06:04:12 AM UTC 24 |
| Finished | Sep 04 06:04:14 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=444152181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_nak_trans.444152181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_out_iso.4008365081 |
| Short name | T2717 |
| Test name | |
| Test status | |
| Simulation time | 181753897 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 06:04:12 AM UTC 24 |
| Finished | Sep 04 06:04:14 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4008365081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 41.usbdev_out_iso.4008365081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_out_stall.3112037893 |
| Short name | T2280 |
| Test name | |
| Test status | |
| Simulation time | 155317682 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 06:04:13 AM UTC 24 |
| Finished | Sep 04 06:04:15 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3112037893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_out_stall.3112037893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_out_trans_nak.1735319293 |
| Short name | T2746 |
| Test name | |
| Test status | |
| Simulation time | 178703368 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 06:04:14 AM UTC 24 |
| Finished | Sep 04 06:04:16 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1735319293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 41.usbdev_out_trans_nak.1735319293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_pending_in_trans.3203632822 |
| Short name | T2747 |
| Test name | |
| Test status | |
| Simulation time | 213788402 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 06:04:14 AM UTC 24 |
| Finished | Sep 04 06:04:17 AM UTC 24 |
| Peak memory | 214872 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3203632822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 41.usbdev_pending_in_trans.3203632822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_phy_config_pinflip.579517769 |
| Short name | T2748 |
| Test name | |
| Test status | |
| Simulation time | 239317120 ps |
| CPU time | 1.72 seconds |
| Started | Sep 04 06:04:14 AM UTC 24 |
| Finished | Sep 04 06:04:17 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=579517769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 41.usbdev_phy_config_pinflip.579517769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_phy_config_usb_ref_disable.3569231004 |
| Short name | T2750 |
| Test name | |
| Test status | |
| Simulation time | 146967568 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 06:04:15 AM UTC 24 |
| Finished | Sep 04 06:04:18 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3569231004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 41.usbdev_phy_config_usb_ref_disable.3569231004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_phy_pins_sense.1116350366 |
| Short name | T2749 |
| Test name | |
| Test status | |
| Simulation time | 62426665 ps |
| CPU time | 1.12 seconds |
| Started | Sep 04 06:04:15 AM UTC 24 |
| Finished | Sep 04 06:04:18 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1116350366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_phy_pins_sense.1116350366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_buffer.157042166 |
| Short name | T2294 |
| Test name | |
| Test status | |
| Simulation time | 10231336938 ps |
| CPU time | 29.02 seconds |
| Started | Sep 04 06:04:16 AM UTC 24 |
| Finished | Sep 04 06:04:47 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=157042166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_pkt_buffer.157042166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_received.3684422411 |
| Short name | T2756 |
| Test name | |
| Test status | |
| Simulation time | 210385986 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 06:04:18 AM UTC 24 |
| Finished | Sep 04 06:04:20 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3684422411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_pkt_received.3684422411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_sent.3085922231 |
| Short name | T2757 |
| Test name | |
| Test status | |
| Simulation time | 279794568 ps |
| CPU time | 1.65 seconds |
| Started | Sep 04 06:04:18 AM UTC 24 |
| Finished | Sep 04 06:04:21 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3085922231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_pkt_sent.3085922231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_random_length_in_transaction.15390019 |
| Short name | T2755 |
| Test name | |
| Test status | |
| Simulation time | 243225313 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 06:04:18 AM UTC 24 |
| Finished | Sep 04 06:04:20 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=15390019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_random_length_in_transaction.15390019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_random_length_out_transaction.1977732181 |
| Short name | T2754 |
| Test name | |
| Test status | |
| Simulation time | 205823687 ps |
| CPU time | 1.33 seconds |
| Started | Sep 04 06:04:18 AM UTC 24 |
| Finished | Sep 04 06:04:20 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1977732181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 41.usbdev_random_length_out_transaction.1977732181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_rx_crc_err.1732458765 |
| Short name | T2760 |
| Test name | |
| Test status | |
| Simulation time | 144518343 ps |
| CPU time | 1.35 seconds |
| Started | Sep 04 06:04:19 AM UTC 24 |
| Finished | Sep 04 06:04:22 AM UTC 24 |
| Peak memory | 214744 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1732458765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 41.usbdev_rx_crc_err.1732458765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_rx_full.3989152089 |
| Short name | T2762 |
| Test name | |
| Test status | |
| Simulation time | 378841383 ps |
| CPU time | 2.18 seconds |
| Started | Sep 04 06:04:19 AM UTC 24 |
| Finished | Sep 04 06:04:23 AM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3989152089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 41.usbdev_rx_full.3989152089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_setup_stage.1344406556 |
| Short name | T2759 |
| Test name | |
| Test status | |
| Simulation time | 152799643 ps |
| CPU time | 0.99 seconds |
| Started | Sep 04 06:04:19 AM UTC 24 |
| Finished | Sep 04 06:04:21 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1344406556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_setup_stage.1344406556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_setup_trans_ignored.2772484820 |
| Short name | T2761 |
| Test name | |
| Test status | |
| Simulation time | 170056804 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 06:04:19 AM UTC 24 |
| Finished | Sep 04 06:04:22 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2772484820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 41.usbdev_setup_trans_ignored.2772484820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_smoke.3967384160 |
| Short name | T2764 |
| Test name | |
| Test status | |
| Simulation time | 205045023 ps |
| CPU time | 1.65 seconds |
| Started | Sep 04 06:04:21 AM UTC 24 |
| Finished | Sep 04 06:04:24 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3967384160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_smoke.3967384160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_spurious_pids_ignored.515823733 |
| Short name | T2993 |
| Test name | |
| Test status | |
| Simulation time | 3304954388 ps |
| CPU time | 96.35 seconds |
| Started | Sep 04 06:04:21 AM UTC 24 |
| Finished | Sep 04 06:06:00 AM UTC 24 |
| Peak memory | 229660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=515823733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 41.usbdev_spurious_pids_ignored.515823733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_stall_priority_over_nak.75746606 |
| Short name | T2766 |
| Test name | |
| Test status | |
| Simulation time | 207825333 ps |
| CPU time | 1.21 seconds |
| Started | Sep 04 06:04:22 AM UTC 24 |
| Finished | Sep 04 06:04:25 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=75746606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 41.usbdev_stall_priority_over_nak.75746606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_stall_trans.3483194267 |
| Short name | T2765 |
| Test name | |
| Test status | |
| Simulation time | 165690615 ps |
| CPU time | 1.08 seconds |
| Started | Sep 04 06:04:22 AM UTC 24 |
| Finished | Sep 04 06:04:25 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3483194267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_stall_trans.3483194267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_stream_len_max.150756500 |
| Short name | T2770 |
| Test name | |
| Test status | |
| Simulation time | 499031164 ps |
| CPU time | 2.59 seconds |
| Started | Sep 04 06:04:22 AM UTC 24 |
| Finished | Sep 04 06:04:26 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=150756500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 41.usbdev_stream_len_max.150756500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_streaming_out.3095615143 |
| Short name | T2847 |
| Test name | |
| Test status | |
| Simulation time | 4353265440 ps |
| CPU time | 35.43 seconds |
| Started | Sep 04 06:04:22 AM UTC 24 |
| Finished | Sep 04 06:05:00 AM UTC 24 |
| Peak memory | 229652 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3095615143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_streaming_out.3095615143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_timeout_missing_host_handshake.420387204 |
| Short name | T2777 |
| Test name | |
| Test status | |
| Simulation time | 1062800808 ps |
| CPU time | 26.08 seconds |
| Started | Sep 04 06:04:02 AM UTC 24 |
| Finished | Sep 04 06:04:29 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=420387204 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_timeout_missing_host_handshake.420387204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/41.usbdev_tx_rx_disruption.1122709057 |
| Short name | T2772 |
| Test name | |
| Test status | |
| Simulation time | 528387038 ps |
| CPU time | 2.84 seconds |
| Started | Sep 04 06:04:23 AM UTC 24 |
| Finished | Sep 04 06:04:27 AM UTC 24 |
| Peak memory | 217040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1122709057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_t x_rx_disruption.1122709057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/41.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/410.usbdev_tx_rx_disruption.424769343 |
| Short name | T3675 |
| Test name | |
| Test status | |
| Simulation time | 641565996 ps |
| CPU time | 1.65 seconds |
| Started | Sep 04 06:10:01 AM UTC 24 |
| Finished | Sep 04 06:10:03 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=424769343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 410.usbdev_t x_rx_disruption.424769343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/410.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/411.usbdev_tx_rx_disruption.171156938 |
| Short name | T3678 |
| Test name | |
| Test status | |
| Simulation time | 534199672 ps |
| CPU time | 1.62 seconds |
| Started | Sep 04 06:10:01 AM UTC 24 |
| Finished | Sep 04 06:10:03 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=171156938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 411.usbdev_t x_rx_disruption.171156938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/411.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/412.usbdev_tx_rx_disruption.955850945 |
| Short name | T3672 |
| Test name | |
| Test status | |
| Simulation time | 489352363 ps |
| CPU time | 1.36 seconds |
| Started | Sep 04 06:10:01 AM UTC 24 |
| Finished | Sep 04 06:10:03 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=955850945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 412.usbdev_t x_rx_disruption.955850945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/412.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/413.usbdev_tx_rx_disruption.1182931742 |
| Short name | T3674 |
| Test name | |
| Test status | |
| Simulation time | 577301878 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 06:10:01 AM UTC 24 |
| Finished | Sep 04 06:10:03 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1182931742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 413.usbdev_ tx_rx_disruption.1182931742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/413.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/414.usbdev_tx_rx_disruption.916179935 |
| Short name | T3676 |
| Test name | |
| Test status | |
| Simulation time | 533049256 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 06:10:01 AM UTC 24 |
| Finished | Sep 04 06:10:03 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=916179935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 414.usbdev_t x_rx_disruption.916179935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/414.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/415.usbdev_tx_rx_disruption.3657651082 |
| Short name | T3671 |
| Test name | |
| Test status | |
| Simulation time | 397921808 ps |
| CPU time | 1.21 seconds |
| Started | Sep 04 06:10:01 AM UTC 24 |
| Finished | Sep 04 06:10:03 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3657651082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 415.usbdev_ tx_rx_disruption.3657651082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/415.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/416.usbdev_tx_rx_disruption.3580471639 |
| Short name | T3677 |
| Test name | |
| Test status | |
| Simulation time | 494902776 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 06:10:01 AM UTC 24 |
| Finished | Sep 04 06:10:03 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3580471639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 416.usbdev_ tx_rx_disruption.3580471639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/416.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/417.usbdev_tx_rx_disruption.2672771352 |
| Short name | T3706 |
| Test name | |
| Test status | |
| Simulation time | 452724690 ps |
| CPU time | 1.29 seconds |
| Started | Sep 04 06:10:04 AM UTC 24 |
| Finished | Sep 04 06:10:10 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2672771352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 417.usbdev_ tx_rx_disruption.2672771352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/417.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/418.usbdev_tx_rx_disruption.286165308 |
| Short name | T3707 |
| Test name | |
| Test status | |
| Simulation time | 564743885 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 06:10:04 AM UTC 24 |
| Finished | Sep 04 06:10:10 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=286165308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 418.usbdev_t x_rx_disruption.286165308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/418.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/419.usbdev_tx_rx_disruption.2863468189 |
| Short name | T3705 |
| Test name | |
| Test status | |
| Simulation time | 503153799 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 06:10:04 AM UTC 24 |
| Finished | Sep 04 06:10:10 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2863468189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 419.usbdev_ tx_rx_disruption.2863468189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/419.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_alert_test.1251269984 |
| Short name | T2824 |
| Test name | |
| Test status | |
| Simulation time | 62847917 ps |
| CPU time | 1.07 seconds |
| Started | Sep 04 06:04:47 AM UTC 24 |
| Finished | Sep 04 06:04:49 AM UTC 24 |
| Peak memory | 214760 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1251269984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 42.usbdev_alert_test.1251269984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_disconnect.1565476769 |
| Short name | T2807 |
| Test name | |
| Test status | |
| Simulation time | 9493475316 ps |
| CPU time | 16.06 seconds |
| Started | Sep 04 06:04:25 AM UTC 24 |
| Finished | Sep 04 06:04:42 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1565476769 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_disconnect.1565476769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_reset.3821871274 |
| Short name | T2812 |
| Test name | |
| Test status | |
| Simulation time | 14993809903 ps |
| CPU time | 17.88 seconds |
| Started | Sep 04 06:04:25 AM UTC 24 |
| Finished | Sep 04 06:04:44 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3821871274 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_reset.3821871274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_resume.842901219 |
| Short name | T2883 |
| Test name | |
| Test status | |
| Simulation time | 23831537719 ps |
| CPU time | 43.06 seconds |
| Started | Sep 04 06:04:25 AM UTC 24 |
| Finished | Sep 04 06:05:10 AM UTC 24 |
| Peak memory | 227612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=842901219 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_resume.842901219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_av_buffer.360519418 |
| Short name | T2776 |
| Test name | |
| Test status | |
| Simulation time | 171089207 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 06:04:26 AM UTC 24 |
| Finished | Sep 04 06:04:29 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=360519418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_av_buffer.360519418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_bitstuff_err.14204207 |
| Short name | T2775 |
| Test name | |
| Test status | |
| Simulation time | 152972612 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 06:04:26 AM UTC 24 |
| Finished | Sep 04 06:04:29 AM UTC 24 |
| Peak memory | 215004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=14204207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 42.usbdev_bitstuff_err.14204207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_data_toggle_clear.2369500551 |
| Short name | T2778 |
| Test name | |
| Test status | |
| Simulation time | 213988741 ps |
| CPU time | 1.61 seconds |
| Started | Sep 04 06:04:26 AM UTC 24 |
| Finished | Sep 04 06:04:29 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2369500551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 42.usbdev_data_toggle_clear.2369500551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_data_toggle_restore.435728258 |
| Short name | T2787 |
| Test name | |
| Test status | |
| Simulation time | 1177584556 ps |
| CPU time | 5.75 seconds |
| Started | Sep 04 06:04:27 AM UTC 24 |
| Finished | Sep 04 06:04:34 AM UTC 24 |
| Peak memory | 217356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=435728258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_data_toggle_restore.435728258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_device_address.4232614728 |
| Short name | T2903 |
| Test name | |
| Test status | |
| Simulation time | 30101768541 ps |
| CPU time | 49.68 seconds |
| Started | Sep 04 06:04:27 AM UTC 24 |
| Finished | Sep 04 06:05:19 AM UTC 24 |
| Peak memory | 217448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4232614728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_device_address.4232614728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_device_timeout.2614826900 |
| Short name | T2799 |
| Test name | |
| Test status | |
| Simulation time | 562748653 ps |
| CPU time | 10.68 seconds |
| Started | Sep 04 06:04:27 AM UTC 24 |
| Finished | Sep 04 06:04:40 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2614826900 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_device_timeout.2614826900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_disable_endpoint.1656039448 |
| Short name | T2785 |
| Test name | |
| Test status | |
| Simulation time | 850672600 ps |
| CPU time | 3.78 seconds |
| Started | Sep 04 06:04:29 AM UTC 24 |
| Finished | Sep 04 06:04:34 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1656039448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 42.usbdev_disable_endpoint.1656039448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_disconnected.1653345664 |
| Short name | T2781 |
| Test name | |
| Test status | |
| Simulation time | 138146468 ps |
| CPU time | 1.16 seconds |
| Started | Sep 04 06:04:29 AM UTC 24 |
| Finished | Sep 04 06:04:31 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1653345664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_disconnected.1653345664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_enable.1178562645 |
| Short name | T2783 |
| Test name | |
| Test status | |
| Simulation time | 33869477 ps |
| CPU time | 1.1 seconds |
| Started | Sep 04 06:04:30 AM UTC 24 |
| Finished | Sep 04 06:04:33 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1178562645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 42.usbdev_enable.1178562645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_endpoint_access.1257319469 |
| Short name | T2791 |
| Test name | |
| Test status | |
| Simulation time | 858702799 ps |
| CPU time | 4.01 seconds |
| Started | Sep 04 06:04:31 AM UTC 24 |
| Finished | Sep 04 06:04:36 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1257319469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_endpoint_access.1257319469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_endpoint_types.173719214 |
| Short name | T313 |
| Test name | |
| Test status | |
| Simulation time | 310634108 ps |
| CPU time | 1.9 seconds |
| Started | Sep 04 06:04:31 AM UTC 24 |
| Finished | Sep 04 06:04:34 AM UTC 24 |
| Peak memory | 214932 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=173719214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 42.usbdev_endpoint_types.173719214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_fifo_levels.3713244240 |
| Short name | T2784 |
| Test name | |
| Test status | |
| Simulation time | 153360298 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 06:04:31 AM UTC 24 |
| Finished | Sep 04 06:04:33 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3713244240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_fifo_levels.3713244240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_fifo_rst.1077157746 |
| Short name | T2786 |
| Test name | |
| Test status | |
| Simulation time | 191436993 ps |
| CPU time | 2.38 seconds |
| Started | Sep 04 06:04:31 AM UTC 24 |
| Finished | Sep 04 06:04:34 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1077157746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_fifo_rst.1077157746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_in_iso.179514599 |
| Short name | T2788 |
| Test name | |
| Test status | |
| Simulation time | 238950779 ps |
| CPU time | 1.35 seconds |
| Started | Sep 04 06:04:33 AM UTC 24 |
| Finished | Sep 04 06:04:35 AM UTC 24 |
| Peak memory | 227412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=179514599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 42.usbdev_in_iso.179514599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_in_stall.3985415760 |
| Short name | T2789 |
| Test name | |
| Test status | |
| Simulation time | 168089416 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 06:04:33 AM UTC 24 |
| Finished | Sep 04 06:04:35 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3985415760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_in_stall.3985415760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_in_trans.4246012314 |
| Short name | T2790 |
| Test name | |
| Test status | |
| Simulation time | 196415379 ps |
| CPU time | 1.65 seconds |
| Started | Sep 04 06:04:33 AM UTC 24 |
| Finished | Sep 04 06:04:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4246012314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_in_trans.4246012314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_invalid_sync.3596223253 |
| Short name | T3099 |
| Test name | |
| Test status | |
| Simulation time | 4934056681 ps |
| CPU time | 133.78 seconds |
| Started | Sep 04 06:04:31 AM UTC 24 |
| Finished | Sep 04 06:06:47 AM UTC 24 |
| Peak memory | 229944 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3596223253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 42.usbdev_invalid_sync.3596223253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_iso_retraction.379091756 |
| Short name | T2936 |
| Test name | |
| Test status | |
| Simulation time | 8195893849 ps |
| CPU time | 58.53 seconds |
| Started | Sep 04 06:04:33 AM UTC 24 |
| Finished | Sep 04 06:05:33 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=379091756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 42.usbdev_iso_retraction.379091756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_link_in_err.3759434002 |
| Short name | T2792 |
| Test name | |
| Test status | |
| Simulation time | 207336790 ps |
| CPU time | 1.17 seconds |
| Started | Sep 04 06:04:34 AM UTC 24 |
| Finished | Sep 04 06:04:36 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3759434002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_link_in_err.3759434002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_link_resume.3955337245 |
| Short name | T2838 |
| Test name | |
| Test status | |
| Simulation time | 8411391752 ps |
| CPU time | 20.28 seconds |
| Started | Sep 04 06:04:34 AM UTC 24 |
| Finished | Sep 04 06:04:55 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3955337245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_link_resume.3955337245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_link_suspend.4108594502 |
| Short name | T2837 |
| Test name | |
| Test status | |
| Simulation time | 10773471770 ps |
| CPU time | 18.22 seconds |
| Started | Sep 04 06:04:35 AM UTC 24 |
| Finished | Sep 04 06:04:55 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4108594502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_link_suspend.4108594502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_low_speed_traffic.1910724831 |
| Short name | T2989 |
| Test name | |
| Test status | |
| Simulation time | 3019592438 ps |
| CPU time | 80.58 seconds |
| Started | Sep 04 06:04:35 AM UTC 24 |
| Finished | Sep 04 06:05:58 AM UTC 24 |
| Peak memory | 227660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1910724831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_low_speed_traffic.1910724831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_max_inter_pkt_delay.2396544144 |
| Short name | T2854 |
| Test name | |
| Test status | |
| Simulation time | 2168020611 ps |
| CPU time | 23.92 seconds |
| Started | Sep 04 06:04:35 AM UTC 24 |
| Finished | Sep 04 06:05:01 AM UTC 24 |
| Peak memory | 234088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2396544144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_max_inter_pkt_delay.2396544144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_max_length_in_transaction.1041131098 |
| Short name | T2797 |
| Test name | |
| Test status | |
| Simulation time | 241522604 ps |
| CPU time | 1.77 seconds |
| Started | Sep 04 06:04:35 AM UTC 24 |
| Finished | Sep 04 06:04:39 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1041131098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 42.usbdev_max_length_in_transaction.1041131098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_max_length_out_transaction.1785737162 |
| Short name | T2796 |
| Test name | |
| Test status | |
| Simulation time | 204879408 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 06:04:36 AM UTC 24 |
| Finished | Sep 04 06:04:38 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1785737162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 42.usbdev_max_length_out_transaction.1785737162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_min_inter_pkt_delay.2255804625 |
| Short name | T2831 |
| Test name | |
| Test status | |
| Simulation time | 2084897064 ps |
| CPU time | 14.82 seconds |
| Started | Sep 04 06:04:37 AM UTC 24 |
| Finished | Sep 04 06:04:53 AM UTC 24 |
| Peak memory | 234164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2255804625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_min_inter_pkt_delay.2255804625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_min_length_in_transaction.2807153737 |
| Short name | T2801 |
| Test name | |
| Test status | |
| Simulation time | 159566985 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 06:04:37 AM UTC 24 |
| Finished | Sep 04 06:04:40 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2807153737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 42.usbdev_min_length_in_transaction.2807153737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_min_length_out_transaction.4123988745 |
| Short name | T2800 |
| Test name | |
| Test status | |
| Simulation time | 154416467 ps |
| CPU time | 1.36 seconds |
| Started | Sep 04 06:04:37 AM UTC 24 |
| Finished | Sep 04 06:04:40 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4123988745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 42.usbdev_min_length_out_transaction.4123988745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_nak_trans.2771545790 |
| Short name | T2798 |
| Test name | |
| Test status | |
| Simulation time | 188135184 ps |
| CPU time | 1.11 seconds |
| Started | Sep 04 06:04:37 AM UTC 24 |
| Finished | Sep 04 06:04:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2771545790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_nak_trans.2771545790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_out_iso.706210462 |
| Short name | T2806 |
| Test name | |
| Test status | |
| Simulation time | 174882477 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 06:04:39 AM UTC 24 |
| Finished | Sep 04 06:04:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=706210462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 42.usbdev_out_iso.706210462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_out_stall.2186752127 |
| Short name | T2805 |
| Test name | |
| Test status | |
| Simulation time | 202882087 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 06:04:39 AM UTC 24 |
| Finished | Sep 04 06:04:42 AM UTC 24 |
| Peak memory | 214984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2186752127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_out_stall.2186752127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_out_trans_nak.329832959 |
| Short name | T2803 |
| Test name | |
| Test status | |
| Simulation time | 175903645 ps |
| CPU time | 1.09 seconds |
| Started | Sep 04 06:04:39 AM UTC 24 |
| Finished | Sep 04 06:04:41 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=329832959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_out_trans_nak.329832959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_pending_in_trans.234769041 |
| Short name | T2804 |
| Test name | |
| Test status | |
| Simulation time | 154838282 ps |
| CPU time | 1.35 seconds |
| Started | Sep 04 06:04:39 AM UTC 24 |
| Finished | Sep 04 06:04:42 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=234769041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_pending_in_trans.234769041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_phy_config_pinflip.1710345372 |
| Short name | T2811 |
| Test name | |
| Test status | |
| Simulation time | 263038727 ps |
| CPU time | 1.91 seconds |
| Started | Sep 04 06:04:40 AM UTC 24 |
| Finished | Sep 04 06:04:43 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1710345372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 42.usbdev_phy_config_pinflip.1710345372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_phy_config_usb_ref_disable.3315461054 |
| Short name | T2809 |
| Test name | |
| Test status | |
| Simulation time | 167657748 ps |
| CPU time | 1.31 seconds |
| Started | Sep 04 06:04:40 AM UTC 24 |
| Finished | Sep 04 06:04:43 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3315461054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 42.usbdev_phy_config_usb_ref_disable.3315461054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_phy_pins_sense.341273279 |
| Short name | T2808 |
| Test name | |
| Test status | |
| Simulation time | 29440509 ps |
| CPU time | 0.92 seconds |
| Started | Sep 04 06:04:40 AM UTC 24 |
| Finished | Sep 04 06:04:43 AM UTC 24 |
| Peak memory | 214980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=341273279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 42.usbdev_phy_pins_sense.341273279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_buffer.2647381438 |
| Short name | T2856 |
| Test name | |
| Test status | |
| Simulation time | 6522032191 ps |
| CPU time | 20.82 seconds |
| Started | Sep 04 06:04:40 AM UTC 24 |
| Finished | Sep 04 06:05:03 AM UTC 24 |
| Peak memory | 227460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2647381438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 42.usbdev_pkt_buffer.2647381438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_received.2213460038 |
| Short name | T2810 |
| Test name | |
| Test status | |
| Simulation time | 162895316 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 06:04:40 AM UTC 24 |
| Finished | Sep 04 06:04:43 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2213460038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_pkt_received.2213460038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_sent.330061047 |
| Short name | T2814 |
| Test name | |
| Test status | |
| Simulation time | 234874785 ps |
| CPU time | 1.61 seconds |
| Started | Sep 04 06:04:42 AM UTC 24 |
| Finished | Sep 04 06:04:45 AM UTC 24 |
| Peak memory | 214816 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=330061047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 42.usbdev_pkt_sent.330061047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_random_length_in_transaction.279424997 |
| Short name | T2813 |
| Test name | |
| Test status | |
| Simulation time | 250144668 ps |
| CPU time | 1.57 seconds |
| Started | Sep 04 06:04:42 AM UTC 24 |
| Finished | Sep 04 06:04:45 AM UTC 24 |
| Peak memory | 215232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=279424997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_random_length_in_transaction.279424997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_random_length_out_transaction.3568965327 |
| Short name | T2816 |
| Test name | |
| Test status | |
| Simulation time | 176351191 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 06:04:43 AM UTC 24 |
| Finished | Sep 04 06:04:46 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3568965327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 42.usbdev_random_length_out_transaction.3568965327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_rx_crc_err.1170673555 |
| Short name | T2815 |
| Test name | |
| Test status | |
| Simulation time | 146877290 ps |
| CPU time | 1.31 seconds |
| Started | Sep 04 06:04:43 AM UTC 24 |
| Finished | Sep 04 06:04:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1170673555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 42.usbdev_rx_crc_err.1170673555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_rx_full.3412519997 |
| Short name | T2819 |
| Test name | |
| Test status | |
| Simulation time | 268221983 ps |
| CPU time | 1.85 seconds |
| Started | Sep 04 06:04:43 AM UTC 24 |
| Finished | Sep 04 06:04:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3412519997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 42.usbdev_rx_full.3412519997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_setup_stage.1998448693 |
| Short name | T2817 |
| Test name | |
| Test status | |
| Simulation time | 167506627 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 06:04:43 AM UTC 24 |
| Finished | Sep 04 06:04:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1998448693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_setup_stage.1998448693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_setup_trans_ignored.1182640054 |
| Short name | T2818 |
| Test name | |
| Test status | |
| Simulation time | 166036390 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 06:04:43 AM UTC 24 |
| Finished | Sep 04 06:04:46 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1182640054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 42.usbdev_setup_trans_ignored.1182640054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_smoke.2814948321 |
| Short name | T2767 |
| Test name | |
| Test status | |
| Simulation time | 239147762 ps |
| CPU time | 1.79 seconds |
| Started | Sep 04 06:04:44 AM UTC 24 |
| Finished | Sep 04 06:04:47 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2814948321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_smoke.2814948321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_spurious_pids_ignored.3269909315 |
| Short name | T2873 |
| Test name | |
| Test status | |
| Simulation time | 2972692074 ps |
| CPU time | 20.64 seconds |
| Started | Sep 04 06:04:44 AM UTC 24 |
| Finished | Sep 04 06:05:06 AM UTC 24 |
| Peak memory | 217340 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3269909315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 42.usbdev_spurious_pids_ignored.3269909315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_stall_priority_over_nak.305710995 |
| Short name | T2820 |
| Test name | |
| Test status | |
| Simulation time | 175511481 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 06:04:45 AM UTC 24 |
| Finished | Sep 04 06:04:47 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=305710995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_stall_priority_over_nak.305710995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_stall_trans.2118948140 |
| Short name | T1954 |
| Test name | |
| Test status | |
| Simulation time | 149906862 ps |
| CPU time | 1.3 seconds |
| Started | Sep 04 06:04:46 AM UTC 24 |
| Finished | Sep 04 06:04:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2118948140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_stall_trans.2118948140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_stream_len_max.1107713363 |
| Short name | T1924 |
| Test name | |
| Test status | |
| Simulation time | 372395444 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 06:04:46 AM UTC 24 |
| Finished | Sep 04 06:04:48 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1107713363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_stream_len_max.1107713363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_streaming_out.2160590931 |
| Short name | T3027 |
| Test name | |
| Test status | |
| Simulation time | 2821931245 ps |
| CPU time | 84.21 seconds |
| Started | Sep 04 06:04:46 AM UTC 24 |
| Finished | Sep 04 06:06:12 AM UTC 24 |
| Peak memory | 227528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2160590931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_streaming_out.2160590931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_timeout_missing_host_handshake.1248198744 |
| Short name | T2878 |
| Test name | |
| Test status | |
| Simulation time | 1418668895 ps |
| CPU time | 37.57 seconds |
| Started | Sep 04 06:04:29 AM UTC 24 |
| Finished | Sep 04 06:05:08 AM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1248198744 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_timeout_missing_host_handshake.1248198744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/42.usbdev_tx_rx_disruption.331220051 |
| Short name | T2823 |
| Test name | |
| Test status | |
| Simulation time | 424781892 ps |
| CPU time | 2.26 seconds |
| Started | Sep 04 06:04:46 AM UTC 24 |
| Finished | Sep 04 06:04:49 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=331220051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_tx _rx_disruption.331220051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/42.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/420.usbdev_tx_rx_disruption.301406908 |
| Short name | T3688 |
| Test name | |
| Test status | |
| Simulation time | 593094003 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 06:10:04 AM UTC 24 |
| Finished | Sep 04 06:10:08 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=301406908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 420.usbdev_t x_rx_disruption.301406908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/420.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/421.usbdev_tx_rx_disruption.3034909543 |
| Short name | T3709 |
| Test name | |
| Test status | |
| Simulation time | 481282466 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 06:10:04 AM UTC 24 |
| Finished | Sep 04 06:10:10 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3034909543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 421.usbdev_ tx_rx_disruption.3034909543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/421.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/422.usbdev_tx_rx_disruption.2494499902 |
| Short name | T3708 |
| Test name | |
| Test status | |
| Simulation time | 643742426 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 06:10:04 AM UTC 24 |
| Finished | Sep 04 06:10:10 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2494499902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 422.usbdev_ tx_rx_disruption.2494499902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/422.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/423.usbdev_tx_rx_disruption.3954126691 |
| Short name | T3710 |
| Test name | |
| Test status | |
| Simulation time | 583331502 ps |
| CPU time | 1.64 seconds |
| Started | Sep 04 06:10:04 AM UTC 24 |
| Finished | Sep 04 06:10:10 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3954126691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 423.usbdev_ tx_rx_disruption.3954126691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/423.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/424.usbdev_tx_rx_disruption.274613916 |
| Short name | T3691 |
| Test name | |
| Test status | |
| Simulation time | 460134656 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 06:10:06 AM UTC 24 |
| Finished | Sep 04 06:10:08 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=274613916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 424.usbdev_t x_rx_disruption.274613916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/424.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/425.usbdev_tx_rx_disruption.1533536076 |
| Short name | T3696 |
| Test name | |
| Test status | |
| Simulation time | 553873485 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 06:10:06 AM UTC 24 |
| Finished | Sep 04 06:10:08 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1533536076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 425.usbdev_ tx_rx_disruption.1533536076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/425.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/426.usbdev_tx_rx_disruption.4040640198 |
| Short name | T3693 |
| Test name | |
| Test status | |
| Simulation time | 450122562 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 06:10:06 AM UTC 24 |
| Finished | Sep 04 06:10:08 AM UTC 24 |
| Peak memory | 214912 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4040640198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 426.usbdev_ tx_rx_disruption.4040640198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/426.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/427.usbdev_tx_rx_disruption.2622367088 |
| Short name | T3692 |
| Test name | |
| Test status | |
| Simulation time | 636963957 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 06:10:06 AM UTC 24 |
| Finished | Sep 04 06:10:08 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2622367088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 427.usbdev_ tx_rx_disruption.2622367088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/427.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/429.usbdev_tx_rx_disruption.489760235 |
| Short name | T3697 |
| Test name | |
| Test status | |
| Simulation time | 524491748 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 06:10:06 AM UTC 24 |
| Finished | Sep 04 06:10:08 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=489760235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 429.usbdev_t x_rx_disruption.489760235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/429.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_alert_test.3483627700 |
| Short name | T2880 |
| Test name | |
| Test status | |
| Simulation time | 31220305 ps |
| CPU time | 0.8 seconds |
| Started | Sep 04 06:05:07 AM UTC 24 |
| Finished | Sep 04 06:05:09 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3483627700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 43.usbdev_alert_test.3483627700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_disconnect.691778229 |
| Short name | T2863 |
| Test name | |
| Test status | |
| Simulation time | 11863992609 ps |
| CPU time | 15.81 seconds |
| Started | Sep 04 06:04:47 AM UTC 24 |
| Finished | Sep 04 06:05:04 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=691778229 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_disconnect.691778229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_reset.1668911142 |
| Short name | T2881 |
| Test name | |
| Test status | |
| Simulation time | 13833346001 ps |
| CPU time | 20.7 seconds |
| Started | Sep 04 06:04:47 AM UTC 24 |
| Finished | Sep 04 06:05:09 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1668911142 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_reset.1668911142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_resume.603669538 |
| Short name | T2943 |
| Test name | |
| Test status | |
| Simulation time | 30481451104 ps |
| CPU time | 47.75 seconds |
| Started | Sep 04 06:04:47 AM UTC 24 |
| Finished | Sep 04 06:05:37 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=603669538 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_resume.603669538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_av_buffer.543046027 |
| Short name | T2825 |
| Test name | |
| Test status | |
| Simulation time | 202915863 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 06:04:49 AM UTC 24 |
| Finished | Sep 04 06:04:51 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=543046027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_av_buffer.543046027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_bitstuff_err.3778575317 |
| Short name | T2827 |
| Test name | |
| Test status | |
| Simulation time | 168024406 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 06:04:49 AM UTC 24 |
| Finished | Sep 04 06:04:51 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3778575317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_bitstuff_err.3778575317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_data_toggle_clear.3660553938 |
| Short name | T2826 |
| Test name | |
| Test status | |
| Simulation time | 275105959 ps |
| CPU time | 1.37 seconds |
| Started | Sep 04 06:04:49 AM UTC 24 |
| Finished | Sep 04 06:04:51 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3660553938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 43.usbdev_data_toggle_clear.3660553938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_data_toggle_restore.3354159459 |
| Short name | T2835 |
| Test name | |
| Test status | |
| Simulation time | 1352784685 ps |
| CPU time | 4.76 seconds |
| Started | Sep 04 06:04:49 AM UTC 24 |
| Finished | Sep 04 06:04:55 AM UTC 24 |
| Peak memory | 217188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3354159459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_data_toggle_restore.3354159459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_device_address.1286706734 |
| Short name | T2904 |
| Test name | |
| Test status | |
| Simulation time | 15780530384 ps |
| CPU time | 27.79 seconds |
| Started | Sep 04 06:04:50 AM UTC 24 |
| Finished | Sep 04 06:05:20 AM UTC 24 |
| Peak memory | 217424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1286706734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_device_address.1286706734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_device_timeout.2582451451 |
| Short name | T2841 |
| Test name | |
| Test status | |
| Simulation time | 739808145 ps |
| CPU time | 5.1 seconds |
| Started | Sep 04 06:04:51 AM UTC 24 |
| Finished | Sep 04 06:04:57 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2582451451 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_device_timeout.2582451451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_disable_endpoint.2211507574 |
| Short name | T2836 |
| Test name | |
| Test status | |
| Simulation time | 670627693 ps |
| CPU time | 3.39 seconds |
| Started | Sep 04 06:04:51 AM UTC 24 |
| Finished | Sep 04 06:04:55 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2211507574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 43.usbdev_disable_endpoint.2211507574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_disconnected.1117157523 |
| Short name | T2833 |
| Test name | |
| Test status | |
| Simulation time | 144056346 ps |
| CPU time | 1.33 seconds |
| Started | Sep 04 06:04:52 AM UTC 24 |
| Finished | Sep 04 06:04:54 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1117157523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_disconnected.1117157523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_enable.3033416217 |
| Short name | T2832 |
| Test name | |
| Test status | |
| Simulation time | 84517399 ps |
| CPU time | 1.26 seconds |
| Started | Sep 04 06:04:52 AM UTC 24 |
| Finished | Sep 04 06:04:54 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3033416217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 43.usbdev_enable.3033416217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_endpoint_access.1902143806 |
| Short name | T2840 |
| Test name | |
| Test status | |
| Simulation time | 1061212180 ps |
| CPU time | 3.13 seconds |
| Started | Sep 04 06:04:52 AM UTC 24 |
| Finished | Sep 04 06:04:56 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1902143806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_endpoint_access.1902143806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_endpoint_types.392156105 |
| Short name | T345 |
| Test name | |
| Test status | |
| Simulation time | 367320156 ps |
| CPU time | 2.17 seconds |
| Started | Sep 04 06:04:53 AM UTC 24 |
| Finished | Sep 04 06:04:57 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=392156105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 43.usbdev_endpoint_types.392156105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_fifo_levels.2843255323 |
| Short name | T507 |
| Test name | |
| Test status | |
| Simulation time | 271593323 ps |
| CPU time | 1.76 seconds |
| Started | Sep 04 06:04:54 AM UTC 24 |
| Finished | Sep 04 06:04:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2843255323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_fifo_levels.2843255323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_fifo_rst.589257121 |
| Short name | T2842 |
| Test name | |
| Test status | |
| Simulation time | 166914178 ps |
| CPU time | 2.1 seconds |
| Started | Sep 04 06:04:54 AM UTC 24 |
| Finished | Sep 04 06:04:57 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=589257121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 43.usbdev_fifo_rst.589257121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_in_iso.735187427 |
| Short name | T2844 |
| Test name | |
| Test status | |
| Simulation time | 155596322 ps |
| CPU time | 1.21 seconds |
| Started | Sep 04 06:04:55 AM UTC 24 |
| Finished | Sep 04 06:04:57 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=735187427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 43.usbdev_in_iso.735187427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_in_stall.783352452 |
| Short name | T2843 |
| Test name | |
| Test status | |
| Simulation time | 147126071 ps |
| CPU time | 1.09 seconds |
| Started | Sep 04 06:04:55 AM UTC 24 |
| Finished | Sep 04 06:04:57 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=783352452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 43.usbdev_in_stall.783352452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_in_trans.847191899 |
| Short name | T2846 |
| Test name | |
| Test status | |
| Simulation time | 249692761 ps |
| CPU time | 1.25 seconds |
| Started | Sep 04 06:04:57 AM UTC 24 |
| Finished | Sep 04 06:05:00 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=847191899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 43.usbdev_in_trans.847191899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_invalid_sync.679285232 |
| Short name | T3162 |
| Test name | |
| Test status | |
| Simulation time | 5348596691 ps |
| CPU time | 139.74 seconds |
| Started | Sep 04 06:04:54 AM UTC 24 |
| Finished | Sep 04 06:07:16 AM UTC 24 |
| Peak memory | 227684 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=679285232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 43.usbdev_invalid_sync.679285232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_iso_retraction.3397079291 |
| Short name | T2995 |
| Test name | |
| Test status | |
| Simulation time | 8139826344 ps |
| CPU time | 60.74 seconds |
| Started | Sep 04 06:04:57 AM UTC 24 |
| Finished | Sep 04 06:06:00 AM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3397079291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_iso_retraction.3397079291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_link_in_err.1874620802 |
| Short name | T2850 |
| Test name | |
| Test status | |
| Simulation time | 266771005 ps |
| CPU time | 1.71 seconds |
| Started | Sep 04 06:04:57 AM UTC 24 |
| Finished | Sep 04 06:05:00 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1874620802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_link_in_err.1874620802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_link_resume.3253274644 |
| Short name | T2987 |
| Test name | |
| Test status | |
| Simulation time | 33306514864 ps |
| CPU time | 57.42 seconds |
| Started | Sep 04 06:04:57 AM UTC 24 |
| Finished | Sep 04 06:05:56 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3253274644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_link_resume.3253274644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_link_suspend.873049224 |
| Short name | T2885 |
| Test name | |
| Test status | |
| Simulation time | 6355709959 ps |
| CPU time | 13.3 seconds |
| Started | Sep 04 06:04:58 AM UTC 24 |
| Finished | Sep 04 06:05:12 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=873049224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_link_suspend.873049224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_low_speed_traffic.3181293573 |
| Short name | T2941 |
| Test name | |
| Test status | |
| Simulation time | 3855893210 ps |
| CPU time | 36.28 seconds |
| Started | Sep 04 06:04:58 AM UTC 24 |
| Finished | Sep 04 06:05:35 AM UTC 24 |
| Peak memory | 229528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3181293573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_low_speed_traffic.3181293573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_max_inter_pkt_delay.382287700 |
| Short name | T2891 |
| Test name | |
| Test status | |
| Simulation time | 1441351126 ps |
| CPU time | 14.28 seconds |
| Started | Sep 04 06:04:58 AM UTC 24 |
| Finished | Sep 04 06:05:13 AM UTC 24 |
| Peak memory | 227564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=382287700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_max_inter_pkt_delay.382287700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_max_length_in_transaction.1901364423 |
| Short name | T2848 |
| Test name | |
| Test status | |
| Simulation time | 250170893 ps |
| CPU time | 1.3 seconds |
| Started | Sep 04 06:04:58 AM UTC 24 |
| Finished | Sep 04 06:05:00 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1901364423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 43.usbdev_max_length_in_transaction.1901364423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_max_length_out_transaction.1844575447 |
| Short name | T2851 |
| Test name | |
| Test status | |
| Simulation time | 233080574 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 06:04:58 AM UTC 24 |
| Finished | Sep 04 06:05:00 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1844575447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 43.usbdev_max_length_out_transaction.1844575447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_min_inter_pkt_delay.684814392 |
| Short name | T2918 |
| Test name | |
| Test status | |
| Simulation time | 2924882786 ps |
| CPU time | 25.47 seconds |
| Started | Sep 04 06:04:58 AM UTC 24 |
| Finished | Sep 04 06:05:25 AM UTC 24 |
| Peak memory | 229672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=684814392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_min_inter_pkt_delay.684814392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_min_length_in_transaction.1655988573 |
| Short name | T2849 |
| Test name | |
| Test status | |
| Simulation time | 148756714 ps |
| CPU time | 1.24 seconds |
| Started | Sep 04 06:04:58 AM UTC 24 |
| Finished | Sep 04 06:05:00 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1655988573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 43.usbdev_min_length_in_transaction.1655988573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_min_length_out_transaction.661029532 |
| Short name | T2852 |
| Test name | |
| Test status | |
| Simulation time | 177671211 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 06:04:58 AM UTC 24 |
| Finished | Sep 04 06:05:00 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=661029532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 43.usbdev_min_length_out_transaction.661029532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_nak_trans.2977440491 |
| Short name | T2853 |
| Test name | |
| Test status | |
| Simulation time | 197338290 ps |
| CPU time | 1.29 seconds |
| Started | Sep 04 06:04:58 AM UTC 24 |
| Finished | Sep 04 06:05:00 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2977440491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_nak_trans.2977440491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_out_iso.3401143160 |
| Short name | T2855 |
| Test name | |
| Test status | |
| Simulation time | 192542348 ps |
| CPU time | 1.63 seconds |
| Started | Sep 04 06:04:59 AM UTC 24 |
| Finished | Sep 04 06:05:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3401143160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 43.usbdev_out_iso.3401143160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_out_stall.2558297413 |
| Short name | T2858 |
| Test name | |
| Test status | |
| Simulation time | 191903237 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 06:05:00 AM UTC 24 |
| Finished | Sep 04 06:05:03 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2558297413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_out_stall.2558297413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_out_trans_nak.4102709823 |
| Short name | T2857 |
| Test name | |
| Test status | |
| Simulation time | 184436907 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 06:05:00 AM UTC 24 |
| Finished | Sep 04 06:05:03 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4102709823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 43.usbdev_out_trans_nak.4102709823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_pending_in_trans.577547481 |
| Short name | T2859 |
| Test name | |
| Test status | |
| Simulation time | 205913291 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 06:05:00 AM UTC 24 |
| Finished | Sep 04 06:05:03 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=577547481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_pending_in_trans.577547481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_phy_config_pinflip.3217492596 |
| Short name | T2860 |
| Test name | |
| Test status | |
| Simulation time | 213016723 ps |
| CPU time | 1.67 seconds |
| Started | Sep 04 06:05:01 AM UTC 24 |
| Finished | Sep 04 06:05:03 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3217492596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 43.usbdev_phy_config_pinflip.3217492596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_phy_config_usb_ref_disable.3671052832 |
| Short name | T2862 |
| Test name | |
| Test status | |
| Simulation time | 143539582 ps |
| CPU time | 1.36 seconds |
| Started | Sep 04 06:05:02 AM UTC 24 |
| Finished | Sep 04 06:05:04 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3671052832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 43.usbdev_phy_config_usb_ref_disable.3671052832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_phy_pins_sense.1490011052 |
| Short name | T2861 |
| Test name | |
| Test status | |
| Simulation time | 29285138 ps |
| CPU time | 1.05 seconds |
| Started | Sep 04 06:05:02 AM UTC 24 |
| Finished | Sep 04 06:05:04 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1490011052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_phy_pins_sense.1490011052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_buffer.3080579179 |
| Short name | T2997 |
| Test name | |
| Test status | |
| Simulation time | 16099895691 ps |
| CPU time | 56.39 seconds |
| Started | Sep 04 06:05:02 AM UTC 24 |
| Finished | Sep 04 06:06:00 AM UTC 24 |
| Peak memory | 227624 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3080579179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_pkt_buffer.3080579179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_received.1253033643 |
| Short name | T2864 |
| Test name | |
| Test status | |
| Simulation time | 150858875 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 06:05:02 AM UTC 24 |
| Finished | Sep 04 06:05:05 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1253033643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_pkt_received.1253033643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_sent.3620274985 |
| Short name | T2865 |
| Test name | |
| Test status | |
| Simulation time | 183824889 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 06:05:02 AM UTC 24 |
| Finished | Sep 04 06:05:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3620274985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_pkt_sent.3620274985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_random_length_in_transaction.807625634 |
| Short name | T2870 |
| Test name | |
| Test status | |
| Simulation time | 164647304 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 06:05:03 AM UTC 24 |
| Finished | Sep 04 06:05:06 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=807625634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_random_length_in_transaction.807625634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_random_length_out_transaction.627393281 |
| Short name | T2871 |
| Test name | |
| Test status | |
| Simulation time | 169413872 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 06:05:03 AM UTC 24 |
| Finished | Sep 04 06:05:06 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=627393281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 43.usbdev_random_length_out_transaction.627393281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_rx_crc_err.1016595147 |
| Short name | T2869 |
| Test name | |
| Test status | |
| Simulation time | 155342255 ps |
| CPU time | 1.25 seconds |
| Started | Sep 04 06:05:03 AM UTC 24 |
| Finished | Sep 04 06:05:06 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1016595147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_rx_crc_err.1016595147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_rx_full.656999830 |
| Short name | T2872 |
| Test name | |
| Test status | |
| Simulation time | 254212047 ps |
| CPU time | 1.36 seconds |
| Started | Sep 04 06:05:04 AM UTC 24 |
| Finished | Sep 04 06:05:06 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=656999830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 43.usbdev_rx_full.656999830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_setup_stage.119325733 |
| Short name | T2868 |
| Test name | |
| Test status | |
| Simulation time | 177645087 ps |
| CPU time | 1.06 seconds |
| Started | Sep 04 06:05:04 AM UTC 24 |
| Finished | Sep 04 06:05:06 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=119325733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_setup_stage.119325733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_setup_trans_ignored.1440802898 |
| Short name | T2874 |
| Test name | |
| Test status | |
| Simulation time | 156539130 ps |
| CPU time | 0.82 seconds |
| Started | Sep 04 06:05:05 AM UTC 24 |
| Finished | Sep 04 06:05:07 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1440802898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 43.usbdev_setup_trans_ignored.1440802898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_smoke.469709584 |
| Short name | T2876 |
| Test name | |
| Test status | |
| Simulation time | 245260925 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 06:05:05 AM UTC 24 |
| Finished | Sep 04 06:05:08 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=469709584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_smoke.469709584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_spurious_pids_ignored.2408419727 |
| Short name | T2935 |
| Test name | |
| Test status | |
| Simulation time | 2751265335 ps |
| CPU time | 26.28 seconds |
| Started | Sep 04 06:05:05 AM UTC 24 |
| Finished | Sep 04 06:05:33 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2408419727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 43.usbdev_spurious_pids_ignored.2408419727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_stall_priority_over_nak.284068607 |
| Short name | T2877 |
| Test name | |
| Test status | |
| Simulation time | 175095171 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 06:05:05 AM UTC 24 |
| Finished | Sep 04 06:05:08 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=284068607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_stall_priority_over_nak.284068607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_stall_trans.1501263703 |
| Short name | T2875 |
| Test name | |
| Test status | |
| Simulation time | 209706150 ps |
| CPU time | 1.35 seconds |
| Started | Sep 04 06:05:05 AM UTC 24 |
| Finished | Sep 04 06:05:07 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1501263703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_stall_trans.1501263703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_stream_len_max.3941600900 |
| Short name | T2886 |
| Test name | |
| Test status | |
| Simulation time | 1185538643 ps |
| CPU time | 4.17 seconds |
| Started | Sep 04 06:05:07 AM UTC 24 |
| Finished | Sep 04 06:05:12 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3941600900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_stream_len_max.3941600900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_streaming_out.2053629201 |
| Short name | T3013 |
| Test name | |
| Test status | |
| Simulation time | 2460863189 ps |
| CPU time | 59.93 seconds |
| Started | Sep 04 06:05:05 AM UTC 24 |
| Finished | Sep 04 06:06:07 AM UTC 24 |
| Peak memory | 234236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2053629201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_streaming_out.2053629201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_timeout_missing_host_handshake.3879759394 |
| Short name | T2930 |
| Test name | |
| Test status | |
| Simulation time | 5721227397 ps |
| CPU time | 38.55 seconds |
| Started | Sep 04 06:04:51 AM UTC 24 |
| Finished | Sep 04 06:05:30 AM UTC 24 |
| Peak memory | 217152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3879759394 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_timeout_missing_host_handshake.3879759394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/43.usbdev_tx_rx_disruption.4013286602 |
| Short name | T2882 |
| Test name | |
| Test status | |
| Simulation time | 466838775 ps |
| CPU time | 1.62 seconds |
| Started | Sep 04 06:05:07 AM UTC 24 |
| Finished | Sep 04 06:05:09 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4013286602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_t x_rx_disruption.4013286602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/43.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/430.usbdev_tx_rx_disruption.3026845718 |
| Short name | T3698 |
| Test name | |
| Test status | |
| Simulation time | 582687858 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 06:10:06 AM UTC 24 |
| Finished | Sep 04 06:10:09 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3026845718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 430.usbdev_ tx_rx_disruption.3026845718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/430.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/431.usbdev_tx_rx_disruption.1261624209 |
| Short name | T3694 |
| Test name | |
| Test status | |
| Simulation time | 459941642 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 06:10:06 AM UTC 24 |
| Finished | Sep 04 06:10:08 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1261624209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 431.usbdev_ tx_rx_disruption.1261624209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/431.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/432.usbdev_tx_rx_disruption.414378522 |
| Short name | T3711 |
| Test name | |
| Test status | |
| Simulation time | 530415847 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 06:10:08 AM UTC 24 |
| Finished | Sep 04 06:10:11 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=414378522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 432.usbdev_t x_rx_disruption.414378522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/432.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/433.usbdev_tx_rx_disruption.3498986502 |
| Short name | T3735 |
| Test name | |
| Test status | |
| Simulation time | 580674874 ps |
| CPU time | 1.79 seconds |
| Started | Sep 04 06:10:10 AM UTC 24 |
| Finished | Sep 04 06:10:13 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3498986502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 433.usbdev_ tx_rx_disruption.3498986502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/433.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/434.usbdev_tx_rx_disruption.2682695923 |
| Short name | T3734 |
| Test name | |
| Test status | |
| Simulation time | 588604309 ps |
| CPU time | 1.78 seconds |
| Started | Sep 04 06:10:10 AM UTC 24 |
| Finished | Sep 04 06:10:13 AM UTC 24 |
| Peak memory | 215020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2682695923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 434.usbdev_ tx_rx_disruption.2682695923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/434.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/435.usbdev_tx_rx_disruption.3200816525 |
| Short name | T3725 |
| Test name | |
| Test status | |
| Simulation time | 420208736 ps |
| CPU time | 1.35 seconds |
| Started | Sep 04 06:10:10 AM UTC 24 |
| Finished | Sep 04 06:10:12 AM UTC 24 |
| Peak memory | 214860 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3200816525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 435.usbdev_ tx_rx_disruption.3200816525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/435.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/436.usbdev_tx_rx_disruption.794282076 |
| Short name | T3729 |
| Test name | |
| Test status | |
| Simulation time | 432971949 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 06:10:10 AM UTC 24 |
| Finished | Sep 04 06:10:13 AM UTC 24 |
| Peak memory | 214892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=794282076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 436.usbdev_t x_rx_disruption.794282076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/436.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/437.usbdev_tx_rx_disruption.3649815662 |
| Short name | T3726 |
| Test name | |
| Test status | |
| Simulation time | 480232462 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 06:10:10 AM UTC 24 |
| Finished | Sep 04 06:10:12 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3649815662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 437.usbdev_ tx_rx_disruption.3649815662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/437.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/438.usbdev_tx_rx_disruption.1620790315 |
| Short name | T3732 |
| Test name | |
| Test status | |
| Simulation time | 549147256 ps |
| CPU time | 1.68 seconds |
| Started | Sep 04 06:10:10 AM UTC 24 |
| Finished | Sep 04 06:10:13 AM UTC 24 |
| Peak memory | 215004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1620790315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 438.usbdev_ tx_rx_disruption.1620790315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/438.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/439.usbdev_tx_rx_disruption.1524745102 |
| Short name | T3731 |
| Test name | |
| Test status | |
| Simulation time | 466106001 ps |
| CPU time | 1.66 seconds |
| Started | Sep 04 06:10:10 AM UTC 24 |
| Finished | Sep 04 06:10:13 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1524745102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 439.usbdev_ tx_rx_disruption.1524745102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/439.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_alert_test.1528986093 |
| Short name | T2933 |
| Test name | |
| Test status | |
| Simulation time | 52527287 ps |
| CPU time | 1.06 seconds |
| Started | Sep 04 06:05:29 AM UTC 24 |
| Finished | Sep 04 06:05:31 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1528986093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 44.usbdev_alert_test.1528986093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_disconnect.857421050 |
| Short name | T2897 |
| Test name | |
| Test status | |
| Simulation time | 3647743748 ps |
| CPU time | 8.23 seconds |
| Started | Sep 04 06:05:07 AM UTC 24 |
| Finished | Sep 04 06:05:16 AM UTC 24 |
| Peak memory | 227480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=857421050 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_disconnect.857421050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_reset.2378717924 |
| Short name | T2920 |
| Test name | |
| Test status | |
| Simulation time | 14425076452 ps |
| CPU time | 17.21 seconds |
| Started | Sep 04 06:05:07 AM UTC 24 |
| Finished | Sep 04 06:05:25 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2378717924 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_reset.2378717924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_resume.748776814 |
| Short name | T2968 |
| Test name | |
| Test status | |
| Simulation time | 23736679556 ps |
| CPU time | 40.3 seconds |
| Started | Sep 04 06:05:07 AM UTC 24 |
| Finished | Sep 04 06:05:49 AM UTC 24 |
| Peak memory | 227676 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=748776814 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_resume.748776814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_av_buffer.4274277634 |
| Short name | T2887 |
| Test name | |
| Test status | |
| Simulation time | 162582879 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 06:05:10 AM UTC 24 |
| Finished | Sep 04 06:05:12 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4274277634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_av_buffer.4274277634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_bitstuff_err.1264030681 |
| Short name | T2888 |
| Test name | |
| Test status | |
| Simulation time | 169077629 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 06:05:10 AM UTC 24 |
| Finished | Sep 04 06:05:12 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1264030681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_bitstuff_err.1264030681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_data_toggle_clear.2735029076 |
| Short name | T2889 |
| Test name | |
| Test status | |
| Simulation time | 372505357 ps |
| CPU time | 2.14 seconds |
| Started | Sep 04 06:05:10 AM UTC 24 |
| Finished | Sep 04 06:05:13 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2735029076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 44.usbdev_data_toggle_clear.2735029076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_data_toggle_restore.2759504497 |
| Short name | T2890 |
| Test name | |
| Test status | |
| Simulation time | 390193350 ps |
| CPU time | 2.17 seconds |
| Started | Sep 04 06:05:10 AM UTC 24 |
| Finished | Sep 04 06:05:13 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2759504497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_data_toggle_restore.2759504497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_device_address.2845766333 |
| Short name | T2956 |
| Test name | |
| Test status | |
| Simulation time | 13609222698 ps |
| CPU time | 30.99 seconds |
| Started | Sep 04 06:05:10 AM UTC 24 |
| Finished | Sep 04 06:05:42 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2845766333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_device_address.2845766333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_device_timeout.2456689501 |
| Short name | T2902 |
| Test name | |
| Test status | |
| Simulation time | 823070433 ps |
| CPU time | 7.84 seconds |
| Started | Sep 04 06:05:10 AM UTC 24 |
| Finished | Sep 04 06:05:19 AM UTC 24 |
| Peak memory | 217328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2456689501 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_device_timeout.2456689501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_disable_endpoint.1893084720 |
| Short name | T2894 |
| Test name | |
| Test status | |
| Simulation time | 436943379 ps |
| CPU time | 2.73 seconds |
| Started | Sep 04 06:05:11 AM UTC 24 |
| Finished | Sep 04 06:05:15 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1893084720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 44.usbdev_disable_endpoint.1893084720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_disconnected.3700579573 |
| Short name | T2893 |
| Test name | |
| Test status | |
| Simulation time | 135225726 ps |
| CPU time | 1.35 seconds |
| Started | Sep 04 06:05:11 AM UTC 24 |
| Finished | Sep 04 06:05:14 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3700579573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_disconnected.3700579573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_enable.3492907486 |
| Short name | T2892 |
| Test name | |
| Test status | |
| Simulation time | 33846434 ps |
| CPU time | 1.01 seconds |
| Started | Sep 04 06:05:11 AM UTC 24 |
| Finished | Sep 04 06:05:13 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3492907486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 44.usbdev_enable.3492907486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_endpoint_access.2569381652 |
| Short name | T2896 |
| Test name | |
| Test status | |
| Simulation time | 978866457 ps |
| CPU time | 3.67 seconds |
| Started | Sep 04 06:05:11 AM UTC 24 |
| Finished | Sep 04 06:05:16 AM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2569381652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_endpoint_access.2569381652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_fifo_levels.758755400 |
| Short name | T504 |
| Test name | |
| Test status | |
| Simulation time | 266134264 ps |
| CPU time | 1.33 seconds |
| Started | Sep 04 06:05:13 AM UTC 24 |
| Finished | Sep 04 06:05:15 AM UTC 24 |
| Peak memory | 214964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=758755400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 44.usbdev_fifo_levels.758755400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_fifo_rst.35009523 |
| Short name | T2898 |
| Test name | |
| Test status | |
| Simulation time | 178658602 ps |
| CPU time | 2.68 seconds |
| Started | Sep 04 06:05:13 AM UTC 24 |
| Finished | Sep 04 06:05:17 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=35009523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 44.usbdev_fifo_rst.35009523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_in_iso.3086668371 |
| Short name | T2895 |
| Test name | |
| Test status | |
| Simulation time | 153296575 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 06:05:13 AM UTC 24 |
| Finished | Sep 04 06:05:16 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3086668371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 44.usbdev_in_iso.3086668371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_in_stall.2740113631 |
| Short name | T2899 |
| Test name | |
| Test status | |
| Simulation time | 150612366 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 06:05:15 AM UTC 24 |
| Finished | Sep 04 06:05:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2740113631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_in_stall.2740113631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_in_trans.1853681322 |
| Short name | T2900 |
| Test name | |
| Test status | |
| Simulation time | 240198455 ps |
| CPU time | 1.37 seconds |
| Started | Sep 04 06:05:15 AM UTC 24 |
| Finished | Sep 04 06:05:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1853681322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_in_trans.1853681322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_invalid_sync.3544456624 |
| Short name | T3106 |
| Test name | |
| Test status | |
| Simulation time | 3128413130 ps |
| CPU time | 95.4 seconds |
| Started | Sep 04 06:05:13 AM UTC 24 |
| Finished | Sep 04 06:06:51 AM UTC 24 |
| Peak memory | 229612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3544456624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 44.usbdev_invalid_sync.3544456624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_iso_retraction.4163339696 |
| Short name | T3091 |
| Test name | |
| Test status | |
| Simulation time | 10975270959 ps |
| CPU time | 87.63 seconds |
| Started | Sep 04 06:05:15 AM UTC 24 |
| Finished | Sep 04 06:06:44 AM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4163339696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_iso_retraction.4163339696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_link_in_err.4154608739 |
| Short name | T2901 |
| Test name | |
| Test status | |
| Simulation time | 258765063 ps |
| CPU time | 1.65 seconds |
| Started | Sep 04 06:05:15 AM UTC 24 |
| Finished | Sep 04 06:05:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4154608739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_link_in_err.4154608739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_link_resume.273439806 |
| Short name | T2954 |
| Test name | |
| Test status | |
| Simulation time | 8335452775 ps |
| CPU time | 24.66 seconds |
| Started | Sep 04 06:05:15 AM UTC 24 |
| Finished | Sep 04 06:05:41 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=273439806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 44.usbdev_link_resume.273439806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_link_suspend.1481858251 |
| Short name | T2952 |
| Test name | |
| Test status | |
| Simulation time | 10543204611 ps |
| CPU time | 22.95 seconds |
| Started | Sep 04 06:05:16 AM UTC 24 |
| Finished | Sep 04 06:05:40 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1481858251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_link_suspend.1481858251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_low_speed_traffic.1327403309 |
| Short name | T2971 |
| Test name | |
| Test status | |
| Simulation time | 3410038075 ps |
| CPU time | 33.47 seconds |
| Started | Sep 04 06:05:16 AM UTC 24 |
| Finished | Sep 04 06:05:51 AM UTC 24 |
| Peak memory | 229724 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1327403309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_low_speed_traffic.1327403309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_max_inter_pkt_delay.4078519336 |
| Short name | T2976 |
| Test name | |
| Test status | |
| Simulation time | 3218366959 ps |
| CPU time | 34.77 seconds |
| Started | Sep 04 06:05:16 AM UTC 24 |
| Finished | Sep 04 06:05:52 AM UTC 24 |
| Peak memory | 227644 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4078519336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_max_inter_pkt_delay.4078519336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_max_length_in_transaction.3209023218 |
| Short name | T2910 |
| Test name | |
| Test status | |
| Simulation time | 297999098 ps |
| CPU time | 2.06 seconds |
| Started | Sep 04 06:05:18 AM UTC 24 |
| Finished | Sep 04 06:05:21 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3209023218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 44.usbdev_max_length_in_transaction.3209023218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_max_length_out_transaction.2352097399 |
| Short name | T2905 |
| Test name | |
| Test status | |
| Simulation time | 198847505 ps |
| CPU time | 1.1 seconds |
| Started | Sep 04 06:05:18 AM UTC 24 |
| Finished | Sep 04 06:05:20 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2352097399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 44.usbdev_max_length_out_transaction.2352097399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_min_inter_pkt_delay.970595438 |
| Short name | T3015 |
| Test name | |
| Test status | |
| Simulation time | 1699778724 ps |
| CPU time | 48.73 seconds |
| Started | Sep 04 06:05:18 AM UTC 24 |
| Finished | Sep 04 06:06:08 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=970595438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_min_inter_pkt_delay.970595438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_min_length_in_transaction.3905791279 |
| Short name | T2908 |
| Test name | |
| Test status | |
| Simulation time | 197519112 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 06:05:18 AM UTC 24 |
| Finished | Sep 04 06:05:20 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3905791279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 44.usbdev_min_length_in_transaction.3905791279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_min_length_out_transaction.2479920914 |
| Short name | T2906 |
| Test name | |
| Test status | |
| Simulation time | 138052081 ps |
| CPU time | 0.97 seconds |
| Started | Sep 04 06:05:18 AM UTC 24 |
| Finished | Sep 04 06:05:20 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2479920914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 44.usbdev_min_length_out_transaction.2479920914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_nak_trans.630664775 |
| Short name | T2907 |
| Test name | |
| Test status | |
| Simulation time | 156694650 ps |
| CPU time | 1.2 seconds |
| Started | Sep 04 06:05:18 AM UTC 24 |
| Finished | Sep 04 06:05:20 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=630664775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_nak_trans.630664775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_out_iso.2137356946 |
| Short name | T2909 |
| Test name | |
| Test status | |
| Simulation time | 158890504 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 06:05:18 AM UTC 24 |
| Finished | Sep 04 06:05:20 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2137356946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 44.usbdev_out_iso.2137356946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_out_stall.823345981 |
| Short name | T2914 |
| Test name | |
| Test status | |
| Simulation time | 176560604 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 06:05:21 AM UTC 24 |
| Finished | Sep 04 06:05:23 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=823345981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_out_stall.823345981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_out_trans_nak.2206162432 |
| Short name | T2912 |
| Test name | |
| Test status | |
| Simulation time | 154748360 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 06:05:21 AM UTC 24 |
| Finished | Sep 04 06:05:23 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2206162432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 44.usbdev_out_trans_nak.2206162432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_pending_in_trans.3052460273 |
| Short name | T2913 |
| Test name | |
| Test status | |
| Simulation time | 146718448 ps |
| CPU time | 1.35 seconds |
| Started | Sep 04 06:05:21 AM UTC 24 |
| Finished | Sep 04 06:05:23 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3052460273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 44.usbdev_pending_in_trans.3052460273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_phy_config_pinflip.4244328898 |
| Short name | T2916 |
| Test name | |
| Test status | |
| Simulation time | 204810219 ps |
| CPU time | 1.69 seconds |
| Started | Sep 04 06:05:21 AM UTC 24 |
| Finished | Sep 04 06:05:24 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4244328898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 44.usbdev_phy_config_pinflip.4244328898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_phy_config_usb_ref_disable.3826980592 |
| Short name | T2915 |
| Test name | |
| Test status | |
| Simulation time | 169531867 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 06:05:21 AM UTC 24 |
| Finished | Sep 04 06:05:24 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3826980592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 44.usbdev_phy_config_usb_ref_disable.3826980592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_phy_pins_sense.329788770 |
| Short name | T2911 |
| Test name | |
| Test status | |
| Simulation time | 39084092 ps |
| CPU time | 0.98 seconds |
| Started | Sep 04 06:05:21 AM UTC 24 |
| Finished | Sep 04 06:05:23 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=329788770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 44.usbdev_phy_pins_sense.329788770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_buffer.3844955050 |
| Short name | T3058 |
| Test name | |
| Test status | |
| Simulation time | 22570283904 ps |
| CPU time | 65.78 seconds |
| Started | Sep 04 06:05:21 AM UTC 24 |
| Finished | Sep 04 06:06:29 AM UTC 24 |
| Peak memory | 231700 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3844955050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 44.usbdev_pkt_buffer.3844955050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_received.1259935924 |
| Short name | T2917 |
| Test name | |
| Test status | |
| Simulation time | 188891034 ps |
| CPU time | 1.57 seconds |
| Started | Sep 04 06:05:21 AM UTC 24 |
| Finished | Sep 04 06:05:24 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1259935924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_pkt_received.1259935924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_sent.3297234271 |
| Short name | T2919 |
| Test name | |
| Test status | |
| Simulation time | 239233179 ps |
| CPU time | 1.73 seconds |
| Started | Sep 04 06:05:22 AM UTC 24 |
| Finished | Sep 04 06:05:25 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3297234271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_pkt_sent.3297234271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_random_length_in_transaction.84442034 |
| Short name | T2921 |
| Test name | |
| Test status | |
| Simulation time | 238563650 ps |
| CPU time | 1.37 seconds |
| Started | Sep 04 06:05:24 AM UTC 24 |
| Finished | Sep 04 06:05:26 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=84442034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_random_length_in_transaction.84442034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_random_length_out_transaction.3450331058 |
| Short name | T2924 |
| Test name | |
| Test status | |
| Simulation time | 173942715 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 06:05:25 AM UTC 24 |
| Finished | Sep 04 06:05:27 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3450331058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 44.usbdev_random_length_out_transaction.3450331058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_rx_crc_err.1648325930 |
| Short name | T2923 |
| Test name | |
| Test status | |
| Simulation time | 180105895 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 06:05:25 AM UTC 24 |
| Finished | Sep 04 06:05:27 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1648325930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 44.usbdev_rx_crc_err.1648325930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_rx_full.4151289390 |
| Short name | T2926 |
| Test name | |
| Test status | |
| Simulation time | 299279889 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 06:05:25 AM UTC 24 |
| Finished | Sep 04 06:05:28 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4151289390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 44.usbdev_rx_full.4151289390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_setup_stage.3170595495 |
| Short name | T2922 |
| Test name | |
| Test status | |
| Simulation time | 168535014 ps |
| CPU time | 1.03 seconds |
| Started | Sep 04 06:05:25 AM UTC 24 |
| Finished | Sep 04 06:05:27 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3170595495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_setup_stage.3170595495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_setup_trans_ignored.1790260493 |
| Short name | T2925 |
| Test name | |
| Test status | |
| Simulation time | 153418970 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 06:05:25 AM UTC 24 |
| Finished | Sep 04 06:05:27 AM UTC 24 |
| Peak memory | 215004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1790260493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 44.usbdev_setup_trans_ignored.1790260493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_smoke.10961596 |
| Short name | T2927 |
| Test name | |
| Test status | |
| Simulation time | 218520248 ps |
| CPU time | 1.72 seconds |
| Started | Sep 04 06:05:25 AM UTC 24 |
| Finished | Sep 04 06:05:28 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=10961596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null - cm_name 44.usbdev_smoke.10961596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_spurious_pids_ignored.3177845722 |
| Short name | T2966 |
| Test name | |
| Test status | |
| Simulation time | 2706930998 ps |
| CPU time | 20.4 seconds |
| Started | Sep 04 06:05:27 AM UTC 24 |
| Finished | Sep 04 06:05:48 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3177845722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 44.usbdev_spurious_pids_ignored.3177845722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_stall_priority_over_nak.1153646176 |
| Short name | T2928 |
| Test name | |
| Test status | |
| Simulation time | 205840528 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 06:05:27 AM UTC 24 |
| Finished | Sep 04 06:05:29 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1153646176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_stall_priority_over_nak.1153646176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_stall_trans.946848385 |
| Short name | T2929 |
| Test name | |
| Test status | |
| Simulation time | 162516222 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 06:05:27 AM UTC 24 |
| Finished | Sep 04 06:05:29 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=946848385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 44.usbdev_stall_trans.946848385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_stream_len_max.923737826 |
| Short name | T2931 |
| Test name | |
| Test status | |
| Simulation time | 282789742 ps |
| CPU time | 1.92 seconds |
| Started | Sep 04 06:05:28 AM UTC 24 |
| Finished | Sep 04 06:05:31 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=923737826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 44.usbdev_stream_len_max.923737826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_streaming_out.3282017791 |
| Short name | T2981 |
| Test name | |
| Test status | |
| Simulation time | 2521257756 ps |
| CPU time | 25.37 seconds |
| Started | Sep 04 06:05:27 AM UTC 24 |
| Finished | Sep 04 06:05:53 AM UTC 24 |
| Peak memory | 217368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3282017791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_streaming_out.3282017791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_timeout_missing_host_handshake.1467656693 |
| Short name | T2946 |
| Test name | |
| Test status | |
| Simulation time | 1139283414 ps |
| CPU time | 25.82 seconds |
| Started | Sep 04 06:05:10 AM UTC 24 |
| Finished | Sep 04 06:05:37 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1467656693 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_timeout_missing_host_handshake.1467656693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/44.usbdev_tx_rx_disruption.3320585210 |
| Short name | T2934 |
| Test name | |
| Test status | |
| Simulation time | 476847898 ps |
| CPU time | 1.72 seconds |
| Started | Sep 04 06:05:29 AM UTC 24 |
| Finished | Sep 04 06:05:32 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3320585210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_t x_rx_disruption.3320585210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/44.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/440.usbdev_tx_rx_disruption.2627498618 |
| Short name | T3736 |
| Test name | |
| Test status | |
| Simulation time | 695210806 ps |
| CPU time | 1.73 seconds |
| Started | Sep 04 06:10:10 AM UTC 24 |
| Finished | Sep 04 06:10:13 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2627498618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 440.usbdev_ tx_rx_disruption.2627498618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/440.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/441.usbdev_tx_rx_disruption.3894437257 |
| Short name | T3738 |
| Test name | |
| Test status | |
| Simulation time | 597267559 ps |
| CPU time | 1.81 seconds |
| Started | Sep 04 06:10:10 AM UTC 24 |
| Finished | Sep 04 06:10:13 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3894437257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 441.usbdev_ tx_rx_disruption.3894437257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/441.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/442.usbdev_tx_rx_disruption.869154472 |
| Short name | T3741 |
| Test name | |
| Test status | |
| Simulation time | 594240926 ps |
| CPU time | 1.86 seconds |
| Started | Sep 04 06:10:10 AM UTC 24 |
| Finished | Sep 04 06:10:13 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=869154472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 442.usbdev_t x_rx_disruption.869154472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/442.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/443.usbdev_tx_rx_disruption.417737921 |
| Short name | T3733 |
| Test name | |
| Test status | |
| Simulation time | 571947547 ps |
| CPU time | 1.66 seconds |
| Started | Sep 04 06:10:10 AM UTC 24 |
| Finished | Sep 04 06:10:13 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=417737921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 443.usbdev_t x_rx_disruption.417737921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/443.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/444.usbdev_tx_rx_disruption.3519134686 |
| Short name | T3730 |
| Test name | |
| Test status | |
| Simulation time | 492162135 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 06:10:10 AM UTC 24 |
| Finished | Sep 04 06:10:13 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3519134686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 444.usbdev_ tx_rx_disruption.3519134686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/444.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/445.usbdev_tx_rx_disruption.3352468342 |
| Short name | T3739 |
| Test name | |
| Test status | |
| Simulation time | 682334874 ps |
| CPU time | 1.72 seconds |
| Started | Sep 04 06:10:10 AM UTC 24 |
| Finished | Sep 04 06:10:13 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3352468342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 445.usbdev_ tx_rx_disruption.3352468342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/445.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/446.usbdev_tx_rx_disruption.3059934835 |
| Short name | T3740 |
| Test name | |
| Test status | |
| Simulation time | 450007620 ps |
| CPU time | 1.64 seconds |
| Started | Sep 04 06:10:10 AM UTC 24 |
| Finished | Sep 04 06:10:13 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3059934835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 446.usbdev_ tx_rx_disruption.3059934835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/446.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/447.usbdev_tx_rx_disruption.2109993404 |
| Short name | T3737 |
| Test name | |
| Test status | |
| Simulation time | 455923849 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 06:10:10 AM UTC 24 |
| Finished | Sep 04 06:10:13 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2109993404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 447.usbdev_ tx_rx_disruption.2109993404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/447.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/448.usbdev_tx_rx_disruption.2949355652 |
| Short name | T3713 |
| Test name | |
| Test status | |
| Simulation time | 603550792 ps |
| CPU time | 1.63 seconds |
| Started | Sep 04 06:10:12 AM UTC 24 |
| Finished | Sep 04 06:10:14 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2949355652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 448.usbdev_ tx_rx_disruption.2949355652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/448.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/449.usbdev_tx_rx_disruption.1338899171 |
| Short name | T3743 |
| Test name | |
| Test status | |
| Simulation time | 625143234 ps |
| CPU time | 1.68 seconds |
| Started | Sep 04 06:10:12 AM UTC 24 |
| Finished | Sep 04 06:10:14 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1338899171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 449.usbdev_ tx_rx_disruption.1338899171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/449.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_alert_test.354771054 |
| Short name | T2986 |
| Test name | |
| Test status | |
| Simulation time | 27473360 ps |
| CPU time | 1 seconds |
| Started | Sep 04 06:05:54 AM UTC 24 |
| Finished | Sep 04 06:05:56 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=354771054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 45.usbdev_alert_test.354771054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_disconnect.2118545511 |
| Short name | T2947 |
| Test name | |
| Test status | |
| Simulation time | 4085190004 ps |
| CPU time | 8.11 seconds |
| Started | Sep 04 06:05:29 AM UTC 24 |
| Finished | Sep 04 06:05:38 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2118545511 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_disconnect.2118545511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_reset.146399372 |
| Short name | T2990 |
| Test name | |
| Test status | |
| Simulation time | 18481590918 ps |
| CPU time | 28.1 seconds |
| Started | Sep 04 06:05:29 AM UTC 24 |
| Finished | Sep 04 06:05:59 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=146399372 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_reset.146399372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_resume.4101357143 |
| Short name | T3054 |
| Test name | |
| Test status | |
| Simulation time | 28764851835 ps |
| CPU time | 54.16 seconds |
| Started | Sep 04 06:05:30 AM UTC 24 |
| Finished | Sep 04 06:06:26 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4101357143 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_resume.4101357143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_av_buffer.1461739741 |
| Short name | T2937 |
| Test name | |
| Test status | |
| Simulation time | 183013664 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 06:05:30 AM UTC 24 |
| Finished | Sep 04 06:05:33 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1461739741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_av_buffer.1461739741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_bitstuff_err.1694848314 |
| Short name | T2938 |
| Test name | |
| Test status | |
| Simulation time | 146249439 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 06:05:32 AM UTC 24 |
| Finished | Sep 04 06:05:34 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1694848314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_bitstuff_err.1694848314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_data_toggle_clear.4189698801 |
| Short name | T2940 |
| Test name | |
| Test status | |
| Simulation time | 338969465 ps |
| CPU time | 2.24 seconds |
| Started | Sep 04 06:05:32 AM UTC 24 |
| Finished | Sep 04 06:05:35 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4189698801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 45.usbdev_data_toggle_clear.4189698801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_data_toggle_restore.1003179438 |
| Short name | T2939 |
| Test name | |
| Test status | |
| Simulation time | 400451862 ps |
| CPU time | 2.12 seconds |
| Started | Sep 04 06:05:32 AM UTC 24 |
| Finished | Sep 04 06:05:35 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1003179438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_data_toggle_restore.1003179438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_device_address.3331770842 |
| Short name | T3121 |
| Test name | |
| Test status | |
| Simulation time | 45598921650 ps |
| CPU time | 86.9 seconds |
| Started | Sep 04 06:05:32 AM UTC 24 |
| Finished | Sep 04 06:07:01 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3331770842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_device_address.3331770842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_device_timeout.2232204965 |
| Short name | T3005 |
| Test name | |
| Test status | |
| Simulation time | 1460082154 ps |
| CPU time | 29.64 seconds |
| Started | Sep 04 06:05:33 AM UTC 24 |
| Finished | Sep 04 06:06:04 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2232204965 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_device_timeout.2232204965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_disable_endpoint.3753381804 |
| Short name | T2950 |
| Test name | |
| Test status | |
| Simulation time | 784637188 ps |
| CPU time | 4.16 seconds |
| Started | Sep 04 06:05:35 AM UTC 24 |
| Finished | Sep 04 06:05:40 AM UTC 24 |
| Peak memory | 216640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3753381804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 45.usbdev_disable_endpoint.3753381804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_disconnected.1129083913 |
| Short name | T2945 |
| Test name | |
| Test status | |
| Simulation time | 145532927 ps |
| CPU time | 1.37 seconds |
| Started | Sep 04 06:05:35 AM UTC 24 |
| Finished | Sep 04 06:05:37 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1129083913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_disconnected.1129083913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_enable.1793204197 |
| Short name | T2944 |
| Test name | |
| Test status | |
| Simulation time | 48034232 ps |
| CPU time | 1.13 seconds |
| Started | Sep 04 06:05:35 AM UTC 24 |
| Finished | Sep 04 06:05:37 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1793204197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 45.usbdev_enable.1793204197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_endpoint_access.1279634284 |
| Short name | T2948 |
| Test name | |
| Test status | |
| Simulation time | 822741263 ps |
| CPU time | 2.55 seconds |
| Started | Sep 04 06:05:36 AM UTC 24 |
| Finished | Sep 04 06:05:40 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1279634284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_endpoint_access.1279634284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_endpoint_types.1692477576 |
| Short name | T404 |
| Test name | |
| Test status | |
| Simulation time | 377117830 ps |
| CPU time | 2.19 seconds |
| Started | Sep 04 06:05:36 AM UTC 24 |
| Finished | Sep 04 06:05:39 AM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1692477576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_endpoint_types.1692477576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_fifo_levels.1753529369 |
| Short name | T521 |
| Test name | |
| Test status | |
| Simulation time | 292443388 ps |
| CPU time | 2.04 seconds |
| Started | Sep 04 06:05:36 AM UTC 24 |
| Finished | Sep 04 06:05:39 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1753529369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_fifo_levels.1753529369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_fifo_rst.3663254178 |
| Short name | T2953 |
| Test name | |
| Test status | |
| Simulation time | 258092691 ps |
| CPU time | 2.26 seconds |
| Started | Sep 04 06:05:37 AM UTC 24 |
| Finished | Sep 04 06:05:41 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3663254178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_fifo_rst.3663254178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_in_iso.266601068 |
| Short name | T2955 |
| Test name | |
| Test status | |
| Simulation time | 275791672 ps |
| CPU time | 2.2 seconds |
| Started | Sep 04 06:05:37 AM UTC 24 |
| Finished | Sep 04 06:05:41 AM UTC 24 |
| Peak memory | 227392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=266601068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 45.usbdev_in_iso.266601068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_in_stall.1864185274 |
| Short name | T2949 |
| Test name | |
| Test status | |
| Simulation time | 142694717 ps |
| CPU time | 1.28 seconds |
| Started | Sep 04 06:05:38 AM UTC 24 |
| Finished | Sep 04 06:05:40 AM UTC 24 |
| Peak memory | 214904 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1864185274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_in_stall.1864185274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_in_trans.145266401 |
| Short name | T2951 |
| Test name | |
| Test status | |
| Simulation time | 212678076 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 06:05:38 AM UTC 24 |
| Finished | Sep 04 06:05:40 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=145266401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 45.usbdev_in_trans.145266401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_invalid_sync.3810099766 |
| Short name | T3155 |
| Test name | |
| Test status | |
| Simulation time | 3179723586 ps |
| CPU time | 93.8 seconds |
| Started | Sep 04 06:05:37 AM UTC 24 |
| Finished | Sep 04 06:07:13 AM UTC 24 |
| Peak memory | 229748 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3810099766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 45.usbdev_invalid_sync.3810099766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_iso_retraction.2441638214 |
| Short name | T3088 |
| Test name | |
| Test status | |
| Simulation time | 8608218284 ps |
| CPU time | 61.04 seconds |
| Started | Sep 04 06:05:40 AM UTC 24 |
| Finished | Sep 04 06:06:42 AM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2441638214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_iso_retraction.2441638214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_link_in_err.772723322 |
| Short name | T2957 |
| Test name | |
| Test status | |
| Simulation time | 238477321 ps |
| CPU time | 1.75 seconds |
| Started | Sep 04 06:05:40 AM UTC 24 |
| Finished | Sep 04 06:05:43 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=772723322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_link_in_err.772723322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_link_resume.1916233482 |
| Short name | T3069 |
| Test name | |
| Test status | |
| Simulation time | 25427535269 ps |
| CPU time | 49.99 seconds |
| Started | Sep 04 06:05:41 AM UTC 24 |
| Finished | Sep 04 06:06:33 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1916233482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_link_resume.1916233482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_link_suspend.3153181949 |
| Short name | T2972 |
| Test name | |
| Test status | |
| Simulation time | 3399228822 ps |
| CPU time | 8.25 seconds |
| Started | Sep 04 06:05:42 AM UTC 24 |
| Finished | Sep 04 06:05:51 AM UTC 24 |
| Peak memory | 227476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3153181949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_link_suspend.3153181949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_low_speed_traffic.4287011665 |
| Short name | T3210 |
| Test name | |
| Test status | |
| Simulation time | 3689449910 ps |
| CPU time | 108.6 seconds |
| Started | Sep 04 06:05:42 AM UTC 24 |
| Finished | Sep 04 06:07:32 AM UTC 24 |
| Peak memory | 234484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4287011665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_low_speed_traffic.4287011665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_max_inter_pkt_delay.1863006639 |
| Short name | T3119 |
| Test name | |
| Test status | |
| Simulation time | 2486563846 ps |
| CPU time | 75.28 seconds |
| Started | Sep 04 06:05:42 AM UTC 24 |
| Finished | Sep 04 06:06:59 AM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1863006639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_max_inter_pkt_delay.1863006639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_max_length_in_transaction.2940735569 |
| Short name | T2958 |
| Test name | |
| Test status | |
| Simulation time | 258515835 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 06:05:42 AM UTC 24 |
| Finished | Sep 04 06:05:44 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2940735569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 45.usbdev_max_length_in_transaction.2940735569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_max_length_out_transaction.1027975691 |
| Short name | T2960 |
| Test name | |
| Test status | |
| Simulation time | 220338746 ps |
| CPU time | 1.67 seconds |
| Started | Sep 04 06:05:42 AM UTC 24 |
| Finished | Sep 04 06:05:44 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1027975691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 45.usbdev_max_length_out_transaction.1027975691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_min_inter_pkt_delay.1684494793 |
| Short name | T3016 |
| Test name | |
| Test status | |
| Simulation time | 1797879655 ps |
| CPU time | 24.96 seconds |
| Started | Sep 04 06:05:42 AM UTC 24 |
| Finished | Sep 04 06:06:08 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1684494793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_min_inter_pkt_delay.1684494793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_min_length_in_transaction.3228738723 |
| Short name | T2959 |
| Test name | |
| Test status | |
| Simulation time | 156951663 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 06:05:42 AM UTC 24 |
| Finished | Sep 04 06:05:44 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3228738723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 45.usbdev_min_length_in_transaction.3228738723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_min_length_out_transaction.1564437120 |
| Short name | T2961 |
| Test name | |
| Test status | |
| Simulation time | 152988543 ps |
| CPU time | 0.97 seconds |
| Started | Sep 04 06:05:43 AM UTC 24 |
| Finished | Sep 04 06:05:45 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1564437120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 45.usbdev_min_length_out_transaction.1564437120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_nak_trans.2935163761 |
| Short name | T144 |
| Test name | |
| Test status | |
| Simulation time | 214114149 ps |
| CPU time | 1.65 seconds |
| Started | Sep 04 06:05:43 AM UTC 24 |
| Finished | Sep 04 06:05:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2935163761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_nak_trans.2935163761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_out_iso.201177002 |
| Short name | T2962 |
| Test name | |
| Test status | |
| Simulation time | 188352242 ps |
| CPU time | 1.21 seconds |
| Started | Sep 04 06:05:43 AM UTC 24 |
| Finished | Sep 04 06:05:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=201177002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 45.usbdev_out_iso.201177002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_out_stall.399124947 |
| Short name | T2963 |
| Test name | |
| Test status | |
| Simulation time | 204006662 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 06:05:44 AM UTC 24 |
| Finished | Sep 04 06:05:47 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=399124947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_out_stall.399124947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_out_trans_nak.98513805 |
| Short name | T2965 |
| Test name | |
| Test status | |
| Simulation time | 168636743 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 06:05:46 AM UTC 24 |
| Finished | Sep 04 06:05:48 AM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=98513805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_out_trans_nak.98513805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_pending_in_trans.1306651133 |
| Short name | T2964 |
| Test name | |
| Test status | |
| Simulation time | 210891202 ps |
| CPU time | 1.07 seconds |
| Started | Sep 04 06:05:46 AM UTC 24 |
| Finished | Sep 04 06:05:48 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1306651133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 45.usbdev_pending_in_trans.1306651133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_phy_config_pinflip.2486751196 |
| Short name | T2967 |
| Test name | |
| Test status | |
| Simulation time | 255533848 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 06:05:46 AM UTC 24 |
| Finished | Sep 04 06:05:48 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2486751196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 45.usbdev_phy_config_pinflip.2486751196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_phy_config_usb_ref_disable.2042778913 |
| Short name | T2970 |
| Test name | |
| Test status | |
| Simulation time | 167419712 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 06:05:47 AM UTC 24 |
| Finished | Sep 04 06:05:49 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2042778913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 45.usbdev_phy_config_usb_ref_disable.2042778913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_phy_pins_sense.365307278 |
| Short name | T2969 |
| Test name | |
| Test status | |
| Simulation time | 47495166 ps |
| CPU time | 1.08 seconds |
| Started | Sep 04 06:05:47 AM UTC 24 |
| Finished | Sep 04 06:05:49 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=365307278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 45.usbdev_phy_pins_sense.365307278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_buffer.1389756815 |
| Short name | T3021 |
| Test name | |
| Test status | |
| Simulation time | 7423883454 ps |
| CPU time | 21.32 seconds |
| Started | Sep 04 06:05:48 AM UTC 24 |
| Finished | Sep 04 06:06:11 AM UTC 24 |
| Peak memory | 227648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1389756815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_pkt_buffer.1389756815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_received.3903275970 |
| Short name | T2932 |
| Test name | |
| Test status | |
| Simulation time | 156550013 ps |
| CPU time | 1.11 seconds |
| Started | Sep 04 06:05:48 AM UTC 24 |
| Finished | Sep 04 06:05:50 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3903275970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_pkt_received.3903275970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_sent.4117339363 |
| Short name | T2974 |
| Test name | |
| Test status | |
| Simulation time | 197233392 ps |
| CPU time | 1.26 seconds |
| Started | Sep 04 06:05:50 AM UTC 24 |
| Finished | Sep 04 06:05:52 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4117339363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_pkt_sent.4117339363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_random_length_in_transaction.2052924097 |
| Short name | T2973 |
| Test name | |
| Test status | |
| Simulation time | 182063642 ps |
| CPU time | 1.06 seconds |
| Started | Sep 04 06:05:50 AM UTC 24 |
| Finished | Sep 04 06:05:52 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2052924097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 45.usbdev_random_length_in_transaction.2052924097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_random_length_out_transaction.2703545023 |
| Short name | T2977 |
| Test name | |
| Test status | |
| Simulation time | 213858740 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 06:05:50 AM UTC 24 |
| Finished | Sep 04 06:05:52 AM UTC 24 |
| Peak memory | 214944 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2703545023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 45.usbdev_random_length_out_transaction.2703545023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_rx_crc_err.2828139695 |
| Short name | T2975 |
| Test name | |
| Test status | |
| Simulation time | 141274763 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 06:05:50 AM UTC 24 |
| Finished | Sep 04 06:05:52 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2828139695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_rx_crc_err.2828139695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_rx_full.3237458756 |
| Short name | T2978 |
| Test name | |
| Test status | |
| Simulation time | 416871179 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 06:05:50 AM UTC 24 |
| Finished | Sep 04 06:05:52 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3237458756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 45.usbdev_rx_full.3237458756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_setup_stage.2746574201 |
| Short name | T2979 |
| Test name | |
| Test status | |
| Simulation time | 151479084 ps |
| CPU time | 0.91 seconds |
| Started | Sep 04 06:05:51 AM UTC 24 |
| Finished | Sep 04 06:05:53 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2746574201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_setup_stage.2746574201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_setup_trans_ignored.3818196383 |
| Short name | T2980 |
| Test name | |
| Test status | |
| Simulation time | 166099281 ps |
| CPU time | 1.07 seconds |
| Started | Sep 04 06:05:51 AM UTC 24 |
| Finished | Sep 04 06:05:53 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3818196383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 45.usbdev_setup_trans_ignored.3818196383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_smoke.301462123 |
| Short name | T2983 |
| Test name | |
| Test status | |
| Simulation time | 222513599 ps |
| CPU time | 1.77 seconds |
| Started | Sep 04 06:05:52 AM UTC 24 |
| Finished | Sep 04 06:05:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=301462123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_smoke.301462123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_spurious_pids_ignored.2624907783 |
| Short name | T3177 |
| Test name | |
| Test status | |
| Simulation time | 3541614350 ps |
| CPU time | 87.82 seconds |
| Started | Sep 04 06:05:52 AM UTC 24 |
| Finished | Sep 04 06:07:22 AM UTC 24 |
| Peak memory | 234108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2624907783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 45.usbdev_spurious_pids_ignored.2624907783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_stall_priority_over_nak.2701930792 |
| Short name | T2984 |
| Test name | |
| Test status | |
| Simulation time | 212503478 ps |
| CPU time | 1.73 seconds |
| Started | Sep 04 06:05:52 AM UTC 24 |
| Finished | Sep 04 06:05:55 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2701930792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_stall_priority_over_nak.2701930792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_stall_trans.3277054918 |
| Short name | T2982 |
| Test name | |
| Test status | |
| Simulation time | 165850758 ps |
| CPU time | 0.98 seconds |
| Started | Sep 04 06:05:52 AM UTC 24 |
| Finished | Sep 04 06:05:54 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3277054918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_stall_trans.3277054918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_stream_len_max.2644068619 |
| Short name | T2996 |
| Test name | |
| Test status | |
| Simulation time | 1114940574 ps |
| CPU time | 5.09 seconds |
| Started | Sep 04 06:05:54 AM UTC 24 |
| Finished | Sep 04 06:06:00 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2644068619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_stream_len_max.2644068619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_streaming_out.3104957474 |
| Short name | T3070 |
| Test name | |
| Test status | |
| Simulation time | 4064612842 ps |
| CPU time | 38.16 seconds |
| Started | Sep 04 06:05:54 AM UTC 24 |
| Finished | Sep 04 06:06:33 AM UTC 24 |
| Peak memory | 229576 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3104957474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_streaming_out.3104957474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_timeout_missing_host_handshake.2927704034 |
| Short name | T3018 |
| Test name | |
| Test status | |
| Simulation time | 3882193665 ps |
| CPU time | 34.58 seconds |
| Started | Sep 04 06:05:33 AM UTC 24 |
| Finished | Sep 04 06:06:09 AM UTC 24 |
| Peak memory | 217316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2927704034 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_timeout_missing_host_handshake.2927704034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/45.usbdev_tx_rx_disruption.878652980 |
| Short name | T2988 |
| Test name | |
| Test status | |
| Simulation time | 657637020 ps |
| CPU time | 1.88 seconds |
| Started | Sep 04 06:05:54 AM UTC 24 |
| Finished | Sep 04 06:05:57 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=878652980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_tx _rx_disruption.878652980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/45.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/450.usbdev_tx_rx_disruption.2868149309 |
| Short name | T3673 |
| Test name | |
| Test status | |
| Simulation time | 491985807 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 06:10:12 AM UTC 24 |
| Finished | Sep 04 06:10:14 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2868149309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 450.usbdev_ tx_rx_disruption.2868149309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/450.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/451.usbdev_tx_rx_disruption.3554084537 |
| Short name | T3742 |
| Test name | |
| Test status | |
| Simulation time | 475383472 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 06:10:12 AM UTC 24 |
| Finished | Sep 04 06:10:14 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3554084537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 451.usbdev_ tx_rx_disruption.3554084537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/451.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/452.usbdev_tx_rx_disruption.2351162078 |
| Short name | T3745 |
| Test name | |
| Test status | |
| Simulation time | 512300562 ps |
| CPU time | 1.67 seconds |
| Started | Sep 04 06:10:12 AM UTC 24 |
| Finished | Sep 04 06:10:14 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2351162078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 452.usbdev_ tx_rx_disruption.2351162078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/452.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/453.usbdev_tx_rx_disruption.153216958 |
| Short name | T3747 |
| Test name | |
| Test status | |
| Simulation time | 649283339 ps |
| CPU time | 1.72 seconds |
| Started | Sep 04 06:10:12 AM UTC 24 |
| Finished | Sep 04 06:10:14 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=153216958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 453.usbdev_t x_rx_disruption.153216958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/453.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/454.usbdev_tx_rx_disruption.2477840178 |
| Short name | T3744 |
| Test name | |
| Test status | |
| Simulation time | 475291588 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 06:10:12 AM UTC 24 |
| Finished | Sep 04 06:10:14 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2477840178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 454.usbdev_ tx_rx_disruption.2477840178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/454.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/455.usbdev_tx_rx_disruption.1586585649 |
| Short name | T3746 |
| Test name | |
| Test status | |
| Simulation time | 517790608 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 06:10:12 AM UTC 24 |
| Finished | Sep 04 06:10:14 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1586585649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 455.usbdev_ tx_rx_disruption.1586585649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/455.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/456.usbdev_tx_rx_disruption.639822205 |
| Short name | T3749 |
| Test name | |
| Test status | |
| Simulation time | 583327465 ps |
| CPU time | 1.7 seconds |
| Started | Sep 04 06:10:12 AM UTC 24 |
| Finished | Sep 04 06:10:15 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=639822205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 456.usbdev_t x_rx_disruption.639822205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/456.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/457.usbdev_tx_rx_disruption.4047164963 |
| Short name | T3748 |
| Test name | |
| Test status | |
| Simulation time | 667837986 ps |
| CPU time | 1.67 seconds |
| Started | Sep 04 06:10:12 AM UTC 24 |
| Finished | Sep 04 06:10:15 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4047164963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 457.usbdev_ tx_rx_disruption.4047164963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/457.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/458.usbdev_tx_rx_disruption.1183743263 |
| Short name | T3754 |
| Test name | |
| Test status | |
| Simulation time | 529496703 ps |
| CPU time | 1.64 seconds |
| Started | Sep 04 06:10:14 AM UTC 24 |
| Finished | Sep 04 06:10:17 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1183743263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 458.usbdev_ tx_rx_disruption.1183743263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/458.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/459.usbdev_tx_rx_disruption.611906294 |
| Short name | T3757 |
| Test name | |
| Test status | |
| Simulation time | 687642364 ps |
| CPU time | 1.9 seconds |
| Started | Sep 04 06:10:14 AM UTC 24 |
| Finished | Sep 04 06:10:17 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=611906294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 459.usbdev_t x_rx_disruption.611906294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/459.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_alert_test.439737354 |
| Short name | T3044 |
| Test name | |
| Test status | |
| Simulation time | 115793172 ps |
| CPU time | 1.18 seconds |
| Started | Sep 04 06:06:17 AM UTC 24 |
| Finished | Sep 04 06:06:19 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=439737354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 46.usbdev_alert_test.439737354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_disconnect.265801348 |
| Short name | T2999 |
| Test name | |
| Test status | |
| Simulation time | 3791259437 ps |
| CPU time | 7 seconds |
| Started | Sep 04 06:05:54 AM UTC 24 |
| Finished | Sep 04 06:06:02 AM UTC 24 |
| Peak memory | 227480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=265801348 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_disconnect.265801348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_reset.3331392757 |
| Short name | T2985 |
| Test name | |
| Test status | |
| Simulation time | 19010440108 ps |
| CPU time | 26.47 seconds |
| Started | Sep 04 06:05:55 AM UTC 24 |
| Finished | Sep 04 06:06:23 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3331392757 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_reset.3331392757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_resume.2378530163 |
| Short name | T3096 |
| Test name | |
| Test status | |
| Simulation time | 25951818024 ps |
| CPU time | 49.42 seconds |
| Started | Sep 04 06:05:55 AM UTC 24 |
| Finished | Sep 04 06:06:46 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2378530163 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_resume.2378530163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_av_buffer.4219474313 |
| Short name | T2991 |
| Test name | |
| Test status | |
| Simulation time | 159240635 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 06:05:56 AM UTC 24 |
| Finished | Sep 04 06:05:59 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4219474313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_av_buffer.4219474313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_bitstuff_err.654943683 |
| Short name | T2992 |
| Test name | |
| Test status | |
| Simulation time | 194335752 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 06:05:56 AM UTC 24 |
| Finished | Sep 04 06:05:59 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=654943683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_bitstuff_err.654943683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_data_toggle_clear.3768008358 |
| Short name | T2994 |
| Test name | |
| Test status | |
| Simulation time | 324800629 ps |
| CPU time | 2.16 seconds |
| Started | Sep 04 06:05:57 AM UTC 24 |
| Finished | Sep 04 06:06:00 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3768008358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 46.usbdev_data_toggle_clear.3768008358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_data_toggle_restore.1119255176 |
| Short name | T2998 |
| Test name | |
| Test status | |
| Simulation time | 957238130 ps |
| CPU time | 3.46 seconds |
| Started | Sep 04 06:05:57 AM UTC 24 |
| Finished | Sep 04 06:06:01 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1119255176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_data_toggle_restore.1119255176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_device_address.936140549 |
| Short name | T3113 |
| Test name | |
| Test status | |
| Simulation time | 30800210006 ps |
| CPU time | 55.71 seconds |
| Started | Sep 04 06:05:58 AM UTC 24 |
| Finished | Sep 04 06:06:55 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=936140549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 46.usbdev_device_address.936140549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_device_timeout.801129850 |
| Short name | T3068 |
| Test name | |
| Test status | |
| Simulation time | 1549399033 ps |
| CPU time | 33.65 seconds |
| Started | Sep 04 06:05:58 AM UTC 24 |
| Finished | Sep 04 06:06:33 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=801129850 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_device_timeout.801129850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_disable_endpoint.4286326321 |
| Short name | T3000 |
| Test name | |
| Test status | |
| Simulation time | 653044226 ps |
| CPU time | 2.02 seconds |
| Started | Sep 04 06:05:59 AM UTC 24 |
| Finished | Sep 04 06:06:02 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4286326321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 46.usbdev_disable_endpoint.4286326321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_disconnected.3655530403 |
| Short name | T3002 |
| Test name | |
| Test status | |
| Simulation time | 152005879 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 06:06:01 AM UTC 24 |
| Finished | Sep 04 06:06:03 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3655530403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_disconnected.3655530403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_enable.1384966151 |
| Short name | T3001 |
| Test name | |
| Test status | |
| Simulation time | 87669682 ps |
| CPU time | 1.2 seconds |
| Started | Sep 04 06:06:01 AM UTC 24 |
| Finished | Sep 04 06:06:03 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1384966151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 46.usbdev_enable.1384966151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_endpoint_access.103497575 |
| Short name | T3012 |
| Test name | |
| Test status | |
| Simulation time | 884526755 ps |
| CPU time | 4.63 seconds |
| Started | Sep 04 06:06:01 AM UTC 24 |
| Finished | Sep 04 06:06:07 AM UTC 24 |
| Peak memory | 217376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=103497575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_endpoint_access.103497575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_endpoint_types.1169737301 |
| Short name | T3004 |
| Test name | |
| Test status | |
| Simulation time | 261148562 ps |
| CPU time | 1.75 seconds |
| Started | Sep 04 06:06:01 AM UTC 24 |
| Finished | Sep 04 06:06:04 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1169737301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_endpoint_types.1169737301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_fifo_levels.3210875547 |
| Short name | T3003 |
| Test name | |
| Test status | |
| Simulation time | 182430754 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 06:06:01 AM UTC 24 |
| Finished | Sep 04 06:06:04 AM UTC 24 |
| Peak memory | 214936 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3210875547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_fifo_levels.3210875547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_fifo_rst.2551894385 |
| Short name | T3010 |
| Test name | |
| Test status | |
| Simulation time | 322520988 ps |
| CPU time | 4.22 seconds |
| Started | Sep 04 06:06:01 AM UTC 24 |
| Finished | Sep 04 06:06:06 AM UTC 24 |
| Peak memory | 217388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2551894385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_fifo_rst.2551894385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_in_iso.2295695832 |
| Short name | T3006 |
| Test name | |
| Test status | |
| Simulation time | 163973132 ps |
| CPU time | 1.13 seconds |
| Started | Sep 04 06:06:02 AM UTC 24 |
| Finished | Sep 04 06:06:04 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2295695832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 46.usbdev_in_iso.2295695832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_in_stall.390712512 |
| Short name | T3009 |
| Test name | |
| Test status | |
| Simulation time | 140832705 ps |
| CPU time | 1.25 seconds |
| Started | Sep 04 06:06:03 AM UTC 24 |
| Finished | Sep 04 06:06:06 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=390712512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 46.usbdev_in_stall.390712512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_in_trans.3540225726 |
| Short name | T3011 |
| Test name | |
| Test status | |
| Simulation time | 173944440 ps |
| CPU time | 1.6 seconds |
| Started | Sep 04 06:06:03 AM UTC 24 |
| Finished | Sep 04 06:06:07 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3540225726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_in_trans.3540225726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_invalid_sync.2877849491 |
| Short name | T3065 |
| Test name | |
| Test status | |
| Simulation time | 3211759200 ps |
| CPU time | 29.34 seconds |
| Started | Sep 04 06:06:01 AM UTC 24 |
| Finished | Sep 04 06:06:32 AM UTC 24 |
| Peak memory | 229584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2877849491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 46.usbdev_invalid_sync.2877849491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_iso_retraction.1893247371 |
| Short name | T3165 |
| Test name | |
| Test status | |
| Simulation time | 7371826512 ps |
| CPU time | 71.78 seconds |
| Started | Sep 04 06:06:04 AM UTC 24 |
| Finished | Sep 04 06:07:18 AM UTC 24 |
| Peak memory | 217384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1893247371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_iso_retraction.1893247371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_link_in_err.3923441048 |
| Short name | T3014 |
| Test name | |
| Test status | |
| Simulation time | 174878110 ps |
| CPU time | 1.08 seconds |
| Started | Sep 04 06:06:05 AM UTC 24 |
| Finished | Sep 04 06:06:07 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3923441048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_link_in_err.3923441048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_link_resume.920179807 |
| Short name | T3153 |
| Test name | |
| Test status | |
| Simulation time | 29859521927 ps |
| CPU time | 64.91 seconds |
| Started | Sep 04 06:06:05 AM UTC 24 |
| Finished | Sep 04 06:07:12 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=920179807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 46.usbdev_link_resume.920179807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_link_suspend.891271533 |
| Short name | T3041 |
| Test name | |
| Test status | |
| Simulation time | 6204923645 ps |
| CPU time | 10.36 seconds |
| Started | Sep 04 06:06:05 AM UTC 24 |
| Finished | Sep 04 06:06:17 AM UTC 24 |
| Peak memory | 227416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=891271533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_link_suspend.891271533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_low_speed_traffic.3650410332 |
| Short name | T3275 |
| Test name | |
| Test status | |
| Simulation time | 3998647496 ps |
| CPU time | 113.09 seconds |
| Started | Sep 04 06:06:05 AM UTC 24 |
| Finished | Sep 04 06:08:01 AM UTC 24 |
| Peak memory | 229740 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3650410332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_low_speed_traffic.3650410332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_max_inter_pkt_delay.2289599615 |
| Short name | T3045 |
| Test name | |
| Test status | |
| Simulation time | 1569841074 ps |
| CPU time | 12.8 seconds |
| Started | Sep 04 06:06:05 AM UTC 24 |
| Finished | Sep 04 06:06:19 AM UTC 24 |
| Peak memory | 227336 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2289599615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_max_inter_pkt_delay.2289599615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_max_length_in_transaction.1339883697 |
| Short name | T3017 |
| Test name | |
| Test status | |
| Simulation time | 242095183 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 06:06:06 AM UTC 24 |
| Finished | Sep 04 06:06:09 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1339883697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 46.usbdev_max_length_in_transaction.1339883697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_max_length_out_transaction.4030224380 |
| Short name | T3019 |
| Test name | |
| Test status | |
| Simulation time | 189161706 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 06:06:08 AM UTC 24 |
| Finished | Sep 04 06:06:11 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4030224380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 46.usbdev_max_length_out_transaction.4030224380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_min_inter_pkt_delay.2300013082 |
| Short name | T3112 |
| Test name | |
| Test status | |
| Simulation time | 1497993350 ps |
| CPU time | 45.46 seconds |
| Started | Sep 04 06:06:08 AM UTC 24 |
| Finished | Sep 04 06:06:55 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2300013082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_min_inter_pkt_delay.2300013082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_min_length_in_transaction.3686068837 |
| Short name | T3020 |
| Test name | |
| Test status | |
| Simulation time | 193255256 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 06:06:08 AM UTC 24 |
| Finished | Sep 04 06:06:11 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3686068837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 46.usbdev_min_length_in_transaction.3686068837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_min_length_out_transaction.3301435917 |
| Short name | T3022 |
| Test name | |
| Test status | |
| Simulation time | 157256111 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 06:06:08 AM UTC 24 |
| Finished | Sep 04 06:06:11 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3301435917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 46.usbdev_min_length_out_transaction.3301435917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_nak_trans.529350401 |
| Short name | T3024 |
| Test name | |
| Test status | |
| Simulation time | 191643907 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 06:06:08 AM UTC 24 |
| Finished | Sep 04 06:06:11 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=529350401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_nak_trans.529350401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_out_iso.909627512 |
| Short name | T3023 |
| Test name | |
| Test status | |
| Simulation time | 161289108 ps |
| CPU time | 1.36 seconds |
| Started | Sep 04 06:06:08 AM UTC 24 |
| Finished | Sep 04 06:06:11 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=909627512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 46.usbdev_out_iso.909627512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_out_stall.3152246685 |
| Short name | T3025 |
| Test name | |
| Test status | |
| Simulation time | 170723506 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 06:06:08 AM UTC 24 |
| Finished | Sep 04 06:06:11 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3152246685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_out_stall.3152246685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_out_trans_nak.3728841054 |
| Short name | T3028 |
| Test name | |
| Test status | |
| Simulation time | 183988515 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 06:06:09 AM UTC 24 |
| Finished | Sep 04 06:06:12 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3728841054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 46.usbdev_out_trans_nak.3728841054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_pending_in_trans.3385283311 |
| Short name | T3026 |
| Test name | |
| Test status | |
| Simulation time | 151325264 ps |
| CPU time | 1.01 seconds |
| Started | Sep 04 06:06:10 AM UTC 24 |
| Finished | Sep 04 06:06:12 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3385283311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 46.usbdev_pending_in_trans.3385283311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_phy_config_pinflip.2395784175 |
| Short name | T3029 |
| Test name | |
| Test status | |
| Simulation time | 227081232 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 06:06:10 AM UTC 24 |
| Finished | Sep 04 06:06:12 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2395784175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 46.usbdev_phy_config_pinflip.2395784175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_phy_config_usb_ref_disable.809102015 |
| Short name | T3030 |
| Test name | |
| Test status | |
| Simulation time | 176673802 ps |
| CPU time | 1.31 seconds |
| Started | Sep 04 06:06:11 AM UTC 24 |
| Finished | Sep 04 06:06:13 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=809102015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 46.usbdev_phy_config_usb_ref_disable.809102015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_phy_pins_sense.1930798357 |
| Short name | T3031 |
| Test name | |
| Test status | |
| Simulation time | 60924714 ps |
| CPU time | 1.1 seconds |
| Started | Sep 04 06:06:12 AM UTC 24 |
| Finished | Sep 04 06:06:14 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1930798357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_phy_pins_sense.1930798357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_buffer.551834470 |
| Short name | T3180 |
| Test name | |
| Test status | |
| Simulation time | 22617004683 ps |
| CPU time | 69.17 seconds |
| Started | Sep 04 06:06:12 AM UTC 24 |
| Finished | Sep 04 06:07:23 AM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=551834470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_pkt_buffer.551834470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_received.3104508679 |
| Short name | T3033 |
| Test name | |
| Test status | |
| Simulation time | 198390175 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 06:06:12 AM UTC 24 |
| Finished | Sep 04 06:06:15 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3104508679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_pkt_received.3104508679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_sent.708414638 |
| Short name | T3035 |
| Test name | |
| Test status | |
| Simulation time | 163800394 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 06:06:12 AM UTC 24 |
| Finished | Sep 04 06:06:15 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=708414638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 46.usbdev_pkt_sent.708414638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_random_length_in_transaction.3129970934 |
| Short name | T3034 |
| Test name | |
| Test status | |
| Simulation time | 233317972 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 06:06:12 AM UTC 24 |
| Finished | Sep 04 06:06:15 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3129970934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 46.usbdev_random_length_in_transaction.3129970934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_random_length_out_transaction.1307740200 |
| Short name | T3032 |
| Test name | |
| Test status | |
| Simulation time | 163701641 ps |
| CPU time | 1.01 seconds |
| Started | Sep 04 06:06:13 AM UTC 24 |
| Finished | Sep 04 06:06:15 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1307740200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 46.usbdev_random_length_out_transaction.1307740200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_rx_crc_err.1738495418 |
| Short name | T3036 |
| Test name | |
| Test status | |
| Simulation time | 258436922 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 06:06:13 AM UTC 24 |
| Finished | Sep 04 06:06:15 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1738495418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 46.usbdev_rx_crc_err.1738495418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_rx_full.1656727669 |
| Short name | T3037 |
| Test name | |
| Test status | |
| Simulation time | 318559399 ps |
| CPU time | 2.07 seconds |
| Started | Sep 04 06:06:13 AM UTC 24 |
| Finished | Sep 04 06:06:16 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1656727669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 46.usbdev_rx_full.1656727669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_setup_stage.3374715795 |
| Short name | T3038 |
| Test name | |
| Test status | |
| Simulation time | 153196934 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 06:06:14 AM UTC 24 |
| Finished | Sep 04 06:06:16 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3374715795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_setup_stage.3374715795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_setup_trans_ignored.2019393353 |
| Short name | T3039 |
| Test name | |
| Test status | |
| Simulation time | 173331429 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 06:06:14 AM UTC 24 |
| Finished | Sep 04 06:06:17 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2019393353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 46.usbdev_setup_trans_ignored.2019393353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_smoke.3205062195 |
| Short name | T3040 |
| Test name | |
| Test status | |
| Simulation time | 241509729 ps |
| CPU time | 1.64 seconds |
| Started | Sep 04 06:06:14 AM UTC 24 |
| Finished | Sep 04 06:06:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3205062195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_smoke.3205062195 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_spurious_pids_ignored.4122508656 |
| Short name | T3097 |
| Test name | |
| Test status | |
| Simulation time | 3351297526 ps |
| CPU time | 31.27 seconds |
| Started | Sep 04 06:06:14 AM UTC 24 |
| Finished | Sep 04 06:06:47 AM UTC 24 |
| Peak memory | 234304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4122508656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 46.usbdev_spurious_pids_ignored.4122508656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_stall_priority_over_nak.3236765821 |
| Short name | T3043 |
| Test name | |
| Test status | |
| Simulation time | 229568224 ps |
| CPU time | 1.76 seconds |
| Started | Sep 04 06:06:16 AM UTC 24 |
| Finished | Sep 04 06:06:18 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3236765821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_stall_priority_over_nak.3236765821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_stall_trans.3132060768 |
| Short name | T3042 |
| Test name | |
| Test status | |
| Simulation time | 179630281 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 06:06:16 AM UTC 24 |
| Finished | Sep 04 06:06:18 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3132060768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_stall_trans.3132060768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_stream_len_max.955180019 |
| Short name | T3048 |
| Test name | |
| Test status | |
| Simulation time | 1213107071 ps |
| CPU time | 4.1 seconds |
| Started | Sep 04 06:06:16 AM UTC 24 |
| Finished | Sep 04 06:06:21 AM UTC 24 |
| Peak memory | 217260 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=955180019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 46.usbdev_stream_len_max.955180019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_streaming_out.3903805495 |
| Short name | T3188 |
| Test name | |
| Test status | |
| Simulation time | 2242731741 ps |
| CPU time | 68.14 seconds |
| Started | Sep 04 06:06:16 AM UTC 24 |
| Finished | Sep 04 06:07:26 AM UTC 24 |
| Peak memory | 227404 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3903805495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_streaming_out.3903805495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_timeout_missing_host_handshake.3467189573 |
| Short name | T3055 |
| Test name | |
| Test status | |
| Simulation time | 2970428889 ps |
| CPU time | 25.94 seconds |
| Started | Sep 04 06:05:59 AM UTC 24 |
| Finished | Sep 04 06:06:27 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3467189573 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_timeout_missing_host_handshake.3467189573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/46.usbdev_tx_rx_disruption.703825165 |
| Short name | T3046 |
| Test name | |
| Test status | |
| Simulation time | 523505322 ps |
| CPU time | 2.86 seconds |
| Started | Sep 04 06:06:16 AM UTC 24 |
| Finished | Sep 04 06:06:20 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=703825165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_tx _rx_disruption.703825165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/46.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/460.usbdev_tx_rx_disruption.3645007251 |
| Short name | T3753 |
| Test name | |
| Test status | |
| Simulation time | 607598109 ps |
| CPU time | 1.62 seconds |
| Started | Sep 04 06:10:14 AM UTC 24 |
| Finished | Sep 04 06:10:17 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3645007251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 460.usbdev_ tx_rx_disruption.3645007251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/460.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/461.usbdev_tx_rx_disruption.1362411538 |
| Short name | T3752 |
| Test name | |
| Test status | |
| Simulation time | 542789566 ps |
| CPU time | 1.61 seconds |
| Started | Sep 04 06:10:14 AM UTC 24 |
| Finished | Sep 04 06:10:17 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1362411538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 461.usbdev_ tx_rx_disruption.1362411538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/461.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/462.usbdev_tx_rx_disruption.3346546407 |
| Short name | T3750 |
| Test name | |
| Test status | |
| Simulation time | 571421057 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 06:10:14 AM UTC 24 |
| Finished | Sep 04 06:10:17 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3346546407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 462.usbdev_ tx_rx_disruption.3346546407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/462.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/463.usbdev_tx_rx_disruption.1709929658 |
| Short name | T3761 |
| Test name | |
| Test status | |
| Simulation time | 499041320 ps |
| CPU time | 1.96 seconds |
| Started | Sep 04 06:10:14 AM UTC 24 |
| Finished | Sep 04 06:10:17 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1709929658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 463.usbdev_ tx_rx_disruption.1709929658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/463.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/464.usbdev_tx_rx_disruption.3792047634 |
| Short name | T3751 |
| Test name | |
| Test status | |
| Simulation time | 480503033 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 06:10:14 AM UTC 24 |
| Finished | Sep 04 06:10:17 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3792047634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 464.usbdev_ tx_rx_disruption.3792047634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/464.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/465.usbdev_tx_rx_disruption.425334533 |
| Short name | T3771 |
| Test name | |
| Test status | |
| Simulation time | 603450389 ps |
| CPU time | 2.18 seconds |
| Started | Sep 04 06:10:14 AM UTC 24 |
| Finished | Sep 04 06:10:17 AM UTC 24 |
| Peak memory | 217036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=425334533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 465.usbdev_t x_rx_disruption.425334533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/465.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/466.usbdev_tx_rx_disruption.2781904005 |
| Short name | T3768 |
| Test name | |
| Test status | |
| Simulation time | 479035622 ps |
| CPU time | 2.05 seconds |
| Started | Sep 04 06:10:14 AM UTC 24 |
| Finished | Sep 04 06:10:17 AM UTC 24 |
| Peak memory | 217040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2781904005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 466.usbdev_ tx_rx_disruption.2781904005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/466.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/467.usbdev_tx_rx_disruption.752239313 |
| Short name | T3765 |
| Test name | |
| Test status | |
| Simulation time | 576518087 ps |
| CPU time | 1.99 seconds |
| Started | Sep 04 06:10:14 AM UTC 24 |
| Finished | Sep 04 06:10:17 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=752239313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 467.usbdev_t x_rx_disruption.752239313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/467.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/468.usbdev_tx_rx_disruption.267708851 |
| Short name | T3760 |
| Test name | |
| Test status | |
| Simulation time | 639253888 ps |
| CPU time | 1.72 seconds |
| Started | Sep 04 06:10:14 AM UTC 24 |
| Finished | Sep 04 06:10:17 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=267708851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 468.usbdev_t x_rx_disruption.267708851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/468.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/469.usbdev_tx_rx_disruption.3214935969 |
| Short name | T3755 |
| Test name | |
| Test status | |
| Simulation time | 570846801 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 06:10:14 AM UTC 24 |
| Finished | Sep 04 06:10:17 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3214935969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 469.usbdev_ tx_rx_disruption.3214935969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/469.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_alert_test.4250398280 |
| Short name | T3100 |
| Test name | |
| Test status | |
| Simulation time | 86348133 ps |
| CPU time | 1.1 seconds |
| Started | Sep 04 06:06:45 AM UTC 24 |
| Finished | Sep 04 06:06:47 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4250398280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 47.usbdev_alert_test.4250398280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_disconnect.3532031083 |
| Short name | T3059 |
| Test name | |
| Test status | |
| Simulation time | 5348113711 ps |
| CPU time | 10.65 seconds |
| Started | Sep 04 06:06:17 AM UTC 24 |
| Finished | Sep 04 06:06:29 AM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3532031083 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_disconnect.3532031083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_reset.3289979627 |
| Short name | T3140 |
| Test name | |
| Test status | |
| Simulation time | 19134988884 ps |
| CPU time | 48.91 seconds |
| Started | Sep 04 06:06:17 AM UTC 24 |
| Finished | Sep 04 06:07:08 AM UTC 24 |
| Peak memory | 217432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3289979627 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_reset.3289979627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_resume.4120426214 |
| Short name | T3159 |
| Test name | |
| Test status | |
| Simulation time | 31406975576 ps |
| CPU time | 54.82 seconds |
| Started | Sep 04 06:06:18 AM UTC 24 |
| Finished | Sep 04 06:07:15 AM UTC 24 |
| Peak memory | 217220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4120426214 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_resume.4120426214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_av_buffer.448482679 |
| Short name | T3049 |
| Test name | |
| Test status | |
| Simulation time | 162835986 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 06:06:18 AM UTC 24 |
| Finished | Sep 04 06:06:21 AM UTC 24 |
| Peak memory | 214988 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=448482679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_av_buffer.448482679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_bitstuff_err.156488782 |
| Short name | T3047 |
| Test name | |
| Test status | |
| Simulation time | 151743306 ps |
| CPU time | 1.36 seconds |
| Started | Sep 04 06:06:18 AM UTC 24 |
| Finished | Sep 04 06:06:21 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=156488782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_bitstuff_err.156488782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_data_toggle_clear.641055865 |
| Short name | T3050 |
| Test name | |
| Test status | |
| Simulation time | 264033903 ps |
| CPU time | 2.05 seconds |
| Started | Sep 04 06:06:20 AM UTC 24 |
| Finished | Sep 04 06:06:23 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=641055865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 47.usbdev_data_toggle_clear.641055865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_data_toggle_restore.2186746958 |
| Short name | T3051 |
| Test name | |
| Test status | |
| Simulation time | 579481601 ps |
| CPU time | 2.97 seconds |
| Started | Sep 04 06:06:20 AM UTC 24 |
| Finished | Sep 04 06:06:24 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2186746958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_data_toggle_restore.2186746958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_device_address.3334978496 |
| Short name | T3171 |
| Test name | |
| Test status | |
| Simulation time | 27144556782 ps |
| CPU time | 57.62 seconds |
| Started | Sep 04 06:06:21 AM UTC 24 |
| Finished | Sep 04 06:07:20 AM UTC 24 |
| Peak memory | 217488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3334978496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_device_address.3334978496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_device_timeout.4165459415 |
| Short name | T3163 |
| Test name | |
| Test status | |
| Simulation time | 5601918880 ps |
| CPU time | 53.52 seconds |
| Started | Sep 04 06:06:21 AM UTC 24 |
| Finished | Sep 04 06:07:16 AM UTC 24 |
| Peak memory | 217496 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4165459415 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_device_timeout.4165459415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_disable_endpoint.2012439369 |
| Short name | T3053 |
| Test name | |
| Test status | |
| Simulation time | 925722280 ps |
| CPU time | 2.54 seconds |
| Started | Sep 04 06:06:22 AM UTC 24 |
| Finished | Sep 04 06:06:26 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2012439369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 47.usbdev_disable_endpoint.2012439369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_disconnected.2350949556 |
| Short name | T588 |
| Test name | |
| Test status | |
| Simulation time | 146964355 ps |
| CPU time | 1.37 seconds |
| Started | Sep 04 06:06:22 AM UTC 24 |
| Finished | Sep 04 06:06:25 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2350949556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_disconnected.2350949556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_enable.4098064541 |
| Short name | T3052 |
| Test name | |
| Test status | |
| Simulation time | 50630646 ps |
| CPU time | 0.97 seconds |
| Started | Sep 04 06:06:22 AM UTC 24 |
| Finished | Sep 04 06:06:24 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4098064541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 47.usbdev_enable.4098064541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_endpoint_access.2456100702 |
| Short name | T3063 |
| Test name | |
| Test status | |
| Simulation time | 912274656 ps |
| CPU time | 5.09 seconds |
| Started | Sep 04 06:06:24 AM UTC 24 |
| Finished | Sep 04 06:06:30 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2456100702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_endpoint_access.2456100702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_fifo_levels.1899444383 |
| Short name | T3056 |
| Test name | |
| Test status | |
| Simulation time | 207787450 ps |
| CPU time | 1.61 seconds |
| Started | Sep 04 06:06:25 AM UTC 24 |
| Finished | Sep 04 06:06:27 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1899444383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_fifo_levels.1899444383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_fifo_rst.1201811061 |
| Short name | T3057 |
| Test name | |
| Test status | |
| Simulation time | 299741128 ps |
| CPU time | 1.89 seconds |
| Started | Sep 04 06:06:25 AM UTC 24 |
| Finished | Sep 04 06:06:28 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1201811061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_fifo_rst.1201811061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_in_iso.778556975 |
| Short name | T3060 |
| Test name | |
| Test status | |
| Simulation time | 184171628 ps |
| CPU time | 1.3 seconds |
| Started | Sep 04 06:06:27 AM UTC 24 |
| Finished | Sep 04 06:06:30 AM UTC 24 |
| Peak memory | 227412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=778556975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 47.usbdev_in_iso.778556975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_in_stall.1594142366 |
| Short name | T3061 |
| Test name | |
| Test status | |
| Simulation time | 142748191 ps |
| CPU time | 1.32 seconds |
| Started | Sep 04 06:06:27 AM UTC 24 |
| Finished | Sep 04 06:06:30 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1594142366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_in_stall.1594142366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_in_trans.587048854 |
| Short name | T3062 |
| Test name | |
| Test status | |
| Simulation time | 230901360 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 06:06:27 AM UTC 24 |
| Finished | Sep 04 06:06:30 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=587048854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 47.usbdev_in_trans.587048854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_invalid_sync.3105671650 |
| Short name | T3098 |
| Test name | |
| Test status | |
| Simulation time | 3161777554 ps |
| CPU time | 33.67 seconds |
| Started | Sep 04 06:06:26 AM UTC 24 |
| Finished | Sep 04 06:07:01 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3105671650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 47.usbdev_invalid_sync.3105671650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_iso_retraction.1811414331 |
| Short name | T3129 |
| Test name | |
| Test status | |
| Simulation time | 5348899320 ps |
| CPU time | 33.91 seconds |
| Started | Sep 04 06:06:29 AM UTC 24 |
| Finished | Sep 04 06:07:04 AM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1811414331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_iso_retraction.1811414331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_link_in_err.1668741083 |
| Short name | T3064 |
| Test name | |
| Test status | |
| Simulation time | 218957588 ps |
| CPU time | 1.25 seconds |
| Started | Sep 04 06:06:29 AM UTC 24 |
| Finished | Sep 04 06:06:31 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1668741083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_link_in_err.1668741083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_link_resume.3180676460 |
| Short name | T3089 |
| Test name | |
| Test status | |
| Simulation time | 7255734543 ps |
| CPU time | 13.47 seconds |
| Started | Sep 04 06:06:29 AM UTC 24 |
| Finished | Sep 04 06:06:43 AM UTC 24 |
| Peak memory | 227464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3180676460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_link_resume.3180676460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_link_suspend.942689744 |
| Short name | T3081 |
| Test name | |
| Test status | |
| Simulation time | 6284213701 ps |
| CPU time | 8.92 seconds |
| Started | Sep 04 06:06:30 AM UTC 24 |
| Finished | Sep 04 06:06:40 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=942689744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_link_suspend.942689744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_low_speed_traffic.3015492866 |
| Short name | T3122 |
| Test name | |
| Test status | |
| Simulation time | 3476510705 ps |
| CPU time | 27.7 seconds |
| Started | Sep 04 06:06:30 AM UTC 24 |
| Finished | Sep 04 06:06:59 AM UTC 24 |
| Peak memory | 229604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3015492866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_low_speed_traffic.3015492866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_max_inter_pkt_delay.3977610064 |
| Short name | T3107 |
| Test name | |
| Test status | |
| Simulation time | 1982766305 ps |
| CPU time | 19.23 seconds |
| Started | Sep 04 06:06:30 AM UTC 24 |
| Finished | Sep 04 06:06:51 AM UTC 24 |
| Peak memory | 227404 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3977610064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_max_inter_pkt_delay.3977610064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_max_length_in_transaction.3052962214 |
| Short name | T3066 |
| Test name | |
| Test status | |
| Simulation time | 244913617 ps |
| CPU time | 1.1 seconds |
| Started | Sep 04 06:06:30 AM UTC 24 |
| Finished | Sep 04 06:06:32 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3052962214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 47.usbdev_max_length_in_transaction.3052962214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_max_length_out_transaction.2345910571 |
| Short name | T3067 |
| Test name | |
| Test status | |
| Simulation time | 202925863 ps |
| CPU time | 1.17 seconds |
| Started | Sep 04 06:06:31 AM UTC 24 |
| Finished | Sep 04 06:06:33 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2345910571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_max_length_out_transaction.2345910571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_min_inter_pkt_delay.2379284553 |
| Short name | T3372 |
| Test name | |
| Test status | |
| Simulation time | 4129194800 ps |
| CPU time | 110.85 seconds |
| Started | Sep 04 06:06:31 AM UTC 24 |
| Finished | Sep 04 06:08:24 AM UTC 24 |
| Peak memory | 227684 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2379284553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_min_inter_pkt_delay.2379284553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_min_length_in_transaction.3961191393 |
| Short name | T3071 |
| Test name | |
| Test status | |
| Simulation time | 158201363 ps |
| CPU time | 1.23 seconds |
| Started | Sep 04 06:06:32 AM UTC 24 |
| Finished | Sep 04 06:06:34 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3961191393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 47.usbdev_min_length_in_transaction.3961191393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_min_length_out_transaction.1025540395 |
| Short name | T3072 |
| Test name | |
| Test status | |
| Simulation time | 167708235 ps |
| CPU time | 1.36 seconds |
| Started | Sep 04 06:06:33 AM UTC 24 |
| Finished | Sep 04 06:06:35 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1025540395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_min_length_out_transaction.1025540395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_nak_trans.2515016475 |
| Short name | T3073 |
| Test name | |
| Test status | |
| Simulation time | 244439852 ps |
| CPU time | 1.69 seconds |
| Started | Sep 04 06:06:33 AM UTC 24 |
| Finished | Sep 04 06:06:36 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2515016475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_nak_trans.2515016475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_out_iso.2093297994 |
| Short name | T3077 |
| Test name | |
| Test status | |
| Simulation time | 189192932 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 06:06:34 AM UTC 24 |
| Finished | Sep 04 06:06:37 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2093297994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 47.usbdev_out_iso.2093297994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_out_stall.3545705928 |
| Short name | T3074 |
| Test name | |
| Test status | |
| Simulation time | 156630264 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 06:06:34 AM UTC 24 |
| Finished | Sep 04 06:06:37 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3545705928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_out_stall.3545705928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_out_trans_nak.2347395010 |
| Short name | T3076 |
| Test name | |
| Test status | |
| Simulation time | 184947640 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 06:06:34 AM UTC 24 |
| Finished | Sep 04 06:06:37 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2347395010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 47.usbdev_out_trans_nak.2347395010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_pending_in_trans.3062993885 |
| Short name | T3075 |
| Test name | |
| Test status | |
| Simulation time | 164400298 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 06:06:34 AM UTC 24 |
| Finished | Sep 04 06:06:37 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3062993885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 47.usbdev_pending_in_trans.3062993885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_phy_config_pinflip.4091238060 |
| Short name | T3078 |
| Test name | |
| Test status | |
| Simulation time | 233099158 ps |
| CPU time | 1.71 seconds |
| Started | Sep 04 06:06:34 AM UTC 24 |
| Finished | Sep 04 06:06:37 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4091238060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 47.usbdev_phy_config_pinflip.4091238060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_phy_config_usb_ref_disable.3263712288 |
| Short name | T3079 |
| Test name | |
| Test status | |
| Simulation time | 138363168 ps |
| CPU time | 1.32 seconds |
| Started | Sep 04 06:06:36 AM UTC 24 |
| Finished | Sep 04 06:06:38 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3263712288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_phy_config_usb_ref_disable.3263712288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_phy_pins_sense.3063228547 |
| Short name | T3080 |
| Test name | |
| Test status | |
| Simulation time | 40884456 ps |
| CPU time | 1.05 seconds |
| Started | Sep 04 06:06:37 AM UTC 24 |
| Finished | Sep 04 06:06:39 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3063228547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_phy_pins_sense.3063228547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_buffer.55649817 |
| Short name | T3190 |
| Test name | |
| Test status | |
| Simulation time | 15369707708 ps |
| CPU time | 46.44 seconds |
| Started | Sep 04 06:06:38 AM UTC 24 |
| Finished | Sep 04 06:07:26 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=55649817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_pkt_buffer.55649817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_received.4135264303 |
| Short name | T3083 |
| Test name | |
| Test status | |
| Simulation time | 176327825 ps |
| CPU time | 1.6 seconds |
| Started | Sep 04 06:06:38 AM UTC 24 |
| Finished | Sep 04 06:06:41 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4135264303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_pkt_received.4135264303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_sent.3793173658 |
| Short name | T3082 |
| Test name | |
| Test status | |
| Simulation time | 161307290 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 06:06:38 AM UTC 24 |
| Finished | Sep 04 06:06:41 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3793173658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_pkt_sent.3793173658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_random_length_in_transaction.370534679 |
| Short name | T3085 |
| Test name | |
| Test status | |
| Simulation time | 263427215 ps |
| CPU time | 1.86 seconds |
| Started | Sep 04 06:06:38 AM UTC 24 |
| Finished | Sep 04 06:06:41 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=370534679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_random_length_in_transaction.370534679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_random_length_out_transaction.2732046627 |
| Short name | T3084 |
| Test name | |
| Test status | |
| Simulation time | 177749457 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 06:06:38 AM UTC 24 |
| Finished | Sep 04 06:06:41 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2732046627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 47.usbdev_random_length_out_transaction.2732046627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_rx_crc_err.4025367594 |
| Short name | T3086 |
| Test name | |
| Test status | |
| Simulation time | 143122682 ps |
| CPU time | 1.29 seconds |
| Started | Sep 04 06:06:39 AM UTC 24 |
| Finished | Sep 04 06:06:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4025367594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 47.usbdev_rx_crc_err.4025367594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_rx_full.1347352228 |
| Short name | T3087 |
| Test name | |
| Test status | |
| Simulation time | 271645060 ps |
| CPU time | 1.86 seconds |
| Started | Sep 04 06:06:39 AM UTC 24 |
| Finished | Sep 04 06:06:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1347352228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 47.usbdev_rx_full.1347352228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_setup_stage.1216089442 |
| Short name | T3090 |
| Test name | |
| Test status | |
| Simulation time | 149117489 ps |
| CPU time | 1.09 seconds |
| Started | Sep 04 06:06:42 AM UTC 24 |
| Finished | Sep 04 06:06:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1216089442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_setup_stage.1216089442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_setup_trans_ignored.1522417995 |
| Short name | T3092 |
| Test name | |
| Test status | |
| Simulation time | 169679354 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 06:06:42 AM UTC 24 |
| Finished | Sep 04 06:06:44 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1522417995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 47.usbdev_setup_trans_ignored.1522417995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_smoke.2205189301 |
| Short name | T3093 |
| Test name | |
| Test status | |
| Simulation time | 223191141 ps |
| CPU time | 1.73 seconds |
| Started | Sep 04 06:06:42 AM UTC 24 |
| Finished | Sep 04 06:06:45 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2205189301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_smoke.2205189301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_spurious_pids_ignored.2056449720 |
| Short name | T3146 |
| Test name | |
| Test status | |
| Simulation time | 2357567861 ps |
| CPU time | 25.93 seconds |
| Started | Sep 04 06:06:42 AM UTC 24 |
| Finished | Sep 04 06:07:09 AM UTC 24 |
| Peak memory | 234256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2056449720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 47.usbdev_spurious_pids_ignored.2056449720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_stall_priority_over_nak.1051534145 |
| Short name | T3094 |
| Test name | |
| Test status | |
| Simulation time | 195892576 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 06:06:42 AM UTC 24 |
| Finished | Sep 04 06:06:45 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1051534145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_stall_priority_over_nak.1051534145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_stall_trans.1181138324 |
| Short name | T3095 |
| Test name | |
| Test status | |
| Simulation time | 166441024 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 06:06:43 AM UTC 24 |
| Finished | Sep 04 06:06:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1181138324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_stall_trans.1181138324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_stream_len_max.585028047 |
| Short name | T3101 |
| Test name | |
| Test status | |
| Simulation time | 739425545 ps |
| CPU time | 3.42 seconds |
| Started | Sep 04 06:06:43 AM UTC 24 |
| Finished | Sep 04 06:06:48 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=585028047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 47.usbdev_stream_len_max.585028047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_streaming_out.124057616 |
| Short name | T3287 |
| Test name | |
| Test status | |
| Simulation time | 2844613665 ps |
| CPU time | 78.12 seconds |
| Started | Sep 04 06:06:43 AM UTC 24 |
| Finished | Sep 04 06:08:03 AM UTC 24 |
| Peak memory | 227664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=124057616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_streaming_out.124057616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_timeout_missing_host_handshake.23486561 |
| Short name | T3139 |
| Test name | |
| Test status | |
| Simulation time | 6400028223 ps |
| CPU time | 44.88 seconds |
| Started | Sep 04 06:06:21 AM UTC 24 |
| Finished | Sep 04 06:07:08 AM UTC 24 |
| Peak memory | 217428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=23486561 -assert nopostproc +UVM_TESTNAME=usbdev_ba se_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_timeout_missing_host_handshake.23486561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/47.usbdev_tx_rx_disruption.2753349177 |
| Short name | T3102 |
| Test name | |
| Test status | |
| Simulation time | 655107596 ps |
| CPU time | 1.99 seconds |
| Started | Sep 04 06:06:45 AM UTC 24 |
| Finished | Sep 04 06:06:48 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2753349177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_t x_rx_disruption.2753349177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/47.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/470.usbdev_tx_rx_disruption.421192681 |
| Short name | T3762 |
| Test name | |
| Test status | |
| Simulation time | 667730838 ps |
| CPU time | 1.76 seconds |
| Started | Sep 04 06:10:14 AM UTC 24 |
| Finished | Sep 04 06:10:17 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=421192681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 470.usbdev_t x_rx_disruption.421192681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/470.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/471.usbdev_tx_rx_disruption.2872196553 |
| Short name | T3773 |
| Test name | |
| Test status | |
| Simulation time | 570829587 ps |
| CPU time | 2.11 seconds |
| Started | Sep 04 06:10:14 AM UTC 24 |
| Finished | Sep 04 06:10:18 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2872196553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 471.usbdev_ tx_rx_disruption.2872196553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/471.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/472.usbdev_tx_rx_disruption.3571444266 |
| Short name | T3764 |
| Test name | |
| Test status | |
| Simulation time | 498742196 ps |
| CPU time | 1.75 seconds |
| Started | Sep 04 06:10:14 AM UTC 24 |
| Finished | Sep 04 06:10:17 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3571444266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 472.usbdev_ tx_rx_disruption.3571444266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/472.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/473.usbdev_tx_rx_disruption.3181697472 |
| Short name | T3756 |
| Test name | |
| Test status | |
| Simulation time | 446074040 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 06:10:14 AM UTC 24 |
| Finished | Sep 04 06:10:17 AM UTC 24 |
| Peak memory | 214880 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3181697472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 473.usbdev_ tx_rx_disruption.3181697472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/473.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/474.usbdev_tx_rx_disruption.2990930508 |
| Short name | T3767 |
| Test name | |
| Test status | |
| Simulation time | 499934140 ps |
| CPU time | 1.79 seconds |
| Started | Sep 04 06:10:14 AM UTC 24 |
| Finished | Sep 04 06:10:17 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2990930508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 474.usbdev_ tx_rx_disruption.2990930508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/474.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/475.usbdev_tx_rx_disruption.1151629367 |
| Short name | T3774 |
| Test name | |
| Test status | |
| Simulation time | 581251642 ps |
| CPU time | 1.93 seconds |
| Started | Sep 04 06:10:14 AM UTC 24 |
| Finished | Sep 04 06:10:18 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1151629367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 475.usbdev_ tx_rx_disruption.1151629367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/475.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/476.usbdev_tx_rx_disruption.2079254658 |
| Short name | T3758 |
| Test name | |
| Test status | |
| Simulation time | 444469304 ps |
| CPU time | 1.36 seconds |
| Started | Sep 04 06:10:14 AM UTC 24 |
| Finished | Sep 04 06:10:17 AM UTC 24 |
| Peak memory | 214840 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2079254658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 476.usbdev_ tx_rx_disruption.2079254658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/476.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/477.usbdev_tx_rx_disruption.4136262118 |
| Short name | T3763 |
| Test name | |
| Test status | |
| Simulation time | 539886696 ps |
| CPU time | 1.69 seconds |
| Started | Sep 04 06:10:15 AM UTC 24 |
| Finished | Sep 04 06:10:17 AM UTC 24 |
| Peak memory | 214928 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4136262118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 477.usbdev_ tx_rx_disruption.4136262118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/477.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/478.usbdev_tx_rx_disruption.1270224798 |
| Short name | T3772 |
| Test name | |
| Test status | |
| Simulation time | 624460995 ps |
| CPU time | 1.82 seconds |
| Started | Sep 04 06:10:15 AM UTC 24 |
| Finished | Sep 04 06:10:17 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1270224798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 478.usbdev_ tx_rx_disruption.1270224798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/478.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/479.usbdev_tx_rx_disruption.2165209845 |
| Short name | T3769 |
| Test name | |
| Test status | |
| Simulation time | 508679307 ps |
| CPU time | 1.81 seconds |
| Started | Sep 04 06:10:15 AM UTC 24 |
| Finished | Sep 04 06:10:17 AM UTC 24 |
| Peak memory | 214972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2165209845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 479.usbdev_ tx_rx_disruption.2165209845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/479.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_alert_test.778949687 |
| Short name | T3154 |
| Test name | |
| Test status | |
| Simulation time | 46009368 ps |
| CPU time | 1.01 seconds |
| Started | Sep 04 06:07:11 AM UTC 24 |
| Finished | Sep 04 06:07:13 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=778949687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 48.usbdev_alert_test.778949687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_disconnect.2399573632 |
| Short name | T3125 |
| Test name | |
| Test status | |
| Simulation time | 10163456380 ps |
| CPU time | 15.27 seconds |
| Started | Sep 04 06:06:45 AM UTC 24 |
| Finished | Sep 04 06:07:02 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2399573632 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_disconnect.2399573632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_reset.492389954 |
| Short name | T3169 |
| Test name | |
| Test status | |
| Simulation time | 18551545995 ps |
| CPU time | 31.99 seconds |
| Started | Sep 04 06:06:45 AM UTC 24 |
| Finished | Sep 04 06:07:18 AM UTC 24 |
| Peak memory | 217428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=492389954 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_reset.492389954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_resume.3623700813 |
| Short name | T3229 |
| Test name | |
| Test status | |
| Simulation time | 29868454920 ps |
| CPU time | 55.73 seconds |
| Started | Sep 04 06:06:45 AM UTC 24 |
| Finished | Sep 04 06:07:42 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3623700813 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_resume.3623700813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_av_buffer.517616992 |
| Short name | T3103 |
| Test name | |
| Test status | |
| Simulation time | 158790993 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 06:06:46 AM UTC 24 |
| Finished | Sep 04 06:06:49 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=517616992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_av_buffer.517616992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_bitstuff_err.755258065 |
| Short name | T3104 |
| Test name | |
| Test status | |
| Simulation time | 186159794 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 06:06:48 AM UTC 24 |
| Finished | Sep 04 06:06:50 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=755258065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_bitstuff_err.755258065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_data_toggle_clear.3135415168 |
| Short name | T3105 |
| Test name | |
| Test status | |
| Simulation time | 240872589 ps |
| CPU time | 1.86 seconds |
| Started | Sep 04 06:06:48 AM UTC 24 |
| Finished | Sep 04 06:06:51 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3135415168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 48.usbdev_data_toggle_clear.3135415168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_data_toggle_restore.2519727366 |
| Short name | T3108 |
| Test name | |
| Test status | |
| Simulation time | 480001755 ps |
| CPU time | 2.83 seconds |
| Started | Sep 04 06:06:48 AM UTC 24 |
| Finished | Sep 04 06:06:51 AM UTC 24 |
| Peak memory | 217024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2519727366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_data_toggle_restore.2519727366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_device_address.3515784183 |
| Short name | T3310 |
| Test name | |
| Test status | |
| Simulation time | 41336820312 ps |
| CPU time | 79.3 seconds |
| Started | Sep 04 06:06:49 AM UTC 24 |
| Finished | Sep 04 06:08:10 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3515784183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_device_address.3515784183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_device_timeout.3974478768 |
| Short name | T3179 |
| Test name | |
| Test status | |
| Simulation time | 3869524224 ps |
| CPU time | 32.27 seconds |
| Started | Sep 04 06:06:49 AM UTC 24 |
| Finished | Sep 04 06:07:23 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3974478768 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_device_timeout.3974478768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_disable_endpoint.451700211 |
| Short name | T3111 |
| Test name | |
| Test status | |
| Simulation time | 502393876 ps |
| CPU time | 2.54 seconds |
| Started | Sep 04 06:06:49 AM UTC 24 |
| Finished | Sep 04 06:06:53 AM UTC 24 |
| Peak memory | 217020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=451700211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_disable_endpoint.451700211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_disconnected.1797763447 |
| Short name | T3109 |
| Test name | |
| Test status | |
| Simulation time | 148970583 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 06:06:49 AM UTC 24 |
| Finished | Sep 04 06:06:52 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1797763447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_disconnected.1797763447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_enable.1272698879 |
| Short name | T3110 |
| Test name | |
| Test status | |
| Simulation time | 45087163 ps |
| CPU time | 1.12 seconds |
| Started | Sep 04 06:06:50 AM UTC 24 |
| Finished | Sep 04 06:06:53 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1272698879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 48.usbdev_enable.1272698879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_endpoint_access.1822253667 |
| Short name | T3117 |
| Test name | |
| Test status | |
| Simulation time | 835224754 ps |
| CPU time | 3.88 seconds |
| Started | Sep 04 06:06:52 AM UTC 24 |
| Finished | Sep 04 06:06:57 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1822253667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_endpoint_access.1822253667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_fifo_levels.3307908340 |
| Short name | T510 |
| Test name | |
| Test status | |
| Simulation time | 180345715 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 06:06:52 AM UTC 24 |
| Finished | Sep 04 06:06:54 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3307908340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_fifo_levels.3307908340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_fifo_rst.2037080713 |
| Short name | T3115 |
| Test name | |
| Test status | |
| Simulation time | 380699298 ps |
| CPU time | 3.4 seconds |
| Started | Sep 04 06:06:52 AM UTC 24 |
| Finished | Sep 04 06:06:56 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2037080713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_fifo_rst.2037080713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_in_iso.3454821108 |
| Short name | T3114 |
| Test name | |
| Test status | |
| Simulation time | 207806238 ps |
| CPU time | 1.88 seconds |
| Started | Sep 04 06:06:53 AM UTC 24 |
| Finished | Sep 04 06:06:56 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3454821108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 48.usbdev_in_iso.3454821108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_in_stall.4000190814 |
| Short name | T3116 |
| Test name | |
| Test status | |
| Simulation time | 139488234 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 06:06:54 AM UTC 24 |
| Finished | Sep 04 06:06:57 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4000190814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_in_stall.4000190814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_in_trans.1605259223 |
| Short name | T3118 |
| Test name | |
| Test status | |
| Simulation time | 238056887 ps |
| CPU time | 1.71 seconds |
| Started | Sep 04 06:06:56 AM UTC 24 |
| Finished | Sep 04 06:06:59 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1605259223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_in_trans.1605259223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_invalid_sync.2845881854 |
| Short name | T3254 |
| Test name | |
| Test status | |
| Simulation time | 2457993761 ps |
| CPU time | 58.51 seconds |
| Started | Sep 04 06:06:53 AM UTC 24 |
| Finished | Sep 04 06:07:53 AM UTC 24 |
| Peak memory | 229600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2845881854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 48.usbdev_invalid_sync.2845881854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_iso_retraction.3637077570 |
| Short name | T3499 |
| Test name | |
| Test status | |
| Simulation time | 11825160980 ps |
| CPU time | 130.26 seconds |
| Started | Sep 04 06:06:56 AM UTC 24 |
| Finished | Sep 04 06:09:09 AM UTC 24 |
| Peak memory | 217528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3637077570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_iso_retraction.3637077570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_link_in_err.1147938404 |
| Short name | T3120 |
| Test name | |
| Test status | |
| Simulation time | 233959381 ps |
| CPU time | 1.72 seconds |
| Started | Sep 04 06:06:56 AM UTC 24 |
| Finished | Sep 04 06:06:59 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1147938404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_link_in_err.1147938404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_link_resume.206655662 |
| Short name | T3182 |
| Test name | |
| Test status | |
| Simulation time | 11807648915 ps |
| CPU time | 25.91 seconds |
| Started | Sep 04 06:06:58 AM UTC 24 |
| Finished | Sep 04 06:07:25 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=206655662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_link_resume.206655662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_link_suspend.2292141481 |
| Short name | T3144 |
| Test name | |
| Test status | |
| Simulation time | 5537178159 ps |
| CPU time | 9.91 seconds |
| Started | Sep 04 06:06:58 AM UTC 24 |
| Finished | Sep 04 06:07:09 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2292141481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_link_suspend.2292141481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_low_speed_traffic.3125663715 |
| Short name | T3341 |
| Test name | |
| Test status | |
| Simulation time | 2904354676 ps |
| CPU time | 78.03 seconds |
| Started | Sep 04 06:06:58 AM UTC 24 |
| Finished | Sep 04 06:08:17 AM UTC 24 |
| Peak memory | 234272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3125663715 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_low_speed_traffic.3125663715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_max_inter_pkt_delay.4077946522 |
| Short name | T3161 |
| Test name | |
| Test status | |
| Simulation time | 2130567235 ps |
| CPU time | 16.99 seconds |
| Started | Sep 04 06:06:58 AM UTC 24 |
| Finished | Sep 04 06:07:16 AM UTC 24 |
| Peak memory | 217256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4077946522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_max_inter_pkt_delay.4077946522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_max_length_in_transaction.208079728 |
| Short name | T3123 |
| Test name | |
| Test status | |
| Simulation time | 261646040 ps |
| CPU time | 1.83 seconds |
| Started | Sep 04 06:06:58 AM UTC 24 |
| Finished | Sep 04 06:07:01 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=208079728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 48.usbdev_max_length_in_transaction.208079728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_max_length_out_transaction.2957518020 |
| Short name | T3128 |
| Test name | |
| Test status | |
| Simulation time | 190153591 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 06:07:00 AM UTC 24 |
| Finished | Sep 04 06:07:03 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2957518020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 48.usbdev_max_length_out_transaction.2957518020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_min_inter_pkt_delay.418678773 |
| Short name | T3189 |
| Test name | |
| Test status | |
| Simulation time | 2828114815 ps |
| CPU time | 24.6 seconds |
| Started | Sep 04 06:07:00 AM UTC 24 |
| Finished | Sep 04 06:07:26 AM UTC 24 |
| Peak memory | 229672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=418678773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_min_inter_pkt_delay.418678773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_min_length_in_transaction.698825178 |
| Short name | T3127 |
| Test name | |
| Test status | |
| Simulation time | 150254758 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 06:07:00 AM UTC 24 |
| Finished | Sep 04 06:07:03 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=698825178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 48.usbdev_min_length_in_transaction.698825178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_min_length_out_transaction.74534787 |
| Short name | T3126 |
| Test name | |
| Test status | |
| Simulation time | 152445268 ps |
| CPU time | 1.24 seconds |
| Started | Sep 04 06:07:00 AM UTC 24 |
| Finished | Sep 04 06:07:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=74534787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transacti on_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 48.usbdev_min_length_out_transaction.74534787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_nak_trans.48424199 |
| Short name | T3130 |
| Test name | |
| Test status | |
| Simulation time | 191246813 ps |
| CPU time | 1.24 seconds |
| Started | Sep 04 06:07:02 AM UTC 24 |
| Finished | Sep 04 06:07:04 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=48424199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_nak_trans.48424199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_out_iso.2179224473 |
| Short name | T3133 |
| Test name | |
| Test status | |
| Simulation time | 202639969 ps |
| CPU time | 1.69 seconds |
| Started | Sep 04 06:07:02 AM UTC 24 |
| Finished | Sep 04 06:07:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2179224473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_out_iso.2179224473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_out_stall.1975582575 |
| Short name | T3132 |
| Test name | |
| Test status | |
| Simulation time | 176731297 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 06:07:02 AM UTC 24 |
| Finished | Sep 04 06:07:04 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1975582575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_out_stall.1975582575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_out_trans_nak.2593557683 |
| Short name | T3131 |
| Test name | |
| Test status | |
| Simulation time | 154969901 ps |
| CPU time | 1.39 seconds |
| Started | Sep 04 06:07:02 AM UTC 24 |
| Finished | Sep 04 06:07:04 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2593557683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 48.usbdev_out_trans_nak.2593557683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_pending_in_trans.404526176 |
| Short name | T3135 |
| Test name | |
| Test status | |
| Simulation time | 149497437 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 06:07:03 AM UTC 24 |
| Finished | Sep 04 06:07:06 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=404526176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_pending_in_trans.404526176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_phy_config_pinflip.1531708578 |
| Short name | T3137 |
| Test name | |
| Test status | |
| Simulation time | 219159040 ps |
| CPU time | 1.68 seconds |
| Started | Sep 04 06:07:03 AM UTC 24 |
| Finished | Sep 04 06:07:06 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1531708578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 48.usbdev_phy_config_pinflip.1531708578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_phy_config_usb_ref_disable.2689536239 |
| Short name | T3136 |
| Test name | |
| Test status | |
| Simulation time | 150182828 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 06:07:03 AM UTC 24 |
| Finished | Sep 04 06:07:06 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2689536239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 48.usbdev_phy_config_usb_ref_disable.2689536239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_phy_pins_sense.2994286451 |
| Short name | T3134 |
| Test name | |
| Test status | |
| Simulation time | 117968442 ps |
| CPU time | 1.2 seconds |
| Started | Sep 04 06:07:03 AM UTC 24 |
| Finished | Sep 04 06:07:06 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2994286451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_phy_pins_sense.2994286451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_buffer.1500054055 |
| Short name | T3306 |
| Test name | |
| Test status | |
| Simulation time | 21126812467 ps |
| CPU time | 63.75 seconds |
| Started | Sep 04 06:07:05 AM UTC 24 |
| Finished | Sep 04 06:08:10 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1500054055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_pkt_buffer.1500054055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_received.2071358126 |
| Short name | T3138 |
| Test name | |
| Test status | |
| Simulation time | 167467123 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 06:07:05 AM UTC 24 |
| Finished | Sep 04 06:07:07 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2071358126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_pkt_received.2071358126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_sent.627004169 |
| Short name | T3145 |
| Test name | |
| Test status | |
| Simulation time | 251266950 ps |
| CPU time | 1.74 seconds |
| Started | Sep 04 06:07:06 AM UTC 24 |
| Finished | Sep 04 06:07:09 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=627004169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_pkt_sent.627004169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_random_length_in_transaction.527460919 |
| Short name | T3142 |
| Test name | |
| Test status | |
| Simulation time | 228328686 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 06:07:06 AM UTC 24 |
| Finished | Sep 04 06:07:08 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=527460919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_random_length_in_transaction.527460919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_random_length_out_transaction.3312075575 |
| Short name | T3141 |
| Test name | |
| Test status | |
| Simulation time | 172798081 ps |
| CPU time | 1.24 seconds |
| Started | Sep 04 06:07:06 AM UTC 24 |
| Finished | Sep 04 06:07:08 AM UTC 24 |
| Peak memory | 214816 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3312075575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 48.usbdev_random_length_out_transaction.3312075575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_rx_crc_err.2856317797 |
| Short name | T3143 |
| Test name | |
| Test status | |
| Simulation time | 167009480 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 06:07:06 AM UTC 24 |
| Finished | Sep 04 06:07:08 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2856317797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_rx_crc_err.2856317797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_rx_full.4113481635 |
| Short name | T3149 |
| Test name | |
| Test status | |
| Simulation time | 378454216 ps |
| CPU time | 1.88 seconds |
| Started | Sep 04 06:07:07 AM UTC 24 |
| Finished | Sep 04 06:07:10 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4113481635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_rx_full.4113481635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_setup_stage.78188268 |
| Short name | T3148 |
| Test name | |
| Test status | |
| Simulation time | 180893264 ps |
| CPU time | 1.32 seconds |
| Started | Sep 04 06:07:07 AM UTC 24 |
| Finished | Sep 04 06:07:10 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=78188268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_setup_stage.78188268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_setup_trans_ignored.1234858094 |
| Short name | T3147 |
| Test name | |
| Test status | |
| Simulation time | 190520515 ps |
| CPU time | 1.12 seconds |
| Started | Sep 04 06:07:07 AM UTC 24 |
| Finished | Sep 04 06:07:09 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1234858094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 48.usbdev_setup_trans_ignored.1234858094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_smoke.391137793 |
| Short name | T3152 |
| Test name | |
| Test status | |
| Simulation time | 234958045 ps |
| CPU time | 1.76 seconds |
| Started | Sep 04 06:07:09 AM UTC 24 |
| Finished | Sep 04 06:07:11 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=391137793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_smoke.391137793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_spurious_pids_ignored.2106749292 |
| Short name | T3224 |
| Test name | |
| Test status | |
| Simulation time | 3392400866 ps |
| CPU time | 29.01 seconds |
| Started | Sep 04 06:07:09 AM UTC 24 |
| Finished | Sep 04 06:07:39 AM UTC 24 |
| Peak memory | 234272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2106749292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 48.usbdev_spurious_pids_ignored.2106749292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_stall_priority_over_nak.4186946960 |
| Short name | T3150 |
| Test name | |
| Test status | |
| Simulation time | 155845988 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 06:07:09 AM UTC 24 |
| Finished | Sep 04 06:07:11 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4186946960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_stall_priority_over_nak.4186946960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_stall_trans.3374729413 |
| Short name | T3151 |
| Test name | |
| Test status | |
| Simulation time | 244483179 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 06:07:09 AM UTC 24 |
| Finished | Sep 04 06:07:11 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3374729413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_stall_trans.3374729413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_stream_len_max.1434623233 |
| Short name | T3164 |
| Test name | |
| Test status | |
| Simulation time | 1301751854 ps |
| CPU time | 5.93 seconds |
| Started | Sep 04 06:07:10 AM UTC 24 |
| Finished | Sep 04 06:07:17 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1434623233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_stream_len_max.1434623233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_streaming_out.1817015241 |
| Short name | T3215 |
| Test name | |
| Test status | |
| Simulation time | 2656502161 ps |
| CPU time | 22.68 seconds |
| Started | Sep 04 06:07:10 AM UTC 24 |
| Finished | Sep 04 06:07:34 AM UTC 24 |
| Peak memory | 229516 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1817015241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_streaming_out.1817015241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_timeout_missing_host_handshake.1147816488 |
| Short name | T3124 |
| Test name | |
| Test status | |
| Simulation time | 401670104 ps |
| CPU time | 10.77 seconds |
| Started | Sep 04 06:06:49 AM UTC 24 |
| Finished | Sep 04 06:07:01 AM UTC 24 |
| Peak memory | 217076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1147816488 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_timeout_missing_host_handshake.1147816488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/48.usbdev_tx_rx_disruption.3940968205 |
| Short name | T3158 |
| Test name | |
| Test status | |
| Simulation time | 538729250 ps |
| CPU time | 2.93 seconds |
| Started | Sep 04 06:07:10 AM UTC 24 |
| Finished | Sep 04 06:07:14 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3940968205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_t x_rx_disruption.3940968205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/48.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/480.usbdev_tx_rx_disruption.3307636758 |
| Short name | T3766 |
| Test name | |
| Test status | |
| Simulation time | 601665940 ps |
| CPU time | 1.61 seconds |
| Started | Sep 04 06:10:15 AM UTC 24 |
| Finished | Sep 04 06:10:17 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3307636758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 480.usbdev_ tx_rx_disruption.3307636758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/480.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/481.usbdev_tx_rx_disruption.2791868661 |
| Short name | T3759 |
| Test name | |
| Test status | |
| Simulation time | 485186169 ps |
| CPU time | 1.27 seconds |
| Started | Sep 04 06:10:15 AM UTC 24 |
| Finished | Sep 04 06:10:17 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2791868661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 481.usbdev_ tx_rx_disruption.2791868661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/481.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/482.usbdev_tx_rx_disruption.1114610629 |
| Short name | T3777 |
| Test name | |
| Test status | |
| Simulation time | 576375185 ps |
| CPU time | 1.99 seconds |
| Started | Sep 04 06:10:15 AM UTC 24 |
| Finished | Sep 04 06:10:18 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1114610629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 482.usbdev_ tx_rx_disruption.1114610629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/482.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/483.usbdev_tx_rx_disruption.3869788631 |
| Short name | T3776 |
| Test name | |
| Test status | |
| Simulation time | 522585107 ps |
| CPU time | 1.87 seconds |
| Started | Sep 04 06:10:15 AM UTC 24 |
| Finished | Sep 04 06:10:18 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3869788631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 483.usbdev_ tx_rx_disruption.3869788631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/483.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/484.usbdev_tx_rx_disruption.1399785861 |
| Short name | T3775 |
| Test name | |
| Test status | |
| Simulation time | 498968810 ps |
| CPU time | 1.94 seconds |
| Started | Sep 04 06:10:15 AM UTC 24 |
| Finished | Sep 04 06:10:18 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1399785861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 484.usbdev_ tx_rx_disruption.1399785861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/484.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/485.usbdev_tx_rx_disruption.930604484 |
| Short name | T3778 |
| Test name | |
| Test status | |
| Simulation time | 648054884 ps |
| CPU time | 2.2 seconds |
| Started | Sep 04 06:10:15 AM UTC 24 |
| Finished | Sep 04 06:10:18 AM UTC 24 |
| Peak memory | 217040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=930604484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 485.usbdev_t x_rx_disruption.930604484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/485.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/486.usbdev_tx_rx_disruption.217036186 |
| Short name | T3770 |
| Test name | |
| Test status | |
| Simulation time | 440004461 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 06:10:15 AM UTC 24 |
| Finished | Sep 04 06:10:17 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=217036186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 486.usbdev_t x_rx_disruption.217036186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/486.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/487.usbdev_tx_rx_disruption.160179151 |
| Short name | T3779 |
| Test name | |
| Test status | |
| Simulation time | 488725443 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 06:10:16 AM UTC 24 |
| Finished | Sep 04 06:10:19 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=160179151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 487.usbdev_t x_rx_disruption.160179151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/487.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/488.usbdev_tx_rx_disruption.1709118868 |
| Short name | T3781 |
| Test name | |
| Test status | |
| Simulation time | 502412734 ps |
| CPU time | 1.71 seconds |
| Started | Sep 04 06:10:16 AM UTC 24 |
| Finished | Sep 04 06:10:19 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1709118868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 488.usbdev_ tx_rx_disruption.1709118868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/488.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/489.usbdev_tx_rx_disruption.2916816663 |
| Short name | T3782 |
| Test name | |
| Test status | |
| Simulation time | 474139829 ps |
| CPU time | 1.63 seconds |
| Started | Sep 04 06:10:16 AM UTC 24 |
| Finished | Sep 04 06:10:19 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2916816663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 489.usbdev_ tx_rx_disruption.2916816663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/489.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_alert_test.2251665472 |
| Short name | T3211 |
| Test name | |
| Test status | |
| Simulation time | 52078148 ps |
| CPU time | 1.03 seconds |
| Started | Sep 04 06:07:30 AM UTC 24 |
| Finished | Sep 04 06:07:32 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2251665472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 49.usbdev_alert_test.2251665472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_disconnect.2467938184 |
| Short name | T3172 |
| Test name | |
| Test status | |
| Simulation time | 4130433268 ps |
| CPU time | 9.44 seconds |
| Started | Sep 04 06:07:11 AM UTC 24 |
| Finished | Sep 04 06:07:21 AM UTC 24 |
| Peak memory | 227480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2467938184 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_disconnect.2467938184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_reset.431251985 |
| Short name | T3238 |
| Test name | |
| Test status | |
| Simulation time | 20112671612 ps |
| CPU time | 33.3 seconds |
| Started | Sep 04 06:07:11 AM UTC 24 |
| Finished | Sep 04 06:07:45 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=431251985 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_reset.431251985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_resume.3111359950 |
| Short name | T3237 |
| Test name | |
| Test status | |
| Simulation time | 24828261566 ps |
| CPU time | 30.95 seconds |
| Started | Sep 04 06:07:12 AM UTC 24 |
| Finished | Sep 04 06:07:44 AM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3111359950 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_resume.3111359950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_av_buffer.3282196357 |
| Short name | T3157 |
| Test name | |
| Test status | |
| Simulation time | 169085745 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 06:07:12 AM UTC 24 |
| Finished | Sep 04 06:07:14 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3282196357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_av_buffer.3282196357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_bitstuff_err.1268992100 |
| Short name | T3156 |
| Test name | |
| Test status | |
| Simulation time | 148806096 ps |
| CPU time | 1.35 seconds |
| Started | Sep 04 06:07:12 AM UTC 24 |
| Finished | Sep 04 06:07:14 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1268992100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_bitstuff_err.1268992100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_data_toggle_clear.1993389258 |
| Short name | T3160 |
| Test name | |
| Test status | |
| Simulation time | 272823417 ps |
| CPU time | 1.92 seconds |
| Started | Sep 04 06:07:12 AM UTC 24 |
| Finished | Sep 04 06:07:15 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1993389258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 49.usbdev_data_toggle_clear.1993389258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_data_toggle_restore.319690493 |
| Short name | T3167 |
| Test name | |
| Test status | |
| Simulation time | 1136969665 ps |
| CPU time | 4 seconds |
| Started | Sep 04 06:07:13 AM UTC 24 |
| Finished | Sep 04 06:07:18 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=319690493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_data_toggle_restore.319690493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_device_address.4223255487 |
| Short name | T3270 |
| Test name | |
| Test status | |
| Simulation time | 17381815082 ps |
| CPU time | 43.01 seconds |
| Started | Sep 04 06:07:13 AM UTC 24 |
| Finished | Sep 04 06:07:58 AM UTC 24 |
| Peak memory | 217384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4223255487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_device_address.4223255487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_device_timeout.1828183992 |
| Short name | T3212 |
| Test name | |
| Test status | |
| Simulation time | 706919205 ps |
| CPU time | 18.42 seconds |
| Started | Sep 04 06:07:13 AM UTC 24 |
| Finished | Sep 04 06:07:33 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1828183992 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_device_timeout.1828183992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_disable_endpoint.1651595180 |
| Short name | T3170 |
| Test name | |
| Test status | |
| Simulation time | 773004571 ps |
| CPU time | 3.57 seconds |
| Started | Sep 04 06:07:16 AM UTC 24 |
| Finished | Sep 04 06:07:20 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1651595180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 49.usbdev_disable_endpoint.1651595180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_disconnected.4026557554 |
| Short name | T3168 |
| Test name | |
| Test status | |
| Simulation time | 168693884 ps |
| CPU time | 1.37 seconds |
| Started | Sep 04 06:07:16 AM UTC 24 |
| Finished | Sep 04 06:07:18 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4026557554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_disconnected.4026557554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_enable.3020480875 |
| Short name | T3166 |
| Test name | |
| Test status | |
| Simulation time | 60788984 ps |
| CPU time | 1.18 seconds |
| Started | Sep 04 06:07:16 AM UTC 24 |
| Finished | Sep 04 06:07:18 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3020480875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 49.usbdev_enable.3020480875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_endpoint_access.2567331233 |
| Short name | T3174 |
| Test name | |
| Test status | |
| Simulation time | 1059790622 ps |
| CPU time | 4.41 seconds |
| Started | Sep 04 06:07:16 AM UTC 24 |
| Finished | Sep 04 06:07:21 AM UTC 24 |
| Peak memory | 217264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2567331233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_endpoint_access.2567331233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_endpoint_types.3215101111 |
| Short name | T383 |
| Test name | |
| Test status | |
| Simulation time | 168235506 ps |
| CPU time | 1.37 seconds |
| Started | Sep 04 06:07:16 AM UTC 24 |
| Finished | Sep 04 06:07:18 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3215101111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_endpoint_types.3215101111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_fifo_levels.1411398916 |
| Short name | T549 |
| Test name | |
| Test status | |
| Simulation time | 148576634 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 06:07:17 AM UTC 24 |
| Finished | Sep 04 06:07:20 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1411398916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_fifo_levels.1411398916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_fifo_rst.3609150833 |
| Short name | T3181 |
| Test name | |
| Test status | |
| Simulation time | 490243845 ps |
| CPU time | 5.04 seconds |
| Started | Sep 04 06:07:17 AM UTC 24 |
| Finished | Sep 04 06:07:24 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3609150833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_fifo_rst.3609150833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_in_iso.3117354872 |
| Short name | T3178 |
| Test name | |
| Test status | |
| Simulation time | 226563010 ps |
| CPU time | 2.14 seconds |
| Started | Sep 04 06:07:19 AM UTC 24 |
| Finished | Sep 04 06:07:22 AM UTC 24 |
| Peak memory | 227484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3117354872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 49.usbdev_in_iso.3117354872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_in_stall.2738117279 |
| Short name | T3173 |
| Test name | |
| Test status | |
| Simulation time | 192018709 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 06:07:19 AM UTC 24 |
| Finished | Sep 04 06:07:21 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2738117279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_in_stall.2738117279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_in_trans.2480428806 |
| Short name | T3175 |
| Test name | |
| Test status | |
| Simulation time | 201590249 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 06:07:19 AM UTC 24 |
| Finished | Sep 04 06:07:21 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2480428806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_in_trans.2480428806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_invalid_sync.540002567 |
| Short name | T3303 |
| Test name | |
| Test status | |
| Simulation time | 5428278250 ps |
| CPU time | 49.46 seconds |
| Started | Sep 04 06:07:18 AM UTC 24 |
| Finished | Sep 04 06:08:09 AM UTC 24 |
| Peak memory | 229596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=540002567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_invalid_sync.540002567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_iso_retraction.1260534046 |
| Short name | T3296 |
| Test name | |
| Test status | |
| Simulation time | 4056740681 ps |
| CPU time | 45.95 seconds |
| Started | Sep 04 06:07:19 AM UTC 24 |
| Finished | Sep 04 06:08:06 AM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1260534046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_iso_retraction.1260534046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_link_in_err.3631152054 |
| Short name | T3176 |
| Test name | |
| Test status | |
| Simulation time | 231298121 ps |
| CPU time | 1.72 seconds |
| Started | Sep 04 06:07:19 AM UTC 24 |
| Finished | Sep 04 06:07:22 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3631152054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_link_in_err.3631152054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_link_resume.2231694 |
| Short name | T3295 |
| Test name | |
| Test status | |
| Simulation time | 28709872182 ps |
| CPU time | 45.55 seconds |
| Started | Sep 04 06:07:19 AM UTC 24 |
| Finished | Sep 04 06:08:06 AM UTC 24 |
| Peak memory | 217364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2231694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_link_resume.2231694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_link_suspend.1148605373 |
| Short name | T3196 |
| Test name | |
| Test status | |
| Simulation time | 4065886085 ps |
| CPU time | 6.24 seconds |
| Started | Sep 04 06:07:20 AM UTC 24 |
| Finished | Sep 04 06:07:28 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1148605373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_link_suspend.1148605373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_low_speed_traffic.3134111145 |
| Short name | T3323 |
| Test name | |
| Test status | |
| Simulation time | 4840385514 ps |
| CPU time | 51.24 seconds |
| Started | Sep 04 06:07:20 AM UTC 24 |
| Finished | Sep 04 06:08:13 AM UTC 24 |
| Peak memory | 234264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3134111145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_low_speed_traffic.3134111145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_max_inter_pkt_delay.3785980247 |
| Short name | T3493 |
| Test name | |
| Test status | |
| Simulation time | 4029838506 ps |
| CPU time | 101.22 seconds |
| Started | Sep 04 06:07:22 AM UTC 24 |
| Finished | Sep 04 06:09:05 AM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3785980247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_max_inter_pkt_delay.3785980247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_max_length_in_transaction.2001142752 |
| Short name | T3183 |
| Test name | |
| Test status | |
| Simulation time | 240354869 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 06:07:22 AM UTC 24 |
| Finished | Sep 04 06:07:25 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2001142752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 49.usbdev_max_length_in_transaction.2001142752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_max_length_out_transaction.931313499 |
| Short name | T3186 |
| Test name | |
| Test status | |
| Simulation time | 186621005 ps |
| CPU time | 1.62 seconds |
| Started | Sep 04 06:07:22 AM UTC 24 |
| Finished | Sep 04 06:07:25 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=931313499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 49.usbdev_max_length_out_transaction.931313499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_min_inter_pkt_delay.322617658 |
| Short name | T3339 |
| Test name | |
| Test status | |
| Simulation time | 2054475265 ps |
| CPU time | 52.69 seconds |
| Started | Sep 04 06:07:22 AM UTC 24 |
| Finished | Sep 04 06:08:16 AM UTC 24 |
| Peak memory | 227400 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=322617658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_min_inter_pkt_delay.322617658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_min_length_in_transaction.22769208 |
| Short name | T3185 |
| Test name | |
| Test status | |
| Simulation time | 169083492 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 06:07:22 AM UTC 24 |
| Finished | Sep 04 06:07:25 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=22769208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_ trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 49.usbdev_min_length_in_transaction.22769208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_min_length_out_transaction.2821843860 |
| Short name | T3184 |
| Test name | |
| Test status | |
| Simulation time | 165509290 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 06:07:22 AM UTC 24 |
| Finished | Sep 04 06:07:25 AM UTC 24 |
| Peak memory | 214836 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2821843860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_min_length_out_transaction.2821843860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_nak_trans.861541976 |
| Short name | T3187 |
| Test name | |
| Test status | |
| Simulation time | 233926812 ps |
| CPU time | 1.74 seconds |
| Started | Sep 04 06:07:23 AM UTC 24 |
| Finished | Sep 04 06:07:25 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=861541976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_nak_trans.861541976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_out_iso.2371744982 |
| Short name | T3192 |
| Test name | |
| Test status | |
| Simulation time | 205381745 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 06:07:24 AM UTC 24 |
| Finished | Sep 04 06:07:27 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2371744982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 49.usbdev_out_iso.2371744982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_out_stall.942556266 |
| Short name | T3191 |
| Test name | |
| Test status | |
| Simulation time | 175529425 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 06:07:24 AM UTC 24 |
| Finished | Sep 04 06:07:27 AM UTC 24 |
| Peak memory | 214780 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=942556266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_out_stall.942556266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_out_trans_nak.4168143707 |
| Short name | T3195 |
| Test name | |
| Test status | |
| Simulation time | 186604219 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 06:07:25 AM UTC 24 |
| Finished | Sep 04 06:07:27 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4168143707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 49.usbdev_out_trans_nak.4168143707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_pending_in_trans.612302639 |
| Short name | T3193 |
| Test name | |
| Test status | |
| Simulation time | 161411690 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 06:07:25 AM UTC 24 |
| Finished | Sep 04 06:07:27 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=612302639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_pending_in_trans.612302639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_phy_config_pinflip.2415590863 |
| Short name | T3194 |
| Test name | |
| Test status | |
| Simulation time | 238707658 ps |
| CPU time | 1.31 seconds |
| Started | Sep 04 06:07:25 AM UTC 24 |
| Finished | Sep 04 06:07:27 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2415590863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 49.usbdev_phy_config_pinflip.2415590863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_phy_config_usb_ref_disable.3431888043 |
| Short name | T3200 |
| Test name | |
| Test status | |
| Simulation time | 147848241 ps |
| CPU time | 1.33 seconds |
| Started | Sep 04 06:07:26 AM UTC 24 |
| Finished | Sep 04 06:07:29 AM UTC 24 |
| Peak memory | 215036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3431888043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_phy_config_usb_ref_disable.3431888043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_phy_pins_sense.2591415698 |
| Short name | T3197 |
| Test name | |
| Test status | |
| Simulation time | 61994844 ps |
| CPU time | 1.07 seconds |
| Started | Sep 04 06:07:26 AM UTC 24 |
| Finished | Sep 04 06:07:28 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2591415698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_phy_pins_sense.2591415698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_buffer.1905939774 |
| Short name | T3342 |
| Test name | |
| Test status | |
| Simulation time | 19507267004 ps |
| CPU time | 50.17 seconds |
| Started | Sep 04 06:07:26 AM UTC 24 |
| Finished | Sep 04 06:08:18 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1905939774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 49.usbdev_pkt_buffer.1905939774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_received.2784361156 |
| Short name | T3199 |
| Test name | |
| Test status | |
| Simulation time | 258860969 ps |
| CPU time | 1.13 seconds |
| Started | Sep 04 06:07:26 AM UTC 24 |
| Finished | Sep 04 06:07:28 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2784361156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_pkt_received.2784361156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_sent.4208574419 |
| Short name | T3198 |
| Test name | |
| Test status | |
| Simulation time | 193544507 ps |
| CPU time | 0.97 seconds |
| Started | Sep 04 06:07:26 AM UTC 24 |
| Finished | Sep 04 06:07:28 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4208574419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_pkt_sent.4208574419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_random_length_in_transaction.2057400040 |
| Short name | T3201 |
| Test name | |
| Test status | |
| Simulation time | 163144544 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 06:07:26 AM UTC 24 |
| Finished | Sep 04 06:07:29 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2057400040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 49.usbdev_random_length_in_transaction.2057400040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_random_length_out_transaction.3133167111 |
| Short name | T3202 |
| Test name | |
| Test status | |
| Simulation time | 142506718 ps |
| CPU time | 1.28 seconds |
| Started | Sep 04 06:07:28 AM UTC 24 |
| Finished | Sep 04 06:07:31 AM UTC 24 |
| Peak memory | 215020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3133167111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 49.usbdev_random_length_out_transaction.3133167111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_rx_crc_err.2436980500 |
| Short name | T3205 |
| Test name | |
| Test status | |
| Simulation time | 168781199 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 06:07:28 AM UTC 24 |
| Finished | Sep 04 06:07:31 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2436980500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 49.usbdev_rx_crc_err.2436980500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_rx_full.2258700274 |
| Short name | T3204 |
| Test name | |
| Test status | |
| Simulation time | 251910930 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 06:07:28 AM UTC 24 |
| Finished | Sep 04 06:07:31 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2258700274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 49.usbdev_rx_full.2258700274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_setup_stage.1478109673 |
| Short name | T3206 |
| Test name | |
| Test status | |
| Simulation time | 202206175 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 06:07:28 AM UTC 24 |
| Finished | Sep 04 06:07:31 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1478109673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_setup_stage.1478109673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_setup_trans_ignored.2323088434 |
| Short name | T3203 |
| Test name | |
| Test status | |
| Simulation time | 159686185 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 06:07:29 AM UTC 24 |
| Finished | Sep 04 06:07:31 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2323088434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 49.usbdev_setup_trans_ignored.2323088434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_smoke.476566397 |
| Short name | T3209 |
| Test name | |
| Test status | |
| Simulation time | 264958727 ps |
| CPU time | 1.83 seconds |
| Started | Sep 04 06:07:29 AM UTC 24 |
| Finished | Sep 04 06:07:32 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=476566397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_smoke.476566397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_spurious_pids_ignored.3396575416 |
| Short name | T3453 |
| Test name | |
| Test status | |
| Simulation time | 2800542058 ps |
| CPU time | 75.31 seconds |
| Started | Sep 04 06:07:29 AM UTC 24 |
| Finished | Sep 04 06:08:46 AM UTC 24 |
| Peak memory | 229660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3396575416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 49.usbdev_spurious_pids_ignored.3396575416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_stall_priority_over_nak.1341167774 |
| Short name | T3207 |
| Test name | |
| Test status | |
| Simulation time | 201584660 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 06:07:29 AM UTC 24 |
| Finished | Sep 04 06:07:31 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1341167774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_stall_priority_over_nak.1341167774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_stall_trans.4223744323 |
| Short name | T3208 |
| Test name | |
| Test status | |
| Simulation time | 180663170 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 06:07:29 AM UTC 24 |
| Finished | Sep 04 06:07:31 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4223744323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_stall_trans.4223744323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_stream_len_max.2058509533 |
| Short name | T3217 |
| Test name | |
| Test status | |
| Simulation time | 1249932122 ps |
| CPU time | 4.41 seconds |
| Started | Sep 04 06:07:30 AM UTC 24 |
| Finished | Sep 04 06:07:36 AM UTC 24 |
| Peak memory | 217144 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2058509533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_stream_len_max.2058509533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_streaming_out.850983791 |
| Short name | T3454 |
| Test name | |
| Test status | |
| Simulation time | 2925388726 ps |
| CPU time | 75.03 seconds |
| Started | Sep 04 06:07:30 AM UTC 24 |
| Finished | Sep 04 06:08:47 AM UTC 24 |
| Peak memory | 227624 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=850983791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_streaming_out.850983791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_timeout_missing_host_handshake.428812441 |
| Short name | T3225 |
| Test name | |
| Test status | |
| Simulation time | 3266439525 ps |
| CPU time | 24.43 seconds |
| Started | Sep 04 06:07:15 AM UTC 24 |
| Finished | Sep 04 06:07:40 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=428812441 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_timeout_missing_host_handshake.428812441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/49.usbdev_tx_rx_disruption.1649450208 |
| Short name | T3213 |
| Test name | |
| Test status | |
| Simulation time | 491459062 ps |
| CPU time | 2.34 seconds |
| Started | Sep 04 06:07:30 AM UTC 24 |
| Finished | Sep 04 06:07:34 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1649450208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_t x_rx_disruption.1649450208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/49.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/490.usbdev_tx_rx_disruption.1611921898 |
| Short name | T3786 |
| Test name | |
| Test status | |
| Simulation time | 647621426 ps |
| CPU time | 1.78 seconds |
| Started | Sep 04 06:10:16 AM UTC 24 |
| Finished | Sep 04 06:10:19 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1611921898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 490.usbdev_ tx_rx_disruption.1611921898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/490.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/491.usbdev_tx_rx_disruption.1947414630 |
| Short name | T3784 |
| Test name | |
| Test status | |
| Simulation time | 612650764 ps |
| CPU time | 1.72 seconds |
| Started | Sep 04 06:10:16 AM UTC 24 |
| Finished | Sep 04 06:10:19 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1947414630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 491.usbdev_ tx_rx_disruption.1947414630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/491.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/492.usbdev_tx_rx_disruption.934730388 |
| Short name | T3780 |
| Test name | |
| Test status | |
| Simulation time | 542838653 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 06:10:16 AM UTC 24 |
| Finished | Sep 04 06:10:19 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=934730388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 492.usbdev_t x_rx_disruption.934730388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/492.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/493.usbdev_tx_rx_disruption.1943423145 |
| Short name | T3787 |
| Test name | |
| Test status | |
| Simulation time | 667177621 ps |
| CPU time | 1.68 seconds |
| Started | Sep 04 06:10:16 AM UTC 24 |
| Finished | Sep 04 06:10:19 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1943423145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 493.usbdev_ tx_rx_disruption.1943423145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/493.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/494.usbdev_tx_rx_disruption.1354959190 |
| Short name | T3788 |
| Test name | |
| Test status | |
| Simulation time | 608952411 ps |
| CPU time | 1.63 seconds |
| Started | Sep 04 06:10:17 AM UTC 24 |
| Finished | Sep 04 06:10:19 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1354959190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 494.usbdev_ tx_rx_disruption.1354959190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/494.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/495.usbdev_tx_rx_disruption.1077383805 |
| Short name | T3785 |
| Test name | |
| Test status | |
| Simulation time | 602027831 ps |
| CPU time | 1.64 seconds |
| Started | Sep 04 06:10:17 AM UTC 24 |
| Finished | Sep 04 06:10:19 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1077383805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 495.usbdev_ tx_rx_disruption.1077383805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/495.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/496.usbdev_tx_rx_disruption.151128817 |
| Short name | T3783 |
| Test name | |
| Test status | |
| Simulation time | 479327828 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 06:10:17 AM UTC 24 |
| Finished | Sep 04 06:10:19 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=151128817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 496.usbdev_t x_rx_disruption.151128817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/496.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/497.usbdev_tx_rx_disruption.1737643736 |
| Short name | T3790 |
| Test name | |
| Test status | |
| Simulation time | 493502963 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 06:10:19 AM UTC 24 |
| Finished | Sep 04 06:10:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1737643736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 497.usbdev_ tx_rx_disruption.1737643736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/497.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/498.usbdev_tx_rx_disruption.2589911966 |
| Short name | T3789 |
| Test name | |
| Test status | |
| Simulation time | 575647991 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 06:10:19 AM UTC 24 |
| Finished | Sep 04 06:10:21 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2589911966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 498.usbdev_ tx_rx_disruption.2589911966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/498.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/499.usbdev_tx_rx_disruption.993814419 |
| Short name | T3791 |
| Test name | |
| Test status | |
| Simulation time | 557827217 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 06:10:19 AM UTC 24 |
| Finished | Sep 04 06:10:22 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=993814419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 499.usbdev_t x_rx_disruption.993814419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/499.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_alert_test.4224290792 |
| Short name | T809 |
| Test name | |
| Test status | |
| Simulation time | 39531592 ps |
| CPU time | 1.01 seconds |
| Started | Sep 04 05:46:55 AM UTC 24 |
| Finished | Sep 04 05:46:57 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4224290792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 5.usbdev_alert_test.4224290792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_disconnect.3531606941 |
| Short name | T779 |
| Test name | |
| Test status | |
| Simulation time | 10132070947 ps |
| CPU time | 22.15 seconds |
| Started | Sep 04 05:46:08 AM UTC 24 |
| Finished | Sep 04 05:46:31 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3531606941 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_disconnect.3531606941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_reset.1474835335 |
| Short name | T793 |
| Test name | |
| Test status | |
| Simulation time | 15898597627 ps |
| CPU time | 32.19 seconds |
| Started | Sep 04 05:46:08 AM UTC 24 |
| Finished | Sep 04 05:46:41 AM UTC 24 |
| Peak memory | 227668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1474835335 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_reset.1474835335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_resume.4122065849 |
| Short name | T822 |
| Test name | |
| Test status | |
| Simulation time | 30940454828 ps |
| CPU time | 58.26 seconds |
| Started | Sep 04 05:46:08 AM UTC 24 |
| Finished | Sep 04 05:47:08 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4122065849 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_resume.4122065849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_av_buffer.257752467 |
| Short name | T759 |
| Test name | |
| Test status | |
| Simulation time | 144804500 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 05:46:09 AM UTC 24 |
| Finished | Sep 04 05:46:11 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=257752467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_av_buffer.257752467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_bitstuff_err.221038400 |
| Short name | T760 |
| Test name | |
| Test status | |
| Simulation time | 138374509 ps |
| CPU time | 1.37 seconds |
| Started | Sep 04 05:46:09 AM UTC 24 |
| Finished | Sep 04 05:46:11 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=221038400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_bitstuff_err.221038400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_data_toggle_clear.849998234 |
| Short name | T763 |
| Test name | |
| Test status | |
| Simulation time | 321734088 ps |
| CPU time | 2.21 seconds |
| Started | Sep 04 05:46:12 AM UTC 24 |
| Finished | Sep 04 05:46:15 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=849998234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 5.usbdev_data_toggle_clear.849998234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_data_toggle_restore.2212871477 |
| Short name | T476 |
| Test name | |
| Test status | |
| Simulation time | 365812995 ps |
| CPU time | 2.21 seconds |
| Started | Sep 04 05:46:12 AM UTC 24 |
| Finished | Sep 04 05:46:15 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2212871477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_data_toggle_restore.2212871477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_device_timeout.3723171601 |
| Short name | T806 |
| Test name | |
| Test status | |
| Simulation time | 5009889706 ps |
| CPU time | 36.91 seconds |
| Started | Sep 04 05:46:13 AM UTC 24 |
| Finished | Sep 04 05:46:52 AM UTC 24 |
| Peak memory | 217428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3723171601 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_device_timeout.3723171601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_disable_endpoint.3004664819 |
| Short name | T769 |
| Test name | |
| Test status | |
| Simulation time | 1114170611 ps |
| CPU time | 4.18 seconds |
| Started | Sep 04 05:46:16 AM UTC 24 |
| Finished | Sep 04 05:46:21 AM UTC 24 |
| Peak memory | 217028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3004664819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 5.usbdev_disable_endpoint.3004664819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_disconnected.2378588404 |
| Short name | T767 |
| Test name | |
| Test status | |
| Simulation time | 158481458 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 05:46:16 AM UTC 24 |
| Finished | Sep 04 05:46:18 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2378588404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_disconnected.2378588404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_enable.3932411136 |
| Short name | T766 |
| Test name | |
| Test status | |
| Simulation time | 57887102 ps |
| CPU time | 1.08 seconds |
| Started | Sep 04 05:46:16 AM UTC 24 |
| Finished | Sep 04 05:46:18 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3932411136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 5.usbdev_enable.3932411136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_endpoint_access.3515556053 |
| Short name | T771 |
| Test name | |
| Test status | |
| Simulation time | 1117881715 ps |
| CPU time | 4.66 seconds |
| Started | Sep 04 05:46:18 AM UTC 24 |
| Finished | Sep 04 05:46:23 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3515556053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_endpoint_access.3515556053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_fifo_rst.2800335558 |
| Short name | T773 |
| Test name | |
| Test status | |
| Simulation time | 336459080 ps |
| CPU time | 3.18 seconds |
| Started | Sep 04 05:46:20 AM UTC 24 |
| Finished | Sep 04 05:46:24 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2800335558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_fifo_rst.2800335558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_in_iso.2640510952 |
| Short name | T774 |
| Test name | |
| Test status | |
| Simulation time | 247904420 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:46:24 AM UTC 24 |
| Finished | Sep 04 05:46:26 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2640510952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 5.usbdev_in_iso.2640510952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_in_stall.4162240567 |
| Short name | T776 |
| Test name | |
| Test status | |
| Simulation time | 147145189 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 05:46:24 AM UTC 24 |
| Finished | Sep 04 05:46:26 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4162240567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_in_stall.4162240567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_in_trans.1950225557 |
| Short name | T775 |
| Test name | |
| Test status | |
| Simulation time | 162790112 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 05:46:24 AM UTC 24 |
| Finished | Sep 04 05:46:26 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1950225557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_in_trans.1950225557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_invalid_sync.1698123813 |
| Short name | T813 |
| Test name | |
| Test status | |
| Simulation time | 3766065155 ps |
| CPU time | 36.98 seconds |
| Started | Sep 04 05:46:22 AM UTC 24 |
| Finished | Sep 04 05:47:01 AM UTC 24 |
| Peak memory | 234120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1698123813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 5.usbdev_invalid_sync.1698123813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_iso_retraction.1468020518 |
| Short name | T830 |
| Test name | |
| Test status | |
| Simulation time | 5409470837 ps |
| CPU time | 46.69 seconds |
| Started | Sep 04 05:46:25 AM UTC 24 |
| Finished | Sep 04 05:47:13 AM UTC 24 |
| Peak memory | 217384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1468020518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_iso_retraction.1468020518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_link_in_err.1322223564 |
| Short name | T777 |
| Test name | |
| Test status | |
| Simulation time | 209253331 ps |
| CPU time | 1.64 seconds |
| Started | Sep 04 05:46:25 AM UTC 24 |
| Finished | Sep 04 05:46:28 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1322223564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_link_in_err.1322223564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_link_resume.342253755 |
| Short name | T791 |
| Test name | |
| Test status | |
| Simulation time | 6835232348 ps |
| CPU time | 14.38 seconds |
| Started | Sep 04 05:46:25 AM UTC 24 |
| Finished | Sep 04 05:46:41 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=342253755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 5.usbdev_link_resume.342253755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_link_suspend.3047760352 |
| Short name | T788 |
| Test name | |
| Test status | |
| Simulation time | 5261640361 ps |
| CPU time | 8.6 seconds |
| Started | Sep 04 05:46:27 AM UTC 24 |
| Finished | Sep 04 05:46:38 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3047760352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_link_suspend.3047760352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_low_speed_traffic.2882753294 |
| Short name | T323 |
| Test name | |
| Test status | |
| Simulation time | 4318376698 ps |
| CPU time | 48.58 seconds |
| Started | Sep 04 05:46:27 AM UTC 24 |
| Finished | Sep 04 05:47:18 AM UTC 24 |
| Peak memory | 229720 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2882753294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_low_speed_traffic.2882753294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_max_inter_pkt_delay.3119147639 |
| Short name | T864 |
| Test name | |
| Test status | |
| Simulation time | 2362315999 ps |
| CPU time | 72.19 seconds |
| Started | Sep 04 05:46:27 AM UTC 24 |
| Finished | Sep 04 05:47:42 AM UTC 24 |
| Peak memory | 227628 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3119147639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_inter_pkt_delay.3119147639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_max_length_in_transaction.779112999 |
| Short name | T780 |
| Test name | |
| Test status | |
| Simulation time | 245167928 ps |
| CPU time | 1.77 seconds |
| Started | Sep 04 05:46:28 AM UTC 24 |
| Finished | Sep 04 05:46:32 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=779112999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 5.usbdev_max_length_in_transaction.779112999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_max_length_out_transaction.3866343467 |
| Short name | T783 |
| Test name | |
| Test status | |
| Simulation time | 205470949 ps |
| CPU time | 1.66 seconds |
| Started | Sep 04 05:46:30 AM UTC 24 |
| Finished | Sep 04 05:46:33 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3866343467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 5.usbdev_max_length_out_transaction.3866343467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_max_non_iso_usb_traffic.23939840 |
| Short name | T814 |
| Test name | |
| Test status | |
| Simulation time | 3304177168 ps |
| CPU time | 29.08 seconds |
| Started | Sep 04 05:46:31 AM UTC 24 |
| Finished | Sep 04 05:47:01 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=23939840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 5.usbdev_max_non_iso_usb_traffic.23939840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_max_usb_traffic.2677201988 |
| Short name | T819 |
| Test name | |
| Test status | |
| Simulation time | 2290656697 ps |
| CPU time | 33.01 seconds |
| Started | Sep 04 05:46:32 AM UTC 24 |
| Finished | Sep 04 05:47:07 AM UTC 24 |
| Peak memory | 229516 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2677201988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_usb_traffic.2677201988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_min_inter_pkt_delay.2550191104 |
| Short name | T807 |
| Test name | |
| Test status | |
| Simulation time | 2361900781 ps |
| CPU time | 19.42 seconds |
| Started | Sep 04 05:46:33 AM UTC 24 |
| Finished | Sep 04 05:46:54 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2550191104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_min_inter_pkt_delay.2550191104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_min_length_in_transaction.1902054790 |
| Short name | T786 |
| Test name | |
| Test status | |
| Simulation time | 147877283 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 05:46:33 AM UTC 24 |
| Finished | Sep 04 05:46:35 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1902054790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 5.usbdev_min_length_in_transaction.1902054790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_min_length_out_transaction.2162312921 |
| Short name | T754 |
| Test name | |
| Test status | |
| Simulation time | 142165653 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 05:46:33 AM UTC 24 |
| Finished | Sep 04 05:46:36 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2162312921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 5.usbdev_min_length_out_transaction.2162312921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_out_iso.3199497453 |
| Short name | T787 |
| Test name | |
| Test status | |
| Simulation time | 188617706 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 05:46:37 AM UTC 24 |
| Finished | Sep 04 05:46:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3199497453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_out_iso.3199497453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_out_stall.2225240406 |
| Short name | T789 |
| Test name | |
| Test status | |
| Simulation time | 199820955 ps |
| CPU time | 1.57 seconds |
| Started | Sep 04 05:46:37 AM UTC 24 |
| Finished | Sep 04 05:46:39 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2225240406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_out_stall.2225240406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_out_trans_nak.2106288466 |
| Short name | T475 |
| Test name | |
| Test status | |
| Simulation time | 177543010 ps |
| CPU time | 1.29 seconds |
| Started | Sep 04 05:46:37 AM UTC 24 |
| Finished | Sep 04 05:46:39 AM UTC 24 |
| Peak memory | 214752 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2106288466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 5.usbdev_out_trans_nak.2106288466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_pending_in_trans.4084693407 |
| Short name | T790 |
| Test name | |
| Test status | |
| Simulation time | 160810617 ps |
| CPU time | 1.37 seconds |
| Started | Sep 04 05:46:37 AM UTC 24 |
| Finished | Sep 04 05:46:39 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4084693407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 5.usbdev_pending_in_trans.4084693407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_phy_config_pinflip.4086287814 |
| Short name | T792 |
| Test name | |
| Test status | |
| Simulation time | 236461322 ps |
| CPU time | 1.75 seconds |
| Started | Sep 04 05:46:38 AM UTC 24 |
| Finished | Sep 04 05:46:41 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4086287814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_phy_config_pinflip.4086287814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_phy_config_usb_ref_disable.1103798351 |
| Short name | T794 |
| Test name | |
| Test status | |
| Simulation time | 151855234 ps |
| CPU time | 1.07 seconds |
| Started | Sep 04 05:46:39 AM UTC 24 |
| Finished | Sep 04 05:46:41 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1103798351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 5.usbdev_phy_config_usb_ref_disable.1103798351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_phy_pins_sense.1186584188 |
| Short name | T38 |
| Test name | |
| Test status | |
| Simulation time | 32889177 ps |
| CPU time | 1.09 seconds |
| Started | Sep 04 05:46:41 AM UTC 24 |
| Finished | Sep 04 05:46:44 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1186584188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_phy_pins_sense.1186584188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_buffer.475994940 |
| Short name | T253 |
| Test name | |
| Test status | |
| Simulation time | 22467149187 ps |
| CPU time | 70.91 seconds |
| Started | Sep 04 05:46:41 AM UTC 24 |
| Finished | Sep 04 05:47:54 AM UTC 24 |
| Peak memory | 234224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=475994940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_pkt_buffer.475994940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_received.789124565 |
| Short name | T797 |
| Test name | |
| Test status | |
| Simulation time | 195097310 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 05:46:41 AM UTC 24 |
| Finished | Sep 04 05:46:44 AM UTC 24 |
| Peak memory | 215016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=789124565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_pkt_received.789124565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_sent.708077682 |
| Short name | T756 |
| Test name | |
| Test status | |
| Simulation time | 207984422 ps |
| CPU time | 1.61 seconds |
| Started | Sep 04 05:46:41 AM UTC 24 |
| Finished | Sep 04 05:46:44 AM UTC 24 |
| Peak memory | 214984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=708077682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_pkt_sent.708077682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_rand_bus_disconnects.4260870185 |
| Short name | T902 |
| Test name | |
| Test status | |
| Simulation time | 3198266659 ps |
| CPU time | 95.26 seconds |
| Started | Sep 04 05:46:43 AM UTC 24 |
| Finished | Sep 04 05:48:20 AM UTC 24 |
| Peak memory | 229716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4260870185 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_bus_disconnects.4260870185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_rand_bus_resets.4120305467 |
| Short name | T165 |
| Test name | |
| Test status | |
| Simulation time | 3985890117 ps |
| CPU time | 102.56 seconds |
| Started | Sep 04 05:46:43 AM UTC 24 |
| Finished | Sep 04 05:48:28 AM UTC 24 |
| Peak memory | 229584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4120305467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_bus_resets.4120305467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_rand_suspends.438307019 |
| Short name | T817 |
| Test name | |
| Test status | |
| Simulation time | 5768387307 ps |
| CPU time | 19.75 seconds |
| Started | Sep 04 05:46:43 AM UTC 24 |
| Finished | Sep 04 05:47:04 AM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=438307019 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_suspends.438307019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_random_length_in_transaction.4198052001 |
| Short name | T796 |
| Test name | |
| Test status | |
| Simulation time | 241900860 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 05:46:41 AM UTC 24 |
| Finished | Sep 04 05:46:44 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4198052001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 5.usbdev_random_length_in_transaction.4198052001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_random_length_out_transaction.3346939151 |
| Short name | T795 |
| Test name | |
| Test status | |
| Simulation time | 198612469 ps |
| CPU time | 1.13 seconds |
| Started | Sep 04 05:46:42 AM UTC 24 |
| Finished | Sep 04 05:46:44 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3346939151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 5.usbdev_random_length_out_transaction.3346939151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_resume_link_active.2737359150 |
| Short name | T835 |
| Test name | |
| Test status | |
| Simulation time | 20222722614 ps |
| CPU time | 31.7 seconds |
| Started | Sep 04 05:46:44 AM UTC 24 |
| Finished | Sep 04 05:47:17 AM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2737359150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 5.usbdev_resume_link_active.2737359150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_rx_crc_err.459551847 |
| Short name | T799 |
| Test name | |
| Test status | |
| Simulation time | 217689368 ps |
| CPU time | 1.61 seconds |
| Started | Sep 04 05:46:45 AM UTC 24 |
| Finished | Sep 04 05:46:48 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=459551847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_rx_crc_err.459551847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_rx_full.1159806446 |
| Short name | T801 |
| Test name | |
| Test status | |
| Simulation time | 347212370 ps |
| CPU time | 2.12 seconds |
| Started | Sep 04 05:46:45 AM UTC 24 |
| Finished | Sep 04 05:46:49 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1159806446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_rx_full.1159806446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_setup_stage.3334414357 |
| Short name | T798 |
| Test name | |
| Test status | |
| Simulation time | 150221853 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 05:46:45 AM UTC 24 |
| Finished | Sep 04 05:46:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3334414357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_setup_stage.3334414357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_setup_trans_ignored.921708107 |
| Short name | T800 |
| Test name | |
| Test status | |
| Simulation time | 178644515 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 05:46:45 AM UTC 24 |
| Finished | Sep 04 05:46:48 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=921708107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 5.usbdev_setup_trans_ignored.921708107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_smoke.2968649877 |
| Short name | T805 |
| Test name | |
| Test status | |
| Simulation time | 228432777 ps |
| CPU time | 1.66 seconds |
| Started | Sep 04 05:46:49 AM UTC 24 |
| Finished | Sep 04 05:46:52 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2968649877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_smoke.2968649877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_spurious_pids_ignored.3183943462 |
| Short name | T893 |
| Test name | |
| Test status | |
| Simulation time | 2556511709 ps |
| CPU time | 81.58 seconds |
| Started | Sep 04 05:46:49 AM UTC 24 |
| Finished | Sep 04 05:48:12 AM UTC 24 |
| Peak memory | 234180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3183943462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 5.usbdev_spurious_pids_ignored.3183943462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_stall_priority_over_nak.2421648200 |
| Short name | T803 |
| Test name | |
| Test status | |
| Simulation time | 139680234 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 05:46:49 AM UTC 24 |
| Finished | Sep 04 05:46:52 AM UTC 24 |
| Peak memory | 214880 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2421648200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stall_priority_over_nak.2421648200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_stall_trans.4139498269 |
| Short name | T804 |
| Test name | |
| Test status | |
| Simulation time | 170040877 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 05:46:49 AM UTC 24 |
| Finished | Sep 04 05:46:52 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4139498269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_stall_trans.4139498269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_stream_len_max.1251816894 |
| Short name | T808 |
| Test name | |
| Test status | |
| Simulation time | 1068246253 ps |
| CPU time | 2.85 seconds |
| Started | Sep 04 05:46:50 AM UTC 24 |
| Finished | Sep 04 05:46:54 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1251816894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stream_len_max.1251816894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_streaming_out.3329637607 |
| Short name | T878 |
| Test name | |
| Test status | |
| Simulation time | 2624010548 ps |
| CPU time | 68.53 seconds |
| Started | Sep 04 05:46:50 AM UTC 24 |
| Finished | Sep 04 05:48:00 AM UTC 24 |
| Peak memory | 229712 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3329637607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_streaming_out.3329637607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_stress_usb_traffic.463559933 |
| Short name | T190 |
| Test name | |
| Test status | |
| Simulation time | 12569649178 ps |
| CPU time | 91.84 seconds |
| Started | Sep 04 05:46:53 AM UTC 24 |
| Finished | Sep 04 05:48:27 AM UTC 24 |
| Peak memory | 229668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=463559933 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_0 3/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stress_usb_traffic.463559933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_timeout_missing_host_handshake.159923045 |
| Short name | T778 |
| Test name | |
| Test status | |
| Simulation time | 1519490519 ps |
| CPU time | 12.71 seconds |
| Started | Sep 04 05:46:15 AM UTC 24 |
| Finished | Sep 04 05:46:28 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=159923045 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_timeout_missing_host_handshake.159923045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/5.usbdev_tx_rx_disruption.4205462711 |
| Short name | T179 |
| Test name | |
| Test status | |
| Simulation time | 629139789 ps |
| CPU time | 3.14 seconds |
| Started | Sep 04 05:46:53 AM UTC 24 |
| Finished | Sep 04 05:46:57 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4205462711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_tx _rx_disruption.4205462711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/5.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/50.usbdev_endpoint_types.3093614609 |
| Short name | T406 |
| Test name | |
| Test status | |
| Simulation time | 562526764 ps |
| CPU time | 1.64 seconds |
| Started | Sep 04 06:07:31 AM UTC 24 |
| Finished | Sep 04 06:07:34 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3093614609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 50.usbdev_endpoint_types.3093614609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/50.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/50.usbdev_fifo_levels.3497890530 |
| Short name | T3214 |
| Test name | |
| Test status | |
| Simulation time | 344415330 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 06:07:31 AM UTC 24 |
| Finished | Sep 04 06:07:34 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3497890530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 50.usbdev_fifo_levels.3497890530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/50.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/50.usbdev_tx_rx_disruption.3584231427 |
| Short name | T3220 |
| Test name | |
| Test status | |
| Simulation time | 632223729 ps |
| CPU time | 3.13 seconds |
| Started | Sep 04 06:07:33 AM UTC 24 |
| Finished | Sep 04 06:07:37 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3584231427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 50.usbdev_t x_rx_disruption.3584231427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/50.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/51.usbdev_endpoint_types.3118481207 |
| Short name | T305 |
| Test name | |
| Test status | |
| Simulation time | 673941980 ps |
| CPU time | 3.38 seconds |
| Started | Sep 04 06:07:33 AM UTC 24 |
| Finished | Sep 04 06:07:37 AM UTC 24 |
| Peak memory | 217040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3118481207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 51.usbdev_endpoint_types.3118481207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/51.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/51.usbdev_fifo_levels.360975073 |
| Short name | T508 |
| Test name | |
| Test status | |
| Simulation time | 250040103 ps |
| CPU time | 1.75 seconds |
| Started | Sep 04 06:07:33 AM UTC 24 |
| Finished | Sep 04 06:07:36 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=360975073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 51.usbdev_fifo_levels.360975073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/51.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/51.usbdev_tx_rx_disruption.1060306348 |
| Short name | T3218 |
| Test name | |
| Test status | |
| Simulation time | 622310466 ps |
| CPU time | 1.8 seconds |
| Started | Sep 04 06:07:33 AM UTC 24 |
| Finished | Sep 04 06:07:36 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1060306348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 51.usbdev_t x_rx_disruption.1060306348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/51.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/52.usbdev_endpoint_types.1923200242 |
| Short name | T386 |
| Test name | |
| Test status | |
| Simulation time | 606404120 ps |
| CPU time | 2.71 seconds |
| Started | Sep 04 06:07:33 AM UTC 24 |
| Finished | Sep 04 06:07:37 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1923200242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 52.usbdev_endpoint_types.1923200242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/52.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/52.usbdev_fifo_levels.3138404150 |
| Short name | T580 |
| Test name | |
| Test status | |
| Simulation time | 247914182 ps |
| CPU time | 1.7 seconds |
| Started | Sep 04 06:07:33 AM UTC 24 |
| Finished | Sep 04 06:07:36 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3138404150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 52.usbdev_fifo_levels.3138404150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/52.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/52.usbdev_tx_rx_disruption.3493744186 |
| Short name | T3221 |
| Test name | |
| Test status | |
| Simulation time | 546968159 ps |
| CPU time | 3.01 seconds |
| Started | Sep 04 06:07:33 AM UTC 24 |
| Finished | Sep 04 06:07:37 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3493744186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 52.usbdev_t x_rx_disruption.3493744186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/52.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/53.usbdev_endpoint_types.4106672021 |
| Short name | T3216 |
| Test name | |
| Test status | |
| Simulation time | 225549535 ps |
| CPU time | 1.18 seconds |
| Started | Sep 04 06:07:33 AM UTC 24 |
| Finished | Sep 04 06:07:35 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4106672021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 53.usbdev_endpoint_types.4106672021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/53.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/53.usbdev_fifo_levels.3995219892 |
| Short name | T3219 |
| Test name | |
| Test status | |
| Simulation time | 171900149 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 06:07:34 AM UTC 24 |
| Finished | Sep 04 06:07:37 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3995219892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 53.usbdev_fifo_levels.3995219892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/53.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/53.usbdev_tx_rx_disruption.3034459237 |
| Short name | T3222 |
| Test name | |
| Test status | |
| Simulation time | 518920540 ps |
| CPU time | 2.83 seconds |
| Started | Sep 04 06:07:34 AM UTC 24 |
| Finished | Sep 04 06:07:38 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3034459237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 53.usbdev_t x_rx_disruption.3034459237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/53.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/54.usbdev_fifo_levels.2537806709 |
| Short name | T573 |
| Test name | |
| Test status | |
| Simulation time | 256820792 ps |
| CPU time | 1.81 seconds |
| Started | Sep 04 06:07:36 AM UTC 24 |
| Finished | Sep 04 06:07:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2537806709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 54.usbdev_fifo_levels.2537806709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/54.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/54.usbdev_tx_rx_disruption.2959813728 |
| Short name | T3223 |
| Test name | |
| Test status | |
| Simulation time | 490573206 ps |
| CPU time | 1.72 seconds |
| Started | Sep 04 06:07:36 AM UTC 24 |
| Finished | Sep 04 06:07:39 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2959813728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 54.usbdev_t x_rx_disruption.2959813728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/54.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/55.usbdev_endpoint_types.3404486428 |
| Short name | T316 |
| Test name | |
| Test status | |
| Simulation time | 319774049 ps |
| CPU time | 1.3 seconds |
| Started | Sep 04 06:07:36 AM UTC 24 |
| Finished | Sep 04 06:07:38 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3404486428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 55.usbdev_endpoint_types.3404486428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/55.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/55.usbdev_tx_rx_disruption.2693994224 |
| Short name | T3227 |
| Test name | |
| Test status | |
| Simulation time | 564489313 ps |
| CPU time | 3.07 seconds |
| Started | Sep 04 06:07:37 AM UTC 24 |
| Finished | Sep 04 06:07:41 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2693994224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 55.usbdev_t x_rx_disruption.2693994224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/55.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/56.usbdev_endpoint_types.200049462 |
| Short name | T310 |
| Test name | |
| Test status | |
| Simulation time | 721047280 ps |
| CPU time | 2.57 seconds |
| Started | Sep 04 06:07:37 AM UTC 24 |
| Finished | Sep 04 06:07:41 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=200049462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 56.usbdev_endpoint_types.200049462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/56.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/56.usbdev_tx_rx_disruption.3412459111 |
| Short name | T3226 |
| Test name | |
| Test status | |
| Simulation time | 470159822 ps |
| CPU time | 2.03 seconds |
| Started | Sep 04 06:07:37 AM UTC 24 |
| Finished | Sep 04 06:07:40 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3412459111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 56.usbdev_t x_rx_disruption.3412459111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/56.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/57.usbdev_endpoint_types.3943023926 |
| Short name | T438 |
| Test name | |
| Test status | |
| Simulation time | 198930187 ps |
| CPU time | 1.12 seconds |
| Started | Sep 04 06:07:38 AM UTC 24 |
| Finished | Sep 04 06:07:40 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3943023926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 57.usbdev_endpoint_types.3943023926 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/57.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/57.usbdev_tx_rx_disruption.2942605645 |
| Short name | T3231 |
| Test name | |
| Test status | |
| Simulation time | 513491754 ps |
| CPU time | 2.65 seconds |
| Started | Sep 04 06:07:39 AM UTC 24 |
| Finished | Sep 04 06:07:43 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2942605645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 57.usbdev_t x_rx_disruption.2942605645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/57.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/58.usbdev_fifo_levels.1674065 |
| Short name | T538 |
| Test name | |
| Test status | |
| Simulation time | 294659394 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 06:07:39 AM UTC 24 |
| Finished | Sep 04 06:07:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1674065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 58.usbdev_fifo_levels.1674065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/58.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/58.usbdev_tx_rx_disruption.549466109 |
| Short name | T3230 |
| Test name | |
| Test status | |
| Simulation time | 569567711 ps |
| CPU time | 2.25 seconds |
| Started | Sep 04 06:07:39 AM UTC 24 |
| Finished | Sep 04 06:07:42 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=549466109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 58.usbdev_tx _rx_disruption.549466109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/58.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/59.usbdev_endpoint_types.2508629966 |
| Short name | T420 |
| Test name | |
| Test status | |
| Simulation time | 154202472 ps |
| CPU time | 1.32 seconds |
| Started | Sep 04 06:07:39 AM UTC 24 |
| Finished | Sep 04 06:07:42 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2508629966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 59.usbdev_endpoint_types.2508629966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/59.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/59.usbdev_fifo_levels.1543356864 |
| Short name | T581 |
| Test name | |
| Test status | |
| Simulation time | 274386623 ps |
| CPU time | 1.8 seconds |
| Started | Sep 04 06:07:39 AM UTC 24 |
| Finished | Sep 04 06:07:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1543356864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 59.usbdev_fifo_levels.1543356864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/59.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/59.usbdev_tx_rx_disruption.3106475051 |
| Short name | T3228 |
| Test name | |
| Test status | |
| Simulation time | 496608797 ps |
| CPU time | 2.04 seconds |
| Started | Sep 04 06:07:39 AM UTC 24 |
| Finished | Sep 04 06:07:42 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3106475051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 59.usbdev_t x_rx_disruption.3106475051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/59.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_alert_test.3541310889 |
| Short name | T866 |
| Test name | |
| Test status | |
| Simulation time | 44281440 ps |
| CPU time | 1.03 seconds |
| Started | Sep 04 05:47:42 AM UTC 24 |
| Finished | Sep 04 05:47:44 AM UTC 24 |
| Peak memory | 216844 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3541310889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 6.usbdev_alert_test.3541310889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_disconnect.2893908949 |
| Short name | T825 |
| Test name | |
| Test status | |
| Simulation time | 6352548725 ps |
| CPU time | 13.69 seconds |
| Started | Sep 04 05:46:55 AM UTC 24 |
| Finished | Sep 04 05:47:10 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2893908949 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_disconnect.2893908949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_reset.644845764 |
| Short name | T863 |
| Test name | |
| Test status | |
| Simulation time | 19113632245 ps |
| CPU time | 44.14 seconds |
| Started | Sep 04 05:46:55 AM UTC 24 |
| Finished | Sep 04 05:47:41 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=644845764 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_reset.644845764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_resume.2311067659 |
| Short name | T862 |
| Test name | |
| Test status | |
| Simulation time | 28628413964 ps |
| CPU time | 43.14 seconds |
| Started | Sep 04 05:46:55 AM UTC 24 |
| Finished | Sep 04 05:47:40 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2311067659 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_resume.2311067659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_av_buffer.1314733828 |
| Short name | T811 |
| Test name | |
| Test status | |
| Simulation time | 206031632 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 05:46:58 AM UTC 24 |
| Finished | Sep 04 05:47:00 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1314733828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_av_buffer.1314733828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_bitstuff_err.3777008322 |
| Short name | T810 |
| Test name | |
| Test status | |
| Simulation time | 146440720 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:46:58 AM UTC 24 |
| Finished | Sep 04 05:47:00 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3777008322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_bitstuff_err.3777008322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_data_toggle_clear.550334885 |
| Short name | T816 |
| Test name | |
| Test status | |
| Simulation time | 325097885 ps |
| CPU time | 1.87 seconds |
| Started | Sep 04 05:47:01 AM UTC 24 |
| Finished | Sep 04 05:47:04 AM UTC 24 |
| Peak memory | 214984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=550334885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 6.usbdev_data_toggle_clear.550334885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_data_toggle_restore.1823390053 |
| Short name | T486 |
| Test name | |
| Test status | |
| Simulation time | 551550543 ps |
| CPU time | 2.18 seconds |
| Started | Sep 04 05:47:01 AM UTC 24 |
| Finished | Sep 04 05:47:04 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1823390053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_data_toggle_restore.1823390053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_device_address.344185501 |
| Short name | T456 |
| Test name | |
| Test status | |
| Simulation time | 47855057870 ps |
| CPU time | 71.19 seconds |
| Started | Sep 04 05:47:01 AM UTC 24 |
| Finished | Sep 04 05:48:14 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=344185501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 6.usbdev_device_address.344185501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_device_timeout.4234413742 |
| Short name | T845 |
| Test name | |
| Test status | |
| Simulation time | 2945817810 ps |
| CPU time | 21.69 seconds |
| Started | Sep 04 05:47:02 AM UTC 24 |
| Finished | Sep 04 05:47:25 AM UTC 24 |
| Peak memory | 217388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4234413742 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_device_timeout.4234413742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_disable_endpoint.2405997034 |
| Short name | T823 |
| Test name | |
| Test status | |
| Simulation time | 784462273 ps |
| CPU time | 2.75 seconds |
| Started | Sep 04 05:47:05 AM UTC 24 |
| Finished | Sep 04 05:47:09 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2405997034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 6.usbdev_disable_endpoint.2405997034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_disconnected.2389299516 |
| Short name | T821 |
| Test name | |
| Test status | |
| Simulation time | 172179315 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 05:47:05 AM UTC 24 |
| Finished | Sep 04 05:47:07 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2389299516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_disconnected.2389299516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_enable.1656982927 |
| Short name | T820 |
| Test name | |
| Test status | |
| Simulation time | 36747321 ps |
| CPU time | 1.12 seconds |
| Started | Sep 04 05:47:05 AM UTC 24 |
| Finished | Sep 04 05:47:07 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1656982927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 6.usbdev_enable.1656982927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_endpoint_access.227649510 |
| Short name | T824 |
| Test name | |
| Test status | |
| Simulation time | 795469225 ps |
| CPU time | 2.82 seconds |
| Started | Sep 04 05:47:05 AM UTC 24 |
| Finished | Sep 04 05:47:09 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=227649510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_endpoint_access.227649510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_fifo_rst.1518677822 |
| Short name | T831 |
| Test name | |
| Test status | |
| Simulation time | 533375695 ps |
| CPU time | 5.07 seconds |
| Started | Sep 04 05:47:08 AM UTC 24 |
| Finished | Sep 04 05:47:14 AM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1518677822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_fifo_rst.1518677822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_in_iso.4231604184 |
| Short name | T826 |
| Test name | |
| Test status | |
| Simulation time | 166317217 ps |
| CPU time | 1.01 seconds |
| Started | Sep 04 05:47:10 AM UTC 24 |
| Finished | Sep 04 05:47:12 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4231604184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 6.usbdev_in_iso.4231604184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_in_stall.751226144 |
| Short name | T827 |
| Test name | |
| Test status | |
| Simulation time | 144787094 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 05:47:10 AM UTC 24 |
| Finished | Sep 04 05:47:12 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=751226144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_in_stall.751226144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_in_trans.1693490821 |
| Short name | T829 |
| Test name | |
| Test status | |
| Simulation time | 197612982 ps |
| CPU time | 1.1 seconds |
| Started | Sep 04 05:47:11 AM UTC 24 |
| Finished | Sep 04 05:47:13 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1693490821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_in_trans.1693490821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_invalid_sync.1407233758 |
| Short name | T455 |
| Test name | |
| Test status | |
| Simulation time | 3594667087 ps |
| CPU time | 35.9 seconds |
| Started | Sep 04 05:47:08 AM UTC 24 |
| Finished | Sep 04 05:47:46 AM UTC 24 |
| Peak memory | 234272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1407233758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 6.usbdev_invalid_sync.1407233758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_iso_retraction.3639703214 |
| Short name | T900 |
| Test name | |
| Test status | |
| Simulation time | 4967559766 ps |
| CPU time | 64.59 seconds |
| Started | Sep 04 05:47:12 AM UTC 24 |
| Finished | Sep 04 05:48:18 AM UTC 24 |
| Peak memory | 217060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3639703214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_iso_retraction.3639703214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_link_in_err.2553228225 |
| Short name | T832 |
| Test name | |
| Test status | |
| Simulation time | 244400556 ps |
| CPU time | 1.65 seconds |
| Started | Sep 04 05:47:12 AM UTC 24 |
| Finished | Sep 04 05:47:15 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2553228225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_link_in_err.2553228225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_link_resume.3987944451 |
| Short name | T99 |
| Test name | |
| Test status | |
| Simulation time | 14185114172 ps |
| CPU time | 46.74 seconds |
| Started | Sep 04 05:47:12 AM UTC 24 |
| Finished | Sep 04 05:48:00 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3987944451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_link_resume.3987944451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_link_suspend.1980417546 |
| Short name | T844 |
| Test name | |
| Test status | |
| Simulation time | 3480234279 ps |
| CPU time | 9.49 seconds |
| Started | Sep 04 05:47:14 AM UTC 24 |
| Finished | Sep 04 05:47:25 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1980417546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_link_suspend.1980417546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_low_speed_traffic.2253258756 |
| Short name | T928 |
| Test name | |
| Test status | |
| Simulation time | 2719660463 ps |
| CPU time | 81.76 seconds |
| Started | Sep 04 05:47:14 AM UTC 24 |
| Finished | Sep 04 05:48:38 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2253258756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_low_speed_traffic.2253258756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_max_inter_pkt_delay.2504182255 |
| Short name | T854 |
| Test name | |
| Test status | |
| Simulation time | 1307482435 ps |
| CPU time | 15.35 seconds |
| Started | Sep 04 05:47:14 AM UTC 24 |
| Finished | Sep 04 05:47:31 AM UTC 24 |
| Peak memory | 227408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2504182255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_inter_pkt_delay.2504182255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_max_length_in_transaction.2578737118 |
| Short name | T834 |
| Test name | |
| Test status | |
| Simulation time | 251166108 ps |
| CPU time | 1.76 seconds |
| Started | Sep 04 05:47:14 AM UTC 24 |
| Finished | Sep 04 05:47:17 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2578737118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 6.usbdev_max_length_in_transaction.2578737118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_max_length_out_transaction.1445205522 |
| Short name | T837 |
| Test name | |
| Test status | |
| Simulation time | 188858690 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 05:47:16 AM UTC 24 |
| Finished | Sep 04 05:47:19 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1445205522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 6.usbdev_max_length_out_transaction.1445205522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_max_non_iso_usb_traffic.729436454 |
| Short name | T886 |
| Test name | |
| Test status | |
| Simulation time | 1926547431 ps |
| CPU time | 49.96 seconds |
| Started | Sep 04 05:47:16 AM UTC 24 |
| Finished | Sep 04 05:48:08 AM UTC 24 |
| Peak memory | 234056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=729436454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_non_iso_usb_traffic.729436454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_max_usb_traffic.1184276043 |
| Short name | T956 |
| Test name | |
| Test status | |
| Simulation time | 2702348650 ps |
| CPU time | 97.57 seconds |
| Started | Sep 04 05:47:16 AM UTC 24 |
| Finished | Sep 04 05:48:56 AM UTC 24 |
| Peak memory | 229592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1184276043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_usb_traffic.1184276043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_min_inter_pkt_delay.631848851 |
| Short name | T868 |
| Test name | |
| Test status | |
| Simulation time | 3073623716 ps |
| CPU time | 27.58 seconds |
| Started | Sep 04 05:47:17 AM UTC 24 |
| Finished | Sep 04 05:47:46 AM UTC 24 |
| Peak memory | 227604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=631848851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_min_inter_pkt_delay.631848851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_min_length_in_transaction.137468282 |
| Short name | T839 |
| Test name | |
| Test status | |
| Simulation time | 183415041 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 05:47:20 AM UTC 24 |
| Finished | Sep 04 05:47:22 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=137468282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 6.usbdev_min_length_in_transaction.137468282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_min_length_out_transaction.4120641259 |
| Short name | T840 |
| Test name | |
| Test status | |
| Simulation time | 183349884 ps |
| CPU time | 1.54 seconds |
| Started | Sep 04 05:47:20 AM UTC 24 |
| Finished | Sep 04 05:47:23 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4120641259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 6.usbdev_min_length_out_transaction.4120641259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_nak_trans.759364574 |
| Short name | T131 |
| Test name | |
| Test status | |
| Simulation time | 207423599 ps |
| CPU time | 1.62 seconds |
| Started | Sep 04 05:47:20 AM UTC 24 |
| Finished | Sep 04 05:47:23 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=759364574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_nak_trans.759364574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_out_iso.3170396630 |
| Short name | T841 |
| Test name | |
| Test status | |
| Simulation time | 190338754 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 05:47:20 AM UTC 24 |
| Finished | Sep 04 05:47:23 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3170396630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_out_iso.3170396630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_out_stall.4152796398 |
| Short name | T843 |
| Test name | |
| Test status | |
| Simulation time | 183698920 ps |
| CPU time | 1.61 seconds |
| Started | Sep 04 05:47:21 AM UTC 24 |
| Finished | Sep 04 05:47:24 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4152796398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_out_stall.4152796398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_out_trans_nak.172082037 |
| Short name | T470 |
| Test name | |
| Test status | |
| Simulation time | 175393305 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 05:47:24 AM UTC 24 |
| Finished | Sep 04 05:47:26 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=172082037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_out_trans_nak.172082037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_pending_in_trans.2377934817 |
| Short name | T846 |
| Test name | |
| Test status | |
| Simulation time | 154379847 ps |
| CPU time | 1.36 seconds |
| Started | Sep 04 05:47:24 AM UTC 24 |
| Finished | Sep 04 05:47:26 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2377934817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 6.usbdev_pending_in_trans.2377934817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_phy_config_pinflip.17212076 |
| Short name | T848 |
| Test name | |
| Test status | |
| Simulation time | 329167735 ps |
| CPU time | 2.06 seconds |
| Started | Sep 04 05:47:24 AM UTC 24 |
| Finished | Sep 04 05:47:27 AM UTC 24 |
| Peak memory | 216936 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=17212076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_p inflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 6.usbdev_phy_config_pinflip.17212076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_phy_config_usb_ref_disable.260881720 |
| Short name | T847 |
| Test name | |
| Test status | |
| Simulation time | 154763723 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 05:47:24 AM UTC 24 |
| Finished | Sep 04 05:47:26 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=260881720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 6.usbdev_phy_config_usb_ref_disable.260881720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_phy_pins_sense.1815857923 |
| Short name | T849 |
| Test name | |
| Test status | |
| Simulation time | 56190642 ps |
| CPU time | 1.17 seconds |
| Started | Sep 04 05:47:26 AM UTC 24 |
| Finished | Sep 04 05:47:28 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1815857923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_phy_pins_sense.1815857923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_buffer.2360335014 |
| Short name | T459 |
| Test name | |
| Test status | |
| Simulation time | 19939379175 ps |
| CPU time | 73.67 seconds |
| Started | Sep 04 05:47:26 AM UTC 24 |
| Finished | Sep 04 05:48:41 AM UTC 24 |
| Peak memory | 227600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2360335014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 6.usbdev_pkt_buffer.2360335014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_received.385234506 |
| Short name | T850 |
| Test name | |
| Test status | |
| Simulation time | 189163319 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 05:47:26 AM UTC 24 |
| Finished | Sep 04 05:47:28 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=385234506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_pkt_received.385234506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_sent.1385149583 |
| Short name | T852 |
| Test name | |
| Test status | |
| Simulation time | 181850413 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 05:47:27 AM UTC 24 |
| Finished | Sep 04 05:47:29 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1385149583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_pkt_sent.1385149583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_rand_bus_disconnects.412528295 |
| Short name | T173 |
| Test name | |
| Test status | |
| Simulation time | 8037829449 ps |
| CPU time | 78.17 seconds |
| Started | Sep 04 05:47:27 AM UTC 24 |
| Finished | Sep 04 05:48:47 AM UTC 24 |
| Peak memory | 234172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=412528295 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_bus_disconnects.412528295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_rand_bus_resets.651635473 |
| Short name | T171 |
| Test name | |
| Test status | |
| Simulation time | 2620565007 ps |
| CPU time | 24.39 seconds |
| Started | Sep 04 05:47:28 AM UTC 24 |
| Finished | Sep 04 05:47:54 AM UTC 24 |
| Peak memory | 229660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=651635473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_b us_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_bus_resets.651635473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_rand_suspends.939344648 |
| Short name | T961 |
| Test name | |
| Test status | |
| Simulation time | 14642957658 ps |
| CPU time | 88.48 seconds |
| Started | Sep 04 05:47:28 AM UTC 24 |
| Finished | Sep 04 05:48:59 AM UTC 24 |
| Peak memory | 229656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=939344648 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_suspends.939344648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_random_length_in_transaction.445086409 |
| Short name | T851 |
| Test name | |
| Test status | |
| Simulation time | 152832388 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 05:47:27 AM UTC 24 |
| Finished | Sep 04 05:47:29 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=445086409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_random_length_in_transaction.445086409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_random_length_out_transaction.3301840068 |
| Short name | T853 |
| Test name | |
| Test status | |
| Simulation time | 181633977 ps |
| CPU time | 1.62 seconds |
| Started | Sep 04 05:47:27 AM UTC 24 |
| Finished | Sep 04 05:47:30 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3301840068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 6.usbdev_random_length_out_transaction.3301840068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_resume_link_active.179207642 |
| Short name | T907 |
| Test name | |
| Test status | |
| Simulation time | 20162046951 ps |
| CPU time | 50.32 seconds |
| Started | Sep 04 05:47:30 AM UTC 24 |
| Finished | Sep 04 05:48:22 AM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=179207642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 6.usbdev_resume_link_active.179207642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_rx_crc_err.968578145 |
| Short name | T818 |
| Test name | |
| Test status | |
| Simulation time | 199136538 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 05:47:31 AM UTC 24 |
| Finished | Sep 04 05:47:33 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=968578145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_rx_crc_err.968578145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_rx_full.3482852773 |
| Short name | T855 |
| Test name | |
| Test status | |
| Simulation time | 417069437 ps |
| CPU time | 2.43 seconds |
| Started | Sep 04 05:47:31 AM UTC 24 |
| Finished | Sep 04 05:47:34 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3482852773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_rx_full.3482852773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_setup_stage.3829986290 |
| Short name | T856 |
| Test name | |
| Test status | |
| Simulation time | 182810958 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 05:47:31 AM UTC 24 |
| Finished | Sep 04 05:47:33 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3829986290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_setup_stage.3829986290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_setup_trans_ignored.3734383188 |
| Short name | T857 |
| Test name | |
| Test status | |
| Simulation time | 163401900 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 05:47:32 AM UTC 24 |
| Finished | Sep 04 05:47:34 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3734383188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 6.usbdev_setup_trans_ignored.3734383188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_smoke.1681941445 |
| Short name | T858 |
| Test name | |
| Test status | |
| Simulation time | 246071038 ps |
| CPU time | 1.82 seconds |
| Started | Sep 04 05:47:34 AM UTC 24 |
| Finished | Sep 04 05:47:37 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1681941445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_smoke.1681941445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_spurious_pids_ignored.3985429820 |
| Short name | T874 |
| Test name | |
| Test status | |
| Simulation time | 2052393094 ps |
| CPU time | 20.18 seconds |
| Started | Sep 04 05:47:34 AM UTC 24 |
| Finished | Sep 04 05:47:56 AM UTC 24 |
| Peak memory | 227568 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3985429820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 6.usbdev_spurious_pids_ignored.3985429820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_stall_priority_over_nak.260863751 |
| Short name | T861 |
| Test name | |
| Test status | |
| Simulation time | 188487444 ps |
| CPU time | 1.62 seconds |
| Started | Sep 04 05:47:35 AM UTC 24 |
| Finished | Sep 04 05:47:38 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=260863751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stall_priority_over_nak.260863751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_stall_trans.1819922854 |
| Short name | T860 |
| Test name | |
| Test status | |
| Simulation time | 180597138 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 05:47:35 AM UTC 24 |
| Finished | Sep 04 05:47:38 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1819922854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_stall_trans.1819922854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_stream_len_max.1941267362 |
| Short name | T867 |
| Test name | |
| Test status | |
| Simulation time | 1284449064 ps |
| CPU time | 5.69 seconds |
| Started | Sep 04 05:47:39 AM UTC 24 |
| Finished | Sep 04 05:47:45 AM UTC 24 |
| Peak memory | 217264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1941267362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stream_len_max.1941267362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_streaming_out.3822252206 |
| Short name | T885 |
| Test name | |
| Test status | |
| Simulation time | 2682528721 ps |
| CPU time | 27.33 seconds |
| Started | Sep 04 05:47:38 AM UTC 24 |
| Finished | Sep 04 05:48:06 AM UTC 24 |
| Peak memory | 217356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3822252206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_streaming_out.3822252206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_stress_usb_traffic.1384921095 |
| Short name | T108 |
| Test name | |
| Test status | |
| Simulation time | 8483478132 ps |
| CPU time | 53.86 seconds |
| Started | Sep 04 05:47:39 AM UTC 24 |
| Finished | Sep 04 05:48:34 AM UTC 24 |
| Peak memory | 229588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1384921095 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_ 03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stress_usb_traffic.1384921095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/6.usbdev_timeout_missing_host_handshake.629366156 |
| Short name | T859 |
| Test name | |
| Test status | |
| Simulation time | 4332688566 ps |
| CPU time | 33.7 seconds |
| Started | Sep 04 05:47:02 AM UTC 24 |
| Finished | Sep 04 05:47:37 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=629366156 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_timeout_missing_host_handshake.629366156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/6.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/60.usbdev_endpoint_types.3327704884 |
| Short name | T367 |
| Test name | |
| Test status | |
| Simulation time | 433018481 ps |
| CPU time | 1.98 seconds |
| Started | Sep 04 06:07:41 AM UTC 24 |
| Finished | Sep 04 06:07:44 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3327704884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 60.usbdev_endpoint_types.3327704884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/60.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/60.usbdev_fifo_levels.2361307147 |
| Short name | T3233 |
| Test name | |
| Test status | |
| Simulation time | 147587839 ps |
| CPU time | 1.3 seconds |
| Started | Sep 04 06:07:41 AM UTC 24 |
| Finished | Sep 04 06:07:43 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2361307147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 60.usbdev_fifo_levels.2361307147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/60.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/60.usbdev_tx_rx_disruption.4179645799 |
| Short name | T3234 |
| Test name | |
| Test status | |
| Simulation time | 449111839 ps |
| CPU time | 1.59 seconds |
| Started | Sep 04 06:07:41 AM UTC 24 |
| Finished | Sep 04 06:07:44 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4179645799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 60.usbdev_t x_rx_disruption.4179645799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/60.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/61.usbdev_endpoint_types.1733896183 |
| Short name | T3232 |
| Test name | |
| Test status | |
| Simulation time | 149310950 ps |
| CPU time | 1.06 seconds |
| Started | Sep 04 06:07:41 AM UTC 24 |
| Finished | Sep 04 06:07:43 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1733896183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 61.usbdev_endpoint_types.1733896183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/61.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/61.usbdev_fifo_levels.3924793360 |
| Short name | T3235 |
| Test name | |
| Test status | |
| Simulation time | 201608090 ps |
| CPU time | 1.6 seconds |
| Started | Sep 04 06:07:41 AM UTC 24 |
| Finished | Sep 04 06:07:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3924793360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 61.usbdev_fifo_levels.3924793360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/61.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/61.usbdev_tx_rx_disruption.519895856 |
| Short name | T3236 |
| Test name | |
| Test status | |
| Simulation time | 461592095 ps |
| CPU time | 1.85 seconds |
| Started | Sep 04 06:07:41 AM UTC 24 |
| Finished | Sep 04 06:07:44 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=519895856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 61.usbdev_tx _rx_disruption.519895856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/61.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/62.usbdev_endpoint_types.1680179622 |
| Short name | T328 |
| Test name | |
| Test status | |
| Simulation time | 368133879 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 06:07:41 AM UTC 24 |
| Finished | Sep 04 06:07:44 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1680179622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 62.usbdev_endpoint_types.1680179622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/62.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/62.usbdev_fifo_levels.817335391 |
| Short name | T552 |
| Test name | |
| Test status | |
| Simulation time | 282689090 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 06:07:41 AM UTC 24 |
| Finished | Sep 04 06:07:44 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=817335391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 62.usbdev_fifo_levels.817335391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/62.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/62.usbdev_tx_rx_disruption.2568447859 |
| Short name | T3241 |
| Test name | |
| Test status | |
| Simulation time | 466973403 ps |
| CPU time | 1.63 seconds |
| Started | Sep 04 06:07:43 AM UTC 24 |
| Finished | Sep 04 06:07:46 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2568447859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 62.usbdev_t x_rx_disruption.2568447859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/62.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/63.usbdev_endpoint_types.3671454055 |
| Short name | T3239 |
| Test name | |
| Test status | |
| Simulation time | 265190016 ps |
| CPU time | 1.17 seconds |
| Started | Sep 04 06:07:43 AM UTC 24 |
| Finished | Sep 04 06:07:45 AM UTC 24 |
| Peak memory | 214916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3671454055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 63.usbdev_endpoint_types.3671454055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/63.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/63.usbdev_fifo_levels.2744725694 |
| Short name | T3240 |
| Test name | |
| Test status | |
| Simulation time | 240477156 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 06:07:43 AM UTC 24 |
| Finished | Sep 04 06:07:46 AM UTC 24 |
| Peak memory | 215020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2744725694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 63.usbdev_fifo_levels.2744725694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/63.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/63.usbdev_tx_rx_disruption.1804915065 |
| Short name | T3242 |
| Test name | |
| Test status | |
| Simulation time | 468373902 ps |
| CPU time | 1.85 seconds |
| Started | Sep 04 06:07:43 AM UTC 24 |
| Finished | Sep 04 06:07:46 AM UTC 24 |
| Peak memory | 215028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1804915065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 63.usbdev_t x_rx_disruption.1804915065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/63.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/64.usbdev_endpoint_types.3417922672 |
| Short name | T351 |
| Test name | |
| Test status | |
| Simulation time | 787972710 ps |
| CPU time | 2.13 seconds |
| Started | Sep 04 06:07:43 AM UTC 24 |
| Finished | Sep 04 06:07:46 AM UTC 24 |
| Peak memory | 217040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3417922672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 64.usbdev_endpoint_types.3417922672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/64.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/64.usbdev_fifo_levels.2130105104 |
| Short name | T516 |
| Test name | |
| Test status | |
| Simulation time | 257112601 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 06:07:43 AM UTC 24 |
| Finished | Sep 04 06:07:46 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2130105104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 64.usbdev_fifo_levels.2130105104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/64.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/64.usbdev_tx_rx_disruption.2389926499 |
| Short name | T196 |
| Test name | |
| Test status | |
| Simulation time | 533280855 ps |
| CPU time | 1.79 seconds |
| Started | Sep 04 06:07:43 AM UTC 24 |
| Finished | Sep 04 06:07:46 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2389926499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 64.usbdev_t x_rx_disruption.2389926499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/64.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/65.usbdev_endpoint_types.1028848933 |
| Short name | T298 |
| Test name | |
| Test status | |
| Simulation time | 485702537 ps |
| CPU time | 1.73 seconds |
| Started | Sep 04 06:07:44 AM UTC 24 |
| Finished | Sep 04 06:07:47 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1028848933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 65.usbdev_endpoint_types.1028848933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/65.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/65.usbdev_fifo_levels.2205123500 |
| Short name | T566 |
| Test name | |
| Test status | |
| Simulation time | 262581575 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 06:07:44 AM UTC 24 |
| Finished | Sep 04 06:07:47 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2205123500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 65.usbdev_fifo_levels.2205123500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/65.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/65.usbdev_tx_rx_disruption.709084364 |
| Short name | T3246 |
| Test name | |
| Test status | |
| Simulation time | 626815978 ps |
| CPU time | 2.42 seconds |
| Started | Sep 04 06:07:45 AM UTC 24 |
| Finished | Sep 04 06:07:48 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=709084364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 65.usbdev_tx _rx_disruption.709084364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/65.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/66.usbdev_endpoint_types.1642324435 |
| Short name | T421 |
| Test name | |
| Test status | |
| Simulation time | 181513766 ps |
| CPU time | 1.1 seconds |
| Started | Sep 04 06:07:45 AM UTC 24 |
| Finished | Sep 04 06:07:47 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1642324435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 66.usbdev_endpoint_types.1642324435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/66.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/66.usbdev_fifo_levels.2719090751 |
| Short name | T3243 |
| Test name | |
| Test status | |
| Simulation time | 169239900 ps |
| CPU time | 1.3 seconds |
| Started | Sep 04 06:07:45 AM UTC 24 |
| Finished | Sep 04 06:07:47 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2719090751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 66.usbdev_fifo_levels.2719090751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/66.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/66.usbdev_tx_rx_disruption.2586868202 |
| Short name | T197 |
| Test name | |
| Test status | |
| Simulation time | 508034849 ps |
| CPU time | 1.64 seconds |
| Started | Sep 04 06:07:45 AM UTC 24 |
| Finished | Sep 04 06:07:47 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2586868202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 66.usbdev_t x_rx_disruption.2586868202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/66.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/67.usbdev_endpoint_types.3536718839 |
| Short name | T411 |
| Test name | |
| Test status | |
| Simulation time | 462263077 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 06:07:45 AM UTC 24 |
| Finished | Sep 04 06:07:47 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3536718839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 67.usbdev_endpoint_types.3536718839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/67.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/67.usbdev_fifo_levels.4195057994 |
| Short name | T3244 |
| Test name | |
| Test status | |
| Simulation time | 272714072 ps |
| CPU time | 1.73 seconds |
| Started | Sep 04 06:07:45 AM UTC 24 |
| Finished | Sep 04 06:07:48 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4195057994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 67.usbdev_fifo_levels.4195057994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/67.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/67.usbdev_tx_rx_disruption.4003848735 |
| Short name | T3245 |
| Test name | |
| Test status | |
| Simulation time | 558516730 ps |
| CPU time | 1.86 seconds |
| Started | Sep 04 06:07:45 AM UTC 24 |
| Finished | Sep 04 06:07:48 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4003848735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 67.usbdev_t x_rx_disruption.4003848735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/67.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/68.usbdev_endpoint_types.1442276064 |
| Short name | T370 |
| Test name | |
| Test status | |
| Simulation time | 602138332 ps |
| CPU time | 1.81 seconds |
| Started | Sep 04 06:07:46 AM UTC 24 |
| Finished | Sep 04 06:07:49 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1442276064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 68.usbdev_endpoint_types.1442276064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/68.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/68.usbdev_tx_rx_disruption.357337365 |
| Short name | T2879 |
| Test name | |
| Test status | |
| Simulation time | 651468728 ps |
| CPU time | 2.04 seconds |
| Started | Sep 04 06:07:46 AM UTC 24 |
| Finished | Sep 04 06:07:49 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=357337365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 68.usbdev_tx _rx_disruption.357337365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/68.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/69.usbdev_endpoint_types.1646491784 |
| Short name | T3247 |
| Test name | |
| Test status | |
| Simulation time | 237911342 ps |
| CPU time | 1.23 seconds |
| Started | Sep 04 06:07:46 AM UTC 24 |
| Finished | Sep 04 06:07:49 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1646491784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 69.usbdev_endpoint_types.1646491784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/69.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/69.usbdev_fifo_levels.1731714684 |
| Short name | T537 |
| Test name | |
| Test status | |
| Simulation time | 297216799 ps |
| CPU time | 1.89 seconds |
| Started | Sep 04 06:07:46 AM UTC 24 |
| Finished | Sep 04 06:07:49 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1731714684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 69.usbdev_fifo_levels.1731714684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/69.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/69.usbdev_tx_rx_disruption.928927528 |
| Short name | T2822 |
| Test name | |
| Test status | |
| Simulation time | 496120277 ps |
| CPU time | 2 seconds |
| Started | Sep 04 06:07:46 AM UTC 24 |
| Finished | Sep 04 06:07:49 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=928927528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 69.usbdev_tx _rx_disruption.928927528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/69.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_alert_test.3784126310 |
| Short name | T865 |
| Test name | |
| Test status | |
| Simulation time | 35628225 ps |
| CPU time | 1.02 seconds |
| Started | Sep 04 05:48:27 AM UTC 24 |
| Finished | Sep 04 05:48:29 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3784126310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 7.usbdev_alert_test.3784126310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_disconnect.3872591820 |
| Short name | T889 |
| Test name | |
| Test status | |
| Simulation time | 10674716687 ps |
| CPU time | 25.14 seconds |
| Started | Sep 04 05:47:43 AM UTC 24 |
| Finished | Sep 04 05:48:10 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3872591820 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_disconnect.3872591820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_reset.501113813 |
| Short name | T912 |
| Test name | |
| Test status | |
| Simulation time | 15592753776 ps |
| CPU time | 38.78 seconds |
| Started | Sep 04 05:47:45 AM UTC 24 |
| Finished | Sep 04 05:48:25 AM UTC 24 |
| Peak memory | 227536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=501113813 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_reset.501113813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_resume.2318646862 |
| Short name | T942 |
| Test name | |
| Test status | |
| Simulation time | 31153806167 ps |
| CPU time | 61.89 seconds |
| Started | Sep 04 05:47:45 AM UTC 24 |
| Finished | Sep 04 05:48:48 AM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2318646862 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_resume.2318646862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_av_buffer.3763365479 |
| Short name | T869 |
| Test name | |
| Test status | |
| Simulation time | 158593264 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 05:47:46 AM UTC 24 |
| Finished | Sep 04 05:47:48 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3763365479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_av_buffer.3763365479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_bitstuff_err.3180194816 |
| Short name | T870 |
| Test name | |
| Test status | |
| Simulation time | 157975231 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 05:47:47 AM UTC 24 |
| Finished | Sep 04 05:47:50 AM UTC 24 |
| Peak memory | 214944 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3180194816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_bitstuff_err.3180194816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_data_toggle_clear.7872231 |
| Short name | T871 |
| Test name | |
| Test status | |
| Simulation time | 355505272 ps |
| CPU time | 2.23 seconds |
| Started | Sep 04 05:47:47 AM UTC 24 |
| Finished | Sep 04 05:47:50 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=7872231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_data_toggle_clear.7872231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_data_toggle_restore.1190280206 |
| Short name | T479 |
| Test name | |
| Test status | |
| Simulation time | 909887616 ps |
| CPU time | 4.49 seconds |
| Started | Sep 04 05:47:47 AM UTC 24 |
| Finished | Sep 04 05:47:53 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1190280206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_data_toggle_restore.1190280206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_device_address.2605042619 |
| Short name | T294 |
| Test name | |
| Test status | |
| Simulation time | 19290167998 ps |
| CPU time | 39.75 seconds |
| Started | Sep 04 05:47:49 AM UTC 24 |
| Finished | Sep 04 05:48:31 AM UTC 24 |
| Peak memory | 217432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2605042619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_device_address.2605042619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_device_timeout.218064810 |
| Short name | T890 |
| Test name | |
| Test status | |
| Simulation time | 1547094145 ps |
| CPU time | 19.76 seconds |
| Started | Sep 04 05:47:51 AM UTC 24 |
| Finished | Sep 04 05:48:12 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=218064810 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_device_timeout.218064810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_disable_endpoint.2426535401 |
| Short name | T876 |
| Test name | |
| Test status | |
| Simulation time | 444203515 ps |
| CPU time | 2.56 seconds |
| Started | Sep 04 05:47:53 AM UTC 24 |
| Finished | Sep 04 05:47:57 AM UTC 24 |
| Peak memory | 216960 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2426535401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 7.usbdev_disable_endpoint.2426535401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_disconnected.4259775360 |
| Short name | T875 |
| Test name | |
| Test status | |
| Simulation time | 145539548 ps |
| CPU time | 1.29 seconds |
| Started | Sep 04 05:47:53 AM UTC 24 |
| Finished | Sep 04 05:47:56 AM UTC 24 |
| Peak memory | 215044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4259775360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_disconnected.4259775360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_enable.3678004313 |
| Short name | T877 |
| Test name | |
| Test status | |
| Simulation time | 39584833 ps |
| CPU time | 1.07 seconds |
| Started | Sep 04 05:47:56 AM UTC 24 |
| Finished | Sep 04 05:47:58 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3678004313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 7.usbdev_enable.3678004313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_endpoint_access.783954518 |
| Short name | T458 |
| Test name | |
| Test status | |
| Simulation time | 897887041 ps |
| CPU time | 4.49 seconds |
| Started | Sep 04 05:47:56 AM UTC 24 |
| Finished | Sep 04 05:48:01 AM UTC 24 |
| Peak memory | 217264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=783954518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_endpoint_access.783954518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_endpoint_types.1763623698 |
| Short name | T494 |
| Test name | |
| Test status | |
| Simulation time | 158633218 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 05:47:56 AM UTC 24 |
| Finished | Sep 04 05:47:58 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1763623698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_endpoint_types.1763623698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_fifo_levels.3092258760 |
| Short name | T495 |
| Test name | |
| Test status | |
| Simulation time | 284274607 ps |
| CPU time | 2.07 seconds |
| Started | Sep 04 05:47:57 AM UTC 24 |
| Finished | Sep 04 05:48:00 AM UTC 24 |
| Peak memory | 217156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3092258760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_fifo_levels.3092258760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_fifo_rst.854266034 |
| Short name | T880 |
| Test name | |
| Test status | |
| Simulation time | 394302147 ps |
| CPU time | 2.92 seconds |
| Started | Sep 04 05:47:57 AM UTC 24 |
| Finished | Sep 04 05:48:01 AM UTC 24 |
| Peak memory | 217096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=854266034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 7.usbdev_fifo_rst.854266034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_in_iso.1890840779 |
| Short name | T879 |
| Test name | |
| Test status | |
| Simulation time | 154397069 ps |
| CPU time | 1.55 seconds |
| Started | Sep 04 05:47:58 AM UTC 24 |
| Finished | Sep 04 05:48:01 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1890840779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 7.usbdev_in_iso.1890840779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_in_stall.3375113545 |
| Short name | T881 |
| Test name | |
| Test status | |
| Simulation time | 216884013 ps |
| CPU time | 1.23 seconds |
| Started | Sep 04 05:48:00 AM UTC 24 |
| Finished | Sep 04 05:48:02 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3375113545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_in_stall.3375113545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_in_trans.2078107022 |
| Short name | T882 |
| Test name | |
| Test status | |
| Simulation time | 190329744 ps |
| CPU time | 1.36 seconds |
| Started | Sep 04 05:48:01 AM UTC 24 |
| Finished | Sep 04 05:48:03 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2078107022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_in_trans.2078107022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_invalid_sync.657749906 |
| Short name | T915 |
| Test name | |
| Test status | |
| Simulation time | 2642850641 ps |
| CPU time | 26.42 seconds |
| Started | Sep 04 05:47:58 AM UTC 24 |
| Finished | Sep 04 05:48:26 AM UTC 24 |
| Peak memory | 234164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=657749906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 7.usbdev_invalid_sync.657749906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_iso_retraction.729627878 |
| Short name | T966 |
| Test name | |
| Test status | |
| Simulation time | 4377659541 ps |
| CPU time | 56.81 seconds |
| Started | Sep 04 05:48:02 AM UTC 24 |
| Finished | Sep 04 05:49:00 AM UTC 24 |
| Peak memory | 217312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=729627878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 7.usbdev_iso_retraction.729627878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_link_in_err.71644778 |
| Short name | T883 |
| Test name | |
| Test status | |
| Simulation time | 180366468 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 05:48:02 AM UTC 24 |
| Finished | Sep 04 05:48:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=71644778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_link_in_err.71644778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_link_resume.2977701978 |
| Short name | T100 |
| Test name | |
| Test status | |
| Simulation time | 29598215720 ps |
| CPU time | 52.99 seconds |
| Started | Sep 04 05:48:02 AM UTC 24 |
| Finished | Sep 04 05:48:57 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2977701978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_link_resume.2977701978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_link_suspend.3856883255 |
| Short name | T910 |
| Test name | |
| Test status | |
| Simulation time | 10166068252 ps |
| CPU time | 21.03 seconds |
| Started | Sep 04 05:48:02 AM UTC 24 |
| Finished | Sep 04 05:48:24 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3856883255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_link_suspend.3856883255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_low_speed_traffic.2220061744 |
| Short name | T324 |
| Test name | |
| Test status | |
| Simulation time | 4890119887 ps |
| CPU time | 44.5 seconds |
| Started | Sep 04 05:48:02 AM UTC 24 |
| Finished | Sep 04 05:48:48 AM UTC 24 |
| Peak memory | 229584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2220061744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_low_speed_traffic.2220061744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_max_inter_pkt_delay.3428675928 |
| Short name | T1023 |
| Test name | |
| Test status | |
| Simulation time | 3226039239 ps |
| CPU time | 97.85 seconds |
| Started | Sep 04 05:48:02 AM UTC 24 |
| Finished | Sep 04 05:49:42 AM UTC 24 |
| Peak memory | 227712 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3428675928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_inter_pkt_delay.3428675928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_max_length_in_transaction.3749734864 |
| Short name | T884 |
| Test name | |
| Test status | |
| Simulation time | 252278059 ps |
| CPU time | 1.68 seconds |
| Started | Sep 04 05:48:03 AM UTC 24 |
| Finished | Sep 04 05:48:06 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3749734864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_max_length_in_transaction.3749734864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_max_length_out_transaction.3670054292 |
| Short name | T887 |
| Test name | |
| Test status | |
| Simulation time | 198224267 ps |
| CPU time | 1.14 seconds |
| Started | Sep 04 05:48:06 AM UTC 24 |
| Finished | Sep 04 05:48:08 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3670054292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 7.usbdev_max_length_out_transaction.3670054292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_max_non_iso_usb_traffic.2288548996 |
| Short name | T986 |
| Test name | |
| Test status | |
| Simulation time | 2368449223 ps |
| CPU time | 66.04 seconds |
| Started | Sep 04 05:48:07 AM UTC 24 |
| Finished | Sep 04 05:49:15 AM UTC 24 |
| Peak memory | 227728 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2288548996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_non_iso_usb_traffic.2288548996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_max_usb_traffic.1066942423 |
| Short name | T982 |
| Test name | |
| Test status | |
| Simulation time | 2388755233 ps |
| CPU time | 64.1 seconds |
| Started | Sep 04 05:48:07 AM UTC 24 |
| Finished | Sep 04 05:49:13 AM UTC 24 |
| Peak memory | 229676 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1066942423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_usb_traffic.1066942423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_min_inter_pkt_delay.450766435 |
| Short name | T925 |
| Test name | |
| Test status | |
| Simulation time | 1886039753 ps |
| CPU time | 24.84 seconds |
| Started | Sep 04 05:48:09 AM UTC 24 |
| Finished | Sep 04 05:48:36 AM UTC 24 |
| Peak memory | 234044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=450766435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_min_inter_pkt_delay.450766435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_min_length_in_transaction.1252948669 |
| Short name | T891 |
| Test name | |
| Test status | |
| Simulation time | 158929768 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 05:48:09 AM UTC 24 |
| Finished | Sep 04 05:48:12 AM UTC 24 |
| Peak memory | 214976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1252948669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 7.usbdev_min_length_in_transaction.1252948669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_min_length_out_transaction.1130084514 |
| Short name | T892 |
| Test name | |
| Test status | |
| Simulation time | 207460885 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 05:48:09 AM UTC 24 |
| Finished | Sep 04 05:48:12 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1130084514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 7.usbdev_min_length_out_transaction.1130084514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_nak_trans.1058743175 |
| Short name | T133 |
| Test name | |
| Test status | |
| Simulation time | 254805741 ps |
| CPU time | 1.78 seconds |
| Started | Sep 04 05:48:10 AM UTC 24 |
| Finished | Sep 04 05:48:13 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1058743175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_nak_trans.1058743175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_out_iso.4130199171 |
| Short name | T894 |
| Test name | |
| Test status | |
| Simulation time | 183971062 ps |
| CPU time | 1.15 seconds |
| Started | Sep 04 05:48:12 AM UTC 24 |
| Finished | Sep 04 05:48:15 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4130199171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 7.usbdev_out_iso.4130199171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_out_stall.1483708914 |
| Short name | T898 |
| Test name | |
| Test status | |
| Simulation time | 163745479 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 05:48:14 AM UTC 24 |
| Finished | Sep 04 05:48:16 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1483708914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_out_stall.1483708914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_out_trans_nak.73109861 |
| Short name | T897 |
| Test name | |
| Test status | |
| Simulation time | 154317576 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 05:48:14 AM UTC 24 |
| Finished | Sep 04 05:48:16 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=73109861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_out_trans_nak.73109861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_pending_in_trans.244660716 |
| Short name | T896 |
| Test name | |
| Test status | |
| Simulation time | 191925173 ps |
| CPU time | 1.26 seconds |
| Started | Sep 04 05:48:14 AM UTC 24 |
| Finished | Sep 04 05:48:16 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=244660716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_pending_in_trans.244660716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_phy_config_pinflip.3700063665 |
| Short name | T899 |
| Test name | |
| Test status | |
| Simulation time | 259853955 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 05:48:14 AM UTC 24 |
| Finished | Sep 04 05:48:17 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3700063665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_phy_config_pinflip.3700063665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_phy_config_usb_ref_disable.842118469 |
| Short name | T901 |
| Test name | |
| Test status | |
| Simulation time | 140116417 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 05:48:16 AM UTC 24 |
| Finished | Sep 04 05:48:18 AM UTC 24 |
| Peak memory | 214832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=842118469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 7.usbdev_phy_config_usb_ref_disable.842118469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_phy_pins_sense.3818112140 |
| Short name | T39 |
| Test name | |
| Test status | |
| Simulation time | 35299382 ps |
| CPU time | 1.04 seconds |
| Started | Sep 04 05:48:16 AM UTC 24 |
| Finished | Sep 04 05:48:18 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3818112140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_phy_pins_sense.3818112140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_buffer.2356172028 |
| Short name | T462 |
| Test name | |
| Test status | |
| Simulation time | 13409880254 ps |
| CPU time | 35.5 seconds |
| Started | Sep 04 05:48:18 AM UTC 24 |
| Finished | Sep 04 05:48:55 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2356172028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 7.usbdev_pkt_buffer.2356172028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_received.1143513275 |
| Short name | T903 |
| Test name | |
| Test status | |
| Simulation time | 199087511 ps |
| CPU time | 1.32 seconds |
| Started | Sep 04 05:48:18 AM UTC 24 |
| Finished | Sep 04 05:48:20 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1143513275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_pkt_received.1143513275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_sent.1090118704 |
| Short name | T904 |
| Test name | |
| Test status | |
| Simulation time | 169334509 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 05:48:18 AM UTC 24 |
| Finished | Sep 04 05:48:21 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1090118704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_pkt_sent.1090118704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_rand_bus_disconnects.822406410 |
| Short name | T971 |
| Test name | |
| Test status | |
| Simulation time | 6636689306 ps |
| CPU time | 43.93 seconds |
| Started | Sep 04 05:48:20 AM UTC 24 |
| Finished | Sep 04 05:49:06 AM UTC 24 |
| Peak memory | 229580 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=822406410 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_bus_disconnects.822406410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_rand_bus_resets.3531818792 |
| Short name | T992 |
| Test name | |
| Test status | |
| Simulation time | 6565300233 ps |
| CPU time | 56.41 seconds |
| Started | Sep 04 05:48:20 AM UTC 24 |
| Finished | Sep 04 05:49:18 AM UTC 24 |
| Peak memory | 234232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3531818792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_bus_resets.3531818792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_rand_suspends.806736377 |
| Short name | T1035 |
| Test name | |
| Test status | |
| Simulation time | 6783341885 ps |
| CPU time | 95.52 seconds |
| Started | Sep 04 05:48:20 AM UTC 24 |
| Finished | Sep 04 05:49:58 AM UTC 24 |
| Peak memory | 229808 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=806736377 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_suspends.806736377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_random_length_in_transaction.1884950053 |
| Short name | T905 |
| Test name | |
| Test status | |
| Simulation time | 193321204 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 05:48:18 AM UTC 24 |
| Finished | Sep 04 05:48:21 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1884950053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 7.usbdev_random_length_in_transaction.1884950053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_random_length_out_transaction.650468328 |
| Short name | T906 |
| Test name | |
| Test status | |
| Simulation time | 201590442 ps |
| CPU time | 1.61 seconds |
| Started | Sep 04 05:48:18 AM UTC 24 |
| Finished | Sep 04 05:48:21 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=650468328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 7.usbdev_random_length_out_transaction.650468328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_resume_link_active.3141541985 |
| Short name | T957 |
| Test name | |
| Test status | |
| Simulation time | 20189919104 ps |
| CPU time | 35.97 seconds |
| Started | Sep 04 05:48:20 AM UTC 24 |
| Finished | Sep 04 05:48:58 AM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3141541985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 7.usbdev_resume_link_active.3141541985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_rx_crc_err.944820838 |
| Short name | T909 |
| Test name | |
| Test status | |
| Simulation time | 173859301 ps |
| CPU time | 1.41 seconds |
| Started | Sep 04 05:48:22 AM UTC 24 |
| Finished | Sep 04 05:48:24 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=944820838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_rx_crc_err.944820838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_rx_full.729749059 |
| Short name | T914 |
| Test name | |
| Test status | |
| Simulation time | 372996506 ps |
| CPU time | 2.32 seconds |
| Started | Sep 04 05:48:22 AM UTC 24 |
| Finished | Sep 04 05:48:25 AM UTC 24 |
| Peak memory | 217088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=729749059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 7.usbdev_rx_full.729749059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_setup_stage.3465530825 |
| Short name | T908 |
| Test name | |
| Test status | |
| Simulation time | 197193679 ps |
| CPU time | 1.1 seconds |
| Started | Sep 04 05:48:22 AM UTC 24 |
| Finished | Sep 04 05:48:24 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3465530825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_setup_stage.3465530825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_setup_trans_ignored.3053044956 |
| Short name | T911 |
| Test name | |
| Test status | |
| Simulation time | 153468153 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 05:48:22 AM UTC 24 |
| Finished | Sep 04 05:48:24 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3053044956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 7.usbdev_setup_trans_ignored.3053044956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_smoke.1396493571 |
| Short name | T913 |
| Test name | |
| Test status | |
| Simulation time | 206766951 ps |
| CPU time | 1.68 seconds |
| Started | Sep 04 05:48:22 AM UTC 24 |
| Finished | Sep 04 05:48:25 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1396493571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_smoke.1396493571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_spurious_pids_ignored.4126372303 |
| Short name | T937 |
| Test name | |
| Test status | |
| Simulation time | 1881853722 ps |
| CPU time | 18.68 seconds |
| Started | Sep 04 05:48:23 AM UTC 24 |
| Finished | Sep 04 05:48:43 AM UTC 24 |
| Peak memory | 229528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4126372303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 7.usbdev_spurious_pids_ignored.4126372303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_stall_priority_over_nak.945155838 |
| Short name | T916 |
| Test name | |
| Test status | |
| Simulation time | 151133092 ps |
| CPU time | 1.4 seconds |
| Started | Sep 04 05:48:24 AM UTC 24 |
| Finished | Sep 04 05:48:27 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=945155838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stall_priority_over_nak.945155838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_stall_trans.838025610 |
| Short name | T917 |
| Test name | |
| Test status | |
| Simulation time | 164790138 ps |
| CPU time | 1.03 seconds |
| Started | Sep 04 05:48:25 AM UTC 24 |
| Finished | Sep 04 05:48:28 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=838025610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 7.usbdev_stall_trans.838025610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_stream_len_max.3826451143 |
| Short name | T919 |
| Test name | |
| Test status | |
| Simulation time | 1302479314 ps |
| CPU time | 3.87 seconds |
| Started | Sep 04 05:48:26 AM UTC 24 |
| Finished | Sep 04 05:48:31 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3826451143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stream_len_max.3826451143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_streaming_out.2371726555 |
| Short name | T1033 |
| Test name | |
| Test status | |
| Simulation time | 3411892424 ps |
| CPU time | 88.28 seconds |
| Started | Sep 04 05:48:26 AM UTC 24 |
| Finished | Sep 04 05:49:56 AM UTC 24 |
| Peak memory | 227592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2371726555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_streaming_out.2371726555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_stress_usb_traffic.1209379819 |
| Short name | T1230 |
| Test name | |
| Test status | |
| Simulation time | 10949050771 ps |
| CPU time | 213.65 seconds |
| Started | Sep 04 05:48:26 AM UTC 24 |
| Finished | Sep 04 05:52:03 AM UTC 24 |
| Peak memory | 236896 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1209379819 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_ 03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stress_usb_traffic.1209379819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_timeout_missing_host_handshake.3824071744 |
| Short name | T888 |
| Test name | |
| Test status | |
| Simulation time | 621734058 ps |
| CPU time | 15.22 seconds |
| Started | Sep 04 05:47:52 AM UTC 24 |
| Finished | Sep 04 05:48:08 AM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3824071744 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_timeout_missing_host_handshake.3824071744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/7.usbdev_tx_rx_disruption.4200742643 |
| Short name | T918 |
| Test name | |
| Test status | |
| Simulation time | 658658950 ps |
| CPU time | 1.98 seconds |
| Started | Sep 04 05:48:26 AM UTC 24 |
| Finished | Sep 04 05:48:29 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4200742643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_tx _rx_disruption.4200742643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/7.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/70.usbdev_endpoint_types.3786893132 |
| Short name | T393 |
| Test name | |
| Test status | |
| Simulation time | 284316243 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 06:07:46 AM UTC 24 |
| Finished | Sep 04 06:07:49 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3786893132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 70.usbdev_endpoint_types.3786893132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/70.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/70.usbdev_tx_rx_disruption.650981918 |
| Short name | T216 |
| Test name | |
| Test status | |
| Simulation time | 421333587 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 06:07:48 AM UTC 24 |
| Finished | Sep 04 06:07:51 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=650981918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 70.usbdev_tx _rx_disruption.650981918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/70.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/71.usbdev_endpoint_types.3126697200 |
| Short name | T1894 |
| Test name | |
| Test status | |
| Simulation time | 211659137 ps |
| CPU time | 0.93 seconds |
| Started | Sep 04 06:07:48 AM UTC 24 |
| Finished | Sep 04 06:07:50 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3126697200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 71.usbdev_endpoint_types.3126697200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/71.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/71.usbdev_fifo_levels.1575407942 |
| Short name | T1628 |
| Test name | |
| Test status | |
| Simulation time | 183381084 ps |
| CPU time | 1.46 seconds |
| Started | Sep 04 06:07:48 AM UTC 24 |
| Finished | Sep 04 06:07:51 AM UTC 24 |
| Peak memory | 215004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1575407942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 71.usbdev_fifo_levels.1575407942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/71.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/71.usbdev_tx_rx_disruption.693953425 |
| Short name | T3249 |
| Test name | |
| Test status | |
| Simulation time | 509805238 ps |
| CPU time | 2.39 seconds |
| Started | Sep 04 06:07:48 AM UTC 24 |
| Finished | Sep 04 06:07:52 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=693953425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 71.usbdev_tx _rx_disruption.693953425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/71.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/72.usbdev_fifo_levels.1674832798 |
| Short name | T532 |
| Test name | |
| Test status | |
| Simulation time | 289024773 ps |
| CPU time | 1.23 seconds |
| Started | Sep 04 06:07:48 AM UTC 24 |
| Finished | Sep 04 06:07:51 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1674832798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 72.usbdev_fifo_levels.1674832798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/72.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/72.usbdev_tx_rx_disruption.2859388184 |
| Short name | T3248 |
| Test name | |
| Test status | |
| Simulation time | 464460657 ps |
| CPU time | 1.68 seconds |
| Started | Sep 04 06:07:48 AM UTC 24 |
| Finished | Sep 04 06:07:51 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2859388184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 72.usbdev_t x_rx_disruption.2859388184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/72.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/73.usbdev_endpoint_types.2381430624 |
| Short name | T329 |
| Test name | |
| Test status | |
| Simulation time | 514936004 ps |
| CPU time | 1.94 seconds |
| Started | Sep 04 06:07:48 AM UTC 24 |
| Finished | Sep 04 06:07:52 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2381430624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 73.usbdev_endpoint_types.2381430624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/73.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/73.usbdev_fifo_levels.581192399 |
| Short name | T546 |
| Test name | |
| Test status | |
| Simulation time | 265036070 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 06:07:48 AM UTC 24 |
| Finished | Sep 04 06:07:51 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=581192399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 73.usbdev_fifo_levels.581192399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/73.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/73.usbdev_tx_rx_disruption.2585421323 |
| Short name | T3253 |
| Test name | |
| Test status | |
| Simulation time | 621091116 ps |
| CPU time | 1.65 seconds |
| Started | Sep 04 06:07:49 AM UTC 24 |
| Finished | Sep 04 06:07:52 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2585421323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 73.usbdev_t x_rx_disruption.2585421323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/73.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/74.usbdev_endpoint_types.2835914232 |
| Short name | T348 |
| Test name | |
| Test status | |
| Simulation time | 226707981 ps |
| CPU time | 1.23 seconds |
| Started | Sep 04 06:07:50 AM UTC 24 |
| Finished | Sep 04 06:07:52 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2835914232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 74.usbdev_endpoint_types.2835914232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/74.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/74.usbdev_fifo_levels.3145494689 |
| Short name | T3251 |
| Test name | |
| Test status | |
| Simulation time | 247531584 ps |
| CPU time | 1.33 seconds |
| Started | Sep 04 06:07:50 AM UTC 24 |
| Finished | Sep 04 06:07:52 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3145494689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 74.usbdev_fifo_levels.3145494689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/74.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/74.usbdev_tx_rx_disruption.2944916466 |
| Short name | T3252 |
| Test name | |
| Test status | |
| Simulation time | 526648531 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 06:07:50 AM UTC 24 |
| Finished | Sep 04 06:07:52 AM UTC 24 |
| Peak memory | 214924 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2944916466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 74.usbdev_t x_rx_disruption.2944916466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/74.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/75.usbdev_endpoint_types.2485099983 |
| Short name | T344 |
| Test name | |
| Test status | |
| Simulation time | 408963579 ps |
| CPU time | 2.21 seconds |
| Started | Sep 04 06:07:50 AM UTC 24 |
| Finished | Sep 04 06:07:53 AM UTC 24 |
| Peak memory | 217000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2485099983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 75.usbdev_endpoint_types.2485099983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/75.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/75.usbdev_fifo_levels.1379805512 |
| Short name | T3250 |
| Test name | |
| Test status | |
| Simulation time | 169946093 ps |
| CPU time | 1.2 seconds |
| Started | Sep 04 06:07:50 AM UTC 24 |
| Finished | Sep 04 06:07:52 AM UTC 24 |
| Peak memory | 214884 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1379805512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 75.usbdev_fifo_levels.1379805512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/75.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/75.usbdev_tx_rx_disruption.2728303081 |
| Short name | T3255 |
| Test name | |
| Test status | |
| Simulation time | 495098697 ps |
| CPU time | 1.66 seconds |
| Started | Sep 04 06:07:51 AM UTC 24 |
| Finished | Sep 04 06:07:54 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2728303081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 75.usbdev_t x_rx_disruption.2728303081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/75.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/76.usbdev_endpoint_types.1918151941 |
| Short name | T3256 |
| Test name | |
| Test status | |
| Simulation time | 243303565 ps |
| CPU time | 1.67 seconds |
| Started | Sep 04 06:07:51 AM UTC 24 |
| Finished | Sep 04 06:07:54 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1918151941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 76.usbdev_endpoint_types.1918151941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/76.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/76.usbdev_fifo_levels.683976903 |
| Short name | T517 |
| Test name | |
| Test status | |
| Simulation time | 267295789 ps |
| CPU time | 1.35 seconds |
| Started | Sep 04 06:07:51 AM UTC 24 |
| Finished | Sep 04 06:07:54 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=683976903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 76.usbdev_fifo_levels.683976903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/76.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/76.usbdev_tx_rx_disruption.935030724 |
| Short name | T3257 |
| Test name | |
| Test status | |
| Simulation time | 658377013 ps |
| CPU time | 1.91 seconds |
| Started | Sep 04 06:07:51 AM UTC 24 |
| Finished | Sep 04 06:07:54 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=935030724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 76.usbdev_tx _rx_disruption.935030724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/76.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/77.usbdev_endpoint_types.1275901576 |
| Short name | T390 |
| Test name | |
| Test status | |
| Simulation time | 364306902 ps |
| CPU time | 1.73 seconds |
| Started | Sep 04 06:07:51 AM UTC 24 |
| Finished | Sep 04 06:07:54 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1275901576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 77.usbdev_endpoint_types.1275901576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/77.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/77.usbdev_fifo_levels.1076245101 |
| Short name | T3259 |
| Test name | |
| Test status | |
| Simulation time | 263553844 ps |
| CPU time | 1.68 seconds |
| Started | Sep 04 06:07:53 AM UTC 24 |
| Finished | Sep 04 06:07:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1076245101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 77.usbdev_fifo_levels.1076245101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/77.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/77.usbdev_tx_rx_disruption.362233939 |
| Short name | T3260 |
| Test name | |
| Test status | |
| Simulation time | 509808613 ps |
| CPU time | 1.78 seconds |
| Started | Sep 04 06:07:53 AM UTC 24 |
| Finished | Sep 04 06:07:56 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=362233939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 77.usbdev_tx _rx_disruption.362233939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/77.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/78.usbdev_endpoint_types.1790876772 |
| Short name | T392 |
| Test name | |
| Test status | |
| Simulation time | 279190639 ps |
| CPU time | 1.12 seconds |
| Started | Sep 04 06:07:53 AM UTC 24 |
| Finished | Sep 04 06:07:55 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1790876772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 78.usbdev_endpoint_types.1790876772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/78.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/78.usbdev_fifo_levels.1724927560 |
| Short name | T535 |
| Test name | |
| Test status | |
| Simulation time | 151904164 ps |
| CPU time | 0.86 seconds |
| Started | Sep 04 06:07:53 AM UTC 24 |
| Finished | Sep 04 06:07:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1724927560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 78.usbdev_fifo_levels.1724927560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/78.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/78.usbdev_tx_rx_disruption.2209162418 |
| Short name | T3261 |
| Test name | |
| Test status | |
| Simulation time | 654165413 ps |
| CPU time | 2.13 seconds |
| Started | Sep 04 06:07:53 AM UTC 24 |
| Finished | Sep 04 06:07:56 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2209162418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 78.usbdev_t x_rx_disruption.2209162418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/78.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/79.usbdev_endpoint_types.3115189582 |
| Short name | T332 |
| Test name | |
| Test status | |
| Simulation time | 507111122 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 06:07:53 AM UTC 24 |
| Finished | Sep 04 06:07:56 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3115189582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 79.usbdev_endpoint_types.3115189582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/79.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/79.usbdev_fifo_levels.1258820369 |
| Short name | T3258 |
| Test name | |
| Test status | |
| Simulation time | 294614999 ps |
| CPU time | 1.38 seconds |
| Started | Sep 04 06:07:53 AM UTC 24 |
| Finished | Sep 04 06:07:55 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1258820369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 79.usbdev_fifo_levels.1258820369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/79.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/79.usbdev_tx_rx_disruption.2930214494 |
| Short name | T3262 |
| Test name | |
| Test status | |
| Simulation time | 511263662 ps |
| CPU time | 2.11 seconds |
| Started | Sep 04 06:07:53 AM UTC 24 |
| Finished | Sep 04 06:07:56 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2930214494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 79.usbdev_t x_rx_disruption.2930214494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/79.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_alert_test.2061330021 |
| Short name | T969 |
| Test name | |
| Test status | |
| Simulation time | 116109468 ps |
| CPU time | 1.16 seconds |
| Started | Sep 04 05:49:01 AM UTC 24 |
| Finished | Sep 04 05:49:03 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2061330021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 8.usbdev_alert_test.2061330021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_disconnect.3723213430 |
| Short name | T929 |
| Test name | |
| Test status | |
| Simulation time | 5605081910 ps |
| CPU time | 8.41 seconds |
| Started | Sep 04 05:48:28 AM UTC 24 |
| Finished | Sep 04 05:48:38 AM UTC 24 |
| Peak memory | 227608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3723213430 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_disconnect.3723213430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_reset.1680171467 |
| Short name | T962 |
| Test name | |
| Test status | |
| Simulation time | 19546984883 ps |
| CPU time | 29.12 seconds |
| Started | Sep 04 05:48:28 AM UTC 24 |
| Finished | Sep 04 05:48:59 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1680171467 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_reset.1680171467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_resume.3159006881 |
| Short name | T996 |
| Test name | |
| Test status | |
| Simulation time | 31559501234 ps |
| CPU time | 51.76 seconds |
| Started | Sep 04 05:48:28 AM UTC 24 |
| Finished | Sep 04 05:49:22 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3159006881 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_resume.3159006881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_av_buffer.2780664005 |
| Short name | T921 |
| Test name | |
| Test status | |
| Simulation time | 173382727 ps |
| CPU time | 1.35 seconds |
| Started | Sep 04 05:48:28 AM UTC 24 |
| Finished | Sep 04 05:48:31 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2780664005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_av_buffer.2780664005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_bitstuff_err.3344889932 |
| Short name | T922 |
| Test name | |
| Test status | |
| Simulation time | 151509755 ps |
| CPU time | 1.02 seconds |
| Started | Sep 04 05:48:30 AM UTC 24 |
| Finished | Sep 04 05:48:32 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3344889932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_bitstuff_err.3344889932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_data_toggle_clear.1001878241 |
| Short name | T923 |
| Test name | |
| Test status | |
| Simulation time | 412708314 ps |
| CPU time | 2.81 seconds |
| Started | Sep 04 05:48:30 AM UTC 24 |
| Finished | Sep 04 05:48:34 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1001878241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 8.usbdev_data_toggle_clear.1001878241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_data_toggle_restore.3828555409 |
| Short name | T477 |
| Test name | |
| Test status | |
| Simulation time | 887459485 ps |
| CPU time | 4.1 seconds |
| Started | Sep 04 05:48:30 AM UTC 24 |
| Finished | Sep 04 05:48:35 AM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3828555409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_data_toggle_restore.3828555409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_device_address.2908793159 |
| Short name | T167 |
| Test name | |
| Test status | |
| Simulation time | 27252690940 ps |
| CPU time | 55.41 seconds |
| Started | Sep 04 05:48:30 AM UTC 24 |
| Finished | Sep 04 05:49:27 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2908793159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_device_address.2908793159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_device_timeout.3339351492 |
| Short name | T930 |
| Test name | |
| Test status | |
| Simulation time | 280352749 ps |
| CPU time | 6.43 seconds |
| Started | Sep 04 05:48:32 AM UTC 24 |
| Finished | Sep 04 05:48:39 AM UTC 24 |
| Peak memory | 217308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3339351492 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_device_timeout.3339351492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_disable_endpoint.2899054547 |
| Short name | T927 |
| Test name | |
| Test status | |
| Simulation time | 1126987059 ps |
| CPU time | 4.61 seconds |
| Started | Sep 04 05:48:32 AM UTC 24 |
| Finished | Sep 04 05:48:37 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2899054547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 8.usbdev_disable_endpoint.2899054547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_disconnected.215051655 |
| Short name | T926 |
| Test name | |
| Test status | |
| Simulation time | 150721244 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 05:48:33 AM UTC 24 |
| Finished | Sep 04 05:48:36 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=215051655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_disconnected.215051655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_enable.2259579125 |
| Short name | T924 |
| Test name | |
| Test status | |
| Simulation time | 37064693 ps |
| CPU time | 1.08 seconds |
| Started | Sep 04 05:48:33 AM UTC 24 |
| Finished | Sep 04 05:48:36 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2259579125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 8.usbdev_enable.2259579125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_endpoint_access.1456019499 |
| Short name | T931 |
| Test name | |
| Test status | |
| Simulation time | 1028525397 ps |
| CPU time | 3.79 seconds |
| Started | Sep 04 05:48:34 AM UTC 24 |
| Finished | Sep 04 05:48:39 AM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1456019499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_endpoint_access.1456019499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_endpoint_types.3571493138 |
| Short name | T364 |
| Test name | |
| Test status | |
| Simulation time | 329209640 ps |
| CPU time | 1.93 seconds |
| Started | Sep 04 05:48:36 AM UTC 24 |
| Finished | Sep 04 05:48:39 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3571493138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_endpoint_types.3571493138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_fifo_levels.3159059986 |
| Short name | T183 |
| Test name | |
| Test status | |
| Simulation time | 169649753 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 05:48:36 AM UTC 24 |
| Finished | Sep 04 05:48:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3159059986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_fifo_levels.3159059986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_fifo_rst.1768883919 |
| Short name | T933 |
| Test name | |
| Test status | |
| Simulation time | 391532705 ps |
| CPU time | 2.55 seconds |
| Started | Sep 04 05:48:37 AM UTC 24 |
| Finished | Sep 04 05:48:41 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1768883919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_fifo_rst.1768883919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_in_iso.775149205 |
| Short name | T932 |
| Test name | |
| Test status | |
| Simulation time | 241436082 ps |
| CPU time | 2.16 seconds |
| Started | Sep 04 05:48:37 AM UTC 24 |
| Finished | Sep 04 05:48:40 AM UTC 24 |
| Peak memory | 227416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=775149205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 8.usbdev_in_iso.775149205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_in_stall.2061990497 |
| Short name | T934 |
| Test name | |
| Test status | |
| Simulation time | 159274845 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 05:48:38 AM UTC 24 |
| Finished | Sep 04 05:48:41 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2061990497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_in_stall.2061990497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_in_trans.3420905673 |
| Short name | T935 |
| Test name | |
| Test status | |
| Simulation time | 231963159 ps |
| CPU time | 1.66 seconds |
| Started | Sep 04 05:48:38 AM UTC 24 |
| Finished | Sep 04 05:48:41 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3420905673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_in_trans.3420905673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_invalid_sync.2693345660 |
| Short name | T983 |
| Test name | |
| Test status | |
| Simulation time | 3429596005 ps |
| CPU time | 34.25 seconds |
| Started | Sep 04 05:48:37 AM UTC 24 |
| Finished | Sep 04 05:49:13 AM UTC 24 |
| Peak memory | 229784 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2693345660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 8.usbdev_invalid_sync.2693345660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_iso_retraction.3255703788 |
| Short name | T1096 |
| Test name | |
| Test status | |
| Simulation time | 12500104399 ps |
| CPU time | 113.91 seconds |
| Started | Sep 04 05:48:39 AM UTC 24 |
| Finished | Sep 04 05:50:35 AM UTC 24 |
| Peak memory | 217320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3255703788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_iso_retraction.3255703788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_link_in_err.722471901 |
| Short name | T936 |
| Test name | |
| Test status | |
| Simulation time | 186702713 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 05:48:40 AM UTC 24 |
| Finished | Sep 04 05:48:42 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=722471901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 8.usbdev_link_in_err.722471901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_link_resume.1305516168 |
| Short name | T980 |
| Test name | |
| Test status | |
| Simulation time | 11888310826 ps |
| CPU time | 29.39 seconds |
| Started | Sep 04 05:48:40 AM UTC 24 |
| Finished | Sep 04 05:49:11 AM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1305516168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_link_resume.1305516168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_link_suspend.3235045064 |
| Short name | T955 |
| Test name | |
| Test status | |
| Simulation time | 5485963587 ps |
| CPU time | 14.6 seconds |
| Started | Sep 04 05:48:40 AM UTC 24 |
| Finished | Sep 04 05:48:56 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3235045064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_link_suspend.3235045064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_low_speed_traffic.725597161 |
| Short name | T1039 |
| Test name | |
| Test status | |
| Simulation time | 2672151737 ps |
| CPU time | 78.4 seconds |
| Started | Sep 04 05:48:40 AM UTC 24 |
| Finished | Sep 04 05:50:00 AM UTC 24 |
| Peak memory | 229664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=725597161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_low_speed_traffic.725597161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_max_inter_pkt_delay.315717529 |
| Short name | T1073 |
| Test name | |
| Test status | |
| Simulation time | 3004190273 ps |
| CPU time | 97.22 seconds |
| Started | Sep 04 05:48:41 AM UTC 24 |
| Finished | Sep 04 05:50:20 AM UTC 24 |
| Peak memory | 234256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=315717529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_inter_pkt_delay.315717529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_max_length_in_transaction.1273006074 |
| Short name | T938 |
| Test name | |
| Test status | |
| Simulation time | 266504822 ps |
| CPU time | 1.72 seconds |
| Started | Sep 04 05:48:41 AM UTC 24 |
| Finished | Sep 04 05:48:44 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1273006074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 8.usbdev_max_length_in_transaction.1273006074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_max_length_out_transaction.1546425554 |
| Short name | T939 |
| Test name | |
| Test status | |
| Simulation time | 205615025 ps |
| CPU time | 1.7 seconds |
| Started | Sep 04 05:48:43 AM UTC 24 |
| Finished | Sep 04 05:48:46 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1546425554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 8.usbdev_max_length_out_transaction.1546425554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_max_non_iso_usb_traffic.1095202517 |
| Short name | T972 |
| Test name | |
| Test status | |
| Simulation time | 2485443750 ps |
| CPU time | 21.72 seconds |
| Started | Sep 04 05:48:43 AM UTC 24 |
| Finished | Sep 04 05:49:06 AM UTC 24 |
| Peak memory | 229716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1095202517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_non_iso_usb_traffic.1095202517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_max_usb_traffic.143039425 |
| Short name | T1013 |
| Test name | |
| Test status | |
| Simulation time | 1984077305 ps |
| CPU time | 48.98 seconds |
| Started | Sep 04 05:48:43 AM UTC 24 |
| Finished | Sep 04 05:49:33 AM UTC 24 |
| Peak memory | 229612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=143039425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_usb_traffic.143039425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_min_inter_pkt_delay.1076442778 |
| Short name | T977 |
| Test name | |
| Test status | |
| Simulation time | 2901148582 ps |
| CPU time | 23.73 seconds |
| Started | Sep 04 05:48:43 AM UTC 24 |
| Finished | Sep 04 05:49:08 AM UTC 24 |
| Peak memory | 229672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1076442778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_min_inter_pkt_delay.1076442778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_min_length_in_transaction.1930228385 |
| Short name | T941 |
| Test name | |
| Test status | |
| Simulation time | 179362243 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 05:48:44 AM UTC 24 |
| Finished | Sep 04 05:48:47 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1930228385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 8.usbdev_min_length_in_transaction.1930228385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_min_length_out_transaction.375777042 |
| Short name | T940 |
| Test name | |
| Test status | |
| Simulation time | 157957288 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 05:48:44 AM UTC 24 |
| Finished | Sep 04 05:48:47 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=375777042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 8.usbdev_min_length_out_transaction.375777042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_nak_trans.158848721 |
| Short name | T132 |
| Test name | |
| Test status | |
| Simulation time | 272920033 ps |
| CPU time | 1.86 seconds |
| Started | Sep 04 05:48:46 AM UTC 24 |
| Finished | Sep 04 05:48:49 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=158848721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_nak_trans.158848721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_out_iso.2786896522 |
| Short name | T946 |
| Test name | |
| Test status | |
| Simulation time | 154656691 ps |
| CPU time | 1.47 seconds |
| Started | Sep 04 05:48:48 AM UTC 24 |
| Finished | Sep 04 05:48:50 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2786896522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 8.usbdev_out_iso.2786896522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_out_stall.1905247502 |
| Short name | T944 |
| Test name | |
| Test status | |
| Simulation time | 167908196 ps |
| CPU time | 1.33 seconds |
| Started | Sep 04 05:48:48 AM UTC 24 |
| Finished | Sep 04 05:48:50 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1905247502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_out_stall.1905247502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_out_trans_nak.1239406496 |
| Short name | T945 |
| Test name | |
| Test status | |
| Simulation time | 163014895 ps |
| CPU time | 1.21 seconds |
| Started | Sep 04 05:48:48 AM UTC 24 |
| Finished | Sep 04 05:48:50 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1239406496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 8.usbdev_out_trans_nak.1239406496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_pending_in_trans.2449990277 |
| Short name | T948 |
| Test name | |
| Test status | |
| Simulation time | 149608057 ps |
| CPU time | 1.34 seconds |
| Started | Sep 04 05:48:49 AM UTC 24 |
| Finished | Sep 04 05:48:52 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2449990277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 8.usbdev_pending_in_trans.2449990277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_phy_config_pinflip.1489644605 |
| Short name | T947 |
| Test name | |
| Test status | |
| Simulation time | 224409508 ps |
| CPU time | 1.29 seconds |
| Started | Sep 04 05:48:49 AM UTC 24 |
| Finished | Sep 04 05:48:51 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1489644605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 8.usbdev_phy_config_pinflip.1489644605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_phy_config_usb_ref_disable.430234130 |
| Short name | T949 |
| Test name | |
| Test status | |
| Simulation time | 151426790 ps |
| CPU time | 1.01 seconds |
| Started | Sep 04 05:48:50 AM UTC 24 |
| Finished | Sep 04 05:48:52 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=430234130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 8.usbdev_phy_config_usb_ref_disable.430234130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_phy_pins_sense.891824159 |
| Short name | T950 |
| Test name | |
| Test status | |
| Simulation time | 82473441 ps |
| CPU time | 1.2 seconds |
| Started | Sep 04 05:48:51 AM UTC 24 |
| Finished | Sep 04 05:48:53 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=891824159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 8.usbdev_phy_pins_sense.891824159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_buffer.2683471593 |
| Short name | T254 |
| Test name | |
| Test status | |
| Simulation time | 19319577208 ps |
| CPU time | 60.12 seconds |
| Started | Sep 04 05:48:51 AM UTC 24 |
| Finished | Sep 04 05:49:52 AM UTC 24 |
| Peak memory | 231564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2683471593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 8.usbdev_pkt_buffer.2683471593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_received.3249902448 |
| Short name | T951 |
| Test name | |
| Test status | |
| Simulation time | 233579455 ps |
| CPU time | 1.65 seconds |
| Started | Sep 04 05:48:51 AM UTC 24 |
| Finished | Sep 04 05:48:53 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3249902448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_pkt_received.3249902448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_sent.3908004327 |
| Short name | T953 |
| Test name | |
| Test status | |
| Simulation time | 215059111 ps |
| CPU time | 1.78 seconds |
| Started | Sep 04 05:48:52 AM UTC 24 |
| Finished | Sep 04 05:48:55 AM UTC 24 |
| Peak memory | 214816 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3908004327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_pkt_sent.3908004327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_rand_bus_disconnects.232753650 |
| Short name | T1042 |
| Test name | |
| Test status | |
| Simulation time | 9981557339 ps |
| CPU time | 66.5 seconds |
| Started | Sep 04 05:48:53 AM UTC 24 |
| Finished | Sep 04 05:50:01 AM UTC 24 |
| Peak memory | 229716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=232753650 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_bus_disconnects.232753650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_rand_bus_resets.2852031302 |
| Short name | T1102 |
| Test name | |
| Test status | |
| Simulation time | 6784555295 ps |
| CPU time | 101.48 seconds |
| Started | Sep 04 05:48:53 AM UTC 24 |
| Finished | Sep 04 05:50:37 AM UTC 24 |
| Peak memory | 229656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2852031302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_bus_resets.2852031302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_rand_suspends.315433279 |
| Short name | T1032 |
| Test name | |
| Test status | |
| Simulation time | 5405798759 ps |
| CPU time | 59.38 seconds |
| Started | Sep 04 05:48:54 AM UTC 24 |
| Finished | Sep 04 05:49:55 AM UTC 24 |
| Peak memory | 229656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=315433279 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_suspends.315433279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_random_length_in_transaction.2324695241 |
| Short name | T952 |
| Test name | |
| Test status | |
| Simulation time | 209059632 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 05:48:52 AM UTC 24 |
| Finished | Sep 04 05:48:54 AM UTC 24 |
| Peak memory | 214792 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2324695241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 8.usbdev_random_length_in_transaction.2324695241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_random_length_out_transaction.4223109117 |
| Short name | T954 |
| Test name | |
| Test status | |
| Simulation time | 184805740 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 05:48:53 AM UTC 24 |
| Finished | Sep 04 05:48:56 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4223109117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 8.usbdev_random_length_out_transaction.4223109117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_resume_link_active.1282134757 |
| Short name | T1025 |
| Test name | |
| Test status | |
| Simulation time | 20154533554 ps |
| CPU time | 45.13 seconds |
| Started | Sep 04 05:48:56 AM UTC 24 |
| Finished | Sep 04 05:49:42 AM UTC 24 |
| Peak memory | 217348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1282134757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 8.usbdev_resume_link_active.1282134757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_rx_crc_err.3409577774 |
| Short name | T958 |
| Test name | |
| Test status | |
| Simulation time | 161058794 ps |
| CPU time | 1.48 seconds |
| Started | Sep 04 05:48:56 AM UTC 24 |
| Finished | Sep 04 05:48:58 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3409577774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 8.usbdev_rx_crc_err.3409577774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_rx_full.715324992 |
| Short name | T963 |
| Test name | |
| Test status | |
| Simulation time | 360024267 ps |
| CPU time | 2.34 seconds |
| Started | Sep 04 05:48:56 AM UTC 24 |
| Finished | Sep 04 05:48:59 AM UTC 24 |
| Peak memory | 217152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=715324992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 8.usbdev_rx_full.715324992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_setup_stage.4234664657 |
| Short name | T960 |
| Test name | |
| Test status | |
| Simulation time | 199167071 ps |
| CPU time | 1.61 seconds |
| Started | Sep 04 05:48:56 AM UTC 24 |
| Finished | Sep 04 05:48:59 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4234664657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_setup_stage.4234664657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_setup_trans_ignored.4112228606 |
| Short name | T964 |
| Test name | |
| Test status | |
| Simulation time | 158158844 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 05:48:57 AM UTC 24 |
| Finished | Sep 04 05:49:00 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4112228606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 8.usbdev_setup_trans_ignored.4112228606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_smoke.722002689 |
| Short name | T965 |
| Test name | |
| Test status | |
| Simulation time | 236433745 ps |
| CPU time | 1.64 seconds |
| Started | Sep 04 05:48:58 AM UTC 24 |
| Finished | Sep 04 05:49:00 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=722002689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_smoke.722002689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_spurious_pids_ignored.3128190787 |
| Short name | T1030 |
| Test name | |
| Test status | |
| Simulation time | 1712453218 ps |
| CPU time | 48.77 seconds |
| Started | Sep 04 05:48:58 AM UTC 24 |
| Finished | Sep 04 05:49:48 AM UTC 24 |
| Peak memory | 229552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3128190787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 8.usbdev_spurious_pids_ignored.3128190787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_stall_priority_over_nak.1421711309 |
| Short name | T968 |
| Test name | |
| Test status | |
| Simulation time | 176622338 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 05:48:59 AM UTC 24 |
| Finished | Sep 04 05:49:01 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1421711309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stall_priority_over_nak.1421711309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_stall_trans.3218255045 |
| Short name | T967 |
| Test name | |
| Test status | |
| Simulation time | 188543081 ps |
| CPU time | 1.25 seconds |
| Started | Sep 04 05:48:59 AM UTC 24 |
| Finished | Sep 04 05:49:01 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3218255045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_stall_trans.3218255045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_stream_len_max.4029625588 |
| Short name | T974 |
| Test name | |
| Test status | |
| Simulation time | 951918705 ps |
| CPU time | 4.79 seconds |
| Started | Sep 04 05:49:01 AM UTC 24 |
| Finished | Sep 04 05:49:07 AM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4029625588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stream_len_max.4029625588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_streaming_out.3404683847 |
| Short name | T1060 |
| Test name | |
| Test status | |
| Simulation time | 2039185498 ps |
| CPU time | 71.91 seconds |
| Started | Sep 04 05:49:01 AM UTC 24 |
| Finished | Sep 04 05:50:15 AM UTC 24 |
| Peak memory | 227392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3404683847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_streaming_out.3404683847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_stress_usb_traffic.3723719518 |
| Short name | T1052 |
| Test name | |
| Test status | |
| Simulation time | 10727104919 ps |
| CPU time | 66.38 seconds |
| Started | Sep 04 05:49:01 AM UTC 24 |
| Finished | Sep 04 05:50:09 AM UTC 24 |
| Peak memory | 234308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3723719518 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_ 03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stress_usb_traffic.3723719518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_timeout_missing_host_handshake.2019659102 |
| Short name | T943 |
| Test name | |
| Test status | |
| Simulation time | 862103236 ps |
| CPU time | 16.52 seconds |
| Started | Sep 04 05:48:32 AM UTC 24 |
| Finished | Sep 04 05:48:49 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2019659102 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_timeout_missing_host_handshake.2019659102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/8.usbdev_tx_rx_disruption.2675154121 |
| Short name | T970 |
| Test name | |
| Test status | |
| Simulation time | 447856060 ps |
| CPU time | 2.84 seconds |
| Started | Sep 04 05:49:01 AM UTC 24 |
| Finished | Sep 04 05:49:05 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2675154121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_tx _rx_disruption.2675154121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/8.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/80.usbdev_endpoint_types.702369458 |
| Short name | T391 |
| Test name | |
| Test status | |
| Simulation time | 422970659 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 06:07:53 AM UTC 24 |
| Finished | Sep 04 06:07:56 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=702369458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 80.usbdev_endpoint_types.702369458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/80.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/80.usbdev_fifo_levels.1989891711 |
| Short name | T578 |
| Test name | |
| Test status | |
| Simulation time | 285784169 ps |
| CPU time | 1.75 seconds |
| Started | Sep 04 06:07:53 AM UTC 24 |
| Finished | Sep 04 06:07:56 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1989891711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 80.usbdev_fifo_levels.1989891711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/80.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/80.usbdev_tx_rx_disruption.1042385755 |
| Short name | T3263 |
| Test name | |
| Test status | |
| Simulation time | 620066732 ps |
| CPU time | 2.58 seconds |
| Started | Sep 04 06:07:53 AM UTC 24 |
| Finished | Sep 04 06:07:57 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1042385755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 80.usbdev_t x_rx_disruption.1042385755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/80.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/81.usbdev_endpoint_types.4291698250 |
| Short name | T349 |
| Test name | |
| Test status | |
| Simulation time | 388166503 ps |
| CPU time | 1.37 seconds |
| Started | Sep 04 06:07:53 AM UTC 24 |
| Finished | Sep 04 06:07:56 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4291698250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 81.usbdev_endpoint_types.4291698250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/81.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/81.usbdev_fifo_levels.2761371896 |
| Short name | T550 |
| Test name | |
| Test status | |
| Simulation time | 237485556 ps |
| CPU time | 1.13 seconds |
| Started | Sep 04 06:07:55 AM UTC 24 |
| Finished | Sep 04 06:07:57 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2761371896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 81.usbdev_fifo_levels.2761371896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/81.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/81.usbdev_tx_rx_disruption.3647459358 |
| Short name | T3268 |
| Test name | |
| Test status | |
| Simulation time | 681475440 ps |
| CPU time | 2.07 seconds |
| Started | Sep 04 06:07:55 AM UTC 24 |
| Finished | Sep 04 06:07:58 AM UTC 24 |
| Peak memory | 217032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3647459358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 81.usbdev_t x_rx_disruption.3647459358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/81.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/82.usbdev_fifo_levels.4186150823 |
| Short name | T3264 |
| Test name | |
| Test status | |
| Simulation time | 160566781 ps |
| CPU time | 1.35 seconds |
| Started | Sep 04 06:07:55 AM UTC 24 |
| Finished | Sep 04 06:07:57 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4186150823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 82.usbdev_fifo_levels.4186150823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/82.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/82.usbdev_tx_rx_disruption.4173475053 |
| Short name | T3267 |
| Test name | |
| Test status | |
| Simulation time | 537087279 ps |
| CPU time | 1.84 seconds |
| Started | Sep 04 06:07:55 AM UTC 24 |
| Finished | Sep 04 06:07:58 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4173475053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 82.usbdev_t x_rx_disruption.4173475053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/82.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/83.usbdev_endpoint_types.2002817908 |
| Short name | T3266 |
| Test name | |
| Test status | |
| Simulation time | 172874906 ps |
| CPU time | 1.33 seconds |
| Started | Sep 04 06:07:55 AM UTC 24 |
| Finished | Sep 04 06:07:57 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2002817908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 83.usbdev_endpoint_types.2002817908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/83.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/83.usbdev_fifo_levels.2594130782 |
| Short name | T3265 |
| Test name | |
| Test status | |
| Simulation time | 253777275 ps |
| CPU time | 1.22 seconds |
| Started | Sep 04 06:07:55 AM UTC 24 |
| Finished | Sep 04 06:07:57 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2594130782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 83.usbdev_fifo_levels.2594130782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/83.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/83.usbdev_tx_rx_disruption.1272591804 |
| Short name | T3269 |
| Test name | |
| Test status | |
| Simulation time | 540757250 ps |
| CPU time | 1.77 seconds |
| Started | Sep 04 06:07:55 AM UTC 24 |
| Finished | Sep 04 06:07:58 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1272591804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 83.usbdev_t x_rx_disruption.1272591804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/83.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/84.usbdev_endpoint_types.4053526849 |
| Short name | T350 |
| Test name | |
| Test status | |
| Simulation time | 507532408 ps |
| CPU time | 2.16 seconds |
| Started | Sep 04 06:07:55 AM UTC 24 |
| Finished | Sep 04 06:07:58 AM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4053526849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 84.usbdev_endpoint_types.4053526849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/84.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/84.usbdev_fifo_levels.781130722 |
| Short name | T514 |
| Test name | |
| Test status | |
| Simulation time | 292460315 ps |
| CPU time | 1.92 seconds |
| Started | Sep 04 06:07:56 AM UTC 24 |
| Finished | Sep 04 06:07:59 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=781130722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 84.usbdev_fifo_levels.781130722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/84.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/84.usbdev_tx_rx_disruption.3532716313 |
| Short name | T3271 |
| Test name | |
| Test status | |
| Simulation time | 513843025 ps |
| CPU time | 1.79 seconds |
| Started | Sep 04 06:07:56 AM UTC 24 |
| Finished | Sep 04 06:07:59 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3532716313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 84.usbdev_t x_rx_disruption.3532716313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/84.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/85.usbdev_endpoint_types.3310236327 |
| Short name | T377 |
| Test name | |
| Test status | |
| Simulation time | 375759733 ps |
| CPU time | 1.88 seconds |
| Started | Sep 04 06:07:56 AM UTC 24 |
| Finished | Sep 04 06:07:59 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3310236327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 85.usbdev_endpoint_types.3310236327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/85.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/85.usbdev_fifo_levels.1686231166 |
| Short name | T545 |
| Test name | |
| Test status | |
| Simulation time | 277012591 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 06:07:56 AM UTC 24 |
| Finished | Sep 04 06:07:59 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1686231166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 85.usbdev_fifo_levels.1686231166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/85.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/85.usbdev_tx_rx_disruption.2278738070 |
| Short name | T3272 |
| Test name | |
| Test status | |
| Simulation time | 554529552 ps |
| CPU time | 2.35 seconds |
| Started | Sep 04 06:07:56 AM UTC 24 |
| Finished | Sep 04 06:08:00 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2278738070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 85.usbdev_t x_rx_disruption.2278738070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/85.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/86.usbdev_endpoint_types.2254206470 |
| Short name | T359 |
| Test name | |
| Test status | |
| Simulation time | 426226396 ps |
| CPU time | 2.36 seconds |
| Started | Sep 04 06:07:56 AM UTC 24 |
| Finished | Sep 04 06:08:00 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2254206470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 86.usbdev_endpoint_types.2254206470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/86.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/86.usbdev_fifo_levels.20268155 |
| Short name | T536 |
| Test name | |
| Test status | |
| Simulation time | 223209018 ps |
| CPU time | 1.09 seconds |
| Started | Sep 04 06:07:56 AM UTC 24 |
| Finished | Sep 04 06:07:59 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=20268155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 86.usbdev_fifo_levels.20268155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/86.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/86.usbdev_tx_rx_disruption.615276143 |
| Short name | T116 |
| Test name | |
| Test status | |
| Simulation time | 602531508 ps |
| CPU time | 1.76 seconds |
| Started | Sep 04 06:07:56 AM UTC 24 |
| Finished | Sep 04 06:07:59 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=615276143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 86.usbdev_tx _rx_disruption.615276143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/86.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/87.usbdev_endpoint_types.73985355 |
| Short name | T3274 |
| Test name | |
| Test status | |
| Simulation time | 272269617 ps |
| CPU time | 1.64 seconds |
| Started | Sep 04 06:07:58 AM UTC 24 |
| Finished | Sep 04 06:08:01 AM UTC 24 |
| Peak memory | 214796 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=73985355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 87.usbdev_endpoint_types.73985355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/87.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/87.usbdev_fifo_levels.1243656126 |
| Short name | T567 |
| Test name | |
| Test status | |
| Simulation time | 259319076 ps |
| CPU time | 1.21 seconds |
| Started | Sep 04 06:07:58 AM UTC 24 |
| Finished | Sep 04 06:08:00 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1243656126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 87.usbdev_fifo_levels.1243656126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/87.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/87.usbdev_tx_rx_disruption.3503781737 |
| Short name | T3276 |
| Test name | |
| Test status | |
| Simulation time | 490445829 ps |
| CPU time | 1.97 seconds |
| Started | Sep 04 06:07:58 AM UTC 24 |
| Finished | Sep 04 06:08:01 AM UTC 24 |
| Peak memory | 214984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3503781737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 87.usbdev_t x_rx_disruption.3503781737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/87.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/88.usbdev_endpoint_types.707180208 |
| Short name | T385 |
| Test name | |
| Test status | |
| Simulation time | 302807457 ps |
| CPU time | 1.93 seconds |
| Started | Sep 04 06:07:58 AM UTC 24 |
| Finished | Sep 04 06:08:01 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=707180208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 88.usbdev_endpoint_types.707180208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/88.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/88.usbdev_fifo_levels.1753794467 |
| Short name | T562 |
| Test name | |
| Test status | |
| Simulation time | 166159045 ps |
| CPU time | 1.25 seconds |
| Started | Sep 04 06:07:58 AM UTC 24 |
| Finished | Sep 04 06:08:00 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1753794467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 88.usbdev_fifo_levels.1753794467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/88.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/88.usbdev_tx_rx_disruption.1578318549 |
| Short name | T3277 |
| Test name | |
| Test status | |
| Simulation time | 560499564 ps |
| CPU time | 1.89 seconds |
| Started | Sep 04 06:07:58 AM UTC 24 |
| Finished | Sep 04 06:08:01 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1578318549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 88.usbdev_t x_rx_disruption.1578318549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/88.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/89.usbdev_endpoint_types.518380536 |
| Short name | T309 |
| Test name | |
| Test status | |
| Simulation time | 787182958 ps |
| CPU time | 1.86 seconds |
| Started | Sep 04 06:07:58 AM UTC 24 |
| Finished | Sep 04 06:08:01 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=518380536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 89.usbdev_endpoint_types.518380536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/89.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/89.usbdev_fifo_levels.3827713606 |
| Short name | T3273 |
| Test name | |
| Test status | |
| Simulation time | 179770693 ps |
| CPU time | 0.87 seconds |
| Started | Sep 04 06:07:58 AM UTC 24 |
| Finished | Sep 04 06:08:00 AM UTC 24 |
| Peak memory | 217084 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3827713606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 89.usbdev_fifo_levels.3827713606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/89.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/89.usbdev_tx_rx_disruption.126949594 |
| Short name | T3284 |
| Test name | |
| Test status | |
| Simulation time | 519338004 ps |
| CPU time | 1.85 seconds |
| Started | Sep 04 06:08:00 AM UTC 24 |
| Finished | Sep 04 06:08:03 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=126949594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 89.usbdev_tx _rx_disruption.126949594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/89.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_alert_test.3400642892 |
| Short name | T1027 |
| Test name | |
| Test status | |
| Simulation time | 100998990 ps |
| CPU time | 1.19 seconds |
| Started | Sep 04 05:49:43 AM UTC 24 |
| Finished | Sep 04 05:49:45 AM UTC 24 |
| Peak memory | 214868 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3400642892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 9.usbdev_alert_test.3400642892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_disconnect.1366212316 |
| Short name | T103 |
| Test name | |
| Test status | |
| Simulation time | 6095583092 ps |
| CPU time | 9.16 seconds |
| Started | Sep 04 05:49:03 AM UTC 24 |
| Finished | Sep 04 05:49:13 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1366212316 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_disconnect.1366212316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_reset.1339574361 |
| Short name | T1009 |
| Test name | |
| Test status | |
| Simulation time | 20148001561 ps |
| CPU time | 26.28 seconds |
| Started | Sep 04 05:49:03 AM UTC 24 |
| Finished | Sep 04 05:49:30 AM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1339574361 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_reset.1339574361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_resume.1045458728 |
| Short name | T1100 |
| Test name | |
| Test status | |
| Simulation time | 29648545408 ps |
| CPU time | 91.65 seconds |
| Started | Sep 04 05:49:03 AM UTC 24 |
| Finished | Sep 04 05:50:36 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1045458728 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_resume.1045458728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_av_buffer.3472409992 |
| Short name | T975 |
| Test name | |
| Test status | |
| Simulation time | 217853369 ps |
| CPU time | 1.69 seconds |
| Started | Sep 04 05:49:04 AM UTC 24 |
| Finished | Sep 04 05:49:07 AM UTC 24 |
| Peak memory | 214996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3472409992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_av_buffer.3472409992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_bitstuff_err.2059789443 |
| Short name | T973 |
| Test name | |
| Test status | |
| Simulation time | 150240201 ps |
| CPU time | 1.33 seconds |
| Started | Sep 04 05:49:04 AM UTC 24 |
| Finished | Sep 04 05:49:06 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2059789443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_bitstuff_err.2059789443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_data_toggle_clear.2806999038 |
| Short name | T976 |
| Test name | |
| Test status | |
| Simulation time | 515975674 ps |
| CPU time | 2.03 seconds |
| Started | Sep 04 05:49:04 AM UTC 24 |
| Finished | Sep 04 05:49:07 AM UTC 24 |
| Peak memory | 217136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2806999038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 9.usbdev_data_toggle_clear.2806999038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_data_toggle_restore.4236930000 |
| Short name | T478 |
| Test name | |
| Test status | |
| Simulation time | 687192722 ps |
| CPU time | 3.88 seconds |
| Started | Sep 04 05:49:04 AM UTC 24 |
| Finished | Sep 04 05:49:09 AM UTC 24 |
| Peak memory | 217036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4236930000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_data_toggle_restore.4236930000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_device_timeout.414756694 |
| Short name | T1011 |
| Test name | |
| Test status | |
| Simulation time | 3583336798 ps |
| CPU time | 23.49 seconds |
| Started | Sep 04 05:49:07 AM UTC 24 |
| Finished | Sep 04 05:49:31 AM UTC 24 |
| Peak memory | 217452 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=414756694 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_device_timeout.414756694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_disable_endpoint.522001407 |
| Short name | T981 |
| Test name | |
| Test status | |
| Simulation time | 493444046 ps |
| CPU time | 2.36 seconds |
| Started | Sep 04 05:49:08 AM UTC 24 |
| Finished | Sep 04 05:49:11 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=522001407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_disable_endpoint.522001407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_disconnected.4091326931 |
| Short name | T979 |
| Test name | |
| Test status | |
| Simulation time | 167849972 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:49:08 AM UTC 24 |
| Finished | Sep 04 05:49:10 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4091326931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_disconnected.4091326931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_enable.1128404975 |
| Short name | T978 |
| Test name | |
| Test status | |
| Simulation time | 53019088 ps |
| CPU time | 1.13 seconds |
| Started | Sep 04 05:49:08 AM UTC 24 |
| Finished | Sep 04 05:49:10 AM UTC 24 |
| Peak memory | 215040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1128404975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 9.usbdev_enable.1128404975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_endpoint_access.3928565817 |
| Short name | T985 |
| Test name | |
| Test status | |
| Simulation time | 927317213 ps |
| CPU time | 4.37 seconds |
| Started | Sep 04 05:49:08 AM UTC 24 |
| Finished | Sep 04 05:49:13 AM UTC 24 |
| Peak memory | 217216 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3928565817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_endpoint_access.3928565817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_fifo_levels.3896473134 |
| Short name | T522 |
| Test name | |
| Test status | |
| Simulation time | 250207953 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 05:49:10 AM UTC 24 |
| Finished | Sep 04 05:49:13 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3896473134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_fifo_levels.3896473134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_fifo_rst.269912309 |
| Short name | T989 |
| Test name | |
| Test status | |
| Simulation time | 285471938 ps |
| CPU time | 3.96 seconds |
| Started | Sep 04 05:49:12 AM UTC 24 |
| Finished | Sep 04 05:49:17 AM UTC 24 |
| Peak memory | 217316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=269912309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_fifo_rst.269912309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_in_iso.4028844006 |
| Short name | T987 |
| Test name | |
| Test status | |
| Simulation time | 215072688 ps |
| CPU time | 1.93 seconds |
| Started | Sep 04 05:49:12 AM UTC 24 |
| Finished | Sep 04 05:49:15 AM UTC 24 |
| Peak memory | 227356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4028844006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 9.usbdev_in_iso.4028844006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_in_stall.221588664 |
| Short name | T988 |
| Test name | |
| Test status | |
| Simulation time | 141097878 ps |
| CPU time | 1.3 seconds |
| Started | Sep 04 05:49:13 AM UTC 24 |
| Finished | Sep 04 05:49:15 AM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=221588664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_in_stall.221588664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_in_trans.3846587001 |
| Short name | T991 |
| Test name | |
| Test status | |
| Simulation time | 211849725 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 05:49:14 AM UTC 24 |
| Finished | Sep 04 05:49:17 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3846587001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_in_trans.3846587001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_invalid_sync.3777103226 |
| Short name | T460 |
| Test name | |
| Test status | |
| Simulation time | 4920782106 ps |
| CPU time | 149.56 seconds |
| Started | Sep 04 05:49:12 AM UTC 24 |
| Finished | Sep 04 05:51:44 AM UTC 24 |
| Peak memory | 229736 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3777103226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 9.usbdev_invalid_sync.3777103226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_iso_retraction.163211516 |
| Short name | T1038 |
| Test name | |
| Test status | |
| Simulation time | 6847601207 ps |
| CPU time | 43.37 seconds |
| Started | Sep 04 05:49:15 AM UTC 24 |
| Finished | Sep 04 05:49:59 AM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=163211516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 9.usbdev_iso_retraction.163211516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_link_in_err.3699827968 |
| Short name | T990 |
| Test name | |
| Test status | |
| Simulation time | 208672860 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 05:49:15 AM UTC 24 |
| Finished | Sep 04 05:49:17 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3699827968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_link_in_err.3699827968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_link_resume.3910181202 |
| Short name | T1020 |
| Test name | |
| Test status | |
| Simulation time | 9188655759 ps |
| CPU time | 22.61 seconds |
| Started | Sep 04 05:49:15 AM UTC 24 |
| Finished | Sep 04 05:49:39 AM UTC 24 |
| Peak memory | 227596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3910181202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_link_resume.3910181202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_link_suspend.2268069654 |
| Short name | T1012 |
| Test name | |
| Test status | |
| Simulation time | 5760405892 ps |
| CPU time | 16.78 seconds |
| Started | Sep 04 05:49:15 AM UTC 24 |
| Finished | Sep 04 05:49:33 AM UTC 24 |
| Peak memory | 227540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2268069654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_link_suspend.2268069654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_low_speed_traffic.13056016 |
| Short name | T1151 |
| Test name | |
| Test status | |
| Simulation time | 4325110446 ps |
| CPU time | 114.98 seconds |
| Started | Sep 04 05:49:15 AM UTC 24 |
| Finished | Sep 04 05:51:12 AM UTC 24 |
| Peak memory | 229716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=13056016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_low_speed_traffic.13056016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_max_inter_pkt_delay.2460619890 |
| Short name | T1095 |
| Test name | |
| Test status | |
| Simulation time | 2746842503 ps |
| CPU time | 76.39 seconds |
| Started | Sep 04 05:49:16 AM UTC 24 |
| Finished | Sep 04 05:50:35 AM UTC 24 |
| Peak memory | 227544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2460619890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_inter_pkt_delay.2460619890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_max_length_in_transaction.454877278 |
| Short name | T995 |
| Test name | |
| Test status | |
| Simulation time | 287893178 ps |
| CPU time | 1.99 seconds |
| Started | Sep 04 05:49:16 AM UTC 24 |
| Finished | Sep 04 05:49:19 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=454877278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 9.usbdev_max_length_in_transaction.454877278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_max_length_out_transaction.2015023927 |
| Short name | T993 |
| Test name | |
| Test status | |
| Simulation time | 187340924 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 05:49:16 AM UTC 24 |
| Finished | Sep 04 05:49:19 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2015023927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 9.usbdev_max_length_out_transaction.2015023927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_max_non_iso_usb_traffic.840849894 |
| Short name | T1024 |
| Test name | |
| Test status | |
| Simulation time | 3216494771 ps |
| CPU time | 23.87 seconds |
| Started | Sep 04 05:49:17 AM UTC 24 |
| Finished | Sep 04 05:49:42 AM UTC 24 |
| Peak memory | 234160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=840849894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_non_iso_usb_traffic.840849894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_max_usb_traffic.3557706333 |
| Short name | T1098 |
| Test name | |
| Test status | |
| Simulation time | 2274245384 ps |
| CPU time | 74.98 seconds |
| Started | Sep 04 05:49:18 AM UTC 24 |
| Finished | Sep 04 05:50:35 AM UTC 24 |
| Peak memory | 234120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3557706333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_usb_traffic.3557706333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_min_inter_pkt_delay.2974688150 |
| Short name | T1112 |
| Test name | |
| Test status | |
| Simulation time | 3168276038 ps |
| CPU time | 85.21 seconds |
| Started | Sep 04 05:49:18 AM UTC 24 |
| Finished | Sep 04 05:50:45 AM UTC 24 |
| Peak memory | 227376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2974688150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_min_inter_pkt_delay.2974688150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_min_length_in_transaction.2190520398 |
| Short name | T998 |
| Test name | |
| Test status | |
| Simulation time | 160561060 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 05:49:20 AM UTC 24 |
| Finished | Sep 04 05:49:22 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2190520398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 9.usbdev_min_length_in_transaction.2190520398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_min_length_out_transaction.34605458 |
| Short name | T997 |
| Test name | |
| Test status | |
| Simulation time | 161119864 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 05:49:20 AM UTC 24 |
| Finished | Sep 04 05:49:22 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=34605458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transacti on_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 9.usbdev_min_length_out_transaction.34605458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_nak_trans.4160992014 |
| Short name | T124 |
| Test name | |
| Test status | |
| Simulation time | 264514922 ps |
| CPU time | 1.77 seconds |
| Started | Sep 04 05:49:20 AM UTC 24 |
| Finished | Sep 04 05:49:23 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4160992014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_nak_trans.4160992014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_out_iso.2934348457 |
| Short name | T999 |
| Test name | |
| Test status | |
| Simulation time | 150971430 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:49:20 AM UTC 24 |
| Finished | Sep 04 05:49:22 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2934348457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_out_iso.2934348457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_out_stall.1432115861 |
| Short name | T1001 |
| Test name | |
| Test status | |
| Simulation time | 176597389 ps |
| CPU time | 1.29 seconds |
| Started | Sep 04 05:49:23 AM UTC 24 |
| Finished | Sep 04 05:49:26 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1432115861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_out_stall.1432115861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_out_trans_nak.1867876609 |
| Short name | T1000 |
| Test name | |
| Test status | |
| Simulation time | 181919610 ps |
| CPU time | 1.16 seconds |
| Started | Sep 04 05:49:23 AM UTC 24 |
| Finished | Sep 04 05:49:25 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1867876609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 9.usbdev_out_trans_nak.1867876609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_pending_in_trans.3888307350 |
| Short name | T1003 |
| Test name | |
| Test status | |
| Simulation time | 198213337 ps |
| CPU time | 1.57 seconds |
| Started | Sep 04 05:49:23 AM UTC 24 |
| Finished | Sep 04 05:49:26 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3888307350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 9.usbdev_pending_in_trans.3888307350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_phy_config_pinflip.2256492721 |
| Short name | T1004 |
| Test name | |
| Test status | |
| Simulation time | 243685377 ps |
| CPU time | 1.83 seconds |
| Started | Sep 04 05:49:23 AM UTC 24 |
| Finished | Sep 04 05:49:26 AM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2256492721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_phy_config_pinflip.2256492721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_phy_config_usb_ref_disable.1480936897 |
| Short name | T1002 |
| Test name | |
| Test status | |
| Simulation time | 136864960 ps |
| CPU time | 1.37 seconds |
| Started | Sep 04 05:49:23 AM UTC 24 |
| Finished | Sep 04 05:49:26 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1480936897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 9.usbdev_phy_config_usb_ref_disable.1480936897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_phy_pins_sense.3411087046 |
| Short name | T1005 |
| Test name | |
| Test status | |
| Simulation time | 57526508 ps |
| CPU time | 1.12 seconds |
| Started | Sep 04 05:49:27 AM UTC 24 |
| Finished | Sep 04 05:49:29 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3411087046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_phy_pins_sense.3411087046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_buffer.3322360659 |
| Short name | T255 |
| Test name | |
| Test status | |
| Simulation time | 16806600395 ps |
| CPU time | 54.09 seconds |
| Started | Sep 04 05:49:27 AM UTC 24 |
| Finished | Sep 04 05:50:22 AM UTC 24 |
| Peak memory | 227624 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3322360659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 9.usbdev_pkt_buffer.3322360659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_received.139388321 |
| Short name | T1006 |
| Test name | |
| Test status | |
| Simulation time | 163629414 ps |
| CPU time | 1.44 seconds |
| Started | Sep 04 05:49:27 AM UTC 24 |
| Finished | Sep 04 05:49:29 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=139388321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_pkt_received.139388321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_sent.1932555708 |
| Short name | T1007 |
| Test name | |
| Test status | |
| Simulation time | 210605816 ps |
| CPU time | 1.51 seconds |
| Started | Sep 04 05:49:27 AM UTC 24 |
| Finished | Sep 04 05:49:29 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1932555708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_pkt_sent.1932555708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_rand_bus_disconnects.1251303232 |
| Short name | T1340 |
| Test name | |
| Test status | |
| Simulation time | 9711046494 ps |
| CPU time | 210.4 seconds |
| Started | Sep 04 05:49:30 AM UTC 24 |
| Finished | Sep 04 05:53:03 AM UTC 24 |
| Peak memory | 232432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1251303232 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_bus_disconnects.1251303232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_rand_bus_resets.3777654034 |
| Short name | T1275 |
| Test name | |
| Test status | |
| Simulation time | 9557079927 ps |
| CPU time | 171.34 seconds |
| Started | Sep 04 05:49:31 AM UTC 24 |
| Finished | Sep 04 05:52:25 AM UTC 24 |
| Peak memory | 229660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3777654034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_bus_resets.3777654034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_rand_suspends.3001983931 |
| Short name | T198 |
| Test name | |
| Test status | |
| Simulation time | 10101743684 ps |
| CPU time | 167.16 seconds |
| Started | Sep 04 05:49:31 AM UTC 24 |
| Finished | Sep 04 05:52:21 AM UTC 24 |
| Peak memory | 229672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3001983931 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_suspends.3001983931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_random_length_in_transaction.2527506626 |
| Short name | T1008 |
| Test name | |
| Test status | |
| Simulation time | 180844355 ps |
| CPU time | 1.56 seconds |
| Started | Sep 04 05:49:27 AM UTC 24 |
| Finished | Sep 04 05:49:30 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2527506626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 9.usbdev_random_length_in_transaction.2527506626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_random_length_out_transaction.540732305 |
| Short name | T1010 |
| Test name | |
| Test status | |
| Simulation time | 232400328 ps |
| CPU time | 1.62 seconds |
| Started | Sep 04 05:49:28 AM UTC 24 |
| Finished | Sep 04 05:49:31 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=540732305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 9.usbdev_random_length_out_transaction.540732305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_resume_link_active.58085321 |
| Short name | T1054 |
| Test name | |
| Test status | |
| Simulation time | 20163305892 ps |
| CPU time | 37.31 seconds |
| Started | Sep 04 05:49:31 AM UTC 24 |
| Finished | Sep 04 05:50:10 AM UTC 24 |
| Peak memory | 217280 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=58085321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 9.usbdev_resume_link_active.58085321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_rx_crc_err.2365727650 |
| Short name | T1014 |
| Test name | |
| Test status | |
| Simulation time | 156008763 ps |
| CPU time | 1.42 seconds |
| Started | Sep 04 05:49:31 AM UTC 24 |
| Finished | Sep 04 05:49:34 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2365727650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 9.usbdev_rx_crc_err.2365727650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_rx_full.2484745516 |
| Short name | T1016 |
| Test name | |
| Test status | |
| Simulation time | 331903310 ps |
| CPU time | 2.19 seconds |
| Started | Sep 04 05:49:32 AM UTC 24 |
| Finished | Sep 04 05:49:35 AM UTC 24 |
| Peak memory | 217092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2484745516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_rx_full.2484745516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_setup_stage.1744578477 |
| Short name | T1015 |
| Test name | |
| Test status | |
| Simulation time | 149497341 ps |
| CPU time | 1.43 seconds |
| Started | Sep 04 05:49:32 AM UTC 24 |
| Finished | Sep 04 05:49:35 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1744578477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_setup_stage.1744578477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_setup_trans_ignored.1558623790 |
| Short name | T1017 |
| Test name | |
| Test status | |
| Simulation time | 191802932 ps |
| CPU time | 1.55 seconds |
| Started | Sep 04 05:49:33 AM UTC 24 |
| Finished | Sep 04 05:49:36 AM UTC 24 |
| Peak memory | 215060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1558623790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 9.usbdev_setup_trans_ignored.1558623790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_smoke.2794466094 |
| Short name | T1018 |
| Test name | |
| Test status | |
| Simulation time | 182885615 ps |
| CPU time | 1.33 seconds |
| Started | Sep 04 05:49:35 AM UTC 24 |
| Finished | Sep 04 05:49:37 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2794466094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_smoke.2794466094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_spurious_pids_ignored.2765998462 |
| Short name | T1043 |
| Test name | |
| Test status | |
| Simulation time | 2175119208 ps |
| CPU time | 25.9 seconds |
| Started | Sep 04 05:49:35 AM UTC 24 |
| Finished | Sep 04 05:50:02 AM UTC 24 |
| Peak memory | 234304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2765998462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 9.usbdev_spurious_pids_ignored.2765998462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_stall_priority_over_nak.4106356173 |
| Short name | T1019 |
| Test name | |
| Test status | |
| Simulation time | 187588865 ps |
| CPU time | 1.53 seconds |
| Started | Sep 04 05:49:36 AM UTC 24 |
| Finished | Sep 04 05:49:38 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4106356173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stall_priority_over_nak.4106356173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_stall_trans.246248453 |
| Short name | T1021 |
| Test name | |
| Test status | |
| Simulation time | 178116663 ps |
| CPU time | 1.5 seconds |
| Started | Sep 04 05:49:37 AM UTC 24 |
| Finished | Sep 04 05:49:39 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=246248453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 9.usbdev_stall_trans.246248453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_stream_len_max.3141519096 |
| Short name | T1022 |
| Test name | |
| Test status | |
| Simulation time | 499901513 ps |
| CPU time | 2.85 seconds |
| Started | Sep 04 05:49:38 AM UTC 24 |
| Finished | Sep 04 05:49:42 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3141519096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stream_len_max.3141519096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_streaming_out.1447132015 |
| Short name | T1044 |
| Test name | |
| Test status | |
| Simulation time | 2298270261 ps |
| CPU time | 24.76 seconds |
| Started | Sep 04 05:49:37 AM UTC 24 |
| Finished | Sep 04 05:50:03 AM UTC 24 |
| Peak memory | 227532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1447132015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_streaming_out.1447132015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_stress_usb_traffic.42857392 |
| Short name | T166 |
| Test name | |
| Test status | |
| Simulation time | 12827398774 ps |
| CPU time | 363.12 seconds |
| Started | Sep 04 05:49:39 AM UTC 24 |
| Finished | Sep 04 05:55:47 AM UTC 24 |
| Peak memory | 236896 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=42857392 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03 /usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stress_usb_traffic.42857392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_timeout_missing_host_handshake.3689586670 |
| Short name | T994 |
| Test name | |
| Test status | |
| Simulation time | 1064424657 ps |
| CPU time | 11.24 seconds |
| Started | Sep 04 05:49:07 AM UTC 24 |
| Finished | Sep 04 05:49:19 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3689586670 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_timeout_missing_host_handshake.3689586670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/9.usbdev_tx_rx_disruption.639227322 |
| Short name | T1026 |
| Test name | |
| Test status | |
| Simulation time | 419350128 ps |
| CPU time | 1.71 seconds |
| Started | Sep 04 05:49:40 AM UTC 24 |
| Finished | Sep 04 05:49:43 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=639227322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_tx_ rx_disruption.639227322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/9.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/90.usbdev_endpoint_types.579284000 |
| Short name | T3282 |
| Test name | |
| Test status | |
| Simulation time | 236058486 ps |
| CPU time | 1.6 seconds |
| Started | Sep 04 06:08:00 AM UTC 24 |
| Finished | Sep 04 06:08:02 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=579284000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 90.usbdev_endpoint_types.579284000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/90.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/90.usbdev_fifo_levels.1753980824 |
| Short name | T3278 |
| Test name | |
| Test status | |
| Simulation time | 163205850 ps |
| CPU time | 1.06 seconds |
| Started | Sep 04 06:08:00 AM UTC 24 |
| Finished | Sep 04 06:08:02 AM UTC 24 |
| Peak memory | 214548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1753980824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 90.usbdev_fifo_levels.1753980824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/90.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/90.usbdev_tx_rx_disruption.3809476120 |
| Short name | T3281 |
| Test name | |
| Test status | |
| Simulation time | 534357484 ps |
| CPU time | 1.49 seconds |
| Started | Sep 04 06:08:00 AM UTC 24 |
| Finished | Sep 04 06:08:02 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3809476120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 90.usbdev_t x_rx_disruption.3809476120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/90.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/91.usbdev_endpoint_types.2682834754 |
| Short name | T389 |
| Test name | |
| Test status | |
| Simulation time | 612812172 ps |
| CPU time | 2.25 seconds |
| Started | Sep 04 06:08:00 AM UTC 24 |
| Finished | Sep 04 06:08:03 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2682834754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 91.usbdev_endpoint_types.2682834754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/91.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/91.usbdev_fifo_levels.613716236 |
| Short name | T3279 |
| Test name | |
| Test status | |
| Simulation time | 165966318 ps |
| CPU time | 1.1 seconds |
| Started | Sep 04 06:08:00 AM UTC 24 |
| Finished | Sep 04 06:08:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=613716236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 91.usbdev_fifo_levels.613716236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/91.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/91.usbdev_tx_rx_disruption.712275759 |
| Short name | T3285 |
| Test name | |
| Test status | |
| Simulation time | 519535568 ps |
| CPU time | 1.76 seconds |
| Started | Sep 04 06:08:00 AM UTC 24 |
| Finished | Sep 04 06:08:03 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=712275759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 91.usbdev_tx _rx_disruption.712275759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/91.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/92.usbdev_endpoint_types.2206376552 |
| Short name | T347 |
| Test name | |
| Test status | |
| Simulation time | 239320443 ps |
| CPU time | 1.63 seconds |
| Started | Sep 04 06:08:00 AM UTC 24 |
| Finished | Sep 04 06:08:03 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2206376552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 92.usbdev_endpoint_types.2206376552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/92.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/92.usbdev_fifo_levels.4294398858 |
| Short name | T3283 |
| Test name | |
| Test status | |
| Simulation time | 182079528 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 06:08:00 AM UTC 24 |
| Finished | Sep 04 06:08:03 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4294398858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 92.usbdev_fifo_levels.4294398858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/92.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/92.usbdev_tx_rx_disruption.1917128671 |
| Short name | T3286 |
| Test name | |
| Test status | |
| Simulation time | 550419704 ps |
| CPU time | 1.73 seconds |
| Started | Sep 04 06:08:00 AM UTC 24 |
| Finished | Sep 04 06:08:03 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1917128671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 92.usbdev_t x_rx_disruption.1917128671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/92.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/93.usbdev_endpoint_types.94152146 |
| Short name | T384 |
| Test name | |
| Test status | |
| Simulation time | 386543081 ps |
| CPU time | 2.11 seconds |
| Started | Sep 04 06:08:00 AM UTC 24 |
| Finished | Sep 04 06:08:03 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=94152146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 93.usbdev_endpoint_types.94152146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/93.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/93.usbdev_fifo_levels.1863068820 |
| Short name | T3280 |
| Test name | |
| Test status | |
| Simulation time | 248126088 ps |
| CPU time | 1.06 seconds |
| Started | Sep 04 06:08:00 AM UTC 24 |
| Finished | Sep 04 06:08:02 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1863068820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 93.usbdev_fifo_levels.1863068820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/93.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/93.usbdev_tx_rx_disruption.3701323410 |
| Short name | T3291 |
| Test name | |
| Test status | |
| Simulation time | 571900277 ps |
| CPU time | 2.25 seconds |
| Started | Sep 04 06:08:02 AM UTC 24 |
| Finished | Sep 04 06:08:05 AM UTC 24 |
| Peak memory | 216456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3701323410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 93.usbdev_t x_rx_disruption.3701323410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/93.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/94.usbdev_endpoint_types.2121049752 |
| Short name | T338 |
| Test name | |
| Test status | |
| Simulation time | 630483993 ps |
| CPU time | 2.03 seconds |
| Started | Sep 04 06:08:02 AM UTC 24 |
| Finished | Sep 04 06:08:05 AM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2121049752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 94.usbdev_endpoint_types.2121049752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/94.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/94.usbdev_tx_rx_disruption.692852016 |
| Short name | T3289 |
| Test name | |
| Test status | |
| Simulation time | 649692868 ps |
| CPU time | 1.76 seconds |
| Started | Sep 04 06:08:02 AM UTC 24 |
| Finished | Sep 04 06:08:05 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=692852016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 94.usbdev_tx _rx_disruption.692852016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/94.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/95.usbdev_endpoint_types.3696474937 |
| Short name | T314 |
| Test name | |
| Test status | |
| Simulation time | 482827350 ps |
| CPU time | 1.52 seconds |
| Started | Sep 04 06:08:02 AM UTC 24 |
| Finished | Sep 04 06:08:05 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3696474937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 95.usbdev_endpoint_types.3696474937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/95.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/95.usbdev_fifo_levels.1234395624 |
| Short name | T3288 |
| Test name | |
| Test status | |
| Simulation time | 269904897 ps |
| CPU time | 1.62 seconds |
| Started | Sep 04 06:08:02 AM UTC 24 |
| Finished | Sep 04 06:08:05 AM UTC 24 |
| Peak memory | 215052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1234395624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 95.usbdev_fifo_levels.1234395624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/95.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/95.usbdev_tx_rx_disruption.2367305152 |
| Short name | T3292 |
| Test name | |
| Test status | |
| Simulation time | 627396084 ps |
| CPU time | 2.61 seconds |
| Started | Sep 04 06:08:02 AM UTC 24 |
| Finished | Sep 04 06:08:06 AM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2367305152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 95.usbdev_t x_rx_disruption.2367305152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/95.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/96.usbdev_endpoint_types.725876790 |
| Short name | T434 |
| Test name | |
| Test status | |
| Simulation time | 410897937 ps |
| CPU time | 1.45 seconds |
| Started | Sep 04 06:08:02 AM UTC 24 |
| Finished | Sep 04 06:08:05 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=725876790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 96.usbdev_endpoint_types.725876790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/96.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/96.usbdev_fifo_levels.415353957 |
| Short name | T502 |
| Test name | |
| Test status | |
| Simulation time | 260600716 ps |
| CPU time | 1.13 seconds |
| Started | Sep 04 06:08:02 AM UTC 24 |
| Finished | Sep 04 06:08:05 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=415353957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 96.usbdev_fifo_levels.415353957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/96.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/96.usbdev_tx_rx_disruption.684059903 |
| Short name | T3290 |
| Test name | |
| Test status | |
| Simulation time | 474478553 ps |
| CPU time | 1.76 seconds |
| Started | Sep 04 06:08:02 AM UTC 24 |
| Finished | Sep 04 06:08:05 AM UTC 24 |
| Peak memory | 215068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=684059903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 96.usbdev_tx _rx_disruption.684059903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/96.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/97.usbdev_endpoint_types.607421636 |
| Short name | T414 |
| Test name | |
| Test status | |
| Simulation time | 314205621 ps |
| CPU time | 1.61 seconds |
| Started | Sep 04 06:08:02 AM UTC 24 |
| Finished | Sep 04 06:08:05 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=607421636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 97.usbdev_endpoint_types.607421636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/97.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/97.usbdev_fifo_levels.1361404378 |
| Short name | T3293 |
| Test name | |
| Test status | |
| Simulation time | 275954951 ps |
| CPU time | 1.27 seconds |
| Started | Sep 04 06:08:03 AM UTC 24 |
| Finished | Sep 04 06:08:06 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1361404378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 97.usbdev_fifo_levels.1361404378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/97.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/97.usbdev_tx_rx_disruption.3534505089 |
| Short name | T3298 |
| Test name | |
| Test status | |
| Simulation time | 420922180 ps |
| CPU time | 1.95 seconds |
| Started | Sep 04 06:08:03 AM UTC 24 |
| Finished | Sep 04 06:08:07 AM UTC 24 |
| Peak memory | 215064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3534505089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 97.usbdev_t x_rx_disruption.3534505089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/97.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/98.usbdev_endpoint_types.2188451470 |
| Short name | T3294 |
| Test name | |
| Test status | |
| Simulation time | 253951304 ps |
| CPU time | 1.28 seconds |
| Started | Sep 04 06:08:03 AM UTC 24 |
| Finished | Sep 04 06:08:06 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2188451470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 98.usbdev_endpoint_types.2188451470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/98.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/98.usbdev_tx_rx_disruption.1355203343 |
| Short name | T3297 |
| Test name | |
| Test status | |
| Simulation time | 546886239 ps |
| CPU time | 1.72 seconds |
| Started | Sep 04 06:08:04 AM UTC 24 |
| Finished | Sep 04 06:08:06 AM UTC 24 |
| Peak memory | 214988 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1355203343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 98.usbdev_t x_rx_disruption.1355203343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/98.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/99.usbdev_endpoint_types.160352108 |
| Short name | T368 |
| Test name | |
| Test status | |
| Simulation time | 247315007 ps |
| CPU time | 1.16 seconds |
| Started | Sep 04 06:08:04 AM UTC 24 |
| Finished | Sep 04 06:08:06 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=160352108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 99.usbdev_endpoint_types.160352108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/99.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/99.usbdev_fifo_levels.1585067215 |
| Short name | T542 |
| Test name | |
| Test status | |
| Simulation time | 296132385 ps |
| CPU time | 1.58 seconds |
| Started | Sep 04 06:08:04 AM UTC 24 |
| Finished | Sep 04 06:08:07 AM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1585067215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_levels_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 99.usbdev_fifo_levels.1585067215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/99.usbdev_fifo_levels/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default/99.usbdev_tx_rx_disruption.493411583 |
| Short name | T3299 |
| Test name | |
| Test status | |
| Simulation time | 513881646 ps |
| CPU time | 2.12 seconds |
| Started | Sep 04 06:08:04 AM UTC 24 |
| Finished | Sep 04 06:08:07 AM UTC 24 |
| Peak memory | 217100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=493411583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 99.usbdev_tx _rx_disruption.493411583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_09_03/usbdev-sim-vcs/99.usbdev_tx_rx_disruption/latest |
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |