Unified Coverage Report :: Group :: usbdev_env_pkg::usbdev_env_cov::crc16_cg

Group : usbdev_env_pkg::usbdev_env_cov::crc16_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_10_02/usbdev-sim-vcs/default/sim-vcs/../src/lowrisc_dv_usbdev_env_0.1/usbdev_env_cov.sv

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Summary for Group usbdev_env_pkg::usbdev_env_cov::crc16_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group usbdev_env_pkg::usbdev_env_cov::crc16_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_crc16	2	0	2	100.00	100	1	1	0
cp_dir	2	0	2	100.00	100	1	1	2

Crosses for Group usbdev_env_pkg::usbdev_env_cov::crc16_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_crc16_X_dir	4	0	4	100.00	100	1	1	0

Summary for Variable cp_crc16

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_crc16

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

six_ones

17

1

T120

1

T551

2

T179

1

all_ones

8

1

T552

2

T553

2

T554

2

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Summary for Variable cp_dir

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_dir

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

109767

1

T1

1

T2

1

T28

1

auto[1]

45836

1

T29

5

T30

12

T32

12

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Summary for Cross cr_crc16_X_dir

Samples crossed: cp_crc16 cp_dir

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cr_crc16_X_dir

Bins

cp_crc16

cp_dir

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

six_ones

auto[0]

11

1

T120

1

T551

1

T179

1

six_ones

auto[1]

6

1

T551

1

T555

1

T556

1

all_ones

auto[0]

5

1

T552

1

T553

1

T554

1

all_ones

auto[1]

3

1

T552

1

T553

1

T554

1