Unified Coverage Report :: Group :: usbdev_env_pkg::usbdev_env_cov::address_cg

Group : usbdev_env_pkg::usbdev_env_cov::address_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_10_11/usbdev-sim-vcs/default/sim-vcs/../src/lowrisc_dv_usbdev_env_0.1/usbdev_env_cov.sv

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Summary for Group usbdev_env_pkg::usbdev_env_cov::address_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	9	0	9	100.00
Crosses	14	0	14	100.00

Variables for Group usbdev_env_pkg::usbdev_env_cov::address_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_address	7	0	7	100.00	100	1	1	0
cp_endp	2	0	2	100.00	100	1	1	0

Crosses for Group usbdev_env_pkg::usbdev_env_cov::address_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_address_X_endp	14	0	14	100.00	100	1	1	0

Summary for Variable cp_address

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	7	0	7	100.00

User Defined Bins for cp_address

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
range_127	616	1			T60	5		T44	3		T409	1
range_16_to_126	156261	1			T2	1		T3	1		T17	1
fifteen	940	1			T60	3		T110	5		T111	4
range_2_to_14	18479	1			T21	1		T27	1		T31	11
seven	1670	1			T60	4		T110	2		T111	3
one	1165	1			T60	5		T110	5		T111	5
zero	2949	1			T60	6		T581	5		T110	4

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Summary for Variable cp_endp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_endp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

seven

13269

1

T19

2

T26

2

T8

2

three

12558

1

T19

3

T21

2

T26

2

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Summary for Cross cr_address_X_endp

Samples crossed: cp_address cp_endp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	14	0	14	100.00

Automatically Generated Cross Bins for cr_address_X_endp

Bins

cp_address	cp_endp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
range_127	seven	36	1			T158	1		T164	2		T165	1
range_127	three	50	1			T433	1		T216	9		T427	1
range_16_to_126	seven	11652	1			T19	2		T26	2		T8	2
range_16_to_126	three	10709	1			T19	3		T21	2		T26	2
fifteen	seven	40	1			T476	1		T582	1		T583	1
fifteen	three	51	1			T110	1		T584	1		T450	1
range_2_to_14	seven	1329	1			T60	7		T148	15		T585	21
range_2_to_14	three	1555	1			T100	1		T60	7		T148	15
seven	seven	151	1			T158	1		T427	1		T586	1
seven	three	95	1			T158	1		T165	1		T427	1
one	seven	81	1			T60	1		T110	2		T158	2
one	three	74	1			T60	1		T165	1		T587	1
zero	seven	131	1			T169	7		T427	1		T587	1
zero	three	119	1			T60	1		T111	2		T588	17