Unified Coverage Report :: Group :: usbdev_env_pkg::usbdev_env_cov::crc16_cg

Group : usbdev_env_pkg::usbdev_env_cov::crc16_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression/usbdev-sim-vcs/default/sim-vcs/../src/lowrisc_dv_usbdev_env_0.1/usbdev_env_cov.sv

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Summary for Group usbdev_env_pkg::usbdev_env_cov::crc16_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	4	0	4	100.00
Crosses	4	0	4	100.00

Variables for Group usbdev_env_pkg::usbdev_env_cov::crc16_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_crc16	2	0	2	100.00	100	1	1	0
cp_dir	2	0	2	100.00	100	1	1	2

Crosses for Group usbdev_env_pkg::usbdev_env_cov::crc16_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_crc16_X_dir	4	0	4	100.00	100	1	1	0

Summary for Variable cp_crc16

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_crc16

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

six_ones

17

1

T186

2

T502

2

T503

1

all_ones

6

1

T114

1

T247

2

T182

2

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Summary for Variable cp_dir

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Automatically Generated Bins	2	0	2	100.00

Automatically Generated Bins for cp_dir

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

auto[0]

109747

1

T2

1

T3

1

T34

1

auto[1]

46319

1

T28

2

T29

1

T30

18

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Summary for Cross cr_crc16_X_dir

Samples crossed: cp_crc16 cp_dir

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	4	0	4	100.00

Automatically Generated Cross Bins for cr_crc16_X_dir

Bins

cp_crc16	cp_dir	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
six_ones	auto[0]	15	1			T186	2		T502	1		T503	1
six_ones	auto[1]	2	1			T502	1		T504	1		-	-
all_ones	auto[0]	4	1			T114	1		T247	1		T182	1
all_ones	auto[1]	2	1			T247	1		T182	1		-	-