Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
97.36 98.21 96.00 97.44 94.92 98.38 98.21 98.37


Total tests in report: 3808
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
64.97 64.97 86.84 86.84 66.77 66.77 58.10 58.10 50.85 50.85 79.53 79.53 91.07 91.07 21.63 21.63 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_restore.3298721409
71.77 6.80 87.98 1.14 71.93 5.16 81.34 23.24 52.54 1.69 82.03 2.50 91.07 0.00 35.48 13.85 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_host_lost.3252128701
75.84 4.07 90.32 2.34 79.35 7.42 82.62 1.28 59.32 6.78 87.40 5.37 91.07 0.00 40.81 5.34 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_low_speed_traffic.893166491
79.26 3.42 92.57 2.24 82.04 2.69 84.54 1.92 71.19 11.86 89.43 2.04 93.06 1.98 41.99 1.18 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_reset.3418765806
82.02 2.77 94.49 1.92 87.30 5.26 88.38 3.84 71.19 0.00 95.30 5.87 93.45 0.40 44.07 2.08 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_disable_endpoint.399512473
84.22 2.20 95.19 0.70 87.42 0.12 90.51 2.13 71.19 0.00 95.30 0.00 93.65 0.20 56.29 12.22 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_intr_test.174716824
85.39 1.17 96.29 1.10 88.01 0.59 91.36 0.85 71.19 0.00 95.34 0.04 96.23 2.58 59.28 2.99 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_mem_rw_with_rand_reset.1199784017
86.29 0.91 96.46 0.17 88.27 0.26 91.90 0.53 76.27 5.08 95.63 0.29 96.23 0.00 59.28 0.00 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_disconnect.1270468589
87.15 0.86 96.58 0.11 88.61 0.33 91.90 0.00 76.27 0.00 95.76 0.12 96.23 0.00 64.71 5.43 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_device_address.759590101
87.82 0.67 96.60 0.02 88.68 0.07 95.74 3.84 76.27 0.00 95.80 0.04 96.43 0.20 65.25 0.54 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_sec_cm.1995721165
88.37 0.55 96.65 0.06 90.44 1.76 95.74 0.00 76.27 0.00 95.88 0.08 96.83 0.40 66.79 1.54 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_stress_usb_traffic.2655250718
88.92 0.55 96.83 0.17 90.53 0.10 95.74 0.00 79.66 3.39 96.05 0.17 96.83 0.00 66.79 0.00 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_osc_test_mode.1016218860
89.41 0.49 96.84 0.02 90.53 0.00 95.74 0.00 83.05 3.39 96.09 0.04 96.83 0.00 66.79 0.00 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_disconnect.1998357732
89.89 0.48 96.84 0.00 90.53 0.00 95.74 0.00 86.44 3.39 96.09 0.00 96.83 0.00 66.79 0.00 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/111.usbdev_tx_rx_disruption.1562576968
90.33 0.43 97.59 0.74 91.65 1.12 95.74 0.00 86.44 0.00 97.25 1.16 96.83 0.00 66.79 0.00 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_phy_pins_sense.2161316247
90.74 0.41 97.91 0.32 92.72 1.07 95.74 0.00 86.44 0.00 97.92 0.67 96.83 0.00 67.60 0.81 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_sync.176749417
91.11 0.37 97.91 0.00 92.72 0.00 95.74 0.00 86.44 0.00 97.92 0.00 96.83 0.00 70.23 2.62 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_intr_test.396098910
91.46 0.35 97.93 0.02 92.82 0.10 95.95 0.21 88.14 1.69 97.96 0.04 96.83 0.00 70.59 0.36 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_link_resume.3757035012
91.80 0.34 97.93 0.00 92.86 0.05 96.16 0.21 89.83 1.69 97.96 0.00 96.83 0.00 71.04 0.45 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_disconnected.544489410
92.08 0.28 97.95 0.02 93.05 0.19 96.16 0.00 89.83 0.00 98.00 0.04 96.83 0.00 72.76 1.72 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_intg_err.585722132
92.33 0.24 97.95 0.00 93.05 0.00 96.16 0.00 91.53 1.69 98.00 0.00 96.83 0.00 72.76 0.00 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_reset.4253991931
92.57 0.24 97.95 0.00 93.05 0.00 96.16 0.00 93.22 1.69 98.00 0.00 96.83 0.00 72.76 0.00 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/197.usbdev_tx_rx_disruption.1072437383
92.81 0.24 97.95 0.00 93.05 0.00 96.16 0.00 94.92 1.69 98.00 0.00 96.83 0.00 72.76 0.00 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/206.usbdev_tx_rx_disruption.934833976
93.02 0.21 97.95 0.00 93.05 0.00 96.16 0.00 94.92 0.00 98.00 0.00 96.83 0.00 74.21 1.45 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_device_address.809814690
93.22 0.20 97.95 0.00 93.29 0.24 96.38 0.21 94.92 0.00 98.04 0.04 96.83 0.00 75.11 0.90 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_rx_full.773224400
93.41 0.20 97.95 0.00 93.29 0.00 96.38 0.00 94.92 0.00 98.04 0.00 98.21 1.39 75.11 0.00 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_partial_access.483860518
93.57 0.16 97.95 0.00 93.29 0.00 96.38 0.00 94.92 0.00 98.04 0.00 98.21 0.00 76.20 1.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/35.usbdev_endpoint_types.3625046125
93.70 0.13 97.95 0.00 93.29 0.00 96.38 0.00 94.92 0.00 98.04 0.00 98.21 0.00 77.10 0.90 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_types.404622636
93.82 0.12 97.95 0.00 94.15 0.86 96.38 0.00 94.92 0.00 98.04 0.00 98.21 0.00 77.10 0.00 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_errors.294285526
93.94 0.12 97.95 0.00 94.17 0.02 96.38 0.00 94.92 0.00 98.04 0.00 98.21 0.00 77.92 0.81 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/8.usbdev_device_address.4264785865
94.05 0.11 98.02 0.08 94.31 0.14 96.38 0.00 94.92 0.00 98.21 0.17 98.21 0.00 78.28 0.36 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_fifo_levels.3105686433
94.15 0.10 98.02 0.00 94.31 0.00 96.38 0.00 94.92 0.00 98.21 0.00 98.21 0.00 79.00 0.72 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_endpoint_types.1261869382
94.25 0.10 98.02 0.00 94.31 0.00 96.38 0.00 94.92 0.00 98.21 0.00 98.21 0.00 79.73 0.72 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/60.usbdev_endpoint_types.3301253405
94.36 0.10 98.02 0.00 94.36 0.05 96.59 0.21 94.92 0.00 98.21 0.00 98.21 0.00 80.18 0.45 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_bitstuff_err.4089542670
94.46 0.10 98.02 0.00 94.41 0.05 96.80 0.21 94.92 0.00 98.21 0.00 98.21 0.00 80.63 0.45 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_rx_crc_err.3815614874
94.55 0.09 98.02 0.00 94.41 0.00 96.80 0.00 94.92 0.00 98.21 0.00 98.21 0.00 81.27 0.63 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_intr_test.1170575499
94.64 0.09 98.02 0.00 94.41 0.00 96.80 0.00 94.92 0.00 98.21 0.00 98.21 0.00 81.90 0.63 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_restore.3130589828
94.73 0.09 98.02 0.00 94.41 0.00 96.80 0.00 94.92 0.00 98.21 0.00 98.21 0.00 82.53 0.63 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/72.usbdev_endpoint_types.3557016582
94.82 0.09 98.02 0.00 94.46 0.05 97.01 0.21 94.92 0.00 98.21 0.00 98.21 0.00 82.90 0.36 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_received.3064055014
94.90 0.08 98.02 0.00 94.46 0.00 97.01 0.00 94.92 0.00 98.21 0.00 98.21 0.00 83.44 0.54 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_endpoint_types.867162548
94.97 0.08 98.02 0.00 94.46 0.00 97.01 0.00 94.92 0.00 98.21 0.00 98.21 0.00 83.98 0.54 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/151.usbdev_endpoint_types.2580783259
95.05 0.08 98.02 0.00 94.46 0.00 97.01 0.00 94.92 0.00 98.21 0.00 98.21 0.00 84.52 0.54 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/188.usbdev_endpoint_types.4106380812
95.13 0.08 98.02 0.00 94.46 0.00 97.01 0.00 94.92 0.00 98.21 0.00 98.21 0.00 85.07 0.54 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/33.usbdev_endpoint_types.1828853615
95.19 0.06 98.02 0.00 94.46 0.00 97.01 0.00 94.92 0.00 98.21 0.00 98.21 0.00 85.52 0.45 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/153.usbdev_endpoint_types.342834631
95.26 0.06 98.02 0.00 94.46 0.00 97.01 0.00 94.92 0.00 98.21 0.00 98.21 0.00 85.97 0.45 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_endpoint_types.749974365
95.32 0.06 98.02 0.00 94.46 0.00 97.01 0.00 94.92 0.00 98.21 0.00 98.21 0.00 86.43 0.45 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/41.usbdev_endpoint_types.1804728695
95.38 0.06 98.02 0.00 94.53 0.07 97.01 0.00 94.92 0.00 98.21 0.00 98.21 0.00 86.79 0.36 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority.1080315
95.45 0.06 98.02 0.00 94.60 0.07 97.01 0.00 94.92 0.00 98.21 0.00 98.21 0.00 87.15 0.36 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_low_speed_traffic.3837020665
95.50 0.05 98.02 0.00 94.60 0.00 97.01 0.00 94.92 0.00 98.21 0.00 98.21 0.00 87.51 0.36 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_intg_err.261185726
95.55 0.05 98.02 0.00 94.60 0.00 97.01 0.00 94.92 0.00 98.21 0.00 98.21 0.00 87.87 0.36 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/119.usbdev_endpoint_types.3437022718
95.60 0.05 98.02 0.00 94.60 0.00 97.01 0.00 94.92 0.00 98.21 0.00 98.21 0.00 88.24 0.36 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/184.usbdev_endpoint_types.198079378
95.65 0.05 98.02 0.00 94.60 0.00 97.01 0.00 94.92 0.00 98.21 0.00 98.21 0.00 88.60 0.36 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/76.usbdev_endpoint_types.214998719
95.70 0.05 98.08 0.06 94.67 0.07 97.23 0.21 94.92 0.00 98.21 0.00 98.21 0.00 88.60 0.00 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_alert_test.3536454253
95.74 0.04 98.08 0.00 94.70 0.02 97.23 0.00 94.92 0.00 98.21 0.00 98.21 0.00 88.87 0.27 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_device_address.2668793071
95.78 0.04 98.08 0.00 94.70 0.00 97.23 0.00 94.92 0.00 98.21 0.00 98.21 0.00 89.14 0.27 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/21.usbdev_intr_test.2885285093
95.82 0.04 98.08 0.00 94.70 0.00 97.23 0.00 94.92 0.00 98.21 0.00 98.21 0.00 89.41 0.27 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/105.usbdev_endpoint_types.753844078
95.86 0.04 98.08 0.00 94.70 0.00 97.23 0.00 94.92 0.00 98.21 0.00 98.21 0.00 89.68 0.27 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/109.usbdev_endpoint_types.498291410
95.90 0.04 98.08 0.00 94.70 0.00 97.23 0.00 94.92 0.00 98.21 0.00 98.21 0.00 89.95 0.27 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/145.usbdev_endpoint_types.818110129
95.94 0.04 98.08 0.00 94.70 0.00 97.23 0.00 94.92 0.00 98.21 0.00 98.21 0.00 90.23 0.27 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/19.usbdev_data_toggle_restore.2577578000
95.98 0.04 98.08 0.00 94.70 0.00 97.23 0.00 94.92 0.00 98.21 0.00 98.21 0.00 90.50 0.27 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/28.usbdev_endpoint_types.1099642271
96.02 0.04 98.08 0.00 94.70 0.00 97.23 0.00 94.92 0.00 98.21 0.00 98.21 0.00 90.77 0.27 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_endpoint_types.2365537185
96.06 0.04 98.08 0.00 94.70 0.00 97.23 0.00 94.92 0.00 98.21 0.00 98.21 0.00 91.04 0.27 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/30.usbdev_invalid_sync.2312654502
96.09 0.04 98.10 0.02 94.72 0.02 97.23 0.00 94.92 0.00 98.25 0.04 98.21 0.00 91.22 0.18 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_tx_rx_disruption.1358174258
96.13 0.03 98.10 0.00 94.77 0.05 97.23 0.00 94.92 0.00 98.25 0.00 98.21 0.00 91.40 0.18 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_av_empty.3504936839
96.16 0.03 98.10 0.00 94.77 0.00 97.44 0.21 94.92 0.00 98.25 0.00 98.21 0.00 91.40 0.00 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_tx_rx_disruption.3466834832
96.18 0.03 98.10 0.00 94.96 0.19 97.44 0.00 94.92 0.00 98.25 0.00 98.21 0.00 91.40 0.00 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_av_overflow.3813746875
96.21 0.03 98.10 0.00 94.96 0.00 97.44 0.00 94.92 0.00 98.25 0.00 98.21 0.00 91.58 0.18 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_dpi_config_host.2354378190
96.23 0.03 98.10 0.00 94.96 0.00 97.44 0.00 94.92 0.00 98.25 0.00 98.21 0.00 91.76 0.18 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_stall_priority_over_nak.2586658087
96.26 0.03 98.10 0.00 94.96 0.00 97.44 0.00 94.92 0.00 98.25 0.00 98.21 0.00 91.95 0.18 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/103.usbdev_endpoint_types.3815081085
96.29 0.03 98.10 0.00 94.96 0.00 97.44 0.00 94.92 0.00 98.25 0.00 98.21 0.00 92.13 0.18 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/104.usbdev_endpoint_types.1758846772
96.31 0.03 98.10 0.00 94.96 0.00 97.44 0.00 94.92 0.00 98.25 0.00 98.21 0.00 92.31 0.18 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/107.usbdev_endpoint_types.2906006254
96.34 0.03 98.10 0.00 94.96 0.00 97.44 0.00 94.92 0.00 98.25 0.00 98.21 0.00 92.49 0.18 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/143.usbdev_endpoint_types.1377553183
96.36 0.03 98.10 0.00 94.96 0.00 97.44 0.00 94.92 0.00 98.25 0.00 98.21 0.00 92.67 0.18 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/157.usbdev_endpoint_types.2181218537
96.39 0.03 98.10 0.00 94.96 0.00 97.44 0.00 94.92 0.00 98.25 0.00 98.21 0.00 92.85 0.18 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/23.usbdev_endpoint_types.222255987
96.42 0.03 98.10 0.00 94.96 0.00 97.44 0.00 94.92 0.00 98.25 0.00 98.21 0.00 93.03 0.18 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_fifo_levels.3841117202
96.44 0.03 98.10 0.00 94.96 0.00 97.44 0.00 94.92 0.00 98.25 0.00 98.21 0.00 93.21 0.18 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/48.usbdev_endpoint_types.925342185
96.47 0.03 98.10 0.00 94.96 0.00 97.44 0.00 94.92 0.00 98.25 0.00 98.21 0.00 93.39 0.18 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/5.usbdev_endpoint_types.4030813160
96.49 0.02 98.16 0.06 94.98 0.02 97.44 0.00 94.92 0.00 98.25 0.00 98.21 0.00 93.48 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_nak_trans.1127445918
96.52 0.02 98.19 0.04 94.98 0.00 97.44 0.00 94.92 0.00 98.29 0.04 98.21 0.00 93.57 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_fifo_levels.2380521669
96.54 0.02 98.21 0.02 95.08 0.10 97.44 0.00 94.92 0.00 98.34 0.04 98.21 0.00 93.57 0.00 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_rand_suspends.541182243
96.56 0.02 98.21 0.00 95.22 0.14 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 93.57 0.00 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/7.usbdev_stress_usb_traffic.1922991146
96.58 0.02 98.21 0.00 95.24 0.02 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 93.67 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_buffer.574914570
96.59 0.01 98.21 0.00 95.34 0.10 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 93.67 0.00 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_phy_pins_sense.2657276769
96.60 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 93.76 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_intg_err.1460981603
96.61 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 93.85 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_freq_loclk.3001041194
96.63 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 93.94 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_rx_full.1121105139
96.64 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 94.03 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_data_toggle_restore.3045455027
96.65 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 94.12 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/101.usbdev_fifo_levels.2039378340
96.67 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 94.21 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/103.usbdev_fifo_levels.349037316
96.68 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 94.30 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/105.usbdev_fifo_levels.4166919403
96.69 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 94.39 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/106.usbdev_endpoint_types.4040448947
96.71 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 94.48 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/106.usbdev_fifo_levels.3836047819
96.72 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 94.57 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/107.usbdev_fifo_levels.2370316868
96.73 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 94.66 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/109.usbdev_fifo_levels.2604972402
96.74 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 94.75 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/110.usbdev_endpoint_types.273236654
96.76 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 94.84 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/110.usbdev_fifo_levels.3327983618
96.77 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 94.93 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/114.usbdev_fifo_levels.3713152722
96.78 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 95.02 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/116.usbdev_endpoint_types.121008148
96.80 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 95.11 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/117.usbdev_fifo_levels.121315870
96.81 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 95.20 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/119.usbdev_fifo_levels.3411374480
96.82 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 95.29 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/12.usbdev_fifo_levels.2641633243
96.83 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 95.38 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/122.usbdev_endpoint_types.1838004595
96.85 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 95.48 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/125.usbdev_fifo_levels.957384760
96.86 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 95.57 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/126.usbdev_fifo_levels.2833707182
96.87 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 95.66 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/127.usbdev_endpoint_types.1377076326
96.89 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 95.75 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/128.usbdev_endpoint_types.4216258917
96.90 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 95.84 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_fifo_levels.3401607233
96.91 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 95.93 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/130.usbdev_endpoint_types.1182745533
96.93 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 96.02 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/130.usbdev_fifo_levels.3856247129
96.94 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 96.11 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/132.usbdev_fifo_levels.3413572597
96.95 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 96.20 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/135.usbdev_endpoint_types.3988625507
96.96 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 96.29 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/137.usbdev_endpoint_types.3887290367
96.98 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 96.38 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/139.usbdev_fifo_levels.3864789411
96.99 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 96.47 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_endpoint_types.252904074
97.00 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 96.56 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/14.usbdev_fifo_levels.1307926641
97.02 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 96.65 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/140.usbdev_fifo_levels.4096916378
97.03 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 96.74 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/143.usbdev_fifo_levels.4189466142
97.04 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 96.83 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/147.usbdev_fifo_levels.3288988141
97.05 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 96.92 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/148.usbdev_fifo_levels.1560608920
97.07 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 97.01 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/151.usbdev_fifo_levels.438567822
97.08 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 97.10 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/154.usbdev_fifo_levels.2294312132
97.09 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 97.19 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/158.usbdev_fifo_levels.1835799222
97.11 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 97.29 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/189.usbdev_endpoint_types.4066261909
97.12 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 97.38 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/193.usbdev_endpoint_types.1821900712
97.13 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 97.47 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_fifo_levels.1744813575
97.14 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 97.56 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/24.usbdev_fifo_levels.2565120283
97.16 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 97.65 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_link_suspend.4149397057
97.17 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 97.74 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/27.usbdev_fifo_levels.1903129307
97.18 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 97.83 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_endpoint_types.3860130457
97.20 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 97.92 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/32.usbdev_fifo_levels.3247661205
97.21 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 98.01 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/46.usbdev_endpoint_types.3645059031
97.22 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 98.10 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/61.usbdev_endpoint_types.3441552510
97.24 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 98.19 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/62.usbdev_fifo_levels.3741721159
97.25 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 98.28 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/71.usbdev_fifo_levels.470995724
97.26 0.01 98.21 0.00 95.34 0.00 97.44 0.00 94.92 0.00 98.34 0.00 98.21 0.00 98.37 0.09 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/84.usbdev_fifo_levels.3375023181
97.27 0.01 98.21 0.00 95.39 0.05 97.44 0.00 94.92 0.00 98.38 0.04 98.21 0.00 98.37 0.00 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_usb_ref_disable.1793342646
97.28 0.01 98.21 0.00 95.46 0.07 97.44 0.00 94.92 0.00 98.38 0.00 98.21 0.00 98.37 0.00 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_av_overflow.2818248605
97.29 0.01 98.21 0.00 95.50 0.05 97.44 0.00 94.92 0.00 98.38 0.00 98.21 0.00 98.37 0.00 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_errors.1493507574
97.30 0.01 98.21 0.00 95.55 0.05 97.44 0.00 94.92 0.00 98.38 0.00 98.21 0.00 98.37 0.00 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_data1_data0_toggle_test.76833303
97.30 0.01 98.21 0.00 95.60 0.05 97.44 0.00 94.92 0.00 98.38 0.00 98.21 0.00 98.37 0.00 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_link_reset.2568689208
97.31 0.01 98.21 0.00 95.65 0.05 97.44 0.00 94.92 0.00 98.38 0.00 98.21 0.00 98.37 0.00 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_rx_pid_err.332487264
97.32 0.01 98.21 0.00 95.69 0.05 97.44 0.00 94.92 0.00 98.38 0.00 98.21 0.00 98.37 0.00 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_av_empty.2860287097
97.32 0.01 98.21 0.00 95.72 0.02 97.44 0.00 94.92 0.00 98.38 0.00 98.21 0.00 98.37 0.00 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_max_inter_pkt_delay.1318396517
97.32 0.01 98.21 0.00 95.74 0.02 97.44 0.00 94.92 0.00 98.38 0.00 98.21 0.00 98.37 0.00 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_nak_trans.1869261651
97.33 0.01 98.21 0.00 95.77 0.02 97.44 0.00 94.92 0.00 98.38 0.00 98.21 0.00 98.37 0.00 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_nak_trans.3364995499
97.33 0.01 98.21 0.00 95.79 0.02 97.44 0.00 94.92 0.00 98.38 0.00 98.21 0.00 98.37 0.00 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/10.usbdev_pending_in_trans.3466516631
97.34 0.01 98.21 0.00 95.81 0.02 97.44 0.00 94.92 0.00 98.38 0.00 98.21 0.00 98.37 0.00 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/13.usbdev_nak_trans.1290469915
97.34 0.01 98.21 0.00 95.84 0.02 97.44 0.00 94.92 0.00 98.38 0.00 98.21 0.00 98.37 0.00 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/15.usbdev_nak_trans.1846305454
97.34 0.01 98.21 0.00 95.86 0.02 97.44 0.00 94.92 0.00 98.38 0.00 98.21 0.00 98.37 0.00 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/16.usbdev_nak_trans.3945346899
97.35 0.01 98.21 0.00 95.88 0.02 97.44 0.00 94.92 0.00 98.38 0.00 98.21 0.00 98.37 0.00 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/17.usbdev_nak_trans.1998041546
97.35 0.01 98.21 0.00 95.91 0.02 97.44 0.00 94.92 0.00 98.38 0.00 98.21 0.00 98.37 0.00 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_endpoint_types.3526738300
97.35 0.01 98.21 0.00 95.93 0.02 97.44 0.00 94.92 0.00 98.38 0.00 98.21 0.00 98.37 0.00 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_stress_usb_traffic.1850789795
97.36 0.01 98.21 0.00 95.96 0.02 97.44 0.00 94.92 0.00 98.38 0.00 98.21 0.00 98.37 0.00 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/20.usbdev_nak_trans.1047897966
97.36 0.01 98.21 0.00 95.98 0.02 97.44 0.00 94.92 0.00 98.38 0.00 98.21 0.00 98.37 0.00 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/25.usbdev_nak_trans.756532748
97.36 0.01 98.21 0.00 96.00 0.02 97.44 0.00 94.92 0.00 98.38 0.00 98.21 0.00 98.37 0.00 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/29.usbdev_nak_trans.3124691016


Tests that do not contribute to grading

Name
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_aliasing.3866708667
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_bit_bash.1057811268
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_hw_reset.1442945410
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_mem_rw_with_rand_reset.3787479936
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_rw.166568733
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_partial_access.1497614138
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_walk.4291965030
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_same_csr_outstanding.1040658439
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_errors.176662429
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_intg_err.463785245
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_aliasing.3591266318
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_bit_bash.336958293
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/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_resume_link_active.1366649070
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_rx_crc_err.2554192384
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_rx_full.3749070841
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_setup_stage.4271261156
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_setup_trans_ignored.3663304
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_smoke.2955918925
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_spurious_pids_ignored.563420866
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_stall_priority_over_nak.259514403
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_stall_trans.807678982
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_stream_len_max.4165455971
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_streaming_out.4025272352
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_stress_usb_traffic.3579189904
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_timeout_missing_host_handshake.4085707939
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/9.usbdev_tx_rx_disruption.3295585536
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/92.usbdev_tx_rx_disruption.2027625281
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/93.usbdev_endpoint_types.780622890
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/93.usbdev_tx_rx_disruption.1711561267
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/95.usbdev_fifo_levels.3387483661
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/95.usbdev_tx_rx_disruption.1730144311
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/96.usbdev_endpoint_types.2199020418
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/96.usbdev_fifo_levels.1682298016
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/96.usbdev_tx_rx_disruption.415209636
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/97.usbdev_endpoint_types.2076830211
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/97.usbdev_fifo_levels.3183140527
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/97.usbdev_tx_rx_disruption.4255553859
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/98.usbdev_endpoint_types.3927218408
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/98.usbdev_fifo_levels.771750035
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/98.usbdev_tx_rx_disruption.1191238475
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/99.usbdev_endpoint_types.3070949033
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/99.usbdev_fifo_levels.661743351
/workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/99.usbdev_tx_rx_disruption.199470964




Total test records in report: 3808
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html | tests27.html | tests28.html | tests29.html | tests30.html | tests31.html | tests32.html | tests33.html | tests34.html | tests35.html | tests36.html | tests37.html | tests38.html | tests39.html | tests40.html | tests41.html | tests42.html | tests43.html | tests44.html | tests45.html | tests46.html | tests47.html | tests48.html | tests49.html | tests50.html | tests51.html | tests52.html | tests53.html | tests54.html | tests55.html | tests56.html | tests57.html | tests58.html | tests59.html | tests60.html | tests61.html | tests62.html | tests63.html | tests64.html | tests65.html | tests66.html | tests67.html | tests68.html | tests69.html | tests70.html | tests71.html | tests72.html | tests73.html | tests74.html | tests75.html | tests76.html | tests77.html | tests78.html | tests79.html | tests80.html

TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_av_buffer.874662220 Oct 15 12:49:04 AM UTC 24 Oct 15 12:49:06 AM UTC 24 200999895 ps
T2 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_av_empty.3504936839 Oct 15 12:49:06 AM UTC 24 Oct 15 12:49:08 AM UTC 24 169742610 ps
T3 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_av_overflow.3813746875 Oct 15 12:49:07 AM UTC 24 Oct 15 12:49:09 AM UTC 24 150422313 ps
T7 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_disconnect.1270468589 Oct 15 12:49:01 AM UTC 24 Oct 15 12:49:10 AM UTC 24 5815059045 ps
T17 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_bitstuff_err.4089542670 Oct 15 12:49:08 AM UTC 24 Oct 15 12:49:10 AM UTC 24 200900798 ps
T18 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_clear.985136203 Oct 15 12:49:09 AM UTC 24 Oct 15 12:49:13 AM UTC 24 499076349 ps
T19 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_restore.3298721409 Oct 15 12:49:09 AM UTC 24 Oct 15 12:49:15 AM UTC 24 933601175 ps
T20 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_disable_endpoint.399512473 Oct 15 12:49:11 AM UTC 24 Oct 15 12:49:15 AM UTC 24 574268860 ps
T21 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_disconnected.544489410 Oct 15 12:49:13 AM UTC 24 Oct 15 12:49:15 AM UTC 24 226351831 ps
T22 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_enable.3616846360 Oct 15 12:49:14 AM UTC 24 Oct 15 12:49:16 AM UTC 24 37790524 ps
T23 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_types.3132317413 Oct 15 12:49:16 AM UTC 24 Oct 15 12:49:19 AM UTC 24 270331114 ps
T24 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_fifo_levels.382282072 Oct 15 12:49:16 AM UTC 24 Oct 15 12:49:19 AM UTC 24 247302614 ps
T25 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_fifo_rst.1885597060 Oct 15 12:49:17 AM UTC 24 Oct 15 12:49:21 AM UTC 24 176645559 ps
T29 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_access.441439802 Oct 15 12:49:16 AM UTC 24 Oct 15 12:49:21 AM UTC 24 886036921 ps
T30 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_data1_data0_toggle_test.76833303 Oct 15 12:49:27 AM UTC 24 Oct 15 12:49:30 AM UTC 24 509098672 ps
T31 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_in_iso.841396954 Oct 15 12:49:31 AM UTC 24 Oct 15 12:49:34 AM UTC 24 184513829 ps
T32 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_in_stall.2576974177 Oct 15 12:49:35 AM UTC 24 Oct 15 12:49:38 AM UTC 24 147143173 ps
T33 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_in_trans.2231471765 Oct 15 12:49:36 AM UTC 24 Oct 15 12:49:39 AM UTC 24 224907102 ps
T41 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_host_lost.3252128701 Oct 15 12:49:23 AM UTC 24 Oct 15 12:49:40 AM UTC 24 4168715478 ps
T34 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_link_in_err.1234201398 Oct 15 12:49:38 AM UTC 24 Oct 15 12:49:41 AM UTC 24 241098861 ps
T8 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_reset.3418765806 Oct 15 12:49:02 AM UTC 24 Oct 15 12:49:42 AM UTC 24 18775318092 ps
T35 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_timeout_missing_host_handshake.1110652522 Oct 15 12:49:11 AM UTC 24 Oct 15 12:49:42 AM UTC 24 1061805588 ps
T42 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_link_reset.2568689208 Oct 15 12:49:40 AM UTC 24 Oct 15 12:49:42 AM UTC 24 169161820 ps
T66 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_link_out_err.3840540511 Oct 15 12:49:39 AM UTC 24 Oct 15 12:49:43 AM UTC 24 439753110 ps
T117 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_max_length_in_transaction.1745749743 Oct 15 12:49:43 AM UTC 24 Oct 15 12:49:46 AM UTC 24 254188860 ps
T80 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_max_length_out_transaction.3235268458 Oct 15 12:49:43 AM UTC 24 Oct 15 12:49:46 AM UTC 24 207356142 ps
T150 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_min_length_in_transaction.3042409905 Oct 15 12:49:46 AM UTC 24 Oct 15 12:49:49 AM UTC 24 202217584 ps
T526 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_min_length_out_transaction.3528191992 Oct 15 12:49:49 AM UTC 24 Oct 15 12:49:51 AM UTC 24 172743206 ps
T68 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_nak_trans.1127445918 Oct 15 12:49:50 AM UTC 24 Oct 15 12:49:52 AM UTC 24 197102818 ps
T67 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.2042088262 Oct 15 12:49:50 AM UTC 24 Oct 15 12:49:53 AM UTC 24 453304478 ps
T97 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_device_timeout.1107048068 Oct 15 12:49:10 AM UTC 24 Oct 15 12:49:54 AM UTC 24 3412350219 ps
T81 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_out_iso.4170628916 Oct 15 12:49:52 AM UTC 24 Oct 15 12:49:54 AM UTC 24 173710326 ps
T155 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_out_stall.196368995 Oct 15 12:49:53 AM UTC 24 Oct 15 12:49:55 AM UTC 24 175320172 ps
T501 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_out_trans_nak.3034179717 Oct 15 12:49:54 AM UTC 24 Oct 15 12:49:56 AM UTC 24 173972437 ps
T82 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_pending_in_trans.1787416944 Oct 15 12:49:55 AM UTC 24 Oct 15 12:49:57 AM UTC 24 177015517 ps
T83 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_eop_single_bit_handling.31915244 Oct 15 12:49:55 AM UTC 24 Oct 15 12:49:58 AM UTC 24 188050254 ps
T43 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_pinflip.1508757853 Oct 15 12:49:56 AM UTC 24 Oct 15 12:49:59 AM UTC 24 196810360 ps
T57 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_link_resume.3757035012 Oct 15 12:49:41 AM UTC 24 Oct 15 12:49:59 AM UTC 24 7396644841 ps
T44 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_rand_bus_type.3191224397 Oct 15 12:49:56 AM UTC 24 Oct 15 12:49:59 AM UTC 24 212983244 ps
T45 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_rx_dp_dn.2376444408 Oct 15 12:49:57 AM UTC 24 Oct 15 12:50:00 AM UTC 24 236926318 ps
T84 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_use_d_se0.3822835293 Oct 15 12:49:59 AM UTC 24 Oct 15 12:50:01 AM UTC 24 223945011 ps
T215 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_osc_test_mode.1016218860 Oct 15 12:49:58 AM UTC 24 Oct 15 12:50:02 AM UTC 24 330212634 ps
T26 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_phy_pins_sense.2031686951 Oct 15 12:50:00 AM UTC 24 Oct 15 12:50:02 AM UTC 24 59224429 ps
T112 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_usb_ref_disable.1793342646 Oct 15 12:50:00 AM UTC 24 Oct 15 12:50:02 AM UTC 24 139996471 ps
T233 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_received.3064055014 Oct 15 12:50:01 AM UTC 24 Oct 15 12:50:03 AM UTC 24 186129968 ps
T152 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_sent.3375323285 Oct 15 12:50:02 AM UTC 24 Oct 15 12:50:05 AM UTC 24 204291415 ps
T528 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_random_length_out_transaction.12717226 Oct 15 12:50:03 AM UTC 24 Oct 15 12:50:05 AM UTC 24 163771412 ps
T546 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_random_length_in_transaction.4144935383 Oct 15 12:50:03 AM UTC 24 Oct 15 12:50:06 AM UTC 24 212757524 ps
T69 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_rx_crc_err.3815614874 Oct 15 12:50:06 AM UTC 24 Oct 15 12:50:09 AM UTC 24 166652939 ps
T4 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_sync.176749417 Oct 15 12:49:28 AM UTC 24 Oct 15 12:50:10 AM UTC 24 4037233960 ps
T93 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_link_suspend.180491211 Oct 15 12:49:41 AM UTC 24 Oct 15 12:50:10 AM UTC 24 9525945838 ps
T72 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_rx_pid_err.332487264 Oct 15 12:50:10 AM UTC 24 Oct 15 12:50:12 AM UTC 24 163631524 ps
T49 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_rx_full.773224400 Oct 15 12:50:10 AM UTC 24 Oct 15 12:50:12 AM UTC 24 269544095 ps
T157 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_setup_stage.552926448 Oct 15 12:50:11 AM UTC 24 Oct 15 12:50:13 AM UTC 24 172223082 ps
T184 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_setup_trans_ignored.2066690990 Oct 15 12:50:11 AM UTC 24 Oct 15 12:50:14 AM UTC 24 191767524 ps
T103 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority_over_stall_response.3917603514 Oct 15 12:50:11 AM UTC 24 Oct 15 12:50:14 AM UTC 24 206971680 ps
T5 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_max_inter_pkt_delay.1318396517 Oct 15 12:49:42 AM UTC 24 Oct 15 12:50:15 AM UTC 24 3372038386 ps
T50 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority.1080315 Oct 15 12:50:11 AM UTC 24 Oct 15 12:50:15 AM UTC 24 431746894 ps
T154 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_smoke.3736960377 Oct 15 12:50:13 AM UTC 24 Oct 15 12:50:15 AM UTC 24 231519209 ps
T6 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_low_speed_traffic.893166491 Oct 15 12:49:42 AM UTC 24 Oct 15 12:50:17 AM UTC 24 3725659518 ps
T181 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_stall_priority_over_nak.2586658087 Oct 15 12:50:14 AM UTC 24 Oct 15 12:50:17 AM UTC 24 194849859 ps
T502 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_stall_trans.3579952999 Oct 15 12:50:14 AM UTC 24 Oct 15 12:50:17 AM UTC 24 200847885 ps
T556 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_stream_len_max.2085179697 Oct 15 12:50:15 AM UTC 24 Oct 15 12:50:17 AM UTC 24 254182931 ps
T153 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_max_non_iso_usb_traffic.2051398056 Oct 15 12:49:43 AM UTC 24 Oct 15 12:50:18 AM UTC 24 2548412796 ps
T107 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_tx_rx_disruption.1706844641 Oct 15 12:50:17 AM UTC 24 Oct 15 12:50:20 AM UTC 24 458734142 ps
T192 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_alert_test.3536454253 Oct 15 12:50:18 AM UTC 24 Oct 15 12:50:20 AM UTC 24 42343839 ps
T557 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_av_buffer.380642245 Oct 15 12:50:18 AM UTC 24 Oct 15 12:50:21 AM UTC 24 154973815 ps
T197 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_sec_cm.1995721165 Oct 15 12:50:18 AM UTC 24 Oct 15 12:50:21 AM UTC 24 268435375 ps
T46 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_av_empty.2860287097 Oct 15 12:50:20 AM UTC 24 Oct 15 12:50:22 AM UTC 24 213962816 ps
T106 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_clear.3592399961 Oct 15 12:50:21 AM UTC 24 Oct 15 12:50:23 AM UTC 24 194511772 ps
T78 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_bitstuff_err.3209868566 Oct 15 12:50:21 AM UTC 24 Oct 15 12:50:23 AM UTC 24 155643989 ps
T58 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_av_overflow.2859051646 Oct 15 12:50:21 AM UTC 24 Oct 15 12:50:23 AM UTC 24 149535022 ps
T151 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_rand_bus_resets.1793377974 Oct 15 12:50:04 AM UTC 24 Oct 15 12:50:25 AM UTC 24 1911651369 ps
T105 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_restore.3130589828 Oct 15 12:50:21 AM UTC 24 Oct 15 12:50:25 AM UTC 24 1153006898 ps
T9 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_resume.3080129528 Oct 15 12:49:04 AM UTC 24 Oct 15 12:50:26 AM UTC 24 29511515028 ps
T214 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_enable.3195917427 Oct 15 12:50:24 AM UTC 24 Oct 15 12:50:26 AM UTC 24 31708223 ps
T60 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_disconnected.1348702541 Oct 15 12:50:24 AM UTC 24 Oct 15 12:50:27 AM UTC 24 135043468 ps
T322 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_disable_endpoint.3321511221 Oct 15 12:50:23 AM UTC 24 Oct 15 12:50:27 AM UTC 24 722853385 ps
T10 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_disconnect.2062741338 Oct 15 12:50:18 AM UTC 24 Oct 15 12:50:28 AM UTC 24 5299021711 ps
T51 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_fifo_levels.3105686433 Oct 15 12:50:26 AM UTC 24 Oct 15 12:50:29 AM UTC 24 293687408 ps
T113 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_types.404622636 Oct 15 12:50:26 AM UTC 24 Oct 15 12:50:29 AM UTC 24 430268225 ps
T558 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_fifo_rst.584953754 Oct 15 12:50:26 AM UTC 24 Oct 15 12:50:30 AM UTC 24 315680273 ps
T527 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_access.3810864295 Oct 15 12:50:25 AM UTC 24 Oct 15 12:50:31 AM UTC 24 960364159 ps
T104 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_in_stall.77273290 Oct 15 12:50:31 AM UTC 24 Oct 15 12:50:33 AM UTC 24 141610352 ps
T102 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_in_iso.90802111 Oct 15 12:50:30 AM UTC 24 Oct 15 12:50:33 AM UTC 24 229293022 ps
T559 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_in_trans.3803098333 Oct 15 12:50:32 AM UTC 24 Oct 15 12:50:34 AM UTC 24 245247935 ps
T62 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_rand_suspends.627221107 Oct 15 12:50:05 AM UTC 24 Oct 15 12:50:35 AM UTC 24 6069341318 ps
T560 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_link_in_err.1786292700 Oct 15 12:50:34 AM UTC 24 Oct 15 12:50:36 AM UTC 24 248241842 ps
T168 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_min_inter_pkt_delay.425604549 Oct 15 12:49:46 AM UTC 24 Oct 15 12:50:38 AM UTC 24 1770368213 ps
T561 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_max_length_in_transaction.3022630627 Oct 15 12:50:36 AM UTC 24 Oct 15 12:50:39 AM UTC 24 239436514 ps
T91 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_resume_link_active.600604554 Oct 15 12:50:06 AM UTC 24 Oct 15 12:50:39 AM UTC 24 20172444336 ps
T562 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_max_length_out_transaction.3929105540 Oct 15 12:50:37 AM UTC 24 Oct 15 12:50:40 AM UTC 24 204338679 ps
T63 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_buffer.2681413597 Oct 15 12:50:00 AM UTC 24 Oct 15 12:50:41 AM UTC 24 9952081988 ps
T243 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_timeout_missing_host_handshake.3365350934 Oct 15 12:50:23 AM UTC 24 Oct 15 12:50:41 AM UTC 24 1911612935 ps
T244 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_min_length_in_transaction.1494297034 Oct 15 12:50:40 AM UTC 24 Oct 15 12:50:42 AM UTC 24 158225560 ps
T245 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_min_length_out_transaction.2489074908 Oct 15 12:50:41 AM UTC 24 Oct 15 12:50:43 AM UTC 24 141805663 ps
T183 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_out_iso.1569113494 Oct 15 12:50:42 AM UTC 24 Oct 15 12:50:45 AM UTC 24 191489569 ps
T121 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_nak_trans.1869261651 Oct 15 12:50:42 AM UTC 24 Oct 15 12:50:45 AM UTC 24 197320509 ps
T90 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_iso_retraction.1202508607 Oct 15 12:49:37 AM UTC 24 Oct 15 12:50:45 AM UTC 24 7503188564 ps
T246 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_out_stall.3214807277 Oct 15 12:50:43 AM UTC 24 Oct 15 12:50:46 AM UTC 24 187854864 ps
T170 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_pending_in_trans.2690655920 Oct 15 12:50:45 AM UTC 24 Oct 15 12:50:47 AM UTC 24 152957023 ps
T247 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_out_trans_nak.3938687689 Oct 15 12:50:45 AM UTC 24 Oct 15 12:50:47 AM UTC 24 175226172 ps
T98 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_link_suspend.995234367 Oct 15 12:50:34 AM UTC 24 Oct 15 12:50:48 AM UTC 24 5548413698 ps
T160 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_rand_bus_type.3712351874 Oct 15 12:50:46 AM UTC 24 Oct 15 12:50:48 AM UTC 24 222211620 ps
T158 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_pinflip.2668900392 Oct 15 12:50:46 AM UTC 24 Oct 15 12:50:48 AM UTC 24 263786445 ps
T27 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_phy_pins_sense.23096215 Oct 15 12:50:47 AM UTC 24 Oct 15 12:50:49 AM UTC 24 37772610 ps
T195 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_usb_ref_disable.1879772013 Oct 15 12:50:47 AM UTC 24 Oct 15 12:50:49 AM UTC 24 136491097 ps
T367 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_received.1613134132 Oct 15 12:50:48 AM UTC 24 Oct 15 12:50:50 AM UTC 24 155322109 ps
T563 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_device_timeout.3644022094 Oct 15 12:50:22 AM UTC 24 Oct 15 12:50:52 AM UTC 24 983471646 ps
T564 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_random_length_out_transaction.3390890812 Oct 15 12:50:49 AM UTC 24 Oct 15 12:50:52 AM UTC 24 164689231 ps
T565 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_random_length_in_transaction.588950266 Oct 15 12:50:49 AM UTC 24 Oct 15 12:50:52 AM UTC 24 187425256 ps
T566 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_sent.2693464933 Oct 15 12:50:49 AM UTC 24 Oct 15 12:50:52 AM UTC 24 198143394 ps
T73 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_rx_pid_err.2486558739 Oct 15 12:50:53 AM UTC 24 Oct 15 12:50:55 AM UTC 24 227074193 ps
T70 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_rx_crc_err.1577133271 Oct 15 12:50:53 AM UTC 24 Oct 15 12:50:56 AM UTC 24 165122410 ps
T52 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_rx_full.1121105139 Oct 15 12:50:53 AM UTC 24 Oct 15 12:50:56 AM UTC 24 269404069 ps
T176 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_setup_priority_over_stall_response.2113313557 Oct 15 12:50:54 AM UTC 24 Oct 15 12:50:57 AM UTC 24 350661006 ps
T54 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_setup_priority.1367014809 Oct 15 12:50:54 AM UTC 24 Oct 15 12:50:58 AM UTC 24 398402155 ps
T161 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_max_non_iso_usb_traffic.3399062321 Oct 15 12:50:39 AM UTC 24 Oct 15 12:50:59 AM UTC 24 2311309320 ps
T185 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_setup_trans_ignored.2575583216 Oct 15 12:50:56 AM UTC 24 Oct 15 12:50:59 AM UTC 24 168750798 ps
T567 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_setup_stage.2417073516 Oct 15 12:50:56 AM UTC 24 Oct 15 12:50:59 AM UTC 24 145091699 ps
T169 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_max_inter_pkt_delay.1355619254 Oct 15 12:50:35 AM UTC 24 Oct 15 12:50:59 AM UTC 24 1726300815 ps
T568 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_smoke.48164766 Oct 15 12:50:57 AM UTC 24 Oct 15 12:51:01 AM UTC 24 207181210 ps
T503 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_stall_priority_over_nak.1939713647 Oct 15 12:50:59 AM UTC 24 Oct 15 12:51:01 AM UTC 24 176834359 ps
T230 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_streaming_out.76750795 Oct 15 12:51:00 AM UTC 24 Oct 15 12:51:28 AM UTC 24 2560958966 ps
T517 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_stall_trans.3673618126 Oct 15 12:51:00 AM UTC 24 Oct 15 12:51:02 AM UTC 24 164583943 ps
T569 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_stream_len_max.1928241260 Oct 15 12:51:00 AM UTC 24 Oct 15 12:51:05 AM UTC 24 927650013 ps
T11 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_reset.4055684577 Oct 15 12:51:06 AM UTC 24 Oct 15 12:51:28 AM UTC 24 13342168614 ps
T193 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_alert_test.1989410809 Oct 15 12:51:04 AM UTC 24 Oct 15 12:51:05 AM UTC 24 86052586 ps
T206 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_tx_rx_disruption.4282143664 Oct 15 12:51:02 AM UTC 24 Oct 15 12:51:06 AM UTC 24 557003335 ps
T198 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_sec_cm.723912932 Oct 15 12:51:03 AM UTC 24 Oct 15 12:51:06 AM UTC 24 234540470 ps
T12 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_reset.1719656436 Oct 15 12:50:18 AM UTC 24 Oct 15 12:51:07 AM UTC 24 16401298070 ps
T59 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_av_overflow.2818248605 Oct 15 12:51:07 AM UTC 24 Oct 15 12:51:10 AM UTC 24 149739700 ps
T570 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_av_buffer.1890125316 Oct 15 12:51:07 AM UTC 24 Oct 15 12:51:10 AM UTC 24 178132709 ps
T47 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_av_empty.1408845242 Oct 15 12:51:07 AM UTC 24 Oct 15 12:51:10 AM UTC 24 197046165 ps
T74 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_stress_usb_traffic.2655250718 Oct 15 12:50:16 AM UTC 24 Oct 15 12:51:10 AM UTC 24 8614745073 ps
T79 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_bitstuff_err.2336154038 Oct 15 12:51:08 AM UTC 24 Oct 15 12:51:11 AM UTC 24 192000887 ps
T174 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_max_usb_traffic.358815011 Oct 15 12:49:44 AM UTC 24 Oct 15 12:51:13 AM UTC 24 2974613516 ps
T571 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_data_toggle_clear.1108839866 Oct 15 12:51:10 AM UTC 24 Oct 15 12:51:13 AM UTC 24 202911262 ps
T111 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_data_toggle_restore.1882071407 Oct 15 12:51:10 AM UTC 24 Oct 15 12:51:13 AM UTC 24 338087415 ps
T572 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_streaming_out.1302710357 Oct 15 12:50:14 AM UTC 24 Oct 15 12:51:14 AM UTC 24 2221853666 ps
T13 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_resume.2878238589 Oct 15 12:50:18 AM UTC 24 Oct 15 12:51:14 AM UTC 24 25059885956 ps
T159 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_spurious_pids_ignored.1829557889 Oct 15 12:50:13 AM UTC 24 Oct 15 12:51:14 AM UTC 24 2285538964 ps
T573 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_enable.723056069 Oct 15 12:51:14 AM UTC 24 Oct 15 12:51:16 AM UTC 24 43965241 ps
T61 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_disconnected.2618311721 Oct 15 12:51:14 AM UTC 24 Oct 15 12:51:17 AM UTC 24 151077691 ps
T369 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_disable_endpoint.941036422 Oct 15 12:51:12 AM UTC 24 Oct 15 12:51:17 AM UTC 24 835890357 ps
T290 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_fifo_levels.23485781 Oct 15 12:51:15 AM UTC 24 Oct 15 12:51:18 AM UTC 24 168656965 ps
T518 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_endpoint_access.1572865487 Oct 15 12:51:14 AM UTC 24 Oct 15 12:51:18 AM UTC 24 856511987 ps
T140 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_endpoint_types.3526738300 Oct 15 12:51:15 AM UTC 24 Oct 15 12:51:19 AM UTC 24 357997669 ps
T114 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_device_address.759590101 Oct 15 12:49:10 AM UTC 24 Oct 15 12:51:20 AM UTC 24 42535374745 ps
T574 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_fifo_rst.3559030432 Oct 15 12:51:15 AM UTC 24 Oct 15 12:51:20 AM UTC 24 577323518 ps
T575 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_spurious_pids_ignored.1305613436 Oct 15 12:50:59 AM UTC 24 Oct 15 12:51:22 AM UTC 24 1680952024 ps
T14 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_disconnect.3540736414 Oct 15 12:51:05 AM UTC 24 Oct 15 12:51:23 AM UTC 24 5477035490 ps
T92 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_resume_link_active.4231860705 Oct 15 12:50:53 AM UTC 24 Oct 15 12:51:24 AM UTC 24 20183775293 ps
T576 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_in_stall.3069881538 Oct 15 12:51:22 AM UTC 24 Oct 15 12:51:24 AM UTC 24 137448399 ps
T268 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_buffer.4110554031 Oct 15 12:50:48 AM UTC 24 Oct 15 12:51:24 AM UTC 24 13380168225 ps
T577 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_in_iso.451000167 Oct 15 12:51:22 AM UTC 24 Oct 15 12:51:24 AM UTC 24 186410814 ps
T578 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_in_trans.3882749679 Oct 15 12:51:23 AM UTC 24 Oct 15 12:51:25 AM UTC 24 179371351 ps
T579 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_link_in_err.3039700485 Oct 15 12:51:23 AM UTC 24 Oct 15 12:51:26 AM UTC 24 246110165 ps
T580 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_rand_bus_disconnects.2434435592 Oct 15 12:50:03 AM UTC 24 Oct 15 12:51:27 AM UTC 24 11127297685 ps
T581 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_max_length_in_transaction.3573789246 Oct 15 12:51:26 AM UTC 24 Oct 15 12:51:28 AM UTC 24 244760091 ps
T582 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_max_length_out_transaction.2459285149 Oct 15 12:51:27 AM UTC 24 Oct 15 12:51:29 AM UTC 24 192829729 ps
T115 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_device_address.1334365484 Oct 15 12:50:22 AM UTC 24 Oct 15 12:51:30 AM UTC 24 22193204421 ps
T583 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_min_length_out_transaction.3471971802 Oct 15 12:51:30 AM UTC 24 Oct 15 12:51:32 AM UTC 24 151750697 ps
T167 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_rand_bus_disconnects.3744292865 Oct 15 12:50:49 AM UTC 24 Oct 15 12:51:32 AM UTC 24 4040925258 ps
T584 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_min_length_in_transaction.3404219051 Oct 15 12:51:29 AM UTC 24 Oct 15 12:51:32 AM UTC 24 176778240 ps
T122 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_nak_trans.2068224973 Oct 15 12:51:31 AM UTC 24 Oct 15 12:51:33 AM UTC 24 188614542 ps
T76 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_stress_usb_traffic.4010932493 Oct 15 12:51:01 AM UTC 24 Oct 15 12:51:33 AM UTC 24 3397475767 ps
T585 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_out_iso.1973982438 Oct 15 12:51:32 AM UTC 24 Oct 15 12:51:35 AM UTC 24 166929008 ps
T64 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_link_resume.3751350410 Oct 15 12:50:34 AM UTC 24 Oct 15 12:51:35 AM UTC 24 28089686650 ps
T586 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_device_timeout.1407340054 Oct 15 12:51:10 AM UTC 24 Oct 15 12:51:36 AM UTC 24 1984040998 ps
T587 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_link_suspend.3352279810 Oct 15 12:51:24 AM UTC 24 Oct 15 12:51:36 AM UTC 24 5248056854 ps
T588 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_out_stall.3880389569 Oct 15 12:51:33 AM UTC 24 Oct 15 12:51:36 AM UTC 24 187324422 ps
T589 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_pending_in_trans.2733623676 Oct 15 12:51:33 AM UTC 24 Oct 15 12:51:36 AM UTC 24 166517265 ps
T533 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_out_trans_nak.3065403524 Oct 15 12:51:33 AM UTC 24 Oct 15 12:51:36 AM UTC 24 189441198 ps
T590 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_rand_bus_type.954938712 Oct 15 12:51:34 AM UTC 24 Oct 15 12:51:36 AM UTC 24 211212241 ps
T156 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_pinflip.1792351097 Oct 15 12:51:33 AM UTC 24 Oct 15 12:51:36 AM UTC 24 248262843 ps
T28 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_phy_pins_sense.2161316247 Oct 15 12:51:35 AM UTC 24 Oct 15 12:51:37 AM UTC 24 47045630 ps
T196 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_usb_ref_disable.1513779459 Oct 15 12:51:35 AM UTC 24 Oct 15 12:51:37 AM UTC 24 137681862 ps
T368 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_received.1196033303 Oct 15 12:51:36 AM UTC 24 Oct 15 12:51:38 AM UTC 24 171579873 ps
T591 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_random_length_out_transaction.2734315978 Oct 15 12:51:37 AM UTC 24 Oct 15 12:51:40 AM UTC 24 197219724 ps
T592 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_random_length_in_transaction.2574448126 Oct 15 12:51:37 AM UTC 24 Oct 15 12:51:40 AM UTC 24 193297833 ps
T593 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_sent.2076406646 Oct 15 12:51:37 AM UTC 24 Oct 15 12:51:40 AM UTC 24 188853725 ps
T71 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_rx_crc_err.878670853 Oct 15 12:51:39 AM UTC 24 Oct 15 12:51:41 AM UTC 24 152805582 ps
T53 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_rx_full.89355215 Oct 15 12:51:39 AM UTC 24 Oct 15 12:51:42 AM UTC 24 310613072 ps
T75 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_rx_pid_err.1842807971 Oct 15 12:51:40 AM UTC 24 Oct 15 12:51:42 AM UTC 24 165749736 ps
T549 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_dpi_config_host.2354378190 Oct 15 12:49:13 AM UTC 24 Oct 15 12:51:43 AM UTC 24 5121108628 ps
T594 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_setup_stage.1848042805 Oct 15 12:51:41 AM UTC 24 Oct 15 12:51:44 AM UTC 24 151979705 ps
T175 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_setup_priority_over_stall_response.922197573 Oct 15 12:51:41 AM UTC 24 Oct 15 12:51:44 AM UTC 24 184632907 ps
T312 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_setup_priority.2788442458 Oct 15 12:51:41 AM UTC 24 Oct 15 12:51:44 AM UTC 24 415050619 ps
T15 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_resume.1660137535 Oct 15 12:51:06 AM UTC 24 Oct 15 12:51:45 AM UTC 24 28716442335 ps
T595 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_smoke.3892592529 Oct 15 12:51:42 AM UTC 24 Oct 15 12:51:45 AM UTC 24 198703904 ps
T357 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_setup_trans_ignored.2503695628 Oct 15 12:51:42 AM UTC 24 Oct 15 12:51:45 AM UTC 24 170559285 ps
T504 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_stall_priority_over_nak.712029358 Oct 15 12:51:44 AM UTC 24 Oct 15 12:51:46 AM UTC 24 151412452 ps
T596 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_stall_trans.2657702714 Oct 15 12:51:44 AM UTC 24 Oct 15 12:51:46 AM UTC 24 227238739 ps
T597 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_invalid_sync.464145394 Oct 15 12:51:20 AM UTC 24 Oct 15 12:51:49 AM UTC 24 3796032442 ps
T598 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_min_inter_pkt_delay.311956549 Oct 15 12:51:28 AM UTC 24 Oct 15 12:51:49 AM UTC 24 2383769059 ps
T221 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_tx_rx_disruption.1358174258 Oct 15 12:51:46 AM UTC 24 Oct 15 12:51:50 AM UTC 24 600398192 ps
T194 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_alert_test.3512992950 Oct 15 12:51:48 AM UTC 24 Oct 15 12:51:50 AM UTC 24 75357806 ps
T199 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_sec_cm.1703709757 Oct 15 12:51:46 AM UTC 24 Oct 15 12:51:50 AM UTC 24 459018488 ps
T599 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_stream_len_max.722375486 Oct 15 12:51:45 AM UTC 24 Oct 15 12:51:51 AM UTC 24 990677345 ps
T600 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_av_buffer.1609613703 Oct 15 12:51:49 AM UTC 24 Oct 15 12:51:51 AM UTC 24 158388673 ps
T601 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_timeout_missing_host_handshake.3428509730 Oct 15 12:51:12 AM UTC 24 Oct 15 12:51:52 AM UTC 24 4327603505 ps
T85 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_av_overflow.2075847257 Oct 15 12:51:50 AM UTC 24 Oct 15 12:51:53 AM UTC 24 146138567 ps
T602 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_bitstuff_err.250731873 Oct 15 12:51:50 AM UTC 24 Oct 15 12:51:53 AM UTC 24 150928338 ps
T56 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_av_empty.4169328525 Oct 15 12:51:50 AM UTC 24 Oct 15 12:51:53 AM UTC 24 161016389 ps
T603 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_data_toggle_clear.3633629923 Oct 15 12:51:50 AM UTC 24 Oct 15 12:51:53 AM UTC 24 234183076 ps
T116 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_device_address.84785533 Oct 15 12:51:10 AM UTC 24 Oct 15 12:51:53 AM UTC 24 18484369507 ps
T543 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_data_toggle_restore.3162489819 Oct 15 12:51:52 AM UTC 24 Oct 15 12:51:55 AM UTC 24 727059332 ps
T604 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_enable.885369835 Oct 15 12:51:54 AM UTC 24 Oct 15 12:51:56 AM UTC 24 35553549 ps
T605 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_max_non_iso_usb_traffic.557128929 Oct 15 12:51:27 AM UTC 24 Oct 15 12:51:57 AM UTC 24 3395888768 ps
T606 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_disconnected.2758303605 Oct 15 12:51:54 AM UTC 24 Oct 15 12:51:57 AM UTC 24 142930561 ps
T189 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_endpoint_types.3860130457 Oct 15 12:51:54 AM UTC 24 Oct 15 12:51:57 AM UTC 24 271991809 ps
T186 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_low_speed_traffic.3837020665 Oct 15 12:51:24 AM UTC 24 Oct 15 12:51:57 AM UTC 24 3529893158 ps
T272 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_fifo_levels.3841117202 Oct 15 12:51:55 AM UTC 24 Oct 15 12:51:58 AM UTC 24 295792635 ps
T404 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_disable_endpoint.3872517007 Oct 15 12:51:54 AM UTC 24 Oct 15 12:51:58 AM UTC 24 533638184 ps
T607 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_min_inter_pkt_delay.329185502 Oct 15 12:50:40 AM UTC 24 Oct 15 12:51:59 AM UTC 24 2742079027 ps
T608 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_endpoint_access.2005024584 Oct 15 12:51:54 AM UTC 24 Oct 15 12:51:59 AM UTC 24 955491502 ps
T609 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_rand_suspends.1893002926 Oct 15 12:50:52 AM UTC 24 Oct 15 12:52:01 AM UTC 24 10285456145 ps
T327 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_fifo_rst.620053812 Oct 15 12:51:58 AM UTC 24 Oct 15 12:52:03 AM UTC 24 428663658 ps
T610 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_streaming_out.2954435882 Oct 15 12:51:44 AM UTC 24 Oct 15 12:52:03 AM UTC 24 1948044075 ps
T611 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_timeout_missing_host_handshake.3657088609 Oct 15 12:51:53 AM UTC 24 Oct 15 12:52:04 AM UTC 24 1365405221 ps
T16 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_disconnect.3954304085 Oct 15 12:51:48 AM UTC 24 Oct 15 12:52:04 AM UTC 24 10471977659 ps
T612 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_rand_bus_resets.1865847773 Oct 15 12:51:37 AM UTC 24 Oct 15 12:52:05 AM UTC 24 3253558248 ps
T613 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_in_trans.1590874879 Oct 15 12:52:04 AM UTC 24 Oct 15 12:52:06 AM UTC 24 161651195 ps
T614 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_in_stall.815625119 Oct 15 12:52:03 AM UTC 24 Oct 15 12:52:06 AM UTC 24 144158652 ps
T615 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_in_iso.3715326878 Oct 15 12:52:03 AM UTC 24 Oct 15 12:52:06 AM UTC 24 223717434 ps
T65 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_link_resume.799532562 Oct 15 12:51:24 AM UTC 24 Oct 15 12:52:07 AM UTC 24 28877230738 ps
T616 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_link_in_err.1120723201 Oct 15 12:52:05 AM UTC 24 Oct 15 12:52:07 AM UTC 24 233782866 ps
T617 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_resume_link_active.2751088919 Oct 15 12:51:38 AM UTC 24 Oct 15 12:52:08 AM UTC 24 20155381653 ps
T618 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_max_length_in_transaction.2939421583 Oct 15 12:52:06 AM UTC 24 Oct 15 12:52:09 AM UTC 24 271543791 ps
T619 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_out_iso.312248666 Oct 15 12:52:11 AM UTC 24 Oct 15 12:52:13 AM UTC 24 179977848 ps
T620 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_max_length_out_transaction.3478954919 Oct 15 12:52:06 AM UTC 24 Oct 15 12:52:09 AM UTC 24 214625338 ps
T621 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/2.usbdev_spurious_pids_ignored.1761162734 Oct 15 12:51:43 AM UTC 24 Oct 15 12:52:10 AM UTC 24 2093055796 ps
T622 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_min_length_in_transaction.3750691172 Oct 15 12:52:10 AM UTC 24 Oct 15 12:52:12 AM UTC 24 170358884 ps
T550 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/0.usbdev_freq_phase.2976765157 Oct 15 12:49:23 AM UTC 24 Oct 15 12:52:12 AM UTC 24 91160121249 ps
T623 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_min_length_out_transaction.2662095700 Oct 15 12:52:10 AM UTC 24 Oct 15 12:52:12 AM UTC 24 176905446 ps
T123 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_nak_trans.3053776812 Oct 15 12:52:10 AM UTC 24 Oct 15 12:52:12 AM UTC 24 186050102 ps
T99 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_reset.4280938490 Oct 15 12:51:48 AM UTC 24 Oct 15 12:52:16 AM UTC 24 16155198841 ps
T534 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_out_trans_nak.681592897 Oct 15 12:52:14 AM UTC 24 Oct 15 12:52:16 AM UTC 24 177538974 ps
T624 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_pending_in_trans.1131845914 Oct 15 12:52:14 AM UTC 24 Oct 15 12:52:16 AM UTC 24 152483507 ps
T625 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_out_stall.2607387382 Oct 15 12:52:14 AM UTC 24 Oct 15 12:52:16 AM UTC 24 218750571 ps
T626 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_rand_bus_type.1943517016 Oct 15 12:52:14 AM UTC 24 Oct 15 12:52:17 AM UTC 24 207629861 ps
T627 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_rand_bus_resets.2996404996 Oct 15 12:50:51 AM UTC 24 Oct 15 12:52:17 AM UTC 24 2859009538 ps
T628 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_pinflip.1194127985 Oct 15 12:52:14 AM UTC 24 Oct 15 12:52:17 AM UTC 24 276469746 ps
T629 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_link_suspend.4057572257 Oct 15 12:52:05 AM UTC 24 Oct 15 12:52:18 AM UTC 24 4076897160 ps
T187 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_low_speed_traffic.2284775206 Oct 15 12:50:35 AM UTC 24 Oct 15 12:52:18 AM UTC 24 3832533769 ps
T188 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/1.usbdev_max_usb_traffic.18552195 Oct 15 12:50:40 AM UTC 24 Oct 15 12:52:18 AM UTC 24 3538086042 ps
T36 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_phy_pins_sense.3353069368 Oct 15 12:52:17 AM UTC 24 Oct 15 12:52:20 AM UTC 24 96690246 ps
T630 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_usb_ref_disable.979962925 Oct 15 12:52:17 AM UTC 24 Oct 15 12:52:20 AM UTC 24 179244945 ps
T631 /workspaces/repo/scratch/os_regression_2024_10_14/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_received.814938210 Oct 15 12:52:17 AM UTC 24 Oct 15 12:52:20 AM UTC 24 187964148 ps
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