Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
77.37 85.01 83.79 68.62 86.57 86.84 53.39


Total test records in report: 1927
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T531 /workspace/coverage/cover_reg_top/92.xbar_same_source.55944709334640985071054618333152821825322221143047045673199792495767397261742 Nov 22 03:12:57 PM PST 23 Nov 22 03:14:16 PM PST 23 2498784073 ps
T532 /workspace/coverage/cover_reg_top/99.xbar_error_random.101420038443731812412937515723923158689975870004329329369078449704377940239955 Nov 22 03:13:46 PM PST 23 Nov 22 03:15:01 PM PST 23 2231375727 ps
T533 /workspace/coverage/cover_reg_top/55.xbar_smoke_large_delays.79638739510205880518549633919829820724298190795165091798159835346278923933313 Nov 22 03:08:48 PM PST 23 Nov 22 03:10:16 PM PST 23 7758585727 ps
T534 /workspace/coverage/cover_reg_top/13.xbar_stress_all.28819257949309964371376639749307523389802461164526976054340964379642400221875 Nov 22 03:04:14 PM PST 23 Nov 22 03:13:35 PM PST 23 13992004073 ps
T535 /workspace/coverage/cover_reg_top/43.xbar_stress_all_with_reset_error.77631574995297722396753150535345252677054158108789832072996171676246893446633 Nov 22 03:07:40 PM PST 23 Nov 22 03:12:53 PM PST 23 4815189184 ps
T536 /workspace/coverage/cover_reg_top/53.xbar_access_same_device_slow_rsp.25298544633753861176146425520253937951517783834839870680535831044138739862065 Nov 22 03:08:14 PM PST 23 Nov 22 03:41:37 PM PST 23 115195295727 ps
T537 /workspace/coverage/cover_reg_top/31.xbar_access_same_device_slow_rsp.11009879242172594153285545843898973128347621658732984583432269207179732810938 Nov 22 03:06:13 PM PST 23 Nov 22 03:40:58 PM PST 23 115195295727 ps
T538 /workspace/coverage/cover_reg_top/99.xbar_access_same_device_slow_rsp.49708130146561902313962038753435628929839414785165526555912171800989169621286 Nov 22 03:13:44 PM PST 23 Nov 22 03:48:31 PM PST 23 115195295727 ps
T539 /workspace/coverage/cover_reg_top/15.xbar_smoke_zero_delays.63943410821423966721388659210536160680557447846194194063288354023328446049669 Nov 22 03:04:29 PM PST 23 Nov 22 03:04:36 PM PST 23 45555727 ps
T540 /workspace/coverage/cover_reg_top/87.xbar_same_source.24443269864998904921386054962144788337737706656394183064784099064762824193683 Nov 22 03:12:11 PM PST 23 Nov 22 03:13:28 PM PST 23 2498784073 ps
T541 /workspace/coverage/cover_reg_top/89.xbar_stress_all.82805501003815420866646369654660810596939922231962782278139840670077314237703 Nov 22 03:12:37 PM PST 23 Nov 22 03:21:02 PM PST 23 13992004073 ps
T542 /workspace/coverage/cover_reg_top/15.xbar_access_same_device.12875434714789015069838931654977480695776546975666674141552744171424812031256 Nov 22 03:04:52 PM PST 23 Nov 22 03:06:39 PM PST 23 2590995727 ps
T543 /workspace/coverage/cover_reg_top/85.xbar_random_zero_delays.14344709413275067033632111262810811797868951837964493340982368433386853921515 Nov 22 03:11:58 PM PST 23 Nov 22 03:12:44 PM PST 23 556965727 ps
T544 /workspace/coverage/cover_reg_top/10.xbar_access_same_device_slow_rsp.93488065508980696161012748730072672527165106383527428732325641850733103542670 Nov 22 03:03:55 PM PST 23 Nov 22 03:37:43 PM PST 23 115195295727 ps
T545 /workspace/coverage/cover_reg_top/82.xbar_access_same_device.39668366464407746824220528887913694879908324375687387774595967891533899070781 Nov 22 03:11:28 PM PST 23 Nov 22 03:13:26 PM PST 23 2590995727 ps
T546 /workspace/coverage/cover_reg_top/26.xbar_smoke.22941636363567299546233551795187578647416431794205667206948279557433657844724 Nov 22 03:05:51 PM PST 23 Nov 22 03:06:00 PM PST 23 196985727 ps
T547 /workspace/coverage/cover_reg_top/65.xbar_random_zero_delays.82684594810776390219589612963092071065152930326937478066081742907880921373515 Nov 22 03:09:44 PM PST 23 Nov 22 03:10:33 PM PST 23 556965727 ps
T548 /workspace/coverage/cover_reg_top/1.xbar_access_same_device_slow_rsp.29426217166403195922366897353179121535522316920570438994094849375416333544609 Nov 22 03:03:05 PM PST 23 Nov 22 03:36:35 PM PST 23 115195295727 ps
T549 /workspace/coverage/cover_reg_top/14.xbar_smoke_slow_rsp.113817355813506635227667885104896827840602670066486302749546884778675533835313 Nov 22 03:04:12 PM PST 23 Nov 22 03:05:35 PM PST 23 4856075727 ps
T550 /workspace/coverage/cover_reg_top/9.xbar_unmapped_addr.24724765543303741294915861645937219316138321503561137359885053909322183270858 Nov 22 03:03:59 PM PST 23 Nov 22 03:04:44 PM PST 23 1176995727 ps
T551 /workspace/coverage/cover_reg_top/21.xbar_stress_all_with_reset_error.103378420465190327071168953696391169063844342444084446236726366443317974117050 Nov 22 03:05:22 PM PST 23 Nov 22 03:10:36 PM PST 23 4815189184 ps
T552 /workspace/coverage/cover_reg_top/25.xbar_smoke_slow_rsp.77555332921702612009741660594902638289777524329955286040305652241373576783581 Nov 22 03:05:43 PM PST 23 Nov 22 03:07:08 PM PST 23 4856075727 ps
T553 /workspace/coverage/cover_reg_top/95.xbar_access_same_device_slow_rsp.64406488046604966892526495291529345199256839127071957623787182633278978204527 Nov 22 03:13:18 PM PST 23 Nov 22 03:47:13 PM PST 23 115195295727 ps
T554 /workspace/coverage/cover_reg_top/0.xbar_stress_all_with_rand_reset.61040050201107524507111530554258950622527429874934039526228046996769076055881 Nov 22 03:03:59 PM PST 23 Nov 22 03:10:01 PM PST 23 4815189184 ps
T555 /workspace/coverage/cover_reg_top/20.xbar_error_and_unmapped_addr.50631246432445202108138441823435241121634221290174865126105210051749315043992 Nov 22 03:05:09 PM PST 23 Nov 22 03:05:53 PM PST 23 1171215727 ps
T556 /workspace/coverage/cover_reg_top/81.xbar_same_source.24794796868521009838285483633652057938986632393275224991266278950367815347891 Nov 22 03:11:21 PM PST 23 Nov 22 03:12:38 PM PST 23 2498784073 ps
T557 /workspace/coverage/cover_reg_top/32.xbar_error_and_unmapped_addr.28552588980602529129273264025294885302066067008038746233803434937962661465414 Nov 22 03:06:06 PM PST 23 Nov 22 03:06:54 PM PST 23 1171215727 ps
T558 /workspace/coverage/cover_reg_top/13.xbar_smoke_zero_delays.97107951293670720686509044261858175761815813428384721879714925625250480791875 Nov 22 03:04:17 PM PST 23 Nov 22 03:04:24 PM PST 23 45555727 ps
T559 /workspace/coverage/cover_reg_top/39.xbar_smoke_zero_delays.37867718312614904275963583932842248849059764964678894325668441481056225600262 Nov 22 03:06:45 PM PST 23 Nov 22 03:06:52 PM PST 23 45555727 ps
T560 /workspace/coverage/cover_reg_top/38.xbar_random_large_delays.52150291857577304624555794185324558641927283865068909141535395590400941732088 Nov 22 03:06:28 PM PST 23 Nov 22 03:25:59 PM PST 23 97702135727 ps
T561 /workspace/coverage/cover_reg_top/43.xbar_access_same_device_slow_rsp.97760424551286384011601266447376557447886582644823643531301757228131853578320 Nov 22 03:07:25 PM PST 23 Nov 22 03:41:12 PM PST 23 115195295727 ps
T562 /workspace/coverage/cover_reg_top/49.xbar_smoke_large_delays.72002123509587035610525860446983510463071738727055334856242499955462276886345 Nov 22 03:07:47 PM PST 23 Nov 22 03:09:22 PM PST 23 7758585727 ps
T563 /workspace/coverage/cover_reg_top/5.xbar_error_and_unmapped_addr.104649652686004171520916751832966760047650094237760583338739844817328791137774 Nov 22 03:03:34 PM PST 23 Nov 22 03:04:18 PM PST 23 1171215727 ps
T25 /workspace/coverage/cover_reg_top/8.chip_same_csr_outstanding.87989628804867333136777048487963092745812800542638371350145349488499350446542 Nov 22 03:03:40 PM PST 23 Nov 22 03:51:32 PM PST 23 30604932618 ps
T564 /workspace/coverage/cover_reg_top/56.xbar_stress_all_with_reset_error.7701089802027569099686497296777177208861047849954722038824899865690823123008 Nov 22 03:08:29 PM PST 23 Nov 22 03:13:51 PM PST 23 4815189184 ps
T565 /workspace/coverage/cover_reg_top/39.xbar_random_large_delays.85532642182363994283252449980349528095207355179667940226950275545253820185494 Nov 22 03:06:45 PM PST 23 Nov 22 03:25:41 PM PST 23 97702135727 ps
T566 /workspace/coverage/cover_reg_top/94.xbar_random.46156949100668043124448576467557247179908818261767376621628217677551615504792 Nov 22 03:13:27 PM PST 23 Nov 22 03:14:46 PM PST 23 2231375727 ps
T567 /workspace/coverage/cover_reg_top/97.xbar_smoke_large_delays.114244155865105793463651941407740189329987375382375022369095458465743393406899 Nov 22 03:13:30 PM PST 23 Nov 22 03:15:00 PM PST 23 7758585727 ps
T568 /workspace/coverage/cover_reg_top/18.xbar_stress_all.103414096683364887704694115843442374108412042522445284748983892590675312389624 Nov 22 03:05:06 PM PST 23 Nov 22 03:14:43 PM PST 23 13992004073 ps
T569 /workspace/coverage/cover_reg_top/50.xbar_smoke.97651944789323308106730308816628322627703794568868585913716138174981470720225 Nov 22 03:08:09 PM PST 23 Nov 22 03:08:18 PM PST 23 196985727 ps
T570 /workspace/coverage/cover_reg_top/73.xbar_smoke.1058005742042725912422818981559809506864145093921420551614565975566377578019 Nov 22 03:10:27 PM PST 23 Nov 22 03:10:36 PM PST 23 196985727 ps
T571 /workspace/coverage/cover_reg_top/72.xbar_stress_all_with_reset_error.93213670643887402647150166093674574252401256398570868278050083851680002566190 Nov 22 03:10:27 PM PST 23 Nov 22 03:15:34 PM PST 23 4815189184 ps
T572 /workspace/coverage/cover_reg_top/41.xbar_smoke_zero_delays.72598666296961904440209695711930321050312707557504006000214009262456766846405 Nov 22 03:06:58 PM PST 23 Nov 22 03:07:05 PM PST 23 45555727 ps
T573 /workspace/coverage/cover_reg_top/49.xbar_error_random.38616516004257184314391574185581548207753050682661418456701862546240851247387 Nov 22 03:07:44 PM PST 23 Nov 22 03:09:02 PM PST 23 2231375727 ps
T574 /workspace/coverage/cover_reg_top/68.xbar_stress_all.44758046263909229469919438641139021246677305601659716253144232775701001069844 Nov 22 03:10:13 PM PST 23 Nov 22 03:19:09 PM PST 23 13992004073 ps
T575 /workspace/coverage/cover_reg_top/10.xbar_smoke_large_delays.64453048562216338819381848648031199986521537983371809077475347545526318595879 Nov 22 03:03:59 PM PST 23 Nov 22 03:05:24 PM PST 23 7758585727 ps
T26 /workspace/coverage/cover_reg_top/2.chip_same_csr_outstanding.27764157554616651002963955850649742537055516898290864147778022606506913957304 Nov 22 03:03:07 PM PST 23 Nov 22 03:56:44 PM PST 23 30604932618 ps
T576 /workspace/coverage/cover_reg_top/42.xbar_smoke.55018516940099208921652095305970762705540024843262195721296385484552404365687 Nov 22 03:07:13 PM PST 23 Nov 22 03:07:22 PM PST 23 196985727 ps
T577 /workspace/coverage/cover_reg_top/32.xbar_smoke_zero_delays.112722939459303458967887655586447476179321605770947328585804499135353309908801 Nov 22 03:06:01 PM PST 23 Nov 22 03:06:08 PM PST 23 45555727 ps
T54 /workspace/coverage/cover_reg_top/23.chip_tl_errors.9287339741444537730612858653334709612480110914938834469152573227318076619081 Nov 22 03:05:18 PM PST 23 Nov 22 03:08:58 PM PST 23 3069924257 ps
T578 /workspace/coverage/cover_reg_top/56.xbar_stress_all_with_error.30143471497974125021362588864913656176597614813953837050351756293916504193435 Nov 22 03:08:28 PM PST 23 Nov 22 03:16:40 PM PST 23 13999524073 ps
T579 /workspace/coverage/cover_reg_top/97.xbar_unmapped_addr.39310010623874980492597087786162480612530405982365510549490648333621375043372 Nov 22 03:13:33 PM PST 23 Nov 22 03:14:24 PM PST 23 1176995727 ps
T52 /workspace/coverage/cover_reg_top/6.chip_csr_rw.18989590581593288935451241761360675236598299181319247628944710221229471523696 Nov 22 03:03:41 PM PST 23 Nov 22 03:13:15 PM PST 23 5924944675 ps
T580 /workspace/coverage/cover_reg_top/7.xbar_error_random.33163761770983132802206777789615710278360856935485799938773831314201405788897 Nov 22 03:03:29 PM PST 23 Nov 22 03:04:41 PM PST 23 2231375727 ps
T581 /workspace/coverage/cover_reg_top/26.xbar_random.78756962353304061593773353196516636400261983201257759899288253578617166706800 Nov 22 03:05:53 PM PST 23 Nov 22 03:07:06 PM PST 23 2231375727 ps
T582 /workspace/coverage/cover_reg_top/25.xbar_smoke.59184636400143811171669926401995876062681409072483350541569416105763602329959 Nov 22 03:05:42 PM PST 23 Nov 22 03:05:53 PM PST 23 196985727 ps
T583 /workspace/coverage/cover_reg_top/66.xbar_stress_all_with_error.39518753045334737733536415170909771270641820182111818972536319537505742889173 Nov 22 03:09:51 PM PST 23 Nov 22 03:18:07 PM PST 23 13999524073 ps
T584 /workspace/coverage/cover_reg_top/44.xbar_stress_all_with_reset_error.8395263362184872225848651883854088782822856166387832743108399037243901429625 Nov 22 03:07:40 PM PST 23 Nov 22 03:13:06 PM PST 23 4815189184 ps
T585 /workspace/coverage/cover_reg_top/37.xbar_stress_all_with_rand_reset.110228739998740352677235693123123938169716168424265975692984466293808409076566 Nov 22 03:06:41 PM PST 23 Nov 22 03:12:36 PM PST 23 4815189184 ps
T586 /workspace/coverage/cover_reg_top/62.xbar_access_same_device.61244395096459265073757330005237650725275469712477834798220737483317999255819 Nov 22 03:08:53 PM PST 23 Nov 22 03:10:40 PM PST 23 2590995727 ps
T587 /workspace/coverage/cover_reg_top/64.xbar_smoke_slow_rsp.114992152543768962666600280104020322840270020009742521091151596333094267550605 Nov 22 03:09:24 PM PST 23 Nov 22 03:10:54 PM PST 23 4856075727 ps
T588 /workspace/coverage/cover_reg_top/91.xbar_random_slow_rsp.41933917530572508099208965851291146427140875488840066121056300651846067511007 Nov 22 03:12:49 PM PST 23 Nov 22 03:31:14 PM PST 23 60576345727 ps
T589 /workspace/coverage/cover_reg_top/26.xbar_stress_all_with_rand_reset.73904076371753052169528525705549105337371141886494575721885388011890197133622 Nov 22 03:05:52 PM PST 23 Nov 22 03:12:02 PM PST 23 4815189184 ps
T590 /workspace/coverage/cover_reg_top/18.xbar_access_same_device_slow_rsp.75837407619223654880367569180349562379390382210999003071217017930102769218087 Nov 22 03:04:56 PM PST 23 Nov 22 03:36:21 PM PST 23 115195295727 ps
T591 /workspace/coverage/cover_reg_top/33.xbar_access_same_device.110372826687994867990010544309591645819513465315997115146355743292202332127654 Nov 22 03:06:05 PM PST 23 Nov 22 03:08:02 PM PST 23 2590995727 ps
T592 /workspace/coverage/cover_reg_top/68.xbar_stress_all_with_reset_error.48346782610986300186297970263634585412410029821985426379344465997589758502416 Nov 22 03:10:13 PM PST 23 Nov 22 03:15:38 PM PST 23 4815189184 ps
T593 /workspace/coverage/cover_reg_top/38.xbar_stress_all_with_reset_error.82171937574578053027814085249934404707564730673574904140485220905470142071779 Nov 22 03:06:39 PM PST 23 Nov 22 03:12:14 PM PST 23 4815189184 ps
T594 /workspace/coverage/cover_reg_top/34.xbar_random.86051680880468440384958859410159153683988967399661520695440953694589828593966 Nov 22 03:06:21 PM PST 23 Nov 22 03:07:42 PM PST 23 2231375727 ps
T595 /workspace/coverage/cover_reg_top/8.xbar_smoke_large_delays.113623908455912323968952919508003883015277838787057987822879332853817123599424 Nov 22 03:03:40 PM PST 23 Nov 22 03:05:05 PM PST 23 7758585727 ps
T596 /workspace/coverage/cover_reg_top/55.xbar_same_source.53556311783537940530001370462206767834333025004145053322831664980935501683667 Nov 22 03:08:30 PM PST 23 Nov 22 03:09:56 PM PST 23 2498784073 ps
T597 /workspace/coverage/cover_reg_top/52.xbar_smoke.78734232407875690335819242388718873338587355676044765151739608622148686481230 Nov 22 03:08:34 PM PST 23 Nov 22 03:08:43 PM PST 23 196985727 ps
T598 /workspace/coverage/cover_reg_top/23.xbar_random_large_delays.49246920408582562693387683791605518707452288897271402828057654638915551244958 Nov 22 03:05:46 PM PST 23 Nov 22 03:25:17 PM PST 23 97702135727 ps
T599 /workspace/coverage/cover_reg_top/74.xbar_random_large_delays.14820723362858360159934106244023588589026018677701771769039761535334064005190 Nov 22 03:10:33 PM PST 23 Nov 22 03:29:41 PM PST 23 97702135727 ps
T600 /workspace/coverage/cover_reg_top/76.xbar_access_same_device.67730220930541299413077930321932907272445559905986047179636999729003638471747 Nov 22 03:10:54 PM PST 23 Nov 22 03:12:44 PM PST 23 2590995727 ps
T601 /workspace/coverage/cover_reg_top/84.xbar_stress_all.99896535215117742556954493506319707204620052259714339895471567517881063251640 Nov 22 03:12:09 PM PST 23 Nov 22 03:20:55 PM PST 23 13992004073 ps
T602 /workspace/coverage/cover_reg_top/33.xbar_random_slow_rsp.36158983927518781942715718952376532846290108153590099536693116433597208802118 Nov 22 03:06:11 PM PST 23 Nov 22 03:24:28 PM PST 23 60576345727 ps
T603 /workspace/coverage/cover_reg_top/80.xbar_stress_all_with_rand_reset.52811746748790745241056823386375979833403123192655962302835830813217180065934 Nov 22 03:11:09 PM PST 23 Nov 22 03:17:00 PM PST 23 4815189184 ps
T604 /workspace/coverage/cover_reg_top/86.xbar_random_slow_rsp.54824571644453500582981981341249237026695981146465367499247568512488224445153 Nov 22 03:11:50 PM PST 23 Nov 22 03:30:26 PM PST 23 60576345727 ps
T605 /workspace/coverage/cover_reg_top/28.xbar_stress_all.28110216456563800959618939116639974294672605258178048660787599354750596282183 Nov 22 03:05:59 PM PST 23 Nov 22 03:14:39 PM PST 23 13992004073 ps
T606 /workspace/coverage/cover_reg_top/79.xbar_random.95030419404880114928915875909462661156953668899038806613019305260884679085867 Nov 22 03:10:56 PM PST 23 Nov 22 03:12:23 PM PST 23 2231375727 ps
T607 /workspace/coverage/cover_reg_top/23.xbar_random_slow_rsp.46223676920231194321243934286344513300436309476711661452520351527459330722381 Nov 22 03:05:52 PM PST 23 Nov 22 03:23:14 PM PST 23 60576345727 ps
T608 /workspace/coverage/cover_reg_top/27.xbar_smoke_slow_rsp.57174936195357488581436345520119818966133062915334628596826953875234524850604 Nov 22 03:05:48 PM PST 23 Nov 22 03:07:13 PM PST 23 4856075727 ps
T609 /workspace/coverage/cover_reg_top/99.xbar_error_and_unmapped_addr.31374877126748265786401588703680836329264379887638027004305032394896405110741 Nov 22 03:13:58 PM PST 23 Nov 22 03:14:41 PM PST 23 1171215727 ps
T610 /workspace/coverage/cover_reg_top/53.xbar_smoke.114330444400377216071397739654134190900187884090891943777713947716727383707562 Nov 22 03:08:14 PM PST 23 Nov 22 03:08:24 PM PST 23 196985727 ps
T611 /workspace/coverage/cover_reg_top/62.xbar_smoke_large_delays.54972588089320468673027601021862375093530927083472681497203556748564180476622 Nov 22 03:08:51 PM PST 23 Nov 22 03:10:22 PM PST 23 7758585727 ps
T612 /workspace/coverage/cover_reg_top/34.xbar_access_same_device.42716401403826562582431377792286164152793383695374499089405600366415389557288 Nov 22 03:06:18 PM PST 23 Nov 22 03:08:10 PM PST 23 2590995727 ps
T613 /workspace/coverage/cover_reg_top/51.xbar_smoke_slow_rsp.72912645333413981782802024261075441069753686977653187422099073174412777527100 Nov 22 03:08:00 PM PST 23 Nov 22 03:09:25 PM PST 23 4856075727 ps
T614 /workspace/coverage/cover_reg_top/0.xbar_access_same_device_slow_rsp.107811979471988142211199338826476397651953862491547934653251704333019863043478 Nov 22 03:03:36 PM PST 23 Nov 22 03:36:16 PM PST 23 115195295727 ps
T615 /workspace/coverage/cover_reg_top/16.xbar_access_same_device.89387414840662778033654670181292833155056019035538762062842612556739970565195 Nov 22 03:04:54 PM PST 23 Nov 22 03:06:37 PM PST 23 2590995727 ps
T616 /workspace/coverage/cover_reg_top/15.xbar_stress_all_with_reset_error.9309156201312198997697523243838353192046457735465594759946742866019036806330 Nov 22 03:04:53 PM PST 23 Nov 22 03:10:09 PM PST 23 4815189184 ps
T617 /workspace/coverage/cover_reg_top/83.xbar_stress_all_with_rand_reset.7468673046621425894418219239602732219562201017741675959194241227617204154561 Nov 22 03:11:53 PM PST 23 Nov 22 03:17:58 PM PST 23 4815189184 ps
T618 /workspace/coverage/cover_reg_top/51.xbar_stress_all_with_error.6485334051470267268575687662169968561600066851667579671655028622632511745815 Nov 22 03:08:23 PM PST 23 Nov 22 03:16:32 PM PST 23 13999524073 ps
T619 /workspace/coverage/cover_reg_top/21.xbar_smoke_large_delays.24108268815594253576749554514582179695759695463015801008865952541997293879578 Nov 22 03:05:46 PM PST 23 Nov 22 03:07:18 PM PST 23 7758585727 ps
T620 /workspace/coverage/cover_reg_top/59.xbar_smoke_zero_delays.99252590997898764403756199514317597414673169584672701452367492646202363591023 Nov 22 03:08:31 PM PST 23 Nov 22 03:08:38 PM PST 23 45555727 ps
T621 /workspace/coverage/cover_reg_top/3.xbar_stress_all_with_reset_error.85298573949838897747283050643130758002806114785916346427937521372421004147374 Nov 22 03:03:31 PM PST 23 Nov 22 03:08:31 PM PST 23 4815189184 ps
T622 /workspace/coverage/cover_reg_top/14.chip_csr_mem_rw_with_rand_reset.24788821402601934562701056056276238895077026273538936175848702407277570980971 Nov 22 03:04:17 PM PST 23 Nov 22 03:09:50 PM PST 23 7234930891 ps
T623 /workspace/coverage/cover_reg_top/25.xbar_unmapped_addr.33917058691998141764841923792288048093846506643394446041741816978878948258376 Nov 22 03:05:46 PM PST 23 Nov 22 03:06:36 PM PST 23 1176995727 ps
T624 /workspace/coverage/cover_reg_top/55.xbar_smoke_zero_delays.80365210979092856877910052570931002229628528861140091747770438688972430890764 Nov 22 03:08:48 PM PST 23 Nov 22 03:08:55 PM PST 23 45555727 ps
T625 /workspace/coverage/cover_reg_top/2.xbar_random_large_delays.83866389998782349933158146662512341191245895337200414760271590465873686528892 Nov 22 03:03:26 PM PST 23 Nov 22 03:21:34 PM PST 23 97702135727 ps
T626 /workspace/coverage/cover_reg_top/95.xbar_stress_all_with_error.36521277491775055627117635606021365575460751384831217655424720097971883534968 Nov 22 03:13:26 PM PST 23 Nov 22 03:21:13 PM PST 23 13999524073 ps
T627 /workspace/coverage/cover_reg_top/56.xbar_access_same_device.58122600072321158251911978499389941341654021050499796917479844084710737880084 Nov 22 03:08:27 PM PST 23 Nov 22 03:10:14 PM PST 23 2590995727 ps
T628 /workspace/coverage/cover_reg_top/35.xbar_smoke_large_delays.42405435551097450191738092967380917963118242449983251064874876386956858519638 Nov 22 03:06:12 PM PST 23 Nov 22 03:07:45 PM PST 23 7758585727 ps
T629 /workspace/coverage/cover_reg_top/28.xbar_random_slow_rsp.71540168961642693255152124815519719519239199816387182746282461590425702402442 Nov 22 03:05:59 PM PST 23 Nov 22 03:23:23 PM PST 23 60576345727 ps
T630 /workspace/coverage/cover_reg_top/97.xbar_error_random.54085224490725102895879044359307708780095505740682017590409048133735122744175 Nov 22 03:13:45 PM PST 23 Nov 22 03:14:59 PM PST 23 2231375727 ps
T631 /workspace/coverage/cover_reg_top/71.xbar_random_zero_delays.95156568766000637314090350713344897252321892172973478697332603787087958225562 Nov 22 03:10:22 PM PST 23 Nov 22 03:11:09 PM PST 23 556965727 ps
T632 /workspace/coverage/cover_reg_top/73.xbar_stress_all_with_rand_reset.33485510702992697731374059621801209778429972217377517925886076241716350891363 Nov 22 03:10:32 PM PST 23 Nov 22 03:16:29 PM PST 23 4815189184 ps
T633 /workspace/coverage/cover_reg_top/10.chip_csr_mem_rw_with_rand_reset.103586425426627801115927591267137377529101264275526994565018442794849560241654 Nov 22 03:04:04 PM PST 23 Nov 22 03:09:37 PM PST 23 7234930891 ps
T634 /workspace/coverage/cover_reg_top/18.xbar_error_and_unmapped_addr.82694449669950236157869838651183595579338545300654436907374448361754302079738 Nov 22 03:05:42 PM PST 23 Nov 22 03:06:30 PM PST 23 1171215727 ps
T635 /workspace/coverage/cover_reg_top/5.xbar_random_slow_rsp.85420716780919009295746070390933314543168780508389643326127434556184306039334 Nov 22 03:03:42 PM PST 23 Nov 22 03:20:28 PM PST 23 60576345727 ps
T636 /workspace/coverage/cover_reg_top/90.xbar_stress_all_with_rand_reset.22790532412198330259088013741174711072654722816998222262519405610527018471379 Nov 22 03:12:47 PM PST 23 Nov 22 03:19:00 PM PST 23 4815189184 ps
T637 /workspace/coverage/cover_reg_top/40.xbar_stress_all.51896779805999329573852384019413909012604356900145991680083389114811926923437 Nov 22 03:06:57 PM PST 23 Nov 22 03:15:42 PM PST 23 13992004073 ps
T638 /workspace/coverage/cover_reg_top/60.xbar_smoke_large_delays.13982568840085650028077372855579564248516949114349112214027397978892002193698 Nov 22 03:08:37 PM PST 23 Nov 22 03:10:10 PM PST 23 7758585727 ps
T639 /workspace/coverage/cover_reg_top/63.xbar_stress_all_with_reset_error.54523634749825341766477280265084662599725873113130644652340243229509454320245 Nov 22 03:09:12 PM PST 23 Nov 22 03:14:30 PM PST 23 4815189184 ps
T640 /workspace/coverage/cover_reg_top/29.xbar_smoke_large_delays.34674458685745398974984530890460870289387339385177029441781419148645753160840 Nov 22 03:05:58 PM PST 23 Nov 22 03:07:25 PM PST 23 7758585727 ps
T641 /workspace/coverage/cover_reg_top/29.xbar_error_random.67404201084079608177632397328354802336776229913669430633534297066785350245240 Nov 22 03:05:47 PM PST 23 Nov 22 03:07:02 PM PST 23 2231375727 ps
T10 /workspace/coverage/cover_reg_top/1.chip_csr_hw_reset.65132630688807639450519566049020948930439743073147814296056148154412809404023 Nov 22 03:03:47 PM PST 23 Nov 22 03:08:57 PM PST 23 5984936856 ps
T642 /workspace/coverage/cover_reg_top/54.xbar_access_same_device_slow_rsp.39866654255937698705992270345430182869569082201235031376697080823299663979894 Nov 22 03:08:35 PM PST 23 Nov 22 03:41:53 PM PST 23 115195295727 ps
T643 /workspace/coverage/cover_reg_top/99.xbar_random_slow_rsp.2561342009088755481007747968193066413860997013860042805942456134927490911840 Nov 22 03:13:42 PM PST 23 Nov 22 03:31:25 PM PST 23 60576345727 ps
T644 /workspace/coverage/cover_reg_top/96.xbar_stress_all_with_error.93786101129845523413218143958826459577544127086593756911966367737323183156900 Nov 22 03:13:30 PM PST 23 Nov 22 03:21:29 PM PST 23 13999524073 ps
T645 /workspace/coverage/cover_reg_top/94.xbar_smoke.60602289050961852650645318427256010073072172475713056053202007146716137554047 Nov 22 03:13:04 PM PST 23 Nov 22 03:13:13 PM PST 23 196985727 ps
T646 /workspace/coverage/cover_reg_top/31.xbar_smoke_large_delays.110550171603414078841781117786804756576797493424306739467325544565691422985589 Nov 22 03:06:13 PM PST 23 Nov 22 03:07:48 PM PST 23 7758585727 ps
T28 /workspace/coverage/cover_reg_top/11.chip_same_csr_outstanding.69248068769111650473759246922481145379916231134091924083096739795519363613700 Nov 22 03:04:01 PM PST 23 Nov 22 03:56:51 PM PST 23 30604932618 ps
T647 /workspace/coverage/cover_reg_top/77.xbar_unmapped_addr.12893806769708178593880338404755908453459223986351825865187856754300353963923 Nov 22 03:11:02 PM PST 23 Nov 22 03:11:53 PM PST 23 1176995727 ps
T24 /workspace/coverage/cover_reg_top/2.chip_csr_bit_bash.26368734563066750255518235795463266434099083602949894216448135743464254975125 Nov 22 03:03:08 PM PST 23 Nov 22 03:16:47 PM PST 23 7954924257 ps
T648 /workspace/coverage/cover_reg_top/16.xbar_random_zero_delays.59126517962544035186472426608072480051080506257532550393148416148413041429380 Nov 22 03:04:55 PM PST 23 Nov 22 03:05:42 PM PST 23 556965727 ps
T649 /workspace/coverage/cover_reg_top/80.xbar_smoke_slow_rsp.113665858601159174999834420860776984064740154235477332897926179845135565260177 Nov 22 03:11:11 PM PST 23 Nov 22 03:12:44 PM PST 23 4856075727 ps
T650 /workspace/coverage/cover_reg_top/55.xbar_stress_all_with_reset_error.13318994388236541116554035506115931829059340518099121095708540113388591869392 Nov 22 03:08:32 PM PST 23 Nov 22 03:13:45 PM PST 23 4815189184 ps
T651 /workspace/coverage/cover_reg_top/80.xbar_same_source.58988931537238022597149282509134681605443596057689274651893416565794168321830 Nov 22 03:11:10 PM PST 23 Nov 22 03:12:30 PM PST 23 2498784073 ps
T652 /workspace/coverage/cover_reg_top/92.xbar_stress_all.71899695672956942181634926113492385268881108216878611256223556331462995695495 Nov 22 03:12:57 PM PST 23 Nov 22 03:21:43 PM PST 23 13992004073 ps
T653 /workspace/coverage/cover_reg_top/1.xbar_unmapped_addr.95509289142117734756990627083162362296303595021037899817488300058369526970766 Nov 22 03:03:25 PM PST 23 Nov 22 03:04:16 PM PST 23 1176995727 ps
T654 /workspace/coverage/cover_reg_top/87.xbar_error_and_unmapped_addr.41662871221351721474096473604725436673585675412595911901702695014169256568838 Nov 22 03:12:29 PM PST 23 Nov 22 03:13:18 PM PST 23 1171215727 ps
T655 /workspace/coverage/cover_reg_top/72.xbar_random_large_delays.73046442743417511101411292807943011524656337225348335249645689037633228114000 Nov 22 03:10:27 PM PST 23 Nov 22 03:29:27 PM PST 23 97702135727 ps
T656 /workspace/coverage/cover_reg_top/40.xbar_smoke_zero_delays.108961647506500302564337783153345344806663828963249868662546905250393449204096 Nov 22 03:06:59 PM PST 23 Nov 22 03:07:06 PM PST 23 45555727 ps
T657 /workspace/coverage/cover_reg_top/35.xbar_stress_all_with_rand_reset.101106192829824065865378235440137846983326541190200923317782686195210490185888 Nov 22 03:06:29 PM PST 23 Nov 22 03:12:30 PM PST 23 4815189184 ps
T658 /workspace/coverage/cover_reg_top/9.xbar_random_slow_rsp.61177793835170340234418196283150837544335924750271981716601464584216635361626 Nov 22 03:03:56 PM PST 23 Nov 22 03:21:30 PM PST 23 60576345727 ps
T659 /workspace/coverage/cover_reg_top/33.xbar_smoke_slow_rsp.48762481844879877404131409819609418926258256184872757309892652635453384281882 Nov 22 03:06:06 PM PST 23 Nov 22 03:07:41 PM PST 23 4856075727 ps
T660 /workspace/coverage/cover_reg_top/41.xbar_same_source.41378197481016734208150749883340782909260145488933068729017758349091482737441 Nov 22 03:07:19 PM PST 23 Nov 22 03:08:38 PM PST 23 2498784073 ps
T661 /workspace/coverage/cover_reg_top/22.xbar_stress_all_with_reset_error.107451960685101925681500017166709393826786242275985055320020669819396762030111 Nov 22 03:05:19 PM PST 23 Nov 22 03:10:34 PM PST 23 4815189184 ps
T662 /workspace/coverage/cover_reg_top/5.chip_csr_mem_rw_with_rand_reset.89391720818051335631729134526079172347340760075552102864466002874019858600197 Nov 22 03:03:40 PM PST 23 Nov 22 03:08:43 PM PST 23 7234930891 ps
T663 /workspace/coverage/cover_reg_top/54.xbar_stress_all.8391018878524555087601489896696815620047052108512329498253316228479059995918 Nov 22 03:08:47 PM PST 23 Nov 22 03:17:39 PM PST 23 13992004073 ps
T664 /workspace/coverage/cover_reg_top/15.xbar_stress_all_with_error.93936056214700078173241238145166779421116447272317533331868171811995608315712 Nov 22 03:04:53 PM PST 23 Nov 22 03:13:31 PM PST 23 13999524073 ps
T665 /workspace/coverage/cover_reg_top/89.xbar_same_source.30019056282246686755967507276813510094448774679027250127404642517621000250909 Nov 22 03:12:36 PM PST 23 Nov 22 03:13:54 PM PST 23 2498784073 ps
T666 /workspace/coverage/cover_reg_top/82.xbar_error_random.106949563464981714918006222130986198363595162071340401379131543309617954635091 Nov 22 03:11:29 PM PST 23 Nov 22 03:12:41 PM PST 23 2231375727 ps
T11 /workspace/coverage/cover_reg_top/4.chip_csr_hw_reset.3705002965859158375563887834342926139139387229149001761563293905135383290092 Nov 22 03:03:32 PM PST 23 Nov 22 03:09:30 PM PST 23 5984936856 ps
T667 /workspace/coverage/cover_reg_top/48.xbar_random_zero_delays.11461813730615938463958639347508272522285139766130542243811601788160524740549 Nov 22 03:07:46 PM PST 23 Nov 22 03:08:39 PM PST 23 556965727 ps
T668 /workspace/coverage/cover_reg_top/48.xbar_stress_all_with_reset_error.31809079590754186675089692331666877896314997977502302855106421702342759715930 Nov 22 03:07:44 PM PST 23 Nov 22 03:13:15 PM PST 23 4815189184 ps
T669 /workspace/coverage/cover_reg_top/11.xbar_error_and_unmapped_addr.49452218173301903943307851762080682506300170876054486322081464189944376589967 Nov 22 03:04:11 PM PST 23 Nov 22 03:04:58 PM PST 23 1171215727 ps
T670 /workspace/coverage/cover_reg_top/78.xbar_error_and_unmapped_addr.99574704927607689448756373362241559387068774093496681660260768244512665332321 Nov 22 03:10:55 PM PST 23 Nov 22 03:11:42 PM PST 23 1171215727 ps
T671 /workspace/coverage/cover_reg_top/76.xbar_same_source.15900812967679858069067220181591820991754136341820010421358398328624817933661 Nov 22 03:10:36 PM PST 23 Nov 22 03:11:52 PM PST 23 2498784073 ps
T672 /workspace/coverage/cover_reg_top/94.xbar_access_same_device_slow_rsp.84678855606947685403391815902099577224048865317110219023996694289752287722024 Nov 22 03:13:18 PM PST 23 Nov 22 03:47:46 PM PST 23 115195295727 ps
T673 /workspace/coverage/cover_reg_top/68.xbar_random_large_delays.33228765820024248391064139000022885414999816836368959174633118732030167498207 Nov 22 03:10:01 PM PST 23 Nov 22 03:29:24 PM PST 23 97702135727 ps
T674 /workspace/coverage/cover_reg_top/19.xbar_smoke_large_delays.3586995742724618607250934194770133417025122928220714985651823815746604950117 Nov 22 03:05:42 PM PST 23 Nov 22 03:07:13 PM PST 23 7758585727 ps
T675 /workspace/coverage/cover_reg_top/22.xbar_random_slow_rsp.49358285188135489000522028121331484826617088322671450028791827927118417847292 Nov 22 03:05:30 PM PST 23 Nov 22 03:23:52 PM PST 23 60576345727 ps
T676 /workspace/coverage/cover_reg_top/90.xbar_smoke_zero_delays.26682046667857734670997834304649122978434306321510356314447624909344968067379 Nov 22 03:12:39 PM PST 23 Nov 22 03:12:46 PM PST 23 45555727 ps
T677 /workspace/coverage/cover_reg_top/10.xbar_access_same_device.19051828165225004672234328365650613184649042172798642282198539362179850468656 Nov 22 03:03:38 PM PST 23 Nov 22 03:05:16 PM PST 23 2590995727 ps
T678 /workspace/coverage/cover_reg_top/60.xbar_random.13435101517322531363146591706048245229361057163616399604591572764500989458190 Nov 22 03:08:45 PM PST 23 Nov 22 03:10:07 PM PST 23 2231375727 ps
T679 /workspace/coverage/cover_reg_top/66.xbar_smoke_large_delays.71376011048050208654233315613116135138163473303616393079960098625294779322911 Nov 22 03:09:49 PM PST 23 Nov 22 03:11:20 PM PST 23 7758585727 ps
T680 /workspace/coverage/cover_reg_top/38.xbar_error_and_unmapped_addr.4597166127338318729100742666319985150007236784849443869317085252394191884526 Nov 22 03:06:40 PM PST 23 Nov 22 03:07:26 PM PST 23 1171215727 ps
T681 /workspace/coverage/cover_reg_top/68.xbar_stress_all_with_rand_reset.84052551398871867341936007404518775849759287099918851651414132665254662572668 Nov 22 03:10:07 PM PST 23 Nov 22 03:16:32 PM PST 23 4815189184 ps
T53 /workspace/coverage/cover_reg_top/19.chip_csr_rw.74142582040430995677361645841934059849582538170317626542593412943694744503606 Nov 22 03:05:37 PM PST 23 Nov 22 03:14:13 PM PST 23 5924944675 ps
T682 /workspace/coverage/cover_reg_top/92.xbar_random_slow_rsp.109984595743861729786042841745791501140866773364356993624612945136044285882777 Nov 22 03:12:57 PM PST 23 Nov 22 03:30:56 PM PST 23 60576345727 ps
T683 /workspace/coverage/cover_reg_top/35.xbar_random.76640476450338777159872362188315796076225413787705548034114317846482021199610 Nov 22 03:06:29 PM PST 23 Nov 22 03:07:48 PM PST 23 2231375727 ps
T684 /workspace/coverage/cover_reg_top/54.xbar_access_same_device.87886289654791344797946171883496475432329777997165751820384998245790934158282 Nov 22 03:08:26 PM PST 23 Nov 22 03:10:13 PM PST 23 2590995727 ps
T685 /workspace/coverage/cover_reg_top/51.xbar_stress_all_with_rand_reset.15497401013798477468366282333392729011247008093107729013513052902009498491220 Nov 22 03:08:21 PM PST 23 Nov 22 03:14:59 PM PST 23 4815189184 ps
T686 /workspace/coverage/cover_reg_top/33.xbar_error_and_unmapped_addr.51366743259161662247349583286596214591325305139727590869475741201795907609491 Nov 22 03:06:23 PM PST 23 Nov 22 03:07:07 PM PST 23 1171215727 ps
T687 /workspace/coverage/cover_reg_top/43.xbar_same_source.27681224138825790985746832607618185458895247551610118194924436040308398155587 Nov 22 03:07:27 PM PST 23 Nov 22 03:08:48 PM PST 23 2498784073 ps
T688 /workspace/coverage/cover_reg_top/56.xbar_random_zero_delays.12366269426655953596074108269444224313180987968110556594227418744625390590062 Nov 22 03:08:47 PM PST 23 Nov 22 03:09:32 PM PST 23 556965727 ps
T689 /workspace/coverage/cover_reg_top/16.chip_tl_errors.8428794420410921354123359807796337335118300297526042130231130318530567311706 Nov 22 03:04:52 PM PST 23 Nov 22 03:07:40 PM PST 23 3069924257 ps
T690 /workspace/coverage/cover_reg_top/18.chip_csr_rw.43960553378852598709762502518482164858173672100773235923932766540469739058653 Nov 22 03:05:34 PM PST 23 Nov 22 03:15:09 PM PST 23 5924944675 ps
T691 /workspace/coverage/cover_reg_top/48.xbar_access_same_device_slow_rsp.85735121340174332216123268498350034947371228693463137612409480714612145114859 Nov 22 03:07:51 PM PST 23 Nov 22 03:41:48 PM PST 23 115195295727 ps
T692 /workspace/coverage/cover_reg_top/52.xbar_random_slow_rsp.20845478005503607158022828051172558927775415529975878454899371338864038488558 Nov 22 03:08:26 PM PST 23 Nov 22 03:27:09 PM PST 23 60576345727 ps
T693 /workspace/coverage/cover_reg_top/24.xbar_random_slow_rsp.10502740569966761873372298941562375373069437142384443982946982441706489586068 Nov 22 03:05:40 PM PST 23 Nov 22 03:23:46 PM PST 23 60576345727 ps
T694 /workspace/coverage/cover_reg_top/98.xbar_stress_all_with_reset_error.111164303514379533863906952252798786163394655725853699812389797655285097654085 Nov 22 03:13:53 PM PST 23 Nov 22 03:19:02 PM PST 23 4815189184 ps
T695 /workspace/coverage/cover_reg_top/46.xbar_random_zero_delays.95078920533558770159165293724536304095805034373304499589643164671883247440608 Nov 22 03:07:36 PM PST 23 Nov 22 03:08:20 PM PST 23 556965727 ps
T696 /workspace/coverage/cover_reg_top/42.xbar_same_source.85063087978924574659502921044554253386530837799314637500856118339982896358341 Nov 22 03:07:12 PM PST 23 Nov 22 03:08:33 PM PST 23 2498784073 ps
T697 /workspace/coverage/cover_reg_top/69.xbar_stress_all_with_error.49887985690750256336649754915581477441170573392352834419120617226048228986727 Nov 22 03:10:09 PM PST 23 Nov 22 03:18:36 PM PST 23 13999524073 ps
T698 /workspace/coverage/cover_reg_top/77.xbar_random_large_delays.83057830168003396859822408039873447147304625913270160814370792959193477478907 Nov 22 03:10:44 PM PST 23 Nov 22 03:29:55 PM PST 23 97702135727 ps
T699 /workspace/coverage/cover_reg_top/40.xbar_error_random.65321159908475821876806999948986784750679061887376288263344614045666705366340 Nov 22 03:06:58 PM PST 23 Nov 22 03:08:19 PM PST 23 2231375727 ps
T700 /workspace/coverage/cover_reg_top/12.xbar_stress_all_with_error.65697395446667004480383196295434220412605813119691409911522499820604834003543 Nov 22 03:04:20 PM PST 23 Nov 22 03:13:24 PM PST 23 13999524073 ps
T701 /workspace/coverage/cover_reg_top/48.xbar_smoke_zero_delays.31578975131616179607930093500005299293395138484378358728180129194330002397365 Nov 22 03:07:48 PM PST 23 Nov 22 03:07:57 PM PST 23 45555727 ps
T702 /workspace/coverage/cover_reg_top/25.xbar_smoke_zero_delays.84329290780635203932625669432756733095493783579956741883149256617661867540111 Nov 22 03:05:56 PM PST 23 Nov 22 03:06:02 PM PST 23 45555727 ps
T703 /workspace/coverage/cover_reg_top/76.xbar_smoke_slow_rsp.111764804982657072245306782823665805465184554159244783379339672149809160428696 Nov 22 03:10:54 PM PST 23 Nov 22 03:12:22 PM PST 23 4856075727 ps
T704 /workspace/coverage/cover_reg_top/29.xbar_random_zero_delays.60716077703699365368520265579080053725670579248124723807359900346821081194785 Nov 22 03:05:42 PM PST 23 Nov 22 03:06:27 PM PST 23 556965727 ps
T705 /workspace/coverage/cover_reg_top/71.xbar_stress_all_with_error.98577000759089595336288872693073053426264747095533808590636646891471451956505 Nov 22 03:10:20 PM PST 23 Nov 22 03:19:14 PM PST 23 13999524073 ps
T706 /workspace/coverage/cover_reg_top/51.xbar_random_large_delays.895394853263242224901821009894557754777940315758764950811968518729042565731 Nov 22 03:07:59 PM PST 23 Nov 22 03:27:26 PM PST 23 97702135727 ps
T707 /workspace/coverage/cover_reg_top/40.xbar_access_same_device.17816793959226578943040521525617514993267345341012104423382770349144647044979 Nov 22 03:06:59 PM PST 23 Nov 22 03:08:59 PM PST 23 2590995727 ps
T708 /workspace/coverage/cover_reg_top/20.xbar_random.34653728075256984653773652783935402993160127570165132639792632807426580406442 Nov 22 03:05:10 PM PST 23 Nov 22 03:06:28 PM PST 23 2231375727 ps
T709 /workspace/coverage/cover_reg_top/15.xbar_random.111847276995203311378678146755908523148666895333242045984824541753184611238475 Nov 22 03:04:54 PM PST 23 Nov 22 03:06:11 PM PST 23 2231375727 ps
T710 /workspace/coverage/cover_reg_top/45.xbar_smoke.24828396623127480301730019658784121827740742469290051094419204806783332320927 Nov 22 03:07:38 PM PST 23 Nov 22 03:07:48 PM PST 23 196985727 ps
T711 /workspace/coverage/cover_reg_top/25.xbar_stress_all_with_rand_reset.2224604095026173770295053478596501721808347934368071964624660685889136472100 Nov 22 03:06:00 PM PST 23 Nov 22 03:12:04 PM PST 23 4815189184 ps
T712 /workspace/coverage/cover_reg_top/14.xbar_random_zero_delays.52284957300656653783491901564492968942543450225412887449861372219639788127615 Nov 22 03:04:15 PM PST 23 Nov 22 03:05:04 PM PST 23 556965727 ps
T713 /workspace/coverage/cover_reg_top/1.chip_same_csr_outstanding.92539169368160659350254888710806531020999978556169083563991019768850592016987 Nov 22 03:03:43 PM PST 23 Nov 22 03:56:03 PM PST 23 30604932618 ps
T714 /workspace/coverage/cover_reg_top/60.xbar_random_slow_rsp.47092079562454166118760344802080290375784408258600574955461556185333065977780 Nov 22 03:08:42 PM PST 23 Nov 22 03:26:57 PM PST 23 60576345727 ps
T715 /workspace/coverage/cover_reg_top/77.xbar_smoke_large_delays.25079182650084387484168486686047900593332242789200336382587942695885189123279 Nov 22 03:10:46 PM PST 23 Nov 22 03:12:17 PM PST 23 7758585727 ps
T716 /workspace/coverage/cover_reg_top/2.xbar_stress_all_with_reset_error.95233988641469963994327508532579378491718215342964124129877225533937702139093 Nov 22 03:03:28 PM PST 23 Nov 22 03:08:44 PM PST 23 4815189184 ps
T717 /workspace/coverage/cover_reg_top/1.xbar_access_same_device.90814124228647836882889905466166350983702780525574142627600734547984346199974 Nov 22 03:03:08 PM PST 23 Nov 22 03:05:05 PM PST 23 2590995727 ps
T718 /workspace/coverage/cover_reg_top/4.xbar_smoke_large_delays.10834519657157038267001174755054956739597780558036420199947253813932264301504 Nov 22 03:03:38 PM PST 23 Nov 22 03:05:10 PM PST 23 7758585727 ps
T719 /workspace/coverage/cover_reg_top/64.xbar_stress_all_with_rand_reset.3871689791929359855114376640217613640012206190321139295796719225361467186424 Nov 22 03:09:49 PM PST 23 Nov 22 03:16:13 PM PST 23 4815189184 ps
T720 /workspace/coverage/cover_reg_top/16.xbar_smoke_zero_delays.40061034314295114009626448533660553660969403642291282816231727228899643521099 Nov 22 03:05:02 PM PST 23 Nov 22 03:05:08 PM PST 23 45555727 ps
T721 /workspace/coverage/cover_reg_top/79.xbar_random_zero_delays.5256813257151192864375596457707920262853424822039949169410581569861403805089 Nov 22 03:10:55 PM PST 23 Nov 22 03:11:44 PM PST 23 556965727 ps
T722 /workspace/coverage/cover_reg_top/68.xbar_random.82896230502260120281622432938669698284061048604744074036518105971352903261231 Nov 22 03:10:02 PM PST 23 Nov 22 03:11:21 PM PST 23 2231375727 ps
T48 /workspace/coverage/cover_reg_top/3.chip_csr_aliasing.24210315891335126769158062272937697869656934150918061448767130919091028073788 Nov 22 03:03:28 PM PST 23 Nov 22 05:48:39 PM PST 23 72959944675 ps
T723 /workspace/coverage/cover_reg_top/95.xbar_smoke_zero_delays.56127689319655709293851177930507203538873577415938597430445528283539545741838 Nov 22 03:13:18 PM PST 23 Nov 22 03:13:25 PM PST 23 45555727 ps
T724 /workspace/coverage/cover_reg_top/49.xbar_error_and_unmapped_addr.52448254269394873681305261933992773929637372617218100790161393095918323451588 Nov 22 03:08:09 PM PST 23 Nov 22 03:08:51 PM PST 23 1171215727 ps
T725 /workspace/coverage/cover_reg_top/12.xbar_unmapped_addr.30381594202123663432350176717377859534196130538638221165722787162864330631822 Nov 22 03:04:17 PM PST 23 Nov 22 03:05:03 PM PST 23 1176995727 ps
T726 /workspace/coverage/cover_reg_top/4.xbar_stress_all_with_reset_error.48125601098022192938989757325198449494418308454139129009657484235890205728174 Nov 22 03:03:37 PM PST 23 Nov 22 03:08:40 PM PST 23 4815189184 ps
T727 /workspace/coverage/cover_reg_top/56.xbar_error_and_unmapped_addr.51042376298676477691750695556327765452841521600384607490536202359388364856686 Nov 22 03:08:30 PM PST 23 Nov 22 03:09:15 PM PST 23 1171215727 ps
T728 /workspace/coverage/cover_reg_top/2.xbar_access_same_device_slow_rsp.6846388033339431903414496702773578406292563655103484311201034866149600385937 Nov 22 03:03:41 PM PST 23 Nov 22 03:34:32 PM PST 23 115195295727 ps
T729 /workspace/coverage/cover_reg_top/86.xbar_error_and_unmapped_addr.15489618452256152595440399705035212961955060584781054392411698958884269844757 Nov 22 03:12:00 PM PST 23 Nov 22 03:12:45 PM PST 23 1171215727 ps
T730 /workspace/coverage/cover_reg_top/47.xbar_smoke_large_delays.2334657765927620752416707565314165268174049637733227298342052355015756264722 Nov 22 03:07:41 PM PST 23 Nov 22 03:09:18 PM PST 23 7758585727 ps
T731 /workspace/coverage/cover_reg_top/90.xbar_stress_all_with_reset_error.82032888752292110323951716312032845927993520795559077229141047119509842406971 Nov 22 03:12:47 PM PST 23 Nov 22 03:17:59 PM PST 23 4815189184 ps
T732 /workspace/coverage/cover_reg_top/79.xbar_random_slow_rsp.53098453166828189663037191394261260152148774040959203375105387033385660673959 Nov 22 03:10:55 PM PST 23 Nov 22 03:29:10 PM PST 23 60576345727 ps
T733 /workspace/coverage/cover_reg_top/73.xbar_random_zero_delays.32591282824316582663942944778747859724115485583129476039720976389929378300091 Nov 22 03:10:34 PM PST 23 Nov 22 03:11:24 PM PST 23 556965727 ps
T734 /workspace/coverage/cover_reg_top/56.xbar_smoke_slow_rsp.59964788021416847340068110562936570662907775869767773843226168843213942005602 Nov 22 03:08:25 PM PST 23 Nov 22 03:09:54 PM PST 23 4856075727 ps
T735 /workspace/coverage/cover_reg_top/94.xbar_same_source.9142836503162590712469181857368175424768069888825791166411205440469348309723 Nov 22 03:13:15 PM PST 23 Nov 22 03:14:26 PM PST 23 2498784073 ps
T736 /workspace/coverage/cover_reg_top/29.xbar_smoke_zero_delays.72040361944242719754726379911509260570019439007041971289073698552584452744560 Nov 22 03:05:38 PM PST 23 Nov 22 03:05:45 PM PST 23 45555727 ps
T737 /workspace/coverage/cover_reg_top/52.xbar_unmapped_addr.65434047270791409361505052417504994383970480517875815192651933923438550640796 Nov 22 03:08:21 PM PST 23 Nov 22 03:09:14 PM PST 23 1176995727 ps
T13 /workspace/coverage/pad_ctrl_test_mode/9.chip_padctrl_attributes.106065033385108934942635365657642025959294250328944258952966673578185348190582 Nov 22 02:56:48 PM PST 23 Nov 22 03:00:31 PM PST 23 4139861104 ps
T14 /workspace/coverage/pad_ctrl_test_mode/4.chip_padctrl_attributes.30862242836865989722723526159259891850772090523596388286882899805559220768146 Nov 22 02:57:03 PM PST 23 Nov 22 03:00:56 PM PST 23 4139861104 ps
T15 /workspace/coverage/pad_ctrl_test_mode/6.chip_padctrl_attributes.35556829400896023535424209760458212166642657190595437894710840070627992238258 Nov 22 02:56:47 PM PST 23 Nov 22 03:00:23 PM PST 23 4139861104 ps
T29 /workspace/coverage/pad_ctrl_test_mode/1.chip_padctrl_attributes.100830255475954012778996288874847680199153870598825656413973604185287994218286 Nov 22 02:56:48 PM PST 23 Nov 22 03:00:30 PM PST 23 4139861104 ps
T30 /workspace/coverage/pad_ctrl_test_mode/0.chip_padctrl_attributes.83179476081569904360126467825112907954638681985474551093207759574275181087863 Nov 22 02:56:58 PM PST 23 Nov 22 03:00:45 PM PST 23 4139861104 ps
T31 /workspace/coverage/pad_ctrl_test_mode/5.chip_padctrl_attributes.2663858252819695666369638169812672701881305138511738108811859519051076821738 Nov 22 02:57:03 PM PST 23 Nov 22 03:00:44 PM PST 23 4139861104 ps
T32 /workspace/coverage/pad_ctrl_test_mode/7.chip_padctrl_attributes.100084258760626221546000911195997771922774770662475218262312802707628534957812 Nov 22 02:56:52 PM PST 23 Nov 22 03:00:17 PM PST 23 4139861104 ps
T33 /workspace/coverage/pad_ctrl_test_mode/3.chip_padctrl_attributes.52982201090226764670109832624800317726471762534712374620081399705501217396462 Nov 22 02:56:47 PM PST 23 Nov 22 03:00:19 PM PST 23 4139861104 ps
T34 /workspace/coverage/pad_ctrl_test_mode/2.chip_padctrl_attributes.112266305908233085513206898716635866217449999173828557466816788802817848361025 Nov 22 02:57:06 PM PST 23 Nov 22 03:00:52 PM PST 23 4139861104 ps
T35 /workspace/coverage/pad_ctrl_test_mode/8.chip_padctrl_attributes.18253652690566155292930272365901612206804666263626066846258299242032438277295 Nov 22 02:56:46 PM PST 23 Nov 22 03:00:20 PM PST 23 4139861104 ps
T19 /workspace/coverage/default/0.chip_jtag_csr_rw.82666310635438362931022012325167268063804073510308049291049505028557431125957 Nov 22 02:57:57 PM PST 23 Nov 22 03:31:07 PM PST 23 19824942265 ps
T20 /workspace/coverage/default/1.chip_jtag_csr_rw.15139171564599780679480516071123447978156046882236599645932690976109075184740 Nov 22 03:00:10 PM PST 23 Nov 22 03:30:16 PM PST 23 19824942265 ps
T16 /workspace/coverage/default/0.chip_jtag_mem_access.101178099729684598940586658916239046619658135003303933438672393203401501856559 Nov 22 02:57:59 PM PST 23 Nov 22 03:15:54 PM PST 23 12899942265 ps
T17 /workspace/coverage/default/1.chip_jtag_mem_access.48880388062736064776935427759863199800108558758047205985076848487667201346204 Nov 22 03:00:02 PM PST 23 Nov 22 03:19:37 PM PST 23 12899942265 ps
T36 /workspace/coverage/default/2.chip_jtag_csr_rw.90363197671015480043228336017794682121948800602284237437000415410528226275015 Nov 22 03:01:35 PM PST 23 Nov 22 03:34:13 PM PST 23 19824942265 ps
T18 /workspace/coverage/default/2.chip_jtag_mem_access.42796706793683884131005246545330886657934376219926404274909948844476748462764 Nov 22 03:01:35 PM PST 23 Nov 22 03:20:51 PM PST 23 12899942265 ps
T738 /workspace/coverage/cover_reg_top/22.xbar_access_same_device.92105710714273547871499921310135318137361267121463591076993774970603358563468 Nov 22 03:05:17 PM PST 23 Nov 22 03:07:08 PM PST 23 2590995727 ps
T739 /workspace/coverage/cover_reg_top/5.xbar_smoke.104699606128401642824226889491015619450144481020699250089559508313586624262078 Nov 22 03:03:36 PM PST 23 Nov 22 03:03:45 PM PST 23 196985727 ps
T740 /workspace/coverage/cover_reg_top/22.chip_tl_errors.110718109942339282241020159948145447973108324196711272628404648842316400761933 Nov 22 03:05:09 PM PST 23 Nov 22 03:08:24 PM PST 23 3069924257 ps
T741 /workspace/coverage/cover_reg_top/12.xbar_smoke.99763143714943447355475906564841643075085568154618794048645929562780761197130 Nov 22 03:04:02 PM PST 23 Nov 22 03:04:11 PM PST 23 196985727 ps
T742 /workspace/coverage/cover_reg_top/40.xbar_smoke_slow_rsp.93461065088952580866700301885079757929311914223822444064800834099919983026246 Nov 22 03:06:58 PM PST 23 Nov 22 03:08:30 PM PST 23 4856075727 ps
T743 /workspace/coverage/cover_reg_top/16.xbar_same_source.70366969214258240654854962134867865239775298447694361675618814272008638299092 Nov 22 03:04:52 PM PST 23 Nov 22 03:06:07 PM PST 23 2498784073 ps
T744 /workspace/coverage/cover_reg_top/14.xbar_stress_all.41286874753802295229254969931745254764969162191879806267558576153318097051875 Nov 22 03:04:16 PM PST 23 Nov 22 03:12:57 PM PST 23 13992004073 ps
T745 /workspace/coverage/cover_reg_top/93.xbar_random_slow_rsp.69896550679588984442873933341542893381419249862577085440349144417284128336828 Nov 22 03:12:58 PM PST 23 Nov 22 03:31:50 PM PST 23 60576345727 ps
T746 /workspace/coverage/cover_reg_top/25.xbar_stress_all.64330268081900012975513649652718148068718951320991015988938825634794664281136 Nov 22 03:05:49 PM PST 23 Nov 22 03:14:21 PM PST 23 13992004073 ps
T747 /workspace/coverage/cover_reg_top/17.xbar_smoke.75876125134743460408093395874017075628145694606347403639428085461369377415237 Nov 22 03:05:01 PM PST 23 Nov 22 03:05:10 PM PST 23 196985727 ps
T748 /workspace/coverage/cover_reg_top/99.xbar_stress_all_with_error.89589606834110729472520982294660237038765345271142560510177467711269041367816 Nov 22 03:13:54 PM PST 23 Nov 22 03:21:27 PM PST 23 13999524073 ps
T749 /workspace/coverage/cover_reg_top/48.xbar_random_slow_rsp.100836535947804725799514399873640911180766690988469325785202458472416924827131 Nov 22 03:07:50 PM PST 23 Nov 22 03:26:00 PM PST 23 60576345727 ps
T750 /workspace/coverage/cover_reg_top/16.xbar_random_large_delays.62642930522231261889237684362133793212846608149032222197983988343028418180343 Nov 22 03:04:52 PM PST 23 Nov 22 03:24:07 PM PST 23 97702135727 ps
T751 /workspace/coverage/cover_reg_top/2.xbar_random_slow_rsp.108214997809026726022568513565833195504780687441776963188952367730981451831127 Nov 22 03:03:38 PM PST 23 Nov 22 03:21:31 PM PST 23 60576345727 ps
T752 /workspace/coverage/cover_reg_top/51.xbar_stress_all_with_reset_error.89197667720632700180221962934101048654677867975903524096366803568447716025955 Nov 22 03:08:25 PM PST 23 Nov 22 03:13:39 PM PST 23 4815189184 ps
T753 /workspace/coverage/cover_reg_top/41.xbar_error_and_unmapped_addr.91468821700181777695157313230946833818932629822545809004569697583102364525125 Nov 22 03:07:12 PM PST 23 Nov 22 03:08:00 PM PST 23 1171215727 ps
T754 /workspace/coverage/cover_reg_top/88.xbar_same_source.47010871918672588255536624541291574442227218484696779179102782795410841066812 Nov 22 03:12:25 PM PST 23 Nov 22 03:13:47 PM PST 23 2498784073 ps
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