Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.keymgr_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	165239	1			T15	397		T16	25		T17	2
values[2]	4492	1			T15	70		T38	18		T61	1
values[3]	2042	1			T15	78		T38	33		T205	1
values[4]	1434	1			T15	50		T38	54		T268	6
values[5]	1129	1			T15	43		T38	63		T290	2
values[6]	974	1			T15	24		T38	38		T284	41
values[7]	861	1			T15	9		T38	49		T284	23
values[8]	730	1			T15	1		T38	44		T284	21
values[9]	608	1			T38	45		T284	22		T271	1
values[10]	562	1			T38	42		T284	16		T271	1
values[11]	443	1			T38	52		T284	5		T271	1
values[12]	341	1			T38	30		T284	9		T271	1
values[13]	317	1			T38	6		T284	3		T271	1
values[14]	304	1			T284	1		T271	1		T292	10
values[15]	287	1			T284	2		T271	1		T292	8
values[16]	278	1			T271	1		T292	3		T128	3
values[17]	241	1			T271	1		T292	1		T128	2
values[18]	223	1			T271	1		T128	1		T293	1
values[19]	253	1			T271	1		T128	2		T293	1
values[20]	200	1			T271	1		T128	1		T293	1
values[21]	231	1			T271	1		T128	1		T293	1
values[22]	225	1			T271	1		T128	2		T293	1
values[23]	173	1			T271	1		T128	2		T293	1
values[24]	166	1			T271	1		T128	2		T293	1
values[25]	145	1			T271	1		T128	4		T293	1
values[26]	127	1			T271	1		T128	2		T293	1
values[27]	155	1			T271	1		T128	2		T293	1
values[28]	141	1			T271	1		T128	1		T293	1
values[29]	131	1			T271	1		T128	2		T293	1
values[30]	130	1			T271	1		T128	4		T293	1
values[31]	164	1			T271	1		T128	1		T293	1
values[32]	154	1			T271	1		T128	1		T293	1
values[33]	143	1			T271	1		T128	4		T293	1
values[34]	153	1			T271	1		T128	3		T293	1
values[35]	117	1			T271	1		T128	2		T293	1
values[36]	93	1			T271	1		T128	1		T293	1
values[37]	97	1			T271	1		T128	3		T293	1
values[38]	134	1			T271	1		T128	3		T293	1
values[39]	126	1			T271	1		T128	2		T293	1
values[40]	137	1			T271	1		T128	2		T293	1
values[41]	105	1			T271	1		T128	4		T293	1
values[42]	99	1			T271	1		T128	1		T293	1
values[43]	89	1			T271	1		T128	1		T293	1
values[44]	69	1			T271	1		T128	1		T293	1
values[45]	60	1			T271	1		T128	2		T293	1
values[46]	66	1			T271	1		T128	2		T293	1
values[47]	63	1			T271	1		T128	2		T293	1
values[48]	64	1			T271	1		T128	2		T293	1
values[49]	57	1			T271	1		T128	3		T293	1
values[50]	59	1			T271	1		T128	2		T293	1
values[51]	64	1			T271	1		T128	3		T293	1
values[52]	66	1			T271	1		T128	3		T293	1
values[53]	67	1			T271	1		T128	4		T293	1
values[54]	73	1			T271	1		T128	5		T293	1
values[55]	77	1			T271	1		T128	4		T293	1
values[56]	72	1			T271	1		T128	1		T293	1
values[57]	54	1			T271	1		T128	1		T293	1
values[58]	48	1			T271	1		T128	1		T293	1
values[59]	54	1			T271	1		T128	4		T293	1
values[60]	60	1			T271	1		T128	1		T293	1
values[61]	70	1			T271	1		T128	4		T293	1
values[62]	75	1			T271	1		T128	3		T293	1
values[63]	73	1			T271	1		T128	1		T293	1
values[64]	59	1			T271	1		T128	3		T293	1
values[65]	65	1			T271	1		T128	2		T293	1
values[66]	62	1			T271	1		T128	2		T293	1
values[67]	65	1			T271	1		T128	2		T293	1
values[68]	65	1			T271	1		T128	3		T293	1
values[69]	70	1			T271	1		T128	6		T293	1
values[70]	56	1			T271	1		T128	2		T293	1
values[71]	68	1			T271	1		T128	2		T293	1
values[72]	63	1			T271	1		T128	2		T293	1
values[73]	64	1			T271	1		T128	5		T293	1
values[74]	61	1			T271	1		T128	1		T293	1
values[75]	61	1			T271	1		T128	2		T293	1
values[76]	73	1			T271	1		T128	2		T293	1
values[77]	72	1			T271	1		T128	4		T293	1
values[78]	75	1			T271	3		T128	2		T293	1
values[79]	90	1			T271	6		T128	3		T293	1
values[80]	90	1			T271	1		T128	3		T293	1
values[81]	80	1			T271	2		T128	1		T293	1
values[82]	59	1			T271	1		T128	2		T293	1
values[83]	67	1			T271	3		T128	1		T293	1
values[84]	78	1			T271	1		T128	2		T293	1
values[85]	79	1			T271	3		T128	3		T293	1
values[86]	75	1			T271	1		T128	1		T293	1
values[87]	72	1			T271	1		T128	5		T293	1
values[88]	70	1			T271	4		T128	5		T293	1
values[89]	61	1			T271	4		T128	1		T293	1
values[90]	83	1			T271	7		T128	2		T293	1
values[91]	70	1			T271	6		T128	3		T293	1
values[92]	80	1			T271	1		T128	3		T293	1
values[93]	82	1			T271	1		T128	4		T293	1
values[94]	78	1			T271	5		T128	1		T293	1
values[95]	72	1			T271	6		T128	1		T293	1
values[96]	67	1			T271	3		T128	3		T293	2
values[97]	93	1			T271	4		T128	5		T293	3
values[98]	69	1			T271	2		T128	4		T293	1
values[99]	76	1			T271	4		T128	5		T293	2
values[100]	70	1			T271	1		T128	3		T293	1
values[101]	77	1			T271	2		T128	1		T293	2
values[102]	77	1			T271	1		T128	3		T293	6
values[103]	87	1			T271	5		T128	1		T293	2
values[104]	84	1			T271	1		T128	3		T293	3
values[105]	81	1			T271	1		T128	2		T293	2
values[106]	73	1			T271	2		T128	1		T293	3
values[107]	83	1			T271	5		T128	4		T293	3
values[108]	83	1			T271	7		T128	2		T293	3
values[109]	81	1			T271	4		T128	3		T293	2
values[110]	86	1			T271	1		T128	3		T293	3
values[111]	98	1			T271	3		T128	5		T293	2
values[112]	85	1			T271	3		T128	2		T293	1
values[113]	96	1			T271	1		T128	8		T293	1
values[114]	102	1			T271	2		T128	3		T293	2
values[115]	77	1			T271	2		T128	2		T293	2
values[116]	102	1			T271	2		T128	6		T293	3
values[117]	92	1			T271	2		T128	10		T293	2
values[118]	99	1			T271	4		T128	7		T293	1
values[119]	84	1			T271	3		T128	2		T293	1
values[120]	96	1			T271	1		T128	6		T293	2
values[121]	88	1			T271	1		T128	9		T293	2
values[122]	107	1			T271	2		T128	10		T293	2
values[123]	163	1			T271	3		T128	5		T293	2
values[124]	206	1			T271	1		T128	14		T293	1
values[125]	402	1			T271	3		T128	22		T293	2
values[126]	767	1			T271	10		T128	33		T293	12
values[127]	2253	1			T271	106		T128	19		T293	101
values[128]	3789	1			T271	180		T128	1		T293	191