Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
86.37 88.78 85.73 70.11 86.46 88.35 98.80


Total tests in report: 1927
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
27.13 27.13 26.57 26.57 22.70 22.70 21.85 21.85 44.40 44.40 43.68 43.68 3.57 3.57 /workspace/coverage/cover_reg_top/13.chip_same_csr_outstanding.4017750282
53.50 26.37 70.20 43.63 57.19 34.48 57.08 35.24 66.27 21.87 49.44 5.76 20.83 17.25 /workspace/coverage/cover_reg_top/36.xbar_stress_all_with_error.917955742
68.26 14.76 81.68 11.47 74.90 17.72 62.33 5.24 83.59 17.31 86.25 36.80 20.83 0.00 /workspace/coverage/pad_ctrl_test_mode/1.chip_padctrl_attributes.2184787861
72.30 4.04 81.68 0.00 74.91 0.01 62.33 0.00 83.59 0.00 86.25 0.00 45.06 24.24 /workspace/coverage/cover_reg_top/92.xbar_access_same_device_slow_rsp.2475383159
75.28 2.98 81.68 0.00 75.06 0.15 62.33 0.00 83.64 0.05 86.25 0.00 62.76 17.70 /workspace/coverage/cover_reg_top/36.xbar_access_same_device_slow_rsp.1512361174
77.64 2.36 81.68 0.00 75.06 0.00 62.33 0.00 83.64 0.00 86.25 0.00 76.92 14.16 /workspace/coverage/cover_reg_top/27.xbar_access_same_device_slow_rsp.3873875000
79.10 1.45 81.68 0.00 75.23 0.17 62.33 0.00 83.70 0.07 86.25 0.00 85.40 8.48 /workspace/coverage/cover_reg_top/75.xbar_access_same_device_slow_rsp.1152547219
80.47 1.38 86.01 4.34 76.00 0.77 62.67 0.34 84.65 0.95 88.10 1.86 85.40 0.00 /workspace/coverage/default/2.chip_jtag_csr_rw.3953490171
81.50 1.03 86.02 0.01 78.76 2.76 65.65 2.97 84.65 0.00 88.10 0.00 85.82 0.42 /workspace/coverage/cover_reg_top/28.chip_tl_errors.1062120962
82.39 0.89 86.12 0.09 79.32 0.56 65.65 0.00 84.73 0.08 88.10 0.00 90.40 4.59 /workspace/coverage/cover_reg_top/95.xbar_stress_all_with_reset_error.1074361467
83.07 0.68 86.12 0.00 81.96 2.65 65.65 0.00 84.82 0.08 88.10 0.00 91.77 1.36 /workspace/coverage/cover_reg_top/43.xbar_random_large_delays.1616630492
83.72 0.65 86.68 0.56 83.02 1.06 66.94 1.30 85.74 0.92 88.10 0.00 91.82 0.05 /workspace/coverage/cover_reg_top/11.chip_same_csr_outstanding.3248934867
84.28 0.57 86.68 0.00 83.37 0.35 66.94 0.00 85.89 0.15 88.10 0.00 94.72 2.90 /workspace/coverage/cover_reg_top/48.xbar_stress_all_with_rand_reset.2043301451
84.58 0.30 86.68 0.00 83.37 0.00 66.94 0.00 85.89 0.00 88.10 0.00 96.50 1.78 /workspace/coverage/cover_reg_top/33.xbar_access_same_device_slow_rsp.2269055479
84.83 0.25 87.39 0.71 83.42 0.05 67.66 0.72 85.90 0.01 88.10 0.00 96.50 0.00 /workspace/coverage/cover_reg_top/1.chip_csr_hw_reset.3934810598
85.03 0.20 87.39 0.00 84.02 0.60 68.28 0.62 85.90 0.00 88.10 0.00 96.50 0.00 /workspace/coverage/cover_reg_top/20.chip_tl_errors.3164416118
85.20 0.17 87.39 0.00 84.44 0.42 68.28 0.00 86.10 0.21 88.10 0.00 96.87 0.38 /workspace/coverage/cover_reg_top/39.xbar_stress_all.668396056
85.35 0.15 87.39 0.00 84.44 0.00 68.28 0.00 86.10 0.00 88.10 0.00 97.77 0.89 /workspace/coverage/cover_reg_top/76.xbar_access_same_device_slow_rsp.3489228185
85.48 0.14 87.40 0.01 84.45 0.01 68.69 0.40 86.11 0.01 88.48 0.37 97.78 0.01 /workspace/coverage/cover_reg_top/10.chip_csr_mem_rw_with_rand_reset.843648350
85.59 0.11 87.40 0.00 84.53 0.08 68.69 0.00 86.16 0.05 88.48 0.00 98.29 0.52 /workspace/coverage/cover_reg_top/79.xbar_stress_all_with_rand_reset.2556119041
85.69 0.10 87.40 0.00 84.53 0.00 69.31 0.62 86.16 0.00 88.48 0.00 98.29 0.00 /workspace/coverage/cover_reg_top/2.chip_prim_tl_access.1959104007
85.79 0.10 87.77 0.37 84.54 0.01 69.50 0.20 86.16 0.00 88.48 0.00 98.29 0.00 /workspace/coverage/cover_reg_top/0.chip_csr_hw_reset.3624768122
85.87 0.08 87.82 0.05 84.73 0.18 69.64 0.14 86.28 0.12 88.48 0.00 98.29 0.00 /workspace/coverage/cover_reg_top/17.chip_csr_rw.3523653217
85.93 0.06 87.82 0.00 85.02 0.30 69.70 0.06 86.28 0.00 88.48 0.00 98.31 0.01 /workspace/coverage/cover_reg_top/19.chip_tl_errors.1838051087
85.99 0.06 88.02 0.20 85.02 0.00 69.82 0.13 86.28 0.00 88.48 0.00 98.31 0.00 /workspace/coverage/cover_reg_top/3.chip_csr_hw_reset.3160949436
86.03 0.04 88.08 0.06 85.17 0.15 69.83 0.01 86.32 0.03 88.48 0.00 98.31 0.00 /workspace/coverage/default/1.chip_jtag_csr_rw.3698544781
86.07 0.04 88.08 0.00 85.27 0.10 69.83 0.00 86.37 0.05 88.48 0.00 98.40 0.09 /workspace/coverage/cover_reg_top/74.xbar_stress_all_with_rand_reset.3206274166
86.10 0.03 88.27 0.19 85.27 0.00 69.83 0.00 86.37 0.00 88.48 0.00 98.40 0.00 /workspace/coverage/default/0.chip_jtag_csr_rw.2627410327
86.13 0.03 88.36 0.10 85.35 0.08 69.83 0.00 86.37 0.00 88.48 0.00 98.40 0.00 /workspace/coverage/cover_reg_top/7.chip_tl_errors.1834520536
86.15 0.02 88.45 0.09 85.36 0.01 69.88 0.05 86.37 0.00 88.48 0.00 98.40 0.00 /workspace/coverage/cover_reg_top/4.chip_csr_hw_reset.357164320
86.18 0.02 88.45 0.00 85.43 0.07 69.88 0.00 86.40 0.03 88.48 0.00 98.44 0.04 /workspace/coverage/cover_reg_top/33.xbar_stress_all_with_rand_reset.1946752520
86.20 0.02 88.47 0.03 85.45 0.01 69.97 0.10 86.41 0.01 88.48 0.00 98.44 0.00 /workspace/coverage/default/0.chip_jtag_mem_access.507598713
86.22 0.02 88.47 0.00 85.45 0.01 69.97 0.00 86.41 0.00 88.48 0.00 98.55 0.12 /workspace/coverage/cover_reg_top/12.xbar_stress_all_with_reset_error.3366799837
86.24 0.02 88.50 0.03 85.49 0.04 69.99 0.02 86.42 0.02 88.48 0.00 98.55 0.00 /workspace/coverage/cover_reg_top/5.chip_same_csr_outstanding.1397238657
86.26 0.02 88.50 0.00 85.56 0.07 70.01 0.01 86.42 0.00 88.48 0.00 98.57 0.01 /workspace/coverage/cover_reg_top/15.chip_tl_errors.978926958
86.27 0.01 88.56 0.05 85.56 0.00 70.03 0.02 86.42 0.00 88.48 0.00 98.57 0.00 /workspace/coverage/cover_reg_top/2.chip_csr_hw_reset.2247459588
86.28 0.01 88.59 0.03 85.60 0.03 70.03 0.00 86.44 0.02 88.48 0.00 98.57 0.00 /workspace/coverage/pad_ctrl_test_mode/3.chip_padctrl_attributes.3249316073
86.29 0.01 88.59 0.00 85.62 0.02 70.03 0.00 86.46 0.02 88.48 0.00 98.58 0.01 /workspace/coverage/cover_reg_top/54.xbar_stress_all_with_rand_reset.3480315433
86.30 0.01 88.59 0.00 85.62 0.00 70.03 0.00 86.46 0.00 88.48 0.00 98.62 0.05 /workspace/coverage/cover_reg_top/19.xbar_stress_all_with_reset_error.2814315657
86.31 0.01 88.59 0.00 85.64 0.02 70.05 0.02 86.46 0.00 88.48 0.00 98.62 0.00 /workspace/coverage/cover_reg_top/27.chip_tl_errors.2238679981
86.31 0.01 88.59 0.01 85.64 0.00 70.09 0.04 86.46 0.00 88.48 0.00 98.62 0.00 /workspace/coverage/cover_reg_top/19.chip_same_csr_outstanding.3505559294
86.32 0.01 88.59 0.00 85.64 0.00 70.09 0.00 86.46 0.00 88.48 0.00 98.66 0.04 /workspace/coverage/cover_reg_top/26.xbar_stress_all_with_reset_error.4168173742
86.32 0.01 88.59 0.00 85.64 0.00 70.09 0.00 86.46 0.00 88.48 0.00 98.69 0.04 /workspace/coverage/cover_reg_top/66.xbar_random_slow_rsp.1924312755
86.33 0.01 88.59 0.00 85.64 0.00 70.09 0.00 86.46 0.00 88.48 0.00 98.72 0.02 /workspace/coverage/cover_reg_top/15.xbar_stress_all_with_rand_reset.1683172186
86.33 0.01 88.59 0.00 85.64 0.00 70.09 0.00 86.46 0.00 88.48 0.00 98.74 0.02 /workspace/coverage/cover_reg_top/26.xbar_stress_all_with_rand_reset.1565989165
86.34 0.01 88.59 0.00 85.64 0.00 70.09 0.00 86.46 0.00 88.48 0.00 98.77 0.02 /workspace/coverage/cover_reg_top/36.xbar_stress_all_with_reset_error.2288825642
86.34 0.01 88.59 0.00 85.66 0.02 70.09 0.00 86.46 0.00 88.48 0.00 98.77 0.00 /workspace/coverage/cover_reg_top/11.chip_tl_errors.3454101131
86.34 0.01 88.59 0.00 85.67 0.01 70.10 0.01 86.46 0.00 88.48 0.00 98.77 0.00 /workspace/coverage/cover_reg_top/11.chip_csr_rw.1956272359
86.35 0.01 88.59 0.00 85.68 0.01 70.10 0.00 86.46 0.00 88.48 0.00 98.78 0.01 /workspace/coverage/cover_reg_top/5.xbar_stress_all_with_reset_error.1320063350
86.35 0.01 88.59 0.00 85.69 0.01 70.10 0.00 86.46 0.00 88.48 0.00 98.78 0.00 /workspace/coverage/cover_reg_top/0.chip_tl_errors.2720323628
86.35 0.01 88.59 0.00 85.69 0.00 70.10 0.00 86.46 0.00 88.48 0.00 98.79 0.01 /workspace/coverage/cover_reg_top/11.xbar_stress_all_with_reset_error.629856763
86.35 0.01 88.59 0.00 85.69 0.00 70.10 0.00 86.46 0.00 88.48 0.00 98.80 0.01 /workspace/coverage/cover_reg_top/21.xbar_stress_all_with_reset_error.584302631
86.35 0.01 88.59 0.00 85.70 0.01 70.10 0.00 86.46 0.00 88.48 0.00 98.80 0.00 /workspace/coverage/cover_reg_top/25.chip_tl_errors.672270974
86.35 0.01 88.59 0.00 85.71 0.01 70.10 0.00 86.46 0.00 88.48 0.00 98.80 0.00 /workspace/coverage/cover_reg_top/93.xbar_stress_all_with_error.427579148
86.36 0.01 88.59 0.00 85.71 0.00 70.10 0.01 86.46 0.00 88.48 0.00 98.80 0.00 /workspace/coverage/cover_reg_top/3.chip_csr_bit_bash.3399264150
86.36 0.01 88.59 0.00 85.71 0.00 70.11 0.01 86.46 0.00 88.48 0.00 98.80 0.00 /workspace/coverage/cover_reg_top/4.chip_csr_aliasing.3198445321
86.36 0.01 88.59 0.00 85.71 0.01 70.11 0.00 86.46 0.00 88.48 0.00 98.80 0.00 /workspace/coverage/cover_reg_top/15.xbar_stress_all_with_reset_error.1496042886
86.36 0.01 88.59 0.00 85.72 0.01 70.11 0.00 86.46 0.00 88.48 0.00 98.80 0.00 /workspace/coverage/cover_reg_top/46.xbar_error_random.1810298616
86.36 0.01 88.59 0.00 85.72 0.01 70.11 0.00 86.46 0.00 88.48 0.00 98.80 0.00 /workspace/coverage/cover_reg_top/65.xbar_error_random.1153618375
86.36 0.01 88.59 0.00 85.72 0.01 70.11 0.00 86.46 0.00 88.48 0.00 98.80 0.00 /workspace/coverage/cover_reg_top/7.xbar_stress_all_with_error.3393797079
86.36 0.01 88.59 0.00 85.73 0.01 70.11 0.00 86.46 0.00 88.48 0.00 98.80 0.00 /workspace/coverage/cover_reg_top/74.xbar_stress_all_with_error.2152140370

Tests that do not contribute to grading

Name
/workspace/coverage/cover_reg_top/0.chip_csr_aliasing.608851422
/workspace/coverage/cover_reg_top/0.chip_csr_bit_bash.1613131443
/workspace/coverage/cover_reg_top/0.chip_csr_mem_rw_with_rand_reset.2199737931
/workspace/coverage/cover_reg_top/0.chip_csr_rw.3205668802
/workspace/coverage/cover_reg_top/0.chip_prim_tl_access.1535121275
/workspace/coverage/cover_reg_top/0.chip_rv_dm_lc_disabled.2885593900
/workspace/coverage/cover_reg_top/0.chip_same_csr_outstanding.1567428631
/workspace/coverage/cover_reg_top/0.xbar_access_same_device.3999781728
/workspace/coverage/cover_reg_top/0.xbar_access_same_device_slow_rsp.1662475812
/workspace/coverage/cover_reg_top/0.xbar_error_and_unmapped_addr.2107804414
/workspace/coverage/cover_reg_top/0.xbar_error_random.3305704085
/workspace/coverage/cover_reg_top/0.xbar_random.3324915614
/workspace/coverage/cover_reg_top/0.xbar_random_large_delays.4064633744
/workspace/coverage/cover_reg_top/0.xbar_random_slow_rsp.3865560801
/workspace/coverage/cover_reg_top/0.xbar_random_zero_delays.1868235905
/workspace/coverage/cover_reg_top/0.xbar_same_source.3607082156
/workspace/coverage/cover_reg_top/0.xbar_smoke.3353974916
/workspace/coverage/cover_reg_top/0.xbar_smoke_large_delays.1535916300
/workspace/coverage/cover_reg_top/0.xbar_smoke_slow_rsp.3209546082
/workspace/coverage/cover_reg_top/0.xbar_smoke_zero_delays.1175938333
/workspace/coverage/cover_reg_top/0.xbar_stress_all.1025846276
/workspace/coverage/cover_reg_top/0.xbar_stress_all_with_error.3127015552
/workspace/coverage/cover_reg_top/0.xbar_stress_all_with_rand_reset.1442521596
/workspace/coverage/cover_reg_top/0.xbar_stress_all_with_reset_error.3142938040
/workspace/coverage/cover_reg_top/0.xbar_unmapped_addr.2873860336
/workspace/coverage/cover_reg_top/1.chip_csr_aliasing.3684138218
/workspace/coverage/cover_reg_top/1.chip_csr_bit_bash.2978589735
/workspace/coverage/cover_reg_top/1.chip_csr_mem_rw_with_rand_reset.3687092506
/workspace/coverage/cover_reg_top/1.chip_csr_rw.1975670693
/workspace/coverage/cover_reg_top/1.chip_prim_tl_access.4071792246
/workspace/coverage/cover_reg_top/1.chip_rv_dm_lc_disabled.2776967924
/workspace/coverage/cover_reg_top/1.chip_same_csr_outstanding.4070309102
/workspace/coverage/cover_reg_top/1.chip_tl_errors.4157034069
/workspace/coverage/cover_reg_top/1.xbar_access_same_device.51735880
/workspace/coverage/cover_reg_top/1.xbar_access_same_device_slow_rsp.1791147642
/workspace/coverage/cover_reg_top/1.xbar_error_and_unmapped_addr.1174759268
/workspace/coverage/cover_reg_top/1.xbar_error_random.989425614
/workspace/coverage/cover_reg_top/1.xbar_random.4022941550
/workspace/coverage/cover_reg_top/1.xbar_random_large_delays.2762961146
/workspace/coverage/cover_reg_top/1.xbar_random_slow_rsp.1682626177
/workspace/coverage/cover_reg_top/1.xbar_random_zero_delays.2137021240
/workspace/coverage/cover_reg_top/1.xbar_same_source.3326963911
/workspace/coverage/cover_reg_top/1.xbar_smoke.970621897
/workspace/coverage/cover_reg_top/1.xbar_smoke_large_delays.4184323993
/workspace/coverage/cover_reg_top/1.xbar_smoke_slow_rsp.1627406693
/workspace/coverage/cover_reg_top/1.xbar_smoke_zero_delays.2597417354
/workspace/coverage/cover_reg_top/1.xbar_stress_all.4212434616
/workspace/coverage/cover_reg_top/1.xbar_stress_all_with_error.810400966
/workspace/coverage/cover_reg_top/1.xbar_stress_all_with_rand_reset.3358861059
/workspace/coverage/cover_reg_top/1.xbar_stress_all_with_reset_error.3876252036
/workspace/coverage/cover_reg_top/1.xbar_unmapped_addr.1442935578
/workspace/coverage/cover_reg_top/10.chip_csr_rw.3978106964
/workspace/coverage/cover_reg_top/10.chip_same_csr_outstanding.3996475344
/workspace/coverage/cover_reg_top/10.chip_tl_errors.3104875752
/workspace/coverage/cover_reg_top/10.xbar_access_same_device.2513342905
/workspace/coverage/cover_reg_top/10.xbar_access_same_device_slow_rsp.913065038
/workspace/coverage/cover_reg_top/10.xbar_error_and_unmapped_addr.3170811211
/workspace/coverage/cover_reg_top/10.xbar_error_random.572135996
/workspace/coverage/cover_reg_top/10.xbar_random.867524285
/workspace/coverage/cover_reg_top/10.xbar_random_large_delays.2857698682
/workspace/coverage/cover_reg_top/10.xbar_random_slow_rsp.482390068
/workspace/coverage/cover_reg_top/10.xbar_random_zero_delays.2897933469
/workspace/coverage/cover_reg_top/10.xbar_same_source.2419688835
/workspace/coverage/cover_reg_top/10.xbar_smoke.3872842507
/workspace/coverage/cover_reg_top/10.xbar_smoke_large_delays.193558142
/workspace/coverage/cover_reg_top/10.xbar_smoke_slow_rsp.1555666212
/workspace/coverage/cover_reg_top/10.xbar_smoke_zero_delays.595616266
/workspace/coverage/cover_reg_top/10.xbar_stress_all.3700613681
/workspace/coverage/cover_reg_top/10.xbar_stress_all_with_error.2507172356
/workspace/coverage/cover_reg_top/10.xbar_stress_all_with_rand_reset.612909822
/workspace/coverage/cover_reg_top/10.xbar_stress_all_with_reset_error.883239015
/workspace/coverage/cover_reg_top/10.xbar_unmapped_addr.862370561
/workspace/coverage/cover_reg_top/11.chip_csr_mem_rw_with_rand_reset.1123694017
/workspace/coverage/cover_reg_top/11.xbar_access_same_device.1705220345
/workspace/coverage/cover_reg_top/11.xbar_access_same_device_slow_rsp.1080288324
/workspace/coverage/cover_reg_top/11.xbar_error_and_unmapped_addr.2053002897
/workspace/coverage/cover_reg_top/11.xbar_error_random.2511553427
/workspace/coverage/cover_reg_top/11.xbar_random.3916128920
/workspace/coverage/cover_reg_top/11.xbar_random_large_delays.2878902100
/workspace/coverage/cover_reg_top/11.xbar_random_slow_rsp.4210946681
/workspace/coverage/cover_reg_top/11.xbar_random_zero_delays.3728979039
/workspace/coverage/cover_reg_top/11.xbar_same_source.1993160855
/workspace/coverage/cover_reg_top/11.xbar_smoke.450758915
/workspace/coverage/cover_reg_top/11.xbar_smoke_large_delays.3012976425
/workspace/coverage/cover_reg_top/11.xbar_smoke_slow_rsp.1110551005
/workspace/coverage/cover_reg_top/11.xbar_smoke_zero_delays.4000263516
/workspace/coverage/cover_reg_top/11.xbar_stress_all.1200670692
/workspace/coverage/cover_reg_top/11.xbar_stress_all_with_error.3346688878
/workspace/coverage/cover_reg_top/11.xbar_stress_all_with_rand_reset.653142793
/workspace/coverage/cover_reg_top/11.xbar_unmapped_addr.734882136
/workspace/coverage/cover_reg_top/12.chip_csr_mem_rw_with_rand_reset.428403277
/workspace/coverage/cover_reg_top/12.chip_csr_rw.831645771
/workspace/coverage/cover_reg_top/12.chip_same_csr_outstanding.89203350
/workspace/coverage/cover_reg_top/12.chip_tl_errors.3713396508
/workspace/coverage/cover_reg_top/12.xbar_access_same_device.1701285150
/workspace/coverage/cover_reg_top/12.xbar_access_same_device_slow_rsp.3019541511
/workspace/coverage/cover_reg_top/12.xbar_error_and_unmapped_addr.4239426599
/workspace/coverage/cover_reg_top/12.xbar_error_random.19967197
/workspace/coverage/cover_reg_top/12.xbar_random.283689564
/workspace/coverage/cover_reg_top/12.xbar_random_large_delays.1498963754
/workspace/coverage/cover_reg_top/12.xbar_random_slow_rsp.1223371577
/workspace/coverage/cover_reg_top/12.xbar_random_zero_delays.2630402110
/workspace/coverage/cover_reg_top/12.xbar_same_source.703479762
/workspace/coverage/cover_reg_top/12.xbar_smoke.3533538823
/workspace/coverage/cover_reg_top/12.xbar_smoke_large_delays.1498930316
/workspace/coverage/cover_reg_top/12.xbar_smoke_slow_rsp.3516552979
/workspace/coverage/cover_reg_top/12.xbar_smoke_zero_delays.864951757
/workspace/coverage/cover_reg_top/12.xbar_stress_all.4203474351
/workspace/coverage/cover_reg_top/12.xbar_stress_all_with_error.4045892768
/workspace/coverage/cover_reg_top/12.xbar_stress_all_with_rand_reset.3471107246
/workspace/coverage/cover_reg_top/12.xbar_unmapped_addr.3330050509
/workspace/coverage/cover_reg_top/13.chip_csr_mem_rw_with_rand_reset.3924925597
/workspace/coverage/cover_reg_top/13.chip_csr_rw.2288014126
/workspace/coverage/cover_reg_top/13.chip_tl_errors.2281265736
/workspace/coverage/cover_reg_top/13.xbar_access_same_device.3878495443
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/workspace/coverage/cover_reg_top/90.xbar_smoke_large_delays.70489216
/workspace/coverage/cover_reg_top/90.xbar_smoke_slow_rsp.1125952946
/workspace/coverage/cover_reg_top/90.xbar_smoke_zero_delays.1943582250
/workspace/coverage/cover_reg_top/90.xbar_stress_all.342219563
/workspace/coverage/cover_reg_top/90.xbar_stress_all_with_error.1376536036
/workspace/coverage/cover_reg_top/90.xbar_stress_all_with_rand_reset.2857217916
/workspace/coverage/cover_reg_top/90.xbar_stress_all_with_reset_error.224315677
/workspace/coverage/cover_reg_top/90.xbar_unmapped_addr.4010903658
/workspace/coverage/cover_reg_top/91.xbar_access_same_device.3121762250
/workspace/coverage/cover_reg_top/91.xbar_access_same_device_slow_rsp.1454729156
/workspace/coverage/cover_reg_top/91.xbar_error_and_unmapped_addr.3248684433
/workspace/coverage/cover_reg_top/91.xbar_error_random.233194378
/workspace/coverage/cover_reg_top/91.xbar_random.662438432
/workspace/coverage/cover_reg_top/91.xbar_random_large_delays.982557362
/workspace/coverage/cover_reg_top/91.xbar_random_slow_rsp.3359009057
/workspace/coverage/cover_reg_top/91.xbar_random_zero_delays.600968164
/workspace/coverage/cover_reg_top/91.xbar_same_source.1952021428
/workspace/coverage/cover_reg_top/91.xbar_smoke.3174211593
/workspace/coverage/cover_reg_top/91.xbar_smoke_large_delays.3887828491
/workspace/coverage/cover_reg_top/91.xbar_smoke_slow_rsp.824044037
/workspace/coverage/cover_reg_top/91.xbar_smoke_zero_delays.2015550852
/workspace/coverage/cover_reg_top/91.xbar_stress_all.2406300129
/workspace/coverage/cover_reg_top/91.xbar_stress_all_with_error.1569101508
/workspace/coverage/cover_reg_top/91.xbar_stress_all_with_rand_reset.3088278997
/workspace/coverage/cover_reg_top/91.xbar_stress_all_with_reset_error.4282395308
/workspace/coverage/cover_reg_top/91.xbar_unmapped_addr.3336142645
/workspace/coverage/cover_reg_top/92.xbar_access_same_device.3539120159
/workspace/coverage/cover_reg_top/92.xbar_error_and_unmapped_addr.1891173625
/workspace/coverage/cover_reg_top/92.xbar_error_random.3850855140
/workspace/coverage/cover_reg_top/92.xbar_random.3534570309
/workspace/coverage/cover_reg_top/92.xbar_random_large_delays.1808973084
/workspace/coverage/cover_reg_top/92.xbar_random_slow_rsp.1461234670
/workspace/coverage/cover_reg_top/92.xbar_random_zero_delays.189157274
/workspace/coverage/cover_reg_top/92.xbar_same_source.1974280045
/workspace/coverage/cover_reg_top/92.xbar_smoke.2559811007
/workspace/coverage/cover_reg_top/92.xbar_smoke_large_delays.2682268980
/workspace/coverage/cover_reg_top/92.xbar_smoke_slow_rsp.2292991544
/workspace/coverage/cover_reg_top/92.xbar_smoke_zero_delays.1379258334
/workspace/coverage/cover_reg_top/92.xbar_stress_all.2373951747
/workspace/coverage/cover_reg_top/92.xbar_stress_all_with_error.2180129273
/workspace/coverage/cover_reg_top/92.xbar_stress_all_with_rand_reset.464901180
/workspace/coverage/cover_reg_top/92.xbar_stress_all_with_reset_error.206452790
/workspace/coverage/cover_reg_top/92.xbar_unmapped_addr.686667544
/workspace/coverage/cover_reg_top/93.xbar_access_same_device.1488571794
/workspace/coverage/cover_reg_top/93.xbar_access_same_device_slow_rsp.3952356453
/workspace/coverage/cover_reg_top/93.xbar_error_and_unmapped_addr.1885207094
/workspace/coverage/cover_reg_top/93.xbar_error_random.3595342111
/workspace/coverage/cover_reg_top/93.xbar_random.1168021954
/workspace/coverage/cover_reg_top/93.xbar_random_large_delays.1584486457
/workspace/coverage/cover_reg_top/93.xbar_random_slow_rsp.999002217
/workspace/coverage/cover_reg_top/93.xbar_random_zero_delays.642610835
/workspace/coverage/cover_reg_top/93.xbar_same_source.1919939248
/workspace/coverage/cover_reg_top/93.xbar_smoke.3462285740
/workspace/coverage/cover_reg_top/93.xbar_smoke_large_delays.1554040311
/workspace/coverage/cover_reg_top/93.xbar_smoke_slow_rsp.1227990154
/workspace/coverage/cover_reg_top/93.xbar_smoke_zero_delays.1574940747
/workspace/coverage/cover_reg_top/93.xbar_stress_all.160886148
/workspace/coverage/cover_reg_top/93.xbar_stress_all_with_rand_reset.3642529966
/workspace/coverage/cover_reg_top/93.xbar_stress_all_with_reset_error.2478701526
/workspace/coverage/cover_reg_top/93.xbar_unmapped_addr.3159820042
/workspace/coverage/cover_reg_top/94.xbar_access_same_device.3124953742
/workspace/coverage/cover_reg_top/94.xbar_access_same_device_slow_rsp.2311207482
/workspace/coverage/cover_reg_top/94.xbar_error_and_unmapped_addr.1456079789
/workspace/coverage/cover_reg_top/94.xbar_error_random.2589815113
/workspace/coverage/cover_reg_top/94.xbar_random.1293541607
/workspace/coverage/cover_reg_top/94.xbar_random_large_delays.840023102
/workspace/coverage/cover_reg_top/94.xbar_random_slow_rsp.2499401412
/workspace/coverage/cover_reg_top/94.xbar_random_zero_delays.2015020234
/workspace/coverage/cover_reg_top/94.xbar_same_source.3931818131
/workspace/coverage/cover_reg_top/94.xbar_smoke.2338096255
/workspace/coverage/cover_reg_top/94.xbar_smoke_large_delays.1658138018
/workspace/coverage/cover_reg_top/94.xbar_smoke_slow_rsp.3172880548
/workspace/coverage/cover_reg_top/94.xbar_smoke_zero_delays.2612673143
/workspace/coverage/cover_reg_top/94.xbar_stress_all.2179773765
/workspace/coverage/cover_reg_top/94.xbar_stress_all_with_error.2829271747
/workspace/coverage/cover_reg_top/94.xbar_stress_all_with_rand_reset.1918867467
/workspace/coverage/cover_reg_top/94.xbar_stress_all_with_reset_error.3468955474
/workspace/coverage/cover_reg_top/94.xbar_unmapped_addr.288767172
/workspace/coverage/cover_reg_top/95.xbar_access_same_device.2118344350
/workspace/coverage/cover_reg_top/95.xbar_access_same_device_slow_rsp.1450306433
/workspace/coverage/cover_reg_top/95.xbar_error_and_unmapped_addr.1004493209
/workspace/coverage/cover_reg_top/95.xbar_error_random.2524593502
/workspace/coverage/cover_reg_top/95.xbar_random.1953254399
/workspace/coverage/cover_reg_top/95.xbar_random_large_delays.2970812804
/workspace/coverage/cover_reg_top/95.xbar_random_slow_rsp.1443090281
/workspace/coverage/cover_reg_top/95.xbar_random_zero_delays.968146246
/workspace/coverage/cover_reg_top/95.xbar_same_source.844067572
/workspace/coverage/cover_reg_top/95.xbar_smoke.1494734812
/workspace/coverage/cover_reg_top/95.xbar_smoke_large_delays.2977759574
/workspace/coverage/cover_reg_top/95.xbar_smoke_slow_rsp.2310173724
/workspace/coverage/cover_reg_top/95.xbar_smoke_zero_delays.1527807809
/workspace/coverage/cover_reg_top/95.xbar_stress_all.3013353937
/workspace/coverage/cover_reg_top/95.xbar_stress_all_with_error.565730300
/workspace/coverage/cover_reg_top/95.xbar_stress_all_with_rand_reset.454322449
/workspace/coverage/cover_reg_top/95.xbar_unmapped_addr.3530723352
/workspace/coverage/cover_reg_top/96.xbar_access_same_device.1355604185
/workspace/coverage/cover_reg_top/96.xbar_access_same_device_slow_rsp.3188667824
/workspace/coverage/cover_reg_top/96.xbar_error_and_unmapped_addr.1546971259
/workspace/coverage/cover_reg_top/96.xbar_error_random.2776485421
/workspace/coverage/cover_reg_top/96.xbar_random.2470194394
/workspace/coverage/cover_reg_top/96.xbar_random_large_delays.2179469948
/workspace/coverage/cover_reg_top/96.xbar_random_slow_rsp.3306207589
/workspace/coverage/cover_reg_top/96.xbar_random_zero_delays.1554000474
/workspace/coverage/cover_reg_top/96.xbar_same_source.2058437440
/workspace/coverage/cover_reg_top/96.xbar_smoke.2860405571
/workspace/coverage/cover_reg_top/96.xbar_smoke_large_delays.1903926537
/workspace/coverage/cover_reg_top/96.xbar_smoke_slow_rsp.1546557557
/workspace/coverage/cover_reg_top/96.xbar_smoke_zero_delays.2360721388
/workspace/coverage/cover_reg_top/96.xbar_stress_all.71101214
/workspace/coverage/cover_reg_top/96.xbar_stress_all_with_error.2128468946
/workspace/coverage/cover_reg_top/96.xbar_stress_all_with_rand_reset.463520319
/workspace/coverage/cover_reg_top/96.xbar_stress_all_with_reset_error.449954493
/workspace/coverage/cover_reg_top/96.xbar_unmapped_addr.3574854378
/workspace/coverage/cover_reg_top/97.xbar_access_same_device.4093598930
/workspace/coverage/cover_reg_top/97.xbar_access_same_device_slow_rsp.349994671
/workspace/coverage/cover_reg_top/97.xbar_error_and_unmapped_addr.1278423182
/workspace/coverage/cover_reg_top/97.xbar_error_random.2065350647
/workspace/coverage/cover_reg_top/97.xbar_random.2316031020
/workspace/coverage/cover_reg_top/97.xbar_random_large_delays.279089342
/workspace/coverage/cover_reg_top/97.xbar_random_slow_rsp.1125305821
/workspace/coverage/cover_reg_top/97.xbar_random_zero_delays.1489987533
/workspace/coverage/cover_reg_top/97.xbar_same_source.2996749569
/workspace/coverage/cover_reg_top/97.xbar_smoke.483001801
/workspace/coverage/cover_reg_top/97.xbar_smoke_large_delays.330652063
/workspace/coverage/cover_reg_top/97.xbar_smoke_slow_rsp.656687201
/workspace/coverage/cover_reg_top/97.xbar_smoke_zero_delays.264128319
/workspace/coverage/cover_reg_top/97.xbar_stress_all.575686763
/workspace/coverage/cover_reg_top/97.xbar_stress_all_with_error.712871368
/workspace/coverage/cover_reg_top/97.xbar_stress_all_with_rand_reset.3059003414
/workspace/coverage/cover_reg_top/97.xbar_stress_all_with_reset_error.2759472099
/workspace/coverage/cover_reg_top/97.xbar_unmapped_addr.869724663
/workspace/coverage/cover_reg_top/98.xbar_access_same_device.1806300807
/workspace/coverage/cover_reg_top/98.xbar_access_same_device_slow_rsp.3459222096
/workspace/coverage/cover_reg_top/98.xbar_error_and_unmapped_addr.2855464093
/workspace/coverage/cover_reg_top/98.xbar_error_random.4060040101
/workspace/coverage/cover_reg_top/98.xbar_random.506441233
/workspace/coverage/cover_reg_top/98.xbar_random_large_delays.2409238963
/workspace/coverage/cover_reg_top/98.xbar_random_slow_rsp.2356017332
/workspace/coverage/cover_reg_top/98.xbar_random_zero_delays.2407947410
/workspace/coverage/cover_reg_top/98.xbar_same_source.3982364898
/workspace/coverage/cover_reg_top/98.xbar_smoke.1512975556
/workspace/coverage/cover_reg_top/98.xbar_smoke_large_delays.3339004257
/workspace/coverage/cover_reg_top/98.xbar_smoke_slow_rsp.2620085936
/workspace/coverage/cover_reg_top/98.xbar_smoke_zero_delays.251556231
/workspace/coverage/cover_reg_top/98.xbar_stress_all.1199300581
/workspace/coverage/cover_reg_top/98.xbar_stress_all_with_error.1927441278
/workspace/coverage/cover_reg_top/98.xbar_stress_all_with_rand_reset.3381673041
/workspace/coverage/cover_reg_top/98.xbar_stress_all_with_reset_error.1362474261
/workspace/coverage/cover_reg_top/98.xbar_unmapped_addr.3113489750
/workspace/coverage/cover_reg_top/99.xbar_access_same_device.1441222889
/workspace/coverage/cover_reg_top/99.xbar_access_same_device_slow_rsp.3438342088
/workspace/coverage/cover_reg_top/99.xbar_error_and_unmapped_addr.1183674533
/workspace/coverage/cover_reg_top/99.xbar_error_random.2951607010
/workspace/coverage/cover_reg_top/99.xbar_random.219244164
/workspace/coverage/cover_reg_top/99.xbar_random_large_delays.1717175404
/workspace/coverage/cover_reg_top/99.xbar_random_slow_rsp.1652537270
/workspace/coverage/cover_reg_top/99.xbar_random_zero_delays.1514947196
/workspace/coverage/cover_reg_top/99.xbar_same_source.3433894372
/workspace/coverage/cover_reg_top/99.xbar_smoke.1583877771
/workspace/coverage/cover_reg_top/99.xbar_smoke_large_delays.587053758
/workspace/coverage/cover_reg_top/99.xbar_smoke_slow_rsp.2139449851
/workspace/coverage/cover_reg_top/99.xbar_smoke_zero_delays.4294311408
/workspace/coverage/cover_reg_top/99.xbar_stress_all.810345618
/workspace/coverage/cover_reg_top/99.xbar_stress_all_with_error.787903618
/workspace/coverage/cover_reg_top/99.xbar_stress_all_with_rand_reset.2173211829
/workspace/coverage/cover_reg_top/99.xbar_stress_all_with_reset_error.2105806415
/workspace/coverage/cover_reg_top/99.xbar_unmapped_addr.3346826519
/workspace/coverage/default/1.chip_jtag_mem_access.1277548454
/workspace/coverage/default/2.chip_jtag_mem_access.3704911158
/workspace/coverage/pad_ctrl_test_mode/0.chip_padctrl_attributes.1873985637
/workspace/coverage/pad_ctrl_test_mode/2.chip_padctrl_attributes.4247863539
/workspace/coverage/pad_ctrl_test_mode/4.chip_padctrl_attributes.2448325526
/workspace/coverage/pad_ctrl_test_mode/5.chip_padctrl_attributes.2832434992
/workspace/coverage/pad_ctrl_test_mode/6.chip_padctrl_attributes.1646268611
/workspace/coverage/pad_ctrl_test_mode/7.chip_padctrl_attributes.2643426253
/workspace/coverage/pad_ctrl_test_mode/8.chip_padctrl_attributes.203439147
/workspace/coverage/pad_ctrl_test_mode/9.chip_padctrl_attributes.3655065200



Total test records in report: 1927
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html | tests27.html | tests28.html | tests29.html | tests30.html | tests31.html | tests32.html | tests33.html | tests34.html | tests35.html | tests36.html | tests37.html | tests38.html | tests39.html | tests40.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T14 /workspace/coverage/cover_reg_top/9.xbar_access_same_device.842168952 Dec 27 01:41:18 PM PST 23 Dec 27 01:42:26 PM PST 23 713577238 ps
T15 /workspace/coverage/cover_reg_top/60.xbar_stress_all_with_reset_error.2133117158 Dec 27 01:46:56 PM PST 23 Dec 27 01:53:31 PM PST 23 6219570877 ps
T16 /workspace/coverage/cover_reg_top/62.xbar_error_and_unmapped_addr.4163374233 Dec 27 01:47:31 PM PST 23 Dec 27 01:47:46 PM PST 23 114543837 ps
T17 /workspace/coverage/cover_reg_top/57.xbar_error_random.3960708984 Dec 27 01:46:21 PM PST 23 Dec 27 01:46:31 PM PST 23 179958884 ps
T18 /workspace/coverage/cover_reg_top/53.xbar_smoke_large_delays.624651756 Dec 27 01:45:42 PM PST 23 Dec 27 01:47:13 PM PST 23 9401186812 ps
T38 /workspace/coverage/cover_reg_top/36.xbar_stress_all_with_error.917955742 Dec 27 01:44:47 PM PST 23 Dec 27 01:54:30 PM PST 23 16747327393 ps
T61 /workspace/coverage/cover_reg_top/43.xbar_random_large_delays.1616630492 Dec 27 01:45:21 PM PST 23 Dec 27 01:57:11 PM PST 23 60200314067 ps
T62 /workspace/coverage/cover_reg_top/95.xbar_random_large_delays.2970812804 Dec 27 01:49:34 PM PST 23 Dec 27 01:55:45 PM PST 23 35392574426 ps
T63 /workspace/coverage/cover_reg_top/32.xbar_smoke_slow_rsp.4103555564 Dec 27 01:43:39 PM PST 23 Dec 27 01:45:27 PM PST 23 6221766489 ps
T52 /workspace/coverage/cover_reg_top/39.xbar_stress_all_with_error.4221355819 Dec 27 01:44:48 PM PST 23 Dec 27 01:47:04 PM PST 23 1722826531 ps
T91 /workspace/coverage/cover_reg_top/69.xbar_smoke_slow_rsp.3646650113 Dec 27 01:47:24 PM PST 23 Dec 27 01:49:00 PM PST 23 5576133711 ps
T11 /workspace/coverage/cover_reg_top/14.chip_csr_mem_rw_with_rand_reset.2456509428 Dec 27 01:42:58 PM PST 23 Dec 27 01:50:11 PM PST 23 9931658750 ps
T94 /workspace/coverage/cover_reg_top/65.xbar_random.139076834 Dec 27 01:47:06 PM PST 23 Dec 27 01:48:17 PM PST 23 1959274669 ps
T98 /workspace/coverage/cover_reg_top/95.xbar_stress_all_with_reset_error.1074361467 Dec 27 01:49:42 PM PST 23 Dec 27 01:56:06 PM PST 23 4128455281 ps
T95 /workspace/coverage/cover_reg_top/31.xbar_unmapped_addr.1811963030 Dec 27 01:43:36 PM PST 23 Dec 27 01:44:08 PM PST 23 754780586 ps
T72 /workspace/coverage/cover_reg_top/86.xbar_stress_all.2734020989 Dec 27 01:50:00 PM PST 23 Dec 27 01:53:37 PM PST 23 6584680134 ps
T205 /workspace/coverage/cover_reg_top/20.xbar_error_random.3513399736 Dec 27 01:42:51 PM PST 23 Dec 27 01:44:17 PM PST 23 2423433953 ps
T291 /workspace/coverage/cover_reg_top/46.xbar_stress_all_with_reset_error.542329116 Dec 27 01:45:32 PM PST 23 Dec 27 01:49:07 PM PST 23 681763699 ps
T79 /workspace/coverage/cover_reg_top/38.xbar_random_slow_rsp.2535437452 Dec 27 01:44:56 PM PST 23 Dec 27 01:56:12 PM PST 23 39869476861 ps
T208 /workspace/coverage/cover_reg_top/59.xbar_stress_all_with_reset_error.4215059163 Dec 27 01:46:34 PM PST 23 Dec 27 01:47:40 PM PST 23 277733800 ps
T298 /workspace/coverage/cover_reg_top/53.xbar_access_same_device_slow_rsp.2720387222 Dec 27 01:45:59 PM PST 23 Dec 27 01:50:13 PM PST 23 16460318850 ps
T197 /workspace/coverage/cover_reg_top/92.xbar_random_large_delays.1808973084 Dec 27 01:49:51 PM PST 23 Dec 27 01:56:05 PM PST 23 38636718447 ps
T92 /workspace/coverage/cover_reg_top/39.xbar_stress_all.668396056 Dec 27 01:45:00 PM PST 23 Dec 27 01:50:36 PM PST 23 9087537814 ps
T12 /workspace/coverage/cover_reg_top/12.chip_tl_errors.3713396508 Dec 27 01:42:14 PM PST 23 Dec 27 01:45:01 PM PST 23 3680100220 ps
T97 /workspace/coverage/cover_reg_top/33.xbar_random_zero_delays.1127306521 Dec 27 01:43:46 PM PST 23 Dec 27 01:44:16 PM PST 23 299413602 ps
T207 /workspace/coverage/cover_reg_top/83.xbar_error_and_unmapped_addr.2329836593 Dec 27 01:49:15 PM PST 23 Dec 27 01:49:49 PM PST 23 316453213 ps
T93 /workspace/coverage/cover_reg_top/76.xbar_random.3489749379 Dec 27 01:47:41 PM PST 23 Dec 27 01:48:26 PM PST 23 1272248562 ps
T101 /workspace/coverage/cover_reg_top/43.xbar_same_source.185138333 Dec 27 01:44:46 PM PST 23 Dec 27 01:45:03 PM PST 23 497450195 ps
T287 /workspace/coverage/cover_reg_top/23.xbar_stress_all_with_rand_reset.3210341536 Dec 27 01:43:16 PM PST 23 Dec 27 01:45:21 PM PST 23 247127538 ps
T288 /workspace/coverage/cover_reg_top/81.xbar_stress_all_with_reset_error.598053071 Dec 27 01:49:42 PM PST 23 Dec 27 01:52:22 PM PST 23 672537628 ps
T99 /workspace/coverage/cover_reg_top/57.xbar_stress_all_with_reset_error.1677652771 Dec 27 01:46:36 PM PST 23 Dec 27 01:47:28 PM PST 23 270845014 ps
T84 /workspace/coverage/cover_reg_top/63.xbar_stress_all.1896922017 Dec 27 01:46:37 PM PST 23 Dec 27 01:55:21 PM PST 23 14137986721 ps
T96 /workspace/coverage/cover_reg_top/36.xbar_stress_all.3722019378 Dec 27 01:44:45 PM PST 23 Dec 27 01:46:59 PM PST 23 2854641202 ps
T102 /workspace/coverage/cover_reg_top/95.xbar_random.1953254399 Dec 27 01:49:32 PM PST 23 Dec 27 01:51:06 PM PST 23 2579224561 ps
T200 /workspace/coverage/cover_reg_top/9.xbar_unmapped_addr.3032635708 Dec 27 01:41:14 PM PST 23 Dec 27 01:41:33 PM PST 23 372994573 ps
T340 /workspace/coverage/cover_reg_top/29.xbar_smoke.1571172076 Dec 27 01:43:57 PM PST 23 Dec 27 01:44:06 PM PST 23 191682099 ps
T212 /workspace/coverage/cover_reg_top/66.xbar_random_large_delays.698574067 Dec 27 01:47:23 PM PST 23 Dec 27 01:49:12 PM PST 23 9500721632 ps
T143 /workspace/coverage/cover_reg_top/11.xbar_stress_all_with_rand_reset.653142793 Dec 27 01:42:16 PM PST 23 Dec 27 01:44:23 PM PST 23 271482948 ps
T118 /workspace/coverage/cover_reg_top/66.xbar_random_slow_rsp.1924312755 Dec 27 01:47:04 PM PST 23 Dec 27 02:05:54 PM PST 23 69118487730 ps
T178 /workspace/coverage/cover_reg_top/37.xbar_smoke_large_delays.1665951312 Dec 27 01:45:27 PM PST 23 Dec 27 01:46:52 PM PST 23 7822471525 ps
T302 /workspace/coverage/cover_reg_top/51.xbar_access_same_device.3908327944 Dec 27 01:45:42 PM PST 23 Dec 27 01:45:50 PM PST 23 77790088 ps
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