Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.otp_ctrl__core_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	138077	1			T15	171		T16	20		T17	11
values[2]	9579	1			T15	2		T38	140		T61	3
values[3]	3584	1			T38	57		T92	20		T84	25
values[4]	2126	1			T38	24		T92	13		T84	22
values[5]	1438	1			T38	2		T92	10		T84	11
values[6]	962	1			T92	13		T84	18		T290	4
values[7]	710	1			T92	6		T84	14		T290	1
values[8]	624	1			T92	8		T84	15		T81	5
values[9]	484	1			T92	7		T84	6		T81	8
values[10]	457	1			T92	1		T84	8		T85	11
values[11]	369	1			T84	5		T85	4		T88	6
values[12]	382	1			T84	9		T85	4		T88	9
values[13]	379	1			T84	5		T85	6		T88	7
values[14]	373	1			T85	5		T88	6		T270	1
values[15]	387	1			T85	9		T88	12		T270	1
values[16]	393	1			T85	11		T88	10		T270	1
values[17]	330	1			T85	17		T88	14		T270	1
values[18]	314	1			T85	5		T88	8		T270	1
values[19]	304	1			T85	7		T88	7		T270	1
values[20]	308	1			T85	6		T88	7		T270	1
values[21]	336	1			T85	6		T88	6		T270	1
values[22]	326	1			T85	7		T88	8		T270	1
values[23]	279	1			T85	5		T88	5		T270	1
values[24]	280	1			T85	4		T88	4		T270	1
values[25]	309	1			T85	6		T88	7		T270	1
values[26]	327	1			T85	3		T88	10		T270	1
values[27]	312	1			T85	6		T88	3		T270	1
values[28]	340	1			T85	6		T88	3		T270	1
values[29]	355	1			T85	14		T88	6		T270	1
values[30]	326	1			T85	16		T88	6		T270	1
values[31]	394	1			T85	9		T88	7		T270	1
values[32]	332	1			T85	5		T88	5		T270	1
values[33]	332	1			T85	4		T88	5		T270	1
values[34]	308	1			T85	4		T88	3		T270	1
values[35]	307	1			T85	3		T88	9		T270	1
values[36]	310	1			T85	6		T88	14		T270	1
values[37]	285	1			T85	2		T88	8		T270	1
values[38]	331	1			T85	4		T88	5		T270	1
values[39]	313	1			T85	3		T88	7		T270	1
values[40]	301	1			T85	6		T88	17		T270	1
values[41]	312	1			T85	3		T88	6		T270	1
values[42]	326	1			T85	27		T88	4		T270	1
values[43]	330	1			T85	17		T88	7		T270	1
values[44]	356	1			T85	15		T88	6		T270	1
values[45]	324	1			T85	3		T88	5		T270	1
values[46]	314	1			T85	4		T88	5		T270	1
values[47]	262	1			T85	6		T88	8		T270	1
values[48]	280	1			T85	6		T88	18		T270	1
values[49]	315	1			T85	8		T88	4		T270	1
values[50]	262	1			T85	7		T88	6		T270	1
values[51]	246	1			T85	9		T88	7		T270	1
values[52]	244	1			T85	6		T88	5		T270	1
values[53]	290	1			T85	7		T88	8		T270	1
values[54]	267	1			T85	3		T88	3		T270	1
values[55]	250	1			T85	6		T270	2		T87	1
values[56]	273	1			T85	9		T270	1		T87	1
values[57]	300	1			T85	13		T270	1		T87	1
values[58]	250	1			T85	8		T270	1		T87	1
values[59]	262	1			T85	4		T270	1		T87	1
values[60]	245	1			T85	4		T270	1		T87	1
values[61]	213	1			T85	6		T270	1		T87	1
values[62]	180	1			T85	8		T270	1		T87	1
values[63]	177	1			T85	3		T270	1		T87	1
values[64]	163	1			T85	4		T270	1		T87	1
values[65]	184	1			T85	16		T270	1		T87	1
values[66]	179	1			T85	14		T270	1		T87	1
values[67]	173	1			T85	5		T270	1		T87	1
values[68]	161	1			T85	7		T270	1		T87	1
values[69]	144	1			T85	5		T270	1		T87	1
values[70]	159	1			T85	12		T270	1		T87	1
values[71]	122	1			T85	5		T270	1		T87	1
values[72]	156	1			T85	7		T270	1		T87	1
values[73]	126	1			T85	13		T270	1		T87	1
values[74]	132	1			T85	7		T270	1		T87	1
values[75]	135	1			T85	5		T270	1		T87	1
values[76]	126	1			T85	5		T270	1		T87	1
values[77]	142	1			T85	8		T270	1		T87	1
values[78]	140	1			T85	6		T270	1		T87	1
values[79]	120	1			T270	1		T87	1		T273	1
values[80]	107	1			T270	1		T87	1		T273	1
values[81]	92	1			T270	1		T87	1		T273	1
values[82]	102	1			T270	1		T87	1		T273	1
values[83]	119	1			T270	1		T87	1		T273	1
values[84]	108	1			T270	1		T87	1		T273	1
values[85]	117	1			T270	1		T87	1		T273	1
values[86]	120	1			T270	1		T87	1		T273	1
values[87]	121	1			T270	1		T87	1		T273	1
values[88]	111	1			T270	1		T87	1		T273	1
values[89]	120	1			T270	1		T87	1		T273	1
values[90]	118	1			T270	1		T87	1		T273	1
values[91]	93	1			T270	1		T87	1		T273	1
values[92]	93	1			T270	1		T87	1		T273	1
values[93]	98	1			T270	1		T87	1		T273	1
values[94]	92	1			T270	1		T87	1		T273	1
values[95]	97	1			T270	2		T87	1		T273	1
values[96]	92	1			T270	4		T87	1		T273	1
values[97]	120	1			T270	2		T87	1		T273	1
values[98]	96	1			T270	2		T87	1		T273	1
values[99]	90	1			T270	1		T87	1		T273	1
values[100]	97	1			T270	4		T87	1		T273	2
values[101]	99	1			T270	1		T87	3		T273	3
values[102]	92	1			T270	1		T87	2		T273	4
values[103]	107	1			T270	3		T87	2		T273	2
values[104]	88	1			T270	1		T87	4		T273	1
values[105]	91	1			T270	2		T87	2		T273	2
values[106]	98	1			T270	2		T87	1		T273	1
values[107]	103	1			T270	1		T87	3		T273	2
values[108]	78	1			T270	1		T87	1		T273	2
values[109]	91	1			T270	2		T87	1		T273	1
values[110]	86	1			T270	2		T87	3		T273	2
values[111]	79	1			T270	1		T87	2		T273	1
values[112]	79	1			T270	2		T87	1		T273	2
values[113]	103	1			T270	2		T87	1		T273	5
values[114]	99	1			T270	2		T87	1		T273	1
values[115]	80	1			T270	1		T87	2		T273	4
values[116]	92	1			T270	6		T87	2		T273	2
values[117]	94	1			T270	1		T87	1		T273	1
values[118]	83	1			T270	1		T87	2		T273	1
values[119]	103	1			T270	7		T87	1		T273	3
values[120]	75	1			T270	3		T87	1		T273	2
values[121]	65	1			T270	1		T87	2		T273	2
values[122]	84	1			T270	2		T87	1		T273	2
values[123]	79	1			T270	3		T87	1		T273	1
values[124]	106	1			T270	1		T87	3		T273	1
values[125]	151	1			T270	1		T87	4		T273	2
values[126]	233	1			T270	3		T87	2		T273	4
values[127]	1115	1			T270	28		T87	44		T273	39
values[128]	8078	1			T270	279		T87	367		T273	302