Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.rom_ctrl__regs_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	157915	1			T15	169		T16	26		T17	5
values[2]	4604	1			T15	2		T38	4		T61	2
values[3]	2414	1			T92	125		T84	174		T96	14
values[4]	1857	1			T92	104		T84	117		T96	20
values[5]	1432	1			T92	81		T84	111		T96	14
values[6]	1120	1			T92	77		T84	90		T96	23
values[7]	967	1			T92	67		T84	85		T96	29
values[8]	999	1			T92	66		T84	88		T96	58
values[9]	963	1			T92	56		T84	74		T96	41
values[10]	861	1			T92	49		T84	78		T96	12
values[11]	783	1			T92	41		T84	65		T96	4
values[12]	680	1			T92	26		T84	37		T96	4
values[13]	598	1			T92	6		T84	23		T96	5
values[14]	593	1			T84	4		T96	5		T281	2
values[15]	471	1			T84	5		T96	6		T281	2
values[16]	391	1			T84	6		T96	3		T281	2
values[17]	311	1			T84	4		T96	1		T281	2
values[18]	288	1			T96	5		T281	3		T275	1
values[19]	260	1			T96	16		T281	3		T275	1
values[20]	342	1			T96	20		T281	2		T275	1
values[21]	371	1			T96	32		T281	2		T275	1
values[22]	314	1			T96	25		T281	2		T275	1
values[23]	355	1			T96	5		T281	2		T275	1
values[24]	321	1			T96	3		T281	2		T275	1
values[25]	284	1			T96	7		T281	2		T275	1
values[26]	243	1			T96	11		T281	2		T275	1
values[27]	223	1			T96	12		T281	2		T275	1
values[28]	238	1			T96	22		T281	2		T275	1
values[29]	231	1			T96	18		T281	2		T275	1
values[30]	202	1			T96	23		T281	2		T275	1
values[31]	141	1			T96	12		T281	2		T275	2
values[32]	119	1			T96	6		T281	2		T275	1
values[33]	121	1			T96	8		T281	2		T275	1
values[34]	128	1			T96	4		T281	2		T275	1
values[35]	108	1			T96	5		T281	2		T275	1
values[36]	111	1			T281	2		T275	1		T299	1
values[37]	104	1			T281	2		T275	1		T299	1
values[38]	111	1			T281	2		T275	1		T299	1
values[39]	111	1			T281	2		T275	1		T299	1
values[40]	76	1			T281	2		T275	1		T299	1
values[41]	75	1			T281	2		T275	1		T299	1
values[42]	64	1			T281	2		T275	1		T299	1
values[43]	62	1			T281	2		T275	1		T299	1
values[44]	64	1			T281	2		T275	1		T299	1
values[45]	80	1			T281	2		T275	1		T299	1
values[46]	87	1			T281	2		T275	1		T299	1
values[47]	95	1			T281	2		T275	1		T299	1
values[48]	87	1			T281	2		T275	1		T299	1
values[49]	88	1			T281	2		T275	1		T299	1
values[50]	101	1			T281	2		T275	1		T299	1
values[51]	116	1			T281	2		T275	1		T299	1
values[52]	102	1			T281	2		T275	1		T299	1
values[53]	79	1			T281	2		T275	2		T299	1
values[54]	68	1			T281	2		T275	1		T299	1
values[55]	73	1			T281	2		T275	1		T299	1
values[56]	63	1			T281	2		T275	1		T299	1
values[57]	69	1			T281	2		T275	1		T299	1
values[58]	58	1			T281	2		T275	1		T299	1
values[59]	57	1			T281	2		T275	1		T299	1
values[60]	59	1			T281	2		T275	1		T299	1
values[61]	70	1			T281	2		T275	1		T299	1
values[62]	75	1			T281	2		T275	1		T299	2
values[63]	66	1			T281	2		T275	1		T299	1
values[64]	78	1			T281	2		T275	1		T299	1
values[65]	79	1			T281	2		T275	1		T299	1
values[66]	75	1			T281	2		T275	1		T299	1
values[67]	67	1			T281	2		T275	1		T299	1
values[68]	82	1			T281	2		T275	1		T299	1
values[69]	87	1			T281	2		T275	1		T299	1
values[70]	68	1			T281	2		T275	1		T299	1
values[71]	73	1			T281	2		T275	1		T299	1
values[72]	64	1			T281	2		T275	1		T299	1
values[73]	76	1			T281	2		T275	1		T299	1
values[74]	92	1			T281	2		T275	1		T299	1
values[75]	85	1			T281	2		T275	1		T299	1
values[76]	73	1			T281	2		T275	1		T299	1
values[77]	83	1			T281	2		T275	1		T299	1
values[78]	79	1			T281	3		T275	1		T299	1
values[79]	89	1			T281	2		T275	1		T299	3
values[80]	91	1			T281	2		T275	1		T299	3
values[81]	87	1			T281	2		T275	1		T299	1
values[82]	84	1			T281	2		T275	1		T299	1
values[83]	81	1			T281	2		T275	1		T299	3
values[84]	107	1			T281	2		T275	1		T299	5
values[85]	125	1			T281	2		T275	1		T299	1
values[86]	86	1			T281	2		T275	1		T299	1
values[87]	78	1			T281	2		T275	1		T299	2
values[88]	98	1			T281	2		T275	1		T299	1
values[89]	98	1			T281	2		T275	1		T299	5
values[90]	110	1			T281	2		T275	2		T299	10
values[91]	81	1			T281	2		T275	3		T299	3
values[92]	88	1			T281	2		T275	4		T299	2
values[93]	90	1			T281	2		T275	3		T299	1
values[94]	97	1			T281	2		T275	4		T299	5
values[95]	99	1			T281	2		T275	1		T299	8
values[96]	103	1			T281	2		T275	3		T299	1
values[97]	97	1			T281	3		T275	2		T299	6
values[98]	110	1			T281	3		T275	2		T299	1
values[99]	114	1			T281	2		T275	7		T299	5
values[100]	101	1			T281	4		T275	2		T299	8
values[101]	110	1			T281	4		T275	1		T299	1
values[102]	127	1			T281	4		T275	1		T299	2
values[103]	146	1			T281	2		T275	3		T299	5
values[104]	142	1			T281	4		T275	4		T299	1
values[105]	108	1			T281	5		T275	6		T299	2
values[106]	102	1			T281	4		T275	8		T299	2
values[107]	91	1			T281	5		T275	1		T299	3
values[108]	93	1			T281	8		T275	1		T299	2
values[109]	112	1			T281	8		T275	2		T299	2
values[110]	113	1			T281	9		T275	2		T299	9
values[111]	105	1			T281	4		T275	1		T299	4
values[112]	101	1			T281	7		T275	3		T299	4
values[113]	95	1			T281	3		T275	3		T299	3
values[114]	111	1			T281	4		T275	2		T299	2
values[115]	128	1			T281	2		T275	2		T299	3
values[116]	132	1			T281	2		T275	1		T299	1
values[117]	136	1			T281	2		T275	1		T299	1
values[118]	109	1			T281	2		T275	2		T299	2
values[119]	130	1			T281	3		T275	2		T299	4
values[120]	165	1			T281	3		T275	1		T299	1
values[121]	142	1			T281	3		T275	1		T299	2
values[122]	156	1			T281	2		T275	1		T299	2
values[123]	161	1			T281	4		T275	2		T299	1
values[124]	230	1			T281	3		T275	1		T299	1
values[125]	470	1			T281	4		T275	1		T299	2
values[126]	1014	1			T281	17		T275	9		T299	6
values[127]	3444	1			T281	192		T275	113		T299	93
values[128]	6106	1			T281	424		T275	228		T299	191