Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cfg_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	161975	1			T15	208		T16	11		T17	6
values[2]	4657	1			T15	10		T38	7		T94	4
values[3]	2439	1			T15	15		T79	1		T92	143
values[4]	1732	1			T15	22		T92	64		T84	11
values[5]	1272	1			T15	7		T92	39		T84	11
values[6]	1010	1			T92	35		T84	3		T96	25
values[7]	864	1			T92	26		T96	18		T70	15
values[8]	762	1			T92	13		T96	11		T70	14
values[9]	755	1			T92	15		T96	6		T70	8
values[10]	520	1			T92	8		T96	4		T289	33
values[11]	475	1			T92	1		T96	5		T289	31
values[12]	364	1			T92	1		T96	1		T289	9
values[13]	317	1			T96	7		T289	5		T275	1
values[14]	359	1			T96	9		T289	4		T275	1
values[15]	303	1			T96	10		T289	13		T275	1
values[16]	242	1			T96	3		T289	13		T275	1
values[17]	219	1			T96	1		T289	9		T275	1
values[18]	173	1			T96	8		T289	8		T275	1
values[19]	199	1			T96	9		T289	5		T275	1
values[20]	185	1			T96	12		T289	11		T275	1
values[21]	203	1			T96	16		T289	11		T275	1
values[22]	241	1			T96	25		T289	27		T275	1
values[23]	266	1			T96	38		T289	29		T275	1
values[24]	268	1			T96	17		T289	40		T275	1
values[25]	239	1			T96	6		T289	40		T275	1
values[26]	216	1			T96	3		T289	39		T275	1
values[27]	189	1			T96	9		T289	33		T275	1
values[28]	157	1			T96	7		T289	6		T275	1
values[29]	145	1			T96	3		T289	7		T275	1
values[30]	118	1			T96	2		T289	4		T275	1
values[31]	114	1			T96	8		T275	1		T270	1
values[32]	145	1			T96	34		T275	1		T270	1
values[33]	126	1			T96	32		T275	1		T270	1
values[34]	120	1			T96	19		T275	1		T270	1
values[35]	124	1			T96	15		T275	1		T270	1
values[36]	83	1			T96	8		T275	1		T270	1
values[37]	54	1			T96	1		T275	1		T270	1
values[38]	59	1			T275	1		T270	1		T271	1
values[39]	73	1			T275	1		T270	1		T271	1
values[40]	65	1			T275	1		T270	1		T271	1
values[41]	53	1			T275	1		T270	1		T271	1
values[42]	45	1			T275	1		T270	1		T271	1
values[43]	46	1			T275	1		T270	1		T271	1
values[44]	60	1			T275	1		T270	1		T271	1
values[45]	72	1			T275	1		T270	1		T271	1
values[46]	54	1			T275	1		T270	1		T271	1
values[47]	52	1			T275	1		T270	1		T271	1
values[48]	60	1			T275	1		T270	1		T271	1
values[49]	55	1			T275	1		T270	1		T271	1
values[50]	47	1			T275	1		T270	1		T271	1
values[51]	46	1			T275	1		T270	1		T271	1
values[52]	54	1			T275	1		T270	1		T271	1
values[53]	45	1			T275	1		T270	1		T271	1
values[54]	40	1			T275	2		T270	1		T271	1
values[55]	43	1			T275	1		T270	1		T271	1
values[56]	43	1			T275	1		T270	1		T271	1
values[57]	50	1			T275	1		T270	1		T271	1
values[58]	41	1			T275	1		T270	1		T271	1
values[59]	52	1			T275	1		T270	1		T271	1
values[60]	52	1			T275	1		T270	1		T271	1
values[61]	55	1			T275	1		T270	1		T271	1
values[62]	49	1			T275	1		T270	1		T271	1
values[63]	43	1			T275	1		T270	1		T271	1
values[64]	47	1			T275	1		T270	1		T271	1
values[65]	53	1			T275	1		T270	1		T271	1
values[66]	59	1			T275	1		T270	1		T271	1
values[67]	45	1			T275	1		T270	1		T271	1
values[68]	64	1			T275	1		T270	1		T271	1
values[69]	48	1			T275	1		T270	1		T271	1
values[70]	54	1			T275	1		T270	1		T271	1
values[71]	53	1			T275	1		T270	1		T271	1
values[72]	62	1			T275	1		T270	1		T271	1
values[73]	57	1			T275	1		T270	1		T271	1
values[74]	60	1			T275	1		T270	1		T271	1
values[75]	50	1			T275	1		T270	1		T271	1
values[76]	65	1			T275	1		T270	1		T271	1
values[77]	54	1			T275	1		T270	1		T271	1
values[78]	52	1			T275	1		T270	1		T271	1
values[79]	57	1			T275	1		T270	1		T271	1
values[80]	39	1			T275	1		T270	1		T271	1
values[81]	56	1			T275	1		T270	1		T271	1
values[82]	94	1			T275	2		T270	1		T271	1
values[83]	113	1			T275	1		T270	1		T271	1
values[84]	104	1			T275	1		T270	1		T271	1
values[85]	91	1			T275	1		T270	1		T271	1
values[86]	76	1			T275	1		T270	1		T271	1
values[87]	61	1			T275	1		T270	1		T271	1
values[88]	62	1			T275	1		T270	1		T271	1
values[89]	53	1			T275	1		T270	1		T271	1
values[90]	55	1			T275	1		T270	1		T271	1
values[91]	54	1			T275	1		T270	1		T271	1
values[92]	54	1			T275	1		T270	1		T271	1
values[93]	68	1			T275	1		T270	1		T271	1
values[94]	60	1			T275	1		T270	1		T271	1
values[95]	62	1			T275	1		T270	1		T271	1
values[96]	65	1			T275	1		T270	1		T271	1
values[97]	64	1			T275	1		T270	1		T271	1
values[98]	51	1			T275	1		T270	1		T271	1
values[99]	55	1			T275	1		T270	1		T271	1
values[100]	55	1			T275	1		T270	1		T271	1
values[101]	62	1			T275	1		T270	1		T271	1
values[102]	59	1			T275	1		T270	1		T271	1
values[103]	67	1			T275	1		T270	2		T271	1
values[104]	77	1			T275	1		T270	3		T271	1
values[105]	78	1			T275	1		T270	3		T271	1
values[106]	84	1			T275	1		T270	3		T271	1
values[107]	76	1			T275	1		T270	4		T271	1
values[108]	81	1			T275	1		T270	1		T271	1
values[109]	63	1			T275	1		T270	1		T271	1
values[110]	70	1			T275	1		T270	1		T271	1
values[111]	74	1			T275	1		T270	3		T271	1
values[112]	77	1			T275	1		T270	3		T271	1
values[113]	62	1			T275	1		T270	2		T271	1
values[114]	70	1			T275	1		T270	2		T271	1
values[115]	70	1			T275	1		T270	3		T271	1
values[116]	80	1			T275	1		T270	2		T271	1
values[117]	58	1			T275	1		T270	2		T271	1
values[118]	76	1			T275	1		T270	3		T271	1
values[119]	80	1			T275	1		T270	1		T271	1
values[120]	94	1			T275	1		T270	1		T271	1
values[121]	78	1			T275	1		T270	2		T271	1
values[122]	78	1			T275	1		T270	1		T271	1
values[123]	115	1			T275	1		T270	2		T271	1
values[124]	213	1			T275	2		T270	2		T271	1
values[125]	382	1			T275	3		T270	1		T271	1
values[126]	718	1			T275	19		T270	15		T271	7
values[127]	2343	1			T275	167		T270	124		T271	124
values[128]	3818	1			T275	259		T270	261		T271	239