Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.otbn_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	147451	1			T32	15		T33	272		T34	2
values[2]	4206	1			T33	1		T101	4		T230	2
values[3]	1863	1			T230	1		T232	3		T782	1
values[4]	1420	1			T232	1		T782	1		T397	57
values[5]	1084	1			T232	3		T782	1		T397	43
values[6]	943	1			T232	3		T782	1		T397	23
values[7]	779	1			T232	2		T782	1		T397	18
values[8]	693	1			T232	1		T782	1		T397	20
values[9]	595	1			T232	1		T782	1		T397	28
values[10]	498	1			T232	2		T782	1		T397	13
values[11]	479	1			T232	3		T782	1		T397	23
values[12]	444	1			T232	4		T782	1		T397	22
values[13]	364	1			T232	6		T782	1		T397	13
values[14]	314	1			T232	2		T782	1		T397	1
values[15]	358	1			T232	3		T782	1		T408	7
values[16]	422	1			T232	8		T782	1		T408	14
values[17]	361	1			T232	10		T782	1		T408	7
values[18]	354	1			T232	6		T782	1		T408	4
values[19]	361	1			T232	4		T782	1		T408	2
values[20]	378	1			T232	1		T782	1		T408	5
values[21]	306	1			T232	1		T782	1		T408	9
values[22]	255	1			T232	2		T782	1		T408	12
values[23]	212	1			T232	1		T782	1		T408	9
values[24]	186	1			T232	3		T782	1		T408	5
values[25]	171	1			T232	5		T782	1		T408	4
values[26]	154	1			T232	3		T782	1		T408	5
values[27]	166	1			T232	3		T782	1		T408	14
values[28]	177	1			T232	8		T782	1		T408	16
values[29]	182	1			T232	6		T782	1		T408	11
values[30]	152	1			T232	3		T782	1		T408	7
values[31]	134	1			T232	7		T782	1		T408	8
values[32]	111	1			T232	2		T782	1		T408	3
values[33]	101	1			T232	1		T782	1		T408	4
values[34]	127	1			T232	2		T782	1		T408	5
values[35]	119	1			T232	2		T782	1		T408	13
values[36]	103	1			T232	2		T782	1		T408	1
values[37]	92	1			T232	1		T782	1		T408	7
values[38]	89	1			T232	2		T782	1		T408	4
values[39]	102	1			T232	2		T782	1		T408	2
values[40]	125	1			T232	3		T782	1		T408	4
values[41]	99	1			T232	3		T782	1		T408	4
values[42]	107	1			T232	1		T782	1		T408	6
values[43]	105	1			T232	2		T782	1		T408	15
values[44]	94	1			T232	1		T782	1		T408	6
values[45]	95	1			T232	3		T782	1		T408	4
values[46]	114	1			T232	2		T782	1		T408	16
values[47]	87	1			T232	1		T782	1		T408	12
values[48]	77	1			T232	2		T782	1		T408	14
values[49]	71	1			T232	5		T782	1		T408	8
values[50]	77	1			T232	2		T782	1		T408	5
values[51]	67	1			T232	1		T782	1		T408	5
values[52]	54	1			T232	3		T782	1		T408	2
values[53]	58	1			T232	2		T782	1		T408	2
values[54]	69	1			T232	3		T782	1		T408	5
values[55]	64	1			T232	1		T782	1		T408	3
values[56]	60	1			T232	2		T782	1		T408	1
values[57]	65	1			T232	1		T782	1		T408	3
values[58]	58	1			T232	2		T782	1		T408	5
values[59]	62	1			T232	3		T782	1		T408	3
values[60]	69	1			T232	1		T782	1		T408	4
values[61]	72	1			T232	5		T782	1		T408	10
values[62]	72	1			T232	3		T782	1		T408	10
values[63]	67	1			T232	1		T782	1		T408	7
values[64]	50	1			T232	5		T782	1		T408	5
values[65]	64	1			T232	4		T782	1		T408	8
values[66]	68	1			T232	7		T782	1		T408	6
values[67]	59	1			T232	3		T782	1		T408	12
values[68]	77	1			T232	2		T782	1		T408	22
values[69]	68	1			T232	4		T782	1		T408	4
values[70]	57	1			T232	1		T782	1		T408	7
values[71]	84	1			T232	3		T782	1		T408	22
values[72]	80	1			T232	2		T782	1		T408	20
values[73]	108	1			T232	5		T782	1		T408	31
values[74]	73	1			T232	5		T782	1		T408	17
values[75]	59	1			T232	5		T782	1		T408	3
values[76]	57	1			T232	4		T782	1		T783	1
values[77]	87	1			T232	3		T782	1		T783	5
values[78]	79	1			T232	3		T782	1		T783	4
values[79]	62	1			T232	2		T782	1		T783	6
values[80]	63	1			T232	5		T782	1		T783	4
values[81]	53	1			T232	2		T782	1		T783	1
values[82]	59	1			T232	1		T782	1		T783	2
values[83]	76	1			T232	10		T782	1		T783	1
values[84]	75	1			T232	3		T782	1		T783	2
values[85]	65	1			T232	5		T782	1		T783	1
values[86]	68	1			T232	2		T782	1		T783	4
values[87]	61	1			T232	4		T782	1		T783	1
values[88]	68	1			T232	8		T782	1		T783	4
values[89]	74	1			T232	6		T782	1		T783	2
values[90]	74	1			T232	3		T782	1		T783	2
values[91]	71	1			T232	2		T782	1		T783	3
values[92]	61	1			T232	2		T782	1		T783	1
values[93]	72	1			T232	3		T782	1		T783	1
values[94]	74	1			T232	7		T782	1		T783	2
values[95]	77	1			T232	6		T782	1		T783	3
values[96]	96	1			T232	8		T782	1		T783	2
values[97]	64	1			T232	2		T782	1		T783	4
values[98]	76	1			T232	6		T782	1		T783	4
values[99]	81	1			T232	6		T782	1		T783	3
values[100]	71	1			T232	5		T782	1		T783	4
values[101]	79	1			T232	4		T782	1		T783	6
values[102]	95	1			T232	3		T782	1		T783	5
values[103]	83	1			T232	7		T782	1		T783	1
values[104]	80	1			T232	8		T782	1		T783	3
values[105]	86	1			T232	2		T782	1		T783	1
values[106]	88	1			T232	2		T782	1		T783	1
values[107]	101	1			T232	5		T782	1		T783	5
values[108]	83	1			T232	2		T782	1		T783	4
values[109]	86	1			T232	4		T782	1		T783	6
values[110]	79	1			T232	7		T782	1		T783	8
values[111]	98	1			T232	12		T782	2		T783	5
values[112]	84	1			T232	2		T782	1		T783	4
values[113]	85	1			T232	6		T782	1		T783	1
values[114]	98	1			T232	17		T782	1		T783	2
values[115]	91	1			T232	6		T782	1		T783	8
values[116]	77	1			T232	2		T782	1		T783	6
values[117]	95	1			T232	5		T782	1		T783	17
values[118]	94	1			T232	3		T782	1		T783	18
values[119]	82	1			T232	5		T782	1		T783	6
values[120]	83	1			T232	4		T782	1		T783	2
values[121]	82	1			T232	5		T782	1		T783	3
values[122]	98	1			T232	3		T782	1		T783	5
values[123]	118	1			T232	7		T782	2		T783	12
values[124]	193	1			T232	25		T782	3		T783	26
values[125]	335	1			T232	29		T782	1		T783	31
values[126]	686	1			T232	31		T782	13		T783	63
values[127]	2300	1			T232	6		T782	128		T783	38
values[128]	4010	1			T782	183		T783	2		T634	1