Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.rv_core_ibex__cfg_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	152826	1			T32	12		T33	252		T34	4
values[2]	4218	1			T32	1		T33	4		T101	6
values[3]	1889	1			T230	1		T231	1		T395	72
values[4]	1408	1			T231	1		T395	38		T397	4
values[5]	1136	1			T231	1		T395	23		T397	2
values[6]	1007	1			T231	1		T395	15		T397	3
values[7]	762	1			T231	1		T395	17		T397	1
values[8]	796	1			T231	1		T395	13		T397	2
values[9]	697	1			T231	1		T395	19		T397	1
values[10]	598	1			T231	1		T395	21		T397	4
values[11]	599	1			T231	1		T395	1		T397	3
values[12]	503	1			T231	1		T397	2		T346	4
values[13]	434	1			T231	1		T397	2		T346	2
values[14]	385	1			T231	1		T397	1		T346	1
values[15]	457	1			T231	1		T397	1		T346	6
values[16]	463	1			T231	1		T397	2		T346	6
values[17]	377	1			T231	1		T397	1		T346	13
values[18]	369	1			T231	1		T397	2		T346	18
values[19]	314	1			T231	1		T397	1		T346	20
values[20]	339	1			T231	1		T397	2		T346	17
values[21]	306	1			T231	1		T397	1		T346	18
values[22]	309	1			T231	1		T397	4		T346	41
values[23]	297	1			T231	1		T397	1		T346	42
values[24]	249	1			T231	1		T397	2		T346	24
values[25]	195	1			T231	1		T397	1		T346	20
values[26]	260	1			T231	1		T397	7		T346	15
values[27]	210	1			T231	1		T397	2		T346	12
values[28]	218	1			T231	1		T397	2		T346	6
values[29]	212	1			T231	1		T397	3		T346	15
values[30]	224	1			T231	1		T397	4		T346	14
values[31]	205	1			T231	1		T397	2		T346	11
values[32]	192	1			T231	1		T397	1		T346	5
values[33]	201	1			T231	1		T397	2		T346	5
values[34]	123	1			T231	1		T397	2		T346	4
values[35]	135	1			T231	1		T397	2		T346	7
values[36]	137	1			T231	1		T397	3		T346	3
values[37]	139	1			T231	1		T397	2		T346	16
values[38]	121	1			T231	1		T397	4		T346	14
values[39]	103	1			T231	1		T397	2		T346	7
values[40]	101	1			T231	1		T397	2		T346	13
values[41]	138	1			T231	1		T397	3		T346	35
values[42]	169	1			T231	1		T397	7		T346	40
values[43]	160	1			T231	1		T397	3		T346	18
values[44]	156	1			T231	1		T397	4		T346	10
values[45]	157	1			T231	1		T397	1		T346	7
values[46]	146	1			T231	1		T397	4		T346	14
values[47]	127	1			T231	1		T397	2		T346	5
values[48]	144	1			T231	1		T397	3		T408	17
values[49]	123	1			T231	1		T397	2		T408	14
values[50]	91	1			T231	1		T397	5		T408	10
values[51]	82	1			T231	1		T397	2		T408	1
values[52]	84	1			T231	1		T397	2		T781	1
values[53]	78	1			T231	1		T397	6		T781	1
values[54]	88	1			T231	1		T397	4		T781	1
values[55]	86	1			T231	1		T397	4		T781	1
values[56]	69	1			T231	1		T397	4		T781	1
values[57]	74	1			T231	1		T397	1		T781	1
values[58]	70	1			T231	1		T397	1		T781	1
values[59]	59	1			T231	1		T397	1		T781	1
values[60]	67	1			T231	1		T397	2		T781	1
values[61]	70	1			T231	1		T397	1		T781	1
values[62]	65	1			T231	1		T397	2		T781	1
values[63]	58	1			T231	1		T397	1		T781	1
values[64]	59	1			T231	1		T397	5		T781	1
values[65]	60	1			T231	1		T397	1		T781	1
values[66]	56	1			T231	1		T397	1		T781	1
values[67]	55	1			T231	1		T397	3		T781	1
values[68]	51	1			T231	1		T397	2		T781	1
values[69]	59	1			T231	1		T397	2		T781	1
values[70]	63	1			T231	1		T397	1		T781	1
values[71]	52	1			T231	1		T397	1		T781	1
values[72]	51	1			T231	1		T397	2		T781	2
values[73]	63	1			T231	1		T397	2		T781	1
values[74]	61	1			T231	1		T397	4		T781	1
values[75]	70	1			T231	1		T397	2		T781	1
values[76]	62	1			T231	1		T397	3		T781	1
values[77]	60	1			T231	1		T397	3		T781	1
values[78]	69	1			T231	1		T397	6		T781	1
values[79]	58	1			T231	1		T397	3		T781	1
values[80]	62	1			T231	1		T397	1		T781	1
values[81]	55	1			T231	1		T397	1		T781	1
values[82]	68	1			T231	1		T397	2		T781	1
values[83]	74	1			T231	1		T397	2		T781	1
values[84]	73	1			T231	1		T397	2		T781	1
values[85]	90	1			T231	1		T397	6		T781	1
values[86]	62	1			T231	1		T397	3		T781	1
values[87]	90	1			T231	1		T397	2		T781	1
values[88]	83	1			T231	1		T397	4		T781	1
values[89]	81	1			T231	1		T397	2		T781	1
values[90]	89	1			T231	1		T397	5		T781	1
values[91]	81	1			T231	1		T397	5		T781	1
values[92]	88	1			T231	1		T397	7		T781	1
values[93]	80	1			T231	1		T397	5		T781	1
values[94]	91	1			T231	1		T397	5		T781	1
values[95]	76	1			T231	1		T397	3		T781	1
values[96]	101	1			T231	1		T397	3		T781	1
values[97]	83	1			T231	1		T397	4		T781	1
values[98]	81	1			T231	3		T397	2		T781	1
values[99]	74	1			T231	4		T397	2		T781	1
values[100]	75	1			T231	3		T397	2		T781	1
values[101]	76	1			T231	1		T397	1		T781	1
values[102]	68	1			T231	3		T397	1		T781	1
values[103]	80	1			T231	2		T397	1		T781	1
values[104]	91	1			T231	2		T397	3		T781	1
values[105]	75	1			T231	4		T397	4		T781	1
values[106]	96	1			T231	1		T397	2		T781	1
values[107]	81	1			T231	2		T397	2		T781	1
values[108]	103	1			T231	1		T397	3		T781	1
values[109]	79	1			T231	1		T397	2		T781	1
values[110]	88	1			T231	2		T397	5		T781	2
values[111]	100	1			T231	5		T397	2		T781	3
values[112]	112	1			T231	8		T397	6		T781	2
values[113]	91	1			T231	2		T397	8		T781	2
values[114]	108	1			T231	5		T397	7		T781	1
values[115]	108	1			T231	2		T397	2		T781	2
values[116]	111	1			T231	3		T397	10		T781	4
values[117]	105	1			T231	3		T397	2		T781	2
values[118]	115	1			T231	4		T397	5		T781	1
values[119]	99	1			T231	4		T397	4		T781	1
values[120]	110	1			T231	5		T397	7		T781	1
values[121]	122	1			T231	4		T397	7		T781	1
values[122]	122	1			T231	1		T397	3		T781	1
values[123]	153	1			T231	1		T397	8		T781	3
values[124]	281	1			T231	6		T397	33		T781	2
values[125]	537	1			T231	3		T397	58		T781	1
values[126]	1032	1			T231	23		T397	70		T781	21
values[127]	2638	1			T231	98		T397	30		T781	141
values[128]	4593	1			T231	208		T397	3		T781	278