Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.rv_timer_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	133655	1			T32	11		T33	737		T34	2
values[2]	9024	1			T33	267		T58	1		T101	45
values[3]	3585	1			T33	96		T101	34		T782	1
values[4]	2167	1			T33	48		T101	26		T782	1
values[5]	1458	1			T33	21		T101	20		T782	1
values[6]	1041	1			T33	25		T101	10		T782	1
values[7]	737	1			T33	14		T101	6		T782	1
values[8]	548	1			T33	9		T101	12		T782	1
values[9]	506	1			T33	1		T101	7		T782	1
values[10]	413	1			T101	10		T782	1		T346	1
values[11]	370	1			T101	7		T782	1		T338	1
values[12]	421	1			T101	27		T782	1		T338	5
values[13]	386	1			T101	7		T782	1		T338	8
values[14]	344	1			T101	9		T782	2		T338	2
values[15]	318	1			T101	5		T782	1		T338	2
values[16]	322	1			T101	6		T782	1		T338	2
values[17]	320	1			T101	9		T782	1		T338	2
values[18]	311	1			T101	7		T782	1		T338	1
values[19]	346	1			T101	2		T782	1		T338	2
values[20]	331	1			T782	1		T338	1		T537	13
values[21]	279	1			T782	1		T338	2		T537	12
values[22]	326	1			T782	1		T338	1		T537	9
values[23]	343	1			T782	1		T338	3		T537	4
values[24]	283	1			T782	1		T338	5		T537	3
values[25]	284	1			T782	2		T338	3		T537	7
values[26]	320	1			T782	1		T338	4		T537	7
values[27]	315	1			T782	1		T338	1		T537	3
values[28]	313	1			T782	1		T338	1		T537	2
values[29]	340	1			T782	1		T338	5		T408	3
values[30]	299	1			T782	1		T338	3		T408	2
values[31]	332	1			T782	1		T338	2		T408	4
values[32]	291	1			T782	1		T338	5		T408	6
values[33]	314	1			T782	1		T338	6		T408	3
values[34]	320	1			T782	1		T338	3		T408	4
values[35]	291	1			T782	1		T338	1		T408	15
values[36]	300	1			T782	1		T338	2		T408	11
values[37]	284	1			T782	1		T338	4		T408	3
values[38]	288	1			T782	1		T338	3		T408	2
values[39]	274	1			T782	1		T338	1		T408	1
values[40]	345	1			T782	1		T338	2		T408	2
values[41]	326	1			T782	1		T338	6		T408	1
values[42]	286	1			T782	1		T338	6		T408	2
values[43]	237	1			T782	1		T338	2		T408	6
values[44]	271	1			T782	1		T338	2		T408	8
values[45]	300	1			T782	1		T338	8		T408	9
values[46]	268	1			T782	1		T338	5		T408	8
values[47]	236	1			T782	1		T338	3		T408	7
values[48]	236	1			T782	1		T338	4		T408	1
values[49]	233	1			T782	1		T338	3		T408	2
values[50]	239	1			T782	1		T338	2		T408	4
values[51]	263	1			T782	1		T338	1		T408	6
values[52]	260	1			T782	1		T338	4		T408	3
values[53]	238	1			T782	1		T338	3		T408	5
values[54]	248	1			T782	1		T338	5		T408	2
values[55]	321	1			T782	1		T338	7		T408	5
values[56]	262	1			T782	1		T338	3		T408	1
values[57]	246	1			T782	1		T338	8		T408	1
values[58]	306	1			T782	1		T338	11		T408	3
values[59]	226	1			T782	1		T338	1		T408	5
values[60]	221	1			T782	2		T338	4		T408	2
values[61]	187	1			T782	1		T338	2		T408	4
values[62]	190	1			T782	1		T338	1		T408	3
values[63]	173	1			T782	1		T338	1		T408	3
values[64]	170	1			T782	1		T338	2		T408	2
values[65]	172	1			T782	1		T338	3		T408	3
values[66]	152	1			T782	1		T338	4		T408	3
values[67]	146	1			T782	1		T338	2		T408	5
values[68]	129	1			T782	1		T338	4		T408	2
values[69]	112	1			T782	1		T338	1		T408	7
values[70]	126	1			T782	1		T338	2		T408	5
values[71]	137	1			T782	1		T338	3		T408	3
values[72]	104	1			T782	1		T338	2		T408	3
values[73]	96	1			T782	1		T338	2		T408	4
values[74]	80	1			T782	1		T338	1		T408	1
values[75]	81	1			T782	1		T338	1		T408	3
values[76]	69	1			T782	1		T338	2		T408	3
values[77]	72	1			T782	1		T338	1		T408	1
values[78]	83	1			T782	1		T338	1		T408	1
values[79]	92	1			T782	1		T338	3		T408	4
values[80]	94	1			T782	1		T338	3		T408	1
values[81]	98	1			T782	1		T338	3		T408	3
values[82]	79	1			T782	1		T338	4		T408	1
values[83]	97	1			T782	1		T338	5		T408	7
values[84]	94	1			T782	1		T338	1		T408	4
values[85]	103	1			T782	1		T338	3		T408	2
values[86]	107	1			T782	1		T338	3		T408	7
values[87]	99	1			T782	1		T338	2		T408	2
values[88]	80	1			T782	1		T338	5		T408	1
values[89]	66	1			T782	1		T338	4		T408	2
values[90]	84	1			T782	1		T338	2		T408	5
values[91]	76	1			T782	1		T338	3		T408	3
values[92]	77	1			T782	1		T338	3		T408	5
values[93]	81	1			T782	1		T338	4		T408	6
values[94]	74	1			T782	1		T338	4		T408	3
values[95]	113	1			T782	1		T338	1		T408	10
values[96]	93	1			T782	1		T338	8		T408	7
values[97]	85	1			T782	1		T338	2		T408	2
values[98]	78	1			T782	1		T338	1		T772	1
values[99]	81	1			T782	1		T338	1		T772	1
values[100]	79	1			T782	1		T338	3		T772	1
values[101]	66	1			T782	1		T338	3		T772	1
values[102]	59	1			T782	1		T338	2		T772	1
values[103]	59	1			T782	1		T338	5		T772	1
values[104]	67	1			T782	1		T338	6		T772	1
values[105]	71	1			T782	1		T338	8		T772	1
values[106]	60	1			T782	1		T338	9		T772	1
values[107]	57	1			T782	1		T338	1		T772	1
values[108]	47	1			T782	1		T338	2		T772	1
values[109]	47	1			T782	1		T338	1		T772	1
values[110]	49	1			T782	1		T338	3		T772	1
values[111]	53	1			T782	2		T338	3		T772	1
values[112]	43	1			T782	1		T338	2		T772	1
values[113]	65	1			T782	1		T338	1		T772	1
values[114]	83	1			T782	1		T338	2		T772	2
values[115]	65	1			T782	4		T338	5		T772	1
values[116]	66	1			T782	5		T338	5		T772	1
values[117]	59	1			T782	3		T338	3		T772	1
values[118]	65	1			T782	1		T338	3		T772	1
values[119]	62	1			T782	1		T338	4		T772	1
values[120]	74	1			T782	4		T338	3		T772	1
values[121]	65	1			T782	6		T338	6		T772	1
values[122]	61	1			T782	2		T338	2		T772	1
values[123]	54	1			T782	1		T338	4		T772	1
values[124]	63	1			T782	1		T338	1		T772	1
values[125]	71	1			T782	1		T338	4		T772	1
values[126]	125	1			T782	2		T338	31		T772	3
values[127]	701	1			T782	35		T338	92		T772	27
values[128]	5484	1			T782	271		T338	46		T772	248