Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.sram_ctrl_ret_aon__ram_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	143723	1			T32	12		T33	280		T34	3
values[2]	13007	1			T33	3		T101	7		T230	3
values[3]	5235	1			T230	1		T395	13		T397	43
values[4]	2992	1			T395	16		T397	31		T337	4
values[5]	1929	1			T395	18		T397	15		T771	27
values[6]	1257	1			T395	20		T397	7		T771	18
values[7]	839	1			T395	31		T397	15		T771	13
values[8]	673	1			T395	14		T397	9		T771	23
values[9]	629	1			T395	10		T397	11		T771	36
values[10]	439	1			T395	18		T397	6		T771	22
values[11]	338	1			T395	13		T397	2		T771	16
values[12]	273	1			T395	5		T397	2		T771	11
values[13]	253	1			T395	6		T771	1		T420	1
values[14]	249	1			T395	8		T420	1		T795	4
values[15]	224	1			T395	4		T420	1		T773	1
values[16]	238	1			T395	3		T420	1		T773	1
values[17]	217	1			T395	4		T420	1		T773	1
values[18]	199	1			T395	2		T420	1		T773	1
values[19]	214	1			T395	3		T420	1		T773	1
values[20]	221	1			T395	1		T420	1		T773	1
values[21]	214	1			T395	5		T420	1		T773	1
values[22]	216	1			T395	2		T420	1		T773	1
values[23]	191	1			T395	1		T420	1		T773	1
values[24]	216	1			T395	7		T420	1		T773	1
values[25]	240	1			T395	7		T420	1		T773	1
values[26]	204	1			T395	3		T420	1		T773	1
values[27]	196	1			T395	3		T420	1		T773	1
values[28]	181	1			T395	3		T420	1		T773	1
values[29]	198	1			T395	1		T420	1		T773	1
values[30]	163	1			T420	1		T773	1		T407	4
values[31]	176	1			T420	1		T773	1		T407	2
values[32]	224	1			T420	1		T773	1		T407	14
values[33]	174	1			T420	1		T773	1		T407	3
values[34]	209	1			T420	1		T773	1		T407	4
values[35]	202	1			T420	1		T773	1		T407	6
values[36]	180	1			T420	1		T773	1		T407	4
values[37]	205	1			T420	1		T773	1		T407	3
values[38]	212	1			T420	1		T773	1		T407	14
values[39]	199	1			T420	1		T773	1		T407	3
values[40]	181	1			T420	1		T773	1		T407	6
values[41]	168	1			T420	1		T773	1		T407	13
values[42]	187	1			T420	1		T773	1		T407	18
values[43]	156	1			T420	1		T773	1		T407	6
values[44]	163	1			T420	1		T773	1		T407	9
values[45]	222	1			T420	1		T773	1		T407	12
values[46]	223	1			T420	1		T773	1		T407	11
values[47]	158	1			T420	1		T773	2		T407	7
values[48]	142	1			T420	1		T773	1		T407	9
values[49]	146	1			T420	1		T773	1		T407	4
values[50]	133	1			T420	1		T773	1		T407	8
values[51]	134	1			T420	1		T773	1		T407	4
values[52]	113	1			T420	1		T773	1		T407	7
values[53]	127	1			T420	1		T773	1		T407	4
values[54]	129	1			T420	1		T773	1		T435	1
values[55]	111	1			T420	1		T773	1		T435	1
values[56]	149	1			T420	1		T773	1		T435	1
values[57]	158	1			T420	1		T773	1		T435	1
values[58]	150	1			T420	1		T773	1		T435	1
values[59]	146	1			T420	1		T773	1		T435	1
values[60]	143	1			T420	1		T773	1		T435	1
values[61]	126	1			T420	1		T773	1		T435	1
values[62]	116	1			T420	1		T773	1		T435	1
values[63]	145	1			T420	1		T773	1		T435	1
values[64]	148	1			T420	1		T773	1		T435	1
values[65]	149	1			T420	1		T773	1		T435	1
values[66]	104	1			T420	1		T773	1		T435	1
values[67]	84	1			T420	1		T773	1		T435	1
values[68]	55	1			T420	1		T773	1		T435	1
values[69]	69	1			T420	1		T773	1		T435	1
values[70]	74	1			T420	1		T773	1		T435	1
values[71]	70	1			T420	1		T773	1		T435	1
values[72]	76	1			T420	1		T773	1		T435	1
values[73]	62	1			T420	1		T773	1		T435	1
values[74]	59	1			T420	1		T773	1		T435	1
values[75]	60	1			T420	1		T773	1		T435	1
values[76]	55	1			T420	1		T773	1		T435	1
values[77]	61	1			T420	1		T773	1		T435	1
values[78]	55	1			T420	1		T773	1		T435	1
values[79]	52	1			T420	1		T773	1		T435	1
values[80]	71	1			T420	1		T773	1		T435	1
values[81]	94	1			T420	1		T773	1		T435	1
values[82]	83	1			T420	1		T773	6		T435	1
values[83]	57	1			T420	1		T773	1		T435	1
values[84]	49	1			T420	1		T773	1		T435	9
values[85]	49	1			T420	1		T773	3		T435	1
values[86]	55	1			T420	1		T773	2		T435	1
values[87]	65	1			T420	1		T773	7		T435	1
values[88]	61	1			T420	1		T773	4		T435	2
values[89]	65	1			T420	1		T773	3		T435	1
values[90]	61	1			T420	1		T773	1		T435	2
values[91]	60	1			T420	1		T773	2		T435	2
values[92]	60	1			T420	1		T773	8		T435	2
values[93]	46	1			T420	1		T773	1		T435	1
values[94]	69	1			T420	8		T773	1		T435	2
values[95]	61	1			T420	2		T773	6		T435	6
values[96]	66	1			T420	3		T773	1		T435	6
values[97]	55	1			T420	2		T773	2		T435	3
values[98]	67	1			T420	5		T773	3		T435	3
values[99]	74	1			T420	8		T773	1		T435	1
values[100]	63	1			T420	1		T773	1		T435	6
values[101]	47	1			T420	1		T773	2		T435	2
values[102]	54	1			T420	5		T773	2		T435	1
values[103]	69	1			T420	2		T773	2		T435	2
values[104]	60	1			T420	4		T773	1		T435	3
values[105]	42	1			T420	1		T773	2		T435	2
values[106]	54	1			T420	1		T773	4		T435	2
values[107]	58	1			T420	4		T773	2		T435	1
values[108]	57	1			T420	1		T773	1		T435	1
values[109]	64	1			T420	2		T773	1		T435	5
values[110]	76	1			T420	3		T773	4		T435	2
values[111]	59	1			T420	3		T773	3		T435	3
values[112]	60	1			T420	1		T773	1		T435	4
values[113]	60	1			T420	1		T773	1		T435	2
values[114]	67	1			T420	2		T773	5		T435	2
values[115]	63	1			T420	1		T773	3		T435	4
values[116]	69	1			T420	2		T773	6		T435	1
values[117]	74	1			T420	1		T773	3		T435	1
values[118]	64	1			T420	1		T773	1		T435	3
values[119]	52	1			T420	1		T773	2		T435	6
values[120]	51	1			T420	1		T773	4		T435	1
values[121]	47	1			T420	2		T773	3		T435	1
values[122]	69	1			T420	1		T773	2		T435	3
values[123]	65	1			T420	1		T773	1		T435	2
values[124]	70	1			T420	3		T773	2		T435	2
values[125]	70	1			T420	1		T773	3		T435	1
values[126]	108	1			T420	4		T773	2		T435	5
values[127]	771	1			T420	28		T773	17		T435	22
values[128]	6456	1			T420	273		T773	269		T435	265