Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.uart0_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	135394	1			T32	14		T33	881		T34	9
values[2]	9378	1			T33	208		T101	6		T230	3
values[3]	3639	1			T33	47		T232	2		T382	3
values[4]	2068	1			T33	20		T232	1		T396	9
values[5]	1337	1			T33	14		T232	1		T396	11
values[6]	888	1			T33	1		T232	1		T396	4
values[7]	684	1			T232	2		T396	14		T397	24
values[8]	490	1			T232	3		T396	8		T397	12
values[9]	392	1			T232	1		T396	9		T397	15
values[10]	371	1			T232	3		T396	10		T397	26
values[11]	289	1			T232	4		T396	6		T397	7
values[12]	265	1			T232	2		T396	9		T397	2
values[13]	261	1			T232	3		T396	11		T537	4
values[14]	248	1			T232	1		T396	4		T537	9
values[15]	276	1			T232	2		T396	3		T537	8
values[16]	245	1			T232	5		T396	4		T537	13
values[17]	273	1			T232	1		T396	11		T537	12
values[18]	301	1			T232	2		T396	6		T537	8
values[19]	264	1			T232	4		T396	3		T537	4
values[20]	251	1			T232	2		T396	5		T537	5
values[21]	237	1			T232	2		T396	4		T537	7
values[22]	213	1			T232	1		T396	5		T537	8
values[23]	301	1			T232	7		T396	23		T537	7
values[24]	274	1			T232	4		T396	6		T537	4
values[25]	254	1			T232	2		T396	5		T537	6
values[26]	238	1			T232	1		T396	12		T537	6
values[27]	254	1			T232	1		T396	14		T537	6
values[28]	259	1			T232	6		T396	4		T537	10
values[29]	295	1			T232	7		T396	10		T537	19
values[30]	214	1			T232	6		T396	7		T537	10
values[31]	209	1			T232	5		T396	14		T537	7
values[32]	216	1			T232	4		T396	6		T537	8
values[33]	210	1			T232	2		T396	11		T537	10
values[34]	233	1			T232	2		T396	13		T537	3
values[35]	272	1			T232	5		T396	3		T537	3
values[36]	201	1			T232	3		T396	5		T537	3
values[37]	254	1			T232	3		T396	4		T537	11
values[38]	196	1			T232	5		T396	7		T537	3
values[39]	220	1			T232	5		T396	11		T537	6
values[40]	218	1			T232	2		T396	6		T537	5
values[41]	212	1			T232	1		T396	7		T537	3
values[42]	232	1			T232	1		T396	8		T537	22
values[43]	248	1			T232	1		T396	11		T537	7
values[44]	217	1			T232	2		T396	9		T537	5
values[45]	192	1			T232	2		T396	9		T537	6
values[46]	219	1			T232	1		T396	12		T537	16
values[47]	212	1			T232	1		T396	11		T537	5
values[48]	217	1			T232	2		T396	6		T537	5
values[49]	199	1			T232	3		T396	5		T537	6
values[50]	212	1			T232	4		T396	3		T537	10
values[51]	165	1			T232	6		T396	6		T537	16
values[52]	197	1			T232	6		T396	7		T537	4
values[53]	189	1			T232	1		T396	5		T537	3
values[54]	209	1			T232	2		T396	8		T537	6
values[55]	161	1			T232	1		T396	13		T537	8
values[56]	208	1			T232	1		T396	3		T537	7
values[57]	168	1			T232	2		T396	6		T537	3
values[58]	165	1			T232	2		T396	4		T537	5
values[59]	214	1			T232	2		T396	13		T537	7
values[60]	185	1			T232	3		T396	8		T537	5
values[61]	213	1			T232	3		T396	10		T537	28
values[62]	167	1			T232	4		T396	7		T537	11
values[63]	156	1			T232	2		T396	5		T537	4
values[64]	198	1			T232	4		T396	9		T417	21
values[65]	157	1			T232	3		T396	6		T417	30
values[66]	158	1			T232	4		T396	10		T417	25
values[67]	158	1			T232	1		T396	3		T417	9
values[68]	99	1			T232	2		T396	7		T790	1
values[69]	98	1			T232	3		T396	4		T790	1
values[70]	93	1			T232	3		T790	1		T785	1
values[71]	110	1			T232	1		T790	1		T785	1
values[72]	97	1			T232	5		T790	1		T785	1
values[73]	95	1			T232	5		T790	1		T785	1
values[74]	78	1			T232	2		T790	1		T785	1
values[75]	62	1			T232	1		T790	1		T785	1
values[76]	53	1			T232	5		T790	1		T785	1
values[77]	56	1			T232	1		T790	1		T785	1
values[78]	62	1			T232	4		T790	2		T785	1
values[79]	61	1			T232	9		T790	1		T785	1
values[80]	55	1			T232	4		T790	1		T785	1
values[81]	49	1			T232	2		T790	1		T785	1
values[82]	57	1			T232	4		T790	1		T785	1
values[83]	62	1			T232	2		T790	1		T785	1
values[84]	64	1			T232	3		T790	1		T785	2
values[85]	52	1			T232	1		T790	1		T785	1
values[86]	70	1			T232	1		T790	1		T785	1
values[87]	61	1			T232	3		T790	1		T785	1
values[88]	77	1			T232	2		T790	1		T785	1
values[89]	68	1			T232	1		T790	1		T785	1
values[90]	56	1			T232	2		T790	1		T785	1
values[91]	58	1			T232	1		T790	1		T785	1
values[92]	61	1			T232	2		T790	1		T785	1
values[93]	79	1			T232	3		T790	1		T785	3
values[94]	67	1			T232	3		T790	1		T785	3
values[95]	74	1			T232	3		T790	1		T785	4
values[96]	71	1			T232	3		T790	1		T785	1
values[97]	80	1			T232	1		T790	1		T785	6
values[98]	74	1			T232	5		T790	1		T785	1
values[99]	63	1			T232	1		T790	1		T785	1
values[100]	64	1			T232	2		T790	1		T785	7
values[101]	63	1			T232	1		T790	1		T785	3
values[102]	64	1			T232	2		T790	1		T785	3
values[103]	67	1			T232	2		T790	1		T785	1
values[104]	57	1			T232	3		T790	1		T785	4
values[105]	59	1			T232	5		T790	1		T785	2
values[106]	63	1			T232	3		T790	1		T785	8
values[107]	57	1			T232	2		T790	1		T785	1
values[108]	81	1			T232	12		T790	1		T785	1
values[109]	70	1			T232	2		T790	1		T785	2
values[110]	83	1			T232	1		T790	1		T785	5
values[111]	59	1			T232	2		T790	1		T785	2
values[112]	70	1			T232	3		T790	1		T785	4
values[113]	70	1			T232	3		T790	1		T785	12
values[114]	75	1			T232	8		T790	2		T785	3
values[115]	65	1			T232	1		T790	3		T785	5
values[116]	54	1			T232	2		T790	1		T785	1
values[117]	64	1			T232	2		T790	2		T785	1
values[118]	56	1			T232	2		T790	6		T785	1
values[119]	56	1			T232	3		T790	4		T785	6
values[120]	52	1			T232	5		T790	3		T785	3
values[121]	69	1			T232	6		T790	2		T785	1
values[122]	55	1			T232	5		T790	2		T785	3
values[123]	47	1			T232	3		T790	2		T785	2
values[124]	70	1			T232	7		T790	1		T785	3
values[125]	103	1			T232	14		T790	1		T785	2
values[126]	137	1			T232	28		T790	2		T785	2
values[127]	849	1			T232	31		T790	32		T785	25
values[128]	6979	1			T232	23		T790	286		T785	269