Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.csrng_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	156165	1			T32	11		T33	531		T34	8
values[2]	5023	1			T33	115		T100	1		T101	5
values[3]	2268	1			T33	75		T100	1		T395	36
values[4]	1620	1			T33	36		T100	1		T395	24
values[5]	1169	1			T33	17		T100	1		T395	13
values[6]	981	1			T33	6		T100	1		T395	11
values[7]	933	1			T33	9		T100	1		T395	2
values[8]	886	1			T33	6		T100	1		T395	2
values[9]	943	1			T33	6		T100	1		T395	2
values[10]	736	1			T100	1		T397	3		T675	27
values[11]	686	1			T100	1		T397	9		T675	23
values[12]	657	1			T100	1		T397	10		T675	7
values[13]	687	1			T100	1		T397	11		T675	12
values[14]	645	1			T100	1		T397	12		T675	8
values[15]	606	1			T100	1		T397	12		T675	1
values[16]	516	1			T100	1		T397	13		T338	3
values[17]	528	1			T100	1		T397	23		T338	4
values[18]	553	1			T100	1		T397	15		T338	5
values[19]	495	1			T100	1		T397	15		T338	6
values[20]	549	1			T100	1		T397	25		T338	5
values[21]	606	1			T100	1		T397	29		T338	3
values[22]	589	1			T100	1		T397	20		T338	4
values[23]	540	1			T100	1		T397	32		T338	4
values[24]	457	1			T100	1		T397	21		T338	1
values[25]	368	1			T100	2		T397	5		T338	2
values[26]	330	1			T100	1		T397	11		T338	2
values[27]	307	1			T100	1		T397	4		T338	4
values[28]	339	1			T100	1		T397	3		T338	7
values[29]	315	1			T100	1		T397	19		T338	8
values[30]	312	1			T100	1		T397	26		T338	13
values[31]	257	1			T100	1		T397	10		T338	20
values[32]	233	1			T100	1		T397	17		T338	14
values[33]	231	1			T100	1		T397	22		T338	26
values[34]	195	1			T100	1		T397	38		T338	14
values[35]	152	1			T100	1		T397	34		T338	9
values[36]	155	1			T100	1		T397	26		T338	11
values[37]	149	1			T100	1		T397	14		T338	16
values[38]	143	1			T100	1		T397	7		T338	23
values[39]	114	1			T100	1		T338	21		T408	2
values[40]	113	1			T100	1		T338	13		T408	3
values[41]	131	1			T100	1		T338	34		T408	4
values[42]	123	1			T100	1		T338	44		T408	5
values[43]	92	1			T100	1		T338	28		T408	8
values[44]	95	1			T100	1		T338	32		T408	1
values[45]	84	1			T100	1		T338	29		T408	3
values[46]	86	1			T100	1		T338	18		T408	2
values[47]	77	1			T100	1		T338	4		T408	1
values[48]	76	1			T100	1		T338	1		T408	9
values[49]	62	1			T100	1		T408	3		T781	1
values[50]	61	1			T100	1		T408	3		T781	1
values[51]	60	1			T100	1		T408	1		T781	1
values[52]	62	1			T100	1		T408	1		T781	1
values[53]	57	1			T100	1		T408	1		T781	1
values[54]	58	1			T100	1		T408	2		T781	1
values[55]	72	1			T100	1		T408	5		T781	1
values[56]	66	1			T100	1		T408	8		T781	1
values[57]	64	1			T100	1		T408	2		T781	1
values[58]	80	1			T100	1		T408	4		T781	1
values[59]	69	1			T100	1		T408	1		T781	1
values[60]	68	1			T100	1		T408	3		T781	1
values[61]	74	1			T100	1		T408	2		T781	1
values[62]	74	1			T100	1		T408	3		T781	1
values[63]	84	1			T100	1		T408	1		T781	1
values[64]	68	1			T100	1		T408	2		T781	1
values[65]	81	1			T100	1		T408	1		T781	1
values[66]	74	1			T100	1		T408	1		T781	1
values[67]	67	1			T100	1		T408	2		T781	1
values[68]	66	1			T100	2		T408	2		T781	1
values[69]	71	1			T100	1		T408	3		T781	1
values[70]	65	1			T100	1		T408	1		T781	1
values[71]	79	1			T100	1		T408	2		T781	1
values[72]	68	1			T100	1		T408	1		T781	1
values[73]	81	1			T100	1		T408	2		T781	1
values[74]	66	1			T100	1		T408	1		T781	1
values[75]	72	1			T100	1		T408	2		T781	1
values[76]	84	1			T100	5		T408	3		T781	1
values[77]	96	1			T100	2		T408	1		T781	1
values[78]	67	1			T100	1		T408	1		T781	1
values[79]	67	1			T100	1		T408	1		T781	1
values[80]	71	1			T100	2		T408	2		T781	1
values[81]	83	1			T100	5		T408	1		T781	1
values[82]	82	1			T100	6		T408	3		T781	1
values[83]	79	1			T100	5		T408	4		T781	1
values[84]	74	1			T100	5		T408	4		T781	1
values[85]	73	1			T100	6		T408	1		T781	1
values[86]	70	1			T100	1		T408	2		T781	1
values[87]	73	1			T100	3		T408	8		T781	1
values[88]	76	1			T100	5		T408	3		T781	1
values[89]	96	1			T100	2		T408	1		T781	1
values[90]	109	1			T100	3		T408	3		T781	1
values[91]	98	1			T100	5		T408	5		T781	1
values[92]	123	1			T100	1		T408	3		T781	1
values[93]	91	1			T100	3		T408	1		T781	1
values[94]	90	1			T100	2		T408	1		T781	2
values[95]	78	1			T100	7		T408	2		T781	4
values[96]	72	1			T100	5		T408	3		T781	2
values[97]	82	1			T100	2		T408	1		T781	1
values[98]	76	1			T100	1		T408	3		T781	2
values[99]	90	1			T100	1		T408	5		T781	4
values[100]	77	1			T100	2		T408	2		T781	1
values[101]	81	1			T100	1		T408	1		T781	1
values[102]	93	1			T100	3		T408	1		T781	2
values[103]	87	1			T100	3		T408	2		T781	2
values[104]	96	1			T100	2		T408	2		T781	2
values[105]	85	1			T100	2		T408	1		T781	1
values[106]	97	1			T100	1		T408	4		T781	4
values[107]	96	1			T100	1		T408	4		T781	3
values[108]	107	1			T100	1		T408	5		T781	6
values[109]	120	1			T100	1		T408	4		T781	4
values[110]	102	1			T100	1		T408	2		T781	2
values[111]	98	1			T100	1		T408	4		T781	1
values[112]	107	1			T100	2		T408	8		T781	2
values[113]	111	1			T100	2		T408	8		T781	2
values[114]	103	1			T100	1		T408	4		T781	2
values[115]	127	1			T100	1		T408	3		T781	1
values[116]	116	1			T100	2		T408	7		T781	3
values[117]	95	1			T100	3		T408	5		T781	2
values[118]	88	1			T100	1		T408	3		T781	1
values[119]	117	1			T100	3		T408	3		T781	1
values[120]	133	1			T100	2		T408	2		T781	1
values[121]	101	1			T100	1		T408	4		T781	2
values[122]	96	1			T100	1		T408	1		T781	1
values[123]	174	1			T100	5		T408	5		T781	1
values[124]	268	1			T100	1		T408	8		T781	2
values[125]	496	1			T100	1		T408	21		T781	1
values[126]	967	1			T100	9		T408	52		T781	27
values[127]	3048	1			T100	96		T408	35		T781	103
values[128]	4892	1			T100	180		T408	4		T781	155