| T670 |
/workspace/coverage/default/12.chip_sw_lc_ctrl_transition.1038838253 |
|
|
Jan 14 03:52:52 PM PST 24 |
Jan 14 04:00:02 PM PST 24 |
6558072139 ps |
| T671 |
/workspace/coverage/default/0.chip_sw_example_manufacturer.2700017884 |
|
|
Jan 14 03:11:49 PM PST 24 |
Jan 14 03:15:32 PM PST 24 |
2577718662 ps |
| T672 |
/workspace/coverage/default/0.chip_sw_aes_smoketest.3309837716 |
|
|
Jan 14 03:29:51 PM PST 24 |
Jan 14 03:35:36 PM PST 24 |
3179199016 ps |
| T673 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx1.416366390 |
|
|
Jan 14 03:52:36 PM PST 24 |
Jan 14 04:09:36 PM PST 24 |
5398012392 ps |
| T458 |
/workspace/coverage/default/29.chip_sw_alert_handler_lpg_sleep_mode_alerts.1348061361 |
|
|
Jan 14 03:56:17 PM PST 24 |
Jan 14 04:03:30 PM PST 24 |
3827544546 ps |
| T408 |
/workspace/coverage/default/63.chip_sw_all_escalation_resets.496661584 |
|
|
Jan 14 03:57:42 PM PST 24 |
Jan 14 04:07:22 PM PST 24 |
4821978280 ps |
| T674 |
/workspace/coverage/default/1.chip_sw_csrng_fuse_en_sw_app_read_test.1758047072 |
|
|
Jan 14 03:35:19 PM PST 24 |
Jan 14 03:44:11 PM PST 24 |
4100127702 ps |
| T346 |
/workspace/coverage/default/62.chip_sw_all_escalation_resets.3312951175 |
|
|
Jan 14 03:58:29 PM PST 24 |
Jan 14 04:08:58 PM PST 24 |
5175334272 ps |
| T39 |
/workspace/coverage/default/1.rom_volatile_raw_unlock.3402009233 |
|
|
Jan 14 03:40:00 PM PST 24 |
Jan 14 04:12:52 PM PST 24 |
9367166150 ps |
| T675 |
/workspace/coverage/default/1.chip_sw_exit_test_unlocked_bootstrap.3701902343 |
|
|
Jan 14 03:31:06 PM PST 24 |
Jan 14 06:16:56 PM PST 24 |
59748671890 ps |
| T455 |
/workspace/coverage/default/95.chip_sw_all_escalation_resets.3087282776 |
|
|
Jan 14 04:00:58 PM PST 24 |
Jan 14 04:10:54 PM PST 24 |
5547457640 ps |
| T244 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access.1571465420 |
|
|
Jan 14 03:46:49 PM PST 24 |
Jan 14 03:55:39 PM PST 24 |
4665388992 ps |
| T676 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_smoketest.449070675 |
|
|
Jan 14 03:51:46 PM PST 24 |
Jan 14 03:55:51 PM PST 24 |
2406884712 ps |
| T231 |
/workspace/coverage/default/2.chip_sw_plic_sw_irq.1937567690 |
|
|
Jan 14 03:46:55 PM PST 24 |
Jan 14 03:52:09 PM PST 24 |
2276951240 ps |
| T677 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_prod.3926080239 |
|
|
Jan 14 03:19:16 PM PST 24 |
Jan 14 03:25:43 PM PST 24 |
3901713040 ps |
| T678 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en.4057906390 |
|
|
Jan 14 03:12:21 PM PST 24 |
Jan 14 03:27:58 PM PST 24 |
5561862921 ps |
| T679 |
/workspace/coverage/default/0.chip_sw_hmac_enc_idle.1995050170 |
|
|
Jan 14 03:18:37 PM PST 24 |
Jan 14 03:22:27 PM PST 24 |
2647269312 ps |
| T140 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through_collision.1101098472 |
|
|
Jan 14 03:41:43 PM PST 24 |
Jan 14 03:54:08 PM PST 24 |
4759688813 ps |
| T370 |
/workspace/coverage/default/0.chip_sw_edn_boot_mode.597450981 |
|
|
Jan 14 03:18:39 PM PST 24 |
Jan 14 03:27:34 PM PST 24 |
2946459888 ps |
| T680 |
/workspace/coverage/default/2.rom_e2e_smoke.910019307 |
|
|
Jan 14 03:51:32 PM PST 24 |
Jan 14 04:17:26 PM PST 24 |
8889060750 ps |
| T406 |
/workspace/coverage/default/66.chip_sw_alert_handler_lpg_sleep_mode_alerts.4007619243 |
|
|
Jan 14 03:59:41 PM PST 24 |
Jan 14 04:05:27 PM PST 24 |
4147885484 ps |
| T308 |
/workspace/coverage/default/4.chip_sw_uart_rand_baudrate.172421363 |
|
|
Jan 14 03:51:51 PM PST 24 |
Jan 14 04:02:36 PM PST 24 |
4797676704 ps |
| T494 |
/workspace/coverage/default/99.chip_sw_all_escalation_resets.3582817223 |
|
|
Jan 14 04:01:54 PM PST 24 |
Jan 14 04:11:29 PM PST 24 |
5941591112 ps |
| T330 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_disabled.3187853262 |
|
|
Jan 14 03:43:23 PM PST 24 |
Jan 14 03:49:35 PM PST 24 |
3401691056 ps |
| T681 |
/workspace/coverage/default/3.chip_tap_straps_dev.782126150 |
|
|
Jan 14 03:50:38 PM PST 24 |
Jan 14 04:04:01 PM PST 24 |
7506400901 ps |
| T682 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.1241185868 |
|
|
Jan 14 03:47:46 PM PST 24 |
Jan 14 04:00:30 PM PST 24 |
5035895602 ps |
| T683 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.623554027 |
|
|
Jan 14 03:48:14 PM PST 24 |
Jan 14 03:58:39 PM PST 24 |
3697462524 ps |
| T487 |
/workspace/coverage/default/33.chip_sw_all_escalation_resets.2168454584 |
|
|
Jan 14 03:56:50 PM PST 24 |
Jan 14 04:06:40 PM PST 24 |
4490808978 ps |
| T684 |
/workspace/coverage/default/17.chip_sw_uart_rand_baudrate.1032197388 |
|
|
Jan 14 03:55:27 PM PST 24 |
Jan 14 04:07:09 PM PST 24 |
4612889850 ps |
| T335 |
/workspace/coverage/default/0.chip_sw_spi_host_tx_rx.1344269673 |
|
|
Jan 14 03:11:53 PM PST 24 |
Jan 14 03:15:21 PM PST 24 |
3080070200 ps |
| T457 |
/workspace/coverage/default/72.chip_sw_all_escalation_resets.791872699 |
|
|
Jan 14 03:59:24 PM PST 24 |
Jan 14 04:08:57 PM PST 24 |
6096646900 ps |
| T64 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_pings.1160689950 |
|
|
Jan 14 03:17:41 PM PST 24 |
Jan 14 03:35:59 PM PST 24 |
9670389100 ps |
| T289 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx1.2856211597 |
|
|
Jan 14 03:13:00 PM PST 24 |
Jan 14 03:32:34 PM PST 24 |
5811396416 ps |
| T134 |
/workspace/coverage/default/2.chip_sw_rom_ctrl_integrity_check.767494400 |
|
|
Jan 14 03:48:04 PM PST 24 |
Jan 14 04:00:40 PM PST 24 |
8966478651 ps |
| T245 |
/workspace/coverage/default/3.chip_sw_data_integrity_escalation.1773995697 |
|
|
Jan 14 03:51:58 PM PST 24 |
Jan 14 04:02:47 PM PST 24 |
5723532760 ps |
| T323 |
/workspace/coverage/default/1.chip_sival_flash_info_access.3614912743 |
|
|
Jan 14 03:31:31 PM PST 24 |
Jan 14 03:38:39 PM PST 24 |
2946222180 ps |
| T685 |
/workspace/coverage/default/0.chip_sw_otbn_randomness.3905685320 |
|
|
Jan 14 03:16:02 PM PST 24 |
Jan 14 03:25:22 PM PST 24 |
6570321832 ps |
| T686 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.2705435857 |
|
|
Jan 14 03:32:35 PM PST 24 |
Jan 14 04:03:55 PM PST 24 |
13223722030 ps |
| T687 |
/workspace/coverage/default/1.chip_sw_rv_timer_irq.2123320632 |
|
|
Jan 14 03:32:47 PM PST 24 |
Jan 14 03:38:08 PM PST 24 |
3014239784 ps |
| T688 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx3.1880440138 |
|
|
Jan 14 03:51:58 PM PST 24 |
Jan 14 04:09:29 PM PST 24 |
5410746360 ps |
| T689 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_ec_rst_l.2666879824 |
|
|
Jan 14 03:46:39 PM PST 24 |
Jan 14 04:37:22 PM PST 24 |
20573649604 ps |
| T121 |
/workspace/coverage/default/2.chip_sw_ast_clk_rst_inputs.988943378 |
|
|
Jan 14 03:50:35 PM PST 24 |
Jan 14 04:04:15 PM PST 24 |
11359081748 ps |
| T40 |
/workspace/coverage/default/1.chip_jtag_csr_rw.1723319444 |
|
|
Jan 14 03:30:40 PM PST 24 |
Jan 14 03:50:06 PM PST 24 |
10104467340 ps |
| T353 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_lockstep_glitch.3446273056 |
|
|
Jan 14 03:38:34 PM PST 24 |
Jan 14 03:41:42 PM PST 24 |
1964110666 ps |
| T690 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_reset_toggle.1740211373 |
|
|
Jan 14 03:35:46 PM PST 24 |
Jan 14 04:05:43 PM PST 24 |
7911053480 ps |
| T691 |
/workspace/coverage/default/2.rom_e2e_shutdown_output.1832706714 |
|
|
Jan 14 03:54:46 PM PST 24 |
Jan 14 04:48:03 PM PST 24 |
22445543687 ps |
| T496 |
/workspace/coverage/default/68.chip_sw_alert_handler_lpg_sleep_mode_alerts.3097697169 |
|
|
Jan 14 04:00:14 PM PST 24 |
Jan 14 04:05:36 PM PST 24 |
3499791604 ps |
| T692 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_testunlocks.346050059 |
|
|
Jan 14 03:13:29 PM PST 24 |
Jan 14 03:58:03 PM PST 24 |
31832058334 ps |
| T169 |
/workspace/coverage/default/0.chip_sw_spi_device_tpm.590240501 |
|
|
Jan 14 03:13:37 PM PST 24 |
Jan 14 03:19:10 PM PST 24 |
2804419506 ps |
| T693 |
/workspace/coverage/default/2.rom_volatile_raw_unlock.1160511295 |
|
|
Jan 14 03:52:01 PM PST 24 |
Jan 14 04:16:50 PM PST 24 |
9474619145 ps |
| T694 |
/workspace/coverage/default/0.chip_sw_pwrmgr_wdog_reset.651943000 |
|
|
Jan 14 03:16:16 PM PST 24 |
Jan 14 03:26:41 PM PST 24 |
5178225150 ps |
| T695 |
/workspace/coverage/default/1.chip_sw_pwrmgr_all_reset_reqs.4229024039 |
|
|
Jan 14 03:33:55 PM PST 24 |
Jan 14 04:02:14 PM PST 24 |
10283132382 ps |
| T306 |
/workspace/coverage/default/1.chip_sw_gpio.4289396248 |
|
|
Jan 14 03:32:40 PM PST 24 |
Jan 14 03:40:16 PM PST 24 |
4081245822 ps |
| T246 |
/workspace/coverage/default/4.chip_sw_data_integrity_escalation.2857608621 |
|
|
Jan 14 03:52:51 PM PST 24 |
Jan 14 04:04:29 PM PST 24 |
5304426272 ps |
| T205 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_vendor_test_csr_access.3042829232 |
|
|
Jan 14 03:45:00 PM PST 24 |
Jan 14 03:49:12 PM PST 24 |
2179765170 ps |
| T696 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.3134308120 |
|
|
Jan 14 03:32:28 PM PST 24 |
Jan 14 03:36:56 PM PST 24 |
3963755742 ps |
| T697 |
/workspace/coverage/default/23.chip_sw_all_escalation_resets.142652709 |
|
|
Jan 14 03:54:56 PM PST 24 |
Jan 14 04:04:02 PM PST 24 |
4431865020 ps |
| T296 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_reset.2359278299 |
|
|
Jan 14 03:44:01 PM PST 24 |
Jan 14 04:09:41 PM PST 24 |
21747132168 ps |
| T698 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en.928728397 |
|
|
Jan 14 03:47:11 PM PST 24 |
Jan 14 03:56:57 PM PST 24 |
4047542854 ps |
| T699 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.1018497983 |
|
|
Jan 14 03:22:31 PM PST 24 |
Jan 14 03:33:55 PM PST 24 |
5058845192 ps |
| T700 |
/workspace/coverage/default/1.chip_sw_gpio_smoketest.3324922670 |
|
|
Jan 14 03:39:34 PM PST 24 |
Jan 14 03:44:51 PM PST 24 |
2827763901 ps |
| T701 |
/workspace/coverage/default/0.chip_tap_straps_dev.4016318385 |
|
|
Jan 14 03:23:44 PM PST 24 |
Jan 14 03:26:01 PM PST 24 |
2285808003 ps |
| T702 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en.2435104176 |
|
|
Jan 14 03:34:27 PM PST 24 |
Jan 14 04:30:37 PM PST 24 |
19195344342 ps |
| T703 |
/workspace/coverage/default/16.chip_sw_all_escalation_resets.1147117286 |
|
|
Jan 14 03:53:41 PM PST 24 |
Jan 14 04:04:15 PM PST 24 |
5243127240 ps |
| T704 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_all_reset_reqs.4093099883 |
|
|
Jan 14 03:34:25 PM PST 24 |
Jan 14 04:24:33 PM PST 24 |
28360356149 ps |
| T447 |
/workspace/coverage/default/9.chip_sw_alert_handler_lpg_sleep_mode_alerts.1968030022 |
|
|
Jan 14 03:54:36 PM PST 24 |
Jan 14 04:00:01 PM PST 24 |
3958553200 ps |
| T705 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_dev.362818087 |
|
|
Jan 14 03:42:27 PM PST 24 |
Jan 14 04:05:01 PM PST 24 |
8158133574 ps |
| T498 |
/workspace/coverage/default/6.chip_sw_all_escalation_resets.2821784919 |
|
|
Jan 14 03:52:56 PM PST 24 |
Jan 14 04:02:38 PM PST 24 |
4264726440 ps |
| T485 |
/workspace/coverage/default/10.chip_sw_all_escalation_resets.1339463706 |
|
|
Jan 14 03:52:50 PM PST 24 |
Jan 14 04:05:55 PM PST 24 |
5227753272 ps |
| T706 |
/workspace/coverage/default/86.chip_sw_alert_handler_lpg_sleep_mode_alerts.2686003411 |
|
|
Jan 14 04:01:03 PM PST 24 |
Jan 14 04:07:55 PM PST 24 |
4038044432 ps |
| T374 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_aes.2293111517 |
|
|
Jan 14 03:36:00 PM PST 24 |
Jan 14 03:44:53 PM PST 24 |
4236459872 ps |
| T42 |
/workspace/coverage/default/2.chip_sw_pwrmgr_usbdev_smoketest.3520294292 |
|
|
Jan 14 03:52:38 PM PST 24 |
Jan 14 04:00:55 PM PST 24 |
6128090360 ps |
| T707 |
/workspace/coverage/default/0.chip_sw_exit_test_unlocked_bootstrap.3539734860 |
|
|
Jan 14 03:11:27 PM PST 24 |
Jan 14 06:08:41 PM PST 24 |
61279308785 ps |
| T708 |
/workspace/coverage/default/2.chip_sw_ast_clk_outputs.3110692027 |
|
|
Jan 14 03:50:50 PM PST 24 |
Jan 14 04:06:29 PM PST 24 |
8331579028 ps |
| T709 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_inputs.3743271169 |
|
|
Jan 14 03:44:00 PM PST 24 |
Jan 14 03:50:40 PM PST 24 |
3433777111 ps |
| T159 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_execution_main.2111343204 |
|
|
Jan 14 03:36:35 PM PST 24 |
Jan 14 03:52:37 PM PST 24 |
9859246503 ps |
| T710 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_clock_freqs.3546829319 |
|
|
Jan 14 03:31:06 PM PST 24 |
Jan 14 03:51:26 PM PST 24 |
5753142574 ps |
| T290 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx2.858652242 |
|
|
Jan 14 03:11:52 PM PST 24 |
Jan 14 03:24:02 PM PST 24 |
4665170368 ps |
| T711 |
/workspace/coverage/default/2.chip_sw_hmac_enc_idle.2527973452 |
|
|
Jan 14 03:46:57 PM PST 24 |
Jan 14 03:51:28 PM PST 24 |
2097681916 ps |
| T712 |
/workspace/coverage/default/1.chip_sw_csrng_smoketest.1815967604 |
|
|
Jan 14 03:40:29 PM PST 24 |
Jan 14 03:43:57 PM PST 24 |
3296476996 ps |
| T501 |
/workspace/coverage/default/55.chip_sw_all_escalation_resets.2482932990 |
|
|
Jan 14 03:57:19 PM PST 24 |
Jan 14 04:06:14 PM PST 24 |
5017241896 ps |
| T304 |
/workspace/coverage/default/0.chip_sw_entropy_src_csrng.1269251966 |
|
|
Jan 14 03:18:25 PM PST 24 |
Jan 14 03:44:38 PM PST 24 |
7488034740 ps |
| T713 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq.362180680 |
|
|
Jan 14 03:52:28 PM PST 24 |
Jan 14 04:25:00 PM PST 24 |
12726247801 ps |
| T448 |
/workspace/coverage/default/26.chip_sw_alert_handler_lpg_sleep_mode_alerts.1020635889 |
|
|
Jan 14 03:54:28 PM PST 24 |
Jan 14 04:01:56 PM PST 24 |
4615129032 ps |
| T324 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.1317130398 |
|
|
Jan 14 03:25:06 PM PST 24 |
Jan 14 03:39:55 PM PST 24 |
6550573358 ps |
| T714 |
/workspace/coverage/default/25.chip_sw_alert_handler_lpg_sleep_mode_alerts.1209419460 |
|
|
Jan 14 03:55:14 PM PST 24 |
Jan 14 04:02:23 PM PST 24 |
4452450656 ps |
| T715 |
/workspace/coverage/default/0.chip_sw_rstmgr_sw_req.2250706757 |
|
|
Jan 14 03:13:30 PM PST 24 |
Jan 14 03:20:30 PM PST 24 |
4516412578 ps |
| T716 |
/workspace/coverage/default/0.chip_sw_rv_timer_irq.723628333 |
|
|
Jan 14 03:15:12 PM PST 24 |
Jan 14 03:18:41 PM PST 24 |
2968149120 ps |
| T472 |
/workspace/coverage/default/24.chip_sw_alert_handler_lpg_sleep_mode_alerts.2893226690 |
|
|
Jan 14 03:54:23 PM PST 24 |
Jan 14 04:00:53 PM PST 24 |
3686925992 ps |
| T497 |
/workspace/coverage/default/36.chip_sw_alert_handler_lpg_sleep_mode_alerts.1696384847 |
|
|
Jan 14 03:55:56 PM PST 24 |
Jan 14 04:02:18 PM PST 24 |
3590970260 ps |
| T232 |
/workspace/coverage/default/0.chip_sw_plic_sw_irq.2050051141 |
|
|
Jan 14 03:21:44 PM PST 24 |
Jan 14 03:25:49 PM PST 24 |
3514447500 ps |
| T717 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_disabled.1799252061 |
|
|
Jan 14 03:15:03 PM PST 24 |
Jan 14 03:19:58 PM PST 24 |
3111206208 ps |
| T718 |
/workspace/coverage/default/2.chip_sw_flash_crash_alert.1049450443 |
|
|
Jan 14 03:49:57 PM PST 24 |
Jan 14 04:00:17 PM PST 24 |
4676456900 ps |
| T719 |
/workspace/coverage/default/2.chip_sw_otbn_smoketest.2018603731 |
|
|
Jan 14 03:51:49 PM PST 24 |
Jan 14 04:08:35 PM PST 24 |
4871654562 ps |
| T720 |
/workspace/coverage/default/0.rom_e2e_asm_init_dev.4291776978 |
|
|
Jan 14 03:32:33 PM PST 24 |
Jan 14 04:08:42 PM PST 24 |
8260277632 ps |
| T721 |
/workspace/coverage/default/2.chip_sw_rv_dm_access_after_wakeup.2728354712 |
|
|
Jan 14 03:49:36 PM PST 24 |
Jan 14 03:57:27 PM PST 24 |
6713092770 ps |
| T722 |
/workspace/coverage/default/2.chip_sw_rstmgr_rst_cnsty_escalation.3562775157 |
|
|
Jan 14 03:41:59 PM PST 24 |
Jan 14 03:50:36 PM PST 24 |
3926427528 ps |
| T216 |
/workspace/coverage/default/1.chip_sw_rstmgr_cpu_info.3462313121 |
|
|
Jan 14 03:33:18 PM PST 24 |
Jan 14 03:40:22 PM PST 24 |
5661289360 ps |
| T723 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_reset_reqs.3488516483 |
|
|
Jan 14 03:14:42 PM PST 24 |
Jan 14 04:03:14 PM PST 24 |
28356405767 ps |
| T724 |
/workspace/coverage/default/2.rom_e2e_shutdown_exception_c.198705514 |
|
|
Jan 14 03:52:57 PM PST 24 |
Jan 14 04:23:47 PM PST 24 |
8735444661 ps |
| T725 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.74766364 |
|
|
Jan 14 03:37:56 PM PST 24 |
Jan 14 03:53:14 PM PST 24 |
6111169263 ps |
| T726 |
/workspace/coverage/default/1.chip_sw_pwrmgr_wdog_reset.169106085 |
|
|
Jan 14 03:33:43 PM PST 24 |
Jan 14 03:44:35 PM PST 24 |
4191695236 ps |
| T727 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod_end.3017226658 |
|
|
Jan 14 03:33:27 PM PST 24 |
Jan 14 04:09:45 PM PST 24 |
8399965173 ps |
| T728 |
/workspace/coverage/default/1.rom_e2e_shutdown_output.2662287711 |
|
|
Jan 14 03:43:44 PM PST 24 |
Jan 14 04:31:52 PM PST 24 |
20977364224 ps |
| T729 |
/workspace/coverage/default/2.chip_sw_entropy_src_smoketest.1697036637 |
|
|
Jan 14 03:51:24 PM PST 24 |
Jan 14 04:01:50 PM PST 24 |
4369775768 ps |
| T449 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_alerts.3166844843 |
|
|
Jan 14 03:44:57 PM PST 24 |
Jan 14 03:53:01 PM PST 24 |
3980995858 ps |
| T730 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_power_glitch_reset.590555274 |
|
|
Jan 14 03:44:02 PM PST 24 |
Jan 14 03:50:59 PM PST 24 |
4852244591 ps |
| T731 |
/workspace/coverage/default/0.chip_sw_aes_masking_off.4181673861 |
|
|
Jan 14 03:16:33 PM PST 24 |
Jan 14 03:21:32 PM PST 24 |
3001858055 ps |
| T325 |
/workspace/coverage/default/58.chip_sw_all_escalation_resets.1365177468 |
|
|
Jan 14 03:57:12 PM PST 24 |
Jan 14 04:06:27 PM PST 24 |
5177110488 ps |
| T732 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx3.122951587 |
|
|
Jan 14 03:51:51 PM PST 24 |
Jan 14 04:07:40 PM PST 24 |
5911168150 ps |
| T733 |
/workspace/coverage/default/0.rom_volatile_raw_unlock.2059803716 |
|
|
Jan 14 03:29:55 PM PST 24 |
Jan 14 03:58:41 PM PST 24 |
9561523927 ps |
| T734 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx.2363018855 |
|
|
Jan 14 03:53:16 PM PST 24 |
Jan 14 04:06:36 PM PST 24 |
5149851716 ps |
| T735 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx1.1427015961 |
|
|
Jan 14 03:40:43 PM PST 24 |
Jan 14 03:56:26 PM PST 24 |
5738931746 ps |
| T445 |
/workspace/coverage/default/7.chip_sw_alert_handler_lpg_sleep_mode_alerts.3122021072 |
|
|
Jan 14 03:54:33 PM PST 24 |
Jan 14 04:02:32 PM PST 24 |
4041507592 ps |
| T736 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ec_rst_l.3757188704 |
|
|
Jan 14 03:15:44 PM PST 24 |
Jan 14 04:18:53 PM PST 24 |
20414812503 ps |
| T737 |
/workspace/coverage/default/2.chip_sw_aes_enc.1102907622 |
|
|
Jan 14 03:46:23 PM PST 24 |
Jan 14 03:51:26 PM PST 24 |
2702616470 ps |
| T738 |
/workspace/coverage/default/0.chip_sw_example_flash.48887853 |
|
|
Jan 14 03:11:19 PM PST 24 |
Jan 14 03:14:19 PM PST 24 |
2889021828 ps |
| T739 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod_end.42528281 |
|
|
Jan 14 03:31:30 PM PST 24 |
Jan 14 04:06:53 PM PST 24 |
8627902944 ps |
| T740 |
/workspace/coverage/default/2.rom_e2e_asm_init_dev.3238833057 |
|
|
Jan 14 03:54:31 PM PST 24 |
Jan 14 04:22:01 PM PST 24 |
8593524096 ps |
| T741 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.1654963273 |
|
|
Jan 14 03:14:39 PM PST 24 |
Jan 14 03:33:56 PM PST 24 |
16267986870 ps |
| T217 |
/workspace/coverage/default/2.chip_sw_rstmgr_cpu_info.2149878563 |
|
|
Jan 14 03:42:57 PM PST 24 |
Jan 14 03:53:29 PM PST 24 |
6529418960 ps |
| T742 |
/workspace/coverage/default/0.chip_sw_aes_entropy.85306404 |
|
|
Jan 14 03:17:40 PM PST 24 |
Jan 14 03:21:45 PM PST 24 |
2506954000 ps |
| T743 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en_reduced_freq.2840330641 |
|
|
Jan 14 03:25:15 PM PST 24 |
Jan 14 03:30:18 PM PST 24 |
3338533804 ps |
| T744 |
/workspace/coverage/default/0.chip_sw_coremark.3477271210 |
|
|
Jan 14 03:21:44 PM PST 24 |
Jan 14 06:07:38 PM PST 24 |
49816862740 ps |
| T291 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx_idx2.3797490770 |
|
|
Jan 14 03:31:17 PM PST 24 |
Jan 14 03:48:39 PM PST 24 |
5652198264 ps |
| T745 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx.2188183766 |
|
|
Jan 14 03:31:14 PM PST 24 |
Jan 14 03:46:08 PM PST 24 |
5938245008 ps |
| T746 |
/workspace/coverage/default/14.chip_sw_uart_rand_baudrate.1835380709 |
|
|
Jan 14 03:53:29 PM PST 24 |
Jan 14 04:07:35 PM PST 24 |
5206331500 ps |
| T747 |
/workspace/coverage/default/2.chip_sw_power_idle_load.856509864 |
|
|
Jan 14 03:50:25 PM PST 24 |
Jan 14 04:01:27 PM PST 24 |
3978623816 ps |
| T748 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.3746632250 |
|
|
Jan 14 03:22:27 PM PST 24 |
Jan 14 03:32:20 PM PST 24 |
4035788642 ps |
| T187 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prod.1450367838 |
|
|
Jan 14 03:31:46 PM PST 24 |
Jan 14 04:57:13 PM PST 24 |
48175902540 ps |
| T749 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_transition.1627872944 |
|
|
Jan 14 03:42:04 PM PST 24 |
Jan 14 03:51:10 PM PST 24 |
6430175309 ps |
| T366 |
/workspace/coverage/default/0.chip_sw_edn_auto_mode.1376534769 |
|
|
Jan 14 03:17:21 PM PST 24 |
Jan 14 03:25:54 PM PST 24 |
3139293428 ps |
| T292 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx2.871226398 |
|
|
Jan 14 03:40:50 PM PST 24 |
Jan 14 03:54:42 PM PST 24 |
4785894924 ps |
| T471 |
/workspace/coverage/default/51.chip_sw_all_escalation_resets.1721159199 |
|
|
Jan 14 03:57:27 PM PST 24 |
Jan 14 04:08:14 PM PST 24 |
4686165044 ps |
| T750 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_rma.2010301732 |
|
|
Jan 14 03:12:40 PM PST 24 |
Jan 14 03:35:51 PM PST 24 |
7040291120 ps |
| T751 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_reset.4139888037 |
|
|
Jan 14 03:15:43 PM PST 24 |
Jan 14 03:51:18 PM PST 24 |
25151238168 ps |
| T752 |
/workspace/coverage/default/0.rom_keymgr_functest.758997835 |
|
|
Jan 14 03:29:19 PM PST 24 |
Jan 14 03:36:22 PM PST 24 |
3916849824 ps |
| T753 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock.2350936130 |
|
|
Jan 14 03:13:11 PM PST 24 |
Jan 14 03:18:10 PM PST 24 |
4126521850 ps |
| T754 |
/workspace/coverage/default/8.chip_sw_lc_ctrl_transition.579674128 |
|
|
Jan 14 03:53:33 PM PST 24 |
Jan 14 04:04:15 PM PST 24 |
7300050638 ps |
| T755 |
/workspace/coverage/default/42.chip_sw_alert_handler_lpg_sleep_mode_alerts.3401929644 |
|
|
Jan 14 03:55:51 PM PST 24 |
Jan 14 04:01:37 PM PST 24 |
4192400340 ps |
| T756 |
/workspace/coverage/default/8.chip_sw_uart_rand_baudrate.1209464480 |
|
|
Jan 14 03:54:33 PM PST 24 |
Jan 14 04:24:42 PM PST 24 |
12936605788 ps |
| T757 |
/workspace/coverage/default/1.chip_sw_pwrmgr_full_aon_reset.3449273095 |
|
|
Jan 14 03:32:56 PM PST 24 |
Jan 14 03:44:09 PM PST 24 |
8558247672 ps |
| T395 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_test_locked0_to_scrap.3955476481 |
|
|
Jan 14 03:12:44 PM PST 24 |
Jan 14 03:15:14 PM PST 24 |
2652581938 ps |
| T758 |
/workspace/coverage/default/0.chip_tap_straps_prod.1244527832 |
|
|
Jan 14 03:23:54 PM PST 24 |
Jan 14 03:52:20 PM PST 24 |
14050550717 ps |
| T477 |
/workspace/coverage/default/33.chip_sw_alert_handler_lpg_sleep_mode_alerts.4284169188 |
|
|
Jan 14 03:55:53 PM PST 24 |
Jan 14 04:02:38 PM PST 24 |
3637227760 ps |
| T759 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.820690476 |
|
|
Jan 14 03:25:19 PM PST 24 |
Jan 14 03:44:55 PM PST 24 |
7264767162 ps |
| T760 |
/workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en_reduced_freq.1693220937 |
|
|
Jan 14 03:51:31 PM PST 24 |
Jan 14 03:56:37 PM PST 24 |
2774300472 ps |
| T761 |
/workspace/coverage/default/0.chip_sw_kmac_entropy.502464494 |
|
|
Jan 14 03:13:48 PM PST 24 |
Jan 14 03:19:23 PM PST 24 |
2736912740 ps |
| T204 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_vendor_test_csr_access.2479589 |
|
|
Jan 14 03:13:06 PM PST 24 |
Jan 14 03:15:57 PM PST 24 |
1932714396 ps |
| T762 |
/workspace/coverage/default/8.chip_sw_alert_handler_lpg_sleep_mode_alerts.1049277930 |
|
|
Jan 14 03:54:41 PM PST 24 |
Jan 14 04:01:48 PM PST 24 |
3713625616 ps |
| T407 |
/workspace/coverage/default/83.chip_sw_all_escalation_resets.1129646071 |
|
|
Jan 14 04:00:26 PM PST 24 |
Jan 14 04:09:46 PM PST 24 |
5661347266 ps |
| T763 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency.97642614 |
|
|
Jan 14 03:17:57 PM PST 24 |
Jan 14 04:12:02 PM PST 24 |
12662158072 ps |
| T764 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.2128207884 |
|
|
Jan 14 03:37:57 PM PST 24 |
Jan 14 03:47:43 PM PST 24 |
3274004320 ps |
| T765 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.2233419659 |
|
|
Jan 14 03:52:35 PM PST 24 |
Jan 14 04:16:15 PM PST 24 |
12915900941 ps |
| T766 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac.709798426 |
|
|
Jan 14 03:20:08 PM PST 24 |
Jan 14 03:25:08 PM PST 24 |
2842051854 ps |
| T435 |
/workspace/coverage/default/44.chip_sw_alert_handler_lpg_sleep_mode_alerts.1972350534 |
|
|
Jan 14 03:56:10 PM PST 24 |
Jan 14 04:01:47 PM PST 24 |
3596017184 ps |
| T375 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_aes.4101130949 |
|
|
Jan 14 03:46:30 PM PST 24 |
Jan 14 03:54:24 PM PST 24 |
4843337776 ps |
| T767 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod.1340920633 |
|
|
Jan 14 03:33:36 PM PST 24 |
Jan 14 04:09:26 PM PST 24 |
9031560032 ps |
| T437 |
/workspace/coverage/default/52.chip_sw_all_escalation_resets.2103686615 |
|
|
Jan 14 03:57:28 PM PST 24 |
Jan 14 04:07:22 PM PST 24 |
6128203032 ps |
| T404 |
/workspace/coverage/default/17.chip_sw_alert_handler_lpg_sleep_mode_alerts.2600566310 |
|
|
Jan 14 03:54:40 PM PST 24 |
Jan 14 04:01:39 PM PST 24 |
3980751238 ps |
| T768 |
/workspace/coverage/default/1.chip_sw_data_integrity_escalation.258640613 |
|
|
Jan 14 03:30:45 PM PST 24 |
Jan 14 03:41:39 PM PST 24 |
6900127216 ps |
| T769 |
/workspace/coverage/default/0.chip_sw_kmac_smoketest.1711193015 |
|
|
Jan 14 03:31:15 PM PST 24 |
Jan 14 03:36:26 PM PST 24 |
2924876840 ps |
| T770 |
/workspace/coverage/default/1.chip_sw_inject_scramble_seed.3203906930 |
|
|
Jan 14 03:30:35 PM PST 24 |
Jan 14 06:48:54 PM PST 24 |
66960723334 ps |
| T771 |
/workspace/coverage/default/0.chip_sw_gpio_smoketest.2932791808 |
|
|
Jan 14 03:30:57 PM PST 24 |
Jan 14 03:35:27 PM PST 24 |
3189932846 ps |
| T772 |
/workspace/coverage/default/0.rom_e2e_static_critical.4105066727 |
|
|
Jan 14 03:33:09 PM PST 24 |
Jan 14 04:14:33 PM PST 24 |
10902545660 ps |
| T34 |
/workspace/coverage/default/0.chip_sw_sleep_pin_retention.988181929 |
|
|
Jan 14 03:11:35 PM PST 24 |
Jan 14 03:16:10 PM PST 24 |
3186303344 ps |
| T488 |
/workspace/coverage/default/42.chip_sw_all_escalation_resets.3827387635 |
|
|
Jan 14 03:56:04 PM PST 24 |
Jan 14 04:04:59 PM PST 24 |
4730501620 ps |
| T208 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_program_error.3311220762 |
|
|
Jan 14 03:37:58 PM PST 24 |
Jan 14 03:45:14 PM PST 24 |
4853055560 ps |
| T773 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.970438533 |
|
|
Jan 14 03:39:07 PM PST 24 |
Jan 14 03:44:11 PM PST 24 |
3053116273 ps |
| T303 |
/workspace/coverage/default/1.chip_sw_rstmgr_alert_info.302353346 |
|
|
Jan 14 03:34:03 PM PST 24 |
Jan 14 04:06:40 PM PST 24 |
14864719910 ps |
| T135 |
/workspace/coverage/default/1.chip_sw_rom_ctrl_integrity_check.3039138350 |
|
|
Jan 14 03:35:22 PM PST 24 |
Jan 14 03:44:47 PM PST 24 |
9997055947 ps |
| T774 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation.2061193938 |
|
|
Jan 14 03:35:22 PM PST 24 |
Jan 14 03:43:08 PM PST 24 |
3290440960 ps |
| T775 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs.2601501196 |
|
|
Jan 14 03:47:02 PM PST 24 |
Jan 14 04:07:14 PM PST 24 |
6286498040 ps |
| T776 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_por_reset.496872358 |
|
|
Jan 14 03:14:56 PM PST 24 |
Jan 14 03:23:13 PM PST 24 |
7580095224 ps |
| T224 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_dev.3878838178 |
|
|
Jan 14 03:32:08 PM PST 24 |
Jan 14 04:19:06 PM PST 24 |
11964945864 ps |
| T777 |
/workspace/coverage/default/1.chip_sw_edn_kat.442938979 |
|
|
Jan 14 03:35:55 PM PST 24 |
Jan 14 03:46:30 PM PST 24 |
3504785074 ps |
| T778 |
/workspace/coverage/default/1.chip_sw_aes_masking_off.2800322598 |
|
|
Jan 14 03:34:56 PM PST 24 |
Jan 14 03:40:18 PM PST 24 |
3589743875 ps |
| T779 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_clkoff.188263009 |
|
|
Jan 14 03:17:26 PM PST 24 |
Jan 14 03:30:48 PM PST 24 |
5331855588 ps |
| T780 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_kmac_trans.40266148 |
|
|
Jan 14 03:47:33 PM PST 24 |
Jan 14 03:57:07 PM PST 24 |
5064084184 ps |
| T355 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_lockstep_glitch.3011979706 |
|
|
Jan 14 03:48:36 PM PST 24 |
Jan 14 03:52:08 PM PST 24 |
2313535552 ps |
| T781 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_inputs.3872868261 |
|
|
Jan 14 03:15:18 PM PST 24 |
Jan 14 03:21:01 PM PST 24 |
2484581342 ps |
| T782 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0.3430242653 |
|
|
Jan 14 03:31:22 PM PST 24 |
Jan 14 04:13:11 PM PST 24 |
10239877380 ps |
| T783 |
/workspace/coverage/default/1.chip_sw_csrng_lc_hw_debug_en_test.837847951 |
|
|
Jan 14 03:34:56 PM PST 24 |
Jan 14 03:44:41 PM PST 24 |
5294848911 ps |
| T459 |
/workspace/coverage/default/75.chip_sw_alert_handler_lpg_sleep_mode_alerts.2757573421 |
|
|
Jan 14 04:01:24 PM PST 24 |
Jan 14 04:09:26 PM PST 24 |
3726310408 ps |
| T43 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usbdev_smoketest.2114858084 |
|
|
Jan 14 03:31:21 PM PST 24 |
Jan 14 03:40:19 PM PST 24 |
5721725502 ps |
| T288 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx.897509485 |
|
|
Jan 14 03:30:58 PM PST 24 |
Jan 14 03:45:25 PM PST 24 |
4351158080 ps |
| T784 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.1622285816 |
|
|
Jan 14 03:25:24 PM PST 24 |
Jan 14 03:30:18 PM PST 24 |
3351855761 ps |
| T785 |
/workspace/coverage/default/1.chip_sw_sleep_pwm_pulses.40502038 |
|
|
Jan 14 03:31:30 PM PST 24 |
Jan 14 03:51:13 PM PST 24 |
7428263960 ps |
| T786 |
/workspace/coverage/default/64.chip_sw_alert_handler_lpg_sleep_mode_alerts.2596911470 |
|
|
Jan 14 03:59:02 PM PST 24 |
Jan 14 04:05:36 PM PST 24 |
4096890356 ps |
| T787 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_reset.3417939112 |
|
|
Jan 14 03:33:11 PM PST 24 |
Jan 14 04:08:08 PM PST 24 |
21466988434 ps |
| T788 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en.1686551441 |
|
|
Jan 14 03:18:46 PM PST 24 |
Jan 14 03:24:06 PM PST 24 |
3031477161 ps |
| T789 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en.175907903 |
|
|
Jan 14 03:34:34 PM PST 24 |
Jan 14 03:39:00 PM PST 24 |
2752933491 ps |
| T396 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_rand_to_scrap.2073211443 |
|
|
Jan 14 03:42:48 PM PST 24 |
Jan 14 03:45:18 PM PST 24 |
3151051365 ps |
| T790 |
/workspace/coverage/default/2.chip_sw_kmac_smoketest.889601505 |
|
|
Jan 14 03:50:50 PM PST 24 |
Jan 14 03:56:26 PM PST 24 |
2935023712 ps |
| T791 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock.636911373 |
|
|
Jan 14 03:31:55 PM PST 24 |
Jan 14 03:37:39 PM PST 24 |
3724320380 ps |
| T792 |
/workspace/coverage/default/0.chip_tap_straps_testunlock0.3855626895 |
|
|
Jan 14 03:24:29 PM PST 24 |
Jan 14 03:33:22 PM PST 24 |
5573830238 ps |
| T409 |
/workspace/coverage/default/20.chip_sw_alert_handler_lpg_sleep_mode_alerts.1137947735 |
|
|
Jan 14 03:54:21 PM PST 24 |
Jan 14 04:01:21 PM PST 24 |
4191856216 ps |
| T793 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_idle_low_power.1301571824 |
|
|
Jan 14 03:12:25 PM PST 24 |
Jan 14 03:19:50 PM PST 24 |
3124554426 ps |
| T794 |
/workspace/coverage/default/10.chip_sw_lc_ctrl_transition.2398772507 |
|
|
Jan 14 03:54:03 PM PST 24 |
Jan 14 04:02:39 PM PST 24 |
5468533538 ps |
| T196 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_lc_rw_en.929667170 |
|
|
Jan 14 03:41:39 PM PST 24 |
Jan 14 03:50:36 PM PST 24 |
5002710656 ps |
| T450 |
/workspace/coverage/default/76.chip_sw_alert_handler_lpg_sleep_mode_alerts.4080260942 |
|
|
Jan 14 03:59:00 PM PST 24 |
Jan 14 04:05:42 PM PST 24 |
3773702048 ps |
| T118 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.3544121546 |
|
|
Jan 14 03:36:40 PM PST 24 |
Jan 14 03:42:40 PM PST 24 |
4961167640 ps |
| T795 |
/workspace/coverage/default/2.chip_sw_entropy_src_kat_test.521077468 |
|
|
Jan 14 03:45:59 PM PST 24 |
Jan 14 03:50:33 PM PST 24 |
3056324800 ps |
| T796 |
/workspace/coverage/default/37.chip_sw_alert_handler_lpg_sleep_mode_alerts.1180319077 |
|
|
Jan 14 03:55:49 PM PST 24 |
Jan 14 04:02:47 PM PST 24 |
3562519680 ps |
| T504 |
/workspace/coverage/default/39.chip_sw_all_escalation_resets.1938268625 |
|
|
Jan 14 03:55:48 PM PST 24 |
Jan 14 04:06:08 PM PST 24 |
5153181768 ps |
| T797 |
/workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en.1627829450 |
|
|
Jan 14 03:46:27 PM PST 24 |
Jan 14 03:52:15 PM PST 24 |
3139162437 ps |
| T798 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_lc_escalate.2656829761 |
|
|
Jan 14 03:34:08 PM PST 24 |
Jan 14 03:46:53 PM PST 24 |
5554277852 ps |
| T799 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_pings.3494561820 |
|
|
Jan 14 03:34:07 PM PST 24 |
Jan 14 03:53:08 PM PST 24 |
9873748074 ps |
| T467 |
/workspace/coverage/default/15.chip_sw_alert_handler_lpg_sleep_mode_alerts.1087387921 |
|
|
Jan 14 03:54:05 PM PST 24 |
Jan 14 03:59:20 PM PST 24 |
3369861756 ps |
| T442 |
/workspace/coverage/default/84.chip_sw_alert_handler_lpg_sleep_mode_alerts.895490452 |
|
|
Jan 14 03:59:47 PM PST 24 |
Jan 14 04:05:41 PM PST 24 |
3879273560 ps |
| T483 |
/workspace/coverage/default/88.chip_sw_alert_handler_lpg_sleep_mode_alerts.1578948911 |
|
|
Jan 14 03:59:31 PM PST 24 |
Jan 14 04:04:56 PM PST 24 |
3432334756 ps |
| T119 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.4278589117 |
|
|
Jan 14 03:22:47 PM PST 24 |
Jan 14 03:30:15 PM PST 24 |
4988232700 ps |
| T800 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_outputs.4099024188 |
|
|
Jan 14 03:15:24 PM PST 24 |
Jan 14 03:21:16 PM PST 24 |
3944434638 ps |
| T166 |
/workspace/coverage/default/1.chip_plic_all_irqs_10.1397376255 |
|
|
Jan 14 03:36:49 PM PST 24 |
Jan 14 03:46:06 PM PST 24 |
4544728032 ps |
| T307 |
/workspace/coverage/default/1.chip_sw_i2c_device_tx_rx.1580271013 |
|
|
Jan 14 03:31:36 PM PST 24 |
Jan 14 03:42:04 PM PST 24 |
4203792704 ps |
| T801 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_prod.2962526409 |
|
|
Jan 14 03:42:29 PM PST 24 |
Jan 14 04:07:22 PM PST 24 |
8819708632 ps |
| T8 |
/workspace/coverage/default/1.chip_sw_sleep_pin_mio_dio_val.2113290184 |
|
|
Jan 14 03:32:40 PM PST 24 |
Jan 14 03:36:19 PM PST 24 |
2734345436 ps |
| T802 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_clkoff.1420769097 |
|
|
Jan 14 03:45:17 PM PST 24 |
Jan 14 04:10:52 PM PST 24 |
6399949378 ps |
| T803 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0.2232637233 |
|
|
Jan 14 03:32:13 PM PST 24 |
Jan 14 04:13:41 PM PST 24 |
10159235650 ps |
| T367 |
/workspace/coverage/default/2.chip_sw_edn_auto_mode.3289215332 |
|
|
Jan 14 03:46:13 PM PST 24 |
Jan 14 04:13:03 PM PST 24 |
7219358794 ps |
| T9 |
/workspace/coverage/default/2.chip_sw_sleep_pin_mio_dio_val.2363173371 |
|
|
Jan 14 03:40:49 PM PST 24 |
Jan 14 03:45:18 PM PST 24 |
3083029546 ps |
| T804 |
/workspace/coverage/default/2.chip_sw_kmac_entropy.177121897 |
|
|
Jan 14 03:43:19 PM PST 24 |
Jan 14 03:47:39 PM PST 24 |
2527670096 ps |
| T805 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en.635806807 |
|
|
Jan 14 03:30:54 PM PST 24 |
Jan 14 03:45:44 PM PST 24 |
5408277911 ps |
| T432 |
/workspace/coverage/default/79.chip_sw_all_escalation_resets.1529968112 |
|
|
Jan 14 04:00:09 PM PST 24 |
Jan 14 04:08:05 PM PST 24 |
4291630250 ps |
| T806 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en.3287023023 |
|
|
Jan 14 03:47:08 PM PST 24 |
Jan 14 03:56:28 PM PST 24 |
3933610450 ps |
| T807 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_dev.1178614226 |
|
|
Jan 14 03:32:38 PM PST 24 |
Jan 14 04:05:32 PM PST 24 |
8932702290 ps |
| T115 |
/workspace/coverage/default/2.chip_sw_csrng_edn_concurrency_reduced_freq.4049415498 |
|
|
Jan 14 03:50:45 PM PST 24 |
Jan 14 04:22:48 PM PST 24 |
12989869806 ps |
| T808 |
/workspace/coverage/default/2.chip_sw_example_concurrency.160236887 |
|
|
Jan 14 03:41:01 PM PST 24 |
Jan 14 03:44:43 PM PST 24 |
3031469292 ps |
| T809 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en.2316801076 |
|
|
Jan 14 03:35:41 PM PST 24 |
Jan 14 03:46:22 PM PST 24 |
5653086270 ps |
| T810 |
/workspace/coverage/default/3.chip_sw_uart_rand_baudrate.2784198782 |
|
|
Jan 14 03:52:37 PM PST 24 |
Jan 14 04:54:05 PM PST 24 |
22989718648 ps |
| T386 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_otbn.304583205 |
|
|
Jan 14 03:19:46 PM PST 24 |
Jan 14 04:38:09 PM PST 24 |
16807457524 ps |
| T811 |
/workspace/coverage/default/0.chip_sw_kmac_app_rom.1891490941 |
|
|
Jan 14 03:20:32 PM PST 24 |
Jan 14 03:23:21 PM PST 24 |
2230413170 ps |
| T812 |
/workspace/coverage/default/1.chip_sw_rstmgr_rst_cnsty_escalation.2768669280 |
|
|
Jan 14 03:31:06 PM PST 24 |
Jan 14 03:41:34 PM PST 24 |
5469048424 ps |
| T813 |
/workspace/coverage/default/12.chip_sw_uart_rand_baudrate.154890839 |
|
|
Jan 14 03:53:30 PM PST 24 |
Jan 14 04:35:42 PM PST 24 |
14122523780 ps |
| T814 |
/workspace/coverage/default/2.chip_sw_kmac_idle.3059985299 |
|
|
Jan 14 03:47:46 PM PST 24 |
Jan 14 03:52:36 PM PST 24 |
3593703324 ps |
| T815 |
/workspace/coverage/default/0.chip_sw_rom_ctrl_integrity_check.1745138416 |
|
|
Jan 14 03:21:02 PM PST 24 |
Jan 14 03:30:38 PM PST 24 |
9195825733 ps |
| T438 |
/workspace/coverage/default/24.chip_sw_all_escalation_resets.1888268256 |
|
|
Jan 14 03:54:55 PM PST 24 |
Jan 14 04:05:59 PM PST 24 |
4758419616 ps |
| T816 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.4140622923 |
|
|
Jan 14 03:37:14 PM PST 24 |
Jan 14 03:47:09 PM PST 24 |
4969343494 ps |
| T817 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en.2253936817 |
|
|
Jan 14 03:43:35 PM PST 24 |
Jan 14 04:00:50 PM PST 24 |
6040855253 ps |
| T299 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.1496782009 |
|
|
Jan 14 03:48:47 PM PST 24 |
Jan 14 04:03:37 PM PST 24 |
5858347439 ps |
| T818 |
/workspace/coverage/default/0.chip_sw_power_idle_load.4276476511 |
|
|
Jan 14 03:27:00 PM PST 24 |
Jan 14 03:38:47 PM PST 24 |
4525444700 ps |
| T141 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through_collision.1767381479 |
|
|
Jan 14 03:13:36 PM PST 24 |
Jan 14 03:21:23 PM PST 24 |
4551726226 ps |
| T819 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_otbn_trans.946809797 |
|
|
Jan 14 03:23:05 PM PST 24 |
Jan 14 03:31:14 PM PST 24 |
5261213208 ps |
| T820 |
/workspace/coverage/default/64.chip_sw_all_escalation_resets.3139749576 |
|
|
Jan 14 03:58:24 PM PST 24 |
Jan 14 04:06:45 PM PST 24 |
4937417640 ps |
| T430 |
/workspace/coverage/default/12.chip_sw_alert_handler_lpg_sleep_mode_alerts.1248476466 |
|
|
Jan 14 03:54:06 PM PST 24 |
Jan 14 04:00:54 PM PST 24 |
3665922020 ps |
| T486 |
/workspace/coverage/default/75.chip_sw_all_escalation_resets.664551218 |
|
|
Jan 14 03:59:49 PM PST 24 |
Jan 14 04:10:04 PM PST 24 |
5318673624 ps |
| T821 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx1.878013034 |
|
|
Jan 14 03:11:50 PM PST 24 |
Jan 14 03:29:09 PM PST 24 |
5710611750 ps |
| T822 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_rma.2174150728 |
|
|
Jan 14 03:32:27 PM PST 24 |
Jan 14 04:23:12 PM PST 24 |
11152648591 ps |
| T823 |
/workspace/coverage/default/2.chip_sw_csrng_edn_concurrency.1716179348 |
|
|
Jan 14 03:45:40 PM PST 24 |
Jan 14 04:17:50 PM PST 24 |
8463398788 ps |
| T824 |
/workspace/coverage/default/1.chip_sw_otbn_smoketest.1111616524 |
|
|
Jan 14 03:42:20 PM PST 24 |
Jan 14 04:17:25 PM PST 24 |
9118238790 ps |