Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.alert_handler_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	141827	1			T31	87		T32	101		T53	91
values[2]	12178	1			T32	2		T53	1		T102	2
values[3]	4500	1			T102	1		T384	1		T369	54
values[4]	2407	1			T369	20		T338	1		T502	64
values[5]	1404	1			T369	15		T338	4		T502	20
values[6]	926	1			T369	2		T338	2		T502	10
values[7]	686	1			T338	2		T502	3		T743	1
values[8]	474	1			T338	1		T502	3		T743	1
values[9]	417	1			T338	3		T502	2		T743	1
values[10]	302	1			T338	1		T502	2		T743	1
values[11]	307	1			T338	3		T743	1		T406	5
values[12]	235	1			T338	1		T743	1		T406	12
values[13]	214	1			T338	3		T743	1		T406	4
values[14]	262	1			T338	5		T743	1		T406	3
values[15]	229	1			T338	4		T743	1		T406	5
values[16]	271	1			T338	1		T743	1		T406	6
values[17]	261	1			T338	2		T743	1		T406	6
values[18]	216	1			T338	4		T743	1		T406	6
values[19]	213	1			T338	2		T743	1		T406	5
values[20]	187	1			T338	1		T743	1		T406	11
values[21]	254	1			T338	3		T743	1		T406	23
values[22]	188	1			T338	6		T743	1		T406	6
values[23]	201	1			T338	1		T743	1		T406	4
values[24]	207	1			T338	3		T743	1		T406	7
values[25]	265	1			T338	7		T743	1		T406	5
values[26]	227	1			T338	8		T743	1		T406	10
values[27]	267	1			T338	5		T743	1		T406	5
values[28]	293	1			T338	6		T743	1		T406	7
values[29]	291	1			T338	11		T743	1		T406	13
values[30]	233	1			T338	7		T743	1		T406	8
values[31]	274	1			T338	6		T743	1		T406	9
values[32]	217	1			T338	6		T743	1		T406	3
values[33]	250	1			T338	2		T743	1		T406	5
values[34]	225	1			T338	5		T743	1		T406	4
values[35]	207	1			T338	2		T743	1		T406	5
values[36]	220	1			T338	8		T743	1		T406	4
values[37]	224	1			T338	1		T743	1		T406	9
values[38]	231	1			T338	6		T743	1		T406	19
values[39]	206	1			T338	5		T743	1		T406	12
values[40]	196	1			T338	2		T743	1		T406	11
values[41]	217	1			T338	2		T743	1		T406	4
values[42]	284	1			T338	1		T743	1		T406	7
values[43]	205	1			T338	1		T743	1		T406	5
values[44]	217	1			T338	4		T743	1		T406	5
values[45]	204	1			T338	2		T743	1		T406	4
values[46]	262	1			T338	5		T743	1		T406	7
values[47]	224	1			T338	5		T743	1		T744	1
values[48]	212	1			T338	3		T743	1		T744	1
values[49]	218	1			T338	1		T743	1		T744	1
values[50]	211	1			T338	2		T743	1		T744	1
values[51]	211	1			T338	4		T743	1		T744	1
values[52]	232	1			T338	1		T743	1		T744	1
values[53]	178	1			T338	2		T743	1		T744	1
values[54]	200	1			T338	3		T743	1		T744	1
values[55]	189	1			T338	2		T743	2		T744	1
values[56]	175	1			T338	6		T743	1		T744	1
values[57]	140	1			T338	3		T743	1		T744	1
values[58]	184	1			T338	2		T743	1		T744	1
values[59]	178	1			T338	3		T743	1		T744	1
values[60]	207	1			T338	7		T743	1		T744	1
values[61]	184	1			T338	7		T743	1		T744	1
values[62]	148	1			T338	3		T743	1		T744	1
values[63]	160	1			T338	2		T743	1		T744	1
values[64]	147	1			T338	5		T743	1		T744	1
values[65]	138	1			T338	11		T743	1		T744	1
values[66]	107	1			T338	2		T743	1		T744	1
values[67]	108	1			T338	3		T743	1		T744	1
values[68]	83	1			T338	2		T743	1		T744	1
values[69]	73	1			T338	3		T743	1		T744	1
values[70]	72	1			T338	1		T743	1		T744	1
values[71]	71	1			T338	2		T743	1		T744	1
values[72]	88	1			T338	7		T743	1		T744	1
values[73]	87	1			T338	4		T743	1		T744	1
values[74]	74	1			T338	2		T743	1		T744	1
values[75]	77	1			T338	1		T743	1		T744	1
values[76]	80	1			T338	4		T743	1		T744	1
values[77]	73	1			T338	1		T743	1		T744	1
values[78]	89	1			T743	1		T744	1		T470	14
values[79]	82	1			T743	1		T744	1		T470	14
values[80]	88	1			T743	1		T744	1		T470	11
values[81]	89	1			T743	1		T744	1		T470	16
values[82]	88	1			T743	1		T744	1		T470	19
values[83]	96	1			T743	1		T744	1		T470	6
values[84]	87	1			T743	1		T744	1		T470	7
values[85]	97	1			T743	1		T744	2		T470	15
values[86]	105	1			T743	1		T744	1		T470	17
values[87]	71	1			T743	2		T744	2		T470	15
values[88]	83	1			T743	10		T744	4		T470	12
values[89]	87	1			T743	1		T744	6		T470	10
values[90]	80	1			T743	1		T744	1		T470	13
values[91]	78	1			T743	5		T744	2		T470	12
values[92]	90	1			T743	1		T744	11		T470	9
values[93]	71	1			T743	3		T744	4		T470	7
values[94]	97	1			T743	1		T744	4		T470	11
values[95]	89	1			T743	1		T744	2		T470	5
values[96]	85	1			T743	1		T744	2		T470	9
values[97]	79	1			T743	1		T744	3		T470	6
values[98]	71	1			T743	3		T744	5		T470	10
values[99]	78	1			T743	7		T744	1		T470	12
values[100]	72	1			T743	2		T744	2		T470	7
values[101]	93	1			T743	1		T744	3		T470	16
values[102]	63	1			T743	1		T744	2		T470	13
values[103]	56	1			T743	1		T744	5		T470	6
values[104]	61	1			T743	1		T744	2		T470	8
values[105]	75	1			T743	1		T744	3		T470	15
values[106]	83	1			T743	3		T744	1		T470	10
values[107]	69	1			T743	2		T744	2		T470	26
values[108]	89	1			T743	1		T744	2		T470	18
values[109]	68	1			T743	3		T744	2		T470	8
values[110]	74	1			T743	8		T744	1		T470	11
values[111]	78	1			T743	1		T744	2		T470	14
values[112]	74	1			T743	1		T744	2		T470	26
values[113]	64	1			T743	2		T744	4		T470	8
values[114]	62	1			T743	4		T744	3		T470	6
values[115]	56	1			T743	3		T744	3		T470	4
values[116]	48	1			T743	3		T744	1		T470	3
values[117]	63	1			T743	1		T744	3		T470	2
values[118]	61	1			T743	1		T744	2		T470	3
values[119]	70	1			T743	1		T744	7		T470	1
values[120]	77	1			T743	2		T744	2		T470	5
values[121]	70	1			T743	1		T744	1		T470	10
values[122]	73	1			T743	2		T744	2		T470	10
values[123]	67	1			T743	1		T744	2		T470	2
values[124]	70	1			T743	1		T744	3		T470	2
values[125]	71	1			T743	1		T744	2		T470	3
values[126]	112	1			T743	5		T744	4		T470	1
values[127]	765	1			T743	33		T744	16		T745	29
values[128]	6390	1			T743	259		T744	269		T745	250

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	153355	1			T31	91		T32	102		T53	92
values[2]	4778	1			T32	2		T102	2		T386	1
values[3]	2337	1			T102	5		T384	1		T387	30
values[4]	1663	1			T102	3		T387	39		T369	53
values[5]	1288	1			T102	2		T387	13		T369	59
values[6]	1050	1			T102	1		T387	15		T369	68
values[7]	1012	1			T102	4		T387	11		T369	58
values[8]	957	1			T102	1		T387	27		T369	38
values[9]	992	1			T102	1		T387	52		T369	35
values[10]	872	1			T102	2		T387	61		T369	25
values[11]	828	1			T102	3		T387	34		T369	20
values[12]	721	1			T102	6		T387	26		T369	19
values[13]	629	1			T102	3		T387	12		T369	20
values[14]	455	1			T102	2		T387	20		T369	14
values[15]	370	1			T102	3		T387	29		T369	12
values[16]	316	1			T102	1		T387	17		T369	20
values[17]	257	1			T102	3		T387	4		T369	35
values[18]	247	1			T102	2		T387	2		T369	20
values[19]	199	1			T102	1		T369	7		T743	1
values[20]	190	1			T102	2		T369	9		T743	1
values[21]	159	1			T102	3		T369	9		T743	1
values[22]	177	1			T102	5		T369	6		T743	1
values[23]	136	1			T102	3		T369	19		T743	1
values[24]	217	1			T102	2		T369	32		T743	1
values[25]	230	1			T102	1		T369	29		T743	1
values[26]	227	1			T102	3		T369	35		T743	1
values[27]	181	1			T102	4		T369	35		T743	1
values[28]	178	1			T102	1		T369	28		T743	1
values[29]	157	1			T102	2		T369	17		T743	1
values[30]	158	1			T102	1		T369	11		T743	1
values[31]	142	1			T102	2		T369	9		T743	1
values[32]	105	1			T102	4		T369	2		T743	1
values[33]	90	1			T102	2		T743	1		T443	1
values[34]	94	1			T102	3		T743	1		T443	1
values[35]	83	1			T102	10		T743	1		T443	1
values[36]	76	1			T102	5		T743	1		T443	1
values[37]	65	1			T102	1		T743	1		T443	1
values[38]	63	1			T102	1		T743	1		T443	1
values[39]	48	1			T102	3		T743	1		T443	1
values[40]	68	1			T102	2		T743	1		T443	1
values[41]	54	1			T102	2		T743	1		T443	1
values[42]	65	1			T102	2		T743	1		T443	1
values[43]	70	1			T102	2		T743	1		T443	1
values[44]	65	1			T102	2		T743	1		T443	1
values[45]	66	1			T102	3		T743	1		T443	1
values[46]	57	1			T102	1		T743	1		T443	1
values[47]	67	1			T102	4		T743	1		T443	1
values[48]	61	1			T102	3		T743	1		T443	1
values[49]	53	1			T102	2		T743	1		T443	1
values[50]	57	1			T102	2		T743	1		T443	1
values[51]	52	1			T102	4		T743	1		T443	1
values[52]	45	1			T102	6		T743	2		T443	1
values[53]	44	1			T102	1		T743	1		T443	1
values[54]	37	1			T102	2		T743	1		T443	1
values[55]	34	1			T102	2		T743	1		T443	1
values[56]	37	1			T102	6		T743	1		T443	1
values[57]	36	1			T102	1		T743	1		T443	1
values[58]	35	1			T102	4		T743	1		T443	1
values[59]	36	1			T102	1		T743	1		T443	2
values[60]	37	1			T102	1		T743	1		T443	1
values[61]	35	1			T102	4		T743	1		T443	1
values[62]	38	1			T102	2		T743	1		T443	1
values[63]	39	1			T102	2		T743	1		T443	1
values[64]	37	1			T102	3		T743	1		T443	1
values[65]	35	1			T102	2		T743	1		T443	1
values[66]	30	1			T102	1		T743	1		T443	1
values[67]	42	1			T102	4		T743	1		T443	1
values[68]	31	1			T102	1		T743	1		T443	1
values[69]	44	1			T102	1		T743	1		T443	2
values[70]	46	1			T102	1		T743	1		T443	11
values[71]	43	1			T102	2		T743	1		T443	10
values[72]	38	1			T102	3		T743	1		T443	1
values[73]	35	1			T102	2		T743	1		T443	2
values[74]	32	1			T102	2		T743	1		T443	3
values[75]	29	1			T102	1		T743	1		T443	2
values[76]	38	1			T102	1		T743	1		T443	2
values[77]	37	1			T102	2		T743	1		T443	1
values[78]	38	1			T102	1		T743	1		T443	2
values[79]	41	1			T102	2		T743	1		T443	5
values[80]	45	1			T102	3		T743	1		T443	2
values[81]	45	1			T102	3		T743	1		T443	5
values[82]	40	1			T102	3		T743	1		T443	3
values[83]	46	1			T102	6		T743	1		T443	1
values[84]	54	1			T102	4		T743	1		T443	4
values[85]	44	1			T102	5		T743	1		T443	2
values[86]	39	1			T102	3		T743	1		T443	3
values[87]	51	1			T102	11		T743	1		T443	2
values[88]	44	1			T102	9		T743	1		T443	3
values[89]	45	1			T102	3		T743	1		T443	2
values[90]	51	1			T102	1		T743	1		T443	1
values[91]	51	1			T102	4		T743	1		T443	3
values[92]	58	1			T102	4		T743	1		T443	6
values[93]	49	1			T102	4		T743	1		T443	2
values[94]	59	1			T102	5		T743	1		T443	3
values[95]	44	1			T102	2		T743	1		T443	3
values[96]	55	1			T102	5		T743	1		T443	5
values[97]	54	1			T102	6		T743	1		T443	1
values[98]	45	1			T102	4		T743	1		T443	2
values[99]	58	1			T102	8		T743	1		T443	3
values[100]	58	1			T102	3		T743	1		T443	3
values[101]	51	1			T102	5		T743	1		T443	4
values[102]	57	1			T102	6		T743	1		T443	5
values[103]	45	1			T102	3		T743	1		T443	3
values[104]	51	1			T102	1		T743	1		T443	1
values[105]	59	1			T102	6		T743	1		T443	1
values[106]	51	1			T102	4		T743	1		T443	3
values[107]	60	1			T102	1		T743	1		T443	5
values[108]	61	1			T102	4		T743	1		T443	3
values[109]	68	1			T102	3		T743	1		T443	2
values[110]	84	1			T102	7		T743	2		T443	1
values[111]	69	1			T102	2		T743	1		T443	1
values[112]	73	1			T102	4		T743	1		T443	4
values[113]	78	1			T102	8		T743	1		T443	2
values[114]	76	1			T102	10		T743	1		T443	2
values[115]	88	1			T102	3		T743	3		T443	1
values[116]	75	1			T102	7		T743	1		T443	1
values[117]	65	1			T102	3		T743	4		T443	1
values[118]	68	1			T102	1		T743	2		T443	2
values[119]	70	1			T102	5		T743	4		T443	1
values[120]	84	1			T102	13		T743	1		T443	1
values[121]	64	1			T102	7		T743	2		T443	1
values[122]	69	1			T102	3		T743	1		T443	2
values[123]	90	1			T102	3		T743	1		T443	2
values[124]	112	1			T102	9		T743	2		T443	4
values[125]	227	1			T102	41		T743	1		T443	1
values[126]	529	1			T102	29		T743	34		T443	5
values[127]	2312	1			T102	17		T743	160		T443	78
values[128]	4305	1			T743	237		T443	189		T746	191

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	138218	1			T31	82		T32	96		T53	75
values[2]	8325	1			T32	7		T102	2		T386	1
values[3]	3144	1			T369	140		T502	1		T650	7
values[4]	1954	1			T369	71		T650	6		T451	3
values[5]	1190	1			T369	34		T650	6		T451	1
values[6]	913	1			T369	7		T650	2		T451	4
values[7]	706	1			T369	7		T650	6		T451	1
values[8]	594	1			T369	11		T650	16		T451	1
values[9]	471	1			T369	5		T650	16		T451	4
values[10]	408	1			T369	1		T650	7		T451	3
values[11]	333	1			T650	5		T451	1		T413	10
values[12]	359	1			T650	3		T451	5		T413	3
values[13]	333	1			T650	5		T451	6		T413	7
values[14]	363	1			T650	12		T451	3		T413	5
values[15]	333	1			T650	5		T451	9		T413	7
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values[121]	45	1			T451	4		T462	1		T747	2
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