Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.rv_dm__regs_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	164142	1			T29	52		T30	75		T31	8
values[2]	4938	1			T30	1		T31	1		T60	2
values[3]	2359	1			T357	1		T356	1		T430	10
values[4]	1824	1			T356	1		T430	12		T505	81
values[5]	1457	1			T356	1		T430	22		T505	61
values[6]	1198	1			T356	1		T430	13		T505	43
values[7]	1114	1			T356	1		T430	10		T505	21
values[8]	1100	1			T356	1		T430	9		T505	11
values[9]	1009	1			T356	1		T430	2		T505	11
values[10]	902	1			T356	1		T430	4		T505	5
values[11]	792	1			T356	1		T430	4		T505	8
values[12]	769	1			T356	1		T430	10		T505	15
values[13]	697	1			T356	1		T430	5		T505	12
values[14]	570	1			T356	1		T430	9		T505	8
values[15]	519	1			T356	1		T430	7		T505	16
values[16]	403	1			T356	1		T430	6		T505	21
values[17]	439	1			T356	1		T430	8		T505	30
values[18]	375	1			T356	1		T430	9		T505	24
values[19]	338	1			T356	1		T430	3		T505	24
values[20]	293	1			T356	1		T430	8		T505	14
values[21]	291	1			T356	1		T430	10		T505	14
values[22]	240	1			T356	1		T430	4		T505	10
values[23]	205	1			T356	1		T430	3		T505	6
values[24]	212	1			T356	2		T430	11		T505	3
values[25]	193	1			T356	1		T430	7		T505	2
values[26]	146	1			T356	1		T430	8		T505	2
values[27]	144	1			T356	1		T430	10		T505	2
values[28]	109	1			T356	1		T430	10		T505	4
values[29]	114	1			T356	1		T430	10		T505	1
values[30]	99	1			T356	1		T430	8		T505	1
values[31]	98	1			T356	1		T430	3		T505	2
values[32]	92	1			T356	1		T430	3		T505	1
values[33]	95	1			T356	1		T430	3		T505	2
values[34]	78	1			T356	1		T430	7		T505	2
values[35]	79	1			T356	1		T430	4		T505	4
values[36]	58	1			T356	1		T430	4		T505	1
values[37]	64	1			T356	1		T430	6		T505	1
values[38]	68	1			T356	1		T430	14		T505	4
values[39]	70	1			T356	1		T430	13		T505	5
values[40]	73	1			T356	1		T430	8		T505	6
values[41]	101	1			T356	1		T430	8		T505	2
values[42]	83	1			T356	1		T430	5		T505	1
values[43]	57	1			T356	1		T430	3		T505	1
values[44]	48	1			T356	1		T430	2		T505	4
values[45]	45	1			T356	1		T430	2		T505	6
values[46]	55	1			T356	1		T430	1		T505	1
values[47]	54	1			T356	1		T430	2		T505	1
values[48]	61	1			T356	1		T430	7		T505	4
values[49]	61	1			T356	1		T430	5		T505	4
values[50]	57	1			T356	1		T430	1		T505	3
values[51]	49	1			T356	1		T430	2		T505	1
values[52]	45	1			T356	1		T430	1		T505	4
values[53]	52	1			T356	1		T430	1		T505	6
values[54]	58	1			T356	1		T430	1		T505	12
values[55]	55	1			T356	1		T430	1		T505	5
values[56]	56	1			T356	1		T430	4		T505	1
values[57]	58	1			T356	1		T430	3		T505	2
values[58]	48	1			T356	1		T430	2		T505	4
values[59]	51	1			T356	1		T430	1		T505	2
values[60]	50	1			T356	1		T430	1		T505	3
values[61]	60	1			T356	1		T430	4		T505	3
values[62]	49	1			T356	1		T430	1		T505	1
values[63]	43	1			T356	1		T430	1		T505	2
values[64]	49	1			T356	1		T430	3		T505	2
values[65]	44	1			T356	1		T430	2		T505	2
values[66]	53	1			T356	1		T430	2		T505	2
values[67]	62	1			T356	1		T430	3		T505	2
values[68]	51	1			T356	1		T430	3		T505	1
values[69]	51	1			T356	1		T430	2		T505	3
values[70]	56	1			T356	1		T430	4		T505	3
values[71]	49	1			T356	1		T430	2		T505	3
values[72]	57	1			T356	1		T430	1		T505	1
values[73]	64	1			T356	1		T430	1		T505	3
values[74]	74	1			T356	1		T430	1		T505	3
values[75]	80	1			T356	1		T430	2		T505	2
values[76]	72	1			T356	1		T430	2		T505	2
values[77]	60	1			T356	1		T430	1		T505	4
values[78]	68	1			T356	1		T430	9		T505	3
values[79]	62	1			T356	1		T430	5		T505	4
values[80]	65	1			T356	1		T430	2		T505	2
values[81]	64	1			T356	1		T430	8		T505	1
values[82]	68	1			T356	1		T430	9		T505	3
values[83]	69	1			T356	3		T430	6		T505	4
values[84]	60	1			T356	4		T430	5		T505	3
values[85]	63	1			T356	5		T430	6		T505	2
values[86]	73	1			T356	7		T430	7		T505	3
values[87]	61	1			T356	4		T430	5		T505	2
values[88]	80	1			T356	5		T430	6		T505	3
values[89]	68	1			T356	2		T430	3		T505	4
values[90]	80	1			T356	3		T430	4		T505	6
values[91]	91	1			T356	6		T430	5		T505	3
values[92]	85	1			T356	6		T430	3		T505	1
values[93]	81	1			T356	2		T430	4		T505	2
values[94]	76	1			T356	1		T430	5		T505	1
values[95]	87	1			T356	1		T430	4		T505	1
values[96]	82	1			T356	3		T430	3		T505	2
values[97]	74	1			T356	1		T430	5		T505	2
values[98]	91	1			T356	2		T430	3		T505	7
values[99]	87	1			T356	1		T430	6		T505	4
values[100]	84	1			T356	1		T430	4		T505	1
values[101]	80	1			T356	8		T430	2		T505	2
values[102]	92	1			T356	1		T430	5		T505	1
values[103]	83	1			T356	3		T430	9		T505	3
values[104]	83	1			T356	3		T430	7		T505	2
values[105]	83	1			T356	2		T430	3		T505	3
values[106]	86	1			T356	1		T430	2		T505	4
values[107]	93	1			T356	1		T430	3		T505	4
values[108]	87	1			T356	1		T430	8		T505	1
values[109]	113	1			T356	2		T430	14		T505	6
values[110]	97	1			T356	1		T430	12		T505	7
values[111]	118	1			T356	2		T430	12		T505	12
values[112]	98	1			T356	1		T430	10		T505	11
values[113]	94	1			T356	3		T430	10		T505	11
values[114]	118	1			T356	3		T430	4		T505	15
values[115]	117	1			T356	3		T430	3		T505	7
values[116]	105	1			T356	1		T430	1		T505	9
values[117]	107	1			T356	2		T430	2		T505	16
values[118]	92	1			T356	3		T430	4		T505	6
values[119]	102	1			T356	3		T430	6		T505	5
values[120]	113	1			T356	3		T430	5		T505	7
values[121]	87	1			T356	1		T430	6		T505	3
values[122]	96	1			T356	1		T430	3		T505	8
values[123]	101	1			T356	1		T430	3		T505	13
values[124]	167	1			T356	3		T430	7		T505	14
values[125]	331	1			T356	2		T430	19		T505	33
values[126]	724	1			T356	8		T430	38		T505	40
values[127]	2464	1			T356	98		T430	24		T505	24
values[128]	4271	1			T356	219		T430	1		T505	2