Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.rom_ctrl__regs_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	159914	1			T32	7		T33	56		T34	7
values[2]	3971	1			T55	41		T104	1		T187	3
values[3]	1954	1			T55	45		T360	142		T348	15
values[4]	1559	1			T55	26		T360	120		T348	10
values[5]	1133	1			T55	42		T360	63		T730	2
values[6]	944	1			T55	32		T360	43		T730	6
values[7]	869	1			T55	57		T360	21		T730	8
values[8]	711	1			T55	42		T360	25		T730	12
values[9]	603	1			T55	17		T360	21		T730	25
values[10]	539	1			T55	23		T360	40		T730	31
values[11]	404	1			T55	19		T360	17		T730	31
values[12]	399	1			T55	26		T360	15		T730	19
values[13]	361	1			T55	25		T360	10		T730	11
values[14]	311	1			T55	19		T730	2		T432	2
values[15]	303	1			T55	5		T730	4		T432	2
values[16]	354	1			T730	3		T432	2		T739	1
values[17]	353	1			T730	2		T432	9		T739	1
values[18]	363	1			T730	5		T432	9		T739	1
values[19]	285	1			T730	9		T432	3		T739	1
values[20]	229	1			T730	3		T432	1		T739	1
values[21]	255	1			T730	10		T432	6		T739	1
values[22]	250	1			T730	5		T432	3		T739	1
values[23]	239	1			T730	3		T432	6		T739	1
values[24]	212	1			T730	5		T432	2		T739	1
values[25]	224	1			T730	20		T432	2		T739	1
values[26]	244	1			T730	8		T432	6		T739	1
values[27]	228	1			T730	9		T432	3		T739	1
values[28]	174	1			T730	7		T432	3		T739	1
values[29]	153	1			T730	13		T432	2		T739	1
values[30]	152	1			T730	23		T432	1		T739	1
values[31]	157	1			T730	27		T432	1		T739	1
values[32]	163	1			T730	27		T432	2		T739	1
values[33]	142	1			T730	27		T432	2		T739	1
values[34]	182	1			T730	39		T432	2		T739	1
values[35]	176	1			T730	29		T432	3		T739	1
values[36]	146	1			T730	20		T432	1		T739	1
values[37]	159	1			T730	14		T432	4		T739	1
values[38]	122	1			T730	12		T432	3		T739	1
values[39]	120	1			T730	11		T432	4		T739	1
values[40]	80	1			T432	2		T739	1		T400	1
values[41]	88	1			T432	3		T739	1		T400	1
values[42]	87	1			T432	4		T739	1		T400	1
values[43]	76	1			T432	3		T739	1		T400	1
values[44]	75	1			T432	2		T739	1		T400	1
values[45]	93	1			T432	2		T739	1		T400	1
values[46]	109	1			T432	2		T739	1		T400	1
values[47]	79	1			T432	1		T739	1		T400	1
values[48]	71	1			T432	1		T739	1		T400	1
values[49]	75	1			T432	2		T739	1		T400	1
values[50]	98	1			T432	2		T739	1		T400	1
values[51]	103	1			T432	2		T739	1		T400	1
values[52]	92	1			T432	2		T739	1		T400	1
values[53]	85	1			T432	1		T739	1		T400	1
values[54]	82	1			T432	1		T739	2		T400	1
values[55]	83	1			T432	1		T739	1		T400	1
values[56]	68	1			T432	3		T739	1		T400	1
values[57]	73	1			T432	5		T739	1		T400	1
values[58]	76	1			T432	5		T739	1		T400	1
values[59]	71	1			T432	4		T739	1		T400	1
values[60]	79	1			T432	2		T739	1		T400	1
values[61]	75	1			T432	1		T739	1		T400	2
values[62]	79	1			T432	3		T739	1		T400	1
values[63]	81	1			T432	2		T739	1		T400	1
values[64]	77	1			T432	2		T739	1		T400	1
values[65]	86	1			T432	1		T739	1		T400	1
values[66]	83	1			T432	3		T739	1		T400	1
values[67]	65	1			T432	2		T739	1		T400	1
values[68]	58	1			T432	1		T739	1		T400	1
values[69]	60	1			T432	1		T739	1		T400	1
values[70]	66	1			T432	3		T739	1		T400	1
values[71]	65	1			T432	1		T739	1		T400	1
values[72]	77	1			T432	2		T739	1		T400	1
values[73]	63	1			T432	1		T739	1		T400	1
values[74]	62	1			T432	2		T739	1		T400	1
values[75]	66	1			T432	2		T739	1		T400	1
values[76]	68	1			T432	4		T739	1		T400	1
values[77]	68	1			T432	3		T739	1		T400	1
values[78]	78	1			T432	2		T739	1		T400	1
values[79]	58	1			T432	1		T739	1		T400	1
values[80]	69	1			T432	3		T739	1		T400	1
values[81]	74	1			T432	2		T739	1		T400	1
values[82]	80	1			T432	2		T739	1		T400	1
values[83]	76	1			T432	2		T739	1		T400	1
values[84]	80	1			T432	4		T739	1		T400	1
values[85]	72	1			T432	1		T739	1		T400	1
values[86]	76	1			T432	1		T739	1		T400	1
values[87]	81	1			T432	2		T739	1		T400	1
values[88]	101	1			T432	2		T739	3		T400	1
values[89]	90	1			T432	2		T739	3		T400	1
values[90]	86	1			T432	6		T739	3		T400	1
values[91]	101	1			T432	9		T739	1		T400	1
values[92]	107	1			T432	6		T739	2		T400	1
values[93]	86	1			T432	4		T739	3		T400	1
values[94]	83	1			T432	2		T739	1		T400	1
values[95]	90	1			T432	4		T739	4		T400	1
values[96]	80	1			T432	3		T739	4		T400	1
values[97]	77	1			T432	1		T739	1		T400	1
values[98]	79	1			T432	3		T739	3		T400	1
values[99]	99	1			T432	5		T739	12		T400	1
values[100]	116	1			T432	10		T739	5		T400	1
values[101]	89	1			T432	3		T739	4		T400	1
values[102]	95	1			T432	4		T739	3		T400	1
values[103]	90	1			T432	4		T739	2		T400	1
values[104]	117	1			T432	4		T739	5		T400	1
values[105]	89	1			T432	3		T739	4		T400	1
values[106]	112	1			T432	3		T739	4		T400	1
values[107]	138	1			T432	4		T739	1		T400	1
values[108]	119	1			T432	1		T739	1		T400	1
values[109]	122	1			T432	9		T739	2		T400	1
values[110]	104	1			T432	8		T739	4		T400	1
values[111]	111	1			T432	7		T739	1		T400	1
values[112]	122	1			T432	9		T739	1		T400	1
values[113]	113	1			T432	10		T739	2		T400	1
values[114]	101	1			T432	6		T739	1		T400	1
values[115]	128	1			T432	7		T739	2		T400	1
values[116]	136	1			T432	6		T739	2		T400	1
values[117]	111	1			T432	1		T739	3		T400	1
values[118]	120	1			T432	3		T739	1		T400	1
values[119]	119	1			T432	3		T739	2		T400	1
values[120]	135	1			T432	6		T739	1		T400	1
values[121]	111	1			T432	4		T739	2		T400	1
values[122]	133	1			T432	2		T739	3		T400	4
values[123]	156	1			T432	4		T739	3		T400	4
values[124]	298	1			T432	8		T739	1		T400	1
values[125]	512	1			T432	8		T739	3		T400	3
values[126]	923	1			T432	43		T739	14		T400	7
values[127]	2383	1			T432	22		T739	123		T400	92
values[128]	3700	1			T432	4		T739	208		T400	197