Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.edn1_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	152085	1			T32	3		T33	53		T34	9
values[2]	3336	1			T32	1		T33	2		T55	5
values[3]	1538	1			T55	4		T104	30		T348	3
values[4]	1189	1			T55	2		T104	41		T348	8
values[5]	985	1			T55	3		T104	21		T348	11
values[6]	871	1			T55	1		T104	24		T348	14
values[7]	748	1			T55	1		T104	24		T348	8
values[8]	681	1			T55	1		T104	35		T348	2
values[9]	615	1			T55	5		T104	35		T348	2
values[10]	576	1			T55	4		T104	23		T404	1
values[11]	477	1			T55	2		T104	27		T404	2
values[12]	412	1			T55	3		T104	19		T404	2
values[13]	390	1			T55	3		T104	36		T404	2
values[14]	397	1			T55	2		T104	48		T404	1
values[15]	406	1			T55	2		T104	28		T404	8
values[16]	339	1			T55	3		T104	15		T404	1
values[17]	266	1			T55	1		T104	17		T404	3
values[18]	289	1			T55	1		T104	23		T404	2
values[19]	269	1			T55	6		T104	15		T404	2
values[20]	242	1			T55	6		T104	5		T404	8
values[21]	199	1			T55	2		T104	4		T404	3
values[22]	199	1			T55	3		T104	4		T404	1
values[23]	177	1			T55	6		T404	2		T735	2
values[24]	172	1			T55	8		T404	2		T735	2
values[25]	170	1			T55	2		T404	1		T735	2
values[26]	163	1			T55	2		T404	3		T735	2
values[27]	168	1			T55	1		T404	1		T735	2
values[28]	141	1			T55	1		T404	4		T735	2
values[29]	143	1			T55	1		T404	1		T735	2
values[30]	138	1			T55	3		T404	2		T735	2
values[31]	149	1			T55	1		T404	5		T735	2
values[32]	130	1			T55	2		T404	4		T735	2
values[33]	116	1			T55	4		T404	3		T735	2
values[34]	115	1			T55	2		T404	5		T735	2
values[35]	103	1			T55	6		T404	1		T735	2
values[36]	100	1			T55	7		T404	1		T735	2
values[37]	94	1			T55	3		T404	3		T735	2
values[38]	97	1			T55	2		T404	3		T735	2
values[39]	71	1			T55	3		T404	1		T735	2
values[40]	85	1			T55	3		T404	2		T735	2
values[41]	91	1			T55	2		T404	2		T735	2
values[42]	73	1			T55	2		T404	6		T735	2
values[43]	78	1			T55	2		T404	7		T735	2
values[44]	71	1			T55	5		T404	5		T735	2
values[45]	70	1			T55	1		T404	4		T735	2
values[46]	80	1			T55	2		T404	1		T735	2
values[47]	87	1			T55	2		T404	2		T735	2
values[48]	86	1			T55	1		T404	1		T735	2
values[49]	110	1			T55	2		T404	2		T735	2
values[50]	100	1			T55	2		T404	3		T735	2
values[51]	81	1			T55	3		T404	2		T735	2
values[52]	67	1			T55	2		T404	2		T735	2
values[53]	62	1			T55	4		T404	1		T735	2
values[54]	71	1			T55	1		T404	3		T735	2
values[55]	69	1			T55	1		T404	1		T735	2
values[56]	86	1			T55	2		T404	2		T735	2
values[57]	82	1			T55	3		T404	1		T735	2
values[58]	61	1			T55	1		T404	4		T735	2
values[59]	55	1			T55	2		T404	2		T735	2
values[60]	53	1			T55	7		T404	1		T735	2
values[61]	55	1			T55	2		T404	2		T735	2
values[62]	63	1			T55	1		T404	4		T735	2
values[63]	61	1			T55	2		T404	2		T735	2
values[64]	66	1			T55	3		T404	2		T735	2
values[65]	57	1			T55	1		T404	2		T735	2
values[66]	54	1			T55	2		T404	1		T735	2
values[67]	57	1			T55	6		T404	1		T735	2
values[68]	58	1			T55	1		T404	3		T735	2
values[69]	54	1			T55	2		T404	2		T735	2
values[70]	57	1			T55	1		T404	1		T735	2
values[71]	60	1			T55	2		T404	2		T735	2
values[72]	58	1			T55	5		T404	1		T735	2
values[73]	55	1			T55	4		T404	1		T735	2
values[74]	61	1			T55	1		T404	2		T735	2
values[75]	63	1			T55	3		T404	1		T735	2
values[76]	58	1			T55	2		T404	1		T735	2
values[77]	57	1			T55	3		T404	1		T735	2
values[78]	69	1			T55	5		T404	2		T735	2
values[79]	72	1			T55	2		T404	1		T735	2
values[80]	72	1			T55	2		T404	1		T735	2
values[81]	59	1			T55	1		T404	3		T735	3
values[82]	64	1			T55	7		T404	1		T735	2
values[83]	76	1			T55	6		T404	3		T735	2
values[84]	84	1			T55	8		T404	2		T735	2
values[85]	92	1			T55	18		T404	1		T735	2
values[86]	88	1			T55	8		T404	1		T735	2
values[87]	66	1			T55	6		T404	2		T735	2
values[88]	74	1			T55	8		T404	1		T735	2
values[89]	76	1			T55	4		T404	1		T735	2
values[90]	83	1			T55	10		T404	2		T735	2
values[91]	85	1			T55	11		T404	1		T735	2
values[92]	79	1			T55	5		T404	8		T735	3
values[93]	85	1			T55	3		T404	3		T735	2
values[94]	93	1			T55	1		T404	2		T735	2
values[95]	101	1			T55	6		T404	2		T735	2
values[96]	73	1			T55	3		T404	1		T735	2
values[97]	75	1			T55	3		T404	2		T735	2
values[98]	83	1			T55	6		T404	7		T735	2
values[99]	103	1			T55	6		T404	9		T735	2
values[100]	92	1			T55	5		T404	2		T735	2
values[101]	95	1			T55	1		T404	3		T735	2
values[102]	84	1			T55	1		T404	6		T735	2
values[103]	84	1			T55	5		T404	2		T735	3
values[104]	92	1			T55	8		T404	5		T735	2
values[105]	95	1			T55	5		T404	4		T735	3
values[106]	98	1			T55	3		T404	1		T735	3
values[107]	81	1			T55	2		T404	5		T735	2
values[108]	90	1			T55	3		T404	5		T735	3
values[109]	101	1			T55	13		T404	2		T735	4
values[110]	101	1			T55	7		T404	2		T735	2
values[111]	114	1			T55	10		T404	5		T735	2
values[112]	103	1			T55	7		T404	2		T735	3
values[113]	101	1			T55	2		T404	6		T735	3
values[114]	96	1			T55	2		T404	2		T735	3
values[115]	120	1			T55	8		T404	8		T735	4
values[116]	116	1			T55	8		T404	6		T735	3
values[117]	113	1			T55	10		T404	6		T735	3
values[118]	117	1			T55	7		T404	6		T735	6
values[119]	105	1			T55	7		T404	1		T735	3
values[120]	131	1			T55	7		T404	6		T735	2
values[121]	116	1			T55	3		T404	3		T735	4
values[122]	117	1			T55	1		T404	8		T735	2
values[123]	153	1			T55	2		T404	17		T735	4
values[124]	238	1			T55	8		T404	21		T735	4
values[125]	540	1			T55	4		T404	50		T735	6
values[126]	1072	1			T55	6		T404	45		T735	25
values[127]	3419	1			T55	5		T404	18		T735	224
values[128]	5840	1			T404	2		T735	490		T732	187