Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.flash_ctrl__core_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	161091	1			T32	1		T33	54		T34	2
values[2]	4276	1			T33	3		T55	111		T104	144
values[3]	1763	1			T55	44		T104	76		T360	90
values[4]	1244	1			T55	16		T104	49		T360	12
values[5]	1085	1			T55	11		T104	46		T360	4
values[6]	993	1			T55	14		T104	31		T360	12
values[7]	929	1			T55	23		T104	13		T360	15
values[8]	872	1			T55	22		T360	8		T380	30
values[9]	785	1			T55	25		T360	10		T380	31
values[10]	661	1			T55	30		T360	2		T380	19
values[11]	473	1			T55	23		T380	6		T730	10
values[12]	413	1			T55	13		T380	9		T730	5
values[13]	425	1			T55	12		T380	13		T730	5
values[14]	355	1			T55	2		T380	11		T730	4
values[15]	297	1			T380	11		T730	5		T573	48
values[16]	257	1			T380	22		T730	4		T573	40
values[17]	256	1			T380	23		T730	6		T573	39
values[18]	251	1			T380	24		T730	12		T573	23
values[19]	261	1			T380	19		T730	21		T573	26
values[20]	268	1			T380	17		T730	31		T573	47
values[21]	259	1			T380	6		T730	57		T573	55
values[22]	241	1			T380	13		T730	81		T573	32
values[23]	223	1			T380	11		T730	68		T573	19
values[24]	202	1			T380	8		T730	42		T573	13
values[25]	156	1			T380	7		T730	23		T573	3
values[26]	152	1			T380	4		T730	24		T573	12
values[27]	164	1			T730	20		T573	19		T404	16
values[28]	153	1			T573	34		T404	8		T732	1
values[29]	133	1			T573	39		T404	8		T732	1
values[30]	110	1			T573	24		T404	15		T732	1
values[31]	115	1			T573	20		T404	10		T732	1
values[32]	124	1			T573	16		T404	6		T732	1
values[33]	93	1			T573	6		T404	7		T732	1
values[34]	97	1			T573	1		T404	9		T732	1
values[35]	86	1			T404	7		T732	1		T406	3
values[36]	79	1			T404	10		T732	1		T406	3
values[37]	90	1			T404	11		T732	1		T406	3
values[38]	55	1			T404	5		T732	1		T406	3
values[39]	53	1			T404	8		T732	1		T406	3
values[40]	53	1			T404	5		T732	1		T406	3
values[41]	58	1			T404	13		T732	1		T406	3
values[42]	59	1			T404	7		T732	1		T406	3
values[43]	51	1			T404	5		T732	1		T406	3
values[44]	41	1			T404	6		T732	1		T406	3
values[45]	44	1			T404	9		T732	1		T406	3
values[46]	42	1			T404	10		T732	1		T406	3
values[47]	41	1			T404	6		T732	1		T406	3
values[48]	34	1			T404	7		T732	1		T406	3
values[49]	39	1			T404	9		T732	1		T406	3
values[50]	34	1			T404	7		T732	1		T406	3
values[51]	40	1			T404	10		T732	1		T406	3
values[52]	36	1			T404	8		T732	1		T406	3
values[53]	42	1			T404	14		T732	1		T406	3
values[54]	45	1			T404	15		T732	1		T406	3
values[55]	38	1			T404	8		T732	1		T406	3
values[56]	45	1			T404	15		T732	1		T406	3
values[57]	44	1			T404	18		T732	1		T406	3
values[58]	38	1			T404	8		T732	1		T406	3
values[59]	48	1			T404	8		T732	1		T406	3
values[60]	34	1			T404	6		T732	1		T406	3
values[61]	33	1			T404	7		T732	1		T406	3
values[62]	44	1			T404	13		T732	1		T406	3
values[63]	43	1			T404	14		T732	1		T406	3
values[64]	46	1			T404	16		T732	1		T406	3
values[65]	40	1			T404	12		T732	1		T406	3
values[66]	41	1			T404	11		T732	1		T406	3
values[67]	36	1			T404	8		T732	1		T406	3
values[68]	40	1			T404	13		T732	1		T406	3
values[69]	45	1			T404	13		T732	1		T406	3
values[70]	50	1			T404	15		T732	1		T406	3
values[71]	51	1			T404	21		T732	1		T406	3
values[72]	38	1			T404	10		T732	1		T406	3
values[73]	34	1			T404	9		T732	1		T406	3
values[74]	44	1			T404	11		T732	1		T406	3
values[75]	38	1			T404	4		T732	1		T406	3
values[76]	40	1			T404	4		T732	2		T406	3
values[77]	39	1			T404	8		T732	1		T406	3
values[78]	40	1			T404	6		T732	1		T406	3
values[79]	51	1			T404	10		T732	1		T406	3
values[80]	44	1			T404	8		T732	1		T406	3
values[81]	50	1			T404	6		T732	1		T406	3
values[82]	46	1			T404	5		T732	1		T406	3
values[83]	46	1			T404	5		T732	1		T406	3
values[84]	54	1			T404	7		T732	1		T406	3
values[85]	66	1			T404	9		T732	1		T406	3
values[86]	64	1			T404	13		T732	3		T406	3
values[87]	60	1			T404	8		T732	4		T406	3
values[88]	60	1			T404	11		T732	6		T406	3
values[89]	61	1			T404	7		T732	3		T406	3
values[90]	69	1			T404	12		T732	5		T406	3
values[91]	63	1			T404	6		T732	5		T406	3
values[92]	57	1			T404	7		T732	2		T406	3
values[93]	56	1			T404	9		T732	1		T406	3
values[94]	64	1			T404	12		T732	4		T406	3
values[95]	64	1			T404	9		T732	1		T406	4
values[96]	73	1			T404	14		T732	1		T406	5
values[97]	70	1			T404	16		T732	3		T406	4
values[98]	74	1			T404	14		T732	3		T406	3
values[99]	70	1			T404	9		T732	1		T406	5
values[100]	66	1			T404	7		T732	3		T406	8
values[101]	74	1			T404	13		T732	2		T406	15
values[102]	65	1			T404	10		T732	1		T406	8
values[103]	68	1			T404	10		T732	1		T406	8
values[104]	66	1			T404	12		T732	2		T406	6
values[105]	81	1			T404	18		T732	2		T406	8
values[106]	76	1			T404	15		T732	3		T406	8
values[107]	78	1			T404	15		T732	1		T406	6
values[108]	63	1			T404	8		T732	2		T406	5
values[109]	64	1			T404	11		T732	1		T406	5
values[110]	74	1			T404	10		T732	1		T406	8
values[111]	59	1			T404	14		T732	2		T406	3
values[112]	60	1			T404	12		T732	2		T406	4
values[113]	66	1			T404	14		T732	1		T406	4
values[114]	59	1			T404	9		T732	2		T406	3
values[115]	61	1			T404	13		T732	1		T406	3
values[116]	73	1			T404	12		T732	1		T406	4
values[117]	66	1			T404	8		T732	2		T406	8
values[118]	63	1			T404	7		T732	1		T406	4
values[119]	72	1			T404	10		T732	2		T406	10
values[120]	93	1			T404	12		T732	13		T406	6
values[121]	81	1			T404	24		T732	6		T406	5
values[122]	73	1			T404	28		T732	2		T406	6
values[123]	78	1			T404	26		T732	1		T406	5
values[124]	97	1			T404	24		T732	3		T406	6
values[125]	154	1			T404	47		T732	3		T406	4
values[126]	438	1			T404	63		T732	17		T406	38
values[127]	2381	1			T404	24		T732	120		T406	307
values[128]	4803	1			T404	3		T732	177		T406	694