Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.i2c2_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	138339	1			T69	72		T70	47		T71	4
values[2]	8301	1			T69	2		T491	1		T211	1
values[3]	3104	1			T397	87		T487	2		T495	1
values[4]	1844	1			T397	42		T487	2		T495	1
values[5]	1222	1			T397	5		T487	2		T495	1
values[6]	920	1			T397	1		T487	2		T495	1
values[7]	794	1			T487	2		T495	1		T354	2
values[8]	616	1			T487	2		T495	1		T354	2
values[9]	605	1			T487	2		T495	1		T354	2
values[10]	540	1			T487	2		T495	1		T354	2
values[11]	441	1			T487	2		T495	1		T354	2
values[12]	394	1			T487	2		T495	1		T354	2
values[13]	396	1			T487	2		T495	1		T354	2
values[14]	416	1			T487	2		T495	1		T354	2
values[15]	352	1			T487	2		T495	1		T354	2
values[16]	340	1			T487	2		T495	1		T354	2
values[17]	349	1			T487	2		T495	1		T354	2
values[18]	349	1			T487	2		T495	1		T354	2
values[19]	398	1			T487	2		T495	1		T354	2
values[20]	431	1			T487	2		T495	1		T354	2
values[21]	308	1			T487	2		T495	1		T354	2
values[22]	297	1			T487	2		T495	1		T354	2
values[23]	315	1			T487	2		T495	1		T354	2
values[24]	314	1			T487	2		T495	1		T354	2
values[25]	306	1			T487	2		T495	1		T354	2
values[26]	377	1			T487	2		T495	1		T354	2
values[27]	311	1			T487	2		T495	1		T354	2
values[28]	343	1			T487	2		T495	1		T354	2
values[29]	310	1			T487	2		T495	1		T354	2
values[30]	295	1			T487	2		T495	1		T354	2
values[31]	314	1			T487	2		T495	1		T354	2
values[32]	340	1			T487	2		T495	1		T354	2
values[33]	355	1			T487	2		T495	1		T354	2
values[34]	330	1			T487	2		T495	1		T354	2
values[35]	295	1			T487	2		T495	1		T354	2
values[36]	319	1			T487	2		T495	1		T354	2
values[37]	368	1			T487	2		T495	1		T354	2
values[38]	306	1			T487	2		T495	1		T354	2
values[39]	291	1			T487	2		T495	1		T354	2
values[40]	333	1			T487	2		T495	1		T354	2
values[41]	330	1			T487	2		T495	1		T354	2
values[42]	297	1			T487	2		T495	1		T354	2
values[43]	305	1			T487	2		T495	1		T354	2
values[44]	272	1			T487	2		T495	1		T354	2
values[45]	287	1			T487	2		T495	1		T354	2
values[46]	298	1			T487	2		T495	1		T354	2
values[47]	296	1			T487	2		T495	1		T354	2
values[48]	315	1			T487	2		T495	1		T354	2
values[49]	283	1			T487	2		T495	1		T354	2
values[50]	309	1			T487	2		T495	1		T354	2
values[51]	337	1			T487	2		T495	1		T354	2
values[52]	316	1			T487	2		T495	1		T354	2
values[53]	329	1			T487	2		T495	1		T354	2
values[54]	283	1			T487	2		T495	1		T354	2
values[55]	301	1			T487	2		T495	1		T354	2
values[56]	296	1			T487	2		T495	1		T354	2
values[57]	284	1			T487	2		T495	1		T354	2
values[58]	270	1			T487	2		T495	1		T354	2
values[59]	297	1			T487	2		T495	1		T354	2
values[60]	265	1			T487	2		T495	1		T354	2
values[61]	253	1			T487	2		T495	1		T354	2
values[62]	284	1			T487	2		T495	1		T354	2
values[63]	259	1			T487	3		T495	1		T354	2
values[64]	222	1			T487	2		T495	1		T354	2
values[65]	237	1			T487	2		T495	1		T354	2
values[66]	194	1			T487	2		T495	1		T354	2
values[67]	188	1			T487	2		T495	1		T354	2
values[68]	210	1			T487	2		T495	1		T354	2
values[69]	188	1			T487	2		T495	2		T354	2
values[70]	182	1			T487	2		T495	1		T354	2
values[71]	147	1			T487	2		T495	1		T354	2
values[72]	155	1			T487	2		T495	1		T354	2
values[73]	146	1			T487	2		T495	1		T354	2
values[74]	118	1			T487	2		T495	1		T354	2
values[75]	146	1			T487	2		T495	1		T354	3
values[76]	121	1			T487	2		T495	1		T354	2
values[77]	142	1			T487	2		T495	1		T354	2
values[78]	126	1			T487	2		T495	1		T354	2
values[79]	110	1			T487	2		T495	1		T354	2
values[80]	81	1			T487	2		T495	1		T354	2
values[81]	75	1			T487	3		T495	1		T354	2
values[82]	82	1			T487	5		T495	1		T354	4
values[83]	84	1			T487	5		T495	1		T354	3
values[84]	86	1			T487	9		T495	1		T354	2
values[85]	70	1			T487	5		T495	1		T354	2
values[86]	76	1			T487	3		T495	1		T354	3
values[87]	76	1			T487	9		T495	1		T354	4
values[88]	93	1			T487	3		T495	1		T354	3
values[89]	90	1			T487	4		T495	1		T354	2
values[90]	82	1			T487	2		T495	1		T354	2
values[91]	99	1			T487	3		T495	1		T354	5
values[92]	94	1			T487	7		T495	1		T354	6
values[93]	83	1			T487	4		T495	1		T354	3
values[94]	105	1			T487	7		T495	1		T354	3
values[95]	93	1			T487	11		T495	1		T354	3
values[96]	91	1			T487	5		T495	1		T354	3
values[97]	94	1			T487	4		T495	1		T354	4
values[98]	94	1			T487	5		T495	1		T354	4
values[99]	87	1			T487	2		T495	1		T354	3
values[100]	76	1			T487	2		T495	1		T354	4
values[101]	81	1			T487	6		T495	1		T354	4
values[102]	81	1			T487	5		T495	1		T354	5
values[103]	103	1			T487	5		T495	1		T354	2
values[104]	81	1			T487	8		T495	1		T354	2
values[105]	74	1			T487	9		T495	1		T354	3
values[106]	72	1			T487	6		T495	1		T354	4
values[107]	57	1			T487	5		T495	1		T354	4
values[108]	82	1			T487	5		T495	1		T354	2
values[109]	72	1			T487	5		T495	1		T354	4
values[110]	76	1			T487	2		T495	1		T354	3
values[111]	81	1			T487	3		T495	2		T354	2
values[112]	82	1			T487	4		T495	1		T354	2
values[113]	89	1			T487	3		T495	2		T354	2
values[114]	77	1			T487	6		T495	8		T354	2
values[115]	96	1			T487	5		T495	4		T354	3
values[116]	87	1			T487	6		T495	10		T354	2
values[117]	97	1			T487	8		T495	3		T354	4
values[118]	99	1			T487	2		T495	1		T354	4
values[119]	96	1			T487	4		T495	3		T354	11
values[120]	84	1			T487	3		T495	1		T354	8
values[121]	100	1			T487	5		T495	3		T354	2
values[122]	95	1			T487	3		T495	3		T354	2
values[123]	92	1			T487	4		T495	3		T354	6
values[124]	79	1			T487	3		T495	2		T354	3
values[125]	79	1			T487	3		T495	2		T354	2
values[126]	133	1			T487	3		T495	2		T354	5
values[127]	1062	1			T487	55		T495	35		T354	58
values[128]	9249	1			T487	548		T495	270		T354	634