Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.flash_ctrl__prim_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	160247	1			T77	755		T81	27		T82	132
values[2]	3831	1			T512	1		T490	3		T396	3
values[3]	1911	1			T490	1		T750	1		T746	23
values[4]	1765	1			T750	3		T746	21		T458	32
values[5]	1565	1			T750	3		T746	41		T458	34
values[6]	1352	1			T750	4		T746	34		T458	43
values[7]	1162	1			T750	4		T746	39		T458	34
values[8]	1030	1			T750	2		T746	36		T458	8
values[9]	877	1			T750	1		T746	23		T458	13
values[10]	745	1			T750	5		T746	14		T458	8
values[11]	724	1			T750	2		T746	14		T458	2
values[12]	862	1			T750	4		T746	26		T458	6
values[13]	834	1			T750	8		T746	20		T458	8
values[14]	685	1			T750	3		T746	17		T458	6
values[15]	488	1			T750	2		T746	31		T458	7
values[16]	372	1			T750	1		T746	17		T458	8
values[17]	303	1			T750	1		T746	11		T458	9
values[18]	243	1			T750	3		T746	2		T458	5
values[19]	275	1			T750	6		T746	18		T458	6
values[20]	300	1			T750	1		T746	36		T458	7
values[21]	287	1			T750	4		T746	24		T458	3
values[22]	274	1			T750	3		T746	5		T458	3
values[23]	245	1			T750	4		T458	3		T453	1
values[24]	216	1			T750	1		T458	3		T453	1
values[25]	207	1			T750	1		T458	9		T453	1
values[26]	199	1			T750	3		T458	5		T453	1
values[27]	231	1			T750	1		T458	6		T453	1
values[28]	169	1			T750	3		T458	2		T453	1
values[29]	162	1			T750	1		T458	3		T453	1
values[30]	133	1			T750	5		T458	2		T453	1
values[31]	120	1			T750	1		T458	4		T453	1
values[32]	121	1			T750	2		T458	5		T453	1
values[33]	100	1			T750	5		T458	8		T453	1
values[34]	83	1			T750	4		T458	6		T453	1
values[35]	92	1			T750	4		T458	5		T453	1
values[36]	84	1			T750	1		T458	3		T453	1
values[37]	74	1			T750	1		T458	3		T453	1
values[38]	90	1			T750	2		T458	3		T453	1
values[39]	80	1			T750	2		T458	3		T453	1
values[40]	90	1			T750	5		T458	4		T453	1
values[41]	85	1			T750	3		T458	3		T453	1
values[42]	88	1			T750	2		T458	7		T453	1
values[43]	72	1			T750	3		T458	5		T453	1
values[44]	75	1			T750	2		T458	8		T453	1
values[45]	62	1			T750	1		T458	5		T453	1
values[46]	74	1			T750	2		T458	3		T453	1
values[47]	76	1			T750	4		T458	6		T453	1
values[48]	86	1			T750	4		T458	8		T453	1
values[49]	80	1			T750	7		T458	4		T453	1
values[50]	76	1			T750	7		T458	3		T453	1
values[51]	64	1			T750	2		T458	5		T453	1
values[52]	75	1			T750	1		T458	11		T453	1
values[53]	60	1			T750	3		T458	10		T453	1
values[54]	50	1			T750	2		T458	5		T453	1
values[55]	55	1			T750	3		T458	5		T453	1
values[56]	46	1			T750	1		T458	4		T453	1
values[57]	53	1			T750	1		T458	4		T453	1
values[58]	51	1			T750	2		T458	4		T453	1
values[59]	66	1			T750	3		T458	5		T453	1
values[60]	66	1			T750	3		T458	3		T453	1
values[61]	54	1			T750	1		T458	2		T453	1
values[62]	60	1			T750	3		T458	4		T453	1
values[63]	62	1			T750	4		T458	7		T453	1
values[64]	57	1			T750	3		T458	5		T453	1
values[65]	71	1			T750	6		T458	6		T453	1
values[66]	67	1			T750	3		T458	9		T453	1
values[67]	52	1			T750	3		T458	5		T453	1
values[68]	53	1			T750	3		T458	7		T453	1
values[69]	53	1			T750	2		T458	5		T453	1
values[70]	59	1			T750	2		T458	2		T453	1
values[71]	64	1			T750	1		T458	2		T453	1
values[72]	66	1			T750	3		T458	3		T453	1
values[73]	41	1			T750	1		T458	4		T453	1
values[74]	38	1			T750	1		T458	2		T453	1
values[75]	46	1			T750	1		T458	4		T453	1
values[76]	70	1			T750	3		T458	4		T453	1
values[77]	66	1			T750	2		T458	7		T453	1
values[78]	63	1			T750	2		T458	4		T453	1
values[79]	58	1			T750	2		T458	2		T453	2
values[80]	62	1			T750	3		T458	5		T453	1
values[81]	51	1			T750	2		T458	4		T453	1
values[82]	64	1			T750	1		T458	7		T453	1
values[83]	59	1			T750	1		T458	4		T453	1
values[84]	67	1			T750	5		T458	8		T453	1
values[85]	85	1			T750	3		T458	6		T453	1
values[86]	66	1			T750	2		T458	3		T453	1
values[87]	64	1			T750	4		T458	4		T453	1
values[88]	61	1			T750	2		T458	12		T453	1
values[89]	71	1			T750	6		T458	12		T453	1
values[90]	81	1			T750	7		T458	10		T453	1
values[91]	87	1			T750	8		T458	12		T453	1
values[92]	81	1			T750	5		T458	7		T453	1
values[93]	73	1			T750	7		T458	5		T453	1
values[94]	72	1			T750	12		T458	4		T453	1
values[95]	81	1			T750	14		T458	4		T453	1
values[96]	86	1			T750	7		T458	5		T453	1
values[97]	78	1			T750	3		T458	11		T453	1
values[98]	83	1			T750	3		T458	10		T453	1
values[99]	106	1			T750	3		T458	5		T453	1
values[100]	119	1			T750	4		T458	8		T453	1
values[101]	91	1			T750	7		T458	12		T453	1
values[102]	108	1			T750	4		T458	14		T453	1
values[103]	100	1			T750	6		T458	11		T453	1
values[104]	113	1			T750	2		T458	12		T453	1
values[105]	100	1			T750	3		T458	7		T453	1
values[106]	110	1			T750	6		T458	7		T453	1
values[107]	103	1			T750	1		T458	9		T453	1
values[108]	98	1			T750	1		T458	11		T453	1
values[109]	110	1			T750	1		T458	12		T453	1
values[110]	95	1			T750	3		T458	9		T453	1
values[111]	101	1			T750	7		T458	8		T453	1
values[112]	106	1			T750	7		T458	12		T453	1
values[113]	124	1			T750	6		T458	14		T453	1
values[114]	111	1			T750	2		T458	18		T453	2
values[115]	82	1			T750	4		T458	4		T453	1
values[116]	129	1			T750	6		T458	5		T453	2
values[117]	103	1			T750	6		T458	6		T453	2
values[118]	112	1			T750	8		T458	14		T453	2
values[119]	120	1			T750	3		T458	13		T453	2
values[120]	116	1			T750	1		T458	11		T453	2
values[121]	113	1			T750	5		T458	10		T453	4
values[122]	125	1			T750	6		T458	17		T453	2
values[123]	147	1			T750	2		T458	24		T453	1
values[124]	211	1			T750	2		T458	33		T453	2
values[125]	373	1			T750	7		T458	61		T453	1
values[126]	704	1			T750	24		T458	98		T453	15
values[127]	1859	1			T750	5		T458	36		T453	112
values[128]	3104	1			T458	9		T453	254		T757	195