Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.i2c2_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	143419	1			T77	248		T81	29		T82	169
values[2]	11597	1			T77	1		T551	1		T404	1
values[3]	4420	1			T424	22		T604	1		T401	16
values[4]	2598	1			T424	2		T604	1		T401	1
values[5]	1679	1			T604	1		T401	2		T587	50
values[6]	1236	1			T604	1		T587	32		T591	2
values[7]	931	1			T604	1		T587	18		T591	5
values[8]	728	1			T604	1		T587	29		T591	3
values[9]	550	1			T604	2		T587	14		T591	4
values[10]	432	1			T604	1		T587	14		T591	1
values[11]	439	1			T604	1		T587	20		T591	3
values[12]	369	1			T604	1		T587	11		T591	4
values[13]	384	1			T604	1		T587	19		T591	2
values[14]	337	1			T604	1		T587	5		T591	2
values[15]	343	1			T604	1		T587	3		T591	1
values[16]	326	1			T604	1		T587	10		T591	2
values[17]	370	1			T604	1		T587	19		T591	4
values[18]	326	1			T604	1		T587	9		T591	6
values[19]	348	1			T604	1		T587	9		T591	1
values[20]	362	1			T604	1		T587	8		T591	2
values[21]	317	1			T604	1		T587	4		T591	2
values[22]	341	1			T604	1		T587	5		T591	1
values[23]	329	1			T604	1		T587	4		T591	2
values[24]	407	1			T604	1		T587	12		T591	6
values[25]	322	1			T604	1		T587	7		T591	1
values[26]	280	1			T604	1		T587	8		T591	1
values[27]	311	1			T604	1		T587	10		T591	2
values[28]	313	1			T604	1		T591	3		T400	1
values[29]	293	1			T604	1		T591	1		T400	1
values[30]	288	1			T604	1		T591	4		T400	1
values[31]	340	1			T604	1		T591	2		T400	1
values[32]	320	1			T604	1		T591	5		T400	1
values[33]	287	1			T604	1		T591	1		T400	1
values[34]	334	1			T604	1		T591	2		T400	1
values[35]	333	1			T604	1		T591	1		T400	1
values[36]	298	1			T604	1		T591	4		T400	1
values[37]	314	1			T604	1		T591	3		T400	1
values[38]	263	1			T604	1		T591	3		T400	1
values[39]	303	1			T604	1		T591	7		T400	1
values[40]	305	1			T604	1		T591	4		T400	1
values[41]	296	1			T604	1		T591	1		T400	1
values[42]	285	1			T604	1		T591	4		T400	1
values[43]	291	1			T604	1		T591	4		T400	1
values[44]	276	1			T604	1		T591	5		T400	1
values[45]	311	1			T604	1		T591	1		T400	1
values[46]	287	1			T604	1		T591	2		T400	1
values[47]	276	1			T604	1		T591	1		T400	1
values[48]	240	1			T604	1		T591	2		T400	1
values[49]	262	1			T604	1		T591	1		T400	1
values[50]	224	1			T604	1		T591	2		T400	1
values[51]	255	1			T604	1		T591	4		T400	1
values[52]	272	1			T604	1		T591	1		T400	1
values[53]	254	1			T604	1		T591	1		T400	1
values[54]	234	1			T604	1		T591	1		T400	1
values[55]	246	1			T604	1		T591	1		T400	1
values[56]	271	1			T604	1		T591	2		T400	1
values[57]	215	1			T604	1		T591	6		T400	1
values[58]	283	1			T604	1		T591	9		T400	1
values[59]	248	1			T604	1		T591	11		T400	1
values[60]	205	1			T604	1		T591	4		T400	1
values[61]	224	1			T604	1		T591	11		T400	1
values[62]	202	1			T604	1		T591	21		T400	1
values[63]	209	1			T604	1		T591	21		T400	1
values[64]	256	1			T604	1		T591	30		T400	1
values[65]	192	1			T604	1		T591	13		T400	1
values[66]	196	1			T604	1		T591	1		T400	1
values[67]	164	1			T604	1		T400	1		T578	8
values[68]	151	1			T604	1		T400	1		T578	9
values[69]	130	1			T604	1		T400	1		T578	6
values[70]	99	1			T604	1		T400	1		T578	6
values[71]	99	1			T604	1		T400	1		T761	1
values[72]	95	1			T604	1		T400	1		T761	1
values[73]	110	1			T604	1		T400	1		T761	1
values[74]	88	1			T604	1		T400	1		T761	1
values[75]	80	1			T604	1		T400	1		T761	1
values[76]	98	1			T604	1		T400	1		T761	1
values[77]	103	1			T604	1		T400	1		T761	1
values[78]	80	1			T604	1		T400	1		T761	1
values[79]	77	1			T604	1		T400	1		T761	1
values[80]	71	1			T604	1		T400	1		T761	1
values[81]	74	1			T604	1		T400	1		T761	1
values[82]	81	1			T604	1		T400	1		T761	1
values[83]	75	1			T604	1		T400	1		T761	1
values[84]	60	1			T604	1		T400	1		T761	1
values[85]	75	1			T604	1		T400	1		T761	1
values[86]	80	1			T604	1		T400	1		T761	1
values[87]	80	1			T604	1		T400	1		T761	1
values[88]	83	1			T604	1		T400	4		T761	1
values[89]	82	1			T604	1		T400	2		T761	1
values[90]	72	1			T604	1		T400	5		T761	1
values[91]	96	1			T604	1		T400	1		T761	1
values[92]	76	1			T604	1		T400	2		T761	1
values[93]	109	1			T604	1		T400	2		T761	1
values[94]	88	1			T604	2		T400	1		T761	1
values[95]	84	1			T604	1		T400	1		T761	1
values[96]	80	1			T604	1		T400	4		T761	1
values[97]	76	1			T604	2		T400	2		T761	1
values[98]	73	1			T604	2		T400	2		T761	1
values[99]	84	1			T604	2		T400	2		T761	2
values[100]	74	1			T604	2		T400	5		T761	1
values[101]	82	1			T604	3		T400	2		T761	1
values[102]	76	1			T604	3		T400	1		T761	1
values[103]	95	1			T604	1		T400	3		T761	1
values[104]	81	1			T604	2		T400	1		T761	1
values[105]	69	1			T604	3		T400	1		T761	1
values[106]	83	1			T604	2		T400	1		T761	5
values[107]	80	1			T604	1		T400	3		T761	2
values[108]	92	1			T604	1		T400	1		T761	9
values[109]	71	1			T604	1		T400	6		T761	1
values[110]	71	1			T604	3		T400	1		T761	3
values[111]	63	1			T604	2		T400	3		T761	1
values[112]	69	1			T604	2		T400	2		T761	2
values[113]	74	1			T604	2		T400	4		T761	1
values[114]	88	1			T604	1		T400	2		T761	1
values[115]	76	1			T604	1		T400	3		T761	1
values[116]	61	1			T604	2		T400	1		T761	1
values[117]	89	1			T604	3		T400	2		T761	3
values[118]	71	1			T604	2		T400	3		T761	3
values[119]	82	1			T604	1		T400	1		T761	3
values[120]	68	1			T604	1		T400	1		T761	3
values[121]	63	1			T604	1		T400	3		T761	2
values[122]	64	1			T604	1		T400	2		T761	4
values[123]	61	1			T604	3		T400	2		T761	2
values[124]	62	1			T604	4		T400	1		T761	3
values[125]	86	1			T604	1		T400	3		T761	2
values[126]	158	1			T604	1		T400	3		T761	6
values[127]	855	1			T604	24		T400	34		T761	46
values[128]	5973	1			T604	280		T400	270		T761	318