Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.sram_ctrl_ret_aon__ram_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	137908	1			T77	720		T81	23		T82	138
values[2]	8795	1			T77	171		T81	1		T82	1
values[3]	3505	1			T77	22		T425	11		T535	1
values[4]	2146	1			T77	11		T425	14		T401	5
values[5]	1345	1			T77	14		T425	7		T587	9
values[6]	926	1			T77	4		T425	4		T587	5
values[7]	704	1			T77	9		T425	8		T587	3
values[8]	579	1			T77	3		T425	10		T587	7
values[9]	513	1			T77	12		T425	8		T587	8
values[10]	407	1			T77	4		T425	8		T587	11
values[11]	479	1			T77	5		T425	14		T587	4
values[12]	472	1			T77	9		T425	17		T587	5
values[13]	429	1			T77	19		T425	8		T587	4
values[14]	483	1			T77	4		T425	7		T587	4
values[15]	384	1			T77	12		T425	5		T587	7
values[16]	368	1			T77	12		T425	4		T587	22
values[17]	394	1			T77	6		T425	3		T587	11
values[18]	380	1			T77	7		T425	5		T587	5
values[19]	352	1			T77	6		T425	11		T587	5
values[20]	386	1			T77	6		T425	14		T587	16
values[21]	331	1			T77	12		T425	8		T587	6
values[22]	285	1			T77	9		T425	1		T587	6
values[23]	336	1			T77	5		T425	4		T587	8
values[24]	345	1			T77	5		T425	7		T587	15
values[25]	366	1			T77	5		T425	1		T587	4
values[26]	333	1			T77	6		T425	5		T587	3
values[27]	349	1			T77	2		T425	10		T587	11
values[28]	319	1			T77	5		T425	4		T587	15
values[29]	396	1			T77	5		T425	1		T587	9
values[30]	336	1			T77	9		T425	2		T587	18
values[31]	293	1			T77	4		T425	2		T587	2
values[32]	347	1			T77	7		T587	5		T591	2
values[33]	411	1			T77	15		T587	4		T591	1
values[34]	373	1			T77	4		T587	7		T591	3
values[35]	352	1			T77	7		T587	5		T591	8
values[36]	296	1			T77	5		T587	4		T591	4
values[37]	289	1			T77	2		T587	5		T591	1
values[38]	350	1			T77	9		T587	6		T591	4
values[39]	287	1			T77	5		T587	4		T591	1
values[40]	249	1			T77	2		T587	3		T591	6
values[41]	297	1			T77	5		T587	8		T591	4
values[42]	288	1			T77	16		T587	9		T591	2
values[43]	333	1			T77	12		T587	4		T591	2
values[44]	310	1			T77	12		T587	12		T591	2
values[45]	382	1			T77	8		T587	17		T591	4
values[46]	290	1			T77	4		T587	6		T591	2
values[47]	293	1			T77	3		T591	2		T402	18
values[48]	307	1			T77	3		T591	1		T402	16
values[49]	316	1			T77	3		T591	1		T402	11
values[50]	276	1			T77	10		T591	1		T402	11
values[51]	276	1			T77	3		T591	2		T402	14
values[52]	308	1			T77	10		T591	14		T402	11
values[53]	229	1			T77	5		T591	5		T402	7
values[54]	280	1			T77	17		T591	4		T402	6
values[55]	221	1			T77	17		T591	2		T402	5
values[56]	240	1			T77	6		T591	1		T402	1
values[57]	240	1			T753	3		T748	1		T432	3
values[58]	257	1			T753	1		T748	1		T432	3
values[59]	267	1			T753	7		T748	1		T432	10
values[60]	243	1			T753	9		T748	1		T432	3
values[61]	197	1			T753	7		T748	1		T432	2
values[62]	224	1			T753	6		T748	1		T432	3
values[63]	219	1			T753	12		T748	1		T432	1
values[64]	191	1			T753	6		T748	1		T432	2
values[65]	152	1			T753	9		T748	1		T432	4
values[66]	136	1			T753	5		T748	1		T432	1
values[67]	127	1			T753	1		T748	1		T432	2
values[68]	138	1			T753	2		T748	1		T432	2
values[69]	139	1			T753	4		T748	1		T432	4
values[70]	145	1			T753	3		T748	1		T432	3
values[71]	125	1			T753	1		T748	1		T432	3
values[72]	112	1			T753	1		T748	1		T432	4
values[73]	70	1			T753	2		T748	1		T432	2
values[74]	104	1			T753	1		T748	1		T432	2
values[75]	104	1			T753	1		T748	1		T432	3
values[76]	82	1			T753	4		T748	1		T432	4
values[77]	73	1			T753	4		T748	3		T432	1
values[78]	81	1			T753	2		T748	9		T432	2
values[79]	77	1			T753	2		T748	5		T432	1
values[80]	80	1			T753	4		T748	2		T432	6
values[81]	77	1			T753	4		T748	3		T432	4
values[82]	87	1			T753	12		T748	2		T432	9
values[83]	89	1			T753	4		T748	9		T432	2
values[84]	78	1			T753	4		T748	1		T432	3
values[85]	53	1			T753	2		T748	2		T432	1
values[86]	76	1			T753	4		T748	3		T432	6
values[87]	81	1			T753	1		T748	2		T432	2
values[88]	94	1			T753	3		T748	2		T432	2
values[89]	72	1			T753	2		T748	3		T432	1
values[90]	86	1			T753	4		T748	3		T432	1
values[91]	68	1			T753	2		T748	2		T432	2
values[92]	88	1			T753	2		T748	3		T432	1
values[93]	90	1			T753	1		T748	4		T432	1
values[94]	86	1			T753	2		T748	3		T432	1
values[95]	89	1			T753	3		T748	3		T432	2
values[96]	97	1			T753	2		T748	3		T432	1
values[97]	79	1			T753	1		T748	2		T432	1
values[98]	92	1			T753	1		T748	2		T432	1
values[99]	112	1			T753	7		T748	3		T432	2
values[100]	94	1			T753	7		T748	2		T432	1
values[101]	91	1			T753	2		T748	2		T432	2
values[102]	97	1			T753	2		T748	2		T432	6
values[103]	92	1			T753	2		T748	1		T432	11
values[104]	93	1			T753	1		T748	2		T432	9
values[105]	77	1			T753	4		T748	1		T432	1
values[106]	83	1			T753	1		T748	4		T432	9
values[107]	110	1			T753	4		T748	1		T432	2
values[108]	89	1			T753	1		T748	1		T432	4
values[109]	102	1			T753	3		T748	3		T432	5
values[110]	101	1			T753	10		T748	2		T432	3
values[111]	90	1			T753	6		T748	1		T432	3
values[112]	96	1			T753	4		T748	5		T432	5
values[113]	101	1			T753	1		T748	3		T432	6
values[114]	99	1			T753	7		T748	2		T432	3
values[115]	121	1			T753	1		T748	2		T432	4
values[116]	121	1			T753	2		T748	2		T432	3
values[117]	114	1			T753	2		T748	1		T432	12
values[118]	91	1			T753	1		T748	2		T432	5
values[119]	85	1			T753	2		T748	1		T432	5
values[120]	96	1			T753	1		T748	1		T432	9
values[121]	89	1			T753	3		T748	1		T432	9
values[122]	86	1			T753	2		T748	4		T432	3
values[123]	82	1			T753	7		T748	2		T432	2
values[124]	106	1			T753	3		T748	1		T756	4
values[125]	129	1			T753	4		T748	1		T756	3
values[126]	225	1			T753	36		T748	4		T756	1
values[127]	1111	1			T753	61		T748	27		T756	35
values[128]	6572	1			T753	38		T748	231		T756	350