Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.uart1_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	148044	1			T77	245		T81	18		T82	148
values[2]	14683	1			T77	1		T82	2		T551	1
values[3]	5816	1			T401	18		T405	1		T466	110
values[4]	3287	1			T401	2		T405	1		T466	55
values[5]	2059	1			T401	1		T405	1		T466	15
values[6]	1347	1			T405	2		T466	10		T750	12
values[7]	813	1			T405	1		T466	3		T750	24
values[8]	555	1			T405	1		T750	29		T747	9
values[9]	475	1			T405	1		T750	19		T747	14
values[10]	383	1			T405	1		T750	7		T747	2
values[11]	351	1			T405	1		T750	4		T747	12
values[12]	319	1			T405	1		T747	12		T592	4
values[13]	313	1			T405	1		T747	6		T592	18
values[14]	311	1			T405	1		T747	10		T592	3
values[15]	293	1			T405	1		T747	8		T592	14
values[16]	316	1			T405	1		T747	3		T592	7
values[17]	345	1			T405	1		T747	10		T592	3
values[18]	347	1			T405	1		T747	4		T592	4
values[19]	290	1			T405	1		T747	5		T592	6
values[20]	258	1			T405	1		T747	4		T592	4
values[21]	307	1			T405	1		T747	12		T592	8
values[22]	314	1			T405	1		T747	13		T592	9
values[23]	334	1			T405	1		T747	4		T592	8
values[24]	288	1			T405	1		T747	5		T592	11
values[25]	292	1			T405	1		T747	4		T592	8
values[26]	292	1			T405	1		T747	4		T592	10
values[27]	300	1			T405	1		T747	6		T592	5
values[28]	295	1			T405	1		T747	15		T592	4
values[29]	334	1			T405	1		T747	6		T592	9
values[30]	252	1			T405	1		T747	7		T592	5
values[31]	254	1			T405	1		T747	5		T592	3
values[32]	272	1			T405	1		T747	7		T592	10
values[33]	326	1			T405	1		T747	10		T592	13
values[34]	286	1			T405	1		T747	17		T592	14
values[35]	285	1			T405	1		T747	5		T592	5
values[36]	274	1			T405	1		T747	10		T592	8
values[37]	253	1			T405	1		T747	4		T592	4
values[38]	289	1			T405	1		T747	4		T592	10
values[39]	270	1			T405	1		T747	10		T592	6
values[40]	243	1			T405	1		T747	7		T592	30
values[41]	288	1			T405	1		T747	9		T592	6
values[42]	283	1			T405	1		T747	10		T592	23
values[43]	338	1			T405	1		T747	11		T592	6
values[44]	313	1			T405	1		T747	8		T592	5
values[45]	265	1			T405	1		T747	5		T592	5
values[46]	292	1			T405	1		T747	5		T592	6
values[47]	239	1			T405	1		T747	8		T592	5
values[48]	243	1			T405	1		T747	8		T592	4
values[49]	271	1			T405	1		T747	3		T592	2
values[50]	296	1			T405	1		T747	6		T592	3
values[51]	242	1			T405	1		T592	11		T400	1
values[52]	259	1			T405	1		T592	8		T400	1
values[53]	205	1			T405	1		T592	4		T400	1
values[54]	245	1			T405	1		T592	7		T400	1
values[55]	245	1			T405	1		T592	16		T400	1
values[56]	232	1			T405	1		T592	15		T400	1
values[57]	200	1			T405	1		T592	11		T400	1
values[58]	195	1			T405	1		T592	4		T400	1
values[59]	174	1			T405	1		T592	6		T400	1
values[60]	171	1			T405	1		T592	6		T400	1
values[61]	199	1			T405	1		T592	5		T400	1
values[62]	212	1			T405	1		T592	7		T400	1
values[63]	188	1			T405	1		T592	3		T400	1
values[64]	154	1			T405	1		T592	6		T400	1
values[65]	144	1			T405	1		T592	6		T400	1
values[66]	99	1			T405	1		T592	7		T400	1
values[67]	91	1			T405	1		T592	5		T400	1
values[68]	118	1			T405	1		T592	7		T400	1
values[69]	91	1			T405	1		T592	7		T400	1
values[70]	86	1			T405	1		T592	8		T400	1
values[71]	75	1			T405	1		T592	2		T400	1
values[72]	67	1			T405	1		T400	1		T453	1
values[73]	85	1			T405	1		T400	1		T453	1
values[74]	84	1			T405	1		T400	1		T453	1
values[75]	62	1			T405	1		T400	1		T453	1
values[76]	68	1			T405	1		T400	1		T453	1
values[77]	59	1			T405	1		T400	1		T453	1
values[78]	53	1			T405	1		T400	1		T453	1
values[79]	42	1			T405	1		T400	1		T453	1
values[80]	46	1			T405	1		T400	1		T453	1
values[81]	45	1			T405	1		T400	1		T453	1
values[82]	32	1			T405	1		T400	1		T453	1
values[83]	58	1			T405	1		T400	1		T453	1
values[84]	38	1			T405	1		T400	1		T453	1
values[85]	47	1			T405	1		T400	1		T453	1
values[86]	40	1			T405	1		T400	1		T453	1
values[87]	65	1			T405	1		T400	1		T453	1
values[88]	59	1			T405	1		T400	1		T453	1
values[89]	59	1			T405	1		T400	1		T453	1
values[90]	62	1			T405	1		T400	3		T453	1
values[91]	48	1			T405	1		T400	2		T453	1
values[92]	65	1			T405	2		T400	6		T453	2
values[93]	86	1			T405	1		T400	9		T453	1
values[94]	64	1			T405	1		T400	4		T453	1
values[95]	63	1			T405	2		T400	2		T453	1
values[96]	76	1			T405	1		T400	7		T453	2
values[97]	69	1			T405	1		T400	1		T453	8
values[98]	83	1			T405	1		T400	3		T453	1
values[99]	65	1			T405	1		T400	11		T453	7
values[100]	55	1			T405	1		T400	2		T453	1
values[101]	60	1			T405	1		T400	1		T453	3
values[102]	53	1			T405	1		T400	2		T453	1
values[103]	64	1			T405	1		T400	2		T453	7
values[104]	68	1			T405	1		T400	4		T453	1
values[105]	59	1			T405	1		T400	3		T453	1
values[106]	70	1			T405	1		T400	1		T453	1
values[107]	64	1			T405	1		T400	6		T453	3
values[108]	66	1			T405	1		T400	2		T453	3
values[109]	80	1			T405	1		T400	4		T453	2
values[110]	83	1			T405	1		T400	1		T453	2
values[111]	63	1			T405	1		T400	2		T453	3
values[112]	56	1			T405	1		T400	3		T453	1
values[113]	63	1			T405	1		T400	3		T453	4
values[114]	58	1			T405	1		T400	1		T453	1
values[115]	62	1			T405	1		T400	1		T453	3
values[116]	58	1			T405	1		T400	2		T453	1
values[117]	61	1			T405	1		T400	1		T453	1
values[118]	48	1			T405	2		T400	1		T453	2
values[119]	53	1			T405	1		T400	1		T453	2
values[120]	50	1			T405	1		T400	2		T453	2
values[121]	43	1			T405	2		T400	3		T453	1
values[122]	48	1			T405	1		T400	1		T453	1
values[123]	40	1			T405	1		T400	1		T453	1
values[124]	51	1			T405	2		T400	5		T453	3
values[125]	64	1			T405	4		T400	1		T453	3
values[126]	84	1			T405	3		T400	1		T453	4
values[127]	817	1			T405	28		T400	40		T453	26
values[128]	7267	1			T405	246		T400	325		T453	269