Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.i2c1_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	139637	1			T75	69		T79	1		T107	8
values[2]	9472	1			T107	1		T80	2		T428	1
values[3]	3694	1			T430	1		T433	1		T454	1
values[4]	2134	1			T430	1		T527	7		T636	14
values[5]	1317	1			T430	1		T636	13		T637	1
values[6]	963	1			T430	1		T636	22		T797	1
values[7]	704	1			T430	1		T636	28		T797	1
values[8]	530	1			T430	1		T636	19		T797	1
values[9]	441	1			T430	1		T636	15		T797	1
values[10]	430	1			T430	1		T636	12		T797	1
values[11]	371	1			T430	1		T636	21		T797	1
values[12]	331	1			T430	1		T636	8		T797	1
values[13]	332	1			T430	1		T636	11		T797	1
values[14]	383	1			T430	1		T636	20		T797	1
values[15]	342	1			T430	1		T636	24		T797	1
values[16]	356	1			T430	1		T636	22		T797	1
values[17]	350	1			T430	1		T636	10		T797	1
values[18]	356	1			T430	1		T636	18		T797	1
values[19]	320	1			T430	1		T636	28		T797	1
values[20]	345	1			T430	1		T636	17		T797	1
values[21]	312	1			T430	1		T636	14		T797	1
values[22]	333	1			T430	1		T636	12		T797	1
values[23]	346	1			T430	1		T636	10		T797	1
values[24]	350	1			T430	1		T636	12		T797	1
values[25]	332	1			T430	1		T636	19		T797	1
values[26]	333	1			T430	1		T636	19		T797	1
values[27]	341	1			T430	1		T636	9		T797	1
values[28]	321	1			T430	1		T636	7		T797	1
values[29]	352	1			T430	1		T636	14		T797	1
values[30]	336	1			T430	1		T636	8		T797	1
values[31]	327	1			T430	1		T636	13		T797	1
values[32]	344	1			T430	1		T636	19		T797	1
values[33]	312	1			T430	1		T636	16		T797	2
values[34]	305	1			T430	1		T636	8		T797	1
values[35]	345	1			T430	1		T636	18		T797	1
values[36]	299	1			T430	1		T636	11		T797	1
values[37]	362	1			T430	1		T636	13		T797	1
values[38]	337	1			T430	1		T636	14		T797	1
values[39]	361	1			T430	1		T636	19		T797	1
values[40]	310	1			T430	1		T636	11		T797	1
values[41]	294	1			T430	1		T636	9		T797	1
values[42]	319	1			T430	1		T636	23		T797	1
values[43]	310	1			T430	1		T636	20		T797	1
values[44]	321	1			T430	1		T636	18		T797	1
values[45]	287	1			T430	1		T636	25		T797	1
values[46]	298	1			T430	1		T636	7		T797	1
values[47]	294	1			T430	1		T636	8		T797	1
values[48]	296	1			T430	1		T636	9		T797	1
values[49]	267	1			T430	1		T636	6		T797	1
values[50]	261	1			T430	1		T636	6		T797	1
values[51]	244	1			T430	2		T636	7		T797	1
values[52]	296	1			T430	1		T636	16		T797	1
values[53]	276	1			T430	1		T636	6		T797	1
values[54]	243	1			T430	1		T636	6		T797	1
values[55]	232	1			T430	1		T636	7		T797	1
values[56]	280	1			T430	1		T636	11		T797	1
values[57]	223	1			T430	1		T636	5		T797	1
values[58]	257	1			T430	1		T636	20		T797	1
values[59]	217	1			T430	1		T636	6		T797	1
values[60]	181	1			T430	1		T636	6		T797	1
values[61]	192	1			T430	1		T636	10		T797	1
values[62]	194	1			T430	1		T636	3		T797	1
values[63]	155	1			T430	1		T636	11		T797	1
values[64]	148	1			T430	1		T636	7		T797	1
values[65]	150	1			T430	1		T636	9		T797	1
values[66]	145	1			T430	1		T636	15		T797	1
values[67]	134	1			T430	1		T636	6		T797	1
values[68]	119	1			T430	1		T636	3		T797	1
values[69]	140	1			T430	1		T636	6		T797	1
values[70]	127	1			T430	1		T797	1		T462	5
values[71]	148	1			T430	1		T797	1		T462	3
values[72]	139	1			T430	1		T797	1		T462	12
values[73]	123	1			T430	1		T797	1		T462	8
values[74]	91	1			T430	1		T797	1		T462	3
values[75]	96	1			T430	1		T797	1		T462	5
values[76]	80	1			T430	1		T797	1		T462	1
values[77]	77	1			T430	1		T797	1		T796	2
values[78]	82	1			T430	1		T797	1		T796	2
values[79]	91	1			T430	1		T797	1		T796	6
values[80]	77	1			T430	1		T797	1		T796	1
values[81]	79	1			T430	1		T797	1		T796	6
values[82]	108	1			T430	1		T797	1		T796	8
values[83]	88	1			T430	1		T797	1		T796	7
values[84]	80	1			T430	1		T797	9		T796	3
values[85]	60	1			T430	1		T797	1		T796	1
values[86]	77	1			T430	1		T797	2		T796	1
values[87]	93	1			T430	1		T797	4		T796	1
values[88]	90	1			T430	1		T797	2		T796	8
values[89]	80	1			T430	1		T797	1		T796	3
values[90]	76	1			T430	1		T797	1		T796	3
values[91]	81	1			T430	1		T797	2		T796	4
values[92]	81	1			T430	1		T797	2		T796	1
values[93]	76	1			T430	1		T797	1		T796	5
values[94]	85	1			T430	1		T797	6		T796	2
values[95]	92	1			T430	1		T797	2		T796	4
values[96]	96	1			T430	1		T797	2		T796	3
values[97]	86	1			T430	1		T797	3		T796	3
values[98]	82	1			T430	1		T797	2		T796	1
values[99]	95	1			T430	1		T797	1		T796	5
values[100]	86	1			T430	1		T797	2		T796	6
values[101]	70	1			T430	1		T797	2		T796	4
values[102]	75	1			T430	1		T797	1		T796	1
values[103]	83	1			T430	1		T797	7		T796	1
values[104]	83	1			T430	1		T797	12		T796	2
values[105]	69	1			T430	1		T797	2		T796	3
values[106]	58	1			T430	1		T797	2		T796	2
values[107]	65	1			T430	1		T797	1		T796	1
values[108]	61	1			T430	1		T797	2		T796	1
values[109]	74	1			T430	1		T797	1		T796	2
values[110]	64	1			T430	1		T797	6		T796	3
values[111]	86	1			T430	1		T797	1		T796	2
values[112]	75	1			T430	1		T797	1		T796	2
values[113]	79	1			T430	1		T797	1		T796	4
values[114]	79	1			T430	1		T797	2		T796	1
values[115]	78	1			T430	1		T797	1		T796	3
values[116]	76	1			T430	1		T797	3		T796	1
values[117]	83	1			T430	1		T797	2		T796	3
values[118]	86	1			T430	1		T797	1		T796	1
values[119]	70	1			T430	1		T797	1		T796	1
values[120]	69	1			T430	1		T797	4		T796	1
values[121]	74	1			T430	2		T797	2		T796	1
values[122]	61	1			T430	1		T797	2		T796	1
values[123]	68	1			T430	1		T797	4		T796	1
values[124]	76	1			T430	1		T797	1		T796	2
values[125]	74	1			T430	1		T797	2		T796	1
values[126]	149	1			T430	3		T797	3		T796	3
values[127]	808	1			T430	29		T797	22		T796	33
values[128]	6796	1			T430	254		T797	289		T796	243