Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.sram_ctrl_main__regs_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	166360	1			T75	73		T76	49		T79	9
values[2]	4591	1			T76	91		T428	1		T427	1
values[3]	2209	1			T76	56		T430	1		T521	1
values[4]	1704	1			T76	69		T430	1		T521	1
values[5]	1339	1			T76	53		T430	1		T521	1
values[6]	1241	1			T76	43		T430	1		T521	1
values[7]	1036	1			T76	34		T430	1		T521	1
values[8]	802	1			T76	38		T430	1		T521	1
values[9]	842	1			T76	31		T430	1		T521	1
values[10]	656	1			T76	25		T430	1		T521	1
values[11]	513	1			T76	21		T430	1		T521	1
values[12]	383	1			T76	10		T430	1		T521	1
values[13]	301	1			T76	3		T430	1		T521	1
values[14]	262	1			T430	1		T521	1		T777	2
values[15]	244	1			T430	1		T521	1		T777	2
values[16]	223	1			T430	1		T521	1		T777	2
values[17]	172	1			T430	1		T521	1		T777	2
values[18]	181	1			T430	1		T521	1		T777	2
values[19]	162	1			T430	1		T521	1		T777	2
values[20]	153	1			T430	1		T521	1		T777	2
values[21]	163	1			T430	1		T521	1		T777	2
values[22]	142	1			T430	1		T521	1		T777	2
values[23]	131	1			T430	1		T521	1		T777	2
values[24]	129	1			T430	1		T521	1		T777	2
values[25]	105	1			T430	1		T521	1		T777	2
values[26]	111	1			T430	1		T521	1		T777	2
values[27]	93	1			T430	1		T521	1		T777	2
values[28]	100	1			T430	1		T521	1		T777	2
values[29]	93	1			T430	1		T521	1		T777	2
values[30]	94	1			T430	1		T521	1		T777	2
values[31]	111	1			T430	1		T521	1		T777	2
values[32]	116	1			T430	1		T521	1		T777	2
values[33]	108	1			T430	1		T521	1		T777	2
values[34]	105	1			T430	1		T521	1		T777	2
values[35]	101	1			T430	1		T521	1		T777	2
values[36]	103	1			T430	1		T521	1		T777	2
values[37]	95	1			T430	1		T521	1		T777	2
values[38]	98	1			T430	1		T521	1		T777	2
values[39]	104	1			T430	1		T521	1		T777	2
values[40]	100	1			T430	1		T521	1		T777	2
values[41]	71	1			T430	1		T521	1		T777	2
values[42]	74	1			T430	1		T521	1		T777	3
values[43]	81	1			T430	1		T521	1		T777	2
values[44]	92	1			T430	1		T521	1		T777	2
values[45]	64	1			T430	1		T521	1		T777	2
values[46]	66	1			T430	1		T521	1		T777	2
values[47]	53	1			T430	1		T521	1		T777	2
values[48]	56	1			T430	1		T521	1		T777	2
values[49]	56	1			T430	1		T521	1		T777	2
values[50]	57	1			T430	1		T521	1		T777	2
values[51]	51	1			T430	1		T521	1		T777	2
values[52]	59	1			T430	1		T521	1		T777	2
values[53]	60	1			T430	1		T521	1		T777	2
values[54]	71	1			T430	1		T521	1		T777	2
values[55]	73	1			T430	1		T521	1		T777	2
values[56]	48	1			T430	1		T521	1		T777	2
values[57]	56	1			T430	1		T521	1		T777	2
values[58]	59	1			T430	1		T521	1		T777	2
values[59]	56	1			T430	1		T521	1		T777	2
values[60]	55	1			T430	1		T521	1		T777	2
values[61]	60	1			T430	1		T521	1		T777	2
values[62]	67	1			T430	1		T521	1		T777	2
values[63]	50	1			T430	1		T521	1		T777	2
values[64]	52	1			T430	1		T521	1		T777	2
values[65]	60	1			T430	1		T521	1		T777	2
values[66]	68	1			T430	1		T521	1		T777	2
values[67]	55	1			T430	1		T521	1		T777	2
values[68]	58	1			T430	1		T521	1		T777	2
values[69]	51	1			T430	1		T521	1		T777	2
values[70]	66	1			T430	1		T521	1		T777	2
values[71]	60	1			T430	1		T521	1		T777	2
values[72]	58	1			T430	1		T521	1		T777	2
values[73]	70	1			T430	1		T521	1		T777	2
values[74]	66	1			T430	1		T521	1		T777	2
values[75]	61	1			T430	1		T521	1		T777	2
values[76]	82	1			T430	1		T521	1		T777	2
values[77]	76	1			T430	1		T521	1		T777	2
values[78]	85	1			T430	1		T521	1		T777	2
values[79]	81	1			T430	1		T521	1		T777	2
values[80]	88	1			T430	1		T521	1		T777	2
values[81]	84	1			T430	2		T521	1		T777	2
values[82]	83	1			T430	4		T521	1		T777	2
values[83]	81	1			T430	2		T521	1		T777	2
values[84]	88	1			T430	2		T521	1		T777	2
values[85]	91	1			T430	2		T521	1		T777	2
values[86]	69	1			T430	4		T521	1		T777	2
values[87]	85	1			T430	5		T521	1		T777	2
values[88]	98	1			T430	8		T521	1		T777	2
values[89]	81	1			T430	2		T521	1		T777	2
values[90]	77	1			T430	2		T521	1		T777	2
values[91]	73	1			T430	4		T521	1		T777	2
values[92]	79	1			T430	1		T521	1		T777	2
values[93]	92	1			T430	4		T521	1		T777	2
values[94]	104	1			T430	5		T521	1		T777	2
values[95]	75	1			T430	1		T521	1		T777	2
values[96]	85	1			T430	1		T521	1		T777	2
values[97]	86	1			T430	2		T521	1		T777	2
values[98]	104	1			T430	3		T521	1		T777	2
values[99]	99	1			T430	3		T521	1		T777	2
values[100]	97	1			T430	1		T521	1		T777	2
values[101]	93	1			T430	1		T521	1		T777	2
values[102]	88	1			T430	2		T521	1		T777	2
values[103]	85	1			T430	2		T521	1		T777	2
values[104]	90	1			T430	1		T521	1		T777	2
values[105]	114	1			T430	2		T521	1		T777	5
values[106]	115	1			T430	1		T521	1		T777	4
values[107]	121	1			T430	2		T521	3		T777	2
values[108]	101	1			T430	3		T521	1		T777	2
values[109]	85	1			T430	1		T521	1		T777	4
values[110]	100	1			T430	2		T521	1		T777	3
values[111]	102	1			T430	1		T521	1		T777	3
values[112]	100	1			T430	1		T521	2		T777	2
values[113]	107	1			T430	1		T521	3		T777	5
values[114]	99	1			T430	1		T521	2		T777	5
values[115]	112	1			T430	1		T521	2		T777	3
values[116]	142	1			T430	2		T521	2		T777	3
values[117]	119	1			T430	1		T521	1		T777	4
values[118]	108	1			T430	2		T521	4		T777	3
values[119]	106	1			T430	1		T521	1		T777	3
values[120]	124	1			T430	2		T521	1		T777	5
values[121]	126	1			T430	2		T521	2		T777	3
values[122]	129	1			T430	2		T521	1		T777	3
values[123]	148	1			T430	2		T521	2		T777	2
values[124]	150	1			T430	4		T521	3		T777	2
values[125]	238	1			T430	7		T521	2		T777	3
values[126]	763	1			T430	16		T521	10		T777	41
values[127]	3794	1			T430	117		T521	115		T777	225
values[128]	6743	1			T430	200		T521	221		T777	392