Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.sram_ctrl_ret_aon__ram_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	141146	1			T75	68		T79	3		T107	5
values[2]	10292	1			T107	2		T80	2		T427	1
values[3]	3992	1			T430	1		T520	9		T519	112
values[4]	2346	1			T430	1		T520	13		T519	45
values[5]	1427	1			T430	1		T520	3		T519	20
values[6]	904	1			T430	1		T520	12		T519	13
values[7]	727	1			T430	1		T520	13		T519	3
values[8]	575	1			T430	1		T520	3		T465	7
values[9]	517	1			T430	1		T520	7		T465	7
values[10]	489	1			T430	1		T520	4		T465	3
values[11]	475	1			T430	1		T520	23		T465	6
values[12]	390	1			T430	1		T520	7		T465	8
values[13]	440	1			T430	1		T520	10		T465	6
values[14]	382	1			T430	1		T520	3		T465	18
values[15]	353	1			T430	1		T520	4		T465	4
values[16]	358	1			T430	1		T520	3		T465	3
values[17]	346	1			T430	1		T520	9		T465	4
values[18]	397	1			T430	1		T520	5		T465	7
values[19]	368	1			T430	1		T520	10		T465	3
values[20]	284	1			T430	1		T520	7		T465	4
values[21]	296	1			T430	1		T520	11		T465	6
values[22]	277	1			T430	1		T520	9		T465	7
values[23]	339	1			T430	1		T520	22		T465	14
values[24]	335	1			T430	1		T520	10		T465	9
values[25]	291	1			T430	1		T520	7		T465	10
values[26]	280	1			T430	1		T520	6		T465	3
values[27]	287	1			T430	1		T520	6		T465	4
values[28]	225	1			T430	1		T520	5		T465	3
values[29]	272	1			T430	1		T520	4		T465	4
values[30]	303	1			T430	1		T520	12		T465	9
values[31]	300	1			T430	1		T520	2		T465	3
values[32]	269	1			T430	1		T520	12		T465	21
values[33]	319	1			T430	1		T520	8		T465	7
values[34]	274	1			T430	1		T520	5		T465	8
values[35]	268	1			T430	1		T520	16		T465	5
values[36]	308	1			T430	1		T520	11		T465	6
values[37]	279	1			T430	1		T520	8		T465	4
values[38]	262	1			T430	1		T520	3		T465	2
values[39]	312	1			T430	1		T520	9		T465	11
values[40]	280	1			T430	1		T520	8		T465	8
values[41]	241	1			T430	1		T520	13		T465	12
values[42]	269	1			T430	1		T520	12		T465	7
values[43]	301	1			T430	1		T520	7		T465	20
values[44]	306	1			T430	1		T520	9		T465	6
values[45]	255	1			T430	1		T520	4		T465	4
values[46]	251	1			T430	1		T520	6		T465	12
values[47]	245	1			T430	1		T520	4		T465	9
values[48]	296	1			T430	1		T520	6		T465	6
values[49]	219	1			T430	1		T520	6		T465	3
values[50]	228	1			T430	1		T520	6		T465	5
values[51]	286	1			T430	1		T520	16		T465	7
values[52]	277	1			T430	1		T520	3		T465	3
values[53]	215	1			T430	1		T520	3		T465	9
values[54]	297	1			T430	1		T520	8		T465	8
values[55]	317	1			T430	1		T520	12		T465	9
values[56]	274	1			T430	1		T520	6		T465	20
values[57]	198	1			T430	1		T520	12		T465	5
values[58]	234	1			T430	1		T520	4		T465	14
values[59]	225	1			T430	1		T520	6		T465	5
values[60]	208	1			T430	1		T520	11		T465	8
values[61]	205	1			T430	1		T520	21		T465	4
values[62]	217	1			T430	1		T520	3		T465	11
values[63]	188	1			T430	1		T520	5		T465	5
values[64]	157	1			T430	1		T520	5		T465	3
values[65]	182	1			T430	1		T520	2		T465	4
values[66]	155	1			T430	1		T465	7		T818	7
values[67]	137	1			T430	1		T465	11		T818	6
values[68]	114	1			T430	1		T465	3		T818	9
values[69]	112	1			T430	1		T465	4		T818	6
values[70]	121	1			T430	1		T465	6		T818	6
values[71]	104	1			T430	1		T465	5		T818	5
values[72]	93	1			T430	1		T818	7		T795	1
values[73]	100	1			T430	1		T818	8		T795	1
values[74]	96	1			T430	1		T818	11		T795	1
values[75]	85	1			T430	1		T818	7		T795	1
values[76]	72	1			T430	1		T818	6		T795	1
values[77]	91	1			T430	1		T818	5		T795	1
values[78]	72	1			T430	1		T818	3		T795	1
values[79]	59	1			T430	1		T818	4		T795	1
values[80]	77	1			T430	1		T818	3		T795	1
values[81]	99	1			T430	1		T818	1		T795	1
values[82]	83	1			T430	1		T795	1		T436	1
values[83]	75	1			T430	1		T795	1		T436	1
values[84]	60	1			T430	1		T795	1		T436	1
values[85]	74	1			T430	1		T795	1		T436	1
values[86]	68	1			T430	1		T795	1		T436	1
values[87]	77	1			T430	1		T795	1		T436	1
values[88]	74	1			T430	1		T795	1		T436	1
values[89]	67	1			T430	1		T795	1		T436	1
values[90]	75	1			T430	1		T795	1		T436	1
values[91]	93	1			T430	1		T795	1		T436	1
values[92]	88	1			T430	1		T795	1		T436	1
values[93]	73	1			T430	1		T795	1		T436	1
values[94]	80	1			T430	1		T795	1		T436	1
values[95]	72	1			T430	1		T795	1		T436	1
values[96]	70	1			T430	1		T795	1		T436	1
values[97]	76	1			T430	1		T795	1		T436	1
values[98]	72	1			T430	1		T795	1		T436	1
values[99]	86	1			T430	2		T795	1		T436	1
values[100]	80	1			T430	4		T795	1		T436	1
values[101]	77	1			T430	2		T795	1		T436	1
values[102]	80	1			T430	1		T795	1		T436	1
values[103]	64	1			T430	2		T795	1		T436	1
values[104]	78	1			T430	2		T795	1		T436	1
values[105]	85	1			T430	1		T795	1		T436	1
values[106]	83	1			T430	1		T795	1		T436	1
values[107]	82	1			T430	4		T795	1		T436	1
values[108]	75	1			T430	2		T795	1		T436	1
values[109]	78	1			T430	1		T795	1		T436	1
values[110]	73	1			T430	1		T795	4		T436	1
values[111]	69	1			T430	3		T795	3		T436	1
values[112]	66	1			T430	2		T795	4		T436	1
values[113]	74	1			T430	3		T795	6		T436	1
values[114]	70	1			T430	1		T795	1		T436	4
values[115]	75	1			T430	2		T795	2		T436	1
values[116]	73	1			T430	2		T795	1		T436	1
values[117]	66	1			T430	2		T795	1		T436	4
values[118]	74	1			T430	1		T795	1		T436	2
values[119]	85	1			T430	4		T795	3		T436	2
values[120]	68	1			T430	1		T795	2		T436	1
values[121]	69	1			T430	2		T795	3		T436	1
values[122]	67	1			T430	3		T795	2		T436	1
values[123]	68	1			T430	2		T795	1		T436	2
values[124]	65	1			T430	1		T795	1		T436	1
values[125]	84	1			T430	2		T795	4		T436	2
values[126]	119	1			T430	3		T795	4		T436	1
values[127]	893	1			T430	33		T795	31		T436	39
values[128]	7979	1			T430	316		T795	355		T436	334