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Group Instance : alert_esc_agent_pkg.m_alert_handshake_complete_cg_(56)
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(56)

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00
Crosses 1 0 1 100.00


Variables for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(56)
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_handshake_complete 1 0 1 100.00 100 1 1 0
cp_trans_type 1 0 1 100.00 100 1 1 0


Crosses for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(56)
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
alert_handshake_complete 1 0 1 100.00 100 1 1 0



Group Instance : alert_esc_agent_pkg.m_alert_handshake_complete_cg_(57)
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(57)

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00
Crosses 1 0 1 100.00


Variables for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(57)
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_handshake_complete 1 0 1 100.00 100 1 1 0
cp_trans_type 1 0 1 100.00 100 1 1 0


Crosses for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(57)
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
alert_handshake_complete 1 0 1 100.00 100 1 1 0



Group Instance : alert_esc_agent_pkg.m_alert_handshake_complete_cg_(58)
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(58)

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00
Crosses 1 0 1 100.00


Variables for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(58)
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_handshake_complete 1 0 1 100.00 100 1 1 0
cp_trans_type 1 0 1 100.00 100 1 1 0


Crosses for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(58)
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
alert_handshake_complete 1 0 1 100.00 100 1 1 0



Group Instance : alert_esc_agent_pkg.m_alert_handshake_complete_cg_(59)
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(59)

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00
Crosses 1 0 1 100.00


Variables for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(59)
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_handshake_complete 1 0 1 100.00 100 1 1 0
cp_trans_type 1 0 1 100.00 100 1 1 0


Crosses for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(59)
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
alert_handshake_complete 1 0 1 100.00 100 1 1 0



Group Instance : alert_esc_agent_pkg.m_alert_handshake_complete_cg_(6)
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(6)

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00
Crosses 1 0 1 100.00


Variables for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(6)
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_handshake_complete 1 0 1 100.00 100 1 1 0
cp_trans_type 1 0 1 100.00 100 1 1 0


Crosses for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(6)
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
alert_handshake_complete 1 0 1 100.00 100 1 1 0



Group Instance : alert_esc_agent_pkg.m_alert_handshake_complete_cg_(60)
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(60)

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00
Crosses 1 0 1 100.00


Variables for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(60)
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_handshake_complete 1 0 1 100.00 100 1 1 0
cp_trans_type 1 0 1 100.00 100 1 1 0


Crosses for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(60)
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
alert_handshake_complete 1 0 1 100.00 100 1 1 0



Group Instance : alert_esc_agent_pkg.m_alert_handshake_complete_cg_(61)
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(61)

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00
Crosses 1 0 1 100.00


Variables for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(61)
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_handshake_complete 1 0 1 100.00 100 1 1 0
cp_trans_type 1 0 1 100.00 100 1 1 0


Crosses for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(61)
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
alert_handshake_complete 1 0 1 100.00 100 1 1 0



Group Instance : alert_esc_agent_pkg.m_alert_handshake_complete_cg_(62)
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(62)

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00
Crosses 1 0 1 100.00


Variables for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(62)
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_handshake_complete 1 0 1 100.00 100 1 1 0
cp_trans_type 1 0 1 100.00 100 1 1 0


Crosses for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(62)
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
alert_handshake_complete 1 0 1 100.00 100 1 1 0



Group Instance : alert_esc_agent_pkg.m_alert_handshake_complete_cg_(63)
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(63)

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00
Crosses 1 0 1 100.00


Variables for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(63)
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_handshake_complete 1 0 1 100.00 100 1 1 0
cp_trans_type 1 0 1 100.00 100 1 1 0


Crosses for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(63)
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
alert_handshake_complete 1 0 1 100.00 100 1 1 0



Group Instance : alert_esc_agent_pkg.m_alert_handshake_complete_cg_(64)
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(64)

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00
Crosses 1 0 1 100.00


Variables for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(64)
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_handshake_complete 1 0 1 100.00 100 1 1 0
cp_trans_type 1 0 1 100.00 100 1 1 0


Crosses for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(64)
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
alert_handshake_complete 1 0 1 100.00 100 1 1 0



Group Instance : alert_esc_agent_pkg.m_alert_handshake_complete_cg_(7)
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(7)

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00
Crosses 1 0 1 100.00


Variables for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(7)
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_handshake_complete 1 0 1 100.00 100 1 1 0
cp_trans_type 1 0 1 100.00 100 1 1 0


Crosses for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(7)
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
alert_handshake_complete 1 0 1 100.00 100 1 1 0



Group Instance : alert_esc_agent_pkg.m_alert_handshake_complete_cg_(8)
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(8)

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00
Crosses 1 0 1 100.00


Variables for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(8)
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_handshake_complete 1 0 1 100.00 100 1 1 0
cp_trans_type 1 0 1 100.00 100 1 1 0


Crosses for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(8)
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
alert_handshake_complete 1 0 1 100.00 100 1 1 0



Group Instance : alert_esc_agent_pkg.m_alert_handshake_complete_cg_(9)
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(9)

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 2 0 2 100.00
Crosses 1 0 1 100.00


Variables for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(9)
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_handshake_complete 1 0 1 100.00 100 1 1 0
cp_trans_type 1 0 1 100.00 100 1 1 0


Crosses for Group Instance alert_esc_agent_pkg.m_alert_handshake_complete_cg_(9)
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
alert_handshake_complete 1 0 1 100.00 100 1 1 0

Go back
Group Instances:
alert_esc_agent_pkg.m_alert_handshake_complete_cg_(56)
alert_esc_agent_pkg.m_alert_handshake_complete_cg_(57)
alert_esc_agent_pkg.m_alert_handshake_complete_cg_(58)
alert_esc_agent_pkg.m_alert_handshake_complete_cg_(59)
alert_esc_agent_pkg.m_alert_handshake_complete_cg_(6)
alert_esc_agent_pkg.m_alert_handshake_complete_cg_(60)
alert_esc_agent_pkg.m_alert_handshake_complete_cg_(61)
alert_esc_agent_pkg.m_alert_handshake_complete_cg_(62)
alert_esc_agent_pkg.m_alert_handshake_complete_cg_(63)
alert_esc_agent_pkg.m_alert_handshake_complete_cg_(64)
alert_esc_agent_pkg.m_alert_handshake_complete_cg_(7)
alert_esc_agent_pkg.m_alert_handshake_complete_cg_(8)
alert_esc_agent_pkg.m_alert_handshake_complete_cg_(9)

Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 3956 1 T85 45 T102 1 T80 3



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 3959 1 T85 45 T102 1 T80 3



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 3956 1 T85 45 T102 1 T80 3


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 1951 1 T80 4 T81 1 T226 1720



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 1952 1 T80 4 T81 1 T226 1721



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 1951 1 T80 4 T81 1 T226 1720


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 99 1 T74 1 T50 1 T51 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 102 1 T74 1 T50 1 T120 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 99 1 T74 1 T50 1 T51 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 4866 1 T691 523 T692 524 T755 523



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 4870 1 T691 523 T692 524 T755 523



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 4866 1 T691 523 T692 524 T755 523


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 7652 1 T80 2 T676 1171 T677 1724



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 7652 1 T80 2 T676 1171 T677 1724



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 7652 1 T80 2 T676 1171 T677 1724


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 3562 1 T684 817 T117 2 T347 512



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 3565 1 T684 818 T117 2 T347 512



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 3562 1 T684 817 T117 2 T347 512


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 3585 1 T32 806 T172 530 T117 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 3587 1 T32 806 T172 530 T117 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 3585 1 T32 806 T172 530 T117 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 901 1 T117 1 T685 812 T224 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 902 1 T117 1 T685 813 T224 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 901 1 T117 1 T685 812 T224 1


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 618 1 T117 1 T224 1 T747 525



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 618 1 T117 1 T224 1 T747 525



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 618 1 T117 1 T224 1 T747 525


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 4108 1 T85 51 T80 4 T196 110



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 4109 1 T85 51 T80 4 T196 110



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 4108 1 T85 51 T80 4 T196 110


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 213 1 T80 5 T81 1 T82 60



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 213 1 T80 5 T81 1 T82 60



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 213 1 T80 5 T81 1 T82 60


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 11781 1 T80 5 T674 1729 T675 1733



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 11785 1 T80 5 T674 1730 T675 1734



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 11781 1 T80 5 T674 1729 T675 1733


Summary for Variable cp_handshake_complete

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_handshake_complete

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete 238 1 T1 2 T80 5 T72 1



Summary for Variable cp_trans_type

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_trans_type

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
alert_triggered 238 1 T1 2 T80 5 T72 1



Summary for Cross alert_handshake_complete

Samples crossed: cp_handshake_complete cp_trans_type
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 1 0 1 100.00


Automatically Generated Cross Bins for alert_handshake_complete

Bins
cp_handshake_completecp_trans_typeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
complete alert_triggered 238 1 T1 2 T80 5 T72 1

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%