Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.ast_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	139476	1			T69	89		T70	2		T76	4
values[2]	10841	1			T69	5		T463	1		T417	3
values[3]	4537	1			T522	1		T393	2		T667	4
values[4]	2652	1			T522	1		T491	3		T619	1
values[5]	1727	1			T522	1		T491	10		T837	24
values[6]	1191	1			T522	1		T837	23		T845	12
values[7]	724	1			T522	1		T837	6		T845	14
values[8]	576	1			T522	1		T845	7		T831	16
values[9]	406	1			T522	1		T845	2		T831	11
values[10]	337	1			T522	1		T831	10		T832	2
values[11]	303	1			T522	1		T831	4		T832	1
values[12]	331	1			T522	1		T831	14		T832	1
values[13]	276	1			T522	1		T831	14		T832	1
values[14]	272	1			T522	1		T831	4		T832	1
values[15]	237	1			T522	1		T831	8		T832	1
values[16]	257	1			T522	1		T831	7		T832	1
values[17]	266	1			T522	1		T831	5		T832	1
values[18]	217	1			T522	1		T831	4		T832	1
values[19]	227	1			T522	1		T831	12		T832	1
values[20]	246	1			T522	1		T831	3		T832	1
values[21]	226	1			T522	1		T831	7		T832	1
values[22]	201	1			T522	1		T831	8		T832	1
values[23]	265	1			T522	1		T831	12		T832	1
values[24]	285	1			T522	1		T831	6		T832	1
values[25]	235	1			T522	1		T831	3		T832	1
values[26]	255	1			T522	1		T831	6		T832	1
values[27]	183	1			T522	1		T831	4		T832	1
values[28]	250	1			T522	1		T831	7		T832	1
values[29]	242	1			T522	1		T831	28		T832	1
values[30]	242	1			T522	1		T831	12		T832	1
values[31]	205	1			T522	1		T831	4		T832	1
values[32]	229	1			T522	1		T831	5		T832	1
values[33]	195	1			T522	1		T831	6		T832	1
values[34]	250	1			T522	1		T831	3		T832	1
values[35]	232	1			T522	1		T831	3		T832	1
values[36]	185	1			T522	1		T831	3		T832	1
values[37]	222	1			T522	1		T831	2		T832	1
values[38]	275	1			T522	1		T831	14		T832	1
values[39]	221	1			T522	1		T831	5		T832	1
values[40]	225	1			T522	1		T831	3		T832	1
values[41]	248	1			T522	1		T831	8		T832	1
values[42]	279	1			T522	1		T831	17		T832	1
values[43]	220	1			T522	1		T831	3		T832	1
values[44]	226	1			T522	1		T831	4		T832	1
values[45]	230	1			T522	1		T831	8		T832	1
values[46]	233	1			T522	1		T831	5		T832	1
values[47]	231	1			T522	2		T831	7		T832	1
values[48]	179	1			T522	1		T831	8		T832	1
values[49]	186	1			T522	1		T831	7		T832	1
values[50]	183	1			T522	1		T831	8		T832	1
values[51]	251	1			T522	1		T831	31		T832	1
values[52]	199	1			T522	1		T831	6		T832	1
values[53]	174	1			T522	1		T831	13		T832	1
values[54]	188	1			T522	1		T831	4		T832	1
values[55]	186	1			T522	1		T831	5		T832	1
values[56]	186	1			T522	1		T831	5		T832	1
values[57]	193	1			T522	1		T831	7		T832	1
values[58]	209	1			T522	1		T831	7		T832	1
values[59]	227	1			T522	1		T831	6		T832	2
values[60]	152	1			T522	1		T831	8		T832	1
values[61]	171	1			T522	1		T831	11		T832	1
values[62]	168	1			T522	1		T831	5		T832	1
values[63]	158	1			T522	1		T831	7		T832	1
values[64]	180	1			T522	1		T831	6		T832	1
values[65]	149	1			T522	1		T831	7		T832	1
values[66]	120	1			T522	1		T831	12		T832	1
values[67]	154	1			T522	1		T831	5		T832	1
values[68]	147	1			T522	1		T831	4		T832	1
values[69]	145	1			T522	1		T831	8		T832	1
values[70]	108	1			T522	1		T831	5		T832	1
values[71]	88	1			T522	1		T831	5		T832	1
values[72]	82	1			T522	1		T832	1		T846	1
values[73]	108	1			T522	1		T832	1		T846	1
values[74]	74	1			T522	1		T832	1		T846	1
values[75]	88	1			T522	1		T832	1		T846	1
values[76]	71	1			T522	1		T832	1		T846	1
values[77]	93	1			T522	1		T832	1		T846	1
values[78]	76	1			T522	1		T832	1		T846	1
values[79]	83	1			T522	1		T832	1		T846	1
values[80]	79	1			T522	1		T832	1		T846	1
values[81]	75	1			T522	1		T832	1		T846	1
values[82]	57	1			T522	1		T832	1		T846	1
values[83]	56	1			T522	1		T832	1		T846	1
values[84]	58	1			T522	1		T832	1		T846	1
values[85]	53	1			T522	1		T832	1		T846	1
values[86]	62	1			T522	1		T832	1		T846	1
values[87]	55	1			T522	1		T832	1		T846	1
values[88]	54	1			T522	1		T832	1		T846	1
values[89]	54	1			T522	1		T832	1		T846	1
values[90]	51	1			T522	1		T832	1		T846	1
values[91]	66	1			T522	1		T832	1		T846	1
values[92]	73	1			T522	1		T832	1		T846	1
values[93]	66	1			T522	1		T832	1		T846	1
values[94]	73	1			T522	1		T832	1		T846	1
values[95]	102	1			T522	2		T832	1		T846	2
values[96]	60	1			T522	1		T832	4		T846	1
values[97]	45	1			T522	1		T832	3		T846	1
values[98]	62	1			T522	1		T832	4		T846	1
values[99]	83	1			T522	1		T832	1		T846	1
values[100]	69	1			T522	1		T832	1		T846	3
values[101]	66	1			T522	2		T832	2		T846	1
values[102]	60	1			T522	1		T832	3		T846	1
values[103]	67	1			T522	1		T832	10		T846	1
values[104]	64	1			T522	3		T832	2		T846	3
values[105]	78	1			T522	3		T832	2		T846	1
values[106]	62	1			T522	2		T832	8		T846	1
values[107]	63	1			T522	1		T832	5		T846	1
values[108]	59	1			T522	1		T832	5		T846	1
values[109]	55	1			T522	2		T832	4		T846	2
values[110]	48	1			T522	1		T832	1		T846	1
values[111]	63	1			T522	1		T832	4		T846	4
values[112]	61	1			T522	1		T832	3		T846	3
values[113]	55	1			T522	1		T832	3		T846	1
values[114]	64	1			T522	1		T832	2		T846	3
values[115]	56	1			T522	2		T832	1		T846	2
values[116]	53	1			T522	2		T832	1		T846	1
values[117]	51	1			T522	1		T832	2		T846	1
values[118]	58	1			T522	2		T832	1		T846	1
values[119]	61	1			T522	3		T832	2		T846	2
values[120]	46	1			T522	1		T832	2		T846	2
values[121]	45	1			T522	2		T832	1		T846	1
values[122]	50	1			T522	1		T832	1		T846	2
values[123]	63	1			T522	2		T832	1		T846	2
values[124]	59	1			T522	1		T832	2		T846	2
values[125]	48	1			T522	1		T832	2		T846	1
values[126]	60	1			T522	1		T832	2		T846	2
values[127]	811	1			T522	31		T832	22		T846	29
values[128]	7798	1			T522	272		T832	266		T846	284