Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.spi_host1_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	135672	1			T69	81		T70	6		T76	8
values[2]	6986	1			T69	1		T77	1		T78	1
values[3]	3141	1			T463	1		T701	10		T522	1
values[4]	1852	1			T701	10		T522	1		T521	13
values[5]	1305	1			T701	8		T522	1		T521	5
values[6]	923	1			T701	9		T522	1		T664	4
values[7]	746	1			T701	4		T522	1		T664	3
values[8]	705	1			T701	14		T522	1		T587	16
values[9]	613	1			T701	3		T522	1		T587	14
values[10]	538	1			T701	4		T522	1		T587	3
values[11]	593	1			T701	8		T522	1		T587	2
values[12]	461	1			T701	28		T522	1		T587	2
values[13]	425	1			T701	8		T522	1		T587	3
values[14]	466	1			T701	3		T522	1		T848	1
values[15]	490	1			T701	5		T522	1		T848	1
values[16]	494	1			T701	6		T522	1		T848	1
values[17]	479	1			T701	14		T522	1		T848	1
values[18]	497	1			T701	15		T522	1		T848	1
values[19]	426	1			T701	7		T522	1		T848	1
values[20]	446	1			T701	4		T522	1		T848	1
values[21]	458	1			T701	8		T522	1		T848	1
values[22]	400	1			T701	12		T522	1		T848	1
values[23]	398	1			T701	28		T522	1		T848	1
values[24]	440	1			T701	7		T522	1		T848	1
values[25]	430	1			T701	8		T522	1		T848	1
values[26]	321	1			T701	6		T522	1		T848	1
values[27]	368	1			T701	19		T522	1		T848	1
values[28]	414	1			T701	14		T522	1		T848	1
values[29]	411	1			T701	10		T522	1		T848	1
values[30]	376	1			T701	12		T522	1		T848	1
values[31]	434	1			T701	12		T522	1		T848	1
values[32]	403	1			T701	6		T522	1		T848	1
values[33]	407	1			T701	4		T522	2		T848	1
values[34]	358	1			T701	22		T522	1		T848	1
values[35]	408	1			T701	19		T522	1		T848	1
values[36]	408	1			T701	10		T522	1		T848	1
values[37]	384	1			T701	10		T522	1		T848	1
values[38]	347	1			T701	7		T522	1		T848	1
values[39]	283	1			T701	7		T522	1		T848	1
values[40]	293	1			T701	4		T522	1		T848	1
values[41]	301	1			T701	10		T522	1		T848	1
values[42]	302	1			T701	3		T522	1		T848	1
values[43]	321	1			T701	9		T522	1		T848	1
values[44]	294	1			T701	4		T522	1		T848	1
values[45]	291	1			T701	7		T522	1		T848	1
values[46]	204	1			T701	9		T522	1		T848	1
values[47]	242	1			T701	15		T522	1		T848	1
values[48]	224	1			T701	28		T522	1		T848	1
values[49]	163	1			T701	13		T522	1		T848	1
values[50]	124	1			T701	8		T522	1		T848	1
values[51]	122	1			T701	5		T522	1		T848	1
values[52]	129	1			T701	11		T522	1		T848	1
values[53]	105	1			T701	3		T522	1		T848	1
values[54]	136	1			T522	1		T848	1		T850	4
values[55]	106	1			T522	1		T848	1		T850	2
values[56]	97	1			T522	1		T848	1		T850	8
values[57]	93	1			T522	1		T848	1		T850	2
values[58]	84	1			T522	1		T848	1		T850	3
values[59]	97	1			T522	1		T848	1		T850	7
values[60]	84	1			T522	1		T848	1		T850	3
values[61]	90	1			T522	1		T848	1		T850	3
values[62]	110	1			T522	1		T848	1		T850	4
values[63]	126	1			T522	1		T848	1		T850	5
values[64]	100	1			T522	1		T848	1		T850	1
values[65]	126	1			T522	1		T848	1		T850	2
values[66]	92	1			T522	1		T848	1		T850	5
values[67]	97	1			T522	1		T848	1		T850	2
values[68]	117	1			T522	1		T848	1		T850	1
values[69]	93	1			T522	1		T848	1		T850	2
values[70]	80	1			T522	1		T848	1		T850	5
values[71]	102	1			T522	1		T848	1		T850	5
values[72]	107	1			T522	1		T848	1		T850	3
values[73]	89	1			T522	1		T848	1		T850	6
values[74]	81	1			T522	1		T848	1		T850	9
values[75]	84	1			T522	1		T848	1		T850	13
values[76]	94	1			T522	1		T848	1		T850	15
values[77]	93	1			T522	1		T848	1		T850	16
values[78]	120	1			T522	1		T848	1		T850	27
values[79]	79	1			T522	1		T848	1		T850	14
values[80]	72	1			T522	1		T848	1		T850	6
values[81]	104	1			T522	14		T848	2		T850	14
values[82]	107	1			T522	9		T848	1		T850	8
values[83]	75	1			T522	10		T848	1		T850	4
values[84]	83	1			T522	1		T848	1		T850	13
values[85]	108	1			T522	1		T848	1		T850	11
values[86]	85	1			T522	3		T848	1		T850	5
values[87]	88	1			T522	2		T848	1		T850	4
values[88]	87	1			T522	4		T848	1		T850	1
values[89]	83	1			T522	1		T848	1		T873	19
values[90]	81	1			T522	3		T848	1		T873	7
values[91]	76	1			T522	7		T848	1		T873	2
values[92]	75	1			T522	1		T848	1		T846	1
values[93]	73	1			T522	3		T848	1		T846	1
values[94]	76	1			T522	4		T848	1		T846	1
values[95]	54	1			T522	2		T848	1		T846	1
values[96]	45	1			T522	1		T848	1		T846	1
values[97]	60	1			T522	1		T848	1		T846	1
values[98]	66	1			T522	4		T848	1		T846	1
values[99]	55	1			T522	3		T848	1		T846	2
values[100]	56	1			T522	1		T848	1		T846	5
values[101]	60	1			T522	1		T848	1		T846	1
values[102]	75	1			T522	2		T848	1		T846	4
values[103]	65	1			T522	2		T848	1		T846	2
values[104]	52	1			T522	2		T848	1		T846	2
values[105]	52	1			T522	1		T848	1		T846	1
values[106]	65	1			T522	1		T848	1		T846	4
values[107]	54	1			T522	2		T848	1		T846	3
values[108]	69	1			T522	3		T848	1		T846	1
values[109]	63	1			T522	1		T848	1		T846	1
values[110]	66	1			T522	3		T848	1		T846	1
values[111]	60	1			T522	1		T848	1		T846	3
values[112]	54	1			T522	2		T848	1		T846	1
values[113]	68	1			T522	6		T848	1		T846	1
values[114]	57	1			T522	1		T848	1		T846	4
values[115]	46	1			T522	2		T848	1		T846	1
values[116]	54	1			T522	5		T848	1		T846	1
values[117]	59	1			T522	4		T848	4		T846	3
values[118]	58	1			T522	2		T848	3		T846	1
values[119]	61	1			T522	1		T848	4		T846	8
values[120]	67	1			T522	2		T848	2		T846	6
values[121]	61	1			T522	2		T848	9		T846	4
values[122]	63	1			T522	2		T848	4		T846	7
values[123]	64	1			T522	1		T848	1		T846	1
values[124]	42	1			T522	3		T848	1		T846	1
values[125]	45	1			T522	1		T848	1		T846	2
values[126]	116	1			T522	3		T848	2		T846	4
values[127]	1583	1			T522	60		T848	52		T846	65
values[128]	7255	1			T522	233		T848	321		T846	302