Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.rv_timer_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	140064	1			T74	69		T75	5		T76	108
values[2]	9138	1			T398	3		T484	1		T401	112
values[3]	3171	1			T401	20		T506	1		T742	14
values[4]	1725	1			T401	8		T742	4		T443	63
values[5]	1119	1			T401	8		T742	3		T443	24
values[6]	777	1			T401	9		T742	8		T443	16
values[7]	578	1			T401	5		T742	2		T443	6
values[8]	459	1			T401	3		T742	4		T443	3
values[9]	392	1			T401	2		T742	3		T404	3
values[10]	409	1			T401	4		T742	1		T404	10
values[11]	388	1			T401	2		T742	1		T404	12
values[12]	354	1			T401	10		T742	5		T404	1
values[13]	377	1			T401	5		T742	4		T408	5
values[14]	351	1			T401	1		T742	9		T408	8
values[15]	416	1			T401	5		T742	13		T408	7
values[16]	337	1			T401	6		T742	10		T408	4
values[17]	338	1			T401	5		T742	4		T408	5
values[18]	347	1			T401	6		T742	1		T408	5
values[19]	316	1			T401	7		T742	3		T408	20
values[20]	331	1			T401	3		T742	2		T408	11
values[21]	300	1			T401	1		T742	1		T408	10
values[22]	358	1			T401	1		T742	4		T408	16
values[23]	291	1			T401	3		T742	2		T408	5
values[24]	337	1			T401	3		T742	2		T408	9
values[25]	321	1			T401	1		T742	2		T408	3
values[26]	341	1			T401	6		T742	3		T408	10
values[27]	318	1			T401	9		T742	1		T408	3
values[28]	304	1			T401	2		T742	1		T408	3
values[29]	286	1			T742	4		T408	5		T561	3
values[30]	292	1			T742	5		T408	9		T561	6
values[31]	286	1			T742	3		T408	4		T561	3
values[32]	311	1			T742	1		T408	5		T561	7
values[33]	317	1			T742	2		T408	4		T561	4
values[34]	303	1			T742	2		T408	9		T561	9
values[35]	307	1			T742	2		T408	8		T561	4
values[36]	335	1			T742	2		T408	8		T561	4
values[37]	312	1			T742	3		T408	6		T561	11
values[38]	315	1			T742	1		T408	3		T561	10
values[39]	331	1			T742	7		T408	24		T561	11
values[40]	297	1			T742	3		T408	12		T561	12
values[41]	292	1			T742	1		T408	9		T561	3
values[42]	291	1			T742	4		T408	10		T561	3
values[43]	276	1			T742	4		T408	3		T561	8
values[44]	264	1			T742	4		T408	3		T561	8
values[45]	330	1			T742	3		T408	9		T561	3
values[46]	338	1			T742	7		T408	9		T561	8
values[47]	296	1			T742	3		T408	10		T561	9
values[48]	265	1			T742	1		T408	4		T561	3
values[49]	297	1			T742	4		T408	7		T561	9
values[50]	268	1			T742	3		T408	6		T561	26
values[51]	260	1			T742	1		T408	17		T561	5
values[52]	306	1			T742	2		T408	2		T561	6
values[53]	285	1			T742	7		T408	11		T561	5
values[54]	270	1			T742	2		T408	18		T561	5
values[55]	243	1			T742	2		T408	9		T561	6
values[56]	249	1			T742	2		T408	10		T561	9
values[57]	305	1			T742	1		T408	5		T561	7
values[58]	299	1			T742	1		T408	9		T561	4
values[59]	240	1			T742	2		T408	9		T561	6
values[60]	249	1			T742	6		T408	5		T561	5
values[61]	199	1			T742	1		T408	7		T561	4
values[62]	155	1			T742	2		T408	3		T561	3
values[63]	162	1			T742	3		T408	7		T561	8
values[64]	167	1			T742	1		T408	11		T561	11
values[65]	144	1			T742	1		T408	7		T561	11
values[66]	149	1			T742	2		T408	4		T561	5
values[67]	124	1			T742	6		T408	4		T561	6
values[68]	121	1			T742	4		T408	2		T561	9
values[69]	107	1			T742	1		T561	9		T736	1
values[70]	114	1			T742	2		T561	11		T736	2
values[71]	95	1			T742	1		T736	1		T428	1
values[72]	67	1			T742	5		T736	2		T428	1
values[73]	53	1			T742	2		T736	1		T428	1
values[74]	60	1			T742	6		T736	1		T428	1
values[75]	73	1			T742	7		T736	8		T428	1
values[76]	79	1			T742	5		T736	6		T428	1
values[77]	83	1			T742	9		T736	2		T428	1
values[78]	60	1			T742	9		T736	2		T428	1
values[79]	63	1			T742	11		T736	4		T428	1
values[80]	70	1			T742	8		T736	2		T428	1
values[81]	60	1			T742	8		T736	1		T428	1
values[82]	62	1			T736	3		T428	1		T755	2
values[83]	63	1			T736	1		T428	1		T755	2
values[84]	62	1			T736	6		T428	1		T755	6
values[85]	71	1			T736	6		T428	1		T755	7
values[86]	48	1			T736	3		T428	1		T755	3
values[87]	71	1			T736	2		T428	1		T755	5
values[88]	69	1			T736	4		T428	1		T755	4
values[89]	66	1			T736	1		T428	1		T755	2
values[90]	55	1			T736	1		T428	1		T755	4
values[91]	77	1			T736	2		T428	1		T755	3
values[92]	95	1			T736	8		T428	1		T755	5
values[93]	87	1			T736	2		T428	1		T755	7
values[94]	67	1			T736	1		T428	1		T755	4
values[95]	79	1			T736	4		T428	1		T755	2
values[96]	64	1			T736	6		T428	1		T755	4
values[97]	53	1			T736	1		T428	1		T755	2
values[98]	52	1			T736	1		T428	2		T755	2
values[99]	51	1			T736	2		T428	4		T755	3
values[100]	56	1			T736	4		T428	3		T755	4
values[101]	70	1			T736	5		T428	1		T755	3
values[102]	62	1			T736	8		T428	1		T755	8
values[103]	53	1			T736	10		T428	2		T755	3
values[104]	62	1			T736	6		T428	1		T755	6
values[105]	49	1			T736	2		T428	3		T755	2
values[106]	53	1			T736	2		T428	3		T755	3
values[107]	66	1			T736	4		T428	3		T755	5
values[108]	58	1			T736	3		T428	3		T755	2
values[109]	72	1			T736	10		T428	5		T755	3
values[110]	57	1			T736	4		T428	2		T755	3
values[111]	58	1			T736	6		T428	2		T755	4
values[112]	53	1			T736	5		T428	2		T755	3
values[113]	62	1			T736	15		T428	1		T755	6
values[114]	68	1			T736	7		T428	1		T755	2
values[115]	55	1			T736	3		T428	1		T755	6
values[116]	55	1			T736	5		T428	4		T755	3
values[117]	65	1			T736	9		T428	6		T755	3
values[118]	68	1			T736	3		T428	3		T755	4
values[119]	74	1			T736	6		T428	3		T755	6
values[120]	85	1			T736	8		T428	2		T755	9
values[121]	62	1			T736	2		T428	1		T755	9
values[122]	55	1			T736	6		T428	1		T755	3
values[123]	41	1			T736	2		T428	3		T755	3
values[124]	62	1			T736	2		T428	2		T755	2
values[125]	59	1			T736	7		T428	2		T755	3
values[126]	93	1			T736	9		T428	2		T755	3
values[127]	673	1			T736	31		T428	29		T755	56
values[128]	6379	1			T736	19		T428	324		T755	696