Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.flash_ctrl__prim_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	157463	1			T72	70		T73	45		T74	5
values[2]	4446	1			T72	5		T73	2		T510	1
values[3]	2067	1			T686	1		T398	1		T426	2
values[4]	1480	1			T686	1		T781	1		T776	1
values[5]	1273	1			T686	1		T781	1		T776	1
values[6]	1073	1			T686	1		T781	1		T776	1
values[7]	867	1			T686	1		T781	1		T776	1
values[8]	727	1			T686	1		T781	1		T776	1
values[9]	674	1			T686	1		T781	1		T776	1
values[10]	585	1			T686	1		T781	1		T776	1
values[11]	506	1			T686	1		T781	1		T776	1
values[12]	447	1			T686	1		T781	1		T776	1
values[13]	478	1			T686	1		T781	1		T776	1
values[14]	454	1			T686	1		T781	1		T776	1
values[15]	402	1			T686	1		T781	1		T776	1
values[16]	321	1			T686	1		T781	1		T776	1
values[17]	337	1			T686	1		T781	1		T776	1
values[18]	301	1			T686	1		T781	1		T776	1
values[19]	345	1			T686	1		T781	1		T776	1
values[20]	358	1			T686	1		T781	1		T776	1
values[21]	275	1			T686	1		T781	1		T776	1
values[22]	306	1			T686	1		T781	1		T776	1
values[23]	256	1			T686	1		T781	1		T776	1
values[24]	222	1			T686	1		T781	1		T776	1
values[25]	244	1			T686	1		T781	1		T776	1
values[26]	243	1			T686	1		T781	1		T776	1
values[27]	227	1			T686	1		T781	1		T776	1
values[28]	229	1			T686	1		T781	1		T776	1
values[29]	264	1			T686	1		T781	1		T776	1
values[30]	262	1			T686	1		T781	1		T776	1
values[31]	259	1			T686	1		T781	1		T776	1
values[32]	222	1			T686	1		T781	1		T776	1
values[33]	176	1			T686	1		T781	1		T776	1
values[34]	152	1			T686	1		T781	1		T776	1
values[35]	117	1			T686	1		T781	1		T776	1
values[36]	91	1			T686	1		T781	1		T776	1
values[37]	135	1			T686	1		T781	1		T776	1
values[38]	125	1			T686	1		T781	1		T776	1
values[39]	128	1			T686	1		T781	1		T776	1
values[40]	128	1			T686	1		T781	1		T776	1
values[41]	110	1			T686	1		T781	1		T776	1
values[42]	88	1			T686	1		T781	1		T776	1
values[43]	65	1			T686	1		T781	1		T776	1
values[44]	76	1			T686	1		T781	1		T776	1
values[45]	66	1			T686	1		T781	1		T776	1
values[46]	63	1			T686	1		T781	1		T776	1
values[47]	62	1			T686	1		T781	1		T776	1
values[48]	64	1			T686	1		T781	1		T776	1
values[49]	70	1			T686	1		T781	1		T776	1
values[50]	76	1			T686	1		T781	1		T776	1
values[51]	61	1			T686	1		T781	1		T776	1
values[52]	64	1			T686	1		T781	1		T776	1
values[53]	64	1			T686	1		T781	1		T776	1
values[54]	61	1			T686	1		T781	1		T776	1
values[55]	50	1			T686	1		T781	1		T776	1
values[56]	51	1			T686	1		T781	1		T776	1
values[57]	57	1			T686	1		T781	1		T776	1
values[58]	63	1			T686	2		T781	1		T776	1
values[59]	45	1			T686	1		T781	1		T776	1
values[60]	45	1			T686	1		T781	1		T776	1
values[61]	48	1			T686	1		T781	1		T776	1
values[62]	49	1			T686	1		T781	1		T776	1
values[63]	47	1			T686	1		T781	1		T776	1
values[64]	57	1			T686	1		T781	1		T776	1
values[65]	48	1			T686	1		T781	1		T776	1
values[66]	47	1			T686	1		T781	1		T776	1
values[67]	53	1			T686	1		T781	1		T776	1
values[68]	63	1			T686	1		T781	1		T776	1
values[69]	53	1			T686	1		T781	1		T776	1
values[70]	63	1			T686	1		T781	1		T776	1
values[71]	56	1			T686	1		T781	1		T776	1
values[72]	53	1			T686	1		T781	1		T776	1
values[73]	46	1			T686	1		T781	1		T776	1
values[74]	47	1			T686	1		T781	1		T776	1
values[75]	61	1			T686	1		T781	1		T776	1
values[76]	64	1			T686	1		T781	1		T776	1
values[77]	63	1			T686	1		T781	1		T776	1
values[78]	54	1			T686	1		T781	1		T776	1
values[79]	60	1			T686	1		T781	1		T776	1
values[80]	71	1			T686	1		T781	1		T776	1
values[81]	60	1			T686	1		T781	1		T776	1
values[82]	62	1			T686	1		T781	1		T776	1
values[83]	55	1			T686	3		T781	2		T776	1
values[84]	63	1			T686	8		T781	2		T776	1
values[85]	68	1			T686	2		T781	3		T776	1
values[86]	73	1			T686	4		T781	4		T776	1
values[87]	78	1			T686	3		T781	4		T776	1
values[88]	68	1			T686	4		T781	3		T776	1
values[89]	69	1			T686	2		T781	1		T776	1
values[90]	75	1			T686	1		T781	1		T776	1
values[91]	80	1			T686	3		T781	4		T776	1
values[92]	76	1			T686	2		T781	4		T776	1
values[93]	79	1			T686	1		T781	9		T776	1
values[94]	81	1			T686	3		T781	2		T776	1
values[95]	76	1			T686	1		T781	2		T776	1
values[96]	78	1			T686	1		T781	7		T776	1
values[97]	88	1			T686	6		T781	3		T776	1
values[98]	81	1			T686	6		T781	2		T776	1
values[99]	68	1			T686	3		T781	2		T776	1
values[100]	71	1			T686	3		T781	1		T776	1
values[101]	74	1			T686	7		T781	1		T776	1
values[102]	81	1			T686	3		T781	5		T776	1
values[103]	74	1			T686	4		T781	2		T776	1
values[104]	73	1			T686	1		T781	2		T776	1
values[105]	66	1			T686	1		T781	2		T776	1
values[106]	70	1			T686	1		T781	3		T776	1
values[107]	78	1			T686	2		T781	3		T776	1
values[108]	86	1			T686	4		T781	3		T776	1
values[109]	80	1			T686	2		T781	1		T776	1
values[110]	65	1			T686	2		T781	2		T776	1
values[111]	95	1			T686	2		T781	3		T776	1
values[112]	83	1			T686	1		T781	4		T776	1
values[113]	74	1			T686	2		T781	2		T776	1
values[114]	95	1			T686	4		T781	4		T776	2
values[115]	83	1			T686	3		T781	2		T776	1
values[116]	87	1			T686	2		T781	4		T776	1
values[117]	99	1			T686	1		T781	2		T776	1
values[118]	86	1			T686	2		T781	2		T776	1
values[119]	108	1			T686	3		T781	1		T776	1
values[120]	110	1			T686	4		T781	1		T776	1
values[121]	92	1			T686	6		T781	1		T776	1
values[122]	109	1			T686	2		T781	1		T776	1
values[123]	131	1			T686	2		T781	1		T776	1
values[124]	199	1			T686	1		T781	3		T776	2
values[125]	419	1			T686	2		T781	2		T776	2
values[126]	893	1			T686	22		T781	10		T776	26
values[127]	2943	1			T686	103		T781	80		T776	149
values[128]	4985	1			T686	188		T781	213		T776	234