Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.pinmux_aon_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	149527	1			T72	68		T73	59		T74	9
values[2]	10407	1			T73	6		T126	1		T510	2
values[3]	3795	1			T508	1		T433	1		T592	27
values[4]	2156	1			T592	41		T405	3		T458	1
values[5]	1339	1			T592	28		T405	16		T458	1
values[6]	932	1			T592	38		T405	10		T458	1
values[7]	739	1			T592	31		T405	4		T458	1
values[8]	621	1			T592	24		T405	3		T458	1
values[9]	528	1			T592	28		T405	7		T458	1
values[10]	448	1			T592	28		T405	9		T458	1
values[11]	380	1			T592	35		T405	13		T458	1
values[12]	330	1			T592	35		T405	3		T458	1
values[13]	337	1			T592	22		T405	7		T458	1
values[14]	338	1			T592	20		T405	9		T458	1
values[15]	315	1			T592	30		T405	7		T458	1
values[16]	293	1			T592	18		T405	9		T458	1
values[17]	247	1			T592	17		T405	5		T458	1
values[18]	340	1			T592	37		T405	17		T458	1
values[19]	286	1			T592	23		T405	5		T458	1
values[20]	270	1			T592	23		T405	8		T458	1
values[21]	275	1			T592	24		T405	5		T458	1
values[22]	254	1			T592	22		T405	2		T458	1
values[23]	297	1			T592	29		T405	5		T458	1
values[24]	251	1			T592	30		T405	8		T458	1
values[25]	332	1			T592	28		T405	5		T458	1
values[26]	315	1			T592	15		T405	11		T458	1
values[27]	229	1			T592	17		T405	10		T458	1
values[28]	229	1			T592	15		T405	11		T458	1
values[29]	232	1			T592	24		T405	3		T458	1
values[30]	281	1			T592	28		T405	22		T458	1
values[31]	236	1			T592	14		T405	4		T458	1
values[32]	264	1			T592	15		T405	16		T458	1
values[33]	281	1			T592	12		T405	4		T458	1
values[34]	287	1			T592	18		T405	4		T458	1
values[35]	288	1			T592	53		T405	4		T458	1
values[36]	329	1			T592	37		T405	3		T458	1
values[37]	296	1			T592	39		T405	8		T458	1
values[38]	304	1			T592	21		T405	3		T458	1
values[39]	313	1			T592	29		T405	7		T458	1
values[40]	219	1			T592	16		T405	4		T458	1
values[41]	260	1			T592	14		T405	6		T458	1
values[42]	233	1			T592	15		T405	4		T458	1
values[43]	244	1			T592	17		T405	4		T458	1
values[44]	232	1			T592	17		T405	9		T458	1
values[45]	226	1			T592	23		T405	5		T458	1
values[46]	230	1			T592	29		T405	9		T458	1
values[47]	236	1			T592	33		T405	6		T458	1
values[48]	224	1			T592	24		T405	6		T458	1
values[49]	258	1			T592	21		T405	4		T458	1
values[50]	212	1			T592	18		T405	7		T458	1
values[51]	257	1			T592	27		T458	1		T432	6
values[52]	222	1			T592	27		T458	1		T432	3
values[53]	226	1			T592	21		T458	1		T432	3
values[54]	236	1			T592	18		T458	1		T432	5
values[55]	250	1			T592	14		T458	1		T432	14
values[56]	205	1			T592	12		T458	1		T432	5
values[57]	195	1			T592	18		T458	1		T432	5
values[58]	205	1			T592	11		T458	1		T432	6
values[59]	223	1			T592	6		T458	1		T479	1
values[60]	198	1			T592	14		T458	1		T479	1
values[61]	189	1			T592	18		T458	1		T479	1
values[62]	174	1			T592	13		T458	1		T479	1
values[63]	201	1			T592	9		T458	1		T479	1
values[64]	159	1			T592	8		T458	1		T479	1
values[65]	170	1			T592	5		T458	1		T479	1
values[66]	139	1			T592	4		T458	2		T479	1
values[67]	118	1			T592	6		T458	1		T479	1
values[68]	112	1			T592	7		T458	1		T479	1
values[69]	129	1			T592	8		T458	1		T479	1
values[70]	127	1			T592	13		T458	1		T479	1
values[71]	133	1			T458	1		T479	1		T444	1
values[72]	109	1			T458	1		T479	1		T444	1
values[73]	110	1			T458	1		T479	1		T444	1
values[74]	108	1			T458	1		T479	1		T444	1
values[75]	74	1			T458	1		T479	1		T444	1
values[76]	77	1			T458	1		T479	1		T444	1
values[77]	70	1			T458	1		T479	1		T444	1
values[78]	55	1			T458	3		T479	1		T444	1
values[79]	63	1			T458	5		T479	1		T444	1
values[80]	80	1			T458	1		T479	1		T444	1
values[81]	62	1			T458	2		T479	1		T444	1
values[82]	80	1			T458	5		T479	1		T444	1
values[83]	68	1			T458	2		T479	1		T444	1
values[84]	58	1			T458	5		T479	1		T444	1
values[85]	61	1			T458	2		T479	1		T444	1
values[86]	63	1			T458	4		T479	1		T444	2
values[87]	72	1			T458	1		T479	1		T444	1
values[88]	63	1			T458	1		T479	1		T444	1
values[89]	60	1			T458	4		T479	5		T444	1
values[90]	44	1			T458	1		T479	1		T444	1
values[91]	50	1			T458	7		T479	1		T444	1
values[92]	53	1			T458	1		T479	3		T444	1
values[93]	61	1			T458	1		T479	6		T444	1
values[94]	67	1			T458	5		T479	1		T444	1
values[95]	80	1			T458	4		T479	2		T444	1
values[96]	99	1			T458	7		T479	3		T444	1
values[97]	83	1			T458	3		T479	1		T444	1
values[98]	62	1			T458	1		T479	3		T444	1
values[99]	44	1			T458	1		T479	2		T444	1
values[100]	48	1			T458	1		T479	3		T444	1
values[101]	47	1			T458	1		T479	2		T444	1
values[102]	34	1			T458	2		T479	1		T444	1
values[103]	56	1			T458	2		T479	1		T444	1
values[104]	48	1			T458	3		T479	2		T444	1
values[105]	42	1			T458	3		T479	2		T444	1
values[106]	44	1			T458	2		T479	1		T444	1
values[107]	48	1			T458	1		T479	2		T444	1
values[108]	46	1			T458	2		T479	2		T444	1
values[109]	61	1			T458	1		T479	1		T444	1
values[110]	49	1			T458	5		T479	2		T444	1
values[111]	63	1			T458	4		T479	5		T444	1
values[112]	76	1			T458	2		T479	6		T444	1
values[113]	61	1			T458	2		T479	1		T444	1
values[114]	72	1			T458	1		T479	4		T444	1
values[115]	52	1			T458	1		T479	3		T444	1
values[116]	55	1			T458	3		T479	5		T444	3
values[117]	53	1			T458	3		T479	1		T444	1
values[118]	42	1			T458	1		T479	1		T444	1
values[119]	55	1			T458	1		T479	5		T444	2
values[120]	63	1			T458	2		T479	1		T444	3
values[121]	43	1			T458	1		T479	1		T444	3
values[122]	54	1			T458	1		T479	4		T444	9
values[123]	55	1			T458	3		T479	1		T444	1
values[124]	46	1			T458	2		T479	1		T444	2
values[125]	45	1			T458	3		T479	1		T444	2
values[126]	74	1			T458	2		T479	2		T444	3
values[127]	659	1			T458	28		T479	33		T444	35
values[128]	6398	1			T458	268		T479	287		T444	270