Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.sensor_ctrl_aon_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	142883	1			T80	854		T81	25		T82	103
values[2]	9845	1			T80	171		T81	2		T352	33
values[3]	3824	1			T80	97		T81	1		T352	3
values[4]	2338	1			T80	32		T523	84		T396	1
values[5]	1616	1			T80	19		T523	75		T396	1
values[6]	1099	1			T80	12		T523	67		T396	1
values[7]	859	1			T80	7		T523	11		T396	1
values[8]	702	1			T80	1		T523	7		T396	1
values[9]	611	1			T523	5		T396	1		T525	11
values[10]	584	1			T523	9		T396	1		T525	4
values[11]	489	1			T523	1		T396	1		T525	3
values[12]	431	1			T396	1		T525	8		T391	7
values[13]	441	1			T396	1		T525	7		T391	7
values[14]	371	1			T396	1		T525	5		T391	8
values[15]	403	1			T396	1		T525	10		T391	7
values[16]	377	1			T396	1		T525	9		T391	3
values[17]	374	1			T396	1		T525	4		T391	4
values[18]	376	1			T396	1		T525	8		T391	4
values[19]	358	1			T396	1		T525	3		T391	7
values[20]	365	1			T396	1		T525	11		T391	15
values[21]	378	1			T396	1		T525	7		T391	13
values[22]	303	1			T396	1		T525	12		T391	8
values[23]	356	1			T396	1		T525	24		T391	8
values[24]	357	1			T396	1		T525	6		T391	13
values[25]	325	1			T396	1		T525	3		T391	4
values[26]	344	1			T396	1		T525	6		T391	6
values[27]	307	1			T396	1		T525	3		T391	6
values[28]	327	1			T396	1		T525	6		T391	6
values[29]	404	1			T396	1		T525	3		T391	4
values[30]	350	1			T396	1		T525	20		T391	8
values[31]	324	1			T396	1		T525	7		T391	9
values[32]	355	1			T396	1		T525	9		T391	8
values[33]	318	1			T396	1		T525	10		T391	5
values[34]	328	1			T396	1		T525	4		T391	9
values[35]	382	1			T396	1		T525	8		T391	10
values[36]	353	1			T396	1		T525	19		T391	5
values[37]	325	1			T396	1		T525	12		T391	5
values[38]	347	1			T396	1		T525	6		T391	6
values[39]	301	1			T396	1		T525	3		T391	3
values[40]	306	1			T396	1		T525	9		T391	5
values[41]	345	1			T396	1		T525	2		T391	11
values[42]	332	1			T396	1		T525	5		T391	5
values[43]	316	1			T396	1		T525	6		T391	3
values[44]	332	1			T396	1		T525	3		T391	9
values[45]	327	1			T396	1		T525	5		T391	10
values[46]	327	1			T396	1		T525	3		T391	3
values[47]	344	1			T396	1		T525	7		T391	14
values[48]	315	1			T396	1		T525	9		T391	6
values[49]	286	1			T396	1		T525	3		T391	5
values[50]	308	1			T396	1		T525	7		T391	9
values[51]	290	1			T396	1		T525	23		T391	12
values[52]	300	1			T396	1		T525	8		T820	2
values[53]	323	1			T396	1		T525	7		T820	3
values[54]	330	1			T396	1		T525	21		T820	22
values[55]	300	1			T396	1		T525	10		T820	3
values[56]	315	1			T396	1		T525	5		T820	8
values[57]	332	1			T396	1		T525	8		T820	13
values[58]	273	1			T396	1		T525	7		T820	5
values[59]	263	1			T396	1		T525	17		T820	12
values[60]	179	1			T396	1		T525	8		T820	3
values[61]	250	1			T396	1		T525	5		T820	7
values[62]	223	1			T396	1		T525	8		T820	4
values[63]	201	1			T396	1		T525	10		T820	5
values[64]	217	1			T396	1		T525	6		T820	10
values[65]	249	1			T396	1		T525	7		T820	4
values[66]	219	1			T396	1		T525	1		T820	5
values[67]	187	1			T396	1		T820	3		T798	1
values[68]	197	1			T396	1		T820	11		T798	1
values[69]	129	1			T396	1		T820	9		T798	1
values[70]	154	1			T396	1		T820	6		T798	1
values[71]	175	1			T396	1		T820	3		T798	1
values[72]	179	1			T396	1		T820	6		T798	1
values[73]	147	1			T396	1		T820	3		T798	1
values[74]	112	1			T396	1		T820	2		T798	1
values[75]	115	1			T396	1		T798	1		T392	9
values[76]	99	1			T396	1		T798	1		T392	6
values[77]	79	1			T396	1		T798	1		T392	8
values[78]	84	1			T396	1		T798	1		T392	5
values[79]	87	1			T396	3		T798	1		T392	16
values[80]	97	1			T396	2		T798	1		T392	12
values[81]	70	1			T396	1		T798	1		T435	6
values[82]	76	1			T396	2		T798	1		T435	14
values[83]	80	1			T396	2		T798	1		T435	16
values[84]	72	1			T396	1		T798	1		T435	14
values[85]	75	1			T396	4		T798	1		T435	10
values[86]	73	1			T396	2		T798	1		T435	13
values[87]	65	1			T396	2		T798	1		T435	12
values[88]	63	1			T396	2		T798	1		T435	6
values[89]	86	1			T396	1		T798	1		T435	6
values[90]	65	1			T396	2		T798	1		T435	7
values[91]	70	1			T396	1		T798	1		T435	12
values[92]	66	1			T396	5		T798	1		T435	13
values[93]	53	1			T396	1		T798	1		T435	14
values[94]	52	1			T396	1		T798	1		T435	9
values[95]	57	1			T396	1		T798	1		T435	17
values[96]	67	1			T396	2		T798	1		T435	16
values[97]	75	1			T396	1		T798	1		T435	12
values[98]	72	1			T396	1		T798	1		T435	11
values[99]	72	1			T396	3		T798	2		T435	18
values[100]	74	1			T396	3		T798	3		T435	14
values[101]	54	1			T396	1		T798	1		T435	8
values[102]	59	1			T396	1		T798	1		T435	11
values[103]	69	1			T396	3		T798	4		T435	12
values[104]	62	1			T396	1		T798	1		T435	13
values[105]	52	1			T396	3		T798	2		T435	13
values[106]	52	1			T396	3		T798	2		T435	9
values[107]	36	1			T396	1		T798	1		T435	5
values[108]	42	1			T396	3		T798	2		T435	4
values[109]	39	1			T396	2		T798	3		T435	4
values[110]	44	1			T396	2		T798	1		T435	4
values[111]	46	1			T396	2		T798	1		T435	3
values[112]	61	1			T396	2		T798	4		T435	3
values[113]	60	1			T396	1		T798	2		T435	3
values[114]	38	1			T396	2		T798	5		T435	3
values[115]	41	1			T396	1		T798	1		T435	1
values[116]	49	1			T396	2		T798	1		T435	5
values[117]	42	1			T396	2		T798	3		T435	2
values[118]	52	1			T396	5		T798	1		T435	4
values[119]	36	1			T396	1		T798	1		T435	5
values[120]	48	1			T396	1		T798	3		T435	2
values[121]	56	1			T396	1		T798	2		T435	9
values[122]	39	1			T396	2		T798	3		T435	6
values[123]	44	1			T396	1		T798	1		T435	7
values[124]	62	1			T396	1		T798	1		T435	12
values[125]	57	1			T396	1		T798	2		T435	3
values[126]	74	1			T396	1		T798	2		T435	2
values[127]	552	1			T396	23		T798	35		T800	23
values[128]	5100	1			T396	305		T798	358		T800	359