Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.entropy_src_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	152343	1			T80	612		T81	30		T82	88
values[2]	4618	1			T80	6		T81	1		T399	1
values[3]	2393	1			T396	1		T404	1		T810	2
values[4]	1761	1			T396	1		T810	2		T492	9
values[5]	1599	1			T396	1		T810	2		T492	4
values[6]	1337	1			T396	1		T810	2		T492	9
values[7]	1105	1			T396	1		T810	2		T492	23
values[8]	932	1			T396	1		T810	2		T492	38
values[9]	715	1			T396	1		T810	2		T492	43
values[10]	606	1			T396	1		T810	2		T492	27
values[11]	554	1			T396	1		T810	2		T492	31
values[12]	466	1			T396	1		T810	2		T492	17
values[13]	393	1			T396	1		T810	2		T492	18
values[14]	254	1			T396	1		T810	2		T492	13
values[15]	220	1			T396	1		T810	2		T492	13
values[16]	185	1			T396	1		T810	2		T492	19
values[17]	237	1			T396	1		T810	2		T492	16
values[18]	262	1			T396	1		T810	2		T492	17
values[19]	216	1			T396	1		T810	2		T492	25
values[20]	156	1			T396	1		T810	2		T492	17
values[21]	100	1			T396	1		T810	2		T492	13
values[22]	90	1			T396	1		T810	2		T492	12
values[23]	108	1			T396	1		T810	2		T492	11
values[24]	164	1			T396	1		T810	2		T492	13
values[25]	158	1			T396	1		T810	2		T492	5
values[26]	136	1			T396	1		T810	2		T492	1
values[27]	118	1			T396	1		T810	2		T794	2
values[28]	110	1			T396	1		T810	2		T794	2
values[29]	114	1			T396	1		T810	2		T794	2
values[30]	113	1			T396	1		T810	2		T794	1
values[31]	85	1			T396	1		T810	2		T794	1
values[32]	87	1			T396	1		T810	2		T794	2
values[33]	88	1			T396	1		T810	2		T794	2
values[34]	91	1			T396	1		T810	2		T794	4
values[35]	119	1			T396	1		T810	2		T794	3
values[36]	127	1			T396	1		T810	2		T794	3
values[37]	120	1			T396	1		T810	2		T794	2
values[38]	92	1			T396	1		T810	2		T794	3
values[39]	84	1			T396	1		T810	2		T794	1
values[40]	74	1			T396	1		T810	2		T794	6
values[41]	67	1			T396	1		T810	2		T794	3
values[42]	62	1			T396	1		T810	2		T794	5
values[43]	66	1			T396	1		T810	2		T794	11
values[44]	58	1			T396	1		T810	2		T794	2
values[45]	61	1			T396	1		T810	2		T794	3
values[46]	75	1			T396	1		T810	2		T794	1
values[47]	84	1			T396	1		T810	2		T794	6
values[48]	67	1			T396	1		T810	2		T794	3
values[49]	74	1			T396	1		T810	2		T794	4
values[50]	58	1			T396	1		T810	2		T794	3
values[51]	60	1			T396	1		T810	2		T794	9
values[52]	51	1			T396	1		T810	2		T794	3
values[53]	52	1			T396	1		T810	2		T794	4
values[54]	45	1			T396	1		T810	3		T794	2
values[55]	44	1			T396	1		T810	2		T794	5
values[56]	41	1			T396	1		T810	2		T794	1
values[57]	49	1			T396	1		T810	2		T794	1
values[58]	47	1			T396	1		T810	2		T794	1
values[59]	45	1			T396	1		T810	2		T794	3
values[60]	42	1			T396	1		T810	2		T794	5
values[61]	36	1			T396	1		T810	2		T794	3
values[62]	34	1			T396	1		T810	2		T794	1
values[63]	41	1			T396	1		T810	2		T794	2
values[64]	41	1			T396	1		T810	2		T794	3
values[65]	38	1			T396	1		T810	2		T794	4
values[66]	37	1			T396	1		T810	2		T794	6
values[67]	38	1			T396	1		T810	2		T794	3
values[68]	35	1			T396	1		T810	2		T794	2
values[69]	46	1			T396	1		T810	2		T794	2
values[70]	46	1			T396	1		T810	2		T794	5
values[71]	45	1			T396	1		T810	2		T794	8
values[72]	45	1			T396	1		T810	2		T794	7
values[73]	45	1			T396	1		T810	2		T794	2
values[74]	54	1			T396	1		T810	2		T794	12
values[75]	38	1			T396	1		T810	2		T794	2
values[76]	41	1			T396	1		T810	2		T794	2
values[77]	45	1			T396	1		T810	2		T794	4
values[78]	43	1			T396	1		T810	6		T794	3
values[79]	35	1			T396	1		T810	3		T794	1
values[80]	52	1			T396	1		T810	9		T794	3
values[81]	41	1			T396	1		T810	9		T794	2
values[82]	44	1			T396	1		T810	7		T794	3
values[83]	40	1			T396	1		T810	3		T794	6
values[84]	43	1			T396	1		T810	3		T794	4
values[85]	53	1			T396	1		T810	7		T794	2
values[86]	50	1			T396	1		T810	6		T794	2
values[87]	47	1			T396	1		T810	2		T794	2
values[88]	63	1			T396	1		T810	4		T794	3
values[89]	53	1			T396	1		T810	2		T794	4
values[90]	56	1			T396	1		T810	3		T794	8
values[91]	56	1			T396	1		T810	5		T794	9
values[92]	61	1			T396	1		T810	3		T794	4
values[93]	60	1			T396	2		T810	3		T794	1
values[94]	70	1			T396	5		T810	4		T794	6
values[95]	69	1			T396	7		T810	3		T794	8
values[96]	59	1			T396	2		T810	6		T794	2
values[97]	59	1			T396	2		T810	9		T794	3
values[98]	69	1			T396	2		T810	6		T794	4
values[99]	59	1			T396	1		T810	4		T794	2
values[100]	66	1			T396	2		T810	2		T794	2
values[101]	80	1			T396	2		T810	2		T794	2
values[102]	72	1			T396	2		T810	4		T794	2
values[103]	71	1			T396	2		T810	5		T794	1
values[104]	63	1			T396	3		T810	2		T794	1
values[105]	82	1			T396	5		T810	6		T794	11
values[106]	85	1			T396	4		T810	3		T794	25
values[107]	93	1			T396	3		T810	5		T794	15
values[108]	69	1			T396	2		T810	4		T794	7
values[109]	76	1			T396	3		T810	4		T794	3
values[110]	80	1			T396	2		T810	3		T794	9
values[111]	73	1			T396	1		T810	2		T794	4
values[112]	70	1			T396	3		T810	3		T794	4
values[113]	74	1			T396	3		T810	2		T794	4
values[114]	86	1			T396	4		T810	3		T794	9
values[115]	91	1			T396	2		T810	2		T794	14
values[116]	74	1			T396	3		T810	3		T794	12
values[117]	92	1			T396	6		T810	2		T794	17
values[118]	86	1			T396	3		T810	3		T794	19
values[119]	88	1			T396	2		T810	3		T794	7
values[120]	82	1			T396	3		T810	3		T794	9
values[121]	80	1			T396	4		T810	7		T794	6
values[122]	67	1			T396	1		T810	5		T795	2
values[123]	76	1			T396	1		T810	5		T795	2
values[124]	99	1			T396	2		T810	3		T795	3
values[125]	245	1			T396	2		T810	3		T795	3
values[126]	588	1			T396	23		T810	22		T795	16
values[127]	3055	1			T396	85		T810	262		T795	110
values[128]	5525	1			T396	147		T810	458		T795	180