Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.pinmux_aon_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	143616	1			T73	34		T75	12		T80	81
values[2]	10817	1			T129	1		T420	3		T527	1
values[3]	4114	1			T447	42		T416	18		T419	43
values[4]	2241	1			T447	31		T416	13		T419	30
values[5]	1308	1			T447	20		T416	4		T419	10
values[6]	862	1			T447	22		T416	4		T411	20
values[7]	679	1			T447	13		T411	14		T613	24
values[8]	516	1			T447	2		T411	24		T613	33
values[9]	372	1			T411	8		T613	13		T481	1
values[10]	275	1			T411	8		T613	2		T481	1
values[11]	280	1			T411	12		T481	1		T452	4
values[12]	308	1			T411	15		T481	1		T452	7
values[13]	288	1			T411	19		T481	1		T452	3
values[14]	253	1			T411	13		T481	1		T452	3
values[15]	232	1			T411	11		T481	1		T452	3
values[16]	307	1			T411	10		T481	1		T452	5
values[17]	270	1			T411	10		T481	1		T452	9
values[18]	274	1			T411	9		T481	1		T452	25
values[19]	235	1			T411	9		T481	1		T452	4
values[20]	224	1			T411	10		T481	1		T452	3
values[21]	243	1			T411	4		T481	1		T452	9
values[22]	210	1			T411	9		T481	1		T452	2
values[23]	249	1			T411	11		T481	1		T452	3
values[24]	254	1			T411	16		T481	1		T452	12
values[25]	224	1			T411	8		T481	1		T452	7
values[26]	265	1			T411	5		T481	1		T452	8
values[27]	265	1			T411	4		T481	1		T452	3
values[28]	237	1			T411	4		T481	1		T452	6
values[29]	236	1			T411	4		T481	1		T452	8
values[30]	222	1			T411	1		T481	1		T452	19
values[31]	263	1			T411	4		T481	1		T452	6
values[32]	239	1			T411	4		T481	1		T452	5
values[33]	226	1			T411	5		T481	1		T452	5
values[34]	231	1			T411	1		T481	1		T452	4
values[35]	231	1			T411	2		T481	1		T452	2
values[36]	253	1			T411	1		T481	1		T452	7
values[37]	216	1			T411	3		T481	1		T452	2
values[38]	256	1			T411	3		T481	1		T452	6
values[39]	223	1			T411	8		T481	1		T452	4
values[40]	253	1			T411	7		T481	1		T452	5
values[41]	246	1			T411	4		T481	1		T452	11
values[42]	221	1			T411	2		T481	1		T452	6
values[43]	194	1			T411	2		T481	1		T452	7
values[44]	243	1			T411	3		T481	1		T452	8
values[45]	253	1			T411	5		T481	1		T452	17
values[46]	195	1			T411	2		T481	1		T452	9
values[47]	222	1			T411	4		T481	1		T452	9
values[48]	190	1			T411	6		T481	1		T452	6
values[49]	247	1			T411	4		T481	1		T452	15
values[50]	227	1			T411	6		T481	1		T452	8
values[51]	190	1			T411	2		T481	1		T452	6
values[52]	201	1			T411	2		T481	1		T452	4
values[53]	202	1			T411	2		T481	1		T452	4
values[54]	225	1			T411	2		T481	1		T452	15
values[55]	216	1			T411	3		T481	1		T452	7
values[56]	169	1			T411	2		T481	1		T452	3
values[57]	209	1			T411	5		T481	1		T452	5
values[58]	156	1			T411	6		T481	1		T452	3
values[59]	170	1			T411	2		T481	1		T452	2
values[60]	176	1			T411	5		T481	1		T452	10
values[61]	228	1			T411	7		T481	1		T452	6
values[62]	166	1			T411	11		T481	1		T452	7
values[63]	188	1			T411	26		T481	1		T452	9
values[64]	162	1			T411	31		T481	1		T452	8
values[65]	129	1			T411	22		T481	1		T452	9
values[66]	110	1			T411	2		T481	1		T452	9
values[67]	96	1			T481	2		T452	4		T477	2
values[68]	103	1			T481	1		T452	9		T477	2
values[69]	91	1			T481	1		T452	4		T477	2
values[70]	87	1			T481	1		T452	3		T477	2
values[71]	104	1			T481	1		T452	1		T477	2
values[72]	73	1			T481	1		T477	2		T467	1
values[73]	75	1			T481	1		T477	2		T467	1
values[74]	75	1			T481	1		T477	2		T467	1
values[75]	72	1			T481	1		T477	2		T467	1
values[76]	47	1			T481	1		T477	2		T467	1
values[77]	66	1			T481	1		T477	2		T467	1
values[78]	69	1			T481	1		T477	2		T467	1
values[79]	71	1			T481	1		T477	3		T467	1
values[80]	66	1			T481	1		T477	2		T467	1
values[81]	47	1			T481	2		T477	2		T467	1
values[82]	50	1			T481	1		T477	2		T467	1
values[83]	43	1			T481	2		T477	2		T467	1
values[84]	54	1			T481	2		T477	2		T467	1
values[85]	75	1			T481	6		T477	2		T467	1
values[86]	53	1			T481	5		T477	2		T467	1
values[87]	33	1			T481	1		T477	2		T467	1
values[88]	46	1			T481	2		T477	2		T467	2
values[89]	42	1			T481	2		T477	2		T467	2
values[90]	44	1			T481	2		T477	2		T467	1
values[91]	52	1			T481	3		T477	2		T467	1
values[92]	72	1			T481	3		T477	2		T467	1
values[93]	74	1			T481	2		T477	2		T467	5
values[94]	60	1			T481	2		T477	3		T467	2
values[95]	77	1			T481	7		T477	2		T467	6
values[96]	52	1			T481	1		T477	7		T467	2
values[97]	78	1			T481	3		T477	4		T467	5
values[98]	61	1			T481	2		T477	9		T467	1
values[99]	75	1			T481	10		T477	3		T467	2
values[100]	55	1			T481	1		T477	3		T467	1
values[101]	70	1			T481	2		T477	4		T467	1
values[102]	58	1			T481	4		T477	4		T467	2
values[103]	60	1			T481	1		T477	3		T467	2
values[104]	75	1			T481	2		T477	2		T467	4
values[105]	60	1			T481	1		T477	3		T467	1
values[106]	67	1			T481	2		T477	3		T467	2
values[107]	61	1			T481	1		T477	6		T467	3
values[108]	66	1			T481	1		T477	6		T467	6
values[109]	53	1			T481	1		T477	4		T467	1
values[110]	74	1			T481	1		T477	3		T467	1
values[111]	60	1			T481	2		T477	2		T467	1
values[112]	70	1			T481	4		T477	3		T467	1
values[113]	85	1			T481	1		T477	7		T467	1
values[114]	66	1			T481	3		T477	5		T467	2
values[115]	61	1			T481	1		T477	6		T467	1
values[116]	51	1			T481	2		T477	2		T467	1
values[117]	59	1			T481	1		T477	5		T467	2
values[118]	65	1			T481	1		T477	10		T467	4
values[119]	69	1			T481	1		T477	7		T467	1
values[120]	59	1			T481	1		T477	3		T467	1
values[121]	64	1			T481	4		T477	3		T467	1
values[122]	55	1			T481	3		T477	4		T467	1
values[123]	70	1			T481	2		T477	4		T467	6
values[124]	63	1			T481	1		T477	7		T467	3
values[125]	90	1			T481	3		T477	5		T467	1
values[126]	183	1			T481	2		T477	5		T467	4
values[127]	878	1			T481	40		T477	69		T467	31
values[128]	5226	1			T481	295		T477	611		T467	261