Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.spi_host0_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	143907	1			T73	37		T75	11		T80	84
values[2]	12839	1			T75	1		T129	1		T420	2
values[3]	6235	1			T419	98		T411	73		T792	81
values[4]	2700	1			T419	43		T411	15		T792	36
values[5]	1045	1			T419	12		T411	5		T792	2
values[6]	619	1			T419	13		T411	2		T481	1
values[7]	441	1			T419	1		T481	2		T550	49
values[8]	278	1			T481	1		T550	21		T807	11
values[9]	259	1			T481	1		T550	18		T807	3
values[10]	214	1			T481	1		T550	15		T807	8
values[11]	194	1			T481	1		T550	15		T807	27
values[12]	199	1			T481	1		T550	12		T807	19
values[13]	178	1			T481	1		T550	14		T807	13
values[14]	162	1			T481	1		T550	24		T807	7
values[15]	144	1			T481	1		T550	17		T807	2
values[16]	116	1			T481	1		T550	13		T807	4
values[17]	124	1			T481	1		T550	9		T807	11
values[18]	129	1			T481	1		T550	23		T807	22
values[19]	156	1			T481	1		T550	19		T807	16
values[20]	220	1			T481	1		T550	28		T807	14
values[21]	179	1			T481	1		T550	15		T807	35
values[22]	199	1			T481	1		T550	6		T807	22
values[23]	218	1			T481	1		T550	17		T807	6
values[24]	119	1			T481	1		T550	9		T807	6
values[25]	189	1			T481	1		T550	15		T807	15
values[26]	160	1			T481	1		T550	26		T807	2
values[27]	126	1			T481	1		T550	18		T807	3
values[28]	153	1			T481	1		T550	13		T807	4
values[29]	108	1			T481	1		T550	1		T807	8
values[30]	89	1			T481	1		T550	1		T807	3
values[31]	107	1			T481	1		T550	4		T807	3
values[32]	60	1			T481	1		T550	1		T807	2
values[33]	55	1			T481	1		T550	2		T807	2
values[34]	55	1			T481	1		T550	2		T807	3
values[35]	45	1			T481	1		T550	1		T807	2
values[36]	56	1			T481	1		T550	7		T807	3
values[37]	94	1			T481	2		T550	4		T807	5
values[38]	114	1			T481	1		T550	3		T807	18
values[39]	98	1			T481	1		T550	3		T807	23
values[40]	116	1			T481	1		T550	1		T807	50
values[41]	84	1			T481	1		T550	4		T807	29
values[42]	105	1			T481	1		T550	11		T807	33
values[43]	86	1			T481	1		T550	5		T807	20
values[44]	83	1			T481	1		T550	6		T807	34
values[45]	55	1			T481	1		T550	2		T807	9
values[46]	57	1			T481	1		T550	8		T818	12
values[47]	37	1			T481	2		T550	2		T818	5
values[48]	49	1			T481	1		T550	2		T818	2
values[49]	48	1			T481	1		T550	8		T818	2
values[50]	46	1			T481	1		T550	6		T818	12
values[51]	45	1			T481	1		T550	7		T818	3
values[52]	45	1			T481	1		T550	10		T818	8
values[53]	37	1			T481	1		T550	2		T818	5
values[54]	42	1			T481	1		T550	4		T818	4
values[55]	69	1			T481	1		T550	10		T818	16
values[56]	59	1			T481	1		T550	4		T818	17
values[57]	54	1			T481	1		T550	3		T818	14
values[58]	51	1			T481	1		T550	14		T818	5
values[59]	50	1			T481	1		T550	17		T821	1
values[60]	61	1			T481	1		T550	27		T821	1
values[61]	54	1			T481	1		T550	24		T821	1
values[62]	40	1			T481	1		T550	9		T821	1
values[63]	50	1			T481	1		T550	3		T821	1
values[64]	47	1			T481	1		T550	2		T821	1
values[65]	52	1			T481	1		T550	5		T821	1
values[66]	46	1			T481	1		T550	9		T821	1
values[67]	49	1			T481	1		T550	4		T821	1
values[68]	34	1			T481	1		T821	1		T477	2
values[69]	31	1			T481	1		T821	1		T477	2
values[70]	30	1			T481	1		T821	1		T477	2
values[71]	31	1			T481	1		T821	1		T477	2
values[72]	30	1			T481	1		T821	1		T477	2
values[73]	34	1			T481	1		T821	1		T477	2
values[74]	35	1			T481	1		T821	1		T477	2
values[75]	35	1			T481	1		T821	1		T477	2
values[76]	35	1			T481	1		T821	1		T477	2
values[77]	47	1			T481	1		T821	1		T477	2
values[78]	54	1			T481	1		T821	1		T477	2
values[79]	62	1			T481	1		T821	1		T477	2
values[80]	59	1			T481	1		T821	1		T477	2
values[81]	40	1			T481	1		T821	1		T477	2
values[82]	52	1			T481	1		T821	1		T477	2
values[83]	61	1			T481	1		T821	1		T477	9
values[84]	44	1			T481	1		T821	1		T477	5
values[85]	34	1			T481	1		T821	1		T477	2
values[86]	52	1			T481	1		T821	1		T477	3
values[87]	37	1			T481	1		T821	1		T477	6
values[88]	44	1			T481	1		T821	1		T477	13
values[89]	47	1			T481	1		T821	1		T477	7
values[90]	47	1			T481	1		T821	1		T477	8
values[91]	48	1			T481	1		T821	2		T477	6
values[92]	47	1			T481	2		T821	1		T477	7
values[93]	57	1			T481	5		T821	3		T477	6
values[94]	55	1			T481	2		T821	3		T477	5
values[95]	42	1			T481	1		T821	2		T477	3
values[96]	55	1			T481	1		T821	1		T477	3
values[97]	52	1			T481	2		T821	2		T477	2
values[98]	53	1			T481	2		T821	1		T477	2
values[99]	61	1			T481	3		T821	1		T477	3
values[100]	54	1			T481	2		T821	1		T477	4
values[101]	65	1			T481	3		T821	2		T477	3
values[102]	54	1			T481	3		T821	1		T477	7
values[103]	54	1			T481	5		T821	1		T477	6
values[104]	45	1			T481	6		T821	1		T477	7
values[105]	44	1			T481	3		T821	2		T477	5
values[106]	33	1			T481	1		T821	1		T477	4
values[107]	43	1			T481	1		T821	1		T477	7
values[108]	36	1			T481	1		T821	3		T477	6
values[109]	36	1			T481	1		T821	3		T477	3
values[110]	44	1			T481	1		T821	3		T477	3
values[111]	60	1			T481	2		T821	4		T477	3
values[112]	43	1			T481	1		T821	2		T477	3
values[113]	37	1			T481	2		T821	3		T477	2
values[114]	45	1			T481	5		T821	3		T477	4
values[115]	39	1			T481	2		T821	1		T477	2
values[116]	44	1			T481	4		T821	2		T477	5
values[117]	46	1			T481	4		T821	4		T477	4
values[118]	48	1			T481	2		T821	1		T477	7
values[119]	43	1			T481	3		T821	3		T477	2
values[120]	37	1			T481	1		T821	2		T477	4
values[121]	31	1			T481	1		T821	1		T477	3
values[122]	43	1			T481	1		T821	3		T477	3
values[123]	40	1			T481	1		T821	2		T477	3
values[124]	49	1			T481	2		T821	3		T477	2
values[125]	43	1			T481	4		T821	1		T477	3
values[126]	316	1			T481	11		T821	6		T477	35
values[127]	2386	1			T481	124		T821	91		T477	194
values[128]	4347	1			T481	223		T821	194		T477	354