Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.sram_ctrl_ret_aon__ram_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	138010	1			T81	19		T85	51		T86	122
values[2]	9705	1			T86	3		T501	2		T231	2
values[3]	3798	1			T501	2		T445	163		T556	107
values[4]	2374	1			T501	2		T445	80		T556	75
values[5]	1490	1			T501	2		T445	39		T556	54
values[6]	1004	1			T501	2		T445	6		T556	27
values[7]	651	1			T501	2		T445	3		T556	16
values[8]	489	1			T501	2		T556	2		T620	2
values[9]	375	1			T501	2		T556	1		T620	2
values[10]	319	1			T501	2		T620	2		T763	5
values[11]	311	1			T501	2		T620	2		T763	6
values[12]	301	1			T501	2		T620	2		T763	4
values[13]	266	1			T501	2		T620	2		T763	15
values[14]	283	1			T501	2		T620	2		T763	3
values[15]	265	1			T501	2		T620	3		T763	18
values[16]	244	1			T501	2		T620	2		T763	17
values[17]	253	1			T501	2		T620	2		T763	8
values[18]	235	1			T501	2		T620	2		T763	3
values[19]	260	1			T501	2		T620	2		T763	4
values[20]	262	1			T501	2		T620	2		T763	7
values[21]	305	1			T501	2		T620	2		T763	19
values[22]	254	1			T501	2		T620	2		T763	8
values[23]	220	1			T501	2		T620	2		T763	5
values[24]	206	1			T501	2		T620	2		T763	4
values[25]	291	1			T501	2		T620	2		T763	7
values[26]	242	1			T501	2		T620	2		T763	6
values[27]	220	1			T501	2		T620	2		T763	8
values[28]	240	1			T501	2		T620	2		T763	9
values[29]	254	1			T501	2		T620	2		T763	5
values[30]	284	1			T501	2		T620	2		T763	6
values[31]	289	1			T501	2		T620	2		T763	4
values[32]	254	1			T501	2		T620	2		T763	8
values[33]	303	1			T501	2		T620	2		T763	4
values[34]	258	1			T501	2		T620	2		T763	6
values[35]	234	1			T501	2		T620	2		T763	4
values[36]	267	1			T501	2		T620	2		T763	15
values[37]	263	1			T501	2		T620	2		T763	13
values[38]	238	1			T501	2		T620	2		T763	8
values[39]	245	1			T501	2		T620	2		T763	7
values[40]	235	1			T501	2		T620	2		T763	10
values[41]	208	1			T501	2		T620	2		T763	3
values[42]	286	1			T501	2		T620	2		T763	16
values[43]	224	1			T501	2		T620	2		T763	10
values[44]	278	1			T501	2		T620	2		T763	4
values[45]	234	1			T501	2		T620	2		T763	11
values[46]	223	1			T501	2		T620	2		T763	6
values[47]	199	1			T501	2		T620	2		T763	8
values[48]	223	1			T501	2		T620	2		T763	2
values[49]	255	1			T501	2		T620	2		T763	7
values[50]	238	1			T501	2		T620	3		T763	4
values[51]	270	1			T501	2		T620	2		T763	12
values[52]	247	1			T501	3		T620	2		T763	8
values[53]	238	1			T501	2		T620	2		T763	10
values[54]	218	1			T501	2		T620	2		T763	8
values[55]	273	1			T501	2		T620	2		T763	9
values[56]	242	1			T501	2		T620	2		T763	11
values[57]	235	1			T501	2		T620	2		T763	18
values[58]	225	1			T501	2		T620	2		T763	5
values[59]	181	1			T501	2		T620	2		T763	4
values[60]	207	1			T501	2		T620	2		T763	4
values[61]	172	1			T501	2		T620	2		T763	5
values[62]	196	1			T501	2		T620	2		T763	19
values[63]	187	1			T501	2		T620	2		T763	4
values[64]	204	1			T501	2		T620	2		T763	9
values[65]	176	1			T501	2		T620	2		T763	3
values[66]	179	1			T501	2		T620	2		T763	7
values[67]	189	1			T501	2		T620	2		T763	3
values[68]	206	1			T501	2		T620	2		T763	5
values[69]	198	1			T501	2		T620	2		T763	6
values[70]	135	1			T501	2		T620	2		T774	1
values[71]	128	1			T501	2		T620	2		T774	1
values[72]	124	1			T501	2		T620	2		T774	1
values[73]	136	1			T501	2		T620	2		T774	1
values[74]	108	1			T501	2		T620	2		T774	1
values[75]	95	1			T501	2		T620	2		T774	1
values[76]	135	1			T501	2		T620	2		T774	1
values[77]	112	1			T501	2		T620	2		T774	1
values[78]	94	1			T501	2		T620	2		T774	1
values[79]	143	1			T501	2		T620	2		T774	1
values[80]	89	1			T501	3		T620	2		T774	1
values[81]	66	1			T501	2		T620	2		T774	1
values[82]	76	1			T501	6		T620	2		T774	1
values[83]	81	1			T501	6		T620	2		T774	1
values[84]	97	1			T501	5		T620	2		T774	1
values[85]	101	1			T501	3		T620	2		T774	1
values[86]	103	1			T501	7		T620	2		T774	1
values[87]	79	1			T501	3		T620	3		T774	1
values[88]	93	1			T501	3		T620	2		T774	7
values[89]	80	1			T501	5		T620	2		T774	1
values[90]	87	1			T501	4		T620	3		T774	2
values[91]	95	1			T501	2		T620	9		T774	3
values[92]	87	1			T501	3		T620	6		T774	1
values[93]	90	1			T501	2		T620	6		T774	2
values[94]	86	1			T501	3		T620	4		T774	1
values[95]	87	1			T501	3		T620	9		T774	1
values[96]	63	1			T501	7		T620	5		T774	5
values[97]	74	1			T501	5		T620	6		T774	5
values[98]	45	1			T501	2		T620	2		T774	2
values[99]	55	1			T501	4		T620	3		T774	2
values[100]	68	1			T501	14		T620	3		T774	4
values[101]	52	1			T501	2		T620	5		T774	3
values[102]	57	1			T501	7		T620	7		T774	1
values[103]	52	1			T501	2		T620	4		T774	1
values[104]	47	1			T501	4		T620	4		T774	3
values[105]	48	1			T501	3		T620	2		T774	2
values[106]	61	1			T501	2		T620	6		T774	2
values[107]	61	1			T501	3		T620	6		T774	2
values[108]	42	1			T501	2		T620	3		T774	2
values[109]	38	1			T501	3		T620	3		T774	4
values[110]	57	1			T501	2		T620	6		T774	3
values[111]	45	1			T501	2		T620	2		T774	1
values[112]	49	1			T501	2		T620	4		T774	4
values[113]	43	1			T501	2		T620	5		T774	2
values[114]	42	1			T501	2		T620	3		T774	1
values[115]	47	1			T501	4		T620	10		T774	1
values[116]	50	1			T501	2		T620	10		T774	3
values[117]	55	1			T501	4		T620	10		T774	3
values[118]	40	1			T501	4		T620	3		T774	1
values[119]	43	1			T501	2		T620	2		T774	2
values[120]	55	1			T501	3		T620	3		T774	1
values[121]	52	1			T501	5		T620	4		T774	1
values[122]	45	1			T501	3		T620	5		T774	4
values[123]	36	1			T501	2		T620	3		T774	2
values[124]	35	1			T501	2		T620	3		T774	1
values[125]	39	1			T501	3		T620	2		T774	2
values[126]	41	1			T501	6		T620	3		T774	3
values[127]	521	1			T501	59		T620	39		T774	36
values[128]	5642	1			T501	590		T620	571		T774	293