Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.usbdev_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	140751	1			T81	49		T85	52		T86	104
values[2]	10481	1			T85	1		T86	4		T231	2
values[3]	4881	1			T405	1		T508	56		T511	1
values[4]	2607	1			T508	46		T511	4		T434	16
values[5]	1655	1			T508	21		T511	1		T434	33
values[6]	1167	1			T508	19		T511	2		T434	11
values[7]	987	1			T508	49		T511	6		T434	22
values[8]	768	1			T508	21		T511	2		T434	16
values[9]	630	1			T508	20		T511	5		T434	21
values[10]	578	1			T508	11		T511	1		T434	9
values[11]	530	1			T508	9		T511	3		T434	22
values[12]	471	1			T508	12		T511	2		T434	22
values[13]	512	1			T508	6		T511	2		T434	30
values[14]	495	1			T508	7		T511	3		T434	13
values[15]	479	1			T508	14		T511	6		T434	7
values[16]	466	1			T508	6		T511	4		T434	30
values[17]	407	1			T508	12		T511	3		T434	22
values[18]	488	1			T508	14		T511	16		T434	36
values[19]	478	1			T508	15		T511	9		T434	10
values[20]	407	1			T508	6		T511	5		T434	22
values[21]	380	1			T508	6		T511	7		T434	7
values[22]	394	1			T508	8		T511	10		T434	9
values[23]	395	1			T508	15		T511	3		T434	10
values[24]	329	1			T508	3		T511	3		T434	16
values[25]	320	1			T508	10		T511	1		T434	6
values[26]	416	1			T508	26		T511	2		T434	29
values[27]	319	1			T508	14		T511	3		T434	1
values[28]	320	1			T508	5		T511	3		T773	16
values[29]	329	1			T508	8		T511	2		T773	6
values[30]	286	1			T508	2		T511	2		T773	3
values[31]	331	1			T511	5		T773	13		T421	10
values[32]	368	1			T511	6		T773	7		T421	14
values[33]	282	1			T511	7		T773	10		T421	10
values[34]	276	1			T511	12		T773	6		T421	13
values[35]	311	1			T511	5		T773	6		T421	7
values[36]	277	1			T511	3		T773	8		T421	4
values[37]	296	1			T511	2		T773	29		T421	9
values[38]	342	1			T511	1		T773	13		T421	7
values[39]	319	1			T511	2		T773	6		T421	5
values[40]	324	1			T511	10		T773	10		T421	4
values[41]	334	1			T511	9		T773	3		T421	9
values[42]	283	1			T511	5		T773	6		T421	12
values[43]	291	1			T511	1		T773	6		T421	9
values[44]	259	1			T511	4		T773	7		T421	6
values[45]	246	1			T511	3		T773	11		T421	6
values[46]	214	1			T511	6		T421	11		T794	3
values[47]	171	1			T511	2		T421	10		T794	2
values[48]	190	1			T511	8		T421	35		T794	3
values[49]	174	1			T511	9		T421	19		T794	6
values[50]	154	1			T511	7		T421	7		T794	5
values[51]	135	1			T511	13		T421	3		T794	3
values[52]	147	1			T511	6		T421	6		T794	2
values[53]	144	1			T511	6		T421	3		T794	1
values[54]	150	1			T511	6		T421	5		T794	6
values[55]	102	1			T511	2		T421	4		T794	3
values[56]	91	1			T511	6		T421	6		T794	4
values[57]	99	1			T511	5		T421	1		T794	4
values[58]	65	1			T511	2		T794	2		T759	1
values[59]	83	1			T511	2		T794	2		T759	3
values[60]	64	1			T511	1		T794	6		T759	8
values[61]	79	1			T511	8		T794	5		T759	4
values[62]	66	1			T511	6		T794	5		T759	1
values[63]	93	1			T511	5		T794	2		T759	2
values[64]	92	1			T511	7		T794	2		T759	2
values[65]	111	1			T511	17		T794	3		T759	3
values[66]	94	1			T511	22		T794	4		T759	2
values[67]	108	1			T511	13		T794	8		T759	16
values[68]	114	1			T511	13		T794	1		T759	13
values[69]	136	1			T511	31		T794	4		T759	4
values[70]	117	1			T511	29		T794	14		T759	2
values[71]	117	1			T511	21		T794	12		T759	10
values[72]	145	1			T511	11		T794	6		T759	16
values[73]	154	1			T511	10		T794	17		T759	13
values[74]	145	1			T511	17		T794	13		T759	17
values[75]	126	1			T511	6		T794	10		T759	19
values[76]	90	1			T511	3		T794	4		T759	9
values[77]	112	1			T511	2		T794	4		T759	3
values[78]	114	1			T794	5		T759	9		T775	8
values[79]	97	1			T794	3		T759	7		T775	5
values[80]	76	1			T794	6		T759	8		T775	3
values[81]	69	1			T794	4		T759	6		T775	4
values[82]	84	1			T794	12		T759	11		T775	4
values[83]	87	1			T794	7		T759	8		T775	7
values[84]	124	1			T794	13		T759	8		T775	22
values[85]	97	1			T794	14		T759	7		T775	11
values[86]	94	1			T794	3		T759	2		T775	11
values[87]	96	1			T794	3		T775	16		T492	1
values[88]	98	1			T794	10		T775	2		T492	1
values[89]	87	1			T794	11		T492	1		T805	6
values[90]	86	1			T794	2		T492	1		T805	11
values[91]	70	1			T492	3		T805	3		T803	1
values[92]	67	1			T492	2		T805	4		T803	1
values[93]	66	1			T492	2		T805	12		T803	1
values[94]	61	1			T492	3		T805	7		T803	1
values[95]	54	1			T492	3		T805	3		T803	1
values[96]	42	1			T492	3		T805	1		T803	1
values[97]	54	1			T492	1		T805	5		T803	2
values[98]	74	1			T492	4		T805	3		T803	1
values[99]	66	1			T492	4		T805	10		T803	1
values[100]	59	1			T492	2		T805	5		T803	1
values[101]	40	1			T492	2		T805	5		T803	1
values[102]	40	1			T492	1		T805	2		T803	2
values[103]	30	1			T492	2		T805	1		T803	1
values[104]	52	1			T492	10		T803	3		T783	1
values[105]	37	1			T492	3		T803	3		T783	5
values[106]	42	1			T492	2		T803	5		T783	2
values[107]	32	1			T492	1		T803	1		T783	2
values[108]	28	1			T492	2		T803	1		T783	2
values[109]	24	1			T492	2		T803	1		T783	3
values[110]	27	1			T492	2		T803	1		T783	1
values[111]	23	1			T492	1		T803	1		T783	1
values[112]	39	1			T492	2		T803	2		T783	1
values[113]	23	1			T492	1		T803	1		T783	2
values[114]	24	1			T492	1		T803	1		T783	1
values[115]	33	1			T492	3		T803	2		T783	2
values[116]	26	1			T492	1		T803	2		T783	1
values[117]	32	1			T492	2		T803	7		T783	3
values[118]	34	1			T492	2		T803	3		T783	2
values[119]	21	1			T492	2		T803	1		T783	2
values[120]	22	1			T492	4		T803	5		T783	2
values[121]	19	1			T492	1		T803	2		T783	1
values[122]	25	1			T492	2		T803	3		T783	1
values[123]	22	1			T492	2		T803	2		T783	2
values[124]	29	1			T492	1		T803	4		T783	4
values[125]	22	1			T492	1		T803	2		T783	2
values[126]	70	1			T492	3		T803	5		T783	12
values[127]	685	1			T492	61		T803	62		T783	68
values[128]	3149	1			T492	288		T803	329		T783	267