Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.csrng_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	153359	1			T81	42		T85	45		T86	106
values[2]	4521	1			T85	1		T86	1		T501	1
values[3]	2154	1			T501	1		T445	12		T556	1
values[4]	1571	1			T501	1		T445	13		T556	1
values[5]	1219	1			T501	1		T445	5		T556	3
values[6]	1032	1			T501	1		T445	11		T556	2
values[7]	896	1			T501	1		T445	14		T556	1
values[8]	829	1			T501	1		T445	19		T556	2
values[9]	669	1			T501	1		T445	22		T556	2
values[10]	686	1			T501	1		T445	25		T556	2
values[11]	651	1			T501	1		T445	24		T556	3
values[12]	595	1			T501	1		T445	23		T556	4
values[13]	476	1			T501	1		T445	17		T556	5
values[14]	461	1			T501	1		T445	30		T556	4
values[15]	390	1			T501	1		T445	15		T556	1
values[16]	352	1			T501	1		T445	12		T556	4
values[17]	318	1			T501	1		T445	3		T556	1
values[18]	335	1			T501	1		T445	12		T556	1
values[19]	338	1			T501	1		T445	15		T556	1
values[20]	290	1			T501	1		T445	11		T556	3
values[21]	229	1			T501	1		T445	16		T556	5
values[22]	217	1			T501	1		T445	32		T556	2
values[23]	163	1			T501	1		T445	23		T556	1
values[24]	150	1			T501	1		T445	19		T556	1
values[25]	156	1			T501	1		T445	12		T556	3
values[26]	124	1			T501	1		T445	17		T556	1
values[27]	137	1			T501	1		T445	25		T556	2
values[28]	114	1			T501	1		T445	16		T556	6
values[29]	102	1			T501	1		T445	11		T556	3
values[30]	79	1			T501	1		T445	4		T556	2
values[31]	67	1			T501	1		T445	5		T556	1
values[32]	64	1			T501	1		T445	4		T556	2
values[33]	65	1			T501	1		T445	1		T556	4
values[34]	67	1			T501	1		T556	3		T765	1
values[35]	97	1			T501	1		T556	11		T765	1
values[36]	100	1			T501	1		T556	5		T765	1
values[37]	124	1			T501	1		T556	4		T765	1
values[38]	86	1			T501	1		T556	2		T765	1
values[39]	52	1			T501	1		T556	2		T765	1
values[40]	52	1			T501	1		T556	1		T765	1
values[41]	42	1			T501	1		T556	5		T765	1
values[42]	31	1			T501	1		T556	1		T765	1
values[43]	31	1			T501	1		T556	3		T765	1
values[44]	36	1			T501	1		T556	5		T765	1
values[45]	32	1			T501	1		T556	1		T765	1
values[46]	34	1			T501	1		T556	2		T765	1
values[47]	29	1			T501	1		T556	2		T765	1
values[48]	31	1			T501	1		T556	4		T765	1
values[49]	30	1			T501	1		T556	1		T765	1
values[50]	35	1			T501	1		T556	9		T765	1
values[51]	31	1			T501	1		T556	3		T765	1
values[52]	33	1			T501	1		T556	2		T765	1
values[53]	31	1			T501	1		T556	2		T765	1
values[54]	35	1			T501	1		T556	4		T765	1
values[55]	38	1			T501	1		T556	4		T765	1
values[56]	39	1			T501	1		T556	5		T765	1
values[57]	32	1			T501	1		T556	1		T765	1
values[58]	31	1			T501	1		T556	3		T765	1
values[59]	31	1			T501	1		T556	1		T765	1
values[60]	38	1			T501	1		T556	4		T765	1
values[61]	36	1			T501	1		T556	1		T765	1
values[62]	33	1			T501	1		T556	2		T765	1
values[63]	34	1			T501	1		T556	2		T765	1
values[64]	37	1			T501	1		T556	1		T765	1
values[65]	33	1			T501	1		T556	3		T765	1
values[66]	32	1			T501	1		T556	2		T765	1
values[67]	30	1			T501	1		T556	2		T765	1
values[68]	30	1			T501	1		T556	1		T765	1
values[69]	32	1			T501	1		T556	2		T765	1
values[70]	33	1			T501	1		T556	2		T765	1
values[71]	34	1			T501	1		T556	1		T765	1
values[72]	36	1			T501	1		T556	5		T765	1
values[73]	29	1			T501	1		T556	1		T765	1
values[74]	30	1			T501	1		T556	2		T765	1
values[75]	33	1			T501	1		T556	5		T765	1
values[76]	31	1			T501	1		T556	4		T765	1
values[77]	41	1			T501	1		T556	1		T765	1
values[78]	40	1			T501	1		T556	1		T765	1
values[79]	29	1			T501	1		T556	1		T765	1
values[80]	38	1			T501	1		T556	2		T765	1
values[81]	42	1			T501	1		T556	5		T765	1
values[82]	37	1			T501	1		T556	4		T765	1
values[83]	41	1			T501	1		T556	5		T765	1
values[84]	44	1			T501	1		T556	3		T765	1
values[85]	36	1			T501	1		T556	2		T765	1
values[86]	35	1			T501	1		T556	2		T765	1
values[87]	49	1			T501	1		T556	3		T765	2
values[88]	47	1			T501	1		T556	7		T765	1
values[89]	51	1			T501	1		T556	4		T765	1
values[90]	64	1			T501	1		T556	7		T765	1
values[91]	40	1			T501	1		T556	2		T765	1
values[92]	40	1			T501	1		T556	1		T765	1
values[93]	49	1			T501	1		T556	1		T765	1
values[94]	44	1			T501	1		T556	1		T765	1
values[95]	50	1			T501	1		T556	1		T765	1
values[96]	45	1			T501	1		T556	2		T765	1
values[97]	49	1			T501	1		T556	2		T765	1
values[98]	47	1			T501	1		T556	2		T765	1
values[99]	44	1			T501	1		T556	1		T765	1
values[100]	52	1			T501	1		T556	4		T765	1
values[101]	60	1			T501	1		T556	14		T765	1
values[102]	52	1			T501	2		T556	11		T765	1
values[103]	51	1			T501	2		T556	10		T765	1
values[104]	57	1			T501	1		T556	9		T765	1
values[105]	45	1			T501	1		T556	7		T765	1
values[106]	50	1			T501	2		T556	5		T765	1
values[107]	49	1			T501	2		T556	2		T765	1
values[108]	59	1			T501	1		T556	13		T765	3
values[109]	72	1			T501	5		T556	13		T765	2
values[110]	62	1			T501	2		T556	4		T765	1
values[111]	61	1			T501	1		T556	8		T765	1
values[112]	59	1			T501	1		T556	7		T765	1
values[113]	70	1			T501	1		T556	15		T765	3
values[114]	69	1			T501	1		T556	9		T765	2
values[115]	69	1			T501	5		T556	5		T765	3
values[116]	62	1			T501	1		T556	8		T765	1
values[117]	51	1			T501	1		T556	2		T765	2
values[118]	53	1			T501	2		T556	1		T765	1
values[119]	61	1			T501	1		T556	7		T765	2
values[120]	68	1			T501	2		T556	8		T765	2
values[121]	72	1			T501	3		T556	5		T765	3
values[122]	75	1			T501	2		T556	7		T765	3
values[123]	86	1			T501	3		T556	5		T765	2
values[124]	74	1			T501	2		T556	7		T765	2
values[125]	175	1			T501	3		T556	25		T765	2
values[126]	553	1			T501	10		T556	37		T765	9
values[127]	2478	1			T501	98		T556	16		T765	111
values[128]	4818	1			T501	250		T556	2		T765	221