Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.pwm_aon_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	145323	1			T76	30		T77	106		T78	36
values[2]	10067	1			T76	1		T476	2		T484	1
values[3]	3827	1			T476	1		T492	1		T810	7
values[4]	2316	1			T492	1		T810	4		T388	1
values[5]	1574	1			T492	1		T810	11		T388	1
values[6]	1053	1			T492	1		T810	3		T388	1
values[7]	828	1			T492	1		T810	7		T388	1
values[8]	609	1			T492	1		T810	5		T388	1
values[9]	486	1			T492	1		T810	13		T388	1
values[10]	504	1			T492	1		T810	5		T388	1
values[11]	445	1			T492	1		T810	4		T388	1
values[12]	401	1			T492	1		T810	5		T388	1
values[13]	366	1			T492	1		T810	16		T388	1
values[14]	377	1			T492	1		T810	5		T388	1
values[15]	296	1			T492	1		T810	6		T388	1
values[16]	329	1			T492	1		T810	12		T388	1
values[17]	284	1			T492	1		T810	5		T388	1
values[18]	285	1			T492	1		T810	4		T388	1
values[19]	323	1			T492	1		T810	5		T388	1
values[20]	305	1			T492	1		T810	9		T388	1
values[21]	291	1			T492	1		T810	13		T388	1
values[22]	270	1			T492	1		T810	12		T388	1
values[23]	309	1			T492	1		T810	7		T388	1
values[24]	343	1			T492	2		T810	3		T388	1
values[25]	279	1			T492	1		T810	5		T388	1
values[26]	330	1			T492	1		T810	5		T388	1
values[27]	310	1			T492	1		T810	9		T388	1
values[28]	295	1			T492	1		T810	14		T388	1
values[29]	272	1			T492	1		T810	5		T388	1
values[30]	275	1			T492	1		T810	5		T388	1
values[31]	300	1			T492	1		T810	4		T388	1
values[32]	302	1			T492	1		T810	11		T388	1
values[33]	315	1			T492	1		T810	11		T388	1
values[34]	273	1			T492	1		T810	13		T388	1
values[35]	332	1			T492	1		T810	2		T388	1
values[36]	257	1			T492	1		T810	9		T388	1
values[37]	281	1			T492	1		T810	5		T388	1
values[38]	262	1			T492	1		T810	4		T388	1
values[39]	269	1			T492	1		T810	16		T388	1
values[40]	332	1			T492	1		T810	30		T388	1
values[41]	256	1			T492	1		T810	8		T388	1
values[42]	239	1			T492	1		T810	13		T388	1
values[43]	243	1			T492	1		T810	7		T388	1
values[44]	277	1			T492	1		T810	8		T388	1
values[45]	266	1			T492	1		T810	5		T388	1
values[46]	266	1			T492	1		T810	5		T388	1
values[47]	298	1			T492	1		T810	2		T388	1
values[48]	261	1			T492	1		T810	3		T388	1
values[49]	201	1			T492	1		T810	17		T388	1
values[50]	216	1			T492	1		T810	5		T388	1
values[51]	192	1			T492	1		T810	4		T388	1
values[52]	215	1			T492	1		T810	5		T388	1
values[53]	185	1			T492	1		T810	3		T388	1
values[54]	197	1			T492	1		T810	8		T388	1
values[55]	167	1			T492	1		T810	4		T388	1
values[56]	174	1			T492	1		T810	4		T388	1
values[57]	180	1			T492	1		T810	13		T388	1
values[58]	221	1			T492	1		T810	4		T388	1
values[59]	205	1			T492	1		T810	5		T388	1
values[60]	193	1			T492	1		T810	9		T388	1
values[61]	167	1			T492	1		T810	18		T388	1
values[62]	191	1			T492	1		T810	15		T388	1
values[63]	192	1			T492	1		T810	7		T388	1
values[64]	164	1			T492	2		T810	5		T388	1
values[65]	178	1			T492	1		T810	14		T388	1
values[66]	163	1			T492	1		T810	8		T388	1
values[67]	190	1			T492	1		T810	7		T388	1
values[68]	153	1			T492	1		T810	3		T388	1
values[69]	140	1			T492	1		T810	5		T388	1
values[70]	121	1			T492	1		T810	16		T388	1
values[71]	125	1			T492	1		T810	12		T388	2
values[72]	112	1			T492	1		T810	5		T388	1
values[73]	82	1			T492	1		T388	1		T457	1
values[74]	91	1			T492	1		T388	1		T457	1
values[75]	89	1			T492	1		T388	1		T457	1
values[76]	87	1			T492	1		T388	1		T457	1
values[77]	70	1			T492	1		T388	1		T457	1
values[78]	80	1			T492	1		T388	1		T457	1
values[79]	75	1			T492	1		T388	1		T457	1
values[80]	90	1			T492	1		T388	1		T457	1
values[81]	74	1			T492	1		T388	1		T457	1
values[82]	76	1			T492	1		T388	1		T457	1
values[83]	72	1			T492	1		T388	1		T457	1
values[84]	63	1			T492	1		T388	1		T457	1
values[85]	68	1			T492	1		T388	1		T457	1
values[86]	50	1			T492	1		T388	1		T457	1
values[87]	50	1			T492	1		T388	1		T457	1
values[88]	49	1			T492	1		T388	1		T457	1
values[89]	49	1			T492	1		T388	1		T457	1
values[90]	54	1			T492	1		T388	1		T457	1
values[91]	51	1			T492	1		T388	1		T457	1
values[92]	60	1			T492	1		T388	1		T457	1
values[93]	47	1			T492	1		T388	1		T457	1
values[94]	59	1			T492	1		T388	1		T457	1
values[95]	78	1			T492	1		T388	7		T457	1
values[96]	68	1			T492	1		T388	2		T457	1
values[97]	55	1			T492	1		T388	3		T457	1
values[98]	54	1			T492	1		T388	1		T457	1
values[99]	48	1			T492	1		T388	3		T457	1
values[100]	54	1			T492	1		T388	1		T457	1
values[101]	55	1			T492	1		T388	2		T457	1
values[102]	52	1			T492	1		T388	2		T457	1
values[103]	56	1			T492	1		T388	7		T457	1
values[104]	44	1			T492	1		T388	2		T457	3
values[105]	45	1			T492	1		T388	2		T457	3
values[106]	33	1			T492	1		T388	3		T457	1
values[107]	29	1			T492	1		T388	1		T457	3
values[108]	39	1			T492	1		T388	1		T457	5
values[109]	33	1			T492	1		T388	1		T457	1
values[110]	40	1			T492	1		T388	2		T457	1
values[111]	62	1			T492	1		T388	2		T457	2
values[112]	69	1			T492	1		T388	5		T457	4
values[113]	34	1			T492	1		T388	1		T457	1
values[114]	57	1			T492	1		T388	1		T457	2
values[115]	42	1			T492	1		T388	1		T457	3
values[116]	27	1			T492	1		T388	1		T457	1
values[117]	42	1			T492	1		T388	7		T457	2
values[118]	40	1			T492	1		T388	3		T457	4
values[119]	39	1			T492	2		T388	3		T457	1
values[120]	39	1			T492	1		T388	1		T457	4
values[121]	30	1			T492	1		T388	3		T457	1
values[122]	27	1			T492	4		T388	3		T457	1
values[123]	47	1			T492	3		T388	3		T457	3
values[124]	32	1			T492	2		T388	1		T457	2
values[125]	48	1			T492	1		T388	1		T457	1
values[126]	85	1			T492	3		T388	1		T457	2
values[127]	593	1			T492	28		T388	29		T457	28
values[128]	4558	1			T492	367		T388	231		T457	278