Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.rstmgr_aon_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	147010	1			T76	28		T77	96		T78	31
values[2]	10588	1			T76	2		T77	1		T476	5
values[3]	4135	1			T386	1		T492	1		T389	1
values[4]	2494	1			T492	1		T667	115		T391	171
values[5]	1807	1			T492	1		T667	63		T391	109
values[6]	1111	1			T492	1		T667	60		T391	32
values[7]	822	1			T492	1		T667	35		T391	11
values[8]	687	1			T492	1		T667	11		T391	1
values[9]	585	1			T492	1		T667	6		T650	10
values[10]	442	1			T492	1		T650	6		T457	1
values[11]	372	1			T492	1		T650	3		T457	1
values[12]	350	1			T492	1		T650	5		T457	1
values[13]	406	1			T492	1		T650	19		T457	1
values[14]	323	1			T492	1		T650	4		T457	1
values[15]	320	1			T492	1		T650	8		T457	1
values[16]	348	1			T492	1		T650	12		T457	1
values[17]	393	1			T492	1		T650	3		T457	1
values[18]	336	1			T492	1		T650	16		T457	1
values[19]	316	1			T492	1		T650	8		T457	1
values[20]	340	1			T492	1		T650	5		T457	1
values[21]	351	1			T492	1		T650	10		T457	1
values[22]	309	1			T492	1		T650	5		T457	1
values[23]	334	1			T492	1		T650	4		T457	1
values[24]	293	1			T492	1		T650	7		T457	1
values[25]	321	1			T492	1		T650	16		T457	1
values[26]	296	1			T492	1		T650	14		T457	1
values[27]	281	1			T492	1		T650	6		T457	1
values[28]	241	1			T492	1		T650	4		T457	1
values[29]	286	1			T492	1		T650	7		T457	1
values[30]	290	1			T492	1		T650	10		T457	1
values[31]	356	1			T492	1		T650	21		T457	1
values[32]	331	1			T492	1		T650	6		T457	1
values[33]	289	1			T492	1		T650	5		T457	1
values[34]	332	1			T492	1		T650	3		T457	1
values[35]	309	1			T492	1		T650	6		T457	1
values[36]	312	1			T492	1		T650	7		T457	1
values[37]	304	1			T492	1		T650	4		T457	1
values[38]	293	1			T492	1		T650	7		T457	1
values[39]	297	1			T492	1		T650	5		T457	1
values[40]	294	1			T492	1		T650	10		T457	1
values[41]	301	1			T492	1		T650	6		T457	1
values[42]	255	1			T492	1		T650	7		T457	1
values[43]	310	1			T492	1		T650	6		T457	1
values[44]	299	1			T492	1		T650	3		T457	1
values[45]	311	1			T492	1		T650	16		T457	1
values[46]	280	1			T492	1		T650	5		T457	1
values[47]	285	1			T492	1		T650	7		T457	1
values[48]	286	1			T492	1		T650	6		T457	1
values[49]	266	1			T492	1		T650	12		T457	1
values[50]	273	1			T492	1		T650	8		T457	1
values[51]	278	1			T492	1		T650	6		T457	1
values[52]	197	1			T492	1		T650	9		T457	1
values[53]	273	1			T492	1		T650	6		T457	1
values[54]	337	1			T492	1		T650	7		T457	1
values[55]	268	1			T492	1		T650	6		T457	1
values[56]	252	1			T492	1		T457	1		T627	4
values[57]	218	1			T492	1		T457	1		T627	12
values[58]	228	1			T492	1		T457	1		T627	6
values[59]	233	1			T492	1		T457	1		T627	5
values[60]	159	1			T492	1		T457	1		T627	5
values[61]	195	1			T492	1		T457	1		T627	6
values[62]	197	1			T492	1		T457	1		T627	11
values[63]	197	1			T492	1		T457	1		T627	3
values[64]	180	1			T492	1		T457	1		T627	9
values[65]	176	1			T492	1		T457	1		T627	5
values[66]	140	1			T492	1		T457	1		T627	7
values[67]	139	1			T492	1		T457	1		T627	4
values[68]	138	1			T492	1		T457	1		T627	4
values[69]	108	1			T492	1		T457	1		T809	2
values[70]	111	1			T492	1		T457	1		T809	2
values[71]	84	1			T492	1		T457	1		T809	2
values[72]	91	1			T492	1		T457	1		T809	2
values[73]	113	1			T492	1		T457	1		T809	3
values[74]	114	1			T492	1		T457	1		T809	2
values[75]	95	1			T492	1		T457	1		T809	2
values[76]	85	1			T492	1		T457	1		T809	2
values[77]	69	1			T492	1		T457	1		T809	2
values[78]	73	1			T492	1		T457	1		T809	2
values[79]	82	1			T492	1		T457	1		T809	2
values[80]	86	1			T492	1		T457	1		T809	2
values[81]	58	1			T492	1		T457	1		T809	2
values[82]	73	1			T492	1		T457	1		T809	2
values[83]	69	1			T492	1		T457	1		T809	2
values[84]	83	1			T492	1		T457	1		T809	2
values[85]	104	1			T492	1		T457	1		T809	2
values[86]	92	1			T492	1		T457	1		T809	2
values[87]	90	1			T492	1		T457	1		T809	2
values[88]	107	1			T492	1		T457	1		T809	2
values[89]	109	1			T492	1		T457	1		T809	2
values[90]	87	1			T492	1		T457	1		T809	3
values[91]	81	1			T492	1		T457	1		T809	2
values[92]	92	1			T492	1		T457	1		T809	2
values[93]	83	1			T492	2		T457	1		T809	2
values[94]	79	1			T492	1		T457	1		T809	2
values[95]	102	1			T492	1		T457	1		T809	9
values[96]	85	1			T492	1		T457	1		T809	6
values[97]	125	1			T492	15		T457	1		T809	12
values[98]	83	1			T492	4		T457	1		T809	4
values[99]	92	1			T492	3		T457	1		T809	7
values[100]	100	1			T492	1		T457	1		T809	5
values[101]	85	1			T492	3		T457	1		T809	2
values[102]	98	1			T492	3		T457	1		T809	4
values[103]	84	1			T492	2		T457	1		T809	2
values[104]	106	1			T492	7		T457	1		T809	3
values[105]	82	1			T492	1		T457	1		T809	2
values[106]	69	1			T492	2		T457	1		T809	3
values[107]	84	1			T492	2		T457	1		T809	8
values[108]	78	1			T492	1		T457	1		T809	6
values[109]	83	1			T492	2		T457	1		T809	6
values[110]	78	1			T492	1		T457	1		T809	7
values[111]	77	1			T492	1		T457	1		T809	3
values[112]	72	1			T492	2		T457	1		T809	4
values[113]	64	1			T492	4		T457	1		T809	2
values[114]	74	1			T492	2		T457	1		T809	3
values[115]	75	1			T492	2		T457	1		T809	5
values[116]	62	1			T492	5		T457	3		T809	8
values[117]	63	1			T492	3		T457	1		T809	4
values[118]	78	1			T492	1		T457	1		T809	6
values[119]	73	1			T492	1		T457	3		T809	3
values[120]	61	1			T492	3		T457	1		T809	5
values[121]	77	1			T492	1		T457	1		T809	8
values[122]	67	1			T492	9		T457	1		T809	2
values[123]	66	1			T492	1		T457	2		T809	3
values[124]	53	1			T492	1		T457	1		T809	2
values[125]	63	1			T492	1		T457	1		T809	3
values[126]	97	1			T492	2		T457	5		T809	2
values[127]	1067	1			T492	26		T457	34		T809	58
values[128]	9531	1			T492	260		T457	269		T809	638