Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.sram_ctrl_ret_aon__ram_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	141467	1			T76	33		T77	95		T78	48
values[2]	10000	1			T76	2		T77	2		T350	1
values[3]	4340	1			T478	2		T490	7		T419	28
values[4]	2433	1			T490	14		T419	2		T539	9
values[5]	1550	1			T490	9		T419	1		T539	6
values[6]	1086	1			T490	3		T539	6		T392	5
values[7]	777	1			T490	5		T539	13		T392	18
values[8]	604	1			T490	8		T539	6		T392	5
values[9]	470	1			T490	6		T539	5		T392	8
values[10]	386	1			T490	4		T539	7		T392	8
values[11]	405	1			T490	11		T539	6		T392	12
values[12]	329	1			T490	7		T539	10		T392	7
values[13]	344	1			T490	4		T539	9		T392	6
values[14]	364	1			T490	5		T539	8		T392	5
values[15]	321	1			T490	14		T539	5		T392	7
values[16]	341	1			T490	6		T539	5		T392	2
values[17]	337	1			T490	7		T539	3		T392	7
values[18]	345	1			T490	4		T539	7		T392	14
values[19]	341	1			T490	9		T539	4		T392	6
values[20]	280	1			T490	13		T539	11		T392	8
values[21]	300	1			T490	4		T539	12		T392	9
values[22]	335	1			T490	9		T539	8		T392	7
values[23]	286	1			T490	5		T539	5		T392	11
values[24]	305	1			T490	8		T539	19		T392	5
values[25]	313	1			T490	8		T539	11		T392	18
values[26]	318	1			T490	4		T539	8		T392	11
values[27]	277	1			T490	19		T539	7		T392	6
values[28]	279	1			T490	2		T539	7		T392	3
values[29]	306	1			T490	13		T539	6		T392	4
values[30]	271	1			T490	4		T539	7		T392	8
values[31]	299	1			T490	4		T539	10		T392	4
values[32]	287	1			T490	3		T539	7		T392	12
values[33]	274	1			T490	4		T539	6		T392	7
values[34]	243	1			T490	6		T539	11		T392	7
values[35]	294	1			T490	7		T539	3		T392	4
values[36]	271	1			T490	10		T539	3		T392	3
values[37]	294	1			T490	12		T539	5		T392	3
values[38]	297	1			T490	14		T539	10		T392	6
values[39]	289	1			T490	5		T539	3		T392	3
values[40]	261	1			T490	4		T539	7		T392	5
values[41]	244	1			T490	5		T539	5		T392	7
values[42]	282	1			T490	8		T539	8		T392	13
values[43]	250	1			T490	5		T539	10		T392	11
values[44]	262	1			T490	4		T539	4		T392	10
values[45]	236	1			T490	7		T539	5		T392	7
values[46]	268	1			T490	5		T539	18		T392	4
values[47]	266	1			T490	6		T539	5		T392	2
values[48]	260	1			T490	7		T539	6		T388	1
values[49]	277	1			T490	11		T539	17		T388	1
values[50]	266	1			T490	5		T539	8		T388	1
values[51]	242	1			T490	16		T539	11		T388	1
values[52]	232	1			T490	3		T539	3		T388	1
values[53]	197	1			T490	3		T539	5		T388	1
values[54]	213	1			T490	5		T539	7		T388	1
values[55]	235	1			T490	11		T539	7		T388	1
values[56]	243	1			T490	4		T539	5		T388	1
values[57]	241	1			T490	8		T539	8		T388	1
values[58]	206	1			T490	5		T539	4		T388	1
values[59]	201	1			T490	14		T539	7		T388	1
values[60]	205	1			T490	4		T539	6		T388	1
values[61]	183	1			T490	8		T539	7		T388	1
values[62]	172	1			T490	10		T539	4		T388	1
values[63]	225	1			T490	12		T539	6		T388	1
values[64]	186	1			T490	10		T539	11		T388	1
values[65]	169	1			T490	10		T388	1		T501	1
values[66]	151	1			T490	7		T388	1		T501	1
values[67]	125	1			T388	1		T501	1		T813	1
values[68]	150	1			T388	1		T501	1		T813	1
values[69]	144	1			T388	1		T501	1		T813	1
values[70]	135	1			T388	1		T501	1		T813	1
values[71]	135	1			T388	1		T501	1		T813	1
values[72]	115	1			T388	1		T501	1		T813	1
values[73]	105	1			T388	1		T501	1		T813	1
values[74]	108	1			T388	1		T501	1		T813	1
values[75]	105	1			T388	2		T501	1		T813	1
values[76]	84	1			T388	1		T501	1		T813	1
values[77]	113	1			T388	1		T501	1		T813	1
values[78]	83	1			T388	1		T501	1		T813	1
values[79]	85	1			T388	1		T501	1		T813	1
values[80]	86	1			T388	1		T501	1		T813	1
values[81]	67	1			T388	1		T501	1		T813	1
values[82]	78	1			T388	1		T501	1		T813	1
values[83]	80	1			T388	1		T501	1		T813	1
values[84]	85	1			T388	1		T501	1		T813	1
values[85]	78	1			T388	1		T501	1		T813	1
values[86]	72	1			T388	1		T501	1		T813	1
values[87]	80	1			T388	1		T501	1		T813	1
values[88]	99	1			T388	1		T501	1		T813	1
values[89]	99	1			T388	1		T501	1		T813	1
values[90]	73	1			T388	2		T501	1		T813	1
values[91]	101	1			T388	2		T501	1		T813	1
values[92]	81	1			T388	2		T501	1		T813	1
values[93]	85	1			T388	8		T501	1		T813	1
values[94]	74	1			T388	2		T501	1		T813	1
values[95]	100	1			T388	1		T501	1		T813	1
values[96]	103	1			T388	3		T501	1		T813	1
values[97]	68	1			T388	3		T501	1		T813	1
values[98]	81	1			T388	12		T501	1		T813	1
values[99]	94	1			T388	12		T501	1		T813	1
values[100]	85	1			T388	4		T501	1		T813	1
values[101]	64	1			T388	4		T501	1		T813	1
values[102]	46	1			T388	2		T501	1		T813	1
values[103]	52	1			T388	1		T501	1		T813	1
values[104]	73	1			T388	5		T501	1		T813	1
values[105]	69	1			T388	2		T501	1		T813	1
values[106]	79	1			T388	6		T501	1		T813	1
values[107]	73	1			T388	1		T501	1		T813	1
values[108]	78	1			T388	2		T501	1		T813	1
values[109]	61	1			T388	2		T501	1		T813	1
values[110]	86	1			T388	6		T501	1		T813	1
values[111]	66	1			T388	1		T501	1		T813	1
values[112]	49	1			T388	1		T501	1		T813	1
values[113]	57	1			T388	3		T501	1		T813	1
values[114]	58	1			T388	1		T501	1		T813	1
values[115]	64	1			T388	4		T501	1		T813	1
values[116]	76	1			T388	1		T501	1		T813	1
values[117]	54	1			T388	1		T501	1		T813	1
values[118]	76	1			T388	4		T501	3		T813	1
values[119]	53	1			T388	2		T501	1		T813	1
values[120]	49	1			T388	2		T501	3		T813	1
values[121]	55	1			T388	2		T501	2		T813	2
values[122]	68	1			T388	2		T501	1		T813	1
values[123]	51	1			T388	1		T501	1		T813	1
values[124]	54	1			T388	1		T501	1		T813	1
values[125]	72	1			T388	3		T501	1		T813	2
values[126]	133	1			T388	1		T501	1		T813	2
values[127]	737	1			T388	22		T501	25		T813	37
values[128]	5690	1			T388	271		T501	290		T813	310