Unified Coverage Report :: Group Instance : tl_agent_pkg.uvm_test_top.env.uart1_agent.cov::m_max_outstanding_cg

Summary for Variable cp_num_of_outstanding

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	128	0	128	100.00

User Defined Bins for cp_num_of_outstanding

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[1]	143903	1			T76	35		T77	106		T78	42
values[2]	11298	1			T76	3		T476	2		T471	1
values[3]	4816	1			T386	16		T419	29		T810	6
values[4]	3084	1			T386	9		T419	1		T810	22
values[5]	2004	1			T386	7		T810	8		T648	4
values[6]	1376	1			T386	3		T810	21		T388	1
values[7]	879	1			T386	6		T810	9		T388	1
values[8]	733	1			T386	5		T810	14		T388	1
values[9]	672	1			T386	1		T810	20		T388	1
values[10]	528	1			T810	14		T388	1		T391	1
values[11]	459	1			T810	12		T388	1		T501	1
values[12]	405	1			T810	16		T388	1		T501	1
values[13]	402	1			T810	15		T388	1		T501	1
values[14]	373	1			T810	11		T388	1		T501	1
values[15]	367	1			T810	12		T388	1		T501	1
values[16]	348	1			T810	9		T388	1		T501	1
values[17]	360	1			T810	12		T388	1		T501	1
values[18]	352	1			T810	19		T388	1		T501	1
values[19]	324	1			T810	25		T388	1		T501	1
values[20]	368	1			T810	11		T388	1		T501	1
values[21]	346	1			T810	6		T388	1		T501	1
values[22]	364	1			T810	25		T388	1		T501	1
values[23]	350	1			T810	10		T388	1		T501	1
values[24]	331	1			T810	9		T388	1		T501	1
values[25]	334	1			T810	24		T388	1		T501	1
values[26]	270	1			T810	20		T388	1		T501	1
values[27]	348	1			T810	18		T388	1		T501	1
values[28]	347	1			T810	34		T388	1		T501	1
values[29]	336	1			T810	7		T388	1		T501	1
values[30]	391	1			T810	24		T388	1		T501	1
values[31]	335	1			T810	15		T388	1		T501	1
values[32]	310	1			T810	10		T388	1		T501	1
values[33]	353	1			T810	6		T388	1		T501	1
values[34]	358	1			T810	17		T388	2		T501	1
values[35]	363	1			T810	5		T388	1		T501	1
values[36]	323	1			T810	14		T388	1		T501	1
values[37]	286	1			T810	13		T388	1		T501	1
values[38]	310	1			T810	16		T388	1		T501	1
values[39]	324	1			T810	28		T388	1		T501	1
values[40]	302	1			T810	14		T388	1		T501	1
values[41]	309	1			T810	11		T388	1		T501	1
values[42]	277	1			T810	9		T388	1		T501	1
values[43]	296	1			T810	13		T388	1		T501	1
values[44]	343	1			T810	8		T388	1		T501	1
values[45]	330	1			T810	9		T388	1		T501	1
values[46]	345	1			T810	10		T388	1		T501	1
values[47]	283	1			T810	11		T388	1		T501	1
values[48]	306	1			T810	19		T388	1		T501	1
values[49]	329	1			T810	17		T388	1		T501	1
values[50]	319	1			T810	12		T388	1		T501	1
values[51]	270	1			T810	11		T388	1		T501	1
values[52]	306	1			T810	19		T388	1		T501	1
values[53]	346	1			T810	7		T388	1		T501	1
values[54]	287	1			T810	18		T388	1		T501	1
values[55]	269	1			T810	11		T388	1		T501	1
values[56]	253	1			T810	19		T388	1		T501	1
values[57]	231	1			T810	11		T388	1		T501	1
values[58]	221	1			T810	20		T388	1		T501	1
values[59]	261	1			T810	12		T388	1		T501	1
values[60]	255	1			T810	15		T388	1		T501	1
values[61]	250	1			T810	26		T388	1		T501	2
values[62]	199	1			T810	21		T388	1		T501	1
values[63]	162	1			T810	18		T388	1		T501	1
values[64]	154	1			T810	13		T388	1		T501	1
values[65]	169	1			T810	28		T388	1		T501	1
values[66]	186	1			T810	19		T388	1		T501	1
values[67]	167	1			T810	12		T388	1		T501	1
values[68]	155	1			T810	5		T388	1		T501	1
values[69]	144	1			T388	1		T501	1		T457	1
values[70]	159	1			T388	1		T501	1		T457	1
values[71]	106	1			T388	1		T501	2		T457	1
values[72]	87	1			T388	1		T501	1		T457	1
values[73]	100	1			T388	1		T501	1		T457	1
values[74]	87	1			T388	1		T501	1		T457	1
values[75]	86	1			T388	1		T501	1		T457	1
values[76]	87	1			T388	1		T501	1		T457	1
values[77]	87	1			T388	1		T501	1		T457	1
values[78]	79	1			T388	1		T501	1		T457	1
values[79]	92	1			T388	1		T501	1		T457	1
values[80]	80	1			T388	1		T501	1		T457	1
values[81]	81	1			T388	1		T501	1		T457	1
values[82]	74	1			T388	1		T501	1		T457	1
values[83]	70	1			T388	1		T501	1		T457	2
values[84]	67	1			T388	1		T501	1		T457	1
values[85]	72	1			T388	1		T501	1		T457	1
values[86]	87	1			T388	1		T501	1		T457	1
values[87]	89	1			T388	1		T501	1		T457	1
values[88]	122	1			T388	1		T501	1		T457	1
values[89]	103	1			T388	1		T501	1		T457	1
values[90]	78	1			T388	1		T501	1		T457	1
values[91]	79	1			T388	1		T501	1		T457	1
values[92]	76	1			T388	1		T501	1		T457	1
values[93]	89	1			T388	1		T501	1		T457	1
values[94]	90	1			T388	1		T501	1		T457	1
values[95]	94	1			T388	1		T501	1		T457	1
values[96]	87	1			T388	1		T501	1		T457	6
values[97]	88	1			T388	1		T501	1		T457	1
values[98]	113	1			T388	1		T501	1		T457	3
values[99]	91	1			T388	1		T501	1		T457	6
values[100]	81	1			T388	1		T501	1		T457	2
values[101]	76	1			T388	1		T501	1		T457	7
values[102]	76	1			T388	1		T501	1		T457	1
values[103]	93	1			T388	1		T501	1		T457	5
values[104]	97	1			T388	2		T501	1		T457	2
values[105]	81	1			T388	9		T501	3		T457	4
values[106]	86	1			T388	3		T501	2		T457	3
values[107]	98	1			T388	3		T501	6		T457	2
values[108]	115	1			T388	1		T501	4		T457	1
values[109]	112	1			T388	1		T501	2		T457	1
values[110]	99	1			T388	2		T501	3		T457	6
values[111]	90	1			T388	2		T501	2		T457	4
values[112]	90	1			T388	1		T501	1		T457	1
values[113]	95	1			T388	1		T501	1		T457	2
values[114]	68	1			T388	1		T501	2		T457	1
values[115]	68	1			T388	4		T501	1		T457	2
values[116]	77	1			T388	4		T501	1		T457	1
values[117]	83	1			T388	6		T501	1		T457	3
values[118]	101	1			T388	10		T501	2		T457	2
values[119]	75	1			T388	3		T501	1		T457	2
values[120]	84	1			T388	7		T501	2		T457	1
values[121]	68	1			T388	2		T501	1		T457	1
values[122]	83	1			T388	2		T501	1		T457	2
values[123]	68	1			T388	2		T501	1		T457	1
values[124]	75	1			T388	2		T501	1		T457	2
values[125]	89	1			T388	2		T501	2		T457	2
values[126]	161	1			T388	1		T501	1		T457	2
values[127]	862	1			T388	28		T501	29		T457	31
values[128]	6741	1			T388	318		T501	339		T457	288